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AMD Processor and Its Architecture

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AMD Processor and Its Architecture

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nitesh
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AMD Processor and Its Architecture

Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor


company based in Santa Clara, California, that develops computer processors and
related technologies for business and consumer markets. While it initially
manufactured its own processors, the company later outsourced its manufacturing, a
practice known as going fabless, after GlobalFoundries was spun off in 2009. AMD's
main products include microprocessors, motherboard chipsets, embedded
processors and graphics processors for servers, workstations, personal computers
and embedded system applications.
An AMD processor can be used with the same software as an Intel® processor, but
not the same motherboard. AMD processor can be used with the same software as
an Intel® processor because both were designed to be compatible with the x86
instruction set.
While all x86 CPUs must support the same basic set of instructions, the physical
design of the processor and layout of its millions of transistors, known as
microarchitecture, can vary.
AMD’s high-performance x86 Core “Zen 2” architecture enables 3rd Gen Ryzen™
Processors like the AMD Ryzen™ 9 3900X deliver the high single-thread and multi-
thread performance for mainstream desktop processors1. For gamers and creators
alike, that’s mission-critical xperformance built to help you win.
Advantages of AMD Processors:
 They are cheaper than Intel processors. and provide better value for money...
 Some of them especially APU's have better onboard graphics than any other
Intel CPUs in its range...
 You can go for all AMD system if you are building a new PC because they also
make GPU's(graphic cards), memory(RAM).
Intel Core

Intel Core are streamlined midrange consumer, workstation and enthusiast


computers central processing units (CPU) marketed by Intel Corporation. These
processors displaced the existing mid- to high-end Pentium processors at the time of
their introduction, moving the Pentium to the entry level. Identical or more capable
versions of Core processors are also sold as Xeon processors for the server and
workstation markets.
The Intel Core microarchitecture (formerly named Next-Generation Micro-
Architecture) is a multi-core processor microarchitecture unveiled by Intel in Q1
2006. It is based on the Yonah processor design and can be considered an iteration of
the P6 microarchitecture introduced in 1995 with Pentium Pro. High power
consumption and heat intensity, the resulting inability to effectively increase clock
rate, and other shortcomings such as an inefficient pipeline were the primary reasons
why Intel abandoned the NetBurst microarchitecture and switched to a different
architectural design, delivering high efficiency through a small pipeline rather than
high clock rates. The Core microarchitecture initially did not reach the clock rates of
the NetBurst microarchitecture, even after moving to 45 nm lithography.
Advantages of Intel Core (i7):
 A It offers big cache size which is about 8 MB. This helps to increase
instruction execution speed.
 Processor speed is very fast due to combination of turbo boost and hyper
threading technologies.
 It consists of 4 pin connector to control the speed of fan. It provides cooler
running technology for less heat and less noise.
 It can be run at overclocking speed. It is the process by which computer run at
higher clock rate than it is designed for.
 Architecture:

AMD and Intel both uses x86 architecture named as x86 Core “Zen 2”
architecture and Intel Core x86 respectively.

Architecture Diagram
8 general-purpose registers – 32 bits.

Register Name Size (in Purpose


bits)
Main register used in arithmetic calculations. Also known as
AL, AH/AX/EA
8,8/16/32 accumulator, as it holds results of arithmetic operations and function
X return values.
The Base Register. Pointer to data in the DS segment.  Used to store
BL, BH/BX/EBX 8,8/16/32
the base address of the program.
The Counter register is often used to hold a value representing the
CL, CH/CX/ECX 8,8/16/3 number of times a process is to be repeated. Used for loop and string
operations.
DL, DH/DX/ED A general purpose registers. Also used for I/O operations. Helps
8,8/16/32
extend EAX to 64-bits.
X
Source Index register. Pointer to data in the segment pointed to by the
SI/ESI 16/32 DS register.  Used as an offset address in string and array operations.
It holds the address from where to read data.
Destination Index register. Pointer to data (or destination) in the
segment pointed to by the ES register.  Used as an offset address in
DI/EDI 16/32
string and array operations. It holds the implied write address of all
string operations.
Base Pointer. Pointer to data on the stack (in the SS segment).  It
BP/EBP 16/32 points to the bottom of the current stack frame. It is used to reference
local variables.
Stack Pointer (in the SS segment). It points to the top of the current
SP/ESP 16/32
stack frame. It is used to reference local variables.

6 segment registers – 16 bits

Segmen Size
t (bits Purpose
Register )

Code segment register. Base location of


CS 16 code section (.text section). Used for
fetching instructions.

Data segment register. Default location for These registers are used to break up a
16 variables (.data section). Used for data program into parts. As it executes, the
DS segment registers are assigned the
accesses.
base values of each segment. From
Extra segment register. Used during string here, offset values are used to access
16
ES operations. each command in the program.
Stack segment register. Base location of the
stack segment. Used when implicitly using
SS 16
SP or ESP or when explicitly using BP,
EBP.
16 Extra segment register.
FS
16 Extra segment register.
GS

Falgs
Flag Bit Purpose
Carry flag.  Set if an arithmetic operation generate a carry or a borrow out of the most
0 significant bit of the result, cleared otherwise.  This flag indicate an overflow condition
CF
for unsigned integer arithmetic.  It is also used in multiple-precision arithmetic.
Parity flag.  Set if the least-significant byte of the result contains an even number of 1
2
PF bit, cleared otherwise.

AF 4 Adjust flag.  Set if an arithmetic operation generates a carry or a borrow out of bit 3 of
the result, cleared otherwise.  This flag is used in Binary-Coded-Decimal (BCD)
arithmetic.
6 Zero flag.  Set if the result is zero, cleared otherwise.
ZF
Sign flag.  Set equal to the most-significant bit of the result, which is the sign bit of a
7
SF signed integer.  0 indicates a positive value, 1 indicates a negative value.
Overflow flag.  Set if the integer result is too large a positive number or too small a
negative number, excluding the sign bit, to fit in the destination operand, cleared
11
OF otherwise.  This flag indicates an overflow condition for signed-integer that is two’s
complement arithmetic.

Instruction Pointer
Registe
size (bits) Purpose
r
The instruction pointer holds the address of the next instruction to be
IP/EIP 16/32
executed.

 Zen Microarchitecture:

Source: AMD
 Instruction Execution

Source: Intel

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