US010598876B2

United States Patent ( 10 ) Patent No.: US 10,598,876 B2

Hochberg et al. (45 ) Date of Patent: *Mar . 24 , 2020
(54 ) PHOTONIC INTERFACE FOR ELECTRONIC HOIS 5/00 (2006.01)
CIRCUIT GO2B 6/12 ( 2006.01)
GO2B 6/34 (2006.01)
( 71) Applicant: Elenion Technologies , LLC , New York , HOIS 5/026 (2006.01)
NY (US) (52) U.S. CI.
CPC GO2B 6/4243 ( 2013.01 ); G02B 6/12004
(72 ) Inventors: Michael J. Hochberg, New York , NY (2013.01 ); G02B 6/1225 (2013.01 ); G02B
(US ); Ari Jason Novack , New York , 6/34 ( 2013.01) ; G02B 6/423 ( 2013.01 ); G02B
NY (US ); Peter D. Magill, Freehold , 6/428 (2013.01); G02B 6/4224 (2013.01 );
NJ (US) G02B 6/4232 (2013.01 ); G02B 6/4246
(2013.01); GO2B 6/4278 (2013.01); HOIS
(73 ) Assignee : Elenion Technologies , LLC , New York , 570085 (2013.01); HOIS 570261 ( 2013.01) ;
NY (US) GO2B 6/4214 (2013.01 ); GO2B 2006/12142
( 2013.01 )
( * ) Notice : Subject to any disclaimer, the term of this (58 ) Field of Classification Search
patent is extended or adjusted under 35 None
U.S.C. 154 (b ) by 43 days . See application file for complete search history .
This patent is subject to a terminal dis (56 ) References Cited
claimer .
U.S. PATENT DOCUMENTS
(21) Appl. No.: 15 /981,518
9,989,715 B2 * 6/2018 Hochberg GO2B 6/423
( 22 ) Filed : May 16 , 2018 * cited by examiner
(65 ) Prior Publication Data
Primary Examiner Michael Stahl
US 2018/0259730 A1 Sep. 13, 2018 ( 74 ) Attorney, Agent, or Firm — Stratford Managers
Corporation
Related U.S. Application Data
( 57 ) ABSTRACT
(63 ) Continuation of application No. 15 /296,709, filed on
Oct. 18 , 2016 , now Pat. No. 9,989,715 , which is a A photonic interface for an electronic circuit is disclosed .
continuation of application No. 14 /924,172 , filed on The photonic interface includes a photonic integrated circuit
Oct. 27 , 2015, now Pat. No. 9,500,821. having a modulator and a photodetector, and an optical fiber
or fibers for optical communication with another optical
(60 ) Provisional application No. 62/ 141,650 , filed on Apr. circuit . A modulator driver chip may be mounted directly on
1, 2015 , provisional application No.62 / 068,863 , filed the photonic integrated circuit . The optical fibers may be
on Oct. 27, 2014 . placed in v -grooves of a fiber support, which may include at
least one lithographically defined alignment feature for
(51) Int. Ci. optical alignment to the silicon photonic circuit .
GO2B 6/42 (2006.01)
GO2B 6/122 ( 2006.01 ) 20 Claims, 11 Drawing Sheets

109 111
View B 100
162 121 112 164
( 107 122

141 131120 151

170 102

142 132 152 106 110

170
104
160
U.S. Patent Mar. 24 , 2020 Sheet 1 of 11 US 10,598,876 B2

B
r 100
131 120
104 108
102
112

162 111
132
121 122 160
164 FIG . 1A

109 111 100

View B
162 121 112 164
107 122

120 151
141 131
170 102

142 132 152 170 106 110

104
160
FIG . 1B
U.S. Patent Mar. 24 , 2020 Sheet 2 of 11 US 10,598,876 B2

****$*$*****

pomor

.
FIG
2

120

Pomar
U.S. Patent Mar. 24 , 2020 Sheet 3 of 11 US 10,598,876 B2

120
123 170 123
308

1.h1

206 306
256 Z
104

? ?
FIG . 3

404 406
402
109
431
432

470 h2

470
411 412
X ? 104
FIG . 4
U.S. Patent Mar. 24 , 2020 Sheet 4 of 11 US 10,598,876 B2

FIG
5
.

.:

562

799
U.S. Patent Mar. 24 , 2020 Sheet 5 of 11 US 10,598,876 B2

106 799

6
.
FIG
108
568
WWW

566
U.S. Patent Mar. 24 , 2020 Sheet 6 of 11 US 10,598,876 B2

FIG
.
7
564
099

299
Wom
U.S. Patent Mar. 24 , 2020 Sheet 7 of 11 US 10,598,876 B2

mm
Substra e
8
.
FIG

TI
564
U.S. Patent Mar. 24 , 2020 Sheet 8 of 11 US 10,598,876 B2

124 123
142
902
141
006 932

942
931
964
9
.
FIG
964
941 560
108 124
104 123

114

113102
U.S. Patent Mar. 24 , 2020 Sheet 9 of 11 US 10,598,876 B2

1030

10
.
FIG

???
108
.
Substrae
299

566
U.S. Patent Mar. 24 , 2020 Sheet 10 of 11 US 10,598,876 B2

Moduleky 308

11
.
FIG
U.S. Patent Mar. 24 , 2020 Sheet 11 of 11 US 10,598,876 B2

K 1200

Providing the silicon 1202

photonic chip 104

Mounting the modulator 1204

driver 108

Supporting the optical 1206

fibers 131 , 132 in the v
grooves 151, 152

Providing the modulator 1208

signal 121

Modulating the optical 1210

carrier wave 107 with the
modulator signal 121

Detecting the incoming 1212

optical signal 142

FIG . 12
 US 10,598,876 B2
1 2
PHOTONIC INTERFACE FOR ELECTRONIC at least one optical fiber for outputting a first optical
CIRCUIT signal, receiving a second optical signal, or both outputting
the first optical and receiving the second optical signal;
CROSS -REFERENCE TO RELATED a photonic integrated circuit comprising:
APPLICATIONS 5 an optical modulator for modulating an optical carrier
wave with the first electrical signal to provide the first
This application is a continuation of U.S. patent applica optical signal, and a photodetector for providing the second
tion Ser. No. 15/ 296,709, filed Oct. 18, 2016 , now allowed , electric signal in response to the second optical signal; and
which is a continuation of U.S. patent application Ser. No. 10 a fiber support attached to the photonic integrated circuit
14 /924,172, filed Oct. 27 , 2015 , now U.S. Pat. No. 9,500 , and supporting the at least one optical fiber.
821, which claims the benefit of U.S. Provisional Applica In one exemplary embodiment, the fiber support includes
tion No.62/141,650 , filed Apr. 1, 2015 , and U.S. Provisional at least one groove structure supporting the at least one
Application No. 62 /068,863, filed Oct. 27 , 2014 , each of optical fiber. Two or more optical fibers may be provided for
which is hereby incorporated by reference herein in its 15 separately propagating the first and second optical signals.
entirety. At least one of the fiber support and the photonic integrated
circuit may include a lithographically defined registration
TECHNICAL FIELD feature extending between the fiber support and the photonic
integrated circuit for vertical alignment of the fiber support
The present disclosure relates to photonics , and in par- 20 relative to the photonic integrated circuit . In one embodi
ticular to photonic interfaces for electronic circuits . ment, a modulator driver chip is mounted on the photonic
BACKGROUND
integrated circuit and electrically coupled to the photonic
integrated circuit for driving the optical modulator. An
optical gain chip , such as a semiconductor optical amplifier
Computer systemsincreasingly rely on faster data transfer 25 (SOA ) chip ,may be attached to the silicon photonic chip and
between individual microelectronic circuits . Recently, sili optically coupled to the optical modulator for providing the
con microelectronic circuits have become available with optical carrier wave, or for amplifying an optical carrier
tens to hundreds of input and output channels operating at wave. At least one of the optical gain chip and the photonic
speeds exceeding 10 gigabits per second each . These may integrated circuit may include a lithographically defined
include FPGAs, CPUs, and digital switching fabric chips, in 30 registration feature extending between the optical gain and
particular. Considerable electrical power may be required to the photonic integrated circuit for vertical and , optionally,
drive individual input/output channels , in particular in situ horizontal alignment of the optical gain chip relative to the
ations where the channels include long printed circuit board photonic integrated circuit .
traces and/or long cables. A substrate may be provided . The photonic integrated
Recent advances in silicon photonics enable the use of 35 circuitmay be attached to the substrate e.g. with a plurality
optical interconnects between electronic circuits . Optical of microball or microbump contacts for contacting the first
interconnects can support very high data transfer rates . and second electrical ports. Alternatively, the photonic inte
grated circuit may be attached mechanically to the substrate
Individual optical channels are currently be modulated at with
rates reaching 40 gigabits per second and higher. Wave 40 bondssolder to the
or epoxy and attached electrically with wire
first and second electrical ports .
length division multiplexing (WDM ) may be used to provide In accordance with the disclosure , there is further pro
multiple wavelength channels in a single optical fiber, and a vided a method for
plurality of optical fibers may be used to provide even more electronic circuit , theproviding method
a photonic interface for an
comprising :
bandwidth . providing a photonic integrated circuit comprising an
Optical interconnects must provide, for each wavelength 45 opticalmodulator and a photodetector;
channel, modulation and electro -optical conversion at the supporting at least one optical fiber in a fiber support
transmitter end and demodulation and optoelectronic data attached to the photonic integrated circuit , wherein the at
conversion at the receiver end of a communication link . To least one optical fiber is configured for outputting a first
provide this functionality prior to this invention , an optical optical signal , receiving a second optical signal, or both
interconnect may require multiple separate devices such as 50 outputting the first optical and receiving the second optical
modulators , detectors , drivers , lasers , etc. The resulting signal;
optical interconnects are often bulky, complex , costly, and receiving a first electrical signal from the electronic
may draw considerable amounts of electrical energy to circuit , and providing the first electrical signal to the modu
operate , negating many advantages of optical interconnects. lator ;
Furthermore , as with many fiber- based optical devices, 55 modulating an optical carrier wave with the first electrical
active alignment of optical fibers may be required . Active signal to provide the first optical signal; and
optical alignment is time-consuming, and therefore expen detecting the second optical signal with the photodetector,
sive in mass production . to provide a second electric signal, and coupling the second
electrical signal to the electronic circuit.
SUMMARY 60 The fiber support and /or the optical gain chip may be
aligned relative to the silicon photonic chip using at least one
In accordance with an aspect of the disclosure, there is lithographically defined hard stop .
provided a photonic interface assembly for an electronic
circuit, the photonic interface assembly comprising : BRIEF DESCRIPTION OF THE DRAWINGS
a first electrical port for receiving a first electrical signal 65
from the electronic circuit , and a second electrical port for Exemplary embodiments will now be described in con
coupling a second electrical signal to the electronic circuit ; junction with the drawings, in which :
 US 10,598,876 B2
3 4
FIG . 1A is a schematic side view of a photonic interface in opposite directions. More generally , at least one optical
assembly of the present disclosure ; fiber may be provided for outputting the first optical signal
FIG . 1B is a schematic plan view of the photonic interface 141, receiving the second optical signal 142 , or for both
assembly of FIG . 1A ; outputting the first optical signal 141 and receiving the
FIG . 2 is a three-dimensional view of a fiber support 5 second optical signal 142. When two optical fibers 131 and
attached to a silicon photonic chip ; 132 are provided , the first optical fiber 131 may be used for
FIG . 3 is a schematic side cross -sectional view of the fiber outputting the first optical signal 141 , and the second optical
support of FIG . 2 showing registration features for passive fiber 132 may be used for receiving the second optical signal
alignment; 142 , as shown in FIGS. 1A and 1B . In one embodiment, each
FIG . 4 is a schematic side cross-sectional view of an SOA 10 one of the first 131 and second 132 optical fibers may be
chip mounted and vertically aligned to a silicon photonic used for bidirectional propagation of optical signals therein .
chip by means of registration features ; More than two, e.g. four, eight, or more optical fibers may
FIG . 5 is a schematic side cross - sectional view of the be provided, as required , each of which may be used for
photonic interface assembly of FIGS. 1A and 1B including bidirectional or unidirectional propagation of optical signals .
an externally mounted SOA chip on a substrate ; 15 The photonic interface assembly 100 further includes a
FIG . 6 is a schematic side cross - sectional view of the photonic integrated circuit , e.g. a silicon photonic chip 104
photonic interface assembly of FIGS. 1A and 1B including having an optical modulator 106 for modulating an optical
an SOA chip sunk into the silicon photonic chip ; carrier wave 107 with the first electrical signal 121 to
FIG . 7 is a schematic side cross -sectional view of the provide the first optical signal 141, and a photodetector 110
photonic interface assembly of FIGS. 1A and 1B including 20 for receiving the second optical signal 142. The photode
an SOA chip evanescently coupled to the modulator; tector 110 may be optically coupled to the second optical
FIG . 8 is a schematic side cross - sectional view of the fiber 132. In operation , the photodetector 110 provides the
photonic interface assembly of FIGS. 1A and 1B including second electric signal 122 in response to the second optical
an electronic interposer chip ; signal 142. In the case of bidirectional communication over
FIG . 9 is a schematic side cross -sectional view of the 25 the first optical fiber 131 ,both the opticalmodulator 106 and
photonic interface assembly of FIGS. 1A and 1B including the photodetector 110 are optically coupled to the optical
optical fibers directly attached to the silicon photonic chip , fiber 131. A preamplifier e.g. a transimpedance amplifier , not
and an arrayed connector for electrical coupling to an shown , may be used to amplify the second electrical signal
external electronic device ; 122 .
FIG . 10 is a schematic side cross - sectional view of the 30 The silicon photonic chip 104 may be supported by an
photonic interface assembly of FIGS. 1A and 1B including optional substrate 160 , such as a printed circuit board (PCB ),
a free- space optically coupled silicon photonic chip ; a multi-layer ceramic carrier, etc. The silicon photonic chip
FIG . 11 is a schematic side cross - sectional view of the 104 may be electrically coupled to the substrate 160 via a
photonic interface assembly of FIGS . 1A and 1B including plurality ofmicroball or microbump contacts 162 , which are
an SOA chip disposed between the substrate and the silicon 35 electrically coupled to the electronic circuit 102 by traces
photonic chip ; and 164 on or within the substrate 160. Wirebonds , not shown,
FIG . 12 is a flow chart of a method for providing a may also be used for this purpose . The silicon photonic chip
photonic interface for an electronic circuit according to the 104 may further include other waveguide -based optical
present disclosure . devices for processing of the first 141 and/or second 142
40 optical signals, such as an optical filter e.g. a ring waveguide
DETAILED DESCRIPTION filter, an optical switch including a wavelength -selective
switch , a wavelength division multiplexor such as arrayed
While the present teachings are described in conjunction waveguide grating (AWG ) or others, a polarization multi
with various embodiments and examples, it is not intended plexor, etc. The silicon photonic chip 104 may include a
that the present teachings be limited to such embodiments. 45 plurality of optical modulators 106 and a plurality of pho
On the contrary, the present teachings encompass various todetectors 110 formulti -channel operation . The plurality of
alternatives and equivalents , as will be appreciated by those communication channels may include one or more of mul
of skill in the art. tiple communication wavelengths and multiple optical
Referring to FIGS. 1A and 1B , a photonic interface fibers. The substrate 160 may support a plurality of one
assembly 100 for an electronic circuit 102 may provide 50 photonic chips 104 , each of which may contain the elements
optical communication with an external device (not shown ) for communication over one or more of multiple commu
such as another photonic interface assembly , a transceiver, nication wavelengths and multiple optical fibers .
etc. For the purposes of communication with the electronic The optical carrier wave 107 may be provided by an
circuit 102 , the photonic interface assembly 100 may optional optical gain chip , e.g. a SOA chip 109 attached to
include a first electrical port 111 for receiving a first elec- 55 the silicon photonic chip 104 and optically coupled to the
trical signal 121 from the electronic circuit 102 , and a optical modulator 106. The optical gain /SOA chip 109 may
second electrical port 112 for coupling a second electrical be used as an optical gain medium in a laser for generating
signal 122 to the electronic circuit 102. The first 111 and the optical carrier wave 107. The optical carrier wave 107
second 112 electrical ports may include, for example , may also be externally generated , with or without amplifi
microball or microbump electrical contacts or wirebonds. 60 cation by the SOA chip 109. A modulator driver chip 108
For optical communication with the external device , a first (FIG . 1A , omitted in FIG . 1B to show the underlying
131 and a second 132 optical fibers may be provided . The structure ) may be provided . The modulator driver chip 108
first optical fiber 131 may output a first optical signal 141 may be attached to the silicon photonic chip 104 and
(FIG . 1B ) to the external device , and the second optical fiber electrically coupled to the silicon photonic chip 104 , e.g.
132 may receive a second optical signal 142 from the 65 with microball or microbump contacts or wirebonds, for
external device . A single optical fiber might be used for driving the optical modulator 106 for providing modulation
propagating both the first 141 and second 142 optical signal of the optical carrier wave 107 in dependence on the first
 US 10,598,876 B2
5 6
electrical signal 121. The optical modulator 106 may be chip 104 are preferably shorter than the height hy. The
optically coupled to the first optical fiber 131 for outputting position of the registration feature 170 in the horizontal
the first optical signal 141. The silicon photonic chip 104 x -direction may be very accurately determined by litho
may support a plurality of gain chips/SOAs 109. Each gain graphically etched recesses in the silicon photonic chip 104 .
chip /SOA 109 may include a plurality of waveguides each of 5 Therefore, the position of the optical fiber 206 (and ,
which would be used to produce a different optical carrier therefore , the core 306 ) may be defined with high precision ,
wave 107. In another embodiment, the first electrical signal potentially enabling passive placement of the fiber support
121 may directly modulate the source of the optical carrier 120 in the x -direction and /or the vertical z -direction perpen
wave 107 by modulating the current injected into the gain dicular to the silicon photonic chip 104 , that is, perpendicu
chip /SOA 109 , creating the first optical signal 141 without 10 lar to the plane of the deposited layers on the silicon
the use of an opticalmodulator 106. In yet another embodi photonic chip 104. The required accuracy in the y -direction
ment, the optical modulator 106 may be integrated in the is typically less than in the x- and z -directions, and may be
gain chip /SOA 109 . provided without requiring active optical alignment, for
For ease of assembly, a fiber support 120 may be pro example using a pick -and-place machine, not shown.
vided . The fiber support 120 supports the first 131 and the 15 The positioning of the first optical fiber 131 in the narrow
second 132 optical fiber and may include first 151 and section 256 enables a passive optical alignment with wave
second 152 v -grooves for supporting the first 131 and guide 308 of the silicon photonic chip 104. The silicon
second 132 optical fibers, respectively . The fiber support 120 photonic chip 104 may also include a similar registration
may be attached to the silicon photonic chip 104. In a feature or features extending in the z -direction towards the
preferred embodiment, the fiber support 120 may include at 20 fiber support 120. More generally , at least one of the fiber
least one lithographically defined registration feature 170 support 120 and the silicon photonic chip 104 may include
(six are shown in FIG . 1B ) extending towards the silicon at least one lithographically defined registration feature
photonic chip 104 for precise vertical alignment of the fiber extending between the fiber support 120 and the silicon
support 120 relative to the silicon photonic chip 104. Herein , photonic chip 104 for vertical, that is , z -direction , alignment
the term “ vertical” means perpendicular to a plane of the 25 of the fiber support 120 relative to the silicon photonic chip
silicon photonic chip 104 , that is, to a plane parallel to thin 104 and optionally for alignment in the x -direction which is
film layers of the silicon photonic chip 104. In one embodi in the plane of the deposited layers on the silicon photonic
ment, the registration feature 170 includes a dielectric or chip 104. To that end , the registration feature 170 may be
semiconductor hard stop . The fiber support 120 may be implemented as a dielectric or semiconductor hard stop
attached to the silicon photonic chip 104 by a solder joint, 30 having an edge parallel to YZ- plane , that is , the plane of
not shown, disposed adjacent the registration feature 170 . FIG . 3, for horizontal alignment of the fiber support 120 in
The first 151 and second 152 v -grooves may be replaced the x -direction relative to the silicon photonic chip 104.
with a single v - groove , and the first 131 and second 132 The mounting of the optional SOA chip 109 on the silicon
optical fibers may be replaced with a single optical fiber for photonic chip 104 is illustrated in FIG . 4. In the embodiment
bidirectional propagation of the first 141 and second 142 35 shown in FIG . 4 , the SOA chip 109 includes a lower
optical signals in the single optical fiber. The photonic cladding layer 402, a core layer 404 , an upper cladding layer
interface assembly 100 may include a plurality of fiber 406 , and at least one lithographically defined registration
supports 120 , each of which may support a plurality of feature , such as semiconductor or dielectric hard stop 470 .
optical fibers 131 . The hard stops 470 extend towards the silicon photonic chip
The attachment of optical fibers to the photonic interface 40 104 for vertical alignment of the SOA chip 109 relative to
assembly 100 is further illustrated in FIG . 2 , which is shown the silicon photonic chip 104. Height hy of the registration
inverted as compared to FIG . 1. Only the first optical fiber features 470 is determined by deposited layer thickness, and
131 is shown for brevity . The first optical fiber 131 may may be very precise . The silicon photonic chip 104 may
include a fiber jacket 202 surrounding a layer of polymer include optional registration features for positioning against
coatings 204 , which protects a glass fiber 206. V - grooves 45 a horizontal edge of the hard stops 470 extending in the
250 of the fiber support 120 may include wide sections 254 x -direction . Accordingly , the position of the core layer 404
for accommodating the coatings 204 , and narrow sections of the SOA chip 109 may be defined with a high precision
256 for supporting the fiber 206. Other groove shapes, e.g. in at least one of, and preferably both n- and x -directions,
a U -shape, rectangular, etc., may be used . enabling passive placement of the SOA chip 109 in a critical
The mounting of the fiber support 120 on the silicon 50 vertical z -direction perpendicular to the silicon photonic
photonic chip 104 is further illustrated in FIG . 3. The narrow chip 104 , as well as in x -direction as shown in FIG . 4. The
V -groove sections 256 may be precision micromachined , or required accuracy in the y -direction is typically less than in
otherwise formed for example using a KOH etch of crystal the z- and x -directions, and may be provided without requir
facets, by wet etching, by dry etching, and the like. The ing active optical alignment, for example using a pick -and
narrow v - groove sections 256 may be v -shaped , u -shaped , or 55 place machine, not shown.More generally , at least one of
have another shape in cross -section , as long as the narrow the SOA chip 109 and the silicon photonic chip 104 may
groove sections 256 hold the first optical fiber 131 in place include a lithographically defined registration feature
at a well -defined location on the fiber support 120. The extending between the SOA chip 109 and the silicon pho
registration feature 170 may be obtained e.g. by growth of tonic chip 104 for at least one of z- or x -direction alignment
a dielectric or semiconductor to a precisely defined thickness 60 of the SOA chip 109 relative to the silicon photonic chip
and then formed lithographically by etching recesses 123 in 104. In the embodiment shown in FIG . 4 , the silicon
the fiber support 120 ,to match optional registration features, photonic chip 104 includes electrical contacts 411 and 412
not shown, lithographically etched in the silicon photonic electrically attached to the lower 402 and upper 406 clad
chip 104. Height h , of the registration feature 170 is deter ding layers of the SOA chip 109 by respective solder joints
mined by deposited layer thickness and , as such , may be 65 431 and 432 optionally disposed adjacent to the hard stops
very precise, e.g. to a thickness of 0.01 micrometer or better. 470. In other words , the hard stops 470 function as align
The optional registration features in the silicon photonic ment features allowing a passive sub-micron alignment of
 US 10,598,876 B2
7 8
the SOA chip 109 in at least one of the horizontal and demodulator circuitry , etc. There may be a plurality of
vertical directions, while the solder joints 431 and 432 electronic interposer chips 804 mounted on the substrate
function both as electrical coupling and mechanical attach 560 .
mentmeans for connecting the SOA chip 109 to the silicon Referring now to FIG . 9 , a photonic interface assembly
photonic chip 104. 5 900 is a variant of the photonic interface assembly 100 of
Various exemplary embodiments of the photonic interface FIG FIGS. 1A and 1B . The photonic interface assembly 900 of
assembly 100 of FIGS. 1A and 1B will now be considered . optically . 9 may include an angle-polished first optical fiber 931
Referring to FIG . 5 , a photonic interface assembly 500 grating coupler coupled to the silicon photonic chip 104 by a
includes a substrate 560, the silicon photonic chip 104 , 10 141, and the second
and 941 for outputting the first optical signal
the SOA chip 109 connected to the substrate 560 with a silicon photonic chipoptical fiber 932 optically coupled to the
plurality of microball or microbump contacts 562. For receiving the second optical by 104 an edge coupler 942 for
providing the optical carrier wave 107 , the SOA chip 109 is ment a photonic interface assembly 142.
signal
900
In another embodi
may include the first
optically coupled to the waveguide 571 that in turn is optical fiber 931 optically coupled to the silicon
optically coupled to the optical modulator 106. In another 15 chip 104 by the grating coupler 941 for receiving thephotonic
second
embodiment, a hybrid lasermay be assembled from the SOA optical signal 142, and the second optical fiber 932 optically
chip 109 and partially reflective optical elements (not coupled to the silicon photonic chip 104 by the edge coupler
shown) on the silicon photonic chip 104. The optical carrier 942 for outputting the first optical signal 141. Other embodi
wave 107 output from the partially reflective optical ele ments may use only grating couplers , while still other
ments is optically coupled to a waveguide 571 that in turn is 20 embodiments may use only edge couplers .
optically coupled to the opticalmodulator 106. An electrical The photonic interface assembly 900 may further include
preamplifier chip 566 , for example a bipolar transimpedance a third electrical port 113 on the substrate 560 for receiving
amplifier ( TIA ), may be connected to the silicon photonic a third electrical signal 123 from the electronic circuit 102 ,
chip 104 with microball or microbump contacts 562 and and a fourth electrical port 114 on the substrate 560 for
electrically coupled to the photodetector 110 for amplifying 25 sending a fourth electrical signal 124 to the electronic circuit
the second electrical signal 122 (FIG . 1B ) provided by the 102. An arrayed electrical connector 902 may be attached to
photodetector 110. The modulator driver 108 may be con the substrate 560 and electrically coupled to the third 113
nected to the silicon photonic chip 104 with microball or and fourth 114 electrical ports by electrical traces 964 for
microbump contacts 562 and electrically coupled to the connection to an external electronic unit , not shown. Thus,
modulator 106 for modulating an optical carrier wave 107 30 and /communication
the withhostthe, may
or another remote external unit, e.g. another
be performed by meansPCBof
with the first electrical signal 121 (FIG . 1B ). The electrical both the first 141 and second 142 optical signals, and /or third
preamplifier chip 566 and the modulator driver 108 may be 123 and fourth 124 electrical signals , which may provide a
combined in a single electronic chip . The necessary electri greater flexibility of communication .
cal connections between various components may be pro Turning to FIG . 10 , a photonic interface assembly 1000 is
35
vided by traces 564 ( FIG . 5 ) and metal pillars 568. Alter a free -space coupled variant of the photonic interface assem
natively, the necessary electrical connections between bly 600 of FIG . 6. The photonic interface assembly 1000 of
various components may be provided by wirebonds. Exter FIG . 10 includes a hermetic package 1002 for hermetically
nal contacts 570 may be provided for mounting an electrical enclosing the silicon photonic chip 104 , the optical modu
connector, not shown. 40 lator 106 , the modulator driver 108 , the SOA chip 109 , and
Turning to FIG . 6 , a photonic interface assembly 600 is a the electrical preamplifier 566. The photonic interface
variant of the photonic interface assembly 500 of FIG . 5 . assembly 1000 may further include lenses 1030 and a
The photonic interface assembly 600 of FIG . 6 has the window 1040 for transmission of the first 141 and second
electrical preamplifier chip 566 attached to the substrate 560 142 optical signals across the hermetic package 1002.Exter
with a plurality of microball or microbump contacts 562. 45 nal contacts 570 may be provided on a bottom side of the
Another distinction of the photonic interface assembly 600 substrate 560. The window 1040 may be constructed from
is that the SOA chip 109 is sunk into the silicon photonic one of the lenses 1030. The free- space coupling optics
chip 104. Alternatively, the electrical preamplifier chip 566 comprising one ormore lenses 1030 and an optionalwindow
could be attached to the substrate 560 with one of eutectic 1040 may be used to convey a single optical signal 141 or
bonding, soldering , epoxy or other attachment mechanisms. 50 multiple optical signals 141, 142, etc.
The electrical connections from electrical preamplifier chip Referring to FIG . 11 , a photonic interface assembly 1100
566 to photodetector 110 on the silicon photonic chip 104 is another variant of the photonic interface assembly 100 of
could be via wirebonds. FIG . 1. The SOA chip 109 of the photonic interface assem
Referring to FIG . 7 , a photonic interface assembly 700 is bly 1100 of FIG . 11 is disposed between the substrate 560
a variant of the photonic interface assembly 600 of FIG . 6. 55 and the silicon photonic chip 104 and is evanescently
The photonic interface assembly 700 of FIG . 7 has the SOA coupled to the waveguide 308 of the silicon photonic chip
chip 109 disposed for evanescent optical coupling to the 104. Alternatively, the SOA chip 109 may be disposed
waveguide 308 of the optical modulator 106 for providing between the fiber support 120 ( not shown in FIG . 11 ) and the
the optical carrier wave 107 to the optical modulator 106 . silicon photonic chip 104.
Turning to FIG . 8, a photonic interface assembly 800 is a 60 Turning to FIG . 12 , a method 1200 for providing a
variant of the photonic interface assembly 100 of FIGS . 1A photonic interface for an electronic circuit, such as the
and 1B . The photonic interface assembly 800 of FIG . 8 electronic circuit 102 of FIGS. 1A and 1B , may include a
includes an electronic interposer chip 804 disposed between step 1202 of providing the silicon photonic chip 104 having
the silicon photonic chip 104 and the substrate 560. The the optical modulator 106 and the photodetector 110. In an
electronic interposer chip 804 may include circuitry required 65 optional next step 1204 , the modulator driver chip 108 is
for operation of various components of the silicon photonic attached to the silicon photonic chip 104 , and electrically
chip 104 , such as a driver of the optical modulator 106 , coupled e.g. by microball or microbump contacts , and /or
 US 10,598,876 B2
9 10
copper pillars, to the optical modulator 106 for driving the photonic circuit of another type, including without limita
opticalmodulator 108. In a next step 1206 , the first optical tion , indium -phosphide ( InP ), gallium - arsenide (GaAs),
fiber 131 supported in the first v -groove 151 of the fiber silica (SiO2), and others. All of the exemplary embodiment
support 120 is attached to the silicon photonic chip 104, so disclosed herein can be used in any of these integrated
that the first optical fiber 131 is optically coupled to the 5 photonic circuits as well. Furthermore, it is to be understood
optical modulator 106 ; and the second optical fiber 132 is that the SOA chip 109 is only one possible example of an
supported in the second v -groove 152 of the fiber support optical gain chip .
120 , so that the second optical fiber 132 is optically coupled The present disclosure is not to be limited in scope by the
to the photodetector 110. As explained above , a single specific embodiments described herein . Indeed , other vari
optical fiber may be used for bidirectional propagation of the 10 ous embodiments and modifications , in addition to those
first 141 and second 142 optical signals. In a step 1208, the described herein , will be apparent to those of ordinary skill
first electrical signal 121 is received from the electronic in the art from the foregoing description and accompanying
circuit 102 and is provided to the modulator driver 108 . drawings . Thus, such other embodiments and modifications
In a next step 1210 , the optical carrier wave 107 is are intended to fall within the scope of the present disclo
modulated with the first electrical signal 121 to provide the 15 sure. Further, although the present disclosure has been
first optical signal 141 , which is coupled to the first optical described herein in the context of a particular implementa
fiber 131 for propagating the first optical signal 141 in the tion in a particular environment for a particular purpose ,
first optical fiber 131. Finally in a last step 1212 , the second those of ordinary skill in the art will recognize that its
optical signal 142 propagating in the second optical fiber usefulness is not limited thereto and that the present disclo
132 is detected with the photodetector 110 to provide the 20 sure may be beneficially implemented in any number of
second electric signal 122, which is then coupled to the environments for any number of purposes. Accordingly, the
electronic circuit 102 . claims set forth below should be construed in view of the full
In one embodiment of the method 1200, the step 1206 of breadth and spirit of the present disclosure as described
supporting the first 131 and second 132 optical fibers herein .
includes vertically aligning the fiber support 120 relative to 25
the silicon photonic chip 104 using the registration features What is claimed is :
170 extending between the fiber support 120 and the silicon 1. A photonic interface assembly for providing commu
photonic chip 104. The registration features 170 may be nication between an optical fiber and an electronic circuit on
lithographically defined the fiber support 120 , the silicon a substrate including : a first port, and a first electrical
photonic chip 104 , or both as explained above, to optically 30 connection electrically connected to the first port for elec
couple the optical modulator 106 to the first optical fiber trically connecting to the electronic circuit; the photonic
131 , and to optically couple the photodetector 110 to the interface assembly comprising:
second optical fiber 132. More generally , the alignment, a photonic integrated circuit for mounting on the substrate
which may include both vertical and horizontal alignment, comprising:
may be performed by bringing a dielectric or semiconductor 35 an optical port for optically coupling to the optical fiber
hard stop lithographically defined in one of the fiber support for outputting a first optical signal;
120 and the silicon photonic chip 104 , in physical contact a second electrical connection electrically connected to
with the other of the fiber support 120 and the silicon the first port for receiving a first electrical signal
photonic chip 104. The SOA chip 109 may be aligned from the electronic circuit; and
relative to the silicon photonic chip 104 by bringing a 40 at least one of a laser and an optical modulator for
dielectric or semiconductor hard stop lithographically modulating an optical carrier wave with the first
defined in one of the SOA chip 109 and the silicon photonic electrical signal to provide the first optical signal;
chip 104 in physical contact with the other of the SOA chip and
109 and the silicon photonic chip 104. a fiber support for optically aligning the optical fiber with
Referring again to FIG . 12 , now with reference to FIG . 45 the optical port.
1A , FIG . 5 , and FIG . 9 , the preamplifier chip 566 may be 2. The photonic interface assembly of claim 1, wherein
mounted and electrically coupled a to the silicon photonic the photonic integrated circuit comprises a silicon photonic
chip 104 with microball or microbump contacts 562 ( FIG . chip .
5 ), and /or with wirebonds, not shown, and the second 3. The photonic interface assembly of claim 1 , wherein
electrical signal 121 provided by the photodetector 110 may 50 the fiber support includes at least one groove of holding the
be amplified by the preamplifier chip 566. The silicon optical fiber in a pre -defined location.
photonic chip 104 may be attached to the substrate 560 with 4. The photonic interface assembly of claim 3, wherein at
the plurality of microball or microbump contacts 562 for least one of the fiber support and the photonic integrated
contacting the first 111 and second 112 electrical ports (FIG . circuit comprises a first registration feature for alignment of
1A ). In one embodiment, the third electrical port 113 (FIG . 55 the fiber support relative to the photonic integrated circuit .
9 ) may be provided for receiving the third electrical signal 5. The photonic interface assembly of claim 4 , wherein at
123 from the electronic circuit 102 , and the fourth electrical least one of the fiber support and the photonic integrated
port 114 may be provided for sending the fourth electrical circuit comprises a second registration feature comprising a
signal 124 to the electronic circuit 102. To provide a suitable dielectric or semiconductor hard stop extending between the
electrical interface, the arrayed electrical connector 902 may 60 fiber support and the photonic integrated circuit for align
be attached to the substrate 560 and electrically coupled to ment of the fiber support relative to the photonic integrated
the third 113 and fourth 114 electrical ports for connection circuit in a z -direction .
to an external electronic unit, not shown. 6. The photonic interface assembly of claim 1, further
It is to be understood that the silicon photonic chip 104 is comprising a modulator driver chip mounted on the photonic
only one possible example of an integrated photonic circuit. 65 integrated circuit electrically connected to the opticalmodu
Accordingly, the silicon photonic chip 104 may be replaced lator and the electronic circuit for driving the optical modu
in any embodiment described above with an integrated lator.
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11 12
7. The photonic interface assembly of claim 6 , wherein photodetector and the electronic circuit for amplifying the
the laser comprises an SOA chip mounted on the photonic second electrical signal provided by the photodetector.
integrated circuit, and optically coupled to a partially reflec 15. A photonic interface assembly for providing commu
tive optical element on the photonic integrated circuit for nication between an optical fiber and an electronic circuit on
providing or amplifying the optical carrier wave. 5 a substrate including : a first port , and a first electrical
8. The photonic interface assembly of claim 6 , further connection electrically connected to the first port for elec
comprising an electronic interposer chip , including the trically connecting to the electronic circuit ; the photonic
modulator driver , mounted in between the photonic inte interface assembly comprising:
grated circuit and the substrate . a photonic integrated circuit for mounting on the substrate
9. The photonic interface assembly of claim 1, wherein 10 comprising :
the laser comprises an SOA chip mounted on the photonic an optical port for optically coupling to the optical fiber
integrated circuit, and optically coupled to a partially reflec for receiving a first optical signal;
tive optical element on the photonic integrated circuit for a photodetector for providing a first electrical signal in
providing or amplifying the optical carrier wave. response to the first optical signal; and
10. The photonic interface assembly of claim 9 , wherein 15 a second electrical connection electrically connected to
at least one of the SOA chip and the photonic integrated the first port for coupling the first electrical signal to
circuit comprises a registration feature comprising a dielec the electronic circuit ; and
tric or semiconductor hard stop extending between the SOA a fiber support for optically aligning the optical fiber with
chip and the photonic integrated circuit for alignment of the the optical port.
SOA chip relative to the photonic integrated circuit. 20 16. The photonic interface assembly of claim 15 , wherein
11. The photonic interface assembly of claim 9 , wherein the photonic integrated circuit comprises a silicon photonic
the SOA chip is sunk into the photonic integrated circuit. chip17. The photonic interface assembly of claim 15 , wherein
12. The photonic interface assembly of claim 1 , further the fiber support includes at least one groove of holding the
comprising an optical gain chip mounted between the pho 25 optical fiber in a pre -defined location .
tonic integrated circuit and the substrate, and evanescently 18. The photonic interface assembly of claim 15 , wherein
optically coupled to the optical modulator for providing the at least one of the fiber support and the photonic integrated
optical carrier wave . circuit comprises a first registration feature for alignment of
13. The photonic interface assembly of claim 1, wherein
the substrate includes a second port, and a third electrical the19.fiberThesupport relative to the photonic integrated circuit .
photonic interface assembly of claim 18 , wherein
connection electrically connected to the second port for 30 at least one of the fiber support and the photonic integrated
electrically connecting to the electronic circuit;
wherein the optical port is also for for receiving a second circuit comprises a second registration feature comprising a
optical signal; dielectric or semiconductor hard stop extending between the
fiber support and the photonic integrated circuit for align
wherein the photonic integrated circuit further comprises : 35 ment
a photodetector for providing a second electrical signal circuitofinthea zfiber support relative to the photonic integrated
- direction .
in response to the second optical signal; 20. The photonic interface assembly of claim 15, further
a fourth electrical connection electrically connected to comprising an electrical preamplifier chip mounted on the
the second port for coupling a second electrical photonic integrated circuit, electrically connected to the
signal to the electronic circuit .
14. The photonic interface assembly of claim 13, further 40 photodetector
first electrical and
signaltheprovided
electronicby circuit for amplifying
the photodetector . the
comprising an electrical preamplifier chip mounted on the
photonic integrated circuit, electrically connected to the