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1SMB5.0AT3 Series 600 Watt Peak Power Zener Transient Voltage Suppressors

The document provides specifications for the SMB series transient voltage suppressor devices. It describes key features such as peak power rating, voltage and current ratings, response time, and mechanical characteristics like package type and dimensions.

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0% found this document useful (0 votes)
67 views8 pages

1SMB5.0AT3 Series 600 Watt Peak Power Zener Transient Voltage Suppressors

The document provides specifications for the SMB series transient voltage suppressor devices. It describes key features such as peak power rating, voltage and current ratings, response time, and mechanical characteristics like package type and dimensions.

Uploaded by

edgardo
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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1SMB5.

0AT3 Series

600 Watt Peak Power Zener


Transient Voltage
Suppressors
Unidirectional*
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The SMB series is designed to protect voltage sensitive
components from high voltage, high energy transients. They have
excellent clamping capability, high surge capability, low zener PLASTIC SURFACE MOUNT
impedance and fast response time. The SMB series is supplied in ZENER OVERVOLTAGE
ON Semiconductor’s exclusive, cost-effective, highly reliable TRANSIENT SUPPRESSORS
Surmetic package and is ideally suited for use in communication
systems, automotive, numerical controls, process controls, medical 5.0 V − 170 V,
equipment, business machines, power supplies and many other 600 W PEAK POWER
industrial/consumer applications.
Specification Features
• Working Peak Reverse Voltage Range − 5.0 V to 170 V Cathode Anode
• Standard Zener Breakdown Voltage Range − 6.7 V to 199 V
• Peak Power − 600 W @ 1.0 ms
• ESD Rating of Class 3 (>16 kV) per Human Body Model
• Maximum Clamp Voltage @ Peak Pulse Current
• Low Leakage < 5.0 A Above 10 V
SMB
• UL 497B for Isolated Loop Circuit Protection CASE 403A
• Response Time is Typically < 1.0 ns PLASTIC
• Pb−Free Packages are Available
Mechanical Characteristics
MARKING DIAGRAM
CASE: Void-free, transfer-molded, thermosetting plastic
FINISH: All external surfaces are corrosion resistant and leads are
readily solderable YWW
xx
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
260°C for 10 Seconds
LEADS: Modified L−Bend providing more contact area to bond pads Y = Year
WW = Work Week
POLARITY: Cathode indicated by polarity band xx = Specific Device Code
MOUNTING POSITION: Any = (See Table Page 3)
*Please see 1SMB10CAT3 to 1SMB78CAT3 for Bidirectional devices.

ORDERING INFORMATION

Device Package Shipping†

1SMBxxxAT3 SMB 2500/Tape & Reel


1SMBxxxAT3G SMB 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.

Individual devices are listed on page 3 of this data sheet.

 Semiconductor Components Industries, LLC, 2004 1 Publication Order Number:


May, 2004 − Rev. 7 1SMB5.0AT3/D
1SMB5.0AT3 Series

MAXIMUM RATINGS
Rating Symbol Value Unit
Peak Power Dissipation (Note 1) @ TL = 25°C, Pulse Width = 1 ms PPK 600 W
DC Power Dissipation @ TL = 75°C PD 3.0 W
Measured Zero Lead Length (Note 2)
Derate Above 75°C 40 mW/°C
Thermal Resistance from Junction−to−Lead RJL 25 °C/W
DC Power Dissipation (Note 3) @ TA = 25°C PD 0.55 W
Derate Above 25°C 4.4 mW/°C
Thermal Resistance from Junction−to−Ambient RJA 226 °C/W
Forward Surge Current (Note 4) @ TA = 25°C IFSM 100 A
Operating and Storage Temperature Range TJ, Tstg −65 to +150 °C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 10 X 1000 s, non−repetitive
2. 1″ square copper pad, FR−4 board
3. FR−4 board, using ON Semiconductor minimum recommended footprint, as shown in 403A case outline dimensions spec.
4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.

ELECTRICAL CHARACTERISTICS (TA = 25°C unless I


otherwise noted, VF = 3.5 V Max. @ IF (Note 5) = 30 A)
IF
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
VC Clamping Voltage @ IPP
VRWM Working Peak Reverse Voltage VC VBR VRWM
V
IR VF
IR Maximum Reverse Leakage Current @ VRWM IT
VBR Breakdown Voltage @ IT
IT Test Current
IF Forward Current IPP
VF Forward Voltage @ IF
5. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, Uni−Directional TVS
non−repetitive duty cycle.

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1SMB5.0AT3 Series

ELECTRICAL CHARACTERISTICS (Devices listed in bold, italic are ON Semiconductor Preferred devices.)
Breakdown Voltage VC @ IPP (Note 8)
VRWM
(Note 6) IR @ VRWM VBR (Note 7) Volts @ IT VC IPP
Device
Device Marking Volts A Min Nom Max mA Volts Amps
1SMB5.0AT3 KE 5.0 800 6.40 6.7 7.0 10 9.2 65.2
1SMB6.0AT3, G* KG 6.0 800 6.67 7.02 7.37 10 10.3 58.3
1SMB6.5AT3 KK 6.5 500 7.22 7.6 7.98 10 11.2 53.6
1SMB7.0AT3 KM 7.0 500 7.78 8.19 8.6 10 12.0 50.0
1SMB7.5AT3 KP 7.5 100 8.33 8.77 9.21 1.0 12.9 46.5
1SMB8.0AT3 KR 8.0 50 8.89 9.36 9.83 1.0 13.6 44.1
1SMB8.5AT3 KT 8.5 10 9.44 9.92 10.4 1.0 14.4 41.7
1SMB9.0AT3 KV 9.0 5.0 10.0 10.55 11.1 1.0 15.4 39.0
1SMB10AT3 KX 10 5.0 11.1 11.7 12.3 1.0 17.0 35.3
1SMB11AT3 KZ 11 5.0 12.2 12.85 13.5 1.0 18.2 33.0
1SMB12AT3 LE 12 5.0 13.3 14 14.7 1.0 19.9 30.2
1SMB13AT3 LG 13 5.0 14.4 15.15 15.9 1.0 21.5 27.9
1SMB14AT3 LK 14 5.0 15.6 16.4 17.2 1.0 23.2 25.8
1SMB15AT3, G* LM 15 5.0 16.7 17.6 18.5 1.0 24.4 24.0
1SMB16AT3 LP 16 5.0 17.8 18.75 19.7 1.0 26.0 23.1
1SMB17AT3 LR 17 5.0 18.9 19.9 20.9 1.0 27.6 21.7
1SMB18AT3 LT 18 5.0 20.0 21.05 22.1 1.0 29.2 20.5
1SMB20AT3 LV 20 5.0 22.2 23.35 24.5 1.0 32.4 18.5
1SMB22AT3 LX 22 5.0 24.4 25.65 26.9 1.0 35.5 16.9
1SMB24AT3, G* LZ 24 5.0 26.7 28.1 29.5 1.0 38.9 15.4
1SMB26AT3 ME 26 5.0 28.9 30.4 31.9 1.0 42.1 14.2
1SMB28AT3, G* MG 28 5.0 31.1 32.75 34.4 1.0 45.4 13.2
1SMB30AT3, G* MK 30 5.0 33.3 35.05 36.8 1.0 48.4 12.4
1SMB33AT3, G* MM 33 5.0 36.7 38.65 40.6 1.0 53.3 11.3
1SMB36AT3 MP 36 5.0 40.0 42.1 44.2 1.0 58.1 10.3
1SMB40AT3 MR 40 5.0 44.4 46.75 49.1 1.0 64.5 9.3
1SMB43AT3 MT 43 5.0 47.8 50.3 52.8 1.0 69.4 8.6
1SMB45AT3 MV 45 5.0 50.0 52.65 55.3 1.0 72.7 8.3
1SMB48AT3 MX 48 5.0 53.3 56.1 58.9 1.0 77.4 7.7
1SMB51AT3 MZ 51 5.0 56.7 59.7 62.7 1.0 82.4 7.3
1SMB54AT3 NE 54 5.0 60.0 63.15 66.3 1.0 87.1 6.9
1SMB58AT3 NG 58 5.0 64.4 67.8 71.2 1.0 93.6 6.4
1SMB60AT3 NK 60 5.0 66.7 70.2 73.7 1.0 96.8 6.2
1SMB64AT3 NM 64 5.0 71.1 74.85 78.6 1.0 103 5.8
1SMB70AT3 NP 70 5.0 77.8 81.9 86 1.0 113 5.3
1SMB75AT3 NR 75 5.0 83.3 87.7 92.1 1.0 121 4.9
1SMB85AT3 NV 85 55.0 94.4 99.2 104 1.0 137 4.4
1SMB90AT3 NX 90 5.0 100 105.5 111 1.0 146 4.1
1SMB100AT3 NZ 100 5.0 111 117 123 1.0 162 3.7
1SMB110AT3 PE 110 5.0 122 128.5 135 1.0 177 3.4
1SMB120AT3 PG 120 5.0 133 140 147 1.0 193 3.1
1SMB130AT3 PK 130 5.0 144 151.5 159 1.0 209 2.9
1SMB150AT3 PM 150 5.0 167 176 185 1.0 243 2.5
1SMB160AT3 PP 160 5.0 178 187.5 197 1.0 259 2.3
1SMB170AT3 PR 170 5.0 189 199 209 1.0 275 2.2
6. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than
the DC or continuous peak operating voltage level.
7. VBR measured at pulse test current IT at an ambient temperature of 25°C.
8. Surge current waveform per Figure 2 and derate per Figure 4 of the General Data − 600 W at the beginning of this group.
* The “G” suffix indicates Pb−Free package available.

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3
1SMB5.0AT3 Series

100
PULSE WIDTH (tP) IS DEFINED AS
NONREPETITIVE THAT POINT WHERE THE PEAK
tr≤ 10 s
PULSE WAVEFORM
PPK, PEAK POWER (kW)

CURRENT DECAYS TO 50% OF IPP.


SHOWN IN FIGURE 2
100
10 PEAK VALUE − IPP

VALUE (%)
IPP
HALF VALUE −
2
1 50

tP

0.1 0
0.1 s 1 s 10 s 100 s 1 ms 10 ms 0 1 2 3 4
tP, PULSE WIDTH t, TIME (ms)

Figure 1. Pulse Rating Curve Figure 2. Pulse Waveform

160
PEAK POWER OR CURRENT @ TA = 25° C

140
PEAK PULSE DERATING IN % OF

120 10,000

100 C, CAPACITANCE (pF) MEASURED @


ZERO BIAS
80 1000

60
MEASURED @ VRWM
40 100

20

0 10
0 25 50 75 100 125 150 0.1 1 10 100 1000
TA, AMBIENT TEMPERATURE (°C) VBR, BREAKDOWN VOLTAGE (VOLTS)

Figure 4. Pulse Derating Curve Figure 5. Capacitance versus Breakdown


Voltage

Zin

Vin LOAD VL

Figure 3. Typical Protection Circuit

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4
1SMB5.0AT3 Series

APPLICATION NOTES

RESPONSE TIME minimum lead lengths and placing the suppressor device as
In most applications, the transient suppressor device is close as possible to the equipment or components to be
placed in parallel with the equipment or component to be protected will minimize this overshoot.
protected. In this situation, there is a time delay associated Some input impedance represented by Zin is essential to
with the capacitance of the device and an overshoot prevent overstress of the protection device. This impedance
condition associated with the inductance of the device and should be as high as possible, without restricting the circuit
the inductance of the connection method. The capacitive operation.
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the DUTY CYCLE DERATING
transition from the operating voltage to the clamp voltage as The data of Figure 1 applies for non-repetitive conditions
shown in Figure 6. and at a lead temperature of 25°C. If the duty cycle increases,
The inductive effects in the device are due to actual the peak power must be reduced as indicated by the curves
turn-on time (time required for the device to go from zero of Figure 8. Average power must be derated as the lead or
current to full current) and lead inductance. This inductive ambient temperature rises above 25°C. The average power
effect produces an overshoot in the voltage across the derating curve normally given on data sheets may be
equipment or component being protected as shown in normalized and used for this purpose.
Figure 7. Minimizing this overshoot is very important in the At first glance the derating curves of Figure 8 appear to be
application, since the main purpose for adding a transient in error as the 10 ms pulse has a higher derating factor than
suppressor is to clamp voltage spikes. The SMB series have the 10 s pulse. However, when the derating factor for a
a very good response time, typically < 1.0 ns and negligible given pulse of Figure 8 is multiplied by the peak power
inductance. However, external inductive effects could value of Figure 1 for the same pulse, the results follow the
produce unacceptable overshoot. Proper circuit layout, expected trend.

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5
1SMB5.0AT3 Series

Vin (TRANSIENT)
OVERSHOOT DUE TO
V Vin (TRANSIENT) V INDUCTIVE EFFECTS
VL

VL

Vin

td

tD = TIME DELAY DUE TO CAPACITIVE EFFECT


t t

Figure 6. Figure 7.

1
0.7
0.5
DERATING FACTOR

0.3
0.2
PULSE WIDTH
0.1 10 ms
0.07
0.05
1 ms
0.03
0.02 100 s
10 s
0.01
0.1 0.2 0.5 1 2 5 10 20 50 100
D, DUTY CYCLE (%)

Figure 8. Typical Derating Factor for Duty Cycle

UL RECOGNITION

The entire series has Underwriters Laboratory including Strike Voltage Breakdown test, Endurance
Recognition for the classification of protectors (QVGV2) Conditioning, Temperature test, Dielectric
under the UL standard for safety 497B and File #116110. Voltage-Withstand test, Discharge test and several more.
Many competitors only have one or two devices recognized Whereas, some competitors have only passed a
or have recognition in a non-protective category. Some flammability test for the package material, we have been
competitors have no recognition at all. With the UL497B recognized for much more to be included in their Protector
recognition, our parts successfully passed several tests category.

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6
1SMB5.0AT3 Series

OUTLINE DIMENSIONS

SMB
CASE 403A−03
ISSUE D

NOTES:
S 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A 2. CONTROLLING DIMENSION: INCH.
3. D DIMENSION SHALL BE MEASURED WITHIN
DIMENSION P.

INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.160 0.180 4.06 4.57
D B B 0.130 0.150 3.30 3.81
C 0.075 0.095 1.90 2.41
D 0.077 0.083 1.96 2.11
H 0.0020 0.0060 0.051 0.152
J 0.006 0.012 0.15 0.30
K 0.030 0.050 0.76 1.27
P 0.020 REF 0.51 REF
S 0.205 0.220 5.21 5.59

H
K P J

SOLDERING FOOTPRINT*
2.261
0.089

2.743
0.108

2.159
0.085
SCALE 8:1 inches
mm 

*For additional information on our Pb−Free strategy and soldering


details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

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7
1SMB5.0AT3 Series

SURMETIC is a trademark of Semiconductor Components Industries, LLC.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION


LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: http://onsemi.com
Literature Distribution Center for ON Semiconductor USA/Canada
P.O. Box 5163, Denver, Colorado 80217 USA Order Literature: http://www.onsemi.com/litorder
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 For additional information, please contact your
Email: orderlit@onsemi.com Phone: 81−3−5773−3850 local Sales Representative.

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8

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