This document contains a 25 question quiz on computer organization and architecture. The quiz covers topics like architecture types (e.g. Harvard vs Von Neumann), components (e.g. registers, ALU), concepts (e.g. pipelining, interrupts), memory organization (e.g. cache, virtual memory), and I/O. Students are asked multiple choice questions testing their knowledge of these foundational computer science concepts.
This document contains a 25 question quiz on computer organization and architecture. The quiz covers topics like architecture types (e.g. Harvard vs Von Neumann), components (e.g. registers, ALU), concepts (e.g. pipelining, interrupts), memory organization (e.g. cache, virtual memory), and I/O. Students are asked multiple choice questions testing their knowledge of these foundational computer science concepts.
This document contains a 25 question quiz on computer organization and architecture. The quiz covers topics like architecture types (e.g. Harvard vs Von Neumann), components (e.g. registers, ALU), concepts (e.g. pipelining, interrupts), memory organization (e.g. cache, virtual memory), and I/O. Students are asked multiple choice questions testing their knowledge of these foundational computer science concepts.
This document contains a 25 question quiz on computer organization and architecture. The quiz covers topics like architecture types (e.g. Harvard vs Von Neumann), components (e.g. registers, ALU), concepts (e.g. pipelining, interrupts), memory organization (e.g. cache, virtual memory), and I/O. Students are asked multiple choice questions testing their knowledge of these foundational computer science concepts.
Examination: First/Second/Third/Final Year Semester I/II/III/ IV/V/VI/VII/VIII Course Code: SEITC403 and Course Name: Computer Organization and Architecture Time: 1 hour Max. Marks: 50 ===================================================================== For the students:- All the Questions are compulsory and carry equal marks . Q1. Which of the two architecture saves memory? Option A: Harvard Option B: Von Neumann Option C: Harvard & Von Neumann Option D: Multi-program system
Q2. The circuit used to store one bit of data is known as
Q3. Which of the following is true about Computer Architecture?
Option A: It acts as the interface between hardware and software. Option B: Computer Architecture tells us how exactly all the units in the system are arranged and interconnected. Option C: Computer Architecture is concerned with the structure and behaviour of a computer system as seen by the user. Option D: It involves Physical Components
Q4. Which of the following is true about Computer Organization?
Option A: It deals with high-level design issues. Option B: It involves Logic (Instruction sets, Addressing modes, Data types, Cache optimization). Option C: Computer Organization tells us how exactly all the units in the system are arranged and interconnected. Option D: D. It deals with low-level design issues.
Q5. The ________ is the computational center of the CPU.
Q6. Which of the following is used to choose between in
Option A: Conditional Units Option B: Multiplexer Option C: Control Codes Option D: Memory bus crementing the PC or performing ALU operations?
1 | Page Q7. The pipelining process is also called as ______ Option A: Assembly line operation Option B: Von Neumann cycle Option C: Superscalar operation Option D: Harvard Cycle
Q8. The hardware interrupts which can be delayed when a much high priority interrupt has occurred at the same time are known as ___________. Option A: Non Maskable Interrupt Option B: Maskable Interrupt Option C: Normal Interrupt Option D: High level Interrupts
Q9. What is the full form of RISC?
Option A: Read Instruction Set Architecture Option B: Reduced Instruction Set Computer. Option C: Register Instruction Set Computer. Option D: Right Instruction Set Architecture
Q10. Most computers use the _______________ representation when performing
Q12. Which binary number is added with the result of 4-bit binary adder to correct the BCD addition? Option A: 0011 Option B: 0110 Option C: 1001 Option D: 0101
Q13. In IEEE 32-bit representations, the mantissa of the fraction is said to occupy ______ bits. Option A: 24 Option B: 23 Option C: 10 Option D: 16
2 | Page Q14. In double precision format, the size of the mantissa is ______ Option A: 32 bit Option B: 52 bit Option C: 64 bit Option D: 72 bit
Q15. The ______ is used to coordinate the operation of the multiplier.
Option A: Controller Option B: Coordinator Option C: Control sequencer Option D: Control Base
Q16. Which memory is difficult to interface with processor ?
Option A: Static Memory Option B: Dynamic Memory Option C: ROM Option D: Real Memory
Q17. The minimum time delay required between initiation of two successive memory operations is called Option A: Memory Cycle time Option B: Memory Access time Option C: Transmission Time Option D: Fetch Time
Q18. Generally , the refreshing rate of dynamic RAMs is approximately once in
Option A: Two micro seconds Option B: Two milli seconds Option C: Sixty seconds Option D: Two micro seconds
Q19. The performance of cache memory is frequently measured in terms of a quantity
called Option A: Miss Ratio Option B: Hit ratio Option C: Latency Ratio Option D: Read Ratio
Q20. The cache memory of 1K words uses direct mapping with a block size of 4 words. How many blocks can the cache accommodate? Option A: 256 words Option B: 512 words Option C: 1024 words Option D: 2500 words
Q21. A page fault
Option A: Occurs when there is an error in a specific page Option B: Occurs when a program accesses a page of main memory
3 | Page Option C: Occurs when a program accesses a page not currently in main memory Option D: Occurs when a program accesses a page belonging to another program
Q22. Input or output devices that are connected to computer are called ______________. Option A: Input/Output Subsystem Option B: Peripheral Devices Option C: Interfaces Option D: Interrupt
Q23. In memory-mapped I/O ____________
Option A: The I/O devices have a separate address space Option B: The I/O devices and the memory share the same address space Option C: A part of the memory is specifically set aside for the I/O operation Option D: The memory and I/O devices have an associated address space
Q24. SIMD represents an organization that ______________.
Option A: Refers to a computer system capable of processing several programs at the same time. Option B: Represents organization of single computer contain in a control unit, processor unit and a memory unit. Option C: Includes many processing units under the supervision of a common control unit Option D: Includes different processors
Q25. The 8089 shares the system bus and memory with the host CPU in Option A: tightly coupled configuration Option B: loosely coupled configuration Option C: tightly and loosely coupled configurations Option D: Bus configuration
