PC Interfacing Fourth Level Lecture TWO: Parallel (Centronic) Port Interface
PC Interfacing Fourth Level Lecture TWO: Parallel (Centronic) Port Interface
PC Interfacing Fourth Level Lecture TWO: Parallel (Centronic) Port Interface
Fourth Level
Lecture TWO
Goals:
Up-on completing this lecture, the student should be able to:
The I/O lines in the port are organized into three groups, namely, the Data
group, the Control and the Status group. Figure 1.4 gives the logic structure of the
Centronic port.
This sends data from PCs to external devices. It has eight latched output lines and the
group is associated with an 8-bit CPU port. The address is: base address.
Control group
This controls the operation of external devices. It contains four latched output lines (-
STROBE, -LF/CR, -SLIN and -INITIALIZE) which are from the computer to the
devices. The group is controlled by a CPU port having an address: base address+2. -
STROBE, -LF/CR and -SLIN lines are inverted.-INITIALIZE is not.
Status group
The group is used by the computer to obtain the current status of external devices. It
contains five lines (-ERROR, SLCT, PE,-ACK and BUSY), which are directed from
external devices to the computer. It is fed into a CPU port, the address of which is:
base address+l. BUSY line is inverted and the other four lines are not.
The bit functions of each I/O port are summarized in Table 1.1.
The LPT base address
There are two ways to obtain the base address. One is to check the hardware
configuration of your computer. The other is to find the addresses directly from the
user's program by using the facilities provided by the computer's basic input output
system (BIOS). When a computer is powered on or reset, the BIOS checks all the
possible Centronic ports. If it finds one, it writes the addresses (a 2- byte word) of that
port to two specific memory locations. The memory locations for LPT1 to LPT4 are
listed as follows:
LPTI: 0000:0408h - 0000:0409h
LPT2: 0000:040Ah - 0000:040Bh
LPT3: 0000:040Ch - 0000:040Dh
LPT4: 0000:040Eh - 0000:040Fh
There is another useful memory location, 0000:4011h. It stores the total number of
Centronic ports installed. The information is contained in bit 6 and bit 7.
bit 7=0, bit 6=0: no Centronic port installed
bit 7=0, bit 6=1: one Centronic port installed
bit 7=1, bit 6=0: two Centronic ports installed
bit 7=1, bit 6=1: three Centronic ports installed
Software control
a-How to obtain the base address of LPT
-QBASIC
-TP6
-WINDOWS
b-How to Output & Input data via the LPT
1-Printer commands &BIOS interrupt routines
. QBASIC with instruction PRINT
. TP6 with instruction WRITELIN(LST)
.BIOS interrupt INT 17h
2-Direct I/O access
Summary:
1- There are three groups of pins in the parallel port: Data, Status, Control
2- Some are pulled-up and some are inverted.
3- Data is sent in parallel hence strobing and ACK should be used.
Questions:
1- Design an interfacing cct to connect two eight bit analog to digital
converters to the parallel port of a computer. Write the pseudo-code as
well.
2- how to read a 12 bit data-bus on the parallel port? Design and show
the pseudo-code.