NTB5860NL, NTP5860NL,

NVB5860NL

N-Channel Power MOSFET

60 V, 220 A, 3.0 mW

Features http://onsemi.com
• Low RDS(on)
• High Current Capability V(BR)DSS RDS(on) MAX ID MAX
• 100% Avalanche Tested 3.0 mW @ 10 V
60 V 220 A
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant 3.6 mW @ 4.5 V
• NVB Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
D
Qualified and PPAP Capable

MAXIMUM RATINGS (TJ = 25°C Unless otherwise specified)

Parameter Symbol Value Unit G
Drain−to−Source Voltage VDSS 60 V
Gate−to−Source Voltage − Continuous VGS $20 V S
Continuous Drain Steady TA = 25°C ID 220 A N−CHANNEL MOSFET
Current, RqJC State
TA = 100°C 156 4
Power Dissipation, Steady TA = 25°C PD 283 W
RqJC State
4
Pulsed Drain Current tp = 10 ms IDM 660 A
1 2
Current Limited by Package IDMmax 130 A
3
Operating and Storage Temperature Range TJ, Tstg −55 to °C
+175 TO−220AB D2PAK
1 CASE 221A CASE 418B
Source Current (Body Diode) IS 130 A 2 STYLE 5 STYLE 2
3
Single Pulse Drain−to−Source Avalanche EAS 735 mJ
Energy (L = 0.3 mH) MARKING DIAGRAMS
& PIN ASSIGNMENTS
Lead Temperature for Soldering TL 260 °C 4
Purposes (1/8″ from Case for 10 Seconds) 4
Drain
Drain
THERMAL RESISTANCE RATINGS
Parameter Symbol Max Unit
NTB
Junction−to−Case (Drain) Steady State RqJC 0.53 °C/W NTP 5860NLG
5860NLG AYWW
Junction−to−Ambient − Steady State (Note 1) RqJA 28
AYWW
Stresses exceeding Maximum Ratings may damage the device. Maximum 2
Ratings are stress ratings only. Functional operation above the Recommended 1 3 1 3
Gate Source Drain
Operating Conditions is not implied. Extended exposure to stresses above the Gate Source
Recommended Operating Conditions may affect device reliability.
1. Surface mounted on FR4 board using 1 sq in pad size, 2
(Cu Area 1.127 sq in [2 oz] including traces). Drain
G = Pb−Free Device
A = Assembly Location
Y = Year
WW = Work Week

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.

© Semiconductor Components Industries, LLC, 2012 1 Publication Order Number:

Augsut, 2012 − Rev. 1 NTB5860NL/D
 NTB5860NL, NTP5860NL, NVB5860NL

ELECTRICAL CHARACTERISTICS (TJ = 25°C Unless otherwise specified)

Characteristics Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VDS = 0 V, ID = 250 mA 60 V
Drain−to−Source Breakdown Voltage V(BR)DSS/TJ 6.1 mV/°C
Temperature Coefficient ID = 250 mA

Zero Gate Voltage Drain Current IDSS VGS = 0 V TJ = 25°C 1.0 mA

VDS = 60 V

VGS = 0 V TJ = 125°C 100

VDS = 60 V

Gate−Source Leakage Current IGSS VDS = 0 V, VGS = $20 V $100 nA

ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage VGS(th) VGS = VDS, ID = 250 mA 1.0 3.0 V
Threshold Temperature Coefficient VGS(th)/TJ −7.7 mV/°C
Drain−to−Source On−Resistance RDS(on) VGS = 10 V, ID = 20 A 2.4 3.0 mW
VGS = 4.5 V, ID = 20 A 2.8 3.6
Forward Transconductance gFS VDS = 15 V, ID = 30 A 47 S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance Ciss 13216 pF
Output Capacitance Coss VDS = 25 V, VGS = 0 V, 1127
f = 1 MHz
Transfer Capacitance Crss 752
Total Gate Charge QG(TOT) 220 nC
Threshold Gate Charge QG(TH) VGS = 10 V, VDS = 48 V, 13
Gate−to−Source Charge QGS ID = 40 A 37
Gate−to−Drain Charge QGD 54
SWITCHING CHARACTERISTICS, VGS = 10 V (Note 3)
Turn−On Delay Time td(on) 25 ns
Rise Time tr VGS = 10 V, VDD = 48 V, 58
Turn−Off Delay Time td(off) ID = 100 A, RG = 2.5 W 98
Fall Time tf 144
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V TJ = 25°C 0.76 1.1 Vdc
IS = 40 A TJ = 125°C 0.60
Reverse Recovery Time trr 50 ns
Charge Time ta VGS = 0 V, IS = 100 A, 25
Discharge Time tb dIS/dt = 20 A/ms 25
Reverse Recovery Stored Charge QRR 71 nC
2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
3. Switching characteristics are independent of operating junction temperatures.

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 NTB5860NL, NTP5860NL, NVB5860NL

TYPICAL CHARACTERISTICS

280 280
VGS = VGS = 4 V TJ = 25°C VDS ≥ 10 V
10 V 4.4 V 240
240
ID, DRAIN CURRENT (A)

3.8 V

ID, DRAIN CURRENT (A)

200 200
3.6 V
160 160

120 120
3.4 V
TJ = 25°C
80 80
3.2 V
40 40
TJ = 125°C
TJ = −55°C
0 0
0 1 2 3 4 5 2 3 4 5
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

0.008 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

0.0035
ID = 20 A
TJ = 25°C TJ = 25°C
0.006
VGS = 4.5 V
0.0030

0.004

VGS = 10 V
0.0025
0.002

0.000 0.0020
2 4 6 8 10 10 30 50 70 90 110 130
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate Voltage Figure 4. On−Resistance vs. Drain Current
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)

2.0 100000
ID = 20 A VGS = 0 V
1.8 V = 10 V
GS

1.6 TJ = 150°C
IDSS, LEAKAGE (nA)

1.4
10000
1.2
TJ = 125°C
1.0

0.8

0.6 1000
−50 −25 0 25 50 75 100 125 150 175 10 20 30 40 50 60
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current
Temperature vs. Voltage

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3
 NTB5860NL, NTP5860NL, NVB5860NL

TYPICAL CHARACTERISTICS

16000 10

VGS, GATE−TO−SOURCE VOLTAGE (V)

Ciss VGS = 0 V QT
14000 TJ = 25°C
8
12000
C, CAPACITANCE (pF)

10000 6
8000
Qgs Qgd
6000 4

4000
Coss 2 VDS = 48 V
2000 ID = 40 A
Crss TJ = 25°C
0 0
0 10 20 30 40 0 50 100 150 200 250
VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source vs. Total Charge

1000 180
VDD = 48 V VGS = 0 V
ID = 40 A 160
TJ = 25°C
IS, SOURCE CURRENT (A)

VGS = 10 V 140
120
t, TIME (ns)

tf 100
100 td(off)
80
tr
60
40
td(on)
20

10 0
1 10 100 0.60 0.70 0.80 0.90 1.00 1.10
RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation Figure 10. Diode Forward Voltage vs. Current
vs. Gate Resistance

1000
1 ms
10 ms 100 ms 10 ms
dc
ID, DRAIN CURRENT (A)

100

10
VGS = 10 V
SINGLE PULSE
1 TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1 1 10 100

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 11. Maximum Rated Forward Biased
Safe Operating Area

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4
 NTB5860NL, NTP5860NL, NVB5860NL

TYPICAL CHARACTERISTICS

1
RqJC(t) (°C/W) EFFECTIVE TRANSIENT

Duty Cycle = 0.5

THERMAL RESISTANCE

0.2
0.1
0.1
0.05
0.02
0.01
0.01

SINGLE PULSE

0.001
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10
t, PULSE TIME (s)
Figure 12. Thermal Response

ORDERING INFORMATION
Device Package Shipping†
NTP5860NLG TO−220AB 50 Units / Rail
(Pb−Free)

NTB5860NLT4G D2PAK 800 / Tape & Reel

(Pb−Free)

NVB5860NLT4G* D2PAK 800 / Tape & Reel

(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NVB Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable.

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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TO−220
CASE 221A−09
ISSUE AJ
DATE 05 NOV 2019

SCALE 1:1

STYLE 1: STYLE 2: STYLE 3: STYLE 4:

PIN 1. BASE PIN 1. BASE PIN 1. CATHODE PIN 1. MAIN TERMINAL 1
2. COLLECTOR 2. EMITTER 2. ANODE 2. MAIN TERMINAL 2
3. EMITTER 3. COLLECTOR 3. GATE 3. GATE
4. COLLECTOR 4. EMITTER 4. ANODE 4. MAIN TERMINAL 2

STYLE 5: STYLE 6: STYLE 7: STYLE 8:

PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. CATHODE
2. DRAIN 2. CATHODE 2. ANODE 2. ANODE
3. SOURCE 3. ANODE 3. CATHODE 3. EXTERNAL TRIP/DELAY
4. DRAIN 4. CATHODE 4. ANODE 4. ANODE

STYLE 9: STYLE 10: STYLE 11: STYLE 12:

PIN 1. GATE PIN 1. GATE PIN 1. DRAIN PIN 1. MAIN TERMINAL 1
2. COLLECTOR 2. SOURCE 2. SOURCE 2. MAIN TERMINAL 2
3. EMITTER 3. DRAIN 3. GATE 3. GATE
4. COLLECTOR 4. SOURCE 4. SOURCE 4. NOT CONNECTED

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42148B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: TO−220 PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

D2PAK 3
CASE 418B−04
ISSUE L
DATE 17 FEB 2015

SCALE 1:1 NOTES:

C 1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
E 2. CONTROLLING DIMENSION: INCH.
3. 418B−01 THRU 418B−03 OBSOLETE,
V
−B− NEW STANDARD 418B−04.
W
4 INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.340 0.380 8.64 9.65
B 0.380 0.405 9.65 10.29
A C 0.160 0.190 4.06 4.83
S D 0.020 0.035 0.51 0.89
1 2 3 E 0.045 0.055 1.14 1.40
F 0.310 0.350 7.87 8.89
G 0.100 BSC 2.54 BSC
−T− H 0.080 0.110 2.03 2.79
K J 0.018 0.025 0.46 0.64
SEATING W K 0.090 0.110 2.29 2.79
PLANE
G J L 0.052 0.072 1.32 1.83
M 0.280 0.320 7.11 8.13
H N 0.197 REF 5.00 REF
D 3 PL P 0.079 REF 2.00 REF
R 0.039 REF 0.99 REF
0.13 (0.005) M T B M
S 0.575 0.625 14.60 15.88
V 0.045 0.055 1.14 1.40

VARIABLE
CONFIGURATION
ZONE N P
R U
L L L

M M M

F F F

VIEW W−W VIEW W−W VIEW W−W

1 2 3

STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: STYLE 6:

PIN 1. BASE PIN 1. GATE PIN 1. ANODE PIN 1. GATE PIN 1. CATHODE PIN 1. NO CONNECT
2. COLLECTOR 2. DRAIN 2. CATHODE 2. COLLECTOR 2. ANODE 2. CATHODE
3. EMITTER 3. SOURCE 3. ANODE 3. EMITTER 3. CATHODE 3. ANODE
4. COLLECTOR 4. DRAIN 4. CATHODE 4. COLLECTOR 4. ANODE 4. CATHODE

MARKING INFORMATION AND FOOTPRINT ON PAGE 2

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42761B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: D2PAK 3 PAGE 1 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 D2PAK 3
CASE 418B−04
ISSUE L
DATE 17 FEB 2015
GENERIC
MARKING DIAGRAM*

xx AYWW
xxxxxxxxx xxxxxxxxG
xxxxxxxxG
AWLYWWG AYWW
AKA

IC Standard Rectifier

xx = Specific Device Code

A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
AKA = Polarity Indicator

*This information is generic. Please refer to

device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.

SOLDERING FOOTPRINT*

10.49

8.38

16.155

2X
3.504
2X
1.016
5.080
PITCH
DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42761B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: D2PAK 3 PAGE 2 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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