TDA7562

MULTIFUNCTION QUAD POWER AMPLIFIER

WITH BUILT-IN DIAGNOSTICS FEATURES

■ DMOS POWER OUTPUT MULTIPOWER BCD TECHNOLOGY

■ HIGH OUTPUT POWER CAPABILITY 4x25W/
4Ω @ 14.4V, 1KHZ, 10% THD, 4x35W EIAJ MOSFET OUTPUT POWER STAGE
■ MAX. OUTPUT POWER 4x60W/2Ω
■ FULL I2C BUS DRIVING:
– ST-BY
– INDEPENDENT FRONT/REAR SOFT PLAY/
MUTE
– SELECTABLE GAIN 30dB - 16dB (FOR
LOW NOISE LINE OUTPUT FUNCTION) FLEXIWATT27 (Vertical)
– I2C BUS DIGITAL DIAGNOSTICS
■ FULL FAULT PROTECTION
■ DC OFFSET DETECTION
■ FOUR INDEPENDENT SHORT CIRCUIT Bridge type of car radio amplifier in Flexiwatt27V
PROTECTION package specially intended for car radio applica-
tions. Thanks to the DMOS output stage the
■ CLIPPING DETECTOR PIN WITH
TDA7562 has a very low distortion allowing a clear
SELECTABLE THRESHOLD (2%/10%)
powerful sound. This device is equipped with a full
■ ST-BY/MUTE PIN
diagnostics array that communicates the status of
■ ESD PROTECTION each speaker through the I2C bus.The possibility
to control the configuration and the behaviour of
DESCRIPTION the device by means of the I2C bus makes
The TDA7562 is a new BCD technology Quad TDA7562 a very flexible machine.

BLOCK DIAGRAM

CLK DATA VCC1 VCC2

ST-BY/MUTE Thermal Clip CD_OUT

I2CBUS Protection Reference
Detector
Mute1 Mute2 & Dump

IN RF F OUT RF+
16/30dB

Short Circuit
Protection &
OUT RF-
Diagnostic
IN RR R OUT RR+
16/30dB

Short Circuit OUT RR-

Protection &
IN LF Diagnostic
F OUT LF+
16/30dB

Short Circuit OUT LF-

Protection &
Diagnostic
IN LR R OUT LR+
16/30dB

Short Circuit OUT LR-

Protection &
Diagnostic

SVR AC_GND RF RR LF LR TAB S_GND

PW_GND

May 2003 1/17

TDA7562

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
Vop Operating Supply Voltage 18 V
VS DC Supply Voltage 28 V
Vpeak Peak Supply Voltage (for t = 50ms) 50 V
VCK CK pin Voltage 6 V
VDATA Data Pin Voltage 6 V
IO Output Peak Current (not repetitive t = 100µs) 8 A
IO Output Peak Current (repetitive f > 10Hz) 6 A
Ptot Power Dissipation Tcase = 70°C 85 W
Tstg, Tj Storage and Junction Temperature -55 to 150 °C

THERMAL DATA
Symbol Parameter Value Unit
Rth j-case Thermal Resistance Junction to case Max. 1 °C/W

PIN CONNECTION (Top view)

27 TAB
26 DATA
25 PW_GND RR
24 OUT RR-
23 CK
22 OUT RR+
21 VCC2
20 OUT RF-
19 PW_GND RF
18 OUT RF+
17 AC GND
16 IN RF
15 IN RR
14 S_GND
13 IN LR
12 IN LF
11 SVR
10 OUT LF+
9 PW_GND LF
8 OUT LF-
7 VCC1
6 OUT LR+
5 CD-OUT
4 OUT LR-
3 PW_GND LR
2 STBY
1 TAB
D00AU1230

2/17
 TDA7562

Figure 1. Application Circuit

C8 C7
0.1µF 3300µF
Vcc1 Vcc2
V(4V .. VCC)
7 21 +
2 18
19 OUT RF
DATA 26
20
I2C BUS -
+
CLK 23 22
C1 0.22µF 25 OUT RR
IN RF 16 24
-
+
C2 0.22µF 10
IN RR 15 9 OUT LF
8
C3 0.22µF -
+
IN LF 12 6
3 OUT LR
C4 0.22µF
4
IN LR 13 -
TAB
S-GND 1, 27
14 17 11 5

47K
C5 C6 V
1µF 10µF
D00AU1231A
CD OUT

3/17
TDA7562

ELECTRICAL CHARACTERISTICS
(Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz; Tamb = 25°C; unless otherwise specified.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
POWER AMPLIFIER
VS Supply Voltage Range 8 18 V
Id Total Quiescent Drain Current 150 300 mA
PO Output Power EIAJ (VS = 13.7V) 32 35 W
THD = 10% 22 25 W
THD = 1% 20 W
RL = 2Ω; EIAJ (VS = 13.7V) 50 55 W
RL = 2Ω; THD 10% 32 38 W
RL = 2Ω; THD 1% 30 W
RL = 2Ω; MAX POWER 60 W
THD Total Harmonic Distortion PO = 1W to 10W; f = 1kHz 0.04 0.1 %
PO = 1-10W, f = 10kHz 0.02 0.5 %
GV = 16dB; VO = 0.1 to 5VRMS 0.02 0.05 %
CT Cross Talk f = 1KHz to 10KHz, Rg = 600Ω 50 60 dB
RIN Input Impedance 60 100 130 KΩ
GV1 Voltage Gain 1 29.5 30 30.5 dB
∆GV1 Voltage Gain Match 1 -1 1 dB
GV2 Voltage Gain 2 15.5 16 16.5 dB
∆GV2 Voltage Gain Match 2 -1 1 dB
EIN1 Output Noise Voltage 1 Rg = 600Ω 20Hz to 22kHz 50 100 µV
EIN2 Output Noise Voltage 2 Rg = 600Ω; GV = 16dB 15 30 µV
20Hz to 22kHz
SVR Supply Voltage Rejection f = 100Hz to 10kHz; Vr = 1Vpk; 50 60 dB
Rg = 600Ω
BW Power Bandwidth 100 KHz
ASB Stand-by Attenuation 90 110 dB
ISB Stand-by Current 2 100 µA
AM Mute Attenuation 80 100 dB
VOS Offset Voltage Mute & Play -100 0 100 mV
VAM Min. Supply Mute Threshold 7 7.5 8 V
TON Turn ON Delay D2/D1 (IB1) 0 to 1 5 20 ms
TOFF Turn OFF Delay D2/D1 (IB1) 1 to 0 5 20 ms
VSBY St-By/Mute pin for St-By 0 1.5 V
VMU St-By/Mute pin for Mute 3.5 5 V
VOP St-By/Mute pin for Operating 7 VS V
IMU St-By/Mute pin Current VSTBY/MUTE = 8.5V 20 40 µA
VSTBY/MUTE < 1.5V 0 10 µA
CDLK Clip Det High Leakage Current CD off 0 15 µA
CDSAT Clip Det Sat. Voltage CD on; ICD = 1mA 300 mV
CDTHD Clip Det THD level D0 (IB1) = 1 5 10 15 %
D0 (IB1) = 0 1 2 3 %

4/17
 TDA7562

ELECTRICAL CHARACTERISTICS (continued)

(Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz; Tamb = 25°C; unless otherwise specified.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
DIAGNOSTICS (Power Amplifier Mode or Line Driver Mode)
Pgnd Short to GND det. (below this Power Amplifier in Mute or Play, 1.2 V
limit, the Output is considered in one or more short circuits
Short Circuit to GND) protection activated
Pvs Short to VS det. (above this limit, Vs -1.2 V
the Output is considered in Short
Circuit to VS)
Pnop Normal operation thresholds. 1.8 Vs -1.8 V
(Within these limits, the Output is
considered without faults).
Lsc Shorted Load det. Power Amplifier Mode 0.5 Ω
Line Driver Mode 1.5 Ω
VO Offset Detection ±1.5 ±2 ±2.5 V
2
I C BUS INTERFACE
fSCL Clock Frequency 400 KHz
VIL Input Low Voltage 1.5 V
VIH Input High Voltage 2.3 V

5/17
TDA7562

Figure 2. Quiescent Current vs. Supply Voltage Figure 5. Distortion vs. Output Power (4Ω)
Id (mA) THD (%)
250 10

230
Vin = 0 Vs = 14.4 V
210 RL = 4 Ohm
NO LOADS
190
1
170

150 f = 10 KHz

130
0.1
110 f = 1 KHz
90

70

50 0.01
8 10 121 41 6 18 0.1 1 10
Vs (V) Po (W)

Figure 3. Output Power vs. Supply Voltage (4Ω) Figure 6. Distortion vs. Output Power (2Ω)
Po (W) THD (%)
70 10
65
60 Po-max Vs = 14.4 V
RL = 4 Ohm
55 f = 1 KHz RL = 2 Ohm
50 1
45 THD = 10 %
f = 10 KHz
40
35
30 f = 1 KHz
0.1
25
20 THD = 1 %
15
10
5 0.01
8 9 10 11 12 13 14 15 16 17 18 0.1 1 10
Vs (V) Po (W)

Figure 4. Output Power vs. Supply Voltage (2Ω) Figure 7. Distortion vs. Output Power (4Ω)
Po (W) THD (%)
80 10
75
Po-max
70
RL = 2 Ohm Vs = 14.4 V
65 f = 1 KHz RL = 4 Ohm
60 Po = 4 W
55 1
50 THD = 10 %
45
40
35
30 0.1
25 THD = 1 %
20
15
10
5 0.01
8 9 10 11 12 13 14 15 16 10 100 1000 10000
Vs (V) f (Hz)

6/17
 TDA7562

Figure 8. Distortion vs. Frequency (2Ω) Figure 11. Power Dissipation & Efficiency vs.
Output Power (4Ω, STD, SINE)
THD (%) Ptot (W) n (%)
10 90 90

80 Vs = 14.4 V 80
RL = 4 x 4 Ohm n
Vs = 14.4 V 70 f = 1 KHz SINE 70
RL = 2 Ohm
1 Po = 8 W 60 60

50 50
Ptot
40 40
0.1
30 30

20 20

10 10
0.01
10 100 1000 10000 0 0
f (Hz) 0 2 4 6 8 10 12 14 16 18 20 22 24 26
Po (W)

Figure 9. Crosstalk vs. Frequency Figure 12. Power Dissipation vs. Average
Ouput Power (Audio Program
CROSSTALK (dB) Simulation, 4Ω)
90
Ptot (W)
80 45

70 40 Vs = 14 V
RL = 4 x 4 Ohm
35 GAUSSIAN NOISE
60
CLIP
RL = 4 Ohm START
30
50 Po = 4 W
Rg = 600 Ohm
25
40
20
30
15
20
10 100 1000 10000 10
f (Hz)
5
0 1 2 3 4 5
Po (W)

Figure 10. Supply Voltage Rejection vs. Freq. Figure 13. Power Dissipation vs. Average
Ouput Power (Audio Program
SVR (dB) Simulation, 2Ω)
90
Ptot (W)
80 90

80
70 Vs = 14 V
70 RL = 4 x 2 Ohm
GAUSSIAN NOISE CLIP
60 START
60

50 50
Rg = 600 Ohm 40
40 Vripple= 1 Vpk
30
30
20
20
10 100 1000 10000 10
f (Hz)
0
0 1 2 3 4 5 6 7 8
Po (W)

7/17
TDA7562

DIAGNOSTICS FUNCTIONAL DESCRIPTION:

Detectable conventional faults are:
– SHORT TO GND
– SHORT TO Vs
– SHORT ACROSS THE SPEAKER
The following additional features are provided:
– OUTPUT OFFSET DETECTION
The TDA7562 has 2 operating statuses:
1)) RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each oth-
er. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output status
is made every 1 ms (fig. 14). Restart takes place when the overload is removed.
2)) DIAGNOSTIC mode. It is enabled via I2C bus and self activates if an output overload (such to cause the
intervention of the short-circuit protection) occurs to the speakers outputs . Once activated, the diagnostics
procedure develops as follows (fig. 15):
– To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output
status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not per-
formed and the channel returns back active.
– Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a du-
ration of about 100 ms is started.
– After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The
relevant data are stored inside the device and can be read by the microprocessor. When one cycle
has terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics
throughout the car-radio operating time.
– To check the status of the device a sampling system is needed. The timing is chosen at microproces-
sor level (over half a second is recommended).

Figure 14. Restart timing without Diagnostic Enable (Each 1mS time, a sampling of the fault is done)

Out
1mS 1mS 1mS 1mS
1-2mS

t
Overcurrent and short
circuit protection intervention Short circuit removed
(i.e. short circuit to GND)

Figure 15. Restart timing with Diagnostic Enable

1mS 100mS 1mS 1mS

t
Overcurrent and short
Short circuit removed
(i.e. short circuit to GND)

8/17
 TDA7562

As for SHORT TO GND / Vs the fault-detection thresholds remain unchanged from 30 dB to 16 dB gain setting.
They are as follows:

S.C. to GND x Normal Operation x S.C. to Vs

0V 1.2V 1.8V VS-1.8V VS-1.2V VS

D01AU1253

Concerning SHORT ACROSS THE SPEAKER , the threshold varies from 30 dB to 16 dB gain setting, since
different loads are expected (either normal speaker's impedance or high impedance). The values in case of 30
dB gain are as follows:

S.C. across Load x Normal Operation

0V 0.5Ω 1.5Ω Infinite

D01AU1254mod

If the Line-Driver mode (Gv= 16 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will
change as follows:

S.C. across Load x Normal Operation

0Ω 1.5Ω 4.5Ω infinite

D01AU1252mod

OUTPUT DC OFFSET DETECTION

Any DC output offset exceeding ± 2V are signalled out. This inconvenient might occur as a consequence of ini-
tially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the
speakers at risk of overheating.
This diagnostic has to be performed with low-level output AC signal (or Vin = 0).
The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command):
– START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1
– STOP = Actual reading operation
Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any
overloads leading to activation of the short-circuit protection occurs in the process.

MULTIPLE FAULTS
When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one
of them is initially read out. The others are notified after successive cycles of I2C reading and faults removal,
provided that the diagnostic is enabled.
The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit

9/17
TDA7562

with the 4 ohm speaker unconnected is considered as double fault.

Double fault table for Turn On Diagnostic

S. GND (so) S. GND (sk) S. Vs S. Across L.
S. GND (so) S. GND S. GND S. Vs + S. GND S. GND
S. GND (sk) / S. GND S. Vs S. GND
S. Vs / / S. Vs S. Vs
S. Across L. / / / S. Across L.

S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted
to ground (test-current source side= so, test-current sink side = sk). More precisely, so = CH+, sk = CH-.

FAULTS AVAILABILITY
All the results coming from I2Cbus, by read operations, are the consequence of measurements inside a defined
period of time. If the fault is stable throughout the whole period, it will be sent out.
To guarantee always resident functions, every kind of diagnostic cycles will be reactivate after any I2C reading
operation. So, when the micro reads the I2C, a new cycle will be able to start, but the read data will come from
the previous diag. cycle (i.e. The device is in turned On, with a short to Gnd, then the short is removed and micro
reads I2C. The short to Gnd is still present in bytes, because it is the result of the previous cycle. If another I2C
reading operation occurs, the bytes do not show the short). In general to observe a change in Diagnostic bytes,
two I2C reading operations are necessary.

I2C PROGRAMMING/READING SEQUENCES

A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as
follows (after battery connection):
TURN-ON: PIN2 > 7V --- 10ms --- (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT
TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN) --- 10ms --- PIN2 = 0
Car Radio Installation: PIN2 > 7V --- 10ms DIAG ENABLE (write) --- 200 ms --- I2C read (repeat until All faults
disappear).
OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I2C reading (repeat I2C reading until
high-offset message disappears).

FAST MUTING
The muting time can be shortened to less than 1ms by setting (IB2) D5 = 1. This option can be useful in transient
battery situations (i.e. during car engine cranking) to quickly turnoff the amplifier for avoiding any audible effects
caused by noise/transients being injected by preamp stages.

10/17
 TDA7562

I2C BUS INTERFACE

Data transmission from microprocessor to the TDA7562 and viceversa takes place through the 2 wires I2C BUS inter-
face, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 16, the data on the SDA line must be stable during the high period of the clock. The HIGH and
LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 17 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 18).
The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so
that the SDAline is stable LOW during this clock pulse.
* Transmitter
– master (µP) when it writes an address to the TDA7562
– slave (TDA7562) when the µP reads a data byte from TDA7562
** Receiver
– slave (TDA7562) when the µP writes an address to the TDA7562
– master (µP) when it reads a data byte from TDA7562

Figure 16. Data Validity on the I2CBUS

SDA

SCL

DATA LINE CHANGE

STABLE, DATA DATA
VALID ALLOWED D99AU1031

Figure 17. Timing Diagram on the I2CBUS

SCL

I2CBUS

SDA

D99AU1032
START STOP

Figure 18. Acknowledge on the I2CBUS

SCL 1 2 3 7 8 9

SDA
MSB
ACKNOWLEDGMENT
START D99AU1033 FROM RECEIVER

11/17
TDA7562

SOFTWARE SPECIFICATIONS
All the functions of the TDA7562 are activated by I2C interface.
The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from µP to TDA7562) or read
instruction (from TDA7562 to µP).
Chip Address:

D7 D0

1 1 0 1 1 0 0 X D8 Hex

X = 0 Write to device
X = 1 Read from device
If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.
IB1
D7 X
Diagnostic enable (D6 = 1)
D6
Diagnostic defeat (D6 = 0)
Offset Detection enable (D5 = 1)
D5
Offset Detection defeat (D5 = 0)
Front Channel
D4 Gain = 30dB (D4 = 0)
Gain = 16dB (D4 = 1)
Rear Channel
D3 Gain = 30dB (D3 = 0)
Gain = 16dB (D3 = 1)
Mute front channels (D2 = 0)
D2
Unmute front channels (D2 = 1)
Mute rear channels (D1 = 0)
D1
Unmute rear channels (D1 = 1)
CD 2% (D0 = 0)
D0
CD 10% (D0 = 1)

IB2

D7 X

D6 used for testing

Normal muting time (D5 = 0)

D5
Fast muting time (D5 = 1)

Stand-by on - Amplifier not working - (D4 = 0)

D4
Stand-by off - Amplifier working - (D4 = 1)

Power amplifier mode diagnostic (D3 = 0)

D3
Line driver mode diagnostic (D3 = 1)

D2 X

D1 X

D0 X

12/17
 TDA7562

If R/W = 1, the TDA7562 sends 4 "Diagnostics Bytes" to µP: DB1, DB2, DB3 and DB4.
DB1
D7 Thermal warning active (D7 = 1)

Diag. cycle not activated or not terminated (D6 = 0)

D6
Diag. cycle terminated (D6 = 1)

D5 X

D4 X

Channel LF
D3 Normal load (D3 = 0)
Short load (D3 = 1)

Channel LF
D2 No output offset (D2 = 0)
Output offset detection (D2 = 1)

Channel LF
D1 No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)

Channel LF
D0 No short to GND (D1 = 0)
Short to GND (D1 = 1)

DB2

Offset detection not activated (D7 = 0)

D7
Offset detection activated (D7 = 1)

D6 X

D5 X

D4 X

D3 Channel LR
Normal load (D3 = 0)
Short load (D3 = 1)

D2 Channel LR
No output offset (D2 = 0)
Output offset detection (D2 = 1)

D1 Channel LR
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)

D0 Channel LR
No short to GND (D1 = 0)
Short to GND (D1 = 1)

13/17
TDA7562

B3
D7 Stand-by status (= IB1 - D4)

D6 Diagnostic status (= IB1 - D6)

D5 X

D4 Channel RF
Turn-on diagnostic (D4 = 0)
X

D3 Channel RF
Normal load (D3 = 0)
Short load (D3 = 1)

D2 Channel RF
No output offset (D2 = 0)
Output offset detection (D2 = 1)

D1 Channel RF
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)

D0 Channel RF
No short to GND (D1 = 0)
Short to GND (D1 = 1)

DB4
D7 X

D6 X

D5 X

D4 X

D3 Channel RR
RNormal load (D3 = 0)
Short load (D3 = 1)

D2 Channel RR
No output offset (D2 = 0)
Output offset detection (D2 = 1)

D1 Channel RR
No short to Vcc (D1 = 0)
Short to Vcc (D1 = 1)

D0 Channel RR
No short to GND (D1 = 0)
Short to GND (D1 = 1)

14/17
 TDA7562

Examples of bytes sequence

1 - Turn-On of the power amplifier with 30dB gain, mute on, diagnostic defeat, CD = 2%.
Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

X0000000 XXX1XX11

2 - Turn-Off of the power amplifier

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

X0XXXXXX XXX0XXXX

3 - Offset detection procedure enable

Start Address byte with D0 = 0 ACK IB1 ACK IB2 ACK STOP

XX1XX11X XXX1XXXX

4 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits
(D2 of the bytes DB1, DB2, DB3, DB4).
Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP

■ The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input
capacitor with anomalous leackage current or humidity between pins.
■ The delay from 4 to 5 can be selected by software, starting from T.B.D. ms

15/17
TDA7562

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.45 4.50 4.65 0.175 0.177 0.183 OUTLINE AND
B 1.80 1.90 2.00 0.070 0.074 0.079 MECHANICAL DATA
C 1.40 0.055
D 0.75 0.90 1.05 0.029 0.035 0.041
E 0.37 0.39 0.42 0.014 0.015 0.016
F (1) 0.57 0.022
G 0.80 1.00 1.20 0.031 0.040 0.047
G1 25.75 26.00 26.25 1.014 1.023 1.033
H (2) 28.90 29.23 29.30 1.139 1.150 1.153
H1 17.00 0.669
H2 12.80 0.503
H3 0.80 0.031
L (2) 22.07 22.47 22.87 0.869 0.884 0.904
L1 18.57 18.97 19.37 0.731 0.747 0.762
L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626
L3 7.70 7.85 7.95 0.303 0.309 0.313
L4 5 0.197
L5 3.5 0.138
M 3.70 4.00 4.30 0.145 0.157 0.169
M1 3.60 4.00 4.40 0.142 0.157 0.173
N 2.20 0.086
O 2 0.079
R 1.70 0.067
R1 0.5 0.02
R2 0.3 0.12
R3 1.25 0.049
R4 0.50 0.019
V 5˚ (Typ.)
V1 3˚ (Typ.) Flexiwatt27 (vertical)
V2 20˚ (Typ.)
V3 45˚ (Typ.)
(1): dam-bar protusion not included
(2): molding protusion included

V
C

B
V
H
H1
V3
H2 A
H3
O

R3

R4
L4

V1
R2
N
L2

R
L L1
V1
L3

V2

R2 D
R1

L5 R1 R1
Pin 1
E
G G1 F
FLEX27ME
M M1

7139011

16/17
 TDA7562

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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