High Efficiency Single Synchronous Buck PWM Controller: RT8240A/B/C

®
RT8240A/B/C
High Efficiency Single Synchronous Buck PWM Controller

General Description Features
The RT8240A/B/C PWM controller provides high efficiency, z Built-in 0.5% Reference Voltage
excellent transient response, and high DC output accuracy z 1 Bit Programmable Output Voltage Between 1V
needed for stepping down high voltage batteries to and 1.05V with Integrated Transition Support
generate low voltage CPU core, I/O, and chipset RAM z Output Voltage Range from 1V to 3.6V
supplies in notebook computers. z Quick Load-Step Response within 100ns
z Support Pure MLCC Output Capacitor
The RT8240A/B/C supports on chip voltage programming
z 4700ppm/°°C Programmable Current Limit by Low
function between 1V and 1.05V by controlling G0 digital
Side RDS(ON) Sensing
inputs.
z 4.5V to 26V Battery Input Range
The constant on-time PWM control scheme handles wide z Internal Ramp Current Limit Soft-Start Control
input/output voltage ratios with ease and provides 100ns z Drives Large Synchronous Rectifier FETs
“instant-on” response to load transients while maintaining z Integrated Boost Switch
a relatively constant switching frequency. z Over/Under Voltage Protection
The RT8240A/B/C achieves high efficiency at a reduced z Thermal Shutdown
cost by eliminating the current sense resistor found in z Power Good Indicator
traditional current mode PWMs. Efficiency is further z RoHS Compliant and Halogen Free
enhanced by its ability to drive very large synchronous
rectifier MOSFETs and enter diode emulation mode at
Applications
light load condition. The buck conversion allows this device z Notebook Computers
to directly step down high voltage batteries at the highest z CPU/GPU Core Supply
possible efficiency. The RT8240A/B/C is intended for CPU z Chipset/RAM Supply
core, chipset, DRAM, or other low voltage supplies as z Generic DC/DC Power Regulator
low as 1V. The RT8240A/B/C is available in a WQFN -12L
2x2 package. Pin Configurations
(TOP VIEW)
Ordering Information
GND
RT8240A/B/C
CS
G0
12 11 10
Package Type
QW : WQFN-12L 2x2 (W-Type) LGATE 1 9 PGOOD
PHASE 2 GND 8 EN
Lead Plating System 13
UGATE 3 7 RGND
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with 4 5 6
Halogen Free and Pb free)

VCC
BOOT
VOUT
Switching Frequency Operation

A : 300kHz WQFN-12L 2x2
B : 400kHz
C : 500kHz
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
DS8240A/B/C-04 January 2014 www.richtek.com

1
RT8240A/B/C
Marking Information
RT8240AGQW RT8240CGQW
45: Product Code 43 : Product Code
45W YMDNN : Date Code 43W YMDNN : Date Code
RT8240AZQW RT8240CZQW
45: Product Code 43 : Product Code
45W YMDNN : Date Code 43W YMDNN : Date Code
RT8240BGQW
29 : Product Code
29W YMDNN : Date Code
RT8240BZQW
29 : Product Code
29W YMDNN : Date Code
Typical Application Circuit

(1) Remote Sense
RT8240A/B/C
5 VCC
VCC BOOT 4 VIN
UGATE 3
9 PGOOD
PHASE 2 VOUT
Chip Enable
8 EN
LGATE 1
11
G0
12, 13 (Exposed Pad) 6
GND VOUT Remote (+)
10 RGND 7 Remote (-)
CS
www.richtek.com DS8240A/B/C-04 January 2014

2
RT8240A/B/C
(2) Local Sense
RT8240A/B/C
5 VCC
VCC BOOT 4 VIN
UGATE 3
9 PGOOD
PHASE 2 VOUT
Chip Enable
8 EN
LGATE 1
11
G0
12, 13 (Exposed Pad) VOUT 6
GND
10 RGND 7
CS
VID Table
G0 VOUT
0 1V
1 1.05V

3
RT8240A/B/C
Functional Pin Description
Pin No. Pin Name Pin Function
1 LGATE Gate Drive Output for Low Side External MOSFET.
External Inductor Connection Pin for PWM Converter. It behaves as the current
2 PHASE sense comparator input for low side MOSFET RDS(ON) sensing and reference
voltage for on time generation.
3 UGATE Gate Drive Output for the High Side External MOSFET.
Supply Input for High Side Driver. Connect a capacitor to the floating node
4 BOOT
(PHASE) pin.
Control Voltage Input. Provides the power for the buck controller, the low side
5 VCC driver and the bootstrap circuit for high side driver. Bypass to GND with a 4.7μF
ceramic capacitor.
6 VOUT Output Voltage Feedback Input. Connect VOUT to converter output node.
7 RGND Remote Voltage Sense Ground Pin.
8 EN PWM Enable Pin. Pull low to GND to disable the PWM.
9 PGOOD Open Drain Power Good Indicator. High impedance indicates power is good.
Current Limit Threshold Setting Input. Connect a setting resistor to GND and
10 CS
the current limit threshold is equal to 1/8 of the voltage at this pin.
11 G0 Input Pin for Programming the Output Voltage Between 1V and 1.05V.
12, Ground. The exposed pad must be soldered to a large PCB and connected to
GND
13 (Exposed Pad) GND for maximum power dissipation.
Function Block Diagram
TRIG
PHASE On-time compute TON
One shot BOOT
R
- - COMP
GM UG RDS(ON)
+ + S Q DRV UGATE
BST switch
resistance
PHASE
VREF 1V Min toff
Q TRIG
VCC
+ OV Latch One shot
120% VREF - S1 Q DRV LGATE
LG RDS(ON)
ZCD + GND
- UV Latch
70% VREF + S1 Q - PGOOD
leakage
-
90% VREF +
Voltage Thermal FCCM/DEM
G0
Programmer Shutdown OC
SS 10µA
VOUT + threshold
Timer
RGND - 1/8 CS
EN

4
RT8240A/B/C
Absolute Maximum Ratings (Note 1)
z VCC, VOUT, PGOOD, EN, CS, G0 to GND ------------------------------------------------------------------------- −0.3V to 6V
z RGND to GND -------------------------------------------------------------------------------------------------------------- −0.7V to 0.7V
z PHASE to GND
DC ----------------------------------------------------------------------------------------------------------------------------- −0.3V to 32V

<20ns ------------------------------------------------------------------------------------------------------------------------ −8V to 38V
z BOOT to PHASE ----------------------------------------------------------------------------------------------------------- −0.3V to 6V
z UGATE to PHASE
DC ----------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
<20ns ------------------------------------------------------------------------------------------------------------------------ −5V to 7.5V
z LGATE to GND
DC ----------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
<20ns ------------------------------------------------------------------------------------------------------------------------ −2.5V to 7.5V
z Power Dissipation, PD @ TA = 25°C
WQFN-12L 2x2 ------------------------------------------------------------------------------------------------------------ 0.606W

z Package Thermal Resistance (Note 2)
WQFN-12L 2x2, θJA ------------------------------------------------------------------------------------------------------- 165°C/W

z Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C
z Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C
z Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------------- 2kV

MM (Machine Model) ----------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)

z Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 4.5V to 26V
z Control Voltage, VCC ------------------------------------------------------------------------------------------------------ 4.5V to 5.5V
z Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VCC = 5V, VIN = 8V, VEN = 5V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
PWM Controller
FB forced above the regulation
VCC Quiescent Supply Current IQ -- 500 1250 μA
point, VEN = 5V
VCC Shutdown Current ISHDN VCC current, VEN = 0V -- -- 1 μA
CS Shutdown Current CS pull to GND -- -- 1 μA
VOUT Error Comparator Threshold VCC = 4.5 to 5.5V, DEM −0.5 0 0.5 %
VOUT Voltage Range VOUT 1 -- 3.6 V
RT8240A fSW = 300kHz, VOUT = 1.05V 371 437 502
On-Time, Pulse Width RT8240B tON fSW = 400kHz, VOUT = 1.05V 279 328 377 ns
RT8240C fSW = 500kHz, VOUT = 1.05V -- 262 --

5
RT8240A/B/C
Minimum Off-Time tOFF 250 400 550 ns
Current Sensing
CS Source Current ICS CS to GND 9 10 11 μA
CS Source Current Temperature
-- 4700 -- ppm/°C
Coefficient
Zero Crossing Threshold −10 -- 5 mV
Protection Function
Current Limit ILIM GND − PHASE = VCS / 8 −20 0 20 mV
Negative Current Limit PHASE − GND = VCS / 8 -- 3 -- mV
Output Under Voltage Protection
VUVP 65 70 75 %
Threshold
With respect to error
Over Voltage Protection VOVP 115 120 125 %
comparator threshold
VOUT forced above OVP
OVP Fault Delay -- 5 -- μs
threshold
VCC Under Voltage Lockout Rising edge, PWM disabled
VUVLO 3.6 3.8 4 V
(UVLO) Threshold below this level
VCC UVLO Hysteresis ΔVUVLO -- 100 -- mV
VOUT Soft-Start From EN = high to VOUT = 95% -- 1300 -- μs
UV Blank Time From EN signal going high -- 3 -- ms
Thermal Shutdown TSD -- 150 -- °C
Thermal Shutdown Hysteresis ΔTSD -- 10 -- °C
Driver On Resistance
UGATE Driver Source RUGATEsr BOOT − PHASE forced to 5V -- 1.8 3.6 Ω
UGATE Driver Sink RUGATEsk BOOT − PHASE forced to 5V -- 1.2 2.4 Ω
LGATE Driver Source RLGATEsr LGATE, High State -- 1.8 3.6 Ω
LGATE Driver Sink RLGATEsk LGATE, Low State -- 0.67 1.34 Ω
LGATE Rising (VPHASE = 1.5V) -- 30 --
Dead Time ns
UGATE Rising -- 30 --
Internal Boost Charging Switch
VCC to BOOT, 10mA -- -- 80 Ω
On Resistance
EN Threshold
EN Input Logic-High 1.8 -- --
V
Threshold Voltage Logic-Low -- -- 0.5
Voltage Programming Input Threshold
G0 Input Logic-High 735 -- --
mV
Threshold Voltage Logic-Low -- -- 315

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RT8240A/B/C
PGOOD (upper side threshold determined by OVP threshold)
Falling edge, measured at
Trip Threshold VOUT, with respect to −19 −15 −11 %
reference, no load.
Trip Hysteresis -- 3 -- %
Falling edge, VOUT forced
Fault Propagation Delay -- 2.5 -- μs
below PGOOD trip threshold
Output Low Voltage ISINK = 1mA -- -- 0.4 V
Leakage Current High state, forced to 5V -- -- 1 μA
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions may affect device reliability.
Note 2. θJA is measured at TA = 25°C on a low effective thermal conductivity single-layer test board per JEDEC 51-3.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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RT8240A/B/C
Typical Operating Characteristics
VOUT Efficiency vs. Load Current VOUT Efficiency vs. Load Current
100 100
90 90
80 80
70 70
Efficiency (%)
Efficiency (%)
60 60
50 50
40 40
30 30
20 20
10 VIN = 8V, VOUT = 1.05V, 10 VIN = 12V, VOUT = 1.05V,
EN = G0 = VCC EN = G0 = VCC
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)
VOUT Efficiency vs. Load Current VOUT Switching Frequency vs. Load Current
100 480
VIN = 8V, VOUT = 1.05V,
90 440
EN = G0 = VCC
Switching Frequency (kHz)1
400
80
360
70
320
Efficiency (%)
60 280
50 240
40 200
160
30
120
20
80
10 VIN = 20V, VOUT = 1.05V,
40
EN = G0 = VCC
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
VOUT Switching Frequency vs. Load Current VOUT Switching Frequency vs. Load Current
480 480
VIN = 12V, VOUT = 1.05V, VIN = 20V, VOUT = 1.05V,
440 440 EN = G0 = VCC
EN = G0 = VCC
400 400
360 360
320 320
280 280
240 240
200 200
160 160
120 120
80 80
40 40
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10

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RT8240A/B/C
VOUT Output Voltage vs. Load Current Standby Current vs. Input Voltage
1.062 680
1.061 670
Standby Current (μA)

1.060
Output Voltage (V)
660
1.059
650
1.058
640
1.057
630
1.056
1.055 VIN = 12V, VOUT = 1.05V, 620

EN = G0 = VCC EN = VCC, No Load
1.054 610
0.001 0.01 0.1 1 10 5 7 9 11 13 15 17 19 21 23 25
Load Current (A) Input Voltage (V)
Shutdown Input Current vs. Input Voltage Power On from EN

1.0
0.9
Shutdown Input Current (μA)1
0.8
PGOOD
(5V/Div)
0.7
0.6
EN
0.5 (5V/Div)
0.4
0.3
PHASE
(10V/Div)
0.2
VOUT VIN = 12V, VOUT = 1.05V,
0.1 (2V/Div)
EN = GND, No Load EN = G0 = VCC, IOUT = 0.1A
0.0
5 7 9 11 13 15 17 19 21 23 25 Time (1ms/Div)
Input Voltage (A)
Power Off from EN Dynamic VID Up

VIN = 12V, VOUT = 1.05V,
G0
EN = G0 = VCC, IOUT = 0.1A VIN = 12V, VOUT = 1V up to 1.05V
(10V/Div)
PGOOD
1.05V
(5V/Div)
VOUT
(20mV/Div)
EN
1V
(5V/Div)
PHASE UGATE
(10V/Div) (20V/Div)
VOUT LGATE
(2V/Div) (10V/Div) EN = VCC, No Load
Time (2ms/Div) Time (20μs/Div)

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RT8240A/B/C
Dynamic VID Down VOUT DEM-Mode Load Transient Response

VIN = 12V, VOUT = 1.05V down to 1V VIN = 12V, VOUT = 1.05V,
G0 EN = G0 = VCC, IOUT = 0A to 8.5A
(10V/Div)
1.05V
VOUT_ac
(20mV/Div)
VOUT
(20mV/Div)
1V
I LOAD
(5A/Div)
UGATE UGATE
(20V/Div) (20V/Div)
LGATE LGATE
(10V/Div) EN = VCC, No Load
(10V/Div)
Time (20μs/Div) Time (100μs/Div)
OVP UVP
VIN = 12V, VOUT = 1.05V,
EN = G0 = VCC, No Load
PGOOD PGOOD
(5V/Div) (5V/Div)
LGATE UGATE
(5V/Div) (20V/Div)
LGATE
(10V/Div)
VOUT VOUT VIN = 12V, VOUT = 1.05V,

(500mV/Div) (1V/Div) EN = G0 = VCC
Time (100μs/Div) Time (100μs/Div)

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RT8240A/B/C
Application Information
The RT8240A/B/C is a single, Mach ResponseTM PSRTM and inversely proportional to input voltage. The
mode synchronous buck controller which supports chip implementation results in a nearly constant switching
voltage programming function between 1V and 1.05V by frequency without the need a clock generator.
controlling the G0 digital input. The Richtek's PSRTM
technology is specifically designed to support low ESR Diode Emulation Mode
output capacitor system. The Richtek's Mach ResponseTM In diode-emulation mode, the RT8240A/B/C automatically
technology provides fast response to load steps. The reduces switching frequency at light load conditions to
topology circumvents the poor load transient timing maintain high efficiency. This reduction of frequency is
problems of fixed-frequency current mode PWMs while achieved smoothly and without increasing VOUT ripples or
avoiding the problems caused by widely varying switching load regulation. As the output current decreases from heavy
frequency in conventional constant-on-time and constant- load condition, the inductor current is also reduced, and
off-time PWM schemes. A special adaptive on-time control eventually comes to the point that its valley touches zero
trade off the performance and efficiency over wide input current, which is the boundary between continuous
voltage range. The PSRTM mode PWM modulator is conduction and discontinuous conduction modes. By
specifically designed to have better noise immunity for emulation the behavior of diodes, the low side MOSFET
such a single output application. allows only partial of negative current when the inductor
freewheeling current reach negative. As the load current
PWM Operation is further decreased, it takes longer and longer to discharge
The Mach ResponseTM PSRTM mode controller internally the output capacitor to the level than requires the next
provides a pseudo ramp signal, so the controller can “ON” cycle. The on-time is kept the same as that in the
support low ESR output capacitor to increase the flexibility heavy load condition. In reverse, when the output current
of output capacitor selection. Refer to the function block increases from light load to heavy load, the switching
diagram of RT8240A/B/C, the synchronous high side frequency increases to the preset value as the inductor
MOSFET will be turned on at the beginning of each cycle. current reaches the continuous condition. The transition
After the internal one shot timer expires, the MOSFET load point to the light load operation can be calculated as
will be turned off. The pulse width of this one shot is follows (Figure 1) :
determined by the converter's input voltage and the output (VIN − VOUT )
ILOAD ≈ × tON
voltage to keep the frequency constant in a specific input 2L
voltage range. Another one shot sets a minimum off-time where tON is the on-time.
(400ns typ.). The on-time one shot will be triggered if the IL
Slope = (VIN-VOUT) / L
error comparator is high, the low side switch current is IL_Peak
below the current limit threshold, and the minimum off-
time one shot has timed out.
ILOAD = IL_Peak/2
On-Time Control
The on-time one shot comparator has two inputs. One t
0
tON
input monitors the output voltage, while the other input
Figure 1. Boundary Condition of CCM/DCM
samples the input voltage and converts it to a current.
This input voltage proportional current is used to charge The switching waveforms may appear noisy and
an internal on-time capacitor. The on-time is the time asynchronous when light loading causes diode emulation
required for the voltage on this capacitor to charge from operation, but this is a normal operating condition that
zero volts to VOUT, thereby making the on-time of the results in high light load efficiency. Trade-offs in DEM noise
high side switch directly proportional to output voltage vs. light load efficiency is made by varying the inductor

11
RT8240A/B/C
value. Generally, low inductor values produce a broader 1V reference. The G0 digital input control the gate of
efficiency vs. load curve, while higher values result in higher internal MOSFET whose drain is connected to the bottom
full load efficiency (assuming that the coil resistance resistor of the internal resistor divider (Figure 3). A logic
remains fixed) and less output voltage ripple. The high signal on G0 will be selected to the internal resistor
disadvantages for using higher inductor values include divider.
larger physical size and degrade load transient response When the G0 input changes state, the change quickly
(especially at low input voltage levels). causes three actions :
Output Voltage Setting ` Change from uni-feedback to internal resistor divider.
The RT8240A/B/C output voltage can be adjusted from ` The PGOOD output is temporarily latched into its present
1V to 3.6V by setting the feedback resistor R1 and R2, state. This prevents chattering or false tripping while
see Figure 2 (a). With G0 in low state, the VOUT is at the VOUT moves to the new level.
lowest value (1V). Choose R2 to be approximately 10kΩ, ` When G0 changes state whether DEM is set or not,
and solve for R1 using the below equation : then enter the PWM mode and count 32 clock cycles.
VOUT = VREF × ⎛⎜ 1 + R1 ⎞⎟ where VREF is 1V typically. For the duration of 32 clock cycles, the RT8240A/B/C
⎝ R2 ⎠
will keep to monitor the UVP and OVP function. This
The RT8240A/B/C output voltage can also set by
behavior allows the output to slew down to the new level
differential, remote sense inputs to eliminate the effects
with tripping the OVP or UVP function when the G0
of voltage drops along PC board traces. Connect to VOUT
change causes a rapid change at VOUT pin.
to Remote (+) and connect to RGND to Remote (−), see
VREF = 1V VOUT
Figure 2 (b). VOUT
VIN
VOUT
UGATE
PHASE
LGATE G0
GND R1
VOUT
R2 Figure 3. Output Voltage Selection by G0 Input

RGND
Output Voltage Transition Operation
(a) Resistor Divider
The digital input control pin G0 allows VOUT to transition
VIN
to both higher and lower values. For a down transition, the
VOUT rapid change G0 from high to low suddenly will cause VOUT
UGATE
to go above 1V. At this time, the LGATE will drive high to
PHASE
LGATE
turn on the low side MOSFET and draw current from the
GND output capacitor via the inductor. The LGATE will remain
VOUT Remote (+) on until VOUT falls to 1V, at which point a normal UGATE
RGND Remote (-) switching cycle begins, as shown in Figure 4. For a down
(b) Remote sense transition, the low side MOSFET stays on before VOUT
reaches to 1V, thus the negative inductor current will be
Figure 2. Setting VOUT
increased. If the negative current too large to trigger the
Output Voltage Transition Control negative current limit, the low side MOSFET is turned off
The RT8240A/B/C provides one digital input G0 to allow which can avoid too much negative current to damage
selection among two output voltages. The output voltage component. Refer to the Negative Current Limit section
is regulated by comparing the VOUT pin to the internal for a full description.

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RT8240A/B/C
G0
GND G0 GND
VOUT
VOUT
UGATE UGATE
LGATE LGATE
Initial VOUT
VOUT
Final VOUT Final VOUT
VOUT
Figure 4. Output Voltage Down Transition Initial VOUT
Figure 6. Output Voltage Up Transition with
For an up transition (from lower to higher VOUT) as shown
Overshooting
in Figure 5, the G0 change from low to high and causes
VOUT to drop below 1V. This quickly trips the comparator The overshooting can be approximated by the following
regardless of whether DEM is active or not, generating an equation, where ICL is the current limit, VFINAL is the
UGATE on-time and a subsequent LGATE will be turned desired set point for the final voltage, L is in μH and COUT
on. At the end of the minimum off-time (400ns), if VOUT is is in μF :
still below 1V then another UGATE on-time is started. I 2 ×L
VMAX = ( CL ) + VFINAL2
This sequence continues until the VOUT pin exceeds 1V. COUT
G0 GND Current Limit Setting (CS)

The RT8240A/B/C provides cycle-by-cycle current limiting
VOUT
control. The current limit circuit employs a unique “Valley”
current sensing algorithm. If the magnitude of the current
UGATE
sense signal at PHASE is above the current limit
threshold, the PWM is not allowed to initiate a new cycle
(Figure 7). The actual peak current is greater than the
LGATE
Minimum off-time current limit threshold by an amount equal to the inductor
ripple current. Therefore, the exact current limit
Final VOUT
characteristic and maximum load capability are a function
VOUT Initial VOUT
of the sense resistance, inductor value, and battery and
Figure 5. Output Voltage Up Transition output voltage.
If the VOUT change is significant, there can be several
IL
consecutive cycle of UGATE on-time followed by minimum
IL, peak
LGATE time. This can cause a rapid increase in inductor
current : typically it only takes a few switching cycles for ILoad
inductor current to rise up to the current limit. At some ILIM
point the VOUT will rise up to 1V and the UGATE pulses
will cease, but the inductor's LI2 energy must then flow
t
into the output capacitor. This can create a significant 0
overshoot, as shown in Figure 6. Figure 7. “Valley” Current Limit

13
RT8240A/B/C
The RT8240A/B/C uses the on resistance of the MOSFET is turned off, the high side MOSFET is then
synchronous rectifier as the current sense element and turned on, and the device resumes normal operation.
supports temperature compensated MOSFET RDS(ON)
sensing The RILIM setting resistor between CS pin and MOSFET Gate Driver (UGATE, LGATE)
GND sets the current limit threshold. The CS pin sources The high side driver is designed to drive high current, low
ICS current, which is 10μA typically at room temperature RDS(ON) N-MOSFET (s). When configured as a floating driver,
and this current has 4700ppm/°C temperature slope to 5V bias voltage is delivered from VCC supply. The average
compensate the temperature dependency of the RDS(ON). drive current is proportional to the gate charge at VGS =
When the voltage drop across low side MOSFET equals 5V times switching frequency. The instantaneous drive
the voltage across the RILIM setting resistor, positive current current is supplied by the flying capacitor between BOOT
limit will activate. The high side MOSFET will not be turned and PHASE pins. A dead time to prevent shoot through is
on until the voltage drop across the MOSFET falls below internally generated between high side MOSFET off to
the current limit threshold. low side MOSFET on, and low side MOSFET off to high
side MOSFET on. The low side driver is designed to drive
Choose a current limit setting resistor by following
high current, low RDS(ON) N-MOSFET (s). The internal pull-
equation :
down transistor that drives LGATE low is robust, with a
RILIM = (IILIM x RDS(ON)) x 8 / ICS 0.67Ω typical on resistance. A 5V bias voltage is delivered
Moreover, the recommended resistance value range form VCC supply. The instantaneous drive current is
between 40kΩ to 160kΩ. supplied by the flying capacitor between VCC and GND.
Carefully observe the PC board layout guidelines to ensure For high current applications, some combinations of high
that noise and DC errors do not corrupt the current sense and low side MOSFETs might be encountered that will
signal seen by PHASE and GND. cause excessive gate-drain coupling, which can lead to
efficiency killing, EMI-producing shoot through currents.
Negative Over Current Limit (CCM Only) This is often remedied by adding a resistor in series with
The RT8240A/B/C also supports cycle-by-cycle negative BOOT, which increases the turn-on time of the high side
over current limiting in CCM Mode only. The over current MOSFET without degrading the turn-off time, as shown in
limit is set to be negative but is the same absolute value Figure 8.
as the positive over current limit. If output voltage continues VIN
to rising, the low side MOSEFT stays on, thus inductor
UGATE
current is reduced and reverses direction after it reaches R
BOOT
zero. When there is too much negative current in the
inductor, the low side MOSFET is turned off and the current PHASE
flows to VIN through the body diode of the high side Figure 8. Increasing the UGATE Rise Time
MOSFET. Because this protection limits current to
discharge the output capacitor, output voltage tends to Power Good Output (PGOOD)
rise, eventually hitting the over voltage protection threshold The power good output is an open-drain output and requires
and shutdown. If the device hits the negative over current a pull-up resistor. When the output voltage is 15% above
threshold again before output voltage is discharged to the or 15% below its set voltage, PGOOD gets pulled low. It
target level, the low side MOSFET is turned off and process is held low until the output voltage returns to within these
repeats. It ensures maximum allowable discharge tolerances once more. In soft start, PGOOD is actively
capability when output voltage continues to rise. On the held low and is allowed to transition high until soft start is
other hand, if the output is discharged to the target level over and the output reaches 88% of its set voltage. There
before negative current threshold is reached, the low side is a 2.5μs delay built into PGOOD circuitry to prevent
false transition.

14
RT8240A/B/C
POR, UVLO and Soft-Start Thermal Protection
Power On Reset (POR) occurs when VCC rises above to The RT8240A/B/C monitors the temperature of itself. If
approximately 4V. After POR is triggered, the RT8240A/ the temperature exceeds the threshold value, 150°C (typ.),
B/C will reset the fault latch and prepare the PWM for all internal circuitry is inactive during thermal shutdown.
operation. Below 3.8V (typ.), the VCC Under Voltage The RT8240A/B/C is latched once thermal shutdown is
Lockout (UVLO) circuitry inhibits switching by keeping triggered and can only be released by toggling EN or VCC
UGATE and LGATE low. A built-in soft-start is used to power on reset.
prevent surge current from power supply input after EN is
enabled. It clamps the ramping of the internal reference Output Inductor Selection
voltage which is compared with FB signal. The typical The switching frequency (on-time) and operating point (%
soft-start duration is 1.3ms. ripple or LIR) determine the inductor value as follows :
t × (VIN − VOUT )
L = ON
Over Voltage Protection (OVP) LIR × ILOAD(MAX)
The output voltage can be continuously monitored for over where LIR is the ratio of the peak to peak ripple current to
voltage. If the output exceeds 20% of its set voltage the maximum average inductor current.
threshold, over voltage protection is triggered and the Find a low loss inductor having the lowest possible DC
LGATE low side gate driver is forced high. This activates resistance that fits in the allotted dimensions. Ferrite cores
the low side MOSFET switch which rapidly discharges are often the best choice, although powdered iron is
the output capacitor and reduces the input voltage. The inexpensive and can work well at 200kHz. The core must
RT8240A/B/C will be latched once OVP is triggered and be large enough not to saturate at the peak inductor current
only be released by toggling EN or VCC power on reset. (IPEAK) :
There is a 5μs delay built into the OVP circuit to prevent
false alarm. IPEAK = ILOAD(MAX) + ⎛⎜ LIR × ILOAD(MAX) ⎞⎟
⎝ 2 ⎠
Note that LGATE latching high causes the output voltage The calculation above shall serve as a general reference.
to dip slightly negative when energy has been previously To further improve transient response, the output inductor
stored in the LC tank circuit. For loads that cannot tolerate could be reduced further. This needs to be considered
a negative voltage, place a power Schottky diode across along with the selection of the output capacitor.
the output to act as a reverse polarity clamp.
Output Capacitor Selection
If the over voltage condition is caused by a short in high
The capacitor value and ESR determines the amount of
side switch, turning the low side MOSFET on 100%
output voltage ripple and load transient response. So, the
creates an electrical short between the battery and GND,
capacitor value must be greater than the largest value
blowing the fuse and disconnecting the battery from the
calculated from below equations.
output.
( ΔILOAD )2 × L × ( tON + tOFF(MIN) )
VSAG =
Under Voltage Protection (UVP) 2 × COUT ⎡⎣ VIN × tON − VOUT × ( t ON + tOFF(MIN) ) ⎤⎦
The output voltage can be continuously monitored for under
( ΔILOAD )2 × L
voltage. When under voltage protection is enabled, if the VSOAR =
2 × COUT × VOUT
output is less than 70% of its set voltage threshold, under
voltage protection is triggered, then both UGATE and VP-P = LIR × ILOAD(MAX) × ⎛⎜ ESR + 1 ⎞
⎟
⎝ 8 × COUT × f ⎠
LGATE gate drivers are forced low. In order to remove the
Where VSAG and VSOAR are the allowable amount of
residual charge on the output capacitor during the under
undershoot voltage and overshoot voltage in load transient,
voltage period, if PHASE is greater than 1V, the LGATE
VP-P is output ripple voltage, tOFF(MIN) is minimum off-time.
is forced high until PHASE is lower than 1V. During soft-
start, the UVP blanking time is 3ms.

15
RT8240A/B/C
Thermal Considerations Layout Considerations
For continuous operation, do not exceed absolute Layout is very important in high frequency switching
maximum junction temperature. The maximum power converter design. If designed improperly, the PCB could
dissipation depends on the thermal resistance of the IC radiate excessive noise and contribute to the converter
package, PCB layout, rate of surrounding airflow, and instability.
difference between junction and ambient temperature. The For best performance of the RT8240A/B/C, the following
maximum power dissipation can be calculated by the guidelines should be strictly followed.
following formula :
Connect RC low pass filter from VCC, 1μF and 10Ω are
PD(MAX) = (TJ(MAX) − TA) / θJA recommended. Place the filter capacitor close to the IC.
where TJ(MAX) is the maximum junction temperature, TA is ` Keep current limit setting network as close as possible
the ambient temperature, and θJA is the junction to ambient to the IC. Routing of the network should be kept away
thermal resistance. from high voltage switching nodes to prevent it from
For recommended operating condition specifications, the coupling.
maximum junction temperature is 125°C. The junction to ` Connections from the drivers to the respective gate of
ambient thermal resistance, θJA, is layout dependent. For the high side or the low side MOSFET should be as
WQFN-12L 2x2 packages, the thermal resistance, θJA, is short as possible to reduce stray inductance.
165°C/W on a standard JEDEC 51-3 single-layer thermal
` All sensitive analog traces and components such as
test board. The maximum power dissipation at TA = 25°C
VOUT, RGND, EN, PGOOD, CS, G0 and VCC should
can be calculated by the following formula:
be placed away from high voltage switching nodes such
PD(MAX) = (125°C − 25°C) / (165°C/W) = 0.606W for as PHASE, LGATE, UGATE, or BOOT nodes to prevent
WQFN-12L 2X2 package it from coupling. Use internal layer (s) as ground plane
The maximum power dissipation depends on the operating (s) and shield the feedback trace from power traces and
ambient temperature for fixed T J(MAX) and thermal components.
resistance, θJA. The derating curve in Figure 9 allows the ` Current sense connections must always be made using
designer to see the effect of rising ambient temperature Kelvin connections to ensure an accurate signal, with
on the maximum power dissipation. the current limit resistor located at the device.
0.65
Single-Layer PCB ` Power sections should connect directly to ground plane
Maximum Power Dissipation (W)1
0.60
0.55 (s) using multiple vias as required for current handling
0.50 (including the chip power ground connections). Power
0.45
components should be placed to minimize loops and
0.40
0.35 reduce losses.
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0 25 50 75 100 125
Ambient Temperature (°C)
Figure 9. Derating Curve of Maximum Power Dissipation

16
RT8240A/B/C
Outline Dimension
1 1
2 2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.
Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.150 0.250 0.006 0.010
D 1.900 2.100 0.075 0.083
E 1.900 2.100 0.075 0.083
e 0.400 0.016
D2 0.850 0.950 0.033 0.037
E2 0.850 0.950 0.033 0.037
L 0.250 0.350 0.010 0.014
W-Type 12L QFN 2x2 Package
Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

17

High Efficiency Single Synchronous Buck PWM Controller: RT8240A/B/C

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High Efficiency Single Synchronous Buck PWM Controller

Halogen Free and Pb free)

Switching Frequency Operation

DS8240A/B/C-04 January 2014 www.richtek.com

Typical Application Circuit

www.richtek.com DS8240A/B/C-04 January 2014

DS8240A/B/C-04 January 2014 www.richtek.com

Function Block Diagram

www.richtek.com DS8240A/B/C-04 January 2014

DC ----------------------------------------------------------------------------------------------------------------------------- −0.3V to 32V

WQFN-12L 2x2 ------------------------------------------------------------------------------------------------------------ 0.606W

WQFN-12L 2x2, θJA ------------------------------------------------------------------------------------------------------- 165°C/W

HBM (Human Body Model) ---------------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

DS8240A/B/C-04 January 2014 www.richtek.com

www.richtek.com DS8240A/B/C-04 January 2014

DS8240A/B/C-04 January 2014 www.richtek.com

Switching Frequency (kHz)1

www.richtek.com DS8240A/B/C-04 January 2014

Standby Current (μA)

1.055 VIN = 12V, VOUT = 1.05V, 620

Shutdown Input Current vs. Input Voltage Power On from EN

Power Off from EN Dynamic VID Up

Time (2ms/Div) Time (20μs/Div)

DS8240A/B/C-04 January 2014 www.richtek.com

Dynamic VID Down VOUT DEM-Mode Load Transient Response

VOUT VOUT VIN = 12V, VOUT = 1.05V,

Time (100μs/Div) Time (100μs/Div)

www.richtek.com DS8240A/B/C-04 January 2014

DS8240A/B/C-04 January 2014 www.richtek.com

Output Voltage Setting ` Change from uni-feedback to internal resistor divider.

R2 Figure 3. Output Voltage Selection by G0 Input

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G0 GND Current Limit Setting (CS)

DS8240A/B/C-04 January 2014 www.richtek.com

www.richtek.com DS8240A/B/C-04 January 2014

DS8240A/B/C-04 January 2014 www.richtek.com

www.richtek.com DS8240A/B/C-04 January 2014

Note : The configuration of the Pin #1 identifier is optional,

Dimensions In Millimeters Dimensions In Inches

W-Type 12L QFN 2x2 Package

Richtek Technology Corporation

DS8240A/B/C-04 January 2014 www.richtek.com

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