IPC-TM-650 Test Methods Manual: 3000 Lakeside Drive, Suite 105N Bannockburn, IL 60015-1249

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Number

2.5.5.14
Subject
Measuring High Frequency Signal Loss and
3000 Lakeside Drive, Suite 105N Propagation on Printed Boards with Frequency
Bannockburn, IL 60015-1249
Domain Methods
Date Revision
02/2021
IPC-TM-650 Originating Task Group
TEST METHODS MANUAL High Frequency Signal Loss Test Methods Task
Group (D-24D)

1 Scope and Purpose test fixtures (between A and B, A’ and B’) need to be charac-
terized and then de-embedded to recover the insertion loss of
1.1 Scope This document describes the frequency domain DUT.
test methods to accurately determine the amount of signal
propagation loss and delay for electrical printed boards, to
meet the demand of high speed applications nowadays. As
the data rate of high speed IO continues to increase (e.g., 10
Gbps and above), production testing and development testing
require more precise and accurate high frequency methods.
(Existing IPC-TM-650 Test Methods such as Method IPC-25514-1-1
2.5.5.12A are not adequate). Additionally, previous IPC test
methods do not encompass traditional industry methods Figure 1-1 Reference Planes in Printed Board Insertion
Loss Characterization
using VNA, such as thru-reflect-line (TRL), and recent devel-
opments of 2X-Thru test methods, etc. This test method is
defined to close the gaps. Microwave probes are often used to probe interconnect struc-
tures for quick measurement, as shown Figure 1-2. A similar
The scope of this test method includes: calibration or de-embedding procedure is needed to move the
• Calibration and/or de-embedding techniques reference plane to the target location (Ref plane B and B’
shown in the figure). Note that sometimes, an SOLT calibra-
• Probing/test fixture choices that impact measurement tion procedure can be carried out using calibration substrates
quality provided by probe vendor, to move the reference plane to the
• Coupon Design probe tip, but it does not move the reference plane to the tar-
get location and additional de-embedding procedure is still
• Test sample pre-conditioning needed.
• Environmental impact, etc.

1.2 Purpose

1.2.1 The importance of Setting up Correct Reference


Plane for Printed Board Characterization The impor-
tance of setting up a correct reference plane in a typical inter-
connect measurement setup is illustrated in Figure 1-1. The
vector network analyzer (VNA) has been the de-facto standard
for accurate passive interconnect characterization including
the printed circuit board, connector, cables, etc. Making high
IPC-25514-1-2
quality VNA measurement is straight-forward with standard
coaxial connectors and precision SOLT (short, open, load, Figure 1-2 Reference Planes in Printed Board Insertion
through) calibration kits. However, test fixtures are usually Loss Characterization with Microwave Probe
required to connect the standard coaxial connectors to the
non-coaxial device under test (DUT). SOLT calibration can In a general calibration/de-embedding process, specialized
readily move the reference plane to Ref plane A and Ref plane calibration standards with known electrical properties are
A’ in the figure, while the intended DUT is the printed board inserted at the end of the test fixture, and a calibration pro-
conductor only (between Ref plane B and Ref plane B’). The cess is performed to move the reference plane to the end of

Material in this Test Methods Manual was voluntarily established by Technical Committees of IPC. This material is advisory only
and its use or adaptation is entirely voluntary. IPC disclaims all liability of any kind as to the use, application, or adaptation of this Page 1 of 11
material. Users are also wholly responsible for protecting themselves against all claims or liabilities for patent infringement.
Equipment referenced is for the convenience of the user and does not imply endorsement by IPC.
IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

the test fixture. The accuracy of the measurement relies highly


on the quality of the physical calibration standards, especially
for SOLT type of calibration standards, where the parasitics of
the SOLT calibration standard must be known a priori. How-
ever, for printed board structures, it is not feasible to build an
accurate broadband SOLT structure right after the test fixture.
Hence the on-board SOLT calibration process usually does
not work well above a few GHz.

There are existing calibration/de-embedding methods in the


industry for general purpose interconnect characterization to
move the calibration reference plane from the coaxial connec-
tor to printed board interfaces. These methods are proven by
the industry and are applicable to printed board characteriza-
tion as well. Two of such methods are outlined in 1.3.1 and
1.3.2. However, for the accurate characterization of propaga-
tion constant of the uniform transmission line section, simpler
and more universal technique can be used as outlined in
IPC-25514-1-3
1.2.2.
Figure 1-3 Two-line Structure for Eigenvalue-based
1.2.2 Eigenvalue based De-embedding Methodology for Method
Printed Board Trace Insertion Loss Measurement For
printed board trace characterization, there are simple If we pick the mid-point of L1 structure, and use T-matrices to
approaches to derive the printed board insertion loss, when describe the network parameter of left and right portion of the
the DUT is a uniform transmission line. There are multiple pub- structure as TA and TB, then we have
lications proposed that using T-matrix of an ideal transmission TL1 = TA x TB (Eq. 2)
line segment can significantly simplify the de-embedding algo-
TL2 = TA x TDUT x TB (Eq. 3)
rithm. The T-matrix is diagonal exponential in the modal space
when normalized to the modal characteristic impedance of the where DUT is the transmission line with length of L2-L1. From
transmission line [1]-[6]. If T-matrix of a multi-conductor line (1) and (2) we can easily get
segment is converted to S-matrix, the result is an -1
TL2 x TL1 = TA x TDUT x TB x TB-1 x TA-1 = TA x TDUT x TA-1 (Eq. 4)
S-parameters (where reference impedance is defined as the
-1
characteristic impedance of the transmission line): Therefore, TL2 x TL1 and TDUT are similar matrices and should
have the same eigenvalue. Meanwhile, assuming the DUT is a

[ ]
uniform transmission line, we have:
0 e−γ L
SDUT = (Eq.1)
e−γ L

[
0

where γ is the complex propagation constant, and L the line


length. An eigenvalue based de-embedding procedure can be
TDUT =
eγ (L2-L1)
0 e
0
−γ (L2-L1) ] (Eq.5)

carried out utilizing the above assumptions, by measuring S Where γ is the complex propagation constant of the trans-
parameters of two different routing lengths. There are various mission line. There are two eigenvalues of the matrix
-1
(similar) derivations procedures, and below is one example: TL2 x TL1 (the two non-zero diagonal terms in equation 4),
where the one with absolute value <1 is the printed board
In Figure 1-3, two printed board conductors with different conductor loss corresponding to the routing length of (L2-L1).
lengths (L1 and L2) are fabricated on the same test coupon. Once the eigenvalue is identified, the insertion loss is readily

Page 2 of 11
IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

available based on equation (1). Note that the de-embedded Most VNAs offer TRL calibration options, please refer to the
insertion loss is defined with a reference impedance of the manual or application note for your specific equipment to per-
transmission line. form a TRL calibration.
TRL calibration has been widely used in the industry since the
1.3 General Calibration/de-embedding Methods to Set
technique no longer requires accurate calibration termination
up Correct Reference Plane for Printed Board Conduc-
standards. This overcomes the difficulties of SOLT calibration,
tor Insertion Loss Characterization As mentioned earlier,
and the reference plane can be moved to the printed board.
there are existing calibration/de-embedding methods for gen-
However, there are still some disadvantages to the TRL cali-
eral purpose interconnect characterization to move the cali-
bration. For example, there are many components of the cali-
bration reference plane to printed board interfaces. These
bration standard to handle. This takes substantial printed
methods are validated by the industry, and therefore included
board area and requires tedious calibration process in the lab,
herein, although they are either more complicated or costly
while being prone to the operator error. Additionally, the TRL
than the Eigen-value based method.
technique requires accurate characteristic impedance specifi-
1.3.1 TRL Calibration The TRL (and its variants such as cation for the line standard, which is problematic to determine
LRM) method [7] is a general approach to move the calibra- in a dispersive environment.
tion reference plane from the coaxial connector to printed
1.3.2 2X-Thru De-embedding In the last decade, the
board interfaces. Figure 1-4 shows the typical calibration
2X-thru de-embedding methodology is gaining popularity due
structures for a TRL calibration, with microwave probe foot-
to its simplicity of test fixture design and de-embedding pro-
print (with single-ended probing as an example). The TRL cali-
cedures [8]. In contrast to the TRL calibration technique,
bration technique only relies on the characteristic impedance
which requires measurement of multiple structures as shown
of the transmission line and does NOT need the parasitics of
in Figure 1-4, 2X-Thru De-embedding requires only one
Reflective Standard to be known, nor propagation delay of
de-embedding structure.
Line. A typical TRL calibration structure may also include a
Load structure that works only at very low frequencies, and The basic idea of the 2X-Thru de-embedding approach is
additional Line structures to cover a wide frequency range. shown in Figure 1-5. The S-parameters of the 2X-thru

IPC-25514-1-4

Figure 1-4 Calibration Structures (with probing footprint) for a TRL Calibration Example

Page 3 of 11
IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

structure are measured first. Assuming the 2X-Thru structure 2 Applicable Documents
is symmetric, the S-parameters of a 1X structure can be cal-
IPC-TM-650 Test Methods Manual
culated directly from the 2X-Thru measurement. Once the
S-parameters of the 1X structure on both sides on the DUT 2.5.5.12 Test Methods to Determine the Amount of Signal
are obtained, the S-parameters of the DUT can be readily cal- Loss on Printed Boards
culated. This significantly simplifies calibration/de-embedding
3 Test Specimens
procedures as compared to a traditional TRL calibration
where six calibration structures are typically needed. 3.1 Common Test Coupon Characteristics The test
coupon contains two or more transmission lines. The follow-
ing are general guidelines for designing transmission line test
structures for the test methods within this document. These
transmission line test structures may be placed within the
functional area of the printed board or within test coupons. It
is recommended that coupons have labels that contain infor-
mation about the associated test line signal layer; for example,
L1, L3, etc. Labeling of the contact land for differential
IPC-25514-1-5
conductors shall clearly indicate the matched pair. It is recom-
Figure 1-5 S parameter of Test Fixture is Calculated from mended that test coupons include a printed board serial num-
S Parameter of 2X-Thru ber, part number, and date code.

There are various 2X-Thru de-embedding tools available at 3.2 Ground and Reference Planes All reference planes in
time of publication of this test method, such as [9][10][11]. The the coupon shall be connected together within the coupon
accuracy of 2X-Thru de-embedding tool is has been shown to area and be independent of those planes in the functional cir-
be comparable to TRL [13]. However, since the algorithm of cuit area.
commercially available 2X-Thru methods are often proprietary,
it is up to the users to validate the tool for their printed board 3.3 Probe Launch Footprint The probe launch footprint is
insertion loss measurements. IEEE 370-2020 addressing this comprised of signal pads and ground contact. Each probe
issue by setting up a process to validate the de-embedding vendor can specify its optimized probe launch footprint. How-
tools [12]. Below is the general process of using 2X-Thru ever, it is desirable to have footprint that is compatible with
de-embedding process to measure the insertion loss: multiple probes. Figure 3-1 shows an example of a differential
probe launch footprint compatible with both micro- and hand-
1) Manufacture two printed board conductors with different
held probes. A similar single-ended probe launch footprint is
lengths (L1 and L2).
shown in Figure 3-2, with the same guide pin design.
2) Perform SOLT calibration to move reference plane to the
end of coaxial connector.
3) Perform VNA measurement and to acquire the S param-
eters of the shorter conductor (L1) and longer trace (L2).
4) Use 2X-Thru tool to de-embed the S parameters of L2,
while treating the shorter conductor L1 as test fixture. This
end up with S parameters of a transmission line DUT of
length L2-L1.
5) Renormalize the S parameter using the characteristic
impedance of transmission line.
6) The renormalized S21 represents the insertion loss of DUT
(length of L2-L1). IPC-25514-3-1

Figure 3-1 Example of a Probe Launch Footprint for


Differential Signal Probing (both footprint and dimensions
are shown for informative purposes only)

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IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

Fiber-weave impact should be mitigated unless the intent is to


measure its impact. One mitigation example is to have the test
line routed at about 10 degree angle (or close to the routing
scenario in actual product design) with respect to the fiber-
weave alignment. Alternative, straight routing (parallel to board
edge) can be used if the Gerber image is rotated by about 10
degrees on the panel.

It is recommended to route the test lines with the same cross-


section and target impedance as in the actual product layout.

Thieving, which is the use of non-terminated copper struc-


IPC-25514-3-2
tures such as planes, pads, and/or conductors adjacent to
Figure 3-2 Example of a Probe Launch Footprint test lines that ensure plating consistency, may be used on the
for Single-ended Signal Probing (both footprint and test coupon. All thieving structures (if used) shall be placed at
dimensions are shown for informative purposes only) least Dmin away from each test interconnect. It is recom-
mended to make sure copper density at each routing layer is
It is important to note that these are just footprint examples, representative of the actual product.
and the electrical performance of these footprint may be fur-
ther improved based on the layer stackup, such as voiding the 3.7 Impact of Vias in the Printed Board Conductor Loss
ground plane right beneath the signal pads. Each probe ven- Characterization Measuring the signal loss for inner layer
dor can specify its optimized probe launch footprint that (stripline) can be challenging when there is a substantial loss
meets the electrical requirement specified in 4.2. Furthermore, due to the via or via stub effect. Reducing via effect can
it is critical to work with probe vendor to make sure the fin- improve the de-embedding results. This can be achieved by:
ished drill hole size is compatible with the probe. • Minimizing via stub length by probing from the appropriate
side of the board (from the top for traces on the bottom half
Note that the footprint example shown in Figure 3-1 is appli-
of the board and vice-versa, to assure minimum via stub
cable for measurements up to 20GHz and that the footprint
length)
can be further optimized for application at higher frequencies.
• Minimizing via stub length by back-drilling. However, this
3.4 Connector Launch Alternative to microwave probes, needs to be done with good control of back-drilling depth.
high bandwidth connector launch may be used instead of Inconsistent back-drilling depth between the vias for two
probe launch as show in Figure 3-2 and Figure 3-3 of IPC- different routing length can lead to large de-embedding error
TM-650 Method 2.2.2.12A. Although the hand-held probe
approach is quicker and more convenient to use, the connec- • Extra attention needs to be paid to stacked via designs, as
tor solution is usually more reliable and less prone to human this approach, while avoiding stubs and improving signal
errors. integrity, has high manufacturing variants

• The resonance frequency should be outside of intended


3.5 General Surface Condition The panel test coupons
measurement bandwidth
shall have the same surface plating and use the same solder
For signals on outer layer (microstrip), the conductor should
mask requirements as the functional printed board. The plat-
be routed without via or via stub.
ing of the launch footprint should be suitable for probing or
co-axial connector connection. 3.8 Impact of Environmental Condition in the Printed
Board Conductor Loss Characterization Temperature
3.6 General Routing Guidelines The test lines shall be
and humidity affect loss measurements. It is therefore critical
referenced to a continuous ground/voltage planes. The test
to clearly document the testing condition in the reported inser-
line conductors shall be kept at minimum distance Dmin from
tion loss.
printed board structures such as voids, plane splits, other
conductors and holes, where Dmin is six times the height of For insertion loss of conductors routed on outer layer, the
dielectric layer (from line conductor to the closest reference results can be different under the conditions described in
plane) or 2.54 mm [0.100 in], whichever is greater. 3.8.1 vs. those described in 3.8.2 due to the humidity impact.

Page 5 of 11
IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

As the solid metal planes may block the moisture penetration,


for the conductors routed on inner layers it typically takes a
long time (with rare exceptions) for the sample to absorb the
moisture. Therefore, making measurement of insertion loss of
inner routing layers under the conditions described in 3.8.1 is
recommended over making such measurements under the
conditions described in 3.8.2.

3.8.1 Insertion Loss Measurement of Vacuumized Test


Specimens Test specimens can be vacuumized right after IPC-25514-4-1

baking them at 105 °C RH 0% over 2 hours, or 140 °C RH Figure 4-1 Typical VNA Measurement Setup
0% over 1 hour. However, if the coupon has been stored over
a long period of time without proper vacuum packaging, the 3.5 dB at highest frequency of interest, to make sure the
baking condition needs to be adjusted to be 140 °C RH 0% probe and launching pad design have good electrical perfor-
for 12 hours. Consistent results can be obtained by testing mance.
specimens at 23 °C (± 2 °C) [73.4 °F (± 3.6 °F)] and 20~80%
RH for less than 12 hours since opening the vacuum package A direct measurement of electrical performance of probe and
or finishing a baking treatment. It is recommended to allow launching pad can be cumbersome. Alternatively, Figure 4-2
test coupons to cool to room temperature for at least 30 min- shows an example of test setup to check the electrical perfor-
utes before test if measurement is done after a baking treat- mance. A 50.8 mm [2.0 in] microstrip line with known insertion
ment. loss is used to provide a connection between two probes.
VNA is calibrated to the end of coaxial cable, and the inser-
3.8.2 Insertion Loss Measurement of Test Specimens tion loss of the 50.8 mm [2.0 in] microstrip line with probes at
Stored in Environmental Chamber For conductors routed both ends is measured.
on outer layers, consistent results of insertion loss at typical
humidity condition can also be obtained by storing test speci-
mens at 23 °C (± 2 °C) [73.4 °F (± 3.6 °F)] and 40% RH (± 5%
RH) for no less than 48 hours. Note that the test under this
condition takes longer time compared to that described in
3.8.1.

4 Apparatus
IPC-25514-4-2
4.1 VNA Measurement Apparatus The measurement
equipment needed includes a VNA, calibration kit, cabling, Figure 4-2 Test Setup for Probe Quality Check
and a probing solution, as shown in Figure 4-1. High perfor-
mance connectors and cables that are rated above the maxi- Insertion loss requirement for the test setup in Figure 4-2
mum frequency of interest are required in performing VNA depends on the highest measurement frequency, as well as
measurements. the microstrip trace loss. A test coupon with known loss can
be used, or a separate measurement can be done to deter-
Using TDR/TDT system in place of a VNA to acquire fre-
mine microstrip loss. Figure 4-3 shows an example of the
quency domain attenuation and loss data is beyond the scope
probe quality requirement, assuming the highest measure-
of this test method. A future IPC-TM-650 Test Method
ment frequency is 20 GHz, and the insertion loss of the
2.5.5.15 for best design practices for Time Domain method is
50.8 mm [2.0 in] microstrip is 5 dB at 20 GHz. The measured
envisioned under the IPC D-24D Task Group.
insertion loss must be above the red dash line in the figure.
4.2 Probe Quality The quality of probe (whether using Note at DC level, the required loss is less than 1 dB, and at
probing station or handheld probe) is critical for accurate and 20 GHz, the required loss is less than12 dB (where 3.5 dB is
repeatable measurement. It is recommended to have the allocated for each probe, and 5 dB is coming from the
insertion loss of the probe and launching pad to be less than 50.8 mm [2.0 in] microstrip).

Page 6 of 11
IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

5.3 VNA Calibration and De-embedding Calibration


and/or de-embedding techniques outlined in 1.2.1 must be
performed to remove the effects of cable, connector, and test
fixtures.

5.4 Smoothing and Fitting of Insertion Loss Measure-


ment Curve

5.4.1 Insertion Loss Smoothing Basics Printed board


testing facilities often report insertion loss per inch at a hand-
ful of frequencies (e.g., 4 GHz, 8 GHz, 12.89 GHz, etc.). An
IPC-25514-4-3
ideal insertion loss curve for a printed board conductor is
Figure 4-3 Insertion Loss Requirement for the Probe expected to follow transmission line behavior and be smooth.
Quality Test Setup in Figure 4-2 However, in some testing houses, the de-embedded insertion
loss curves may have oscillations and deviations due to vari-
Probe performance may degrade over time. It is necessary to ous sources of measurement and de-embedding error, as
periodically check the probe quality to assure the electrical shown in blue curve in Figure 5-1. Without proper post-
requirement in Figure 4-3 is met. processing of the data, the measurement house can easily fail
to report the true loss performance of the test coupon at des-
5 Procedure The procedure section is to be used to detail ignated frequencies. One common methodology for obtaining
all of the specific steps necessary to perform the actual test. a smooth de-embedded insertion loss curve is to use an iter-
It shall include any specific conditioning requirements, or ated moving average. The result is a very smooth red curve
other specimen preparation not previously detailed. It shall shown in Figure 5-1.
then describe in detail the successive steps of the procedure,
grouping related operations into logical divisions in a concise
manner. It shall include times, temperatures, voltages, pres-
sures, concentrations, linear measurements and quantitative
criteria when necessary in applicable units (both Metric and
English).
It shall then state any detailed information required in report-
ing the test results. When two or more procedures are
described in the same test method, the report shall indicate
which of the procedures was used. When a test method
allows variations in operating or other conditions, the report
shall state the particular conditions utilized for the test.
This specification currently outlines measuring Frequency
Domain characteristics using a VNA.

5.1 VNA Settings Follow the VNA manual for proper IPC-25514-5-1
operation of equipment. Recommended settings for the VNA
include an IF bandwidth of 1 kHz (can be decreased based on Figure 5-1 An Iterative Moving Average Applied to a
instrument and applications), and a step size of 10 MHz. Typical Insertion Loss Curve
Note 1. Red denotes the smoothed curve
Smoothing is not allowed.
The cables and connectors used in the measurement should While smoothing with an iterative moving average addresses
be sufficiently rated for the maximum intended measurement most of the challenges posed by the measurement errors,
frequency. there remain some disadvantages. The resulting smooth curve
is non-physical and unlikely to be representative of the true
5.2 Conditioning of Test Sample Refer to 3.8 for proper loss of printed board conductor. For example, the smoothed
conditioning of test sample before test. curve usually deviates from the correct answer at low

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IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

frequencies where the conductor losses dominate. Addition- be used. Fox example, in [15], the following function is set as
ally, in the high frequency range, the smoothing may preserve the target function for the fitting algorithm:
unrealistic features of the de-embedded insertion loss.
ILdB(,) = a(, – ,0)b + c(, – ,0)2 + d(, – ,0) + IL0 (Eq. 8)
5.4.2 Cumulative Dielectric and Conductor Loss Fit- The first term represents the AC conductor loss (i.e., the skin-
ting As it has been discussed in [14], the cumulative dielec- effect losses), where ‘b’ is an additional fitting parameter
tric and conductor losses can be generally approximated by (instead of a constant 0.5 where ideal conductor loss is a
ILdB(,) = a√, + b, + c, 2 (Eq. 6) function of ,0.5) added to take into account the surface rough-
ness impact of the conductor. The second and the third terms
where , is the frequency in GHz and a, b and c are constants. represent dielectric losses, and the constant represents the
For most of the cases coefficient c << 1 and can be conductor’s DC loss. Furthermore, a certain offset point (,0,
neglected. Therefore, as a first approximation the total loss IL0) is introduced, where ,0 is the first frequency point of the
curve can be fitted to measurement. The offset is added to accommodate the fact
ILdB(,) = a√, + b, (Eq. 7) that VNA measurements made at the printed board fabricator
usually do not provide results lower than 10 MHz.
There are number of algorithms that can be used to perform
the printed board loss fit to Eq. 7. One of the most well-known The abovementioned methods fit the data to a smooth curve
and widely available algorithms is the least squares fit, over the entire bandwidth of the measurement where each
example of which is shown in the Figure 5-2 below. data point is allocated equal weight. As measurement errors
usually increase significantly at high frequencies, a weighting
scheme can be introduced to force the algorithm to prioritize
the curve fitting at the low frequencies and minimize (or ignore)
the impact of high frequency:

( (, , ))
W(,) = 1–
max
3
(Eq.9)

where ,max is the maximum measurement frequency. Figure


5-3 shows the suggested weighted function where ,max = 20
GHz.

IPC-25514-5-2

Figure 5-2 Least Squares Fit Based on (eq. 7) Applied to


a Representative Insertion Loss Curve
Note 1. Red represents the fitted curve.

Even though least squares generally provide a good curve


approximation with the specified behavioral function, there are
many other fitting algorithms that can be applied.

5.4.3 An Alternative Cumulative Dielectric and Conduc-


tor Loss Fitting Alternatively, when losses cannot be fitted IPC-25514-5-3
to the conventional physical based behavioral functions in (Eq.
Figure 5-3 The Suggested Weight Function for Insertion
6) and (Eq. 7), especially when measurement raw data has
Loss Curve Fitting
high ringing resonances, other empirical approximations can

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IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

Typical least mean square fit approach is applied to fit the The simplest approach to compute the uncertainty at the
weighted raw data to the target function. Figure 5-4 shows selected frequency is to use the difference between the raw
the fitted insertion loss curve for two measurement cases data and fitted results. However, this can be misleading,
using the procedures described above. which is demonstrated in Figure 5-5. In this case, the devia-
tion of raw data from the fitted curve is zero at the selected
frequency, while it is clear that the measurement quality is not
perfect.

IPC-25514-5-3

Figure 5-5 Deviation of the Raw Data from the Fitted


Curve at a Single Frequency Point can be Misleading

To quantify the uncertainty of the reported insertion loss at the


point of interest it is necessary to analyze the fit deviation in its
immediate vicinity, as shown in Figure 5-5. An ‘error neighbor-
hood’ of ± 1 GHz (can be adjust based on user’s specific
application) is suggested to calculate the fit precision using
the distribution of the residuals within the ± 1 GHz frequency
range. For frequency points at the lower or upper limit of the
measurement bandwidth, the ± 1 GHz bound can be adjusted
so that the ‘neighborhood error bound’ does not extend
beyond the measurement bandwidth. For example, if the
measurement upper frequency limit is 20 GHz, and the fre-
quency of interest is 19.5 GHz, then the ‘neighborhood error
bound’ is from 18.5 to 20 GHz.
IPC-25514-5-4
From the fitted curve and the original raw data, the residuals,
Figure 5-4 Examples of an Alternative Insertion Loss ILres ( i ) are calculated for all the frequency points within the ±
Fitting using Eq. 6 1 GHz range:
5.4.4 Addressing the Quality of Reported Insertion
IL_res ( i ) = IL_raw ( i ) – IL_fit ( i ) (Eq. 10)
Loss As mentioned previously, when performing measure-
ments on printed board conductors to check whether they where IL_raw ( i ) is the raw data of insertion loss at each fre-
pass insertion loss requirements, printed board testing houses quency points, and IL_fit ( i ) is the fitted insertion loss. The
generally only provide the insertion loss at a few points in their mean and standard deviation (σ) of the residual distribution is
report. Usually, the reported loss value using the fitted value calculated, and the uncertainty at given frequency f0 is
provides results with better fidelity compared to the raw data. defined as:

Meanwhile, the deviation of the reported values from the raw mean (IL_res) + 3 x σ (IL_res)
uncertainty@,0 = x 100% (Eq.11)
data is a good indicator on the quality of the measurement. IL_fit@,0

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IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

Note that an uncertainty estimate of 15% (as an example) is impact on insertion loss varies with different printed board
not meant to suggest that the true insertion loss is within 15% materials.
of the reported value. Rather, the uncertainty estimate is
A Test chamber with variable temperature setting is needed.
merely an indicator for the amount of measurement and
A suggested temperature range is 0 °C ~ +100 °C, or other-
de-embedding error evident at any given point.
wise specified by the tester. Temperature accuracy is < ± 1 °C
of actual set point. Humidity accuracy is < ± 5% RH of actual
5.4.5 Determine the Usable Bandwidth of Reported
set point, or otherwise specified by the tester.
Insertion Loss The uncertainty level described in 5.4.4 can
be used to determine the usable bandwidth of the reported It is recommended to use phase-stabilized cables for tem-
insertion loss. The user can set up an acceptable uncertainty perature ranges of 0 °C ~ +100 °C, or otherwise specified by
level based on a specific application, and then examine the the tester. Figure 5-6 provides an example of a temperature
reported insertion loss value at various frequencies, to deter- experiment setup.
mine its usable bandwidth of reported insertion loss (where
the uncertainty level is smaller than the pre-set value).

5.5 Verification of Reported Insertion Loss Due to


manufacturing variation, and the uncertainties associated with
the calibration/de-embedding process, it is desirable to make
multiple measurements of the same coupon design to
improve the confidence of the measurement results. This is
critical when the material is in a qualification stage and the
amount of manufactured coupons is limited.
One simple approach to verify the reported insertion loss is to
design coupons with multiple lengths on the same board: L1,
L2, and L3. The de-embedding process outlined in 1.2.2 and IPC-25514-5-6
1.3 can be applied to any two length combinations:
Figure 5-6 Temperature Experiment Setup
|e-γ (L2–L1)|
ILunit_12 = (Eq. 12)
L2–L1 The following procedures describe how to quantify the tem-
|e-γ (L3–L2)| perature impact for a given printed board material:
ILunit_23 = (Eq. 13)
L3–L2 1) Set up VNA equipment according to 5.1.
|e-γ (L3–L1)| 2) Bake the test coupon at 120 °C over 6 hours.
ILunit_13 = (Eq. 14)
L3–L1
3) Calibration VNA equipment to the end of cable with
It is desirable to have the reported insertion loss per unit co-axial connector SOLT standards, with the cable
length being consistent (e.g., within 5% of each other). A large stayed outside the environment chamber.
discrepancy indicates either problems in measurement/de-
4) Move cable end through the conduit of chamber and
embedding procedures, or a large manufacturing variation
connect to the long trace of DUT inside the chamber.
across the board. An average of the above insertion loss num-
Make sure the conduit is sealed with thermal resistant
ber can be used to report the final value.
material after the cable penetrates the chamber. (Note:
It is also important to note that keeping a large length differ- high temperature resistant cable should be used)
ence between any two lengths among L1, L2, and L3 will also 5) Set the chamber to the target testing temperature and
help to improve the quality of reported insertion loss. humidity.
6) Wait at least half an hour to ensure DUT is set to the
5.6 Temperature Impact of Insertion Loss It is known
ambient temperature
that the copper conductivity decreases, and the loss tangent
of dielectric material increases with the increase of environ- 7) Conduct measurement and record data.
mental temperature. Therefore, the insertion loss increases 8) Moving to the next temperature and humidity setting
with the increase of temperature. Meanwhile, the temperature (Step 5), until results of all settings are recorded.

Page 10 of 11
IPC-TM-650
Number Subject Date
2.5.5.14 Measuring High Frequency Signal Loss and Propagation on 02/2021
Printed Boards with Frequency Domain Methods
Revision

9) Conduct the short trace characterization from Step 4. [3] R. B. Marks, ‘‘A Multiline Method of Network Analyzer
10) Post-process the results using methods described in Calibration,‘‘ IEEE Transactions on Microwave Theory
Section 1.2.2. and Techniques 39, pp. 1205-1215, July 1991.
[4] C. Seguinot et al.: – Multimode TRL ‘‘A new concept in
Note: The humidity is controlled at RH of 50% (±5%) for all
microwave measurements’’
data points, except for 0 and 100 °C.
[5] D. Degroot, J. Jargon, R. Marks, ‘‘Multiline TRL
5.7 Test Report Below is an example of the list of informa- revealed,’’ 60th ARFTG Conference Digest, Fall 2002.
tion to be included in the test report. The actual format and [6] Y. Shlepnev, ‘‘Broadband material model identification
information to be included in the test report may vary based with GMS-parameters’’, 2015 IEEE 24th Conference on
on the requirement of specific customer: Electrical Performance of Electronic Packaging and Sys-
• VNA Settings: test frequency range, step size, IF bandwidth, tems (EPEPS’2015), October 25-28, 2015, San Jose,
etc. CA.

• Probing method: handheld probe, microwave probe, or [7] G. F. Engen and C. A. Hoer, ‘‘Thru-Reflect-Line: An
printed board mounted co-axial connector without probes Improved Technique for Calibrating the Dual Six-Port
Automatic Network Analyzer,‘‘ Microwave Theory and
• Manufacturer and part number of the probe (if used), and Techniques, IEEE Transactions on, vol. 27, pp.987-993,
the bandwidth of the probe per 4.2
1979.
• Condition of test samples per 3.8.1 or 3.8.2 [8] V. Adamian, B. Cole, ‘‘A Novel Procedure for Character-
• Temperature and humidity of testing condition for Room- ization of Multiport High Speed Balanced Devices,’’
Temperature test DesignCon, San Jose, CA, 2007.
[9] H. Barnes, E. Bogatin, J. Moreira, J. Ellison, et al. ‘‘A
• Temperature and humidity of testing condition for Varying-
NIST Traceable PCB Kit for Evaluating the Accuracy of
Temperature test per 5.6
DeEmbedding Algorithms and Corresponding Metrics,’’
• Calibration or de-embedding method per 1.2.2 or 1.3.1 or DesignCon 2018.
1.3.2
[10] X. Ye, J. Fan and J. Drewniak, ‘‘New De-embedding
• Insertion loss fitting method per 5.4.2 or 5.4.3 Techniques for PCB Transmission-Line Characteriza-
tion’’, DesignCon 2015.
• Values of the insertion loss at test frequencies, in dB/inch or
dB/cm [11] IEEE P370 open-source 2X-Thru de-embedding code,
https://gitlab.com/IEEE-SA/ElecChar/P370.
• Uncertainty estimate at test frequencies per 5.4.4
[12] https://standards.ieee.org/standard/370-2020.html
• Any anomalies in the test or variations from this test method
[13] S. Moon, X. Ye, R. Smith, ‘‘Comparison of TRL Calibra-
6 Reference Documents tion vs. 2X-Thru De-embedding Methods,’’ IEEE Interna-
tional Symposium on EMC and SI, 2015.
[1] N. R. Franzen, R. A. Speciale, ‘‘A New Procedure for
System Calibration and Error Removal in Automated [14] A. Koul, M. Koledintseva, S. Hinaga, J. Drewniak, ‘‘Dif-
S-Parameter Measurements,’’ Proceedings of the 5th ferential Extrapolation Method for Separating Dielectric
European Microwave Conference, Hamburg, Germany, and Rough Conductor Losses in Printed Circuit
1-4 September 1975, pp. 69-73. Boards,’’ IEEE Transaction on Electromagnetic Compat-
[2] R. A. Soares, P. Gouzien, P. Legaud, G. Follot ‘‘A Unified ibility, Vol. 54, No. 2, April 2012.
mathematical approach to two-port calibration tech- [15] X. Ye, M. Balogh, ‘‘Physics-Based Fitting to Improve
niques and some applications,’’ IEEE Trans. on MTT, v. PCB Loss Measurement Accuracy,’’ IEEE International
37, N 11 1989, pp. 1669-1674. Symposium on EMC, 2017.

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