(iv) Donor atoms are _____________________ carrier providers in the p type and

_________________ carrier providers in the n type semiconductor materials.

(v) Forward current density in a diode is __________________________ proportional to the
life time of carriers.

Answer: (i) Reverse, (ii) increase, (iii) temperature, (iv) Minority Majority, (v) inversely

(2) A p-n junction diode has a reverse saturation current rating of 50 nA at 32°C. What
should be the value of the forward current for a forward voltage drop of 0.5V. Assume VT =
KT/q at 32°C = 26 mv.

Answer
⎛ V ⎞
I F = I s ⎜ e VT - 1 ⎟ , Is = 5×10-8 A, VT = 26×10-3 V V = 0.5V
⎝ ⎠
∴ I F = 11.24 Am ps.

di
(3) For the diode of Problem-2 calculate the dynamic ac resistance ra c = F d v F at 32°C and a
forward voltage drop of 0.5V.

Answer:
⎛ VF VT ⎞ diF Is VF
iF = Is ⎜ e -1⎟ ∴ = e VT

⎝ ⎠ dVF VT

N ow I s = 5 × 10 -8 A , V F = 0.5V ,
-3
VT = 26 ×10 V at 32o C
V
dVF V - F
∴ = ra c = T e V T = 2 .3 1 3 m Ω
diF Is

2.3 Construction and Characteristics of Power Diodes

As mention in the introduction Power Diodes of largest power rating are required to conduct
several kilo amps of current in the forward direction with very little power loss while blocking
several kilo volts in the reverse direction. Large blocking voltage requires wide depletion layer in
order to restrict the maximum electric field strength below the “impact ionization” level. Space
charge density in the depletion layer should also be low in order to yield a wide depletion layer
for a given maximum Electric fields strength. These two requirements will be satisfied in a
lightly doped p-n junction diode of sufficient width to accommodate the required depletion layer.
Such a construction, however, will result in a device with high resistively in the forward
direction. Consequently, the power loss at the required rated current will be unacceptably high.
On the other hand if forward resistance (and hence power loss) is reduced by increasing the
doping level, reverse break down voltage will reduce. This apparent contradiction in the
requirements of a power diode is resolved by introducing a lightly doped “drift layer” of required

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thickness between two heavily doped p and n layers as shown in Fig 2.3(c). Fig 2.3 (a) and (b)
shows the circuit symbol and the photograph of a typical power diode respectively.

(b)

Fig. 2.3: Diagram of a power; (a) circuit symbol (b) photograph; (c) schematic cross
section.

To arrive at the structure shown in Fig 2.3 (c) a lightly doped n- epitaxial layer of specified width
(depending on the required break down voltage) and donor atom density (NdD) is grown on a
heavily doped n+ substrate (NdK donor atoms.Cm -3) which acts as the cathode. Finally the p-n
junction is formed by defusing a heavily doped (NaA acceptor atoms.Cm-3) p+ region into the
epitaxial layer. This p type region acts as the anode.
Impurity atom densities in the heavily doped cathode (Ndk .Cm -3) and anode (NaA.Cm -3) are
approximately of the same order of magnitude (10 19 Cm -3) while that of the epitaxial layer (also
called the drift region) is lower by several orders of magnitude (NdD ≈ 10 14 Cm-3). In a low
power diode this drift region is absent. The Implication of introducing this drift region in a power
diode is explained next.

2.3.1 Power Diode under Reverse Bias Conditions Back

As in the case of a low power diode the applied reverse voltage is supported by the depletion
layer formed at the p+ n- metallurgical junction. Overall neutrality of the space change region
dictates that the number of ionized atoms in the p+ region should be same as that in the n- region.
However, since NdD << NaA, the space charge region almost exclusively extends into the n- drift

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region. Now the physical width of the drift region (WD) can be either larger or smaller than the
depletion layer width at the break down voltage. Consequently two type of diodes exist, (i) non
punch through type, (ii) punch through type. In “non-punch through” diodes the depletion layer
boundary doesn’t reach the end of the drift layer. On the other hand in “punch through” diodes
the depletion layer spans the entire drift region and is in contact with the n+ cathode. However,
due to very large doping density of the cathode, penetration of drift region inside cathode is
negligible. Electric field strength inside the drift region of both these type of diodes at break
down voltage is shown in Fig 2.4.

Fig 2.4: Electric field strength in reverse biased power Diodes; (a) Non-punch through
type; (b) punch through type.

In non-punch through type diodes the electric field strength is maximum at the p+ n- junction and
decrease to zero at the end of the depletion region. Where as, in the punch through construction
the field strength is more uniform. In fact, by choosing a very lightly doped n- drift region,
Electric field strength in this region can be mode almost constant. Under the assumption of
uniform electric field strength it can be shown that for the same break down voltage, the “punch
through” construction will require approximately half the drift region width of a comparable “
non - punch through” construction.
Lower drift region doping in a “punch through” diode does not carry the penalty of higher
conduction lasses due to “conductivity modulation” to be discussed shortly. In fact, reduced
width of the drift region in these diodes lowers the on-state voltage drop for the same forward
current density compared to a non-punch through diode.
Under reverse bias condition only a small leakage current (less than 100mA for a rated forward
current in excess of 1000A) flows in the reverse direction (i.e from cathode to anode). This
reverse current is independent of the applied reverse voltage but highly sensitive to junction
temperature variation. When the applied reverse voltage reaches the break down voltage, reverse
current increases very rapidly due to impact ionization and consequent avalanche multiplication
process. Voltage across the device dose not increase any further while the reverse current is
limited by the external circuit. Excessive power loss and consequent increase in the junction
temperature due to continued operation in the reverse brake down region quickly destroies the
diode. Therefore, continued operation in the reverse break down region should be avoided. A
typical I-V characteristic of a power diode under reverse bias condition is shown in Fig 2.5.

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 Fig 2.5: Reverse bias i-v characteristics of a power Diode.

A few other important specifications of a power Diode under reverse bias condition usually
found in manufacturer’s data sheet are explained below.
DC Blocking Voltage (VRDC): Maximum direct voltage that can be applied in the reverse
direction (i.e cathode positive with respect to anode) across the device for indefinite period of
time. It is useful for selecting free-wheeling diodes in DC-DC Choppers and DC-AC voltage
source inverter circuits.
RMS Reverse Voltage (VRMS): It is the RMS value of the power frequency (50/60 HZ) since
wave voltage that can be directly applied across the device. Useful for selecting diodes for
controlled / uncontrolled power frequency line commutated AC to DC rectifiers. It is given by
the manufacturer under the assumption that the supply voltage may rise by 10% at the most. This
rating is different for resistive and capacitive loads.
Peak Repetitive Reverse Voltage (VRRM): This is the maximum permissible value of the
instantiations reverse voltage appearing periodically across the device. The time period between
two consecutive appearances is assumed to be equal to half the power cycle (i.e 10ms for 50 HZ
supply). This type of period reverse voltage may appear due to “commutation” in a converter.
Peak Non-Repetitive Reverse Voltage (VRSM): It is the maximum allowable value of the
instantaneous reverse voltage across the device that must not recur. Such transient reverse
voltage can be generated by power line switching (i.e circuit Breaker opening / closing) or
lightning surges.

Fig. 2.6 shows the relationship among these different reverse voltage specifications.

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Fig. 2.6: Reverse Voltage ratings of a power diode; (a) Supply voltage wave form; (b)
Reverse i-v characteristics

2.3.2 Power Diode under Forward Bias Condition

In the previous section it was shown how the introduction of a lightly doped drift region in the p-
n structure of a diode boosts its blocking voltage capacity. It may appear that this lightly doped
drift region will offer high resistance during forward conduction. However, the effective
resistance of this region in the ON state is much less than the apparent ohmic resistance
calculated on the basis of the geometric size and the thermal equilibrium carrier densities. This is
due to substantial injection of excess carriers from both the p+ and the n+ regions in the drift
region as explained next.
As the metallurgical p+ n- junction becomes forward biased there will be injection of excess p
type carrier into the n- side. At low level of injections (i.e δp << nno) all excess p type carriers
recombine with n type carriers in the n- drift region. However at high level of injection (i.e large
forward current density) the excess p type carrier density distribution reaches the n- n+ junction
and attracts electron from the n+ cathode. This leads to electron injection into the drift region
across the n- n+ junction with carrier densities δn = δp. This mechanism is called “double
injection”
Excess p and n type carriers defuse and recombine inside the drift region. If the width of the drift
region is less than the diffusion length of carries the spatial distribution of excess carrier density
in the drift region will be fairly flat and several orders of magnitude higher than the thermal
equilibrium carrier density of this region. Conductivity of the drift region will be greatly
enhanced as a consequence (also called conductivity modulation).
The voltage dropt across a forward conducting power diode has two components i.e
Vak = Vj + VRD (2.2)
Where Vj is the drop across the p+n- junction and can be calculated from equation (2.1) for a
given forward current jF. The component VRD is due to ohmic drop mostly in the drift region.
Detailed calculation shows
VRD ∞ JF WD (2.3)
Where JF is the forword current density in the diode and WD is the width of the drift region.
Therefore
Vak = Vj + RON IF (2.3)
The ohmic drop makes the forward i-v characteristic of a power diode more linear.

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Fig 2.7: Characteristics of a forward biased power Diode; (a) Excess free carrier density
distribution; (b) i-v characteristics.

Both Vj and VAK have negative temperature coefficient as shown in the figure.
Few other important specifications related to forward bias operation of power diode as found in
manufacturer’s data sheet are explained next.
Maximum RMS Forward current (IFRMS): Due to predominantly resistive nature of the
forward voltage drop across a forward biased power diode, RMS value of the forward current
determines the conduction power loss. The specification gives the maximum allowable RMS
value of the forward current of a given wave shape (usually a half cycle sine wave of power
frequency) and at a specified case temperature. However, this specification can be used as a
guideline for almost all wave shapes of the forward current.
Maximum Average Forward Current (IFAVM): Diodes are often used in rectifier circuits
supplying a DC (average) current to be load. In such cases the average load current and the diode
forward current usually have a simple relationship. Therefore, it will be of interest to know the

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