Questions & Solutions MMI 2020-21

(Autumn Mid)
SECTION - A

Question Question & Ans

No
Q.No:1(a) What are tristate devices? Why are they essential in bus oriented system?
Ans: Tristate devices are logic devices which have three states. They are logic
1, logic 0 and high impedance. These are used to prevent the loading effect on
system buses and they are critical to proper functioning of the microcomputer.
What is the purpose of Program counter (PC) in 8085 MP?
Ans: It is a 16-bit register, stores the memory address from where the next
instruction byte is to be fetched. When a byte (machine code) is being fetched,
the program counter is incremented by one to point to the next memory
location.
What is the use of Stack Pointer (SP) in 8085 MP?
Ans: It is a 16-bit register, stores the address of the top memory location of the
Stack. SP is initialized by the instruction: LXI SP, XXXX ; [SP] = XXXX.
In PUSH & POP operations, [SP] = [SP] - 2 & [SP] = [SP] + 2 respectively.
If the time required to fetch and execute the instruction MVI B, 50H is 3.5
µSec in a 8085 Microprocessor system, then find the clock frequency?
Sol: 7T = 3.5 uS ==> T = 0.5 uS
So Clock Frequency = 1/T = 2MHz.
Q.No:1(b) (i) What is the function of ALE pins in 8085 MP?
Ans: It is used as the enable input of the octal latch for demultiplexing the
AD7-AD0 bus.
(ii) Which of the following instructions of 8085 MP are used in memory
mapped I/O?
 LDA 5000H
 OUT 50H
Ans: LDA 5000H
(i) What is the function of READY pin in 8085 MP?
Ans: READY pin is an input pin, which is used to synchronize the
communication between 8085 MP and slow-responding peripheral.
(ii) Which of the following instructions of 8085 MP are used in I/O mapped
I/O?
 STA 8000H
 IN 50H
Ans: IN 50H
(i) What is the function of HOLD pin in 8085 MP?
Ans: HOLD is an input pin using which the DMA controller sends the request
to 8085 MP for the system bus.
(ii) Which of the following instructions of 8085 MP are used in I/O mapped
I/O?
 MOV A, M
 OUT 20H
Ans: OUT 20H
(i) What is the function of X1 & X2 pins in 8085 MP?
Ans: A crystal (or RC, LC N/W) is connected at these two pins. The frequency
is internally divided by 2.
(ii) Which of the following instructions of 8085 MP are used in I/O mapped
I/O?
  ADD M
 IN 20H
Ans: IN 20H
Q.No:1(c) Explain about ORG assembler directive with an example.
Ans: It commands the assembler where to store the instructions and data in the
memory.
Eg. ORG 5000H
Explain about DB assembler directive with an example.
Ans: DB (Define Byte):It tells the assembler to initialize bytes of data
sequentially.
Eg. DB 20H, 30H.
Explain about DW assembler directive with an example.
Ans: DW (Define Word):It tells the assembler to initialize 16-bits of data
sequentially.
Eg. DW 1120H, 5678H.
Explain about EQU assembler directive with an example.
Ans: Stands for Equate. Used to assign a data value in the operand field to a Label
in the label field.
Eg. Label Opcode Operand
VALUE EQU 01H
Q.No:1(d) A stack segment is to be located from address 40000H to 4FFFFH in the
memory of 8086MP system, then what value must be loaded into SS
register? If [SP] = 0057H What would be the 20-bit physical address which
would be generated in 8086 system?
Sol: [SS] = 4000H
20-bit physical address = [SS]X10H + [SP]
= 40000H + 0057H = 40057H
A data segment is to be located from address 80000H to 8FFFFH in the
memory of 8086MP system, then what value must be loaded into DS
register? If [DI] = 0046H What would be the 20-bit physical address which
would be generated in 8086 system?
Sol: [DS] = 4000H
20-bit physical address = [DS]X10H + [SP]
= 80000H + 0046H = 80046H
A data segment is to be located from address 20000H to 2FFFFH in the
memory of 8086MP system, then what value must be loaded into DS
register? If [SI] = 0024H What would be the 20-bit physical address which
would be generated in 8086 system?
Sol: [DS] = 4000H
20-bit physical address = [DS]X10H + [SI]
= 20000H + 0024H = 20024H
A code segment is to be located from address 50000H to 5FFFFH in the
memory of 8086MP system, then what value must be loaded into CS
register? If [IP] = 0074H What would be the 20-bit physical address which
would be generated in 8086 system?
Sol: [CS] = 5000H
20-bit physical address = [CS]X10H + [IP]
= 50000H + 0074H = 50074H
Q.No:1(e) What is meant by “pipelining” in the instruction queue of 8086 MP? State
what happens in the instruction queue when the 8086 MP encounters a
Jump/Call instruction?
Ans: Fetching of next instruction while the current instruction is being
executed is known as 'pipelining'. In case of Jump/Call instruction, the
instruction queue will be dumped and it will be reloaded with the new
 instruction bytes.
What are the functions of bus interface unit (BIU) and execution unit (EU) in
8086 MP?
Ans: Functions of BIU- Fetching instructions from memory, reading or writing
data to/from memory and I/O.
Functions of EU- Decoding and executing instructions.
What is the use of MN / MX pins in 8086 MP?
Ans: If MN / MX is connected to Vcc, then 8086 MP is in minimum mode
(single processor system) and if MN / MX is connected to GND, then 8086
MP is in maximum mode (multi-processor system).
What is the use of LOCK pin in 8086 MP?
Ans: The 8086 outputs LOW on the LOCK pin to prevent other bus masters
from gaining control of the system bus. The LOCK signal is activated by the
'LOCK' prefix instruction.

SECTION - B

Question Question
No
Q.No:2 a) Draw the internal architecture of 8085 MP and explain about Flag register.

Fig-1. Architecture of 8085 MP

Flag Register: 8-bit register (contains 5 flags (flipflops))
Flags are set/reset depending on the result obtained after arithmetic or logical
operation.
SF ZF - AF - PF - CF
Sign flag: Set if the MSB of the result is 1, otherwise reset.
Zero flag: Set if the result is zero, otherwise reset.
Auxiliary flag: Set if there is any carry from lower 4-bits to higher 4-bits,
otherwise reset.
Parity flag: Set if the result contains even number of 1’s, otherwise reset.
Carry flag: Set if there is any carry from MSB, otherwise reset.

b) Identify the addressing mode and name the machine cycles used to fetch
and execute each of the following instructions.
(i) ADD M (ii) STA 5000H (iii) CMA
 Ans:
Instruction Machine cycles Addressing Mode
ADD M Opcode Fetch, Memory Read Indirect
STA 5000H Opcode Fetch, Memory Read, Direct
Memory Read, Memory Write
CMA Opcode Fetch Implicit

c) Explain the functioning of the transceiver circuit with the use of DT / R

and DEN signals of 8086 MP.

DEN (Data Enable) - This signal is provided as enable for data flow
through the transceiver.
DT / R ; (Data Transmit / Receive) Controls direction of data flow.

Fig-2. Transceiver circuit

Q.No:3 a) Define machine cycle. Draw the timing diagram for fetching and executing
the instruction ADD M of 8085 MP and Explain the various signals used in the
timing diagram. [Opcode for ADD M is 86H]
Ans: Machine cycle: It is the time required to complete one operation of
accessing memory or I/O.
 b) Write an assembly language program with suitable comments for a 8085
MP to find the largest in a series of five 8-bit numbers from memory locations
7000H to 7004H respectively and store the result at memory location 8000H.
ORG 2000H
MVI B, 04H
LXI H, 7000H
MOV A, M
BACK: INX H
CMP M
JNC NEXT
MOV A,M
NEXT: DCR B
JNZ BACK
STA 8000H
HLT
ORG 7000H
DB 01H, 20H, 33H, 25H, 10H
END

c) Explain the flag register in 8086 MP.

Q.No:4 a) Discuss the various addressing modes of 8085 MP with a suitable example.
Ans: 1. Register addressing mode; Eg., MOV A, B
2. Direct addressing mode; Eg., STA 3700H
3. Indirect addressing mode; Eg., LDAX B
4. Immediate addressing mode; Eg., MVI B, 20H
5. Implicit addressing mode; Eg., CMA
b) Explain the operation of the following instructions with a suitable example.
(i) ADD B (ii) MOV M, A (iii) DAA
Instruction Operation Example
ADD B [A] <= [A] + [B] If [A]=10H&[B]=20H, then
after the execution of ADD B
[A] = 10H+20H=30H
MOV M, A [[HL]]<=[A] If [A]=30H & [HL] = 5000H,
then the content of memory
location 5000H=[[HL]]=30H
DAA Converts binary [A] = 25H=0010 0101
number into
[B] = 36H=0011 0110
BCD number.
+ [A] = 0101 1011= 5BH
Generally it is
used after After DAA
ADD/SUB [A] = 61H = 0110 0001

c) Design a 8086 system to interface 32K x 8 EPROM using 3 to 8 decoder.

The starting address for EPROM is E0000H. Draw the memory map also.
Sol:
Q.No:5 a) Define instruction cycle. Draw the timing diagram for fetching and
executing the instruction OUT 50H of 8085 MP and Explain the various
signals used in the timing diagram. [Opcode for OUT is D3H]
Ans: Instruction cycle: It is the time required to complete the execution of an
instruction.

b) Design a suitable circuit to generate the control signals MEMR ,

MEMW , IOR & IOW in a 8085 MP system.
 Fig-3. Circuit to generate control signals related to memory & I/O
c) Design a 8086 system to interface 64K x 8 EPROM using 3 to 8 decoder.
The starting address for EPROM is C0000H. Draw the memory map also.
Sol:

Q.No:6 a) If the clock frequency of a 8085 Microprocessor is 2 MHz, then find out the
exact time delay implemented with the following DELAY sub-routine.

T-STATES No. Of times

instruction executed
DELAY: MVI B, 32H; 7T 1
GO: DCR B 4T N
JNZ 10T/7T (N-1)/1
GO
 RET 10T 1
T = 1/fclk = 1/(2x106) = 0.5uS; N = 50
TDELAY = 14T(N+1) = 14x0.5x10-6x(50+1) = 357uS
b) How is the lower address bus and data bus (AD7-AD0) demultiplexed
externally in a 8085 MP system?
Ans: In the first clock cycle of every machine cycle, AD0 to AD7 carries
lower byte Address, which is latched through an external octal latch and
ALE(Active high during T1) is used as the strobe signal as shown in the
below figure.

Fig-4. Demultiplexing of AD7-AD0

c) Design a 8086 system to interface 32K x 8 RAM using 3 to 8 decoder. The
starting address for RAM is D0000H. Draw the memory map also.
Sol: