PIC12F1822/16F182X

8/14/20-Pin 8-Bit Flash Microcontroller Product Brief

High-Performance RISC CPU: Peripheral Features:

• Only 49 Instructions to learn • Up to 17 I/O Pins and 1 Input-only Pin:
• Operating Speed: - High current sink/source for LED drivers
- DC – 32 MHz clock input - Individually programmable interrupt-on-
- DC – 125 ns instruction cycle change pins
• Interrupt Capability with Automatic Context - Individually programmable weak pull-ups
Saving • Timer0: 8-Bit Timer/Counter with 8-Bit
• 16-Level Deep Hardware Stack with Optional Programmable Prescaler
Overflow/Underflow Reset • Enhanced Timer1:
• Direct, Indirect and Relative Addressing modes: - 16-bit timer/counter with prescaler
- Two full 16-bit File Select Registers (FSRs) - External Gate Input mode
- FSRs can read program and data memory - Dedicated low-power 32 kHz oscillator driver
• Up to three Timer2 modules (Timer2,4,6): 8-Bit
Special Microcontroller Features: Timer/Counter with 8-Bit Period Register,
• Precision Internal Oscillator: Prescaler and Postscaler
- Factory calibrated to ±1%, typical • Up to two Enhanced Capture, Compare, PWM
- Software selectable frequency range from modules (ECCP):
32 MHz to 31 kHz - Software selectable time-bases
• 31 kHz Low-Power Internal Oscillator - Auto-shutdown and auto-restart
• External Oscillator Block with: - PWM steering
- 4 crystal/resonator modes up to 32 MHz • Up to two Capture, Compare, PWM modules
using 4xPLL (CCP):
- 3 external clock modes up to 32 MHz - Software selectable time-bases
• 4x Phase Locked Loop (PLL) • Up to two Master Synchronous Serial Port
• Fail-Safe Clock Monitor (MSSP) with SPI and I2CTM with:
• Two-Speed Start-up - 7-bit address masking
• Power-Saving Sleep mode - SMBus/PMBusTM compatibility
• Power-on Reset (POR) • Enhanced Universal Synchronous Asynchronous
• Power-up Timer (PWRT) Receiver Transmitter (EUSART):
• Oscillator Start-Up Timer (OST) - RS-232, RS-485 and LIN compatible
• Brown-out Reset (BOR) with Selectable Trip Point - Auto-Baud Detect
• Extended Watchdog Timer (WDT) - Auto-wake-up on start
• In-Circuit Serial Programming™ (ICSP™) via two • SR Latch (Integrated 555 Timer):
pins - Multiple Set/Reset input options
• In-Circuit Debug (ICD) via Two Pins • Analog-to-Digital Converter (ADC):
• Enhanced Low-Voltage Programming (LVP) - 10-bit resolution
• Operating Voltage Range: - Up to 12 channels
- 1.8V to 3.6V (PIC1XLF182X) • Up to 2 Comparators:
- 1.8V to 5.5V (PIC1XF182X) - Rail-to-rail inputs
• Programmable Code Protection - Power mode control
• Self-Programmable under Software Control - Software controllable hysteresis
• Voltage Reference module:
Low-Power Features: - Fixed voltage reference (FVR) with 1.024V,
2.048V and 4.096V output levels
• Standby Current (PIC1XLF182X):
- 5-bit rail-to-rail resistive DAC with positive
- 30 nA @ 1.8V, typical
and negative reference selection
• Operating Current (PIC1XLF182X):
• Capacitive Touch oscillator module:
- 75 A @ 1 MHz, 1.8V, typical
- Up to 12 channels
• Low-Power Watchdog Timer Current
• Data Signal Modulator:
(PIC1XLF182X):
- Select modulator and carrier sources from
- 500 nA @ 1.8V, typical
various module outputs.

 2009 Microchip Technology Inc. Advance Information DS41406B-page 1

PIC12F1822/16F182X

TABLE 1: PIC12F1822/16F182X AND PIC12LF1822/16LF1823 FAMILY TYPES

Program
Data Timers
Memory SRAM 10-bit A/D ECCP/ Cap Touch
Device EEPROM I/Os 8/16-bit EUSART MSSP
Flash (bytes) (ch) CCP Channels
(bytes)
(words)
PIC12F1822 2048 256 128 6 4 2/1 1 1 1/0 4
PIC12LF1822 2048 256 128 6 4 2/1 1 1 1/0 4
PIC16F1823 2048 256 128 12 8 2/1 1 1 1/0 8
PIC16LF1823 2048 256 128 12 8 2/1 1 1 1/0 8
PIC16F1824 4096 256 256 12 8 4/1 1 1 2/2 8
PIC16LF1824 4096 256 256 12 8 4/1 1 1 2/2 8
PIC16F1825 8192 256 1024 12 8 4/1 1 1 2/2 8
PIC16LF1825 8192 256 1024 12 8 4/1 1 1 2/2 8
PIC16F1828 4096 256 256 18 12 4/1 1 1 2/2 12
PIC16LF1828 4096 256 256 18 12 4/1 1 1 2/2 12
PIC16F1829 8192 256 1024 18 12 4/1 1 2 2/2 12
PIC16LF1829 8192 256 1024 18 12 4/1 1 2 2/2 12

DS41406B-page 2 Advance Information  2009 Microchip Technology Inc.

 PIC12F1822/16F182X

Note: Pin details are subject to change.

FIGURE 1: 8-PIN DIAGRAM FOR PIC12F1822/LF1822

PDIP, SOIC, DFN

VDD 1 8 VSS

PIC12LF1822
PIC12F1822
RA5 2 7 RA0
RA4 3 6 RA1
RA3 4 5 RA2

Note: See Table 2 for location of all peripheral functions.

TABLE 2: 8-PIN ALLOCATION TABLE (PIC12F1822/LF1822)

8-Pin PDIP/SOIC/DFN

Comparator
Cap Sense

Modulator
Reference

SR Latch

EUSART

Interrupt

Pull-up
Timers

MSSP

Basic
CCP
A/D
I/O

RA0 7 AN0 DACOUT CPS0 C1IN+ — — P1B(1) TX(1) SDO(1) IOC MDOUT Y ICSPDAT/
CK(1) SS(1) ICDDAT
RA1 6 AN1 VREF CPS1 C1IN0- SRI — — RX(1) SCL IOC MDMIN Y ICSPCLK/
DT(1) SCK ICDCLK
RA2 5 AN2 — CPS2 C1OUT SRQ T0CKI CCP1(1) — SDA INT/ MDCIN1 Y —
P1A(1) SDI IOC
FLT0
RA3 4 — — — — — T1G(1) — — SS(1) IOC — Y MCLR
VPP
ICDMCLR
RA4 3 AN3 — CPS3 C1IN1- — T1G(1) P1B(1) TX(1) SDO(1) IOC MDCIN2 Y OSC2
T1OSO CK(1) CLKOUT
CLKR
RA5 2 — — — — SRNQ T1CKI CCP1(1) RX(1) — IOC — Y OSC1
T1OSI P1A(1) DT(1) CLKIN
VDD 1 — — — — — — — — — — — — VDD
Vss 8 — — — — — — — — — — — — VSS
Note 1: Pin functions can be assigned to one of two pin locations via software.

 2009 Microchip Technology Inc. Advance Information DS41406B-page 3

PIC12F1822/16F182X
FIGURE 2: 14-PIN DIAGRAM FOR PIC16F/LF1823/1824/1825

PDIP, SOIC, TSSOP

VDD 1 14 VSS

PIC16LF1823/1824/1825
PIC16F1823/1824/1825
RA5 2 13 RA0
RA4 3 12 RA1
RA3 4 11 RA2
RC5 5 10 RC0
RC4 6 9 RC1
RC3 7 8 RC2

Note: See Table 3 for location of all peripheral functions.

FIGURE 3: 16-PIN DIAGRAM FOR PIC16F/LF1823/1824/1825

QFN
VDD

VSS
NC
NC

16 15 14 13

RA5 1 12 RA0
PIC16F1823/1824/1825
RA4 2PIC16LF1823/1824/182511 RA1
RA3/MCLR/VPP 3 10 RA2
RC5 4 9 RC0

5 6 7 8
RC3

RC1
RC4

RC2

Note: See Table 3 for location of all peripheral functions.

DS41406B-page 4 Advance Information  2009 Microchip Technology Inc.

 PIC12F1822/16F182X

TABLE 3: 14-PIN AND 16-PIN ALLOCATION TABLE (PIC16F/LF1823/1824/1825)

14-Pin PDIP/SOIC/TSSOP

Comparator
16-Pin QFN

Cap Sense

Modulator
Reference

SR Latch

EUSART

Interrupt

Pull-up
Timers

MSSP

Basic
CCP
A/D
I/O

RA0 13 7 AN0 DACOUT CPS0 C1IN+ — — — TX(1) — IOC — Y ICSPDAT/

CK(1) ICDDAT
RA1 12 11 AN1 VREF CPS1 C12IN0- SRI — — RX(1) — IOC — Y ICSPCLK
DT(1) ICDCLK
RA2 11 10 AN2 — CPS2 C1OUT SRQ T0CKI CCP3(2) — — INT/ — Y —
FLT0 IOC
RA3 4 3 — — — — — T1G(1) — — SS(1) IOC — Y MCLR
VPP
RA4 3 2 AN3 — CPS3 — — T1G(1) P2B(1,2) — SDO(1) IOC — Y OSC2
T1OSO CLKOUT
CLKR
RA5 2 1 — — — — — T1CKI CCP2(1,2) — — IOC — Y OSC1
T1OSI P2A(1,2) CLKIN
RC0 10 9 AN4 — CPS4 C2IN+ — — P1D(1,2) — SCL — — Y —
SCK
RC1 9 8 AN5 — CPS5 C12IN1- — — P1C(1,2) — SDA — — Y —
CCP4(2) SDI
RC2 8 7 AN6 — CPS6 C12IN2- — — P1D(1) — SDO(1) — MDCIN1 Y —
P2B(1,2)
RC3 7 6 AN7 — CPS7 C12IN3- — — P1C(1) — SS(1) — MDMIN Y —
CCP2(1,2)
P2A(1,2)
RC4 6 5 — — — C2OUT SRNQ — P1B TX(1) — — MDOUT Y —
CK(1)
RC5 5 4 — — — — — — CCP1 RX(1) — — MDCIN2 Y —
P1A DT(1)
VDD 1 16 — — — — — — — — — — — — VDD
VSS 14 13 — — — — — — — — — — — — VSS
Note 1: Pin functions can be assigned to one of two pin locations via software.
2: Pin function only available on PIC16F1824 and PIC16F1825.

 2009 Microchip Technology Inc. Advance Information DS41406B-page 5

PIC12F1822/16F182X
FIGURE 4: 20-PIN DIAGRAM FOR PIC16F/LF1828/1829

PDIP, SOIC, SSOP

VDD 1 20 VSS
RA5 2 19 RA0
RA4 3 18 RA1

PIC16LF1828/1829
RA3 4 17 RA2

PIC16F1828/1829
RC5 5 16 RC0
RC4 6 15 RC1
RC3 7 14 RC2
RC6 8 13 RB4
RC7 9 12 RB5
RB7 10 11 RB6

Note: See Table 4 for location of all peripheral functions.

FIGURE 5: 20-PIN DIAGRAM FOR PIC16F/LF1828/1829

QFN 4x4
RA5
RA4

RA0
VDD
VSS

20 19 18 17 16

RA3/MCLR/VPP 1 15 RA1
RC5 2 14 RA2
3 PIC16F1828/1829 13 RC0
RC4
PIC16LF1828/1829
RC3 4 12 RC1
RC6 5 11 RC2

6 7 8 9 10
RC7
RB7

RB5
RB6

RB4

Note: See Table 4 for location of all peripheral functions.

DS41406B-page 6 Advance Information  2009 Microchip Technology Inc.

 PIC12F1822/16F182X

TABLE 4: 20-PIN ALLOCATION TABLE (PIC16F/LF1828/1829)

20-Pin PDIP/SOIC/SSOP

Comparator
20-Pin QFN

Cap Sense
Reference

Modulator
SR Latch

EUSART

Interrupt

Pull-up
Timers

MSSP

Basic
CCP
A/D
I/O

RA0 19 16 AN0 VREF- CPS0 C1IN+ — — — — — IOC — Y ICSPDAT/

DACOUT ICDDAT
RA1 18 15 AN1 VREF+ CPS1 C12IN0- SRI — — — — IOC — Y ICSPCLK/
ICDCLK
RA2 17 14 AN2 — CPS2 C1OUT SRQ T0CKI CCP3 — — INT/ — Y —
FLT0 IOC
RA3 4 1 — — — — T1G(1) — — — IOC — Y MCLR
VPP
RA4 3 20 AN3 — CPS3 — — T1G(1) P2B(1) — SS2(1,2) IOC — Y OSC2
T1OSO CLKOUT
RA5 2 19 — — — — — T1CKI CCP2(1) — SDO2(1,2) IOC — Y OSC1
T1OSI P2A(1) CLKIN
RB4 13 10 AN10 — CPS10 — — — — — SDA1 IOC — Y —
SDI1
RB5 12 9 AN11 — CPS11 — — — — RX(1) SDA2(2) IOC — Y —
DT(1) SDI2(2)
RB6 11 8 — — — — — — — — SCL1 IOC — Y —
SCK1
RB7 10 7 — — — — — — — TX(1) SCL2(2) IOC — Y —
CK(1) SCK2(2)
RC0 16 13 AN4 — CPS4 C2IN+ — — P1D(1) — SS2(1,2) — — Y —
RC1 15 12 AN5 — CPS5 C12IN1- — — P1C(1) — SDO2(1,2) — — Y —
RC2 14 11 AN6 — CPS6 C12IN2- — — P1D(1) — — — MDCIN1 Y —
P2B(1)
RC3 7 4 AN7 — CPS7 C12IN3- — — P1C(1) — — — MDMIN Y —
CCP2(1)
P2A(1)
RC4 6 3 — — — C2OUT SRNQ — P1B TX(1) — — MDOUT Y —
CK(1)
RC5 5 2 — — — — — — CCP1 RX(1) — — MDCIN2 Y —
P1A DT(1)
RC6 8 5 AN8 — CPS8 — — — CCP4 — SS — — Y —
RC7 9 6 AN9 — CPS9 — — — — — SDO — — Y —
VDD 1 18 — — — — — — — — — — — — VDD
VSS 20 20 — — — — — — — — — — — — VSS
Note 1: Pin functions can be assigned to one of two pin locations via software.

 2009 Microchip Technology Inc. Advance Information DS41406B-page 7

PIC12F1822/16F182X
NOTES:

DS41406B-page 8 Advance Information  2009 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience
The Microchip name and logo, the Microchip logo, dsPIC,
and may be superseded by updates. It is your responsibility to
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
ensure that your application meets with your specifications.
rfPIC and UNI/O are registered trademarks of Microchip
MICROCHIP MAKES NO REPRESENTATIONS OR
Technology Incorporated in the U.S.A. and other countries.
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
OTHERWISE, RELATED TO THE INFORMATION, MXDEV, MXLAB, SEEVAL and The Embedded Control
INCLUDING BUT NOT LIMITED TO ITS CONDITION, Solutions Company are registered trademarks of Microchip
QUALITY, PERFORMANCE, MERCHANTABILITY OR Technology Incorporated in the U.S.A.
FITNESS FOR PURPOSE. Microchip disclaims all liability Analog-for-the-Digital Age, Application Maestro, CodeGuard,
arising from this information and its use. Use of Microchip dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
devices in life support and/or safety applications is entirely at ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
the buyer’s risk, and the buyer agrees to defend, indemnify and Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
hold harmless Microchip from any and all damages, claims, logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
suits, or expenses resulting from such use. No licenses are Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
conveyed, implicitly or otherwise, under any Microchip PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total
intellectual property rights. Endurance, TSHARC, UniWinDriver, WiperLock and ZENA
are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.

ISBN: 978-1-60932-055-3

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

 2009 Microchip Technology Inc. Advance Information DS41406B-page 9

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DS41406B-page 10 Advance Information  2009 Microchip Technology Inc.