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2.13 inch
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E-paper Display Series

GDEW0213Z16
Dalian Good Display Co., Ltd.
 GDEW0213Z16

Product Specifications

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Customer Standard
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Description 2.13” E-PAPER DISPLAY
Model Name GDEW0213Z16
Date 2018/10/31
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Revision 3.1
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Design Engineering

Approval Check Design

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No.17 Gonghua Street, Shahekou District, Dalian 116021 China

Tel: +86-411-84619565 Fax: +86-411-84619585-810

Email: info@good-display.com
Website: www.e-paper-display.com

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 GDEW0213Z16

Table of Contents

1. General Description.................................................... 5
1.1 Overview............................................................ 5
1.2 Feature .............................................................. 5
1.3 Mechanical Specification........................................ 5

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1.4 Mechanical Drawing of EPD module ....................... 6
1.5 Input/Output Terminals........................................ 7
1.6 Reference Circuit ................................................ 9

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1.7 Matched Development Kit ..................................... 10
2. Environmental............................................................ 11
2.1 Handling, Safety and Environmental Requirements... 11
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2.2 Reliability test..................................................... 12
3. Electrical Characteristics ............................................. 15
3.1 Absolute maximum rating..................................... 15
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3.2 Panel DC Characteristics....................................... 15
3.3 Panel AC Characteristics........................................ 16
3.4 Power Consumption.............................................. 20
4. Typical Operating Sequence......................................... 21
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4.1 Normal Operation Flow......................................... 21

4.2 Reference Program Code...................................... 23
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5. Command Table......................................................... 25
6. Optical characteristics................................................. 44
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6.1 Specifications .................................................... 44

6.2 Definition of contrast ratio................................... 44
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6.3 Reflection Ratio.................................................. 45

6.4 Bi-stability ........................................................ 45
7. Point and line standard............................................... 46
8. Packing..................................................................... 47
9. Precautions ................................................................ 48

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 GDEW0213Z16

Revision History

Rev. Issued Date Revised Contents

1.0 Jun.01.2015 Preliminary
1.1 Jun.09.2015 1. In part 4: Modify the mechanical drawing of EPD module.
1.2 Jun.17.2015 1. In part 7-2): Modify Image update Time at 25℃ from 8~12S to

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12~15S.
1.3 Jul.21.2015 1. In part 4: Modify the Mechanical Drawing of EPD module.
1.4 Jul.23.2015 1. In part 9-1): Add the panel’s storage and transportation
conditions.
2. In part 9-1): Add the panel’s operation conditions.

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3. In part note 9-2: Modify each update interval time should be
minimum at 150 seconds to 180 seconds.
1.5 Aug.24.2015 4. In part 12:
1. Deletetypical
8: Modify block diagram.
operating sequence.
1.6 Sep.18.2015 1. Modify Part Number.
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1.7 Nov.07.2015 1. In part 11: Modify T=40℃, RH=80% for 168 hrs to 240 hrs.
2.0 Feb.27.2017 1. In part 7-5: Modify Reference Circuit.
2.1 Aug.04.2017 1. In part 7-5: Modify Reference Circuit.
2.2 Jan.11.2018 1. In part 7-1: Absolute maximum rating
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3.0 May.21.2018 1. Updating
1. In Part 1.6): Modify Reference Circuit
3.1 Oct.31.2018
2. In part 1-7): Updating the website address of DESPI.
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1 General Description
1.1 Over View

The display is a TFT active matrix electrophoretic display, with interface and a
reference system design. The 2.13” active area contains 212×104 pixels, and has 1-
bit white/black and 1-bit red full display capabilities. An integrated circuit contains
gate buffer, source buffer, interface, timing control logic, oscillator, DC-DC, SRAM,
LUT, VCOM, and border are supplied with each panel.

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1.2 Features

High contrast

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High reflectance
Ultra wide viewing angle
Ultra low power consumption
Pure reflective mode IS
Bi-stable
Commercial temperature range
Landscape, portrait mode
Antiglare hard-coated front-surface
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Low current deep sleep mode
On chip display RAM
Waveform stored in On-chip OTP
Serial peripheral interface available
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On-chip oscillator
On-chip booster and regulator control for generating VCOM, Gate and source driving
voltage
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I2C Signal Master Interface to read external temperature sensor

Available in COG package IC thickness 280um
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1.3 Mechanical Specifications

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Parameter Specifications Unit Remark

Screen Size 2.13 Inch
Display Resolution 212(H)×104(V) Pixel Dpi: 111
Active Area 48.55(H)×23.71(V) mm
Pixel Pitch 0.229×0.228 mm
Pixel Configuration Square
Outline Dimension 59.2(H)×29.2 (V) ×0.98(D) mm
Weight 4±0.5 g

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 29.2±0.2<EPD>
G 26.8±0.2<PS>
25±0.2<FPL> 0.9
1.2

1.2
0.6
0.9
O 23.71±0.1<AA> 0.644
? 2.00

0.228
3.00
6.00±0.20

2.50
0.229
7.80±0.20 0.98±0.10
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3.91±0.20
0.50±0.10

3.91±0.20

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0.45±0.05
0.35±0.05
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3.65±0.3
55.5±0.2<PS>
48.55±0.2<AA>
0.5±0.05

53.7±0.2<FPL>

59.2±0.2<EPD>
1.00±0.10
1 24 15.51±0.10
12.50±0.1 0.13±0.03
14.11±0.10

6／48
0.15
D 1.40±0.10
-0.00
6.75+0.10 0.30±0.03
开窗区域
1.4 Mechanical Drawing of EPD module

14.30±0.20
1 24
白色丝印

1.5max 12.50±0.10 8.56±0.20

6.00±0.30
9.40±0.10

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10.30±0.10
10.30±0.10

3.90±0.30

1,Unlabeled tolerances:±0.15
2,Resolution:104*212
3,DPI: 111

(rtv area)

(ec area)
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(without protective film)

GDEW0213Z16
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2.13 inch Series

GDEW0213Z16
 GDEW0213Z16

1.5 Input/Output Terminals

1.5-1) Pin out List

Pin # Type Single Description Remark

NC No connection and do not connect with Keep Open

1
other NC pins
O GDR N-Channel MOSFET Gate Drive Control

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2

3 O RESE Current Sense Input for the Control Loop

4 C VGL Negative Gate driving voltage

5 C VGH Positive Gate driving voltage

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6 O TSCL I2C Interface to digital temperature sensor
Clock pin
I/O TSDA I2C Interface to digital temperature sensor
7
Date pin
8 I BS1
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Bus selection pin Note 5-5

9 O BUSY Busy state output pin Note 5-4

10 I RES # Reset Note 5-3

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11 I D/C # Data /Command control pin Note 5-2

12 I CS # Chip Select input pin Note 5-1

13 I/O D0 serial clock pin (SPI)

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14 I/O D1 serial data pin (SPI)

15 I VDDIO Power for interface logic pins

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16 I VCI Power Supply pin for the chip

17 VSS Ground
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18 C VDD Core logic power pin

19 C VPP Power Supply for OTP Programming

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20 C VSH Positive Source driving voltage

21 C PREVGH Power Supply pin for VGH and VSH

22 C VSL Negative Source driving voltage

23 C PREVGL Power Supply pin for VCOM, VGL and VSL

24 C VCOM VCOM driving voltage

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Note 5-1: This pin (CS#) is the chip select input connecting to the MCU. The chip is enabled
for MCU communication only when CS# is pulled Low.
Note 5-2: This pin (D/C#) is Data/Command control pin connecting to the MCU. When the
pin is pulled HIGH, the data will be interpreted as data. When the pin is pulled
Low, the data will be interpreted as command.
Note 5-3: This pin (RES#) is reset signal input. The Reset is active Low.
Note 5-4: This pin (BUSY) is Busy state output pin. When Busy is low, the operation of chip

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should not be interrupted and any commands should not be issued to the module.
The driver IC will put Busy pin low when the driver IC is working such as:
- Outputting display waveform; or
- Programming with OTP

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- Communicating with digital temperature sensor
Note 5-5: This pin (BS1) is for 3-line SPI or 4-line SPI selection. When it is “Low”, 4-line SPI
is selected. When it is “High”, 3-line SPI (9 bits SPI) is selected. Please refer to
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below Table.

Table: Bus interface selection

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BS1 MPU Interface
L 4-lines serial peripheral interface (SPI)
H 3-lines serial peripheral interface (SPI) – 9 bits SPI
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1.6 Reference Circuit

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Note：

1. Inductor L1 is wire-wound inductor. There are no special requirements

for other parameters.

2. Suggests using Si1304BDL or Si1308EDL TUBE MOS (Q1) , otherwise it

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may affect the normal boost of the circuit.

3. The default circuit is 4-wire SPI. If the user wants to use 3-wire SPI, the
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resistor R4 can be removed when users design.

4. Default voltage value of all capacitors is 50V.

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1.7 Matched Development Kit

Our Development Kit designed for SPI E-paper Display aims to help users to
learn how to use E-paper Display more easily. It can refresh black-white E-
paper Display and three-color (black, white and red/Yellow) Good Display ‘s E-
paper Display. And it is also added the functions of USB serial port, Raspberry
Pi and LED indicator light ect.
DESPI Development Kit consists of the development board DESPI-M01 and the

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pinboard DESPI-C01

More details about the Development Kit, please click to the following link:

http://www.e-paper-display.com/products_detail/productId=402.html

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2. Environmental

2.1 Handling, Safety and Environmental Requirements

WARNING
The display glass may break when it is dropped or bumped on a hard surface.
Handle with care.
Should the display break, do not touch the electrophoretic material. In case of
contact with electrophoretic material, wash with water and soap.

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CAUTION
The display module should not be exposed to harmful gases, such as acid and
alkali gases, which corrode electronic components.
Disassembling the display module can cause permanent damage and invalidate
the warranty agreements.

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Observe general precautions that are common to handling delicate electronic
components. The glass can break and front surfaces can easily be damaged. Moreover
the display is sensitive to static electricity and other rough environmental conditions.
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Data sheet status
Product specification The data sheet contains final product specifications.
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Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System
(IEC 134).
Stress above one or more of the limiting values may cause permanent damage to
the device.
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These are stress ratings only and operation of the device at these or any other
conditions above those given in the Characteristics sections of the specification is
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not implied. Exposure to limiting values for extended periods may affect device
reliability.
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Application information
Where application information is given, it is advisory and dose not form part of
the specification.
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Product Environmental certification

RoHS

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2.2 Reliability test

TEST CONDITION METHOD REMARK

When the experimental cycle
When
finished, the EPD samples will be
experiment
taken out from the high
finished, the
temperature environmental
High- T = 40 ℃ , EPD must
chamber and set aside for a few

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1 Temperature RH=35%, meet
minutes. As EPDs return to room
Operation for 240 hrs electrical and
temperature, testers will observe
optical
the appearance, and test electrical
performance
and optical performance based on
standards.

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standard # IEC 60 068-2-2Bp.
When the experimental cycle
When
finished, the EPD samples will be
experiment
taken out from the low
finished, the

2
Low-
Temperature
T = 0℃
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temperature environmental
chamber and set aside for a few
EPD
meet
must

for 240 hrs minutes. As EPDs return room

Operation electrical and
temperature, testers will observe
optical
the appearance, and test electrical
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performance
and optical performance based on
standards.
standard # IEC 60 068-2-2Ab.
When the experimental cycle
When
finished, the EPD samples will be
experiment
taken out from the high
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T = +60 ℃ , finished, the

temperature environmental
High- RH= 35%, EPD must
chamber and set aside for a few
3 Temperature for 240 hrs meet
minutes. As EPDs return to room
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Storage Test in white electrical and

temperature, testers will observe
pattern optical
the appearance, and test electrical
performance
and optical performance based on
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standards.
standard # IEC 60 068-2-2Bp.
When the experimental cycle
When
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finished, the EPD samples will be

experiment
taken out from the low
T = -25℃ finished, the
temperature environmental
Low- EPD must
for 240 hrs chamber and set aside for a few
4 Temperature meet
minutes. As EPDs return to room
Storage Test in white electrical and
temperature, testers will observe
pattern optical
the appearance, and test electrical
performance
and optical performance based on
standards.
standard # IEC 60 068-2-2Ab

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When the experimental cycle When

finished, the EPD samples will be experiment
High taken out from the environmental finished, the
Temperature T=+40 ℃ , chamber and set aside for a few EPD must
5 , High- RH=80% minutes. As EPDs return to room meet
Humidity for 240 hrs temperature, testers will observe electrical and
Operation the appearance, and test electrical optical
and optical performance based on performance
standard # IEC 60 068-2-3CA. standards.

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When the experimental cycle
When
finished, the EPD samples will be
experiment
High T=+50 ℃ , taken out from the environmental
finished, the
Temperature RH=80% chamber and set aside for a few
EPD must

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6 , High- For 240hrs minutes. As EPDs return to room
meet
Humidity Test in white temperature, testers will observe
electrical
Storage pattern the appearance, and test electrical
performance
and optical performance based on
standards.
standard # IEC 60 068-2-3CA.
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1. Samples are put in the Temp &
Humid. Environmental Chamber.
Temperature cycle starts with -
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25℃, storage period 30 minutes.
After 30 minutes, it needs 30min
to let temperature rise to 60℃.
After 30min, temperature will be
adjusted to 60℃, RH=35% and When
[-25 ℃ 30mins] storage period is 30 minutes. experiment
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→ [+60 ℃ , After 30 minutes, it needs 30min finished, the

RH=35% to let temperature rise to -25℃. EPD must
Temperature
30mins], One temperature cycle (2hrs) is meet
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7 Cycle
50 cycles complete. electrical and
Test in white 2. Temperature cycle repeats 70 optical
pattern times. performance
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3. When 70 cycles finished, the standards.

samples will be taken out from
experiment chamber and set
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aside a few minutes. As EPDs

return to room temperature, tests
will observe the appearance, and
test electrical and optical
performance based on standard
# IEC 60 068-2-14NB.

UV exposure 765 W/m2 for

8 Standard # IEC 60 068-2-5 Sa
Resistance 168 hrs,40℃

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Machine model:
Electrostatic
9 +/-250V, Standard # IEC61000-4-2
discharge
0Ω,200pF

1.04G,Frequeny:
10~500Hz
Package
10 Direction :X,Y,Z Full packed for shipment
Vibration
Duration:1hours
in each direction

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Drop from
height of 122
cm on Concrete
Package Drop surface Drop
Full packed for shipment

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11 Impact sequence: 1
corner, 3edges,
6face One drop
for each. IS
Actual EMC level to be measured on customer application.
Note: (1) The protective film must be removed before temperature test.
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(2) There’s temperature vs display quality limitation in our display
module, we guarantee 1 pixel display quality from 5℃ ~ 30℃, and 2

pixel display quality for 0℃~ 5℃ & 30℃ ~ 40℃.

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(3) In order to make sure the display module can provide the best display
quality, the update should be made after putting the display module in stable
temperature environment for 15 mins.
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3. Electrical Characteristics

3.1 Absolute maximum rating

Parameter Symbol Rating Unit

Logic Supply Voltage VCI -0.3 to +6.0 V
Logic Input Voltage VIN -0.3 to VCI +2.4 V
Operating Temp. range TOPR 0 to +40 ℃
Storage Temp. range TSTG -25 to +60 ℃

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Humidity range - 40~70 %RH
*Note: Avoid direct sunlight.

3.2 Panel DC Characteristics

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The following specifications apply for: VSS = 0V, VCI = 3.3V, TA = 25℃

Parameter Symbol Conditions Min Typ Max Unit

Single ground VSS - - 0 - V
Logic Supply Voltage VCI - 2.3 3.3 3.6 V
High level input voltage VIH
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Digital input pins 0.7VCI - VCI V
Low level input voltage VIL Digital input pins 0 - 0.3VCI V
High level VOH Digital input pins ,
VCI-0.4 - - V
IOH= 400
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output voltage
Low level Digital input pins ,
VOL 0 - 0.4 V
output voltage IOL= -400
Image update current IUPDATE - - 8 10 mA
Standby panel current Istandby - - - 5 uA
Power panel（update） PUPDATE - - 26.4 40 mW
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Standby power panel PSTBY - - - 0.0165 mW

Operating temperature - - 0 - 40 ℃
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Storage temperature - - -25 - 60 ℃

Image update Time
- - - 12 15 Sec
at 25 ℃
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DC/DC off
No clock
Deep sleep mode current IVCI - 2 5 uA
No input load
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Ram data retain

DC/DC off
No clock
Sleep mode current IVCI - 35 50 uA
No input load
Ram data retain

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- The Typical power consumption is measured with following pattern transition: from
horizontal 2 gray scale pattern to vertical 2 gray scale pattern.(Note 3-1)
- The standby power is the consumed power when the panel controller is in standby
mode.
- The listed electrical/optical characteristics are only guaranteed under the controller &
waveform provided by Good Display
- Vcom is recommended to be set in the range of assigned value ± 0.1V.
Note 3-1

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The Typical power consumption

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3.3 Panel AC Characteristics
3-3-1) Oscillator frequency
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The following specifications apply for : VSS = 0V, VCI = 3.3V, TA = 25℃
Parameter Symbol Conditions Min Typ Max Unit
Internal Oscillator frequency Fosc VCI=2.3 to 3.6V - 1.625 - MHz
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3-3-2) MCU Interface

3-3-2-1) MCU Interface Selection
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In this module, there are 4-wire SPI and 3-wire SPI that can communicate with MCU.
The MCU interface mode can be set by hardware selection on BS1 pins. When it is
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“Low”, 4-wire SPI is selected. When it is “High”, 3-wire SPI (9 bits SPI) is selected.

Pin Name Data/Command Interface Control Signal

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Bus interface D1 D0 CS# D/C# RES#

SPI4 SDIN SCLK CS# D/C# RES#
SPI3 SDIN SCLK CS# L RES#
Table 3-1: MCU interface assignment under different bus interface mode
Note 3-2: L is connected to VSS Note
3-3: H is connected to VCI

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3-3-2-2) MCU Serial Interface (4-wire SPI)

The 4-wire SPI consists of serial clock SCLK, serial data SDIN, D/C#, CS#. In SPI
mode, D0 acts as SCLK, D1 acts as SDIN.

Function CS# D/C# SCLK

Write Command L L ↑

Write data L H ↑

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Table 3-2: Control pins of 4-wire Serial Peripheral interface

Note 3-4: ↑stands for rising edge of signal

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SDIN is shifted into an 8-bit shift register in the order of D7, D6, ... D0. The data byte in
the shift register is written to the Graphic Display Data RAM (RAM) or command register
in the same clock. Under serial mode, only write operations are allowed.
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D
D
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Figure 3-1: Write procedure in 4-wire Serial Peripheral Interface mode

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3-3-2-3) MCU Serial Interface (3-wire SPI)

The 3-wire serial interface consists of serial clock SCLK, serial data ADIN and CS#.
In 3-wire SPI mode, D0 acts as SCLK, D1 acts as SDIN, The pin D/C# can be connected
to an external ground.

The operation is similar to 4-wire serial interface while D/C# pin is not used. There
are altogether 9-bits will be shifted into the shift register on every ninth clock in

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sequence: D/C# bit, D7 to D0 bit. The D/C# bit (first bit of the sequential data) will
determine the following data byte in shift register is written to the Display Data RAM
(D/C# bit = 1) or the command register (D/C# bit = 0).Under serial mode, only write
operations are allowed.

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Function CS# D/C# SCLK
Write Command L Tie LOW ↑

Write data
IS L Tie LOW ↑

Table 3-3: Control pins of 3-wire Serial Peripheral Interface

Note 3-10: ↑stands for rising edge of signal
D
D
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Figure 3-2: Write procedure in 3-wire Serial Peripheral Interface mode

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3-3-3) Timing Characteristics of Series Interface

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PL
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Symbol Signal Parameter Min Typ Max Unit

tcss Chip Select Setup Time 60 - - ns
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tcsh Chip Select Hold Time 65 - - ns

CS#
tscc Chip Select Setup Time 20 - - ns
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tchw Chip Select Setup Time 40 - - ns

tscycw Serial clock cycle (write) 100 - - ns
tshw SCL “H” pulse width (write) 35 - - ns
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tslw SCL“L” pulse width (write) 35 - - ns

SCLK
tscycr Serial clock cycle (Read) 150 - - ns
tshr SCL “H” pulse width (Read) 60 - - ns
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tslr SCL “L” pulse width (Read) 60 - - ns

tsds SDIN Data setup time 30 - - ns
tsdh Data hold time 30 - - ns
(DIN)
tacc Access time - - 10 ns
(DOUT)
toh Output disable time 15 - - ns

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3.4 Power Consumption

Parameter Symbol Conditions TYP Max Unit Remark

Panel power consumption during update - 25℃ 26.4 40 mW -
Power consumption in standby mode - 25℃ - 0.0165 mW -

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D
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4. Typical Operating Sequence

4.1 Normal Operation Flow

4.1-1) BWR mode & LUT form Register

System Power

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Reset the EPD driver IC

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Booster soft start

Power setting
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Power on
D
Panel setting

PLL control
D

Resolution setting
O

Load image data

O

Display refresh
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Border floating

Enter into
Turn off
deep sleep
mode

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4.1-2) BWR mode & LUT form OTP

System Power

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Reset the EPD driver IC

Booster soft start

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Power on

Panel setting
IS
Resolution setting
D
Load image data

Display refresh
D

Border floating
O

Enter into
Turn off
O

deep sleep
mode
G

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4.2 Reference Program Code

4.2-1) BWR mode & LUT from register

System power LUT

Reset the EPD driver IC Data start transmission 1

SPI (0x10)

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Booster soft start
SPI (0x06,0x17,0x17,0x17) Transport B/W data

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Power setting SPI Data start transmission 2
(0x01,0x03,0x00,0x2b,0x2b,0x09) SPI (0x13)

Power on
SPI (0x04)
IS Transport red data

Display refresh
Check BUSY pin BUSY=Low SPI (0x12)
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BUSY=High
Panel setting Check BUSY pin BUSY=Low
SPI (0x00,0xaf) BUSY=High

Vcom and data interval setting

D

SPI (0x50,value)Note1
PLL control
SPI (0x30,0x3a)
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Power off
Resolution setting SPI (0x02)
SPI (0x61,0x68,0x00,0xD4)
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Deep sleep
VCM_DC setting
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SPI (0x07,0xa5)
SPI (0x82,0x12)

Vcom and data interval setting

SPI (0x50,0x87)

Note1: Set border to floating.

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4.2-2) BWR mode & LUT from OTP

System power
Data start transmission 2
SPI (0x13)
Reset the EPD driver IC

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Transport red data
Booster soft start
SPI (0x06,0x17,0x17,0x17)
Display refresh

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SPI (0x12)
Power on
SPI (0x04)
Check BUSY pin BUSY=Low

Check BUSY pin

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BUSY=Low BUSY=High
Vcom and data interval setting
BUSY=High SPI (0x50,value)Note1
Panel setting
D
SPI (0x00,0x0f)
Power off
SPI (0x02)
Resolution setting
SPI (0x61,0x68,0x00,0xD4)
Deep sleep
D

SPI (0x07,0xa5)
Vcom and data interval setting
SPI (0x50,0x87)
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Data start transmission 1

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SPI (0x10)
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Transport B/W data

Note1: Set border to floating.

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5. Command Table
W/R: 0: Write cycle 1: Read cycle C/D: 0: Command 1: Data
D7~D0: -: Don’t care #: Valid Data

# Command W/R C/D D7 D6 D5 D4 D3 D2 D1 D0 Registers Default

0 0 0 0 0 0 0 0 0 0 00h
Panel Setting
1 RES[1:0],REG,KW/R,U
(PSR) 0 1 # # # # # # # # 0Fh
D,SHL, SHD_N,RST_N

AY
0 0 0 0 0 0 0 0 0 1 01h
0 1 - - - - - - # # VDS_EN,VDG_EN 03h
VCOM_HV,VGHL_LV
Power Setting 0 1 - - - - - # # # 00h
2 [1:0]
(PWR)
0 1 - - # # # # # # VDH[5:0] 26h

PL
0 1 - - # # # # # # VDL[5:0] 26h
0 1 - - # # # # # # VDHR[5:0] 03h
3 Power OFF(POF) 0 0 0 0 0 0 0 0 1 0 02h
Power OFF 0 0 0 0 0 0 0 0 1 1 03h
4 Sequence
Setting(PFS) 0 1 - -
IS
# # - - - - T_VDS_OF 00h

5 Power ON(PON) 0 0 0 0 0 0 0 1 0 0 04h

6 Power ON 0 0 0 0 0 0 0 1 0 1 05h
D
Measure(PMES)
0 0 0 0 0 0 0 1 1 0 06h
Booster Soft 0 1 # # # # # # # # BT_PHA[7:0] 17h
7 Start(BTST)
0 1 # # # # # # # # BT_PHB[7:0] 17h
0 1 - - # # # # # # BT_PHC[5:0] 17h
D

0 0 0 0 0 0 0 1 1 1 07h
8 Deep Sleep
0 1 1 0 1 0 0 1 0 1 Check code A5h
B/W Pixel Data
Display Start 0 0 0 0 0 1 0 0 0 0 10h
O

(160×296)
Transmission
9 1(DTM1,white/ 0 1 # # # # # # # # KPXL[1:8] 00h
black Data)(x- 0 1 .. .. .. .. .. .. .. .. .. …
O

byte command) 0 1 # # # # # # # # KPXL[n-1:n] 00h

0 0 0 0 0 1 0 0 0 1 11h
10 Data Stop
1 1 # - - - - - - - 00h
G

11 Display 0 0 0 0 0 1 0 0 1 0 12h
Refresh(DRF)
Red Pixel
Display Start 0 0 0 0 0 1 0 0 1 1 13h
Data(160×296)
Transmission 2
0 1 # # # # # # # # RPXL[1:8] 00h
12 (DTM2, Red
Data) (x-byte 0 1 .. .. .. .. .. .. .. .. .. ..
command) 0 1 # # # # # # # # RPXL[n-1:n] 00h

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 GDEW0213Z16

# Command W/R C/D D7 D6 D5 D4 D3 D2 D1 D0 Registers Default

VCOM LUT(LUTC) (45-
byte command,
13 structure of bytes 2~7 0 0 0 0 1 0 0 0 0 0 20h
repeated)

W2W LUT (LUTWW)

(43-byte command,
14 structure of bytes 2~7 0 0 0 0 1 0 0 0 0 1 21h

AY
repeated 7 times)

B2W LUT (LUTBW /

LUTR) (43-byte
15 command, structure of 0 0 0 0 1 0 0 0 1 0 22h
bytes 2~7 repeated 7

PL
times)
W2B LUT (LUTWB /
LUTW) (43-byte
16 command, structure of 0 0 0
IS 0 1 0 0 0 1 1 23h
bytes 2~7 repeated 7
times)
B2B LUT (LUTBB /
LUTB) (43-byte
D
17 command, sturcture of 0 0 0 0 1 0 0 1 0 0 24h
bytes 2~7 repeated 7
times)
0 0 0 0 1 1 0 0 0 0 30h
18 PLL control(PLL)
0 1 - - # # # # # # M[2:0],N[2:0] 3Ch
0 0 0 1 0 0 0 0 0 0 40h
D

Temperature Sensor LM[10:3]/TSR

19 1 1 # # # # # # # # [7:0] 00h
Calibration (TSC)
1 1 # # # - - - - - LM[2:0]/- 00h
O

Temperature Sensor 0 0 0 1 0 0 0 0 0 1 41h

20
Selection 0 1 # - - - # # # # TSE,TO[3:0] 00h
0 0 0 1 0 0 0 0 1 0 42h
O

Temperature Sensor 0 1 # # # # # # # # WATTR[7:0] 00h

21
Write (TSW) 0 1 # # # # # # # # WMSB[7:0] 00h
G

0 1 # # # # # # # # WLSB[7:0] 00h
0 0 0 1 0 0 0 0 1 1 43h
Temperature Sensor
22 1 1 # # # # # # # # RMSB[7:0] 00h
Read (TSR)
1 1 # # # # # # # # RLSB[7:0] 00h

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 GDEW0213Z16

# Command W/R C/D D7 D6 D5 D4 D3 D2 D1 D0 Registers Default

Vcom and data 0 0 0 1 0 1 0 0 0 0 50h
23 interval setting 0 1 # # # # # # # #
VBD[1:0],DDX[1
D7h
(CDI) :0],CDI[3:0]

Lower Power 0 0 0 1 0 1 0 0 0 1 51h

24 Detection (LPD) 1 1 - - - - - - - # LPD 01h
0 0 0 1 1 0 0 0 0 0 60h

AY
25 TCON setting S2G[3:0],G2S[3
(TCON) 0 1 # # # # # # # # 22h
:0]
0 0 0 1 1 0 0 0 0 1 61h
Resolution 0 1 # # # # # 0 0 0 HRES[7:3] 00h
26 setting (TRES)
0 1 - - - - - - - # 00h

PL
VRES[8:0]
0 1 # # # # # # # # 00h
0 0 0 1 1 1 0 0 0 1 71h
27 Get Status (FLG) PTL_FLAG,I2C_B
1 1 - # # # # # # # 02h
USY,DATA
Auto 0 0 1
IS
0 0 0 0 0 0 0 80h
28 Measurement AMVT[1:0],XON,
0 1 - - # # # # # # 10h
Vcom AMVS,
0 0 1 0 0 0 0 0 0 1 81h
D
29 Read Vcom
Value(VV) 1 1 - - # # # # # # VV[5:0] 00h
0 0 1 0 0 0 0 0 1 0 82h
VCM_DC Setting
30 (VDCS) 0 1 - - # # # # # # VDCS[5:0] 00h

0 0 1 0 0 1 0 0 0 0 90h
D

0 1 # # # # # 0 0 0 HRST[7:3] 00h
0 1 # # # # # 1 1 1 HRED[7:3] 07h
Partial Window 0 1 - - - - - - - # 00h
O

31 (PTL) VRST[8:0]
0 1 # # # # # # # # 00h
0 1 - - - - - - - # 00h
VRED[8:0]
O

0 1 # # # # # # # # 00h
0 1 - - - - - - - # PT_SCAN 01h
32 Partial In (PTIN) 0 0 1 0 0 1 0 0 0 1 91h
G

33 Partial Out 0 0 1 0 0 1 0 0 1 0 92h

(PTOUT)
0 0 1 0 1 0 0 0 0 0 A0h
34 Program Mode Check code =
(PGM) 0 1 1 0 1 0 0 1 0 1 A5h
A5h

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 GDEW0213Z16

# Command W/R C/D D7 D6 D5 D4 D3 D2 D1 D0 Registers Default

Active
35 Progrmming 0 0 1 0 1 0 0 0 0 1 A1h
(APG)
0 0 1 0 1 0 0 0 1 0 A2h
1 1 - - - - - - - - Read Dummy N/A
36 Read OTP 1 1 # # # # # # # # Data of Address N/A
(ROTP)

AY
1 1 .. .. .. .. .. .. .. .. .. N/A
1 1 # # # # # # # # Data of address=n N/A
0 0 1 1 1 0 0 0 1 1 E3h
37 Power Saving VCOM_W[3:0],SD_
(PWS) 0 1 # # # # # # # # 00h
W[3:0]

PL
IS
D
D
O
O
G

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 GDEW0213Z16

(1) Panel Setting (PSR) (Register: R00H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 0 0 0 0 0 0
Setting the panel
0 1 RES1 RES0 REG_EN BWR UD SHL SHD_N RST_N
RES[1:0]: Display Resolution setting (source x gate)
00b: 96x230 (Default) Active source channels: S0 ~ S95.
Active gate channels: G0 ~ G229.

AY
01b: 96x252 Active source channels: S0 ~ S95.
Active gate channels: G0 ~ G251.
10b: 128x296 Active source channels: S0 ~ S127.
Active gate channels: G0 ~ G295.

PL
11b: 160x296 Active source channels: S0 ~ S159.
Active gate channels: G0 ~ G295.
REG_EN: LUT selection
0: LUT from OTP. (Default)
1: LUT from register.
IS
BWR: Black / White / Red
0: Pixel with B/W/Red. (Default)
1: Pixel with B/W.
D
UD: Gate Scan Direction
0: Scan down. First line to last line: Gn-1→Gn-2→Gn-3→…→G0
1: Scan up. (default) First line to last line: G0→G1→G2→…→Gn-1
SHL: Source Shift direction
D

0: Shift left First data to last data: Sn-1→Sn-2→Sn-3→…→S0

1: Shift right. (default) First data to last data: S0→S1→S2→…→Sn-1
SHD_N: Booster Switch
O

0: Booster OFF, register data are kept, and SEG/BG/VCOM are kept 0V or
floating.
1: Booster ON (Default)
O

When SHD_N become LOW, charge pump will be turned OFF, register and
SRAM data will keep until VDD OFF, and SD output and VCOM will remain
G

previous condition. SHD_N may have two conditions: 0v or floating.

RST_N: Soft Reset
1: No effect (Default). Booster OFF, Register data are set to their default
values, and SEG/BG/VCOM: 0V
When RST_N become LOW, the driver will be reset, all registers will be reset
to their default value. All driver functions will be disabled. SD output and
VCOM will base on previous condition. It may have two conditions: 0v or
floating

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 GDEW0213Z16

(2) Power Setting (PWR) (R01H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 0 0 0 0 0 1
Selecting 0 1 - - - - - - VDS_EN VDG_EN
0 1 - - - - - VCOM_HV VGHL_LV[1:0]
Internal/Ext
0 1 - - VDH[5:0]
ernal Power

AY
0 1 - - VDL[5:0]
0 1 - - VDHR[5:0]
VDS_EN: Source power selection
0: External source power from VDH/VDL pins
1: Internal DC/DC function for generating VDH/VDL

PL
VDG_EN: Gate power selection
0: External gate power from VGH/VGL pins
1: Internal DC/DC function for generating VGH/VGL
VCOM_HV: VCOM Voltage Level
IS
0: VCOMH=VDH+VCOMDC, VCOML=VHL+VCOMDC
1: VCOML=VGH, VCOML=VGL
VGHL_LV[1:0]: VGH / VGL Voltage Level selection.
D
VGHL_LV VGHL voltage level
00(Default) VGH=16V,VGL= -16V
01 VGH=15V,VGL= -15V
10 VGH=14V,VGL= -14V
11 VGH=13V,VGL= -13V
D

VDH[5:0]: Internal VDH power selection for B/W pixel.(Default value: 100110b)
O

VDH VDH_V VDH VDH_V

000000 2.4V … …
O

000001 2.6V 100110 10.0V

000010 2.8V 100111 10.2V
000011 3.0V 101000 10.4V
G

000100 3.2V 101001 10.6V

000101 3.4V 101010 10.8V
000110 3.6V 101011 11.0V
000111 3.8V (others) 11.0V

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 GDEW0213Z16

VDL[5:0]: Internal VDL power selection for B/W pixel. (Default value: 100110b)

VDL VDL_V VDL VDL_V

000000 -2.4V … …
000001 -2.6V 100110 -10.0V
000010 -2.8V 100111 -10.2V
000011 -3.0V 101000 -10.4V
000100 -3.2V 101001 -10.6V
000101 -3.4V 101010 -10.8V
000110 -3.6V 101011 -11.0V

AY
000111 -3.8V (others) -11.0V
VDHR[5:0]: Internal VDHR power selection for Red pixel. (Default value: 000011b)

VDHR VDHR _V VDHR VDHR _V

000000 2.4V … …

PL
000001 2.6V 100110 10.0V
000010 2.8V 100111 10.2V
000011 3.0V 101000 10.4V
000100 3.2V 101001 10.6V
000101
000110
3.4V
3.6V
IS 101010
101011
10.8V
11.0V
000111 3.8V (others) 11.0V
D
(3) Power OFF (PWR) (R02H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

Turning OFF the power 0 0 0 0 0 0 0 0 1 0
After the Power Off command, the driver will power off following the Power Off Sequence. This
D

command will turn off charge pump, T-con, source driver, gate driver, VCOM, and temperature
sensor, but register data will be kept until VDD becomes OFF. Source Driver output and Vcom
O

will remain as previous condition, which may have 2 condition: 0V or floating.

(4) Power off sequence setting (PFS) (R03H)

O

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 0 0 0 0 1 1
G

Setting Power OFF sequence

0 1 - - T_VDS_OFF[1:0] - - - -
T_VDS_OFF[1:0]: Power OFF Sequence of VDH and VDL.
00b: 1frame (Default) 01b: 2 frames 10b: 3frames 11b:4 frame

(5) Power ON (PON) (R04H)

Action W/ C/D D7 D6 D5 D4 D3 D2 D1 D0
Turning ON the Power 0 0 0 0 0 0 0 1 0 0

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 GDEW0213Z16

After the Power ON command, the driver will be powered ON following the Power ON Sequence.
Refer to the Power ON Sequence section. In the sequence, temperature sensor will be activated
for one time sensing before enabling booster.

(6) Power ON Measure (PMES) (R05H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 0 0 0 1 0 1
This command enables the internal bandgap, which will be cleared by the next POF.

AY
(7) Booster Soft Start (BTST) (R06H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

PL
0 0 0 0 0 0 0 1 1 0

Starting data 0 1 BT_PHA7 BT_PHA6 BT_PHA5 BT_PHA4 BT_PHA3 BT_PHA2 BT_PHA1 BT_PHA0
transmission
0 1 BT_PHB7 BT_PHB6 BT_PHB5 BT_PHB4 BT_PHB3 BT_PHB2 BT_PHB1 BT_PHB0
IS
0 1 - - BT_PHC5 BT_PHC4 BT_PHC3 BT_PHC2 BT_PHC1 BT_PHC0
BTPHA[7:6]: Soft start period of phase A.
00b: 10mS 01b: 20mS 10b: 30mS 11b: 40mS
BTPHA[5:3]: Driving strength of phase A
D
000b: strength 1 001b: strength 2 010b: strength 3 011b: strength 4
100b: strength 5 101b: strength 6 110b: strength 7 111b:strength8(strongest)
BTPHA[2:0]: Minimum OFF time setting of GDR in phase B
000b: 0.27uS 001b: 0.34uS 010b: 0.40uS 011b: 0.54uS
100b: 0.80uS 101b: 1.54uS 110b: 3.34uS 111b: 6.58uS
D

BTPHB[7:6]: Soft start period of phase B.

00b: 10mS 01b: 20mS 10b: 30mS 11b: 40mS
O

BTPHB[5:3]: Driving strength of phase B

000b: strength1 001b: strength2 010b: strength3 011b: strength 4
100b: strength5 101b: strength6 110b: strength7 111b: strength8 (strongest)
O

BTPHB[2:0]: Minimum OFF time setting of GDR in phase B

000b: 0.27uS 001b: 0.34uS 010b: 0.40uS 011b: 0.54uS
G

100b: 0.80uS 101b: 1.54uS 110b: 3.34uS 111b: 6.58uS

BTPHC[5:3]: Driving strength of phase C
000b: strength 1 001b: strength 2 010b: strength 3 011b: strength 4
100b: strength 5 101b: strength 6 110b: strength 7 111b: strength 8 (strongest)
BTPHC[2:0]: Minimum OFF time setting of GDR in phase C
000b: 0.27uS 001b: 0.34uS 010b: 0.40uS 011b: 0.54uS
100b: 0.80uS 101b: 1.54uS 110b: 3.34uS 111b: 6.58uS

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 GDEW0213Z16

(8) Deep Sleep (DSLP) (R07H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

Deep 0 0 0 0 0 0 0 1 1 1
Sleep 0 1 1 0 1 0 0 1 0 1
After this command is transmitted, the chip would enter the deep-sleep mode to save power.
The deep sleep mode would return to standby by hardware reset.
The only one parameter is a check code, the command would be executed if check code = 0xA5.

(9) Data Start Transmission 1 (DTM1) (R10H)

AY
Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 0 0 1 0 0 0 0
Starting 0 1 Pixel1 Pixel2 Pixel3 Pixel4 Pixel5 Pixel6 Pixel7 Pixel8
data

PL
0 1 .. .. .. .. .. .. .. ..
transmission Pixel Pixel Pixel Pixel Pixel Pixel Pixel Pixel
0 1
(n-7) (n-6) (n-5) (n-4) (n-3) (n-2) (n-1) (n)
This command starts transmitting data and write them into SRAM. To complete data
transmission, command DSP (Data transmission Stop) must be issued. Then the chip will start to
send data/VCOM for panel.
IS
In B/W mode, this command writes “OLD” data to SRAM.
In B/W/Red mode, this command writes “B/W” data to SRAM.
D
In Program mode, this command writes “OTP” data to SRAM for programming.

(10) Data Stop (DSP) (R11H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

D

Stopping data 0 0 0 0 0 1 0 0 0 1
transmission 1 1 Data_flag - - - - - - -
To stop data transmission, this command must be issued to check the data_flag.
O

Data_flag: Data flag of receiving user data.

0: Driver didn’t receive all the data.
O

1: Driver has already received all the one-frame data (DTM1 and DTM2).
After “Data Start” (R10h) or “Data Stop” (R11h) commands and when data_flag=1, the
refreshing of panel starts and BUSY signal will become “0”.
G

(11) Display Refresh (DRF) (R12H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Refreshing the display 0 0 0 0 0 1 0 0 1 0
While user sent this command, driver will refresh display (data/VCOM) according to SRAM data
and LUT. After Display Refresh command, BUSY signal will become “0” and the refreshing of
panel starts.

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 GDEW0213Z16

(12) Data Start Transmission 2 (DTM2) (R13H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 0 1 0 0 1 1
Starting 0 1 Pixel1 Pixel2 Pixel3 Pixel4 Pixel5 Pixel6 Pixel7 Pixel8
data 0 1 .. .. .. .. .. .. .. ..
transmission Pixel Pixel Pixel Pixel Pixel Pixel Pixel Pixel
0 1
(n-7) (n-6) (n-5) (n-4) (n-3) (n-2) (n-1) (n)
This command starts transmitting data and write them into SRAM. To complete data

AY
transmission, command DSP (Data transmission Stop) must be issued. Then the chip will start to
send data/VCOM for panel.
In B/W mode, this command writes “NEW” data to SRAM.
In B/W/Red mode, this command writes “RED” data to SRAM.

PL
(13) VCOM LUT (LUTC) (R20H)
This command builds Look-up Table for VCOM

(14) W2W LUT (LUTWW) (R21H)

IS
This command builds Look-up Table for White-to-White.

(15) B2W LUT (LUTBW/LUTR) (R22H)

D
This command builds Look-up Table for Black-to-White.

(16) W2B LUT (LUTWB/LUTW) (R23H)

This command builds Look-up Table for White - to- Black.
D

(17) B2B LUT (LUTBB / LUTB) (R24H)

This command builds Look-up Table for Black - to- Black.
O

(18) PLL Control (PLL) (R30H)

O

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 1 1 0 0 0 0
Controlling PLL
0 1 - - M[2:0] N[2:0]
G

The command controls the PLL clock frequency. The PLL structure must support the following
frame rates:

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 GDEW0213Z16

M N Frame Rate M N Frame M N Frame Rate M N Frame Rate

1 29 Hz 1 86 Hz 1 150 Hz 1 200 Hz
2 14 Hz 2 43 Hz 2 72 Hz 2 100 Hz
3 10 Hz 3 29 Hz 3 48 Hz 3 67 Hz
1 4 7 Hz 3 4 21 Hz 5 4 36 Hz 7 4 50 Hz (Default)
5 6 Hz 5 17 Hz 5 29 Hz 5 40 Hz
6 5 Hz 6 14 Hz 6 24 Hz 6 33Hz
7 4 Hz 7 12Hz 7 20 Hz 7 29 Hz
1 57 Hz 1 114 Hz 1 171 Hz

AY
2 29 Hz 2 57 Hz 2 86 Hz
3 19 Hz 3 38 Hz 3 57 Hz
2 4 14 Hz 4 4 29Hz 6 4 43 Hz
5 11 Hz 5 23 Hz 5 34 Hz
6 10 Hz 6 19 Hz 6 29 Hz

PL
7 8 Hz 7 16 Hz 7 24 Hz

IS
D
D

(19) Temperature Sensor Calibration (TSC) (R40H)

O

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 1 0 0 0 0 0 0
Sensing
O

1 1 D10/TS7 D9/TS6 D8/TS5 D7/TS4 D6/TS3 D5/TS2 D4/TS1 D3/TS0

Temperature
1 1 D2 D1 D0 - - - - -
This command reads the temperature sensed by the temperature sensor.
G

TS[7:0]: When TSE (R41h) is set to 0, this command reads internal temperature sensor value.
D[10:0]: When TSE (R41h) is set to 1, this command reads external LM75 temperature sensor
value.

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 GDEW0213Z16

TS[7:0]/D[10:3] Temperature (℃) TS[7:0]/D[10:3] Temperature (℃) TS[7:0]/D[10:3] Temperature (℃)

1110_0111 -25 0000_0000 0 0001_1001 25
1110_1000 -24 0000_0001 1 0001_1010 26
1110_1001 -23 0000_0010 2 0001_1011 27
1110_1010 -22 0000_0011 3 0001_1100 28
1110_1011 -21 0000_0100 4 0001_1101 29
1110_1100 -20 0000_0101 5 0001_1110 30
1110_1101 -19 0000_0110 6 0001_1111 31
1110_1110 -18 0000_0111 7 0010_0000 32

AY
1110_1111 -17 0000_1000 8 0010_0001 33
1111_0000 -16 0000_1001 9 0010_0010 34
1111_0001 -15 0000_1010 10 0010_0011 35
1111_0010 -14 0000_1011 11 0010_0100 36
1111_0011 -13 0000_1100 12 0010_0101 37

PL
1111_0100 -12 0000_1101 13 0010_0110 38
1111_0101 -11 0000_1110 14 0010_0111 39
1111_0110 -10 0000_1111 15 0010_1000 40
1111_0111 -9 0001_0000 16 0010_1001 41
1111_1000 -8
IS
0001_0001 17 0010_1010 42
1111_1001 -7 0001_0010 18 0010_1011 43
1111_1010 -6 0001_0011 19 0010_1100 44
1111_1011 -5 0001_0100 20 0010_1101 45
D
1111_1100 -4 0001_0101 21 0010_1110 46
1111_1101 -3 0001_0110 22 0010_1111 47
1111_1110 -2 0001_0111 23 0011_0000 48
1111_1111 -1 0001_1000 24 0011_0001 49
D

(20) Temperature Sensor Enable (TSE) (R41H)

O

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

Enable Temperature 0 0 0 1 0 0 0 0 0 1
Sensor/Offset 0 1 TSE - - - TO[3:0]
O

This command selects Internal or External temperature sensor.

TSE: Internal temperature sensor switch
0: Enable (Default) 1: Disable; using external sensor.
G

TO[3:0]: Temperature offset.

TO[3:0] Calculation TO[3:0] Calculation

0000 b 0 1000 -8
0001 1 1001 -7
0010 2 1010 -6
… … … …
0110 6 1110 -2
0111 7 1111 -1

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 GDEW0213Z16

(21) Temperature Sensor Write (TSW) (R42H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 1 0 0 0 0 1 0
Write External 0 1 WATTR[7:0]
Temperature Sensor 0 1 WMSB[7:0]
0 0 WLSB[7:0]
This command reads the temperature sensed by the temperature sensor.
WATTR: D[7:6]: I2C Write Byte Number
00b : 1 byte (head byte only)

AY
01b : 2 bytes (head byte + pointer)
10b : 3 bytes (head byte + pointer + 1st parameter)
11b : 4 bytes (head byte + pointer + 1st parameter + 2nd parameter)
D[5:3]: User-defined address bits (A2, A1, A0)

PL
D[2:0]: Pointer setting
WMSB[7:0]: MSByte of write-data to external temperature sensor.
WLSB[7:0]: LSByte of write-data to external temperature sensor.

(22) Temperature Sensor Read (TSR)

IS
(R43H)
Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 1 0 0 0 0 1 1
Read External
D
1 1 RMSB[7:0]
Temperature Sensor
1 1 RLSB[7:0]
This command reads the temperature sensed by the temperature sensor.
RMSB[7:0]: MSByte read data from external temperature sensor
RLSB[7:0]: LSByte read data from external temperature sensor
D

(23) VCOM And Data Interval Setting (CDI) (R50H)

O

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

Set Interval Between 0 0 0 1 0 1 0 0 0 0
O

Vcom and Data 0 1 VBD[1:0] DDX[1:0] CDI[3:0]

This command indicates the interval of Vcom and data output. When setting the vertical back
porch, the total blanking will be kept (20 Hsync).
G

VBD[1:0]: Border data selection

B/W/Red mode (BWR=0)

DDX[0] VBD[1:0] LUT DDX[0] VBD[1:0 LUT

00 Floating 00 LUTB
01 LUTR 01 LUTW
0 1(Default)
10 LUTW 10 LUTR
11 LUTB 11 Floating

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B/W mode (BWR=1)

DDX[0] VBD[1:0] LUT DDX[0] VBD[1:0] LUT
00 Floating 00 Floating
01 LUTBW (1→0) 01 LUTWB (1→0)
0 1(Default)
10 LUTWB (0→1) 10 LUTBW (0→1)
11 Floating 11 Floating

DDX[1:0]: Data polality.

DDX[1] for RED data, DDX[0] for BW data in the B/W/Red mode.

AY
DDX[0] for B/W mode.

B/W/Red mode (BWR=0)

DDX[1:0] Data{Red, B/W} LUT DDX[1:0] Data{Red, B/W} LUT

PL
00 LUTW 00 LUTR
01 LUTB 01 LUTR
00 10
10 LUTR 10 LUTW
11 LUTR 11 LUTB
00 LUTB 00 LUTR

01(Default)
01
IS
LUTW
11
01 LUTR
10 LUTR 10 LUTB
11 LUTR 11 LUTW
D
B/W mode (BWR=1)
DDX[0] Data{New, Old} LUT DDX[0] Data{New, Old} LUT
00 LUTWW (0→0) 00 LUTBB (0→0)
01 LUTBW (1→0) 01 LUTWB (0→1)
0 1(Default)
D

10 LUTWB (0→1) 10 LUTBW (1→0)

11 LUTBB (1→1) 11 LUTWW (1→1)
O

CDI[3:0]: Vcom and data interval

CDI[3:0] Vcom and Data Interval CDI[3:0] Vcom and Data Interval
0000 b 17 hsync 0110 11
O

0001 16 0111 10 (Default)

0010 15 … …
G

0011 14 1101 4
0100 13 1110 3
0101 12 1111 2

(24) Low Power Detection (LPD) (R51H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

Detect Low 0 0 0 1 0 1 0 0 0 1
Power 1 1 - - - - - - - LPD

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This command indicates the input power condition. Host can read this flag to learn the battery
condition.
LPD: Interval Low Power Detection Flag
0: Low power input (VDD < 2.5V) 1: Normal status (default)

(25) TCON Setting (TCON) (R60H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Set Gate/Source Non- 0 0 0 1 1 0 0 0 0 0
overlap Period 0 1 S2G[3:0] G2S[3:0]

AY
This command defines non-overlap period of Gate and Source.
S2G[3:0] or G2S[3:0]: Source to Gate / Gate to Source Non-overlap period
S2G[3:0] or G2S[3:0] Period S2G[3:0] or G2S[3:0] Period
0000b 4 … …

PL
0001 8 1011 48
0010 12(Default) 1100 52
0011 16 1101 56
0100 20 IS 1110 60
0101 24 1111 64
Period = 660 nS.
D
D
O

(26) Resolution Setting (TRES) (R61H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 1 1 0 0 0 0 1
O

Set Display 0 1 HRES[7:3] 0 0 0

Resolution 0 1 - - - - - - - VRES[8]
0 0 VRES[7:0]
G

This command defines alternative resolution and this setting is of higher priority than the
RES[1:0] in R00H (PSR).
HRES[7:3]: Horizontal Display Resolution
VRES[8:0]: Vertical Display Resolution
Active channel calculation:
GD : First active gate = G0 (Fixed); LAST active gate = VRES[8:0] - 1
SD : First active source =S0 (Fixed); LAST active source = HRES[7:3]*8 – 1

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(27) Get Status (FLG) (R71H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Read 0 0 0 1 1 1 0 0 0 1
Flags 1 1 - 2 2
PTL_flag I C_ERR I C_ BUSY data_ flag PON POF BUSY
This command reads the IC status.
PTL_FLAG Partial display status (high: partial mode)
I2C_ERR: I2C master error status
I2C_BUSY: I2C master busy status (low active)
data_flag: Driver has already received all the one frame data

AY
PON: Power ON status
POF: Power OFF status
BUSY: Driver busy status (low active)

PL
(28) Auto Measure Vcom (AMV) (R80H)
Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Automatically 0 0 1
IS 0 0 0 0 0 0 0
measure Vcom 0 1 - - AMVT[1:0 XON AMVS AMV AMVE
This command reads the IC status.
AMVT[1:0]: Auto Measure Vcom Time
00b: 3s 01b: 5s (Default)
D
10b: 8s 11b: 10s
XON: All Gate ON of AMV
0: Gate normally scan during Auto Measure VCOM period. (default)
1: All Gate ON during Auto Measure VCOM period.
AMVS: Source output of AMV
D

0: Source output 0V during Auto Measure VCOM period. (default)

1: Source output VDHR during Auto Measure VCOM period.
AMV: Analog signal
O

0: Get Vcom value with the VV command (R81h) (default)

1: Get Vcom value in analog signal. (External analog to digital converter)
O

AMVE: Auto Measure Vcom Enable (/Disable)

0: No effect
1: Trigger auto Vcom sensing.
G

(29) Vcom Value (VV) (R81H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

Automatically 0 0 1 0 0 0 0 0 0 1
measure Vcom 1 1 - - VV[5:0]
This command gets the Vcom value.
VV[5:0]: Vcom Value Output

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VV[5:0] Vcom value

00 0000b -0.10 V
00 0001b -0.15 V
00 0010b -0.20 V
: :
11 1010b -3.00 V

(30) VCM_DC Setting (VDCS) (R82H)

AY
Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
0 0 1 0 0 0 0 0 1 0
Set VCM_DC
0 1 - - VDCS[5:0]
This command sets VCOM_DC value
VDCS[5:0]: VCOM_DC Setting

PL
VDCS[5:0] Vcom value
00 0000b -0.10 V (default)
00 0001b IS -0.15 V
00 0010b -0.20 V
: :
11 1010b -3.00 V
D
(31) Partial Window(PTL) (R90H)
Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
0 0 1 0 0 1 0 0 0 0
0 1 HRST[7:3] 0 0 0
0 1 HRED[7:3] 1 1 1
D

Set Partial 0 1 - - - - - - - VRST[8]

Window 0 1 VRST[7:0]
0 1 - - - - - - - VRED[8]
O

0 1 VRED[7:0]
0 1 - - - - - - - PT_SCA
This command sets partial window.
O

HRST[7:3]: Horizontal start channel bank. (value 00h~13h)

HRED[7:3]: Horizontal end channel bank. (value 00h~13h). HRED must be greater than HRST.
G

VRST[8:0]: Vertical start line. (value 000h~127h)

VRED[8:0]: Vertical end line. (value 000h~127h). VRED must be greater than VRST.
PT_SCAN: 0: Gates scan only inside of the partial window.
1: Gates scan both inside and outside of the partial window. (default)

(32) Partial In (PTIN) (R91H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Partial In 0 0 1 0 0 1 0 0 0 1
This command makes the display enter partial mode.

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(33) Partial Out (PTOUT) (R92H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Partial In0 0 1 0 0 1 0 0 1 0
This command makes the display exit partial mode and enter normal mode.

(34) Program Mode (PGM) (RA0H)

ActionW/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Enter Program 0 0 1 0 1 0 0 0 0 0

AY
Mode 0 1 1 0 1 0 0 1 0 1
After this command is issued, the chip would enter the program mode.
The mode would return to standby by hardware reset.
The only one parameter is a check code, the command would be excuted if check code =
0xA5.

PL
(35) Active Program (APG) (RA1H)
Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Active Program 0 0 1 0 1
IS
0 0 0 0 1
After this command is transmitted, the programming state machine would be activated.
The BUSY flag would fall to 0 until the programming is completed.
D
(36) Read OTP Data (ROTP) (RA2H)

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0

0 0 1 0 1 0 0 0 1 0
D

1 1 Dummy
1 1 The data of address 0x000 in the OTP
Read OTP data
1 1 The data of address 0x001 in the OTP
for check
O

1 1 ..
1 1 The data of address (n-1) in the OTP
1 1 The data of address (n) in the OTP
O

The command is used for reading the content of OTP for checking the data of programming.
The value of (n) is depending on the amount of programmed data, tha max address = 0xFFF.
G

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AY
PL
The sequence of programming OTP

(37) Power Saving (PWS) (RE3H) IS

Action W/R C/D D7 D6 D5 D4 D3 D2 D1 D0
Power Saving for 0 0 1 1 1 0 0 0 1 1
Vcom &Source 0 1 VCOM W[3:0] SD W[3:0]
This command is set for saving power during fresh period. If the output voltage of VCOM /
D
Source is from negative to positive or from positive to negative, the power saving mechanism
will be activated. The active period width is defined by the following two parameters.
VCOM_W[3:0]: VCOM power saving width (unit = line period)
D
O
O

SD_W[3:0]: Source power saving width (unit = 660nS)

G

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6. Optical characteristics

6.1 Specifications
Measurements are made with that the illumination is under an angle of 45 degrees, the
detection is perpendicular unless otherwise specified.
T=25℃
SYMBOL PARAMETER CONDITIONS MIN TYPE MAX UNIT Note
Note
R Reflectance White 30 35

AY
- % 9-1
DS＋(WS-DS)×
Gn 2Grey Level - - - L* -
n(m-1)
CR Contrast indoor 8 - - -
Panel’s Ratio 1000000 times or 5 Note

PL
0℃~40℃
life years 9-2
Image Storage and Update the white
Update transportation screen
Panel Suggest update once
Update Time Operation
IS every 24 hours or at
least 10 days
WS : White state, DS : Dark state to update again.
D
Gray state from Dark to White : DS、WS
m:2
Note 9-1: Luminance meter: Eye – One Pro Spectrophotometer
Note 9-2: Panel life will not guaranteed when work in temperature below 0 degree or above 40
degree. Each update interval time should be minimum at 180 seconds.
D

6.2 Definition of contrast ratio

The contrast ratio (CR) is the ratio between the reflectance in a full white area (R1) and the
O

reflectance in a dark area (Rd)() :

R1: white reflectance Rd: dark reflectance
O

CR = R1/Rd

Display
G

θ
Ring light

Detector

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6.3 Reflection Ratio

The reflection ratio is expressed as:

R = Reflectance Factor white board x (L center /L white board )

L center is the luminance measured at center in a white area (R=G =B=1). L white board is the
luminance of a standard white board. Both are measured with equivalent illumination source.
The viewing angle shall be no more than 2 degrees.

AY
Viewing
12 o'clock
direction dirction 90°
α

PL
3 o'clock
9 o'clock θ
IS dirction 0°
dirction 180°
D
6 o'clock
dirction 270°
D

6.4 Bi-stability
The Bi-stability standard as follows:
O

Bi-stability Result
AVG MAX
O

24 hours Luminance drift White state △L* - 3

Black state △L* - 3
G

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7. Point and line standard

Shipment Inseption Standard

Part-A：Active area Part-B：Border area

Equipment：Electrical test fixture, Point gauge
Outline dimension：
59.2(H)*29.2(V)*0.98(D) Unit：mm

AY
Temperature Humidity Illuminance Distance Time Angle
Environment 55± 1200～
23±2℃ 300 mm 35 Sec
5%RH 1500Lux
Name Causes Spot size Part-A Part-B
B/W spot in glass or D ≤ 0.25mm Ignore

PL
Spot protection sheet, 0.25mm ＜ D ≤ 0.4mm 4 Ignore
foreign mat. Pin hole 0.4mm ＜ D 0
Scratch on glass or Length Width Part-A
Scratch or Scratch on FPL or L ≤2.0mm
IS W≤0.2 mm Ignore
Ignore
line defect Particle is Protection 2.0 mm < L≤ 5.0mm 0.2 mm<W≤ 0.3mm 2

sheet. 5.0 mm < L 0.3mm < W 0

D1, D2 ≤ 0.2 mm Ignore
Air bubble Air bubble 0.2 mm < D1,D2 ≤ 0.35mm 4 Ignore
D
0.35mm < D1, D2 0

Side
Fragment
D

X≤5mm，Y≤1mm & display is ok, Ignore

Remarks: Spot define: That only can be seen under WS or DS defects.
Any defect which is visible under gray pattern or transition process but invisible
O

under black and white is disregarded.

Here is definition of the “Spot” and “Scratch or line defect”.
Spot: W > 1/4L Scratch or line defect: W ≤1/4L
O

Definition for L/W and D (major axis)

FPC bonding area pad doesn’t allowed visual inspection.
G

Note: AQL = 0.4

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8. Packing

empty tray

vacuum bag

AY
1st layer 2nd layer

PL
total 12 layer tape
35(PCS)×12(Layer)=420PCS
IS
D
D

Protector

Pallet PP belt

420(PCS)×16(BOX)=6720PCS
O
O
G

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9. Precautions

(1) Do not apply pressure to the EPD panel in order to prevent damaging it.
(2) Do not connect or disconnect the interface connector while the EPD panel is in operation.
(3) Do not touch IC bonding area. It may scratch TFT lead or damage IC function.
(4) Please be mindful of moisture to avoid its penetration into the EPD panel, which may
cause damage during operation.

AY
(5) If the EPD Panel / Module is not refreshed every 24 hours, a phenomena known as
“Ghosting” or “Image Sticking” may occur. It is recommended to refreshed the ESL /
EPD Tag every 24 hours in use case. It is recommended that customer ships or stores the
ESL / EPD Tag with a completely white image to avoid this issue

PL
(6) High temperature, high humidity, sunlight or fluorescent light may degrade the EPD
panel’s performance. Please do not expose the unprotected EPD panel to high
temperature, high humidity, sunlight, or fluorescent for long periods of time.
IS
D
D
O
O
G

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