Microprocessor-Based Automatic Door Opener

Jitendra Chaudhary Hemraj Kumawat

UG201110012 UG201110011
CSE, IIT Jodhpur CSE, IIT Jodhpur

Abstract— A microprocessor controlled automatic door and intelligent features that makes it distinct from all
opener including means for detecting the velocity and other gates which bring it so close to a security device.
direction of travel of the door. The micro-controller evaluates
detected changes in either the velocity or direction of travel to 2. THEORY AND DESIGN
determine the cause, and either reverses door travel direction
or ignores the detection. The settings of the door are stored in
Certain specifications, parameters, and methods of
the memory of the microprocessor. The microcontroller will implementation must be considered in system design and
regulate the opening and closing speed and the direction of construction in order to give the expected result. The
door travel depending upon a preprogrammed sequence. The implementation of the design involves segmenting the
door control mechanism is able to differentiate between these overall system design into subsystems/modules/units,
internal factors and external obstructions. which are individually designed and tested before the
integration of the various subsystems. The system design
(Keywords: Automatic gate, Microprocessor, Programmable is divided into:

 Sensor Unit
Input /Output Controller (PIO), light dependent 2.1) Hardware Design consisting of:
resistor(LDR))
 Trigger Circuit
 CPU Module
1. INTRODUCTION
The need for automatic gates has been on the increase in  Memory Module
 Gate Control Unit
recent times. The system described in the project
incorporates the use of a microprocessor as a controller
in achieving the aims of this project.
2.2) Software
It uses a remote control convenience to avoid the stress
of manually opening and closing the gate. The
technology used eliminates gate monitoring and
manning by human beings. The gate uses a state-of-the-
art entry system. The gates have to perform gyrations –
open, auto-reverse, stop, fully close and fully stop. The
system senses, opens and closes the gate, counts, and
registers. The automatic gate system comprises a sensor
unit, a trigger circuitry, CPU module, memory module,
display unit, gate control unit and the power supply unit
as shown in the block diagram below. The automatic
gate system comprises a sensor unit, a trigger circuitry,
CPU module, memory module, display unit, gate control
unit and the power supply unit. As a monitoring and
control system, the microprocessor was used to read in
data values from the input device and interact with the
outside world. The automatic gate developed in this
project is unique in that it is controlled by software,
which can be modified any time the system demands a
change. Figure: Block Diagram of the system
The automatic gate is not a security device and should I. SENSOR
not be construed as one. It provides convenient access
The sensor provides an input signal to the system. This
module makes use of an optical sensor, specifically a
light dependent resistor (photo conductive cell, LDR), When light rays of great intensity are focused on the
whose resistance changes with the intensity of light. sensor resistor, the output voltages, V01 and V02 are
When light rays are focused on the LDR, the resistance low (approximately 0V). When the light beams are
becomes very low (0-500Ω) but when the rays are interrupted, the output voltages increase to 5V
interrupted, the resistance increases to its dark approximately.
resistance. The variable resistor is used to vary the
sensitivity of the LDR. It is otherwise called Dark
Activated Sensor. II. TRIGGER CIRCUIT
Two pairs of sensors (4 total) were used for the entire The trigger circuitry serves as an Analog–to–Digital
system; each pair for the entrance and exit gates and the converter (ADC), which produces a HIGH signal when
outputs from the sensor units and is part of the trigger the beam is interrupted. This is made up of a Schmitt-
circuitry. The sensor unit is arranged in such a way that trigger. It accepts the output of the two sensor units. Its
it consists of two pairs of LDRs to provide signals for function is to NOR the two inputs from the sensing unit,
the trigger circuitry whenever there is an obstruction clip, and shape the pulse into square waves. It is
through the entrance or exit gate For the design, two configured in such a way that when there is an output
conditions are considered: first, when light rays are from any of the two sensing units will the trigger
focused on the sensor resistor, and secondly, when the circuitry go HIGH, else it remains at LOW level.
rays are being interrupted. The trigger circuitry sends a signal to the interface unit,
The circuit has the ability to detect only the passage of a which is made up of Programmable Input /Output
person or other moving objects. Each pair of sensor is Controller (PIO). The software causes the
separated by a reasonable distance such that it can cover microprocessor to be check the input port of the
the complete gate. When a person or other moving interface unit for the sensor status information (the
objects obstruct the sensor, one sensing unit (or may be outputs of the trigger circuitry). A HIGH value causes
two) is activated and is processed by the trigger the microprocessor to send a signal to the output port of
circuitry. the interface unit in order to activate the DC motor to
control the gate (open and close).

Figure: Waveform Schmitt-Trigger

When obstruct interrupts the light beams of the sensor

units, the voltage at the output of the Schmitt-trigger
goes HIGH. The circuit resets to a LOW voltage level
when the interrupt is removed.
Figure: Sensor unit
 In linear select decoding, each bit on the address bus can
Table 1: Truth Table for Schmitt-Trigger select a device. This is employed in very small systems
with few devices. It does not require any decoding
Inputs Outputs hardware but wastes a large amount of address space and
sometimes causes bus conflict.
V01 V02 F
Fully decoding memory addressing requires the use of a
0 0 0 decoder to select a memory device. In the hardware
design implementation, the fully decoding technique was
0 1 1
employed for memory decoding. Address bus lines A0-
1 0 1 A7 were used for the input/output mapping.
This indicates that a particular area of memory is being
1 1 1
addressed or pointed to by the microprocessor. This can
be realized by use of combinational circuits. The most
useful features of this device are the multiple enable
III. CPU MODULE inputs. The decoder has an active low output that only
This module provides the system clock, reset, and access becomes active when all of the enables are at their active
provision to address, data, and control buses levels.
architecture. Additional circuitries are needed for the Whenever this device is enabled, the 3-bit binary
Z80 CPU to perform its functions. These circuitries, with number present at the address inputs causes one of the
their design, are discussed as follows. output pins to become active.

CLOCK CIRCUITRY IV. MEMORY MAPPING

The Z80 requires a single-phase 0V to 5V clock signal.
This can be generated with the use of a crystal oscillator The memory mapping of the system design is shown in
Because the typical high level output voltage of a TTL figure 3.Interfacing both memory devices to the CPU
gate is only 3.3V or 3.4V and the minimum high level does not require any additional circuitry to generate wait
required at the Z80 clock input is 4.4V, a 330Ω pull up states. The reason being that both devices meet the
resistor is required. memory read/write timing specification of the Z80 CPU.
In this design, a Z80 CPU was used, which has a clock
cycle of 2.5MHz. Thus, a crystal oscillator of 5MHz was
used and passed through a D flip-flop to give 2.5MHz
(divide by 2), which is able to drive the Z80 clock rate.

RESET CIRCUITRY
This circuit functions to initialize the Z80 after power is
supplied and also to revitalize it if a “HALT” occurs or
after some other catastrophic event. When the Z80 is
reset, it begins execution from memory location 0000H
because the program counter is cleared to zero and
forced to begin at location 0000H. It also disables
interrupts and clears the interrupt enabled flip-flop.

MEMORY MODULE
The memory devices interfaced to the CPU module
consists of:
a. 2K X 8 ROM
b. 2K X 8 RAM Figure: Memory Mapping
In order to interface a microprocessor to ROM/RAM
chips, two address decoding techniques are usually V. GATE CONTROL UNIT

 Linear select decoding technique

employed.

 PNP and NPN transistors

The gate control unit is made up of:
 Fully decoding technique
  Diodes
 Motor SOFTWARE DESIGN
The PNP and NPN transistors are arranged in such a way
that a pair (PNP and NPN) controls the opening of the In the development cycle of a microprocessor-based
gate through the motor and the other pair reverse the system, decisions are made on the parts of the system to
polarity of the motor by rotating it in the opposite be realized in the hardware design and the parts to be
direction to close the gate. There is a time interval of 10 implemented in software. The software is decomposed
seconds between the opening and closing of the gate. into modules so that each module can be individually
The software varies this. The arrangement of the diodes tested as a unit and debugged before the modules are
serves to protect the transistors from reverse-bias integrated and tested as a software system in order to
polarity and the resistors serve to improve switching ensure that the software design meets its specification.
times.
The motor is used to control the opening and closing of 3. IMPLEMENTATION
gate. The electric (DC) motor used is one that has the
ability to rotate in both directions simply by reversing the SOFTWARE DEVELOPMENT PROCEDURE
polarity. The program for the system is written in assembly
language. Assembly code represents halfway position
between machine code and a high level language. The
assembly code is usually a mnemonic derived from the
instruction itself, i.e. LDA means Load the Accumulator.
Assembly code is thus very easy to remember and use
when writing programs.
When entering an assembly program into a
microprocessor, the assembly code is first to be
converted into machine code. For short programs, of a
few lines, this is relatively easy and usually requires that
the programmer construct a table which contains the
assembly mnemonics and the equivalent machine code
and the values of data in registers and pointer stack.
Figure: Gate Control Unit For longer programs, a separate program called an
assembler program, is used to convert the assembly code
LOW signal output from a transistor buffer through the into machine code, which is placed directly into the
Z80 PIO applied to point A bases the NPN and PNP microprocessor memory. The program modules are
transistors and these cause the motor to rotate in a segmented into:
particular direction. Similarly, a LOW signal applied to a. Main program
point B reverse (change) the rotation of the motor in the b. Sensor subroutine
opposite direction. The control circuit is used for both c. Delay subroutine
entrance and exit gates. d. Output (Gate Control) subroutine
The power supply unit supplies the required DC voltage
needed by the entire microcomputer system. A The software was designed using the following steps:
microprocessor based system design has to be activated 1. Algorithm
with a clean power supply of good regulation 2. Flowchart
characteristics. A transient on the power line could send 3. Assembly Language Codes.
the microprocessor wandering, resulting in system
failure. Z80 operates on a voltage VCC = 5V ±10% and ALGORITHM
as a result of this, the power supply unit designed is 5V
DC and is not affected by variation in the AC voltage The algorithm used to implement the program for the
serving as input to the transformer. system described in this paper is as follows:
START
1. Initialize the Microprocessor
2. Fetch the status of the sensor bit
3. Compare the status of the sensor bit with
4. Go to step 2
entrance code
a. If status = entrance code then step 5 5. Gate open, wait and close
b. Else step 4
 THE ASSEMBLY LANGUAGE adapted to any electric gate and any form of control
INITIALIZATION which requires the use of sensors. The Design includes
LD SP, 0FFFH //Load Value to Stack Pointer. the basic sensor characteristics, microprocessor input
LD A, 3FH //Load accumulator with 3FH value and output interfacing, and assembly language
OUT 03H //Output data from accumulator to 1st sensor principles. Sensors for vehicle detection while the
port programming language is fundamental to software
OUT 06H //Output data from accumulator to 2nd sensor design based on the system requirements, specifications,
port and planned operation of the system. There is total
OUT 07H // Output data from accumulator to motor port agreement between the system designed and the required
MAIN PROGRAM operation of the system.
START Every good project has limitations; the limitation of this
//These hexadecimal locations are respectively for design lies in the effectiveness of the sensor. The sensor
accessing data from memory to port and back to will work most effectively if operated under high
memory. intensity light
LD B, 80H
LD C, 01H 6. FURTHER IMPROVEMENTS
LD D, 14H
LD A, 00H For an improved, effective system to be implemented
OUT (01H) and achieved, the following suggestions should be
OUT (04H) considered for further work.
OUT (05H) 1. There can be a Display Unit for showing number of
MAIN persons entered in a particular room.
IN A, (00H) //Input data to accumulator from Sensor 2. A better sensor is recommended to achieve new
CP 00H //checking condition of entrance functionality. For instance, a suitable sensor such as
JP Z, INPUT //JUMP to Input radar sensor that could detect contraband goods in any
LD E, A vehicle.
LD A, B 3. To achieve full automation, a real time system should
JP Z, GATE // Jump to gate be employed and a Closed Circuit Television (CCTV)
ENTRANCE system provided for proper monitoring and security
LD A, C purposes. This can helpful in detecting the presence of
JP Z, GATE vehicles before the system is activated.
NOP //No Operation 4. Upgrading the system using a higher bit
NOP microprocessors for speed optimization.
JP START 5. Along with this system we can use Face-detection
through Camera for Automated Attendance System can
be used.
4. TESTING AND RESULTS

This Assembly language code was tested by 8085 7. ACKNOWLEDGMENT

Microprocessor Simulator Program: We would like to take the opportunity to thank Prof
Test case: 1 When first sensor rays were blocked by an K.R.Chowdhary, Head of Department Computer Science
Obstacle then the value of stored register conditioned to MBM Jodhpur. We would like to thank to our colleagues
rotate the motor from Point A, the gate opened, wait and who helped to make our project successful.
Closed.
Test Case 2: When 2nd Sensor rays were blocked by An
Obstacle then the Combination of registers cause low 8. REFERENCES
voltage at Point A and then the Door opened, wait for [1] Hall, Douglas V. 1991. Microprocessors and Interfacing
some time and Closed. Programming and Hardware. 2nd edition. Gregg College
Division: New York, NY.
5. CONCLUSION [2] Leventhal, Lance A. 1978. 8080A, 8085 Assembly
Language Programming. McGraw-Hill, Inc.: New York,
The construction of a microprocessor based system had NY.
been achieved in this project. This design can be easily
[3] Private Door Openers. 2006. “Private Door Information”. [5] Digital Systems; Principles and Application. 7th Edition.
Lombard, IL. http://www.privatedoor.com. Ronald J. Tocci & Neil S. Widmer. 1998. Printice-Hall
[4] McGlynn, Daniel R. 1976. Microprocessor Technology International: Princeton, NJ.
and Application. John Wiley & Sons, Inc: New York, [6] Microprocessor and Logic Design, Krutz, R.L. 198, John
NY. Wiley & Sons, Inc.: New York, NY.
[7] “Private Door Information”. Private Door Openers. 2006.
Lombard, IL. http://www.privatedoor.com.