S1c17w04 Datasheet
S1c17w04 Datasheet
S1c17w04 Datasheet
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■ DESCRIPTIONS
The S1C17W03/W04 is a 16-bit MCU that features low-voltage operation from 1.2 V even though Flash memory is in-
cluded. The embedded high-efficiency DC-DC converter generates the constant-voltage to drive the IC with lower pow-
er consumption than 4-bit MCUs. This IC includes a real-time clock, a stopwatch, an A/D converter, and a PWM timer
capable of being used to generate drive waveforms for a motor driver as well as a high-performance 16-bit CPU. It is
suitable for battery-driven applications that require an A/D conversion function and timers.
■ FEATURES
Model S1C17W03 S1C17W04
CPU
CPU core Seiko Epson original 16-bit RISC CPU core S1C17
Other On-chip debugger
Embedded Flash memory
Capacity 16K bytes (for both instructions and data) 32K bytes (for both instructions and data)
Erase/program count 50 times (min.) * Programming by the debugging tool ICDmini
Other Security function to protect from reading/programming by ICDmini
On-board programming function using ICDmini
Embedded RAM
Capacity 2K bytes
Clock generator (CLG)
System clock source 4 sources (IOSC/OSC1/OSC3/EXOSC)
System clock frequency 1.1 MHz (max.) VDD = 1.2 to 1.6 V
(operating frequency) 4.2 MHz (max.) VDD = 1.6 to 3.6 V
IOSC oscillator circuit 700 kHz (typ.) embedded oscillator
(boot clock source) 23 µs (max.) starting time
(time from cancelation of SLEEP state to vector table read by the CPU)
OSC1 oscillator circuit 32.768 kHz (typ.) crystal oscillator
Oscillation stop detection circuit included
OSC3 oscillator circuit 4.2 MHz (max.) crystal/ceramic oscillator (48-pin package or chip)
250, 384, 500 kHz, 1, 2, and 4 MHz-switchable embedded oscillator
2.1 MHz (max.) CR oscillator (an external R is required) (48-pin package or chip)
EXOSC clock input 4.2 MHz (max.) square or sine wave input
Other Configurable system clock division ratio
Configurable system clock used at wake up from SLEEP state
Operating clock frequency for the CPU and all peripheral circuits is selectable.
I/O port (PPORT)
Number of general-purpose Input/output port: 34 bits (max., 48-pin package or chip)
I/O ports 23 bits (max., 32-pin package)
Output port: 1 bit (max.)
Pins are shared with the peripheral I/O.
Number of input interrupt ports 30 bits (max., 48-pin package or chip)
21 bits (max., 32-pin package)
Number of ports that support 24 bits (48-pin package or chip)
universal port multiplexer 21 bits (32-pin package)
(UPMUX) A peripheral circuit I/O function selected via software can be assigned to each port.
Timers
Watchdog timer (WDT) Generates NMI or watchdog timer reset.
Real-time clock (RTCA) 128–1 Hz counter, second/minute/hour/day/day of the week/month/year counters
Theoretical regulation function for 1-second correction
Alarm and stopwatch functions
S1C17W03/W04
Model S1C17W03 S1C17W04
Timers
16-bit timer (T16) 4 channels
Generates the SPIA master clocks and the ADC12A operating clock/trigger signal.
16-bit PWM timer (T16B) 2 channels
Event counter/capture function
PWM waveform generation function
Number of PWM output or capture input ports: 2 ports/channel
Supply voltage detector (SVD)
Detection level 30 levels (1.2 to 3.6 V)
Detection accuracy ±3 %
Other Intermittent operation mode
Generates an interrupt or reset according to the detection level evaluation.
Serial interfaces
UART (UART) 2 channels
Baud-rate generator included, IrDA1.0 supported
Synchronous Serial Interface 2 channels
(SPIA) 2 to 16-bit variable data length
The 16-bit timer (T16) can be used for the baud-rate generator in master mode.
I2C (I2C) 1 channel
Baud-rate generator included
Sound generator (SNDA)
Buzzer output function 512 Hz to 16 kHz output frequencies
One-shot output function
Melody generation function Pitch: 128 Hz to 16 kHz ≈ C3 to C6
Duration: 7 notes/rests (Half note/rest to thirty-second note/rest)
Tempo: 16 tempos (30 to 480)
Tie/slur may be specified.
IR remote controller (REMC2)
Number of transmitter channels 1 channel
Other EL lamp drive waveform can be generated for an application example.
R/F converter (RFC)
Conversion method CR oscillation type with 24-bit counters
Number of conversion channels 2 channels (48-pin package or chip)
1 channel (32-pin package)
(Up to two sensors can be connected to each channel.)
Supported sensors DC-bias resistive sensors, AC-bias resistive sensors (Ch.0 only)
12-bit A/D converter (ADC12A)
Conversion method Successive approximation type
Resolution 12 bits
Number of conversion channels 1 channel
Number of analog signal inputs 6 ports/channel (48-pin package or chip)
5 ports/channel (32-pin package)
Multiplier/divider (COPRO2)
Arithmetic functions 16-bit × 16-bit multiplier
16-bit × 16-bit + 32-bit multiply and accumulation unit
32-bit ÷ 32-bit divider
Reset
#RESET pin Reset when the reset pin is set to low.
Power-on reset Reset at power on.
Key entry reset Reset when the P00 to P01/P02/P03 keys are pressed simultaneously (can be en-
abled/disabled using a register).
Watchdog timer reset Reset when the watchdog timer overflows (can be enabled/disabled using a register).
Supply voltage detector reset Reset when the supply voltage detector detects the set voltage level (can be enabled/
disabled using a register).
Interrupt
Non-maskable interrupt 4 systems (Reset, address misaligned interrupt, debug, NMI)
Programmable interrupt External interrupt: 1 system (8 levels)
Internal interrupt: 20 systems (8 levels)
Multiplier/divider
Coprocessor bus
(COPRO2)
Flash memory
Instruction bus 16K bytes (W03) VPP
32K bytes (W04)
Supply voltage
Sound generator BZOUT
detector EXSVD
(SNDA) #BZOUT
(SVD)
VDD
VDDA 16-bit timer IR remote
VSS (T16) controller REMO
Power generator
VD1 4 Ch. (REMC2) CLPLS
∗ VD2 (PWG2)
1 Ch.
CV1 TOUT00–01
CV2 TOUT10–11 ADIN00–02
16-bit PWM timer 12-bit A/D
CAP00–01 ADIN03 ∗
(T16B) converter
CAP10–11 ADIN04–05
2 Ch. (ADC12A)
EXCL00–01 VREFA0 ∗
1 Ch.
EXCL10–11 #ADTRG0
P10/RFCLKO0/UPMUX/EXSVD
P13/EXCL01/UPMUX
P12/EXCL00/UPMUX
P11/EXOSC/UPMUX
PD4/OSC3
PD3/OSC4
DCLK/PD2
DST2/PD0
DSIO/PD1
CV2
CV1
VD1
PD4
PD3
PD2
PD1
PD0
P13
P12
P11
P10
CV2
CV1
VD1
Port function
or signal
assignment Pin name
36
35
34
33
32
31
30
29
28
27
26
25
P14/RFIN0/UPMUX P14 37 24 VD2 VD2
P15/REF0/UPMUX P15 38 23 VDD VDD
P16/SENA0/UPMUX P16 39 22 VSS VSS
P17/SENB0/UPMUX P17 40 21 #RESET #RESET
P40/SENB1 P40 41 20 OSC1 OSC1
P41/SENA1 P41 42 19 OSC2 OSC2
P42/REF1 P42 43 18 VDDA VDDA
P43/RFIN1 P43 44 17 VREFA0 VREFA0
VPP VPP 45 16 P35 P35/UPMUX/ADIN00
P00/REMO/UPMUX P00 46 15 P34 P34/UPMUX/ADIN01
P01/CLPLS/UPMUX P01 47 14 P33 P33/UPMUX/ADIN02
P02/RFCLKO1/UPMUX P02 48 13 P32 P32/UPMUX/ADIN03
10
11
12
1
2
3
4
5
6
7
8
9
P03
P04
P05
P06
P07
P20
P21
VSS
P44
P45
P30
P31
P03/RTC1S/UPMUX
P04/BZOUT/UPMUX
P05/#BZOUT/UPMUX
P06/FOUT/UPMUX
P07/#ADTRG0/UPMUX
P20/UPMUX
P21/UPMUX
VSS
P44
P45
P30/EXCL10/UPMUX/ADIN05
P31/EXCL11/UPMUX/ADIN04
P10/RFCLKO0/UPMUX/EXSVD
P13/EXCL01/UPMUX
P12/EXCL00/UPMUX
P11/EXOSC/UPMUX
DCLK/PD2
DST2/PD0
DSIO/PD1
VD1
PD2
PD1
PD0
Port function
P13
P12
P11
P10
VD1
or signal Pin
24
23
22
21
20
19
18
17
assignment name
P14/RFIN0/UPMUX P14 25 16 VDD VDD
P15/REF0/UPMUX P15 26 15 #RESET #RESET
P16/SENA0/UPMUX P16 27 14 OSC1 OSC1
P17/SENB0/UPMUX P17 28 13 OSC2 OSC2
(Top View)
VPP VPP 29 12 VDDA VDDA (= VREFA0)
P00/REMO/UPMUX P00 30 11 P35 P35/UPMUX/ADIN00
P01/CLPLS/UPMUX P01 31 10 P34 P34/UPMUX/ADIN01
P02/UPMUX P02 32 9 P33 P33/UPMUX/ADIN02
1
2
3
4
5
6
7
8
P03
P04
P05
P06
P07
VSS
P30
P31
P03/RTC1S/UPMUX
P04/BZOUT/UPMUX
P05/#BZOUT/UPMUX
P06/FOUT/UPMUX
P07/#ADTRG0/UPMUX
VSS
P30/EXCL10/UPMUX/ADIN05
P31/EXCL11/UPMUX/ADIN04
P10/RFCLKO0/UPMUX/EXSVD
P13/EXCL01/UPMUX
P12/EXCL00/UPMUX
P11/EXOSC/UPMUX
PD4/OSC3
PD3/OSC4
DCLK/PD2
DST2/PD0
DSIO/PD1
CV2
CV1
VD1
PD4
PD3
PD2
PD1
PD0
P13
P12
P11
P10
CV2
CV1
VD1
Port function
or signal Pad
assignment name 36
35
34
33
32
31
30
29
28
27
26
25
P14/RFIN0/UPMUX P14 37
P15/REF0/UPMUX P15 38
P16/SENA0/UPMUX P16 39 24 VD2 VD2
P17/SENB0/UPMUX P17 40 23 VDD VDD
22 VSS VSS
21 #RESET #RESET
Y 20 OSC1 OSC1
19 OSC2 OSC2
2.102 mm
X
(0, 0)
P40/SENB1 P40 41 18 VDDA VDDA
P41/SENA1 P41 42 17 VREFA0 VREFA0
P42/REF1 P42 43 16 P35 P35/UPMUX/ADIN00
P43/RFIN1 P43 44 15 P34 P34/UPMUX/ADIN01
VPP VPP 45 14 P33 P33/UPMUX/ADIN02
P00/REMO/UPMUX P00 46 Die No. CJxxxxxxx 13 P32 P32/UPMUX/ADIN03
P01/CLPLS/UPMUX P01 47
P02/RFCLKO1/UPMUX P02 48
10
11
12
1
2
3
4
5
6
7
8
9
P03
P04
P05
P06
P07
P20
P21
VSS
P44
P45
P30
P31
P03/RTC1S/UPMUX
P04/BZOUT/UPMUX
P05/#BZOUT/UPMUX
P06/FOUT/UPMUX
P07/#ADTRG0/UPMUX
P20/UPMUX
P21/UPMUX
VSS
P44
P45
P30/EXCL10/UPMUX/ADIN05
P31/EXCL11/UPMUX/ADIN04
2.325 mm
48-pin/Chip
Tolerant
32-pin
Pin/pad Assigned Initial
I/O fail-safe Function
name signal state
structure
48-pin/Chip
Tolerant
32-pin
Pin/pad Assigned Initial
I/O fail-safe Function
name signal state
structure
48-pin/Chip
Tolerant
32-pin
Pin/pad Assigned Initial
I/O fail-safe Function
name signal state
structure
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