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8086 Microprocessor

The 8086 microprocessor is an enhanced 16-bit processor designed by Intel in 1976 as an upgraded version of the 8085. It uses 20 address lines and 16 data lines, allowing it to directly address up to 1MB of memory. The 8086 operates in minimum and maximum modes, with the minimum mode used for a single CPU system and the maximum mode used in a multi-processor system. It has various pins for functions like addressing memory, input/output, interrupts and bus control.

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95 views4 pages

8086 Microprocessor

The 8086 microprocessor is an enhanced 16-bit processor designed by Intel in 1976 as an upgraded version of the 8085. It uses 20 address lines and 16 data lines, allowing it to directly address up to 1MB of memory. The 8086 operates in minimum and maximum modes, with the minimum mode used for a single CPU system and the maximum mode used in a multi-processor system. It has various pins for functions like addressing memory, input/output, interrupts and bus control.

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Tanu Gupta
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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8086 microprocessor

Intel 8086
 Intel 8086 microprocessor is the enhanced version of Intel 8085 microprocessor. It was
designed by Intel in 1976.

 The 8086 microprocessor is a16-bit, N-channel, HMOS microprocessor. Where the HMOS is
used for "High-speed Metal Oxide Semiconductor".

 Intel 8086 is built on a single semiconductor chip and packaged in a 40-pin IC package. The
type of package is DIP (Dual Inline Package).

 Intel 8086 uses 20 address lines and 16 data- lines. It can directly address up to 2 20 = 1 Mbyte of
memory.

 It consists of a powerful instruction set, which provides operation like division and
multiplication very quickly.

 8086 is designed to operate in two modes, i.e., Minimum and Maximum mode.
The description of the pins of 8086 is as follows:

AD0-AD15 (Address Data Bus): 

Bidirectional address/data lines. These are low order address bus. They are multiplexed with data.

When these lines are used to transmit memory address, the symbol A is used instead of AD, for example,
A0- A15.

A16 - A19 (Output): 

High order address lines. These are multiplexed with status signals.
A16/S3, A17/S4:  A16 and A17 are multiplexed with segment identifier signals S3 and S4.

A18/S5:  A18 is multiplexed with interrupt status S5.

A19/S6:  A19 is multiplexed with status signal S6.

BHE/S7 (Output):  Bus High Enable/Status. During T1, it is low. It enables the data onto the most
significant half of data bus, D8-D15. 8-bit device connected to upper half of the data bus use BHE signal.
It is multiplexed with status signal S7. S7 signal is available during T3 and T4.

RD (Read):  For read operation. It is an output signal. It is active when LOW.

Ready (Input):  The addressed memory or I/O sends acknowledgment through this pin. When HIGH, it

denotes that the peripheral is ready to transfer data.

RESET (Input):  System reset. The signal is active HIGH.

CLK (input):  Clock 5, 8 or 10 MHz.

INTR:  Interrupt Request.

NMI (Input):  Non-maskable interrupt request.

TEST (Input):  Wait for test control. When LOW the microprocessor continues execution otherwise
waits.

VCC:  Power supply +5V dc.

GND:  Ground.

Operating Modes of 8086


There are two operating modes of operation for Intel 8086, namely the minimum mode and
the maximum mode.

When only one 8086 CPU is to be used in a microprocessor system, the 8086 is used in the Minimum
mode of operation.

In a multiprocessor system 8086 operates in the Maximum mode.


Pin Description for Minimum Mode
In this minimum mode of operation, the pin MN/MX is connected to 5V D.C. supply i.e. MN/MX = VCC.

The description about the pins from 24 to 31 for the minimum mode is as follows:

INTA (Output): 

Pin number 24 interrupts acknowledgement. On receiving interrupt signal, the processor issues an
interrupt acknowledgment signal. It is active LOW.

ALE (Output): 

Pin no. 25. Address latch enable. It goes HIGH during T1. The microprocessor 8086 sends this signal to
latch the address into the Intel 8282/8283 latch.

DEN (Output):

 Pin no. 26. Data Enable. When Intel 8287/8286 octal bus transceiver is used this signal. It is active LOW.

DT/R (output): 

Pin No. 27 data Transmit/Receives. When Intel 8287/8286 octal bus transceiver is used this signal controls
the direction of data flow through the transceiver. When it is HIGH, data is sent out. When it is LOW, data
is received.

M/IO (Output): 

Pin no. 28, Memory or I/O access. When this signal is HIGH, the CPU wants to access memory. When this
signal is LOW, the CPU wants to access I/O device.

WR (Output): 

Pin no. 29, Write. When this signal is LOW, the CPU performs memory or I/O write operation.

HLDA (Output): 

Pin no. 30, Hold Acknowledgment. It is sent by the processor when it receives HOLD signal. It is active
HIGH signal. When HOLD is removed HLDA goes LOW.

HOLD (Input):  

Pin no. 31, Hold. When another device in microcomputer system wants to use the address and data bus, it
sends HOLD request to CPU through this pin. It is an active HIGH signal.

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