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EEE 303 – Digital Electronics

Introduction

Week 01

Dr. Sajid Muhaimin Choudhury, Assistant Professor

Department of Electrical and Electronics Engineering
Bangladesh University of Engineering and Technology

EEE 303 July 2022

Course Teachers
Course Instructor(s):
Section A: Mr. Hamidur Rahman, Associate Professor
Email: hamidurrahman@eee.buet.ac.bd
Office: ECE220, ECE Building
Website: https://hamidurrahman.buet.ac.bd/
Section B: Dr. Sajid Muhaimin Choudhury, Assistant Professor
Email: sajid@eee.buet.ac.bd
Office: ECE222, ECE Building
Website: http://sajid.buet.ac.bd/
Section C: Dr. Sajid Muhaimin Choudhury, Assistant Professor
Email: sajid@eee.buet.ac.bd
Office: ECE222, ECE Building
Website: http://sajid.buet.ac.bd/

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About Section B & C Instructor

Dr. Sajid Muhaimin Choudhury
Education:
• BSc. Engg (2009), Department of EEE, BUET
• MSc. Engg (2011), Department of EEE, BUET
– Microstrip Patch Antenna (Hexaflake Patch Structure)
• PhD (2019), Purdue University, West Lafayette, IN, USA
– Metasurface Hologram and Thermophotovoltaics
Career:
• Lecturer, IICT, BUET Nov 2009-Jan 2010
• Lecturer, Department of EEE, BUET 2010-2013
• Assistant Professor, Department of EEE, BUET 2013-todate

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About Section B Instructor

Research Interest
• Plasmonics and Nanophotonics
• Plasmonic Biosensing
• High Speed Modulator
• Photocatalytic Water Splitting
• Quantum Computing
• Embedded Systems Design

Volunteering and Leadership Experience

• Founding Chair, IEEE Photonics Society Bangladesh Chapter
• Founding Chair, The Optical Society – OSA Bangladesh Section
• Founding Moderator, BUET Optical and Photonics Society
• Chair, IEEE YP Bangladesh 2020-21
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EEE 303 – Digital Electronics

Introduction to
Outcome Based
Education (OBE)

Dr. Sajid Muhaimin Choudhury, Assistant Professor

Department of Electrical and Electronics Engineering
Bangladesh University of Engineering and Technology

Introduction to OBE
• In this course, we are going to follow the approach of Outcome Based Education
(OBE) (Not to be confused with Order of the British Empire)!
• Outcome-based education (OBE) is an educational theory that bases each
part of an educational system around goals (outcomes). By the end of the
educational experience, each student should have achieved the goal.
• Prerequisite for accreditation!

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Traditional System vs OBE System

Courtesy: Dr. Yasin, IQAC OBE Workshop

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Traditional System vs OBE System

Courtesy: Dr. Yasin, IQAC OBE Workshop

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Courtesy: Dr. Yasin, IQAC OBE Workshop

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Program Objectives of Dept of EEE BUET

PO1
Engineering Knowledge: Apply knowledge of mathematics, science, and engineering to solve complex electrical and electronic engineering
problems. (*K1 to K4).

PO2
Problem Analysis: Identify, formulate, research literature, interpret data, and analyze complex electrical and electronic engineering problems
using principles ofmathematical, natural and engineering sciences. (K1 to K4).
Design/development Solution: Design solutions to complex engineering problems and design systems, components, or processes that meet
PO3 the needs relevant to electrical and electronic engineering with appropriate considerations to public health and safety, cultural, societal, and
environmental considerations. (K5).

PO4 Investigation: Conduct investigations of complex problems using research-based knowledge and research methods including design of
experiments, analysis and interpretation of data, and synthesis of information to provide valid conclusions. (K8).

PO5 Modern tool usage: Use techniques, skills, and modern engineering tools to solve complex and practical engineering problems related
to electrical and electronic engineering with understanding of the limitations. (K6).

PO6 The Engineer and Society: Apply reasoning to assess societal, health, safety, legal and cultural issues and the consequent responsibilities
relevant to professional engineering practice and solutions to complex engineering problems. (K7).
Environment and sustainability: Understand and evaluate the sustainability and impact of professional engineering work in the
PO7 solution of
complex engineering problems in societal and environmental contexts. (K7).
PO8 Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of engineering practice. (K7).
PO9
Individual work and team work: Function effectively as an individual, and as a member or leader in diverse teams and in multi-
disciplinary settings.
Communication: Communicate effectively on complex engineering activities with the electrical and electronic engineering and other inter-
PO10 disciplinary communities and with society at large, such as being able to comprehend and write effective reports and design documentation, make
effective presentations, and give and receive clear instructions.

PO11 Project management and finance: Demonstrate knowledge and understanding of engineering management principles and economic
decision-making and apply these to one's own work, as a member and leader in a team, to manage projects and in multidisciplinary environments.
EEE 303
PO12 Life-long – Digital
Learning Electronics
: Recognize the need for, and ability to engage in life-long learning
Dr. Sajid Muhaimin Choudhury 10
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Course Outcome Dept of EEE

• Syllabus of each course needs to be modified to include specific

Course Outcomes (CO)
• Each Course will have 3-5 CO
• Each CO will be mapped with 1 or more PO

• Each CO must be evaluated through assessments (CTs, Term final

Exam questions, Presentation etc)
• Through marks obtained in each exam question, it will be calculated
how much of the COs have each student obtained.
• CO-PO mapping will tell how much PO each student has obtained
• 60% of the students should attain 40% of the POs for accreditation

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Knowledge Profile Complex Engineering Problem Solving Complex Eng. Activity

K1 K2 K3 K4 K5 K6 K7 K8 P1 P2 P3 P4 P5 P6 P7 A1 A2 A3 A4 A5
Related to PO10
Wide ranging/conflicting

No obvious solution
Knowledge K3-K6, K8

Level of Interaction
Eng. Specialization
Eng. Fundamentals

Range of resources
Course EEE 416

Many components
Outside problems
Infrequent Issues

Diverse groups

Consequences
Technology

Familiarity
Innovation
Research
Science

Society
Design
Math

🗸 🗸 🗸 🗸 🗸 🗸 🗸 🗸

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EEE 303 – Digital Electronics

EEE 303
Course
Information

Dr. Sajid Muhaimin Choudhury, Assistant Professor

Department of Electrical and Electronics Engineering
Bangladesh University of Engineering and Technology

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Course Outcomes of EEE 415

After completing this course, the students will be able to -
Domains and
CO Corresponding Delivery Method(s) Assessment
CO Statement Taxonomy
No. PO(s)* and Activity(-ies) Tool(s)
level(s)**
Analyze the structure and
behaviour of different types of Lectures, Class test,
CO1 PO1 C4
combinational and sequential Homework Final exam
digital logic circuits

identify the requirements of

physically implementing digital
Lectures, Class test,
CO2 electronic circuits, different PO5 C2
Homework Final exam
logic technologies and memory
circuits
design combinational and
Assignment
sequential logic circuits with Lectures,
CO3 PO3 C6 Class test,
practical constraints using Homework
Final exam
Verilog
Cognitive Domain Taxonomy Levels: C1: Remember; C2: Understand; C3: Apply; C4: Analyse; C5: Evaluate; C6: Create

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Grading Policy: (As approved by Academic Council)

1. Class Attendance – Class participation and attendance will be recorded in every class. 30 Marks as per
university AC policy

2. Continuous Assessment –
• 1 assignment (20) – Mandatory
• 3 Class tests, best 2 counted (20)

3. Final Examination – A comprehensive term final examination will be held at the end of the Term following
the guideline of the Academic Council

Distribution of Marks
Class Attendance – 10%
Continuous Assessment – 20%
Final Examination – 70%

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Class Assignments and Presentations

Please make sure that you are added to the Microsoft Teams dedicated for your
section! We will post assignments and announcements there.

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Textbooks

[Harris] Digital Design and Computer Architecture ARM Edition

[Floyd] Thomas L. Floyd, "Digital Fundamentals" 11th Edition, Pearson
(2015)
[Malvino] Albert P. Malvino, Jerald A. Brown - Digital Computer Electronics-
McGraw-Hill (1993)
[Brown] Stephen Brown and Zvonko Vranesic, "Fundamentals of Digital Logic
with Verilog Design" 3rd Edition, McGraw Hill (2014)
[Mano] Morris Mano and Michael Ciletti, "Digital Design with an Introduction
to VerilogHDL" 5th Edition, Pearson (2013)
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Class/Lecture Schedule

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Undergraduate Academic Calendar – July 2022 Semester

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New Syllabus of EEE 303

EEE 303 – Digital Electronics Resolution of Academic Council Meeting 474, Date 11.01.2022,
Dr. Sajid Muhaimin Choudhury 20
Department of EEE, BUET Resolution no 220148
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EEE 303 Syllabus

• Introduction to number systems and codes. Analysis and synthesis of digital logic circuits: Basic logic
functions, Boolean algebra, combinational logic design, minimization of combinational logic.
Introduction to Verilog Hardware Description Language programming and structural and
behavioral design of digital systems using VerilogHDL, Verilog Timing analysis and test bench,
MOSFET Digital circuits: NMOS inverter, CMOS inverter, CMOS logic circuits, Clocked CMOS logic
circuits, transmission gates, sequential logic circuits, BJT digital circuits: ECL, TTL, STTL, BiCMOS,
Memories: classification and architecture, RAM memory cells, Read only memory, data converters,
Modular combinational circuit design: pass transistor, pass gates, multiplexer, demultiplexer and their
implementation in CMOS, decoder, encoder, comparators, binary arithmetic elements and ALU design.
Sequential circuits: latches, flip-flops timing analysis and power optimization of sequential circuits.
Modular sequential logic circuit design: shift registers, counters and their applications. Asynchronous and
synchronous sequential circuits. Dual Inline Packaged and Surface Mount Device (SMD) Integrated
Circuits, Introduction to System Integration and Printed Circuit Board design, Design of a Simple-
As-Possible (SAP) computer: SAP-1, selected concepts from SAP-2 (jump, call, return).

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EEE 303 Syllabus

• Introduction to number systems and codes. Analysis and synthesis of digital logic circuits: Basic logic
functions, Boolean algebra, combinational logic design, minimization of combinational logic. Introduction
to Verilog Hardware Description Language programming and structural and behavioral design of digital
systems using VerilogHDL, Verilog Timing analysis and test bench, MOSFET Digital circuits: NMOS
inverter, CMOS inverter, CMOS logic circuits, Clocked CMOS logic circuits, transmission gates, sequential
logic circuits, BJT digital circuits: ECL, TTL, STTL, BiCMOS, Memories: classification and architecture, RAM
memory cells, Read only memory, data converters, Modular combinational circuit design: pass transistor, pass
gates, multiplexer, demultiplexer and their implementation in CMOS, decoder, encoder, comparators, binary
arithmetic elements and ALU design. Sequential circuits: latches, flip-flops timing analysis and power
optimization of sequential circuits. Modular sequential logic circuit design: shift registers, counters and their
applications. Asynchronous and synchronous sequential circuits. Dual Inline Packaged and Surface Mount
Device (SMD) Integrated Circuits, Introduction to System Integration and Printed Circuit Board design,
Design of a Simple-As-Possible (SAP) computer: SAP-1, selected concepts from SAP-2 (jump, call, return).

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Weekly Lecture Plan

Week Topic Textbook
Introduction to Number Systems and codes. Introduction to Boolean Harris 1.4, 5.3,
1
algebra, Introduction to VerilogHDL 1.5
Analysis and synthesis of digital logic circuits: Basic logic function,
2-3 combinational logic design, Universal logic gates, Minimization of Harris 2.1-2.9
combinational logic, k-map
Programming and structural and behavioral design of digital systems
4 using VerilogHDL, Verilog Timing analysis and test bench. Verilog Harris 4
synthesis with combinational logic
Harris 5.2-
5 ALU design (Adder, Subtractor, Comparator)
Floyd 6.1-6.3
Winter Vacation
6 Decoder, encoder, Multiplexer, demultiplexer Floyd 6.4-6.9
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Week Topic Textbook

MOSFET Digital circuits: NMOS inverter, CMOS inverter, CMOS logic Harris 1.7-1.8
circuits, Clocked CMOS logic circuits, transmission gates, Modular
7
combinational circuit design: pass transistor, pass gates, and their
implementation in CMOS
Harris 3.1-3.2
8 Sequential circuits: different types of latches, flip-flops Floyd 7.1-7.3
Modular sequential logic circuit design: shift registers, counters, and Floyd 8.1-8.3,
9
application 9.2-9.7
Asynchronous and synchronous sequential circuits., Introducing State 10-11
10-11 Machine Design, State Minimization, Mille and Moore type state
machine, design of simple FSM using Verilog
Design of a Simple-As-Possible (SAP) computer: SAP-1, selected 12-13
12-13
concepts from SAP-2 (jump, call, return)
Dual Inline Packaged and Surface Mount Device (SMD) Integrated 13
Circuits, Introduction to System Integration and Printed Circuit Board
13
design, Memories: classification and architecture, RAM memory cells,
Read only memory
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Grading Policy: (As approved by Academic Council)

1. Class Attendance – Class participation and attendance will be recorded in every class
2. Continuous Assessment – Continuous assessment will be done in the form of quiz, assignment, presentation,
etc. The scheme of continuous assessment for the course will be declared at least one week before such
assessment.
3. Final Examination – A comprehensive term final examination will be held at the end of the Term following the
guideline of the Academic Council

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Distribution of Marks

1. Class Attendance – 10%

2. Continuous Assessment – 20%
–4 Class Test. Best 3 counted
3. Final Examination – 70%

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Broader Picture: Where This Course Fits

programs
• PHY 165 Electricity and Magnetism,
CSE / Comp Engg Modern Physics and Mechanics
device drivers • EEE 101 - Electrical Circuits I
• EEE 105 - Electrical Circuits II
instructions
registers • EEE 201 - Electronic Circuits I
EEE 415
datapaths • EEE 203 - Energy Conversion I
controllers
• EEE 207 - Electronic Circuits II
adders

EEE 303, EEE 467 memories

AND gates
•
•
EEE 209 - Engineering Electromagnetics
EEE 303 - Digital Electronics
NOT gates
• EEE 313 Solid State Devices
amplifiers
EEE 101, 105, 207, 315, 465* filters • EEE 315 Power Electronics
transistors • EEE 415 Microprocessors and
EEE 201, 313 diodes
Embedded Systems
PHY 165, 209, 461* electrons • EEE 465* Analog Integrated Circuits

EEE 303 – Digital Electronics • EEE 467* VLSI Circuits and Design
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EEE 303 – Digital Electronics

Introduction to Digital
Electronics

Dr. Sajid Muhaimin Choudhury, Assistant Professor

Department of Electrical and Electronics Engineering
Bangladesh University of Engineering and Technology
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Digital Electronics

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Why Digital?

• Data can be stored (memory characteristics)

• Data can be used in calculations
• Compatible with display technologies
• Compatible with Computer technologies
• Systems can be programmed
• Digital IC families make design easier

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Why Analog?

• Most “real-world events are analog in nature

• Analog processing is usually simpler
• Analog processing is usually faster
• Traditional electronics systems were mostly analog

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Benefits of Digital over Analog

• Reproducibility
• Not affected by noise (better quality)
• Ease of design
• Data protection
• Programmable
• Speed
• Economy

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Getting Digital from Analog

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How it is made

• At any point in circuit, only two Voltage states are

present – HIGH and LOW
• Also sometimes called TRUE or FALSE. In Boolean
logic, 0 and 1
• Generally, +5V is considered high, 0V considered
ground

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Digital System

Discrete
Discrete Information Discrete
Input Processing Output
System

System
States
Takes discrete input, has discrete system
states and gives discrete output
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Information Representation

• Information variables are represented by physical

quantities (voltage, current, charge, magnetic field
orientation, temperature, phase)
• For digital systems, the variables take discrete values
• Two level or binary values are most common

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Binary representation of physical quantities

• CPU: Voltage
• HDD: Magnetic Field Direction
• CD: Physical shape of pits
• DRAM: Electric Charge
• Optical Fiber: Light intensity

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Signals over Time

Time

Analog

Digital
Asynchronous

Synchronous

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Types of Digital Systems

• No state Present, Output = f(input)

• Combinational logic system

• State Present, Output = f(input, state)

• Synchronous Sequential System (state updated at discrete
times)
• Asynchronous Sequential System (state updated at any time)

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Digital System Example

Digital clock
Input: Time set
Output: Current time Digital computer
State: Current time Covered in EEE 416
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Digital System – SAP 1 Computer

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EEE 303 – Digital Electronics

Lecture-1.2
Number Systems

Dr. Sajid Muhaimin Choudhury

Dept of EEE, BUET

Dr. Sajid Muhaimin Choudhury, Assistant Professor

Department of Electrical and Electronics Engineering
Bangladesh University of Engineering and Technology
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Weekly Lecture Plan

Week Topic Textbook
Introduction to Number Systems and codes. Introduction to Boolean Harris 1.4, 5.3,
1
algebra, Introduction to VerilogHDL 1.5
Analysis and synthesis of digital logic circuits: Basic logic function,
2-3 combinational logic design, Universal logic gates, Minimization of Harris 2.1-2.9
combinational logic, k-map
Programming and structural and behavioral design of digital systems
4 using VerilogHDL, Verilog Timing analysis and test bench. Verilog Harris 4
synthesis with combinational logic
Harris 5.2-
5 ALU design (Adder, Subtractor, Comparator)
Floyd 6.1-6.3
Winter Vacation
6 Decoder, encoder, Multiplexer, demultiplexer Floyd 6.4-6.9
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There are 10 kinds of people in this world:

Those who understand binary numerals,

and those who don’t.

- Ian Stewart
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Number system: Decimal

Decimal: Deca (ten) Symbols:

0123456789
Each subsequent digit a
multiplier of 10 10 7651 765
7650
Base: 10 1
N/10 Q R
765/10 76 5
76/10 7 6
7/10 0 7

7 6 5 1|10
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Decimal Numbers
• Base 10 (our everyday number system)
1000's column

10's column
1's column
100's column

5374 10 =

Base 10

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Decimal Numbers
• Base 10 (our everyday number system)

1000's column

10's column
1's column
100's column
537410 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100
five three seven four
thousands hundreds tens ones

Base 10

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Number of Fingers

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Number system: Binary

Symbols:
Binary: Bi (two) 01, TF
Each subsequent digit a
multiplier of 2 N/2 Q R
Base: 2 13/2 6 1
6/2 3 0
3/2 1 1
1/2 0 1

13|10 = 1101|2
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Decimal and Binary Numbers

• Base 10 (our everyday number system)
1000's column

10's column
1's column
100's column

537410 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100

five three seven four
thousands hundreds tens ones

• Base 2: Binary numbers

8's column

2's column
1's column
4's column

1101 2 =
Base 2

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Base-n Number system

• The system uses n different symbols
• Each subsequent digit: n-times
• For this course we denote a number, N with it’s base
as N|n, n is denoted in decimal
• For n<10, we use symbols as 0-9, and for n>10 we
use symbols as ABCD…

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Base-8 and Base-16

• Base-8 • Base-16
• Octal • Hexadecimal
• Symbols: 01234567 • Symbols:
0123456789ABCDEF
• F|16 = 15|10

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Decimal and Binary Numbers

• Base 10 (our everyday number system)

1000's column

10's column
1's column
100's column
537410 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100
five three seven four
thousands hundreds tens ones

• Base 2: Binary numbers

8's column

2's column
1's column
4's column

1101 2 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20 = 1310
one one no one
eight four two one
Base 2

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Powers of Two
• 20 = • 28 =
• 21 = • 29 =
• 22 = • 210 =
• 23 = • 211 =
• 24 = • 212 =
• 25 = • 213 =
• 26 = • 214 =
• 27 = • 215 =

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Powers of Two
• 20 = 1 • 28 = 256
• 21 = 2 • 29 = 512
• 22 = 4 • 210 = 1024 Handy to
• 23 = 8 • 211 = 2048 memorize
9
• 24 = 16 • 212 = 4096 up to 2
• 25 = 32 • 213 = 8192
• 26 = 64 • 214 = 16384
• 27 = 128 • 215 = 32768

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Number Conversion
• Binary to decimal conversion:
– Convert 100112 to decimal

• Decimal to binary conversion:

– Convert 4710 to binary

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Number Conversion
• Binary to decimal conversion:
– Convert 100112 to decimal
– 16×1 + 8×0 + 4×0 + 2×1 + 1×1 = 1910

• Decimal to binary conversion:

– Convert 4710 to binary
– 32×1 + 16×0 + 8×1 + 4×1 + 2×1 + 1×1 = 1011112

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Decimal to Binary Conversion

• Two methods:
o Method 1: Find the largest power of 2 that fits, subtract and repeat.

o Method 2: Repeatedly divide by 2, remainder goes in next most

significant bit

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Decimal to Binary Conversion

Method 1: Find the largest power of 2 that fits, subtract and repeat.
5310

Method 2: Repeatedly divide by 2, remainder goes in next most

significant bit.
5310

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Decimal to Binary Conversion

Method 1: Find the largest power of 2 that fits, subtract and repeat.
5310 32×1
53-32 = 21 16×1
21-16 = 5 4×1
5-4 = 1 1×1 = 1101012
Method 2: Repeatedly divide by 2, remainder goes in next most
significant bit.
5310 = 53/2 = 26 R1
26/2 = 13 R0
13/2 = 6 R1
6/2 = 3 R0
3/2 = 1 R1
1/2 = 0 R1 = 1101012

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Decimal to Binary Conversion

Another example: Convert 7510 to binary.

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 63

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Decimal to Binary Conversion

Another example: Convert 7510 to binary.
7510= 64 + 8 + 2 + 1 = 10010112

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 64

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Decimal to Binary Conversion

Another example: Convert 7510 to binary.
7510= 64 + 8 + 2 + 1 = 10010112
or
75/2 = 37 R1
37/2 = 18 R1
18/2 =9 R0
9/2 =4 R1
4/2 =2 R0
2/2 =1 R0
1/2 =0 R1

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 65

Department of EEE, BUET
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Number Conversion
• Binary to decimal conversion:
– Convert 111012 to decimal
– 16×1 + 8×1 + 4×1 + 2×0 + 1×1 = 2910

• Decimal to binary conversion:

– Convert 4710 to binary
– 32×1 + 16×0 + 8×1 + 4×1 + 2×1 + 1×1 =
1011112

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 66

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Binary Values and Range

• N-digit decimal number
• How many values?
• Range?
• Example: 3-digit decimal number:

• N-bit binary number

• How many values?
• Range:
• Example: 3-digit binary number:

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 67

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Binary Values and Range

• N-digit decimal number
• How many values? 10N
• Range? [0, 10N - 1]
• Example: 3-digit decimal number:
– 103 = 1000 possible values
– Range: [0, 999]

• N-bit binary number

• How many values? 2N
• Range: [0, 2N - 1]
• Example: 3-digit binary number:
– 23 = 8 possible values
– Range: [0, 7] = [0002 to 1112]

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 68

Department of EEE, BUET
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Binary Numbers
𝐴: {𝑎 ,𝑎 ,…𝑎 ,𝑎 }

𝐴= 𝑎2

Example:
11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20
=8 + 4 + 0 + 1
= 13

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 69

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Hexadecimal Numbers
Hex Digit Decimal Equivalent Binary Equivalent
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
A 10
B 11
C 12
D 13
E 14
F 15

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Hexadecimal Numbers
Hex Decimal Equivalent Binary Equivalent
Digit
0 0 0000
1 1 0001
2 2 0010
3 3 0011
4 4 0100
5 5 0101
6 6 0110
7 7 0111
8 8 1000
9 9 1001
A 10 1010
B 11 1011
C 12 1100
D 13 1101
E 14 1110
F 15 1111

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Hexadecimal Numbers
• Base 16
• Shorthand for binary

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Hexadecimal to Binary
Conversion
• Hexadecimal to binary conversion:
– Convert 4AF16 (also written 0x4AF) to
binary

• Hexadecimal to decimal conversion:

– Convert 4AF16 to decimal

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 73

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Hexadecimal to Binary
Conversion
• Hexadecimal to binary conversion:
– Convert 4AF16 (also written 0x4AF) to
binary
– 0100 1010 11112

• Hexadecimal to decimal conversion:

– Convert 4AF16 to decimal
– 4 × 162 + A × 161 + F × 160
– 4 × 162 + 10 × 161 + 15 × 160 = 119910

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Bits, Bytes, Nibbles…

• Bits 10010110
– msb: most significant bit most least
significant significant
– lsb: least significant bit bit bit

byte

• Bytes & Nibbles 10010110

nibble

• Bytes
– MSB: most significant byte
– LSB: least significant byte

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Bits, Bytes, Nibbles…

• Bits 10010110
– msb: most significant bit most least
significant significant
– lsb: least significant bit bit bit

byte

• Bytes & Nibbles 10010110

nibble

• Bytes
– MSB: most significant byte CEBF9AD7
– LSB: least significant byte most least
– Each hex digit represents significant significant
byte byte
a nibble (4 bits)

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Large Powers of Two

• 210 = 1 kilo ≈ thousand (1024)
• 220 = 1 mega ≈ million (1,048,576)
• 230 = 1 giga ≈ billion (1,073,741,824)
• 240 = 1 tera ≈ trillion (1,099,511,627,776)
• 250 = 1 peta ≈ 1015
• 260 = 1 exa ≈ 1018

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 77

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Large Powers of Two

• 210 = 1 kilo (kibi) ≈ 103 (1024)
• 220 = 1 mega (mebi) ≈ 106 (1,048,576)
• 230 = 1 giga (gibi) ≈ 109 (1,073,741,824)
• 240 = 1 tera (tebi) ≈ 1012
• 250 = 1 peta (pebi) ≈ 1015
• 260 = 1 exa (exbi) ≈ 1018

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 78

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Large Powers of Two

• 210 = 1 kilo ≈ 1000 (1024)
kibibyte = 1 Ki
for example: 1 KiB = 1024 Bytes
1 Kib = 1024 bits
• 220 = 1 mega ≈ 1 million (1,048,576)
mebibyte = 1 Mi
for example: 1 MiB, 1 Mib (1 megabit)
• 230 = 1 giga ≈ 1 billion (1,073,741,824)
gibibyte = 1 Gi
for example: 1 GiB, 1 Gib
EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 79
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Estimating Powers of Two

• What is the approximate value of 224?

• Approximately how many values can a 32-bit

variable represent?

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 80

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Estimating Powers of Two

• What is the approximate value of 224?
24 × 220 ≈ 16 million

• Approximately how many values can a 32-

bit variable represent?
22 × 230 ≈ 4 billion
First factor out the largest 210x. Then estimate.

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 81

Department of EEE, BUET
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Base conversion from Decimal

230|10

Octal Hexadecimal
N/8 Q R N/16 Q R
230/8 28 3 230/16 14 3
28/8 3 1 14/16 0 14(E)
3/8 0 3

230|10 = 313|8 230|10 = E3|16 = E3H

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Base conversion to Decimal

230|8 1F4|16

Octal Hexadecimal
0 ✕ 80 = 0 4 ✕ 160 = 4
3 ✕ 81 = 24 15 ✕ 161 = 240
2 ✕ 82 = 128 1 ✕ 162 = 256
152 500

230|8 = 152|10 1F4|16 = 500|10

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 83
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Dec Bin Oct Hex Table of Values

0 0000 0 0
1 0001 1 1
2 0010 2 2
3 0011 3 3
4 0100 4 4
5 0101 5 5
6 0110 6 6
7 0111 7 7
10|8 = 001 000|2
8 1000 10 8
9 1001 11 9 11|8 = 001 001|2
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
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For Oct, each digit represents 3 bits, and

for Hex each digit represent 4 bits. Can be
used to compactly visualize digital data

001101010|2

001 101 010|2 = 152|8 0110 1010|2 = 6A|8

1 5 2 6 A
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Binary Addition, Subtraction, Multiplication and Division

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 86

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Addition
• Decimal
3734
+ 5168

• Binary
1011
+ 0011

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 87

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Addition
• Decimal
11 carries
3734
+ 5168
8902

• Binary 11 carries
1011
+ 0011
1110

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 88

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Binary Addition Examples

• Add the following
4-bit binary 1001
+ 0101

numbers

• Add the following 1011

4-bit binary + 0110
numbers

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 89

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Binary Addition Examples

• Add the following 4-bit binary numbers

1001
+ 0101

• Add the following 4-bit binary numbers

1011
+ 0110

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 90

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Binary Addition Examples

• Add the following 4-bit binary numbers
1
1001
+ 0101
1110

• Add the following 4-bit binary numbers

111
1011
+ 0110
10001

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 91

Department of EEE, BUET
91

Binary Addition Examples

• Add the following 4-bit binary numbers
Any additional bits on the 1
1001
left are ignored (overflow!) + 0101
1110

• Generally, addition of two n-bit numbers gives

an n-bit result. 111
1011
+ 0110
10001
Overflow!
EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 92
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Overflow
• Digital systems operate on a fixed number of bits
• Overflow: when the result is too big to fit in the available
number of bits
• See previous example of 11 + 6

111
1011
+ 0110
10001
Overflow!
EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 93
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Signed number
• A signed binary number consists of both sign and
magnitude information.
• Three formats:
• sign-magnitude
• 1’s complement
• 2’s complement.

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 94

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Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits
• Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0
– Negative number: sign bit = 1

• Example, 4-bit sign/mag representations of ± 6:

+6 =
-6=

• Range of an N-bit sign/magnitude number:

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 95

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Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits
• Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0
– Negative number: sign bit = 1

• Example, 4-bit sign/mag representations of ± 6:

+6 = 0110
- 6 = 1110

• Range of an N-bit sign/magnitude number:

[-(2N-1-1), 2N-1-1]

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 96

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Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits
• Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0 𝑨: {𝒂𝑵 𝟏 , 𝒂𝑵 𝟐 , … 𝒂𝟏 , 𝒂 𝟎 )

– Negative number: sign bit = 1 𝑵 𝟐

𝑨= (−𝟏)𝒂𝑵 𝟏 𝒂 𝒊 𝟐𝒊
𝒊 𝟎

• Example, 4-bit sign/mag representations of ± 6:

+6 = 0110
- 6 = 1110

• Range of an N-bit sign/magnitude number:

[-(2N-1-1), 2N-1-1]

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Unsigned Binary Numbers

𝐴: {𝑎 ,𝑎 ,…𝑎 ,𝑎 }

𝐴= 𝑎2

Example:
11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1
× 20
=8 + 4 + 0 + 1
= 13

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 98

Department of EEE, BUET
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Sign/Magnitude Numbers
𝐴: {𝑎 ,𝑎 ,…𝑎 ,𝑎 }

𝐴 = (−1) 𝑎2

Example:
11012 = (-1)1 × (1 × 22 + 0 × 21 + 1 × 20)
= -1 × (4 + 0 + 1)
= -5

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 99

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Sign/Magnitude Numbers
Problems:
• Addition doesn’t work, for example -6 + 6:
1110
+ 0110
10100 (wrong!)

• Two representations of 0 (± 0):

1000
0000
EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 100
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100
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Two’s Complement Numbers

• Don’t have same problems as
sign/magnitude numbers:
– Addition works
– Single representation for 0

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 101

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Two’s Complement Numbers

• Most significant bit (msb) has value of -2N-
1

• For example, a 4-bit 2’s complement number:

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Two’s Complement Numbers

• Most significant bit (msb) has value of -2N-
1

• For example, a 4-bit 2’s complement number:

Value = -8 + 2 + 1 = -5
(We’ll show another way to find this value in a moment.)
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Two’s Complement Numbers

• msb has value of -2N-1
• Most positive 4-bit number:
• Most negative 4-bit number:
• The most significant bit still indicates the
sign (1 = negative, 0 = positive)
• Range of an N-bit two’s complement
number:

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Two’s Complement Numbers

• MSB has value of -2N-1
• Most positive 4-bit number: 0111
• Most negative 4-bit number: 1000
• The most significant bit still indicates the
sign (1 = negative, 0 = positive)
• Range of an N-bit two’s complement
number:
[-(2N-1), 2N-1-1]

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 105

Department of EEE, BUET
105

Unsigned Binary Numbers

𝐴: {𝑎 ,𝑎 ,…𝑎 ,𝑎 }

𝐴= 𝑎2

Example:
11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1
× 20
=8 + 4 + 0 + 1
= 13

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 106

Department of EEE, BUET
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106
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Two’s Complement Numbers

𝐴: {𝑎 ,𝑎 ,…𝑎 ,𝑎 }

𝐴=𝑎 −2 + 𝑎2

Example:
11012 = 1 × (-23) + [ 1 × 22 + 0 × 21 + 1 × 20 ]
= -8 + [4 + 0 + 1]
= -3

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 107

Department of EEE, BUET
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“Taking the Two’s

Complement”
• Flips the sign of a two’s complement
number.
o It makes a positive number negative.
o It makes a negative number positive.
• Method:
1. Invert the bits
2. Add 1

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 108

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“Taking the Two’s

Complement”
• Flips the sign of a two’s complement
number.
• Method:
1. Invert the bits
2. Add 1
• Example: Flip the sign of 310 = 00112
1. 1100
2. + 1
1101 = -310

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 109

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Two’s Complement Examples

Take the two’s complement of 610 = 01102

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Two’s Complement Examples

Take the two’s complement of 610 = 01102
1. 1001
2. + 1
10102 = -610

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 111

Department of EEE, BUET
111

Two’s Complement Examples

What is the decimal value of the two’s
complement number 10012?

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 112

Department of EEE, BUET
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Two’s Complement Examples

What is the decimal value of the two’s
complement number 10012?
• We know it’s negative (msb = 1)
• Figure out magnitude by flipping the sign (i.e., “taking
the two’s complement”)
1. 0110
2. + 1
01112 = 710
• So, we know it’s a negative number with magnitude 7.
• Thus, 10012 = -710
Taking the two’s complement is the second (and recommended) way
of figuring out the value of a negative two’s complement number.

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 113

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113

Two’s Complement Addition

• Add 6 + (-6) using two’s complement numbers

0110
+ 1010

• Add -2 + 3 using two’s complement numbers

1110
+ 0011

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 114

Department of EEE, BUET
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Two’s Complement Addition

• Add 6 + (-6) using two’s complement numbers
111
0110
+ 1010
10000
• Add -2 + 3 using two’s complement numbers
111
1110
+ 0011
10001
EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 115
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115

Increasing Bit Width

Extend number from N to M bits (M > N) :
– Sign-extension
– Zero-extension

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 116

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Sign-Extension
• Sign bit copied to msb’s
• Number value is same
• Example 1:
– 4-bit representation of 3 = 0011
– 8-bit sign-extended value: 00000011
• Example 2:
– 4-bit representation of -5 = 1011
– 8-bit sign-extended value: 11111011

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 117

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Zero-Extension
• Zeros copied to msb’s
• Value changes for negative numbers
• Example 1:
– 4-bit value = 0011 = 310
– 8-bit zero-extended value: 00000011 = 310
• Example 2:
– 4-bit value = 1011 = -510
– 8-bit zero-extended value: 00001011 = 1110

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 118

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Number System Comparison

Number System Range
Unsigned [0, 2N-1]
Sign/Magnitude [-(2N-1-1), 2N-1-1]
Two’s Complement [-2N-1, 2N-1-1]

For example, 4-bit representation:

-8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Unsigned 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 Two's Complement

0000
1111 1110 1101 1100 1011 1010 1001 0001 0010 0011 0100 0101 0110 0111 Sign/Magnitude
1000

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 119

Department of EEE, BUET
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Binary Coded Decimal

• The 8421 BCD Code
The 8421 code is a type of BCD (binary coded decimal) code. Binary coded
decimal means that each decimal digit, 0 through 9, is represented by a
binary code of four bits. The designation 8421 indicates the binary weights
of the four bits (23, 22, 21, 20).

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EEE 303 – Digital Electronics

Lecture-1.3
Hardware Description Language (HDL)

Dr. Sajid Muhaimin Choudhury

Dept of EEE, BUET

Dr. Sajid Muhaimin Choudhury, Assistant Professor

Department of Electrical and Electronics Engineering
Bangladesh University of Engineering and Technology
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Weekly Lecture Plan

Week Topic Textbook
Introduction to Number Systems and codes. Introduction to Boolean Harris 1.4, 5.3,
1
algebra, Introduction to VerilogHDL 1.5
Analysis and synthesis of digital logic circuits: Basic logic function,
2-3 combinational logic design, Universal logic gates, Minimization of Harris 2.1-2.9
combinational logic, k-map
Programming and structural and behavioral design of digital systems
4 using VerilogHDL, Verilog Timing analysis and test bench. Verilog Harris 4
synthesis with combinational logic
Harris 5.2-
5 ALU design (Adder, Subtractor, Comparator)
Floyd 6.1-6.3
Winter Vacation
6 Decoder, encoder, Multiplexer, demultiplexer Floyd 6.4-6.9
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Digital Circuit Design Process

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Overview
 A Hardware Description Language (HDL) is a language used to describe a
digital system, for example, a computer or a component of a computer.
 A digital system can be described at several levels:
 Switch level: wires, resistors and transistors
 Gate level: logical gates and flip flops
 Register Transfer Level (RTL): registers and the transfers of information
between registers.

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 125

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Hardware Description Language

• Describes structure and behavior of electronic circuits
• allows for the automated analysis and simulation of an
electronic circuit.
• allows for the synthesis of an HDL description into
a netlist (a specification of physical electronic components
and how they are connected together)
• Two most popular HDL are Verilog and VHDL

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Verilog vs. VHDL

VHDL
 “V” is short for Very High Speed Integrated Circuits.
 Designed for and sponsored by US Department of Defense.
 Designed by committee (1981-1985).
 Syntax based on Ada programming language.
 Was made an IEEE Standard in 1987.

Verilog
 Was introduced in 1985 by Gateway Design System Corporation, now a part of
Cadence Design Systems, Inc.'s Systems Division.
 Was made an IEEE Standard in 1995
 Syntax based on C programming language.
 Design examples using Verilog HDL
◦ Intel Pentium, AMD K5, K6, Atheon, ARM7, etc
◦ Thousands of ASIC designs using Verilog HDL

EEE 303 – Digital Electronics Dr. Sajid Muhaimin Choudhury 127

Department of12/20/2015
EEE, BUET VERILOG OVERVIEW 12
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Design Methodology

EEE 303 – Digital Electronics Sajid Muhaimin Choudhury 128

Dr.128
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Verilog HDL Models

 HDL model specifies the relationship between input signals and
output signals.
 In Verilog, A “module” contains the hardware description of the
circuit.
 Verilog code for a AND gate
Module definition
Ports definition
Module Structure

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Numbers
 Numbers are specified using the following form
<size><base format><number>

size of the number in bits. ’b (binary)

’d (decimal)
’o(octal)
’h(hex).

 Examples:
◦ x = 347 // decimal number
◦ x = 4'b101 // 4- bit binary number 0101
◦ x = 16'h87f7 // 16-bit hex number h87f7
◦ x = 2'b101010
◦ x = 2'd83

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operators
 Bitwise Operators
~ NOT
& AND
| OR
^ XOR
~| NOR
~& NAND
^~ or ~^ XNOR
 Logical & Relational Operators
!, &&, | |, ==, !=, >=, <=, >, <

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Ports
 There are three different port types: U1
• Input A(7:0) A(7:0) B(7:0) B(7:0)
• Output
• Inout C C

 Port definition:
• <port type> <portwidth> <port name> my_module

• Example:

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Data Types: Variables

 Two basic families of data types for variables: Nets and Registers
 Net variables – e.g. wire W (7:0)
• Memory less A(7:0)
• Variable used simply to connect components together
• Usually corresponds to a wire in the circuit. U1
 Register variables – e.g. reg A
A D
D

• Variable used to store data as part of a

behavioral description
• Like variables in ordinary procedural languages CLK
CLK

 Note: Fub1
• reg should only be used with always and initial blocks (to be presented …)
• The reg variables store the last value that was procedurally assigned to them whereas
the wire variables represent physical connections between structural entities such as
gates.

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Continuous Assignment
 Continuous statement is used to model combinational logic.
 A continuous assignment statement is declared as follows:
assign <net_name> = variable;
 assign corresponds to a connection.
 Target is never a reg variable.
 Examples:

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Continuous Assignment
 Verilog code for a 4 bit adder:

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Procedural Assignment
 Used for modeling sequential circuits.
 A procedural assignment statement is declared as follows:
Always @(event list) begin
<reg_name> <= variable;
end
 The assignment will be performed whenever one of the events in “event_list”
occurs.

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Procedural Assignment
 Example: D-FF

D Out

clk

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Interconnecting Modules
 In order to use a module, it should be
instantiated:
<Module_name> <Instant_name> (<port mapping>)

 Example: using two mux2 to build a mux4

(actually this is not an mux4-1 !!!)
mux2_i1
In4(3:2) In(1 :0) Out
w[1]
sel4[1] sel

In4(3:0) mux2 w(1:0)

In4(3:0) Out4(1:0)
sel4(1:0)
sel4(1:0) mux2_i2
In4(1:0) In(1 :0) Out
w[0]
sel4[0] sel

mux2

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Primitives
 No declaration required (predefined)
 Can only be instantiated
 Example: and a1 (C, A, B); //instance name
• Usually better to provide instance name for debugging.
 Example: or o1 (SET, ~A, C ),
o2(N, ABC,SET );
 Example: and #(10) a2(o, i1, i2); // name + delay

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Test Bench

• module < test module name> ;

• // Data type declaration
• // Instantiate module ( call the module that is going to be tested)
• // Apply the stimulus
endmodule
• // Display results
 Usefull commands:
DUT
• initial
Tester (Design
• #delay
Under Test)
• forever

Test bench

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Verilog Compiler Suite

• Proprietary: • free with limitation

• Device support
• Vendor locking

• Open Source: • Free to use

(commercially and
university wide)
• Community support
• No Vendor locking
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Verilog Code to output 2’s complement of a Number

• Input – 4 bit number

• Output – 4 bit number

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Verilog Code - 1

module twoscomplement(d, q);

input [3:0] d;
output [3:0] q;
wire [3:0] d;
assign q = ~d + 4'b0001;

endmodule
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Verilog Code - 1

module twoscomplement(d, q);

input [3:0] d;
output [3:0] q;
wire [3:0] d;
assign q = ~d + 4'b0001;

endmodule
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Verilog Code - 1

module twoscomplement(d, q);

input [3:0] d;
output [3:0] q;
wire [3:0] d;
assign q = ~d + 4'b0001;

endmodule
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Verilog Code - 1

module twoscomplement(d, q);

input [3:0] d;
output [3:0] q;
wire [3:0] d;
assign q = ~d + 4'b0001;

endmodule
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Verilog Code - 1

module twoscomplement(d, q);

input [3:0] d;
output [3:0] q;
wire [3:0] d;
assign q = ~d + 4'b0001;

endmodule
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Verilog Code - 1

module twoscomplement(d, q);

input [3:0] d;
output [3:0] q;
No storage – continuously pass value
wire [3:0] d;
assign q = ~d + 4'b0001;

endmodule
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Verilog Code - 1

module twoscomplement(d, q);

input [3:0] d;
output [3:0] q;
wire [3:0] d;
assign q = ~d + 4'b0001;
Complement Add 1

endmodule
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Intel Quartus

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• Install the Intel Quartus Prime Lite edition from

the website:
https://fpgasoftware.intel.com/?edition=lite
• Version I am using here is 8.1 (Please use the
version that is shown in your lab sheet)

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New Project Wizard

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Select Device Flex 10K

EPF10K10TC144-3

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Tools

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Save the file and click “Start Compilation”

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On the left side, you can see the compilation progress

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After compilation, click File>New and select “VWF” file

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The VWF editor will open

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Click Edit>Grid Size, set Period to 1us

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Click Edit>Set End Time, set End Time to 16us

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Right Click on the “Name” region and select

“Insert Node or Bus”

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Click List, select d and press >, again select q and

press >

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Click and select d, and right click on the

waveform. Click “Value”>”Count Value”

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Set Count every 1us, and click okay

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Input of the circuit is created. Now click on Run

Functional Simulation

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j jnn jnhjnv00f
Simulation result is shown. The code converts
input into 2’s complement

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Icarus Verilog

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Icarus Verilog

• Open Source Verilog Compilation Tool

• Freely available online to quickly check Verilog output

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EDA Playground

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Icarus Verilog

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Verilog Test Bench Code

module test;
/* Make a reset that pulses once. */
reg [3:0]d = 4'b0000;
wire [3:0] q;
always #10 d = d + 4'b0001;
twoscomplement m1 (d,q);
initial begin
$dumpfile("test.vcd");
$dumpvars(0,test);
# 0 d = 4'b0000;
# 160 $finish;
end
initial
$monitor("At time %t, d =%b q= %b", $time, d,q);
endmodule // test

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Output

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