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8086 - Architecture

Pin Details of 8086

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Bus Interface Unit (BIU)

Functions of BIU are to:

 Fetch the instruction or data from memory
 Write the data to memory
 Write the data to the port
 Read data from the port

Instruction Queue
 To increase the execution speed, BIU fetches as
many as six instruction bytes ahead to time from
memory
 All six bytes are then held in first in first out 6 byte
register called instruction queue
 Then all bytes have to be given to EU one by one
 This pre fetching operation of BIU may be in parallel
with execution operation of EU, which improves the
speed execution of the instruction

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Execution Unit (EU)

Functions of execution unit are:

 To tell BIU where to fetch the
instructions or data from
 To decode the instructions
 To execute the instructions

Execution Unit (EU)

 The EU contains the control circuitry to

perform various internal operations
 A decoder in EU decodes the instruction
fetched memory to generate different internal
or external control signals required to perform
the operation
 EU has 16-bit ALU, which can perform
arithmetic and logical operations on 8-bit as
well as 16-bit

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General Purpose Registers of 8086

General Purpose Registers of 8086

 These registers can be used as 8-bit registers
individually or can be used as 16-bit in pair to
have AX, BX, CX, and DX
 AX Register: AX register is also known as accumulator
register that stores operands for arithmetic operation like
divided, rotate
 BX Register: This register is mainly used as a base
register. It holds the starting base location of a memory
region within a data segment
 CX Register: It is defined as a counter. It is primarily used in
loop instruction to store loop counter
 DX Register: DX register is used to contain I/O port address
for I/O instruction

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Instruction Pointer (IP)

 In the BIU, the next register, below the
segment register is instruction pointer
 The instruction pointer (IP) holds the 16-bit
address of the next code byte within this code
segment

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Flag Register
 A 16-bit flag register is a flip-flop which indicates
some condition produced by the execution of an
instruction or controls certain operations of the EU
 They are modified automatically by CPU after
mathematical operations
 It has 9 flags and they are divided into two
categories:
Conditional Flags
Control Flags

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Conditional Flags
 Conditional flags represent result of last
arithmetic or logical instruction executed
 Conditional flags are as follows:
 Carry Flag (CF)
 Auxiliary Flag (AF)
 Parity Flag (PF)
 Zero Flag (ZF)
 Sign Flag (SF)
 Overflow Flag (OF)

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Control Flags
 Control flags are set or reset deliberately to
control the operations of the execution unit
 Control flags are as follows:
 Trap Flag (TF)
 Interrupt Flag (IF)
 Direction Flag (DF)

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Auxiliary Carry Flag

Flag Register Architecture

This is set, if there is a carry from the
lowest nibble, i.e, bit three during
Carry Flag

This flag is set, when there is

a carry out of MSB in case of
addition, or borrow for the lowest
nibble, i.e, bit three, during addition or a borrow in case
subtraction. of subtraction.

Sign Flag Zero Flag Parity Flag

This flag is set, when the This flag is set, if the result of This flag is set to 1, if the lower
result of any computation the computation or comparison byte of the result contains even
is negative performed by an instruction is number of 1’s ; for odd number
zero of 1’s set to zero.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

OF DF IF TF SF ZF AF PF CF

Trap Flag
Over flow Flag If this flag is set, the processor
This flag is set, if an overflow occurs, i.e, if the result of a signed enters the single step execution
operation is large enough to accommodate in a destination
mode by generating internal
register. The result is of more than 7-bits in size in case of 8-bit
signed operation and more than 15-bits in size in case of 16-bit interrupts after the execution of
sign operations, then the overflow will be set. each instruction
Direction Flag Interrupt Flag
This is used by string manipulation instructions. If this flag bit
is ‘0’, the string is processed beginning from the lowest Causes the 8086 to recognize
address to the highest address, i.e., auto incrementing mode. external mask interrupts; clearing IF
Otherwise, the string is processed from the highest address disables these interrupts.
towards the lowest address, i.e., auto incrementing mode. 13

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Trap Flag
 Used for on-chip debugging
 Setting trap flag puts the microprocessor into single
step mode for debugging
 In single stepping, the microprocessor executes a
instruction and enters into single step ISR
 If trap flag is set (1), the CPU automatically generates an
internal interrupt after each instruction, allowing a program to
be inspected as it executes instruction by instruction
 If trap flag is reset (0), no function is performed

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Interrupt Flag

If interrupt flag is set (1), the

microprocessor will recognize interrupt
requests from the peripherals
If interrupt flag is reset (0), the
microprocessor will not recognize any
interrupt requests and will ignore them

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Directional Flag
 This flag is specifically used in string
instructions
 If directional flag is set (1), then access the
string data from higher memory location
towards lower memory location
 If directional flag is reset (0), then access the
string data from lower memory location
towards higher memory location

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