Acer TravelMate 7230 - 7530 Quanta ZY7 Rev1A Schematic

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5 4 3 2 1

ZY7 SYSTEM BLOCK DIAGRAM


CPU CORE ISL6265A
PAGE 29
D D

NB CORE (RT8202) DDRII-SODIMM1 DDRII 667/800 MHz Lion CPU THERMAL CPU Fan
PAGE XX PAGE 7 AMD Griffin Sabie SENSOR
S1G2 Processor PAGE 5 14.318MHz

DDR II SMDDR_VTERM
DDRII-SODIMM2 DDRII 667/800 MHz 638P (uPGA)/35W
1.8VSUS(TPS51116REGR) PAGE 7 PAGE 3,4,5,6 CPU_CLK
PAGE 31
LVDS LVDS NBGFX_CLK CLOCK GEN
PAGE 18 NBGPP_CLK ICS9LPRS476AKLFT-->HP
SYSTEM POWER
HT3 SBLINK_CLK SLG8SP626VTR-->HP
ISL6237 LINK
RTM880N-795 -->HP
PAGE 28 PAGE 2

SYSTEM CHARGER MXM PCI-E


CRT
(ISL6251A)
PAGE 27
SWITCH Connector NORTH BRIDGE PCIE2 / 3
X2
PCIE1
X1
PCIE4
X1
PCIE5
X1
HDMI PCI-Express 16X
PAGE 17 RX780 / RS780M Mini PCI-E Express LAN JMB385 4 IN 1
CARD READER
21mm X 21mm, 528pin BGA Card Card PCIE-LAN RJ45
Wireless /TV
Internal LVDS (NEW CARD) BCM5764M PAGE 21
C
DVI-D HDMI selector (10/100/GagaLAN)
C

CRT
PAGE 26 PAGE 18
Resistor HDMI PAGE 19 PAGE 19 PAGE 21 PAGE 24
PAGE 8,9,10,11
PAGE 17
CRT CRT
PAGE 26 PAGE 18 PCIE X4 SBSRC_CLK

1,11 5
AUDIO SATA - HDD
M/B USB2.0
PAGE 26
PAGE 20 SATA0 3,4 6 2 10 7
8,0
LAN SOUTH BRIDGE
USB2.0 Ports Bluetooth PC-cam Fingerprint USB Docking
PAGE 26
SATA - HDD SB700 x4 PAGE 19 x1 PAGE 19 x1 PAGE 18 x1 PAGE 19 x1 PAGE 19
PAGE 20 SATA1
USB 21mm X 21mm, 528pin BGA
PCI BUS / 33MHz O2 OZ601 PCMCIA
PAGE 26 4.5W(Ext) CARD BUS
PAGE 23
4.3W(Int) PAGE 23
ODD(SATA)
DOCKING PAGE 20 SATA4 PAGE 12,13,14,15,16 Azalia
PCI ROUTING
TABLE IDSEL INTERUPT DEVICE
B REQ0# / GNT0# AD20 INTF# OZ601 B
LPC Azalia AudioController MDC 1.5
RealTek ALC268
PAGE 22
PAGE 22
Keyboard
PAGE 25 KBC
(WPCE775)

Audio
Int MIC
Amplifier
PCB STACK UP PAGE 25

LAYER 1 : TOP
LAYER 2 : SGND Speaker SPIDF/Phone Line in MIC Jack
Jack
LAYER 3 : IN1 Touch SPI
Pad ROM
LAYER 4 : IN2 PAGE 20 PAGE 25
LAYER 5 : SVCC

A LAYER 6 : BOT A

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
1A
Block Diagram
Date: Thursday, June 26, 2008 Sheet 1 of 35
5 4 3 2 1
5 4 3 2 1

CLK_GEN_SLG8SP628
+3V +3V_CLK_VDD +1.2V +1.2V_CLK_VDDIO
L39 L42

BK1608HS600 BK1608HS600
C365 C373 C364 C394 C409 C390 C402 C381 C405 C378 C406 C408 C374 C389
C399 C407
D 22U-10V_8 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 22U-10V_8 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 D

Change C1000/C1008 from 10u to 22u.-1001

ICS9LPRS480 P/N : Clock chip has internal serial terminations


for differencial pairs, external resistors are
SLG8SP628 P/N : AL8SP628000 reserved for debug purpose.

RTM880N-796 P/N : AL000880000


Place within 0.5" CHECK
of CLKGEN R255
U14

*261/F_4
4 50 CPUCLKP_R RP25 1 2 0X2 CPU_CLKP
+3V_CLK_VDD VDDDOT CPUK8_0T CPU_CLKP 5
16 49 CPUCLKN_R 3 4 CPU_CLKN To CPU
VDDSRC CPUK8_0C CPU_CLKN 5
26 VDDATIG
35 VDDSB_SRC
40 30 NBGFX_CLKP_R RP35 1 2 0X2
VDDSATA ATIG0T NBGFX_CLKP 10
48 29 NBGFX_CLKN_R 3 4 To NB
+3V +3V_CLK_48 VDDCPU ATIG0C NBGFX_CLKN 10
55 28 CLK_PCIE_MXM_R RP34 1 2 *EV^0X2
VDDHTT ATIG1T CLK_PCIE_MXM 17
L38 56 27 CLK_PCIE_MXM#_R 3 4 To MXM Card
VDDREF ATIG1C CLK_PCIE_MXM# 17
63 VDD48
BK1608HS600 External VGA Card only
1

C 37 SBLINK_CLKP_R RP30 1 2 0X2 C


SB_SRC0T SBLINK_CLKP 10
C363 11 36 SBLINK_CLKN_R 3 4 To NB
+1.2V_CLK_VDDIO VDDSRC_IO0 SB_SRC0C SBLINK_CLKN 10
2.2U/6.3V/06 17 32 SBSRC_CLKP_R RP36 1 2 0X2 SBSRC_CLKP 12
2

VDDSRC_IO1 SB_SRC1T SBSRC_CLKN_R To SB


25 VDDATIG_IO SB_SRC1C 31 3 4 SBSRC_CLKN 12
34 VDDSB_SRC_IO
47 VDDCPU_IO
C367 22 NBGPP_CLKP_R RP33 1 2 *EV^0X2
SRC0T NBGPP_CLKP 10
CG_XIN 21 NBGPP_CLKN_R 3 4
SRC0C NBGPP_CLKN 10
1 20 CLK_PCIE_NEW_R RP32 1 2 0X2
GND48 SRC1T CLK_PCIE_NEW 19
2

20p/50V_4 7 19 CLK_PCIE_NEW#_R 3 4 To New Card


GNDDOT SRC1C CLK_PCIE_NEW# 19
Y3 10 15 CLK_PCIE_MINI_R RP31 1 2 0X2
GNDSRC0 SRC2T CLK_PCIE_MINI 19
14.318MHZ 18 14 CLK_PCIE_MINI#_R 3 4 To Mini PCIE Slot
GNDSRC1 SRC2C CLK_PCIE_MINI# 19
C366 CLK_PCIE_TV_R RP29 0X2
24 QFN64 13 1 2 CLK_PCIE_TV 19
1

CG_XOUT GNDATIG SRC3T CLK_PCIE_TV#_R To TV PCIE Slot


33 GNDSB_SRC SRC3C 12 3 4 CLK_PCIE_TV# 19
43 9 CLK_PCIE_LAN_R RP27 1 2 0X2
GNDSATA SRC4T CLK_PCIE_LAN 21
20p/50V_4 46 8 CLK_PCIE_LAN#_R 3 4 To LAN Controller
GNDCPU SRC4C CLK_PCIE_LAN# 21
52 GNDHTT
60
Follow CLK 14.318 Check 20p 11/19 GNDREF
SRC6T/SATAT
SRC6C/SATAC
42
41
CLK_PCIE_CR_R
CLK_PCIE_CR#_R
RP28 1
3
2 0X2
4
CLK_PCIE_CR 24
CLK_PCIE_CR# 24
To Card Reader Controller
CG_XIN 61 6 T82
+3V_CLK_VDD CG_XOUT X1 SRC7T/27M_SS
62 X2 SRC7C/27M_NS 5 T81
R272 8.2K_4 NEW_CLKREQ#
R286 8.2K_4 LAN_CLKREQ# CGCLK_SMB 2 54 NBHT_REFCLKP_R RP26 1 2 0X2
SMBCLK HTT0T/66M NBHT_REFCLKP 10
R264 8.2K_4 CLK_PD# CGDAT_SMB 3 53 NBHT_REFCLKN_R 3 4 To NB
SMBDAT HTT0C/66M NBHT_REFCLKN 10
R277 8.2K_4 MINI_CLKREQ# CLK_48M_USB_R C372 *10p_4
R283 8.2K_4 TV_CLKREQ#
CLK_PD# 51 64 CLK_48M_USB_R R268 33_4 To SB SEL_27 C350 22P/50V_4
PD# 48MHz_0 CLK_48M_USB 13

T87 23 59 SEL_HTT66
B CLKREQ0# REF0/SEL_HTT66 SEL_SATA B
13,19 NEW_CLKREQ# 45 CLKREQ1# REF1/SEL_SATA 58 REV B:Change to Stuff 22PF for
New Card CLKREQ# 44 57 SEL_27 R265 158/F_4 To NB
19 MINI_CLKREQ# CLKREQ2# REF2/SEL_27 EXT_NB_OSC 10 EMI request --0215
39 R250 90.9/F_4
19 TV_CLKREQ# CLKREQ3#
21 LAN_CLKREQ# 38 CLKREQ4#
NB CLOCK INPUT TABLE
TGND0
TGND1
TGND2
TGND3
TGND4
TGND5
TGND6
TGND7
TGND8
TGND9

R1004/R1005 (value may change) NB CLOCKS RX780 RS780

SLG8SP628 NB_OSC HT_REFCLKP 100M DIFF 100M DIFF


65
66
67
68
69
70
71
72
73
74

RES CHIP 82.5 1/16W +-1%(0402) --> CS08252FB11 HT_REFCLKN 100M DIFF 100M DIFF
RX780 1.8V 82.5R/130R RES CHIP 130 1/16W +-1%(0402)L-F --> CS11302FB15
REFCLK_P 14M SE (1.8V) 14M SE (1.1V)
RES CHIP 158 1/16W +-1%(0402) --> CS11582FB00
RS780 1.1V 158R/90.9R RES CHIP 90.9 1/16W +-1%(0402) --> CS09092FB15 REFCLK_N NC vref
+3V
GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*
Clock Gen I2C GPP_REFCLK 100M DIFF NC or 100M DIFF OUTPUT

+3V_CLK_VDD GPPSB_REFCLK 100M DIFF 100M DIFF


Q26 R275
RHU002N06
2

10K_4

PDAT_SMB 3 1 CGDAT_SMB
7,13,18,19 PDAT_SMB
1 66 MHz 3.3V single ended HTT clock
R260 SEL_HTT66
*8.2K_4 0* 100 MHz differential HTT clock
+3V
SEL_SATA 1* 100 MHz non-spreading differential SRC clock
A Check Chipset Power Domain SEL_HTT66 SEL_SATA A
SEL_27 0 100 MHz spreading differential SRC clock

R274 1 27MHz and 27M SS outputs


Q25 R259 R258 R249 SEL_27
RHU002N06 10K_4 8.2K_4 8.2K_4 8.2K_4 0* 100 MHz SRC clock
2

* default
7,13,18,19 PCLK_SMB
PCLK_SMB 3 1 CGCLK_SMB Quanta Computer Inc.
PROJECT : ZY7
Size Document Number Rev
1A
CLOCK GENERATOR_SLG8SP628
Date: Thursday, June 26, 2008 Sheet 2 of 35
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

HOLE14 HOLE5 HOLE2 HOLE23


*H-C295D118P2 *H-C295D118P2 *H-C295D118P2 *H-C295D118P2
2 5 2 5 2 5
3 6 3 6 3 6
HOLE27 HOLE28 HOLE36 HOLE37 4 7 4 7 4 7
HT_RXD#[15..0] HT_TXD[15..0] *MINI_HOLE MINI_HOLE MINI_HOLE MINI_HOLE
8 HT_RXD#[15..0] 8 HT_TXD[15..0]

8
1
9

8
1
9

8
1
9

1
HT_RXD[15..0] HT_TXD#[15..0]
8 HT_RXD[15..0] 8 HT_TXD#[15..0]

D D
HOLE4 HOLE35 HOLE25 HOLE24
PROCESSOR HYPERTRANSPORT INTERFACE

1
*H-C295D118P2 *H-C295D118P2 *H-C295D118P2 *H-C295D118P2
2 5 2 5 2 5 2 5
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER 3 6 3 6 3 6 3 6
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED HOLE9 HOLE10 HOLE19 HOLE20 4 7 4 7 4 7 4 7
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE CPU_HOLE CPU_HOLE CPU_HOLE CPU_HOLE

8
1
9

8
1
9

8
1
9

8
1
9
ADOGND

VLDT_RUN HOLE32 HOLE34 HOLE33 HOLE1

1
*H-C295D118P2 *H-C295D118P2 *H-C295D118P2 *H-C295D118P2
2 5 2 5 2 5 2 5
3 6 3 6 3 6 3 6
U25A HOLE8 HOLE17 HOLE16 HOLE7 4 7 4 7 4 7 4 7
MXM_HOLE MXM_HOLE MXM_HOLE MXM_HOLE
C519
D1 HT LINK AE2

8
1
9

8
1
9

8
1
9

8
1
9
VLDT_A0 VLDT_B0
D2 VLDT_A1 VLDT_B1 AE3
D3 VLDT_A2 VLDT_B2 AE4
D4 AE5 4.7u/6.3V_6 HOLE3
VLDT_A3 VLDT_B3 HOLE15 *H-C295D118P2
HT_RXD0 E3 AD1 HT_TXD0 HOLE39 HOLE38 *NONP_HOLE1 2 5

1
C L0_CADIN_H0 L0_CADOUT_H0 C
HT_RXD#0 E2 AC1 HT_TXD#0 *FAN_HOLEFAN_HOLE 3 6
HT_RXD1 L0_CADIN_L0 L0_CADOUT_L0 HT_TXD1
E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 4 7
HT_RXD#1 F1 AC3 HT_TXD#1
HT_RXD2 L0_CADIN_L1 L0_CADOUT_L1 HT_TXD2
G3 AB1

8
1
9
HT_RXD#2 L0_CADIN_H2 L0_CADOUT_H2 HT_TXD#2 HOLE6 HOLE21 HOLE11 HOLE13
G2 AA1

1
HT_RXD3 L0_CADIN_L2 L0_CADOUT_L2 HT_TXD3 *EV^MXM1_HOLE *EV^MXM1_HOLE MDC_HOLE MDC_HOLE
G1 L0_CADIN_H3 L0_CADOUT_H3 AA2
HT_RXD#3 H1 AA3 HT_TXD#3

1
HT_RXD4 L0_CADIN_L3 L0_CADOUT_L3 HT_TXD4
J1 L0_CADIN_H4 L0_CADOUT_H4 W2
HT_RXD#4 K1 W3 HT_TXD#4
HT_RXD5 L0_CADIN_L4 L0_CADOUT_L4 HT_TXD5
L3 L0_CADIN_H5 L0_CADOUT_H5 V1 REV B: Add Hole39 for ME request---0215
HT_RXD#5 L2 U1 HT_TXD#5
HT_RXD6 L0_CADIN_L5 L0_CADOUT_L5 HT_TXD6
L1 U2

1
HT_RXD#6 L0_CADIN_H6 L0_CADOUT_H6 HT_TXD#6 HOLE26 HOLE30 HOLE31 HOLE29 HOLE22 HOLE18
M1 L0_CADIN_L6 L0_CADOUT_L6 U3
HT_RXD7 N3 T1 HT_TXD7 ODD1_HOLE ODD1_HOLE HDD1_HOLE HDD1_HOLE HDD2_HOLE HDD2_HOLE
HT_RXD#7 L0_CADIN_H7 L0_CADOUT_H7 HT_TXD#7
N2 L0_CADIN_L7 L0_CADOUT_L7 R1
HT_RXD8 E5 AD4 HT_TXD8
HT_RXD#8 L0_CADIN_H8 L0_CADOUT_H8 HT_TXD#8
F5 L0_CADIN_L8 L0_CADOUT_L8 AD3
HT_RXD9 F3 AD5 HT_TXD9
HT_RXD#9 L0_CADIN_H9 L0_CADOUT_H9 HT_TXD#9 PAD2 PAD3 PAD1
F4 L0_CADIN_L9 L0_CADOUT_L9 AC5
HT_RXD10 G5 AB4 HT_TXD10

1
HT_RXD#10 L0_CADIN_H10 L0_CADOUT_H10 HT_TXD#10 EMIPAD EMIPAD *EMIPAD
H5 L0_CADIN_L10 L0_CADOUT_L10 AB3
HT_RXD11 H3 AB5 HT_TXD11
HT_RXD#11 L0_CADIN_H11 L0_CADOUT_H11 HT_TXD#11
H4 L0_CADIN_L11 L0_CADOUT_L11 AA5
B HT_RXD12 K3 Y5 HT_TXD12 B

1
HT_RXD#12 L0_CADIN_H12 L0_CADOUT_H12 HT_TXD#12 +1.2V VLDT_RUN
K4 L0_CADIN_L12 L0_CADOUT_L12 W5
HT_RXD13 L5 V4 HT_TXD13 Note:on MCP77,(HT=+1.1V) and CPU(HT=+1.2V)
HT_RXD#13 L0_CADIN_H13 L0_CADOUT_H13 HT_TXD#13 L50
M5 L0_CADIN_L13 L0_CADOUT_L13 V3 and therefore cannot be connected to the
HT_RXD14 M3 V5 HT_TXD14 same HT power rail.
HT_RXD#14 L0_CADIN_H14 L0_CADOUT_H14 HT_TXD#14 FBJ3216HS800_1206
M4 L0_CADIN_L14 L0_CADOUT_L14 U5
HT_RXD15 N5 T4 HT_TXD15
HT_RXD#15 L0_CADIN_H15 L0_CADOUT_H15 HT_TXD#15 L54
P5 L0_CADIN_L15 L0_CADOUT_L15 T3

J3 Y1 FBJ3216HS800_1206
8 HT_CPU_UPCLK0 L0_CLKIN_H0 L0_CLKOUT_H0 HT_CPU_DWNCLK0 8
8 HT_CPU_UPCLK#0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 HT_CPU_DWNCLK#0 8
J5 Y4 SPAD1 80 ohm(4A) C555 C560 C569 C527 C522 C565
8 HT_CPU_UPCLK1 L0_CLKIN_H1 L0_CLKOUT_H1 HT_CPU_DWNCLK1 8
K5 Y3 4.7u/6.3V_6 4.7u/6.3V_6 .22U_4 .22U_4 180P_4 180P_4
8 HT_CPU_UPCLK#1 L0_CLKIN_L1 L0_CLKOUT_L1 HT_CPU_DWNCLK#1 8
*SPAD
8 HT_CPU_UPCTL0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CPU_DWNCTL0 8
8 HT_CPU_UPCTL#0 P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CPU_DWNCTL#0 8
8 HT_CPU_UPCTL1 P3 T5 HT_CPU_DWNCTL1 8

1
L0_CTLIN_H1 L0_CTLOUT_H1
8 HT_CPU_UPCTL#1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 HT_CPU_DWNCTL#1 8 LAYOUT: Place bypass cap on topside of board
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
Athlon 64 S1g2 SOCKET_638_PIN TO OTHER HT POWER PINS
Athlon 64 S1g2 PLACE CLOSE TO VLDT0 POWER PINS
NO STUB
A R135 R133 Processor Socket A
for HT3 *51_4 *51_4 SOCKET_638_PIN
Quanta Computer Inc.
VLDT_RUN
PROJECT : ZY7
Size Document Number Rev
1A
AMD Griffin HT I/F
Date: Thursday, June 26, 2008 Sheet 3 of 35
5 4 3 2 1
A B C D E

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER


SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
Processor DDR2 Memory Interface
U25C
+SMDDR_VTERM +SMDDR_VTERM MEM:DATA
7 M_B_DQ[0..63] M_A_DQ[0..63] 7
M_B_DQ0 C11 G12 M_A_DQ0
U25B M_B_DQ1 MB_DATA0 MA_DATA0 M_A_DQ1
PLACE THEM CLOSE TO A11 MB_DATA1 MA_DATA1 F12
M_B_DQ2 A14 H14 M_A_DQ2
4 CPU WITHIN 1" +1.8VSUS M_B_DQ3 MB_DATA2 MA_DATA2 M_A_DQ3 4
D10 VTT1 W10 B14 G14
C10 MEM:CMD/CTRL/CLK VTT5 AC10 M_B_DQ4 G11
MB_DATA3 MA_DATA3
H11 M_A_DQ4
VTT2 VTT6 M_B_DQ5 MB_DATA4 MA_DATA4 M_A_DQ5
B10 VTT3 VTT7 AB10 E11 MB_DATA5 MA_DATA5 H12
AD10 AA10 M_B_DQ6 D12 C13 M_A_DQ6
R367 39.2/F_4 VTT4 VTT8 R100 M_B_DQ7 MB_DATA6 MA_DATA6 M_A_DQ7
VTT9 A10 A13 MB_DATA7 MA_DATA7 E13
1 2 M_ZP AF10 M_B_DQ8 A15 H15 M_A_DQ8
M_ZN MEMZP CPU_VTT_SENSE 1K/F_4 M_B_DQ9 MB_DATA8 MA_DATA8 M_A_DQ9
+1.8VSUS 2 1 AE10 MEMZN VTT_SENSE Y10 CPU_VTT_SENSE 31 A16 MB_DATA9 MA_DATA9 E15
R368 39.2/F_4 M_B_DQ10 A19 E17 M_A_DQ10
MEM_MA_RESET# H16 CPU_M_VREF M_B_DQ11 MB_DATA10 MA_DATA10 M_A_DQ11
T27 RSVD_M1 MEMVREF W17 A20 MB_DATA11 MA_DATA11 H17
M_B_DQ12 C14 E14 M_A_DQ12
M_B_DQ13 MB_DATA12 MA_DATA12 M_A_DQ13
7 M_A_ODT0 T19 MA0_ODT0 RSVD_M2 B18 D14 MB_DATA13 MA_DATA13 F14
V22 C159 C89 R101 M_B_DQ14 C18 C17 M_A_DQ14
7 M_A_ODT1 MA0_ODT1 MB_DATA14 MA_DATA14
M_A1_ODT0 U21 W26 M_B_DQ15 D18 G17 M_A_DQ15
T13 MA1_ODT0 MB0_ODT0 M_B_ODT0 7 MB_DATA15 MA_DATA15
M_A1_ODT1 V19 W23 .1u/10V_4 1000p_4 1K/F_4 M_B_DQ16 D20 G18 M_A_DQ16
T10 MA1_ODT1 MB0_ODT1 M_B_ODT1 7 MB_DATA16 MA_DATA16
Y26 M_B1_ODT0 M_B_DQ17 A21 C19 M_A_DQ17
MB1_ODT0 T8 MB_DATA17 MA_DATA17
T20 M_B_DQ18 D24 D22 M_A_DQ18
7 M_A_CS#0 MA0_CS_L0 MB_DATA18 MA_DATA18
U19 V26 M_B_DQ19 C25 E20 M_A_DQ19
7 M_A_CS#1 MA0_CS_L1 MB0_CS_L0 M_B_CS#0 7 MB_DATA19 MA_DATA19
M_A1_CS#0 U20 W25 M_B_DQ20 B20 E18 M_A_DQ20
T9 MA1_CS_L0 MB0_CS_L1 M_B_CS#1 7 MB_DATA20 MA_DATA20
M_A1_CS#1 V20 U22 M_B1_CS#0 M_B_DQ21 C20 F18 M_A_DQ21
T11 MA1_CS_L1 MB1_CS_L0 T12 MB_DATA21 MA_DATA21
M_B_DQ22 B24 B22 M_A_DQ22
M_B_DQ23 MB_DATA22 MA_DATA22 M_A_DQ23
7 M_A_CKE0 J22 MA_CKE0 MB_CKE0 J25 M_B_CKE0 7 C24 MB_DATA23 MA_DATA23 C23
J20 H26 M_B_DQ24 E23 F20 M_A_DQ24
7 M_A_CKE1 MA_CKE1 MB_CKE1 M_B_CKE1 7 MB_DATA24 MA_DATA24
M_B_DQ25 E24 F22 M_A_DQ25
M_B_DQ26 MB_DATA25 MA_DATA25 M_A_DQ26
N19 P22 G25 H24

To reverse SODIMM socket


T22 MA_CLK_H5 MB_CLK_H5 T17 MB_DATA26 MA_DATA26
N20 R22 DEL T6,7,8,10.--0930 M_B_DQ27 G26 J19 M_A_DQ27
T20 MA_CLK_L5 MB_CLK_L5 T18 MB_DATA27 MA_DATA27
E16 A17 M_B_DQ28 C26 E21 M_A_DQ28
7 M_A_CLKOUT1 MA_CLK_H1 MB_CLK_H1 M_B_CLKOUT1 7 MB_DATA28 MA_DATA28
F16 A18 M_B_DQ29 D26 E22 M_A_DQ29
7 M_A_CLKOUT1# MA_CLK_L1 MB_CLK_L1 M_B_CLKOUT1# 7 MB_DATA29 MA_DATA29
M_B_DQ30 M_A_DQ30

To normal SODIMM socket


7 M_A_CLKOUT7 Y16 MA_CLK_H7 MB_CLK_H7 AF18 M_B_CLKOUT7 7 G23 MB_DATA30 MA_DATA30 H20
AA16 AF17 M_B_DQ31 G24 H22 M_A_DQ31
7 M_A_CLKOUT7# MA_CLK_L7 MB_CLK_L7 M_B_CLKOUT7# 7 MB_DATA31 MA_DATA31
P19 R26 M_B_DQ32 AA24 Y24 M_A_DQ32
T15 MA_CLK_H4 MB_CLK_H4 T14 MB_DATA32 MA_DATA32
P20 R25 M_B_DQ33 AA23 AB24 M_A_DQ33
T16 MA_CLK_L4 MB_CLK_L4 T19 MB_DATA33 MA_DATA33
M_B_A[0..15] 7 M_B_DQ34 AD24 AB22 M_A_DQ34
7 M_A_A[0..15] MB_DATA34 MA_DATA34
M_A_A0 N21 P24 M_B_A0 M_B_DQ35 AE24 AA21 M_A_DQ35
M_A_A1 MA_ADD0 MB_ADD0 M_B_A1 M_B_DQ36 MB_DATA35 MA_DATA35 M_A_DQ36
M20 MA_ADD1 MB_ADD1 N24 AA26 MB_DATA36 MA_DATA36 W22
M_A_A2 N22 P26 M_B_A2 M_B_DQ37 AA25 W21 M_A_DQ37
M_A_A3 MA_ADD2 MB_ADD2 M_B_A3 M_B_DQ38 MB_DATA37 MA_DATA37 M_A_DQ38
M19 MA_ADD3 MB_ADD3 N23 AD26 MB_DATA38 MA_DATA38 Y22
M_A_A4 M22 N26 M_B_A4 M_B_DQ39 AE25 AA22 M_A_DQ39
M_A_A5 MA_ADD4 MB_ADD4 M_B_A5 M_B_DQ40 MB_DATA39 MA_DATA39 M_A_DQ40
3 L20 MA_ADD5 MB_ADD5 L23 AC22 MB_DATA40 MA_DATA40 Y20 3
M_A_A6 M24 N25 M_B_A6 M_B_DQ41 AD22 AA20 M_A_DQ41
M_A_A7 MA_ADD6 MB_ADD6 M_B_A7 M_B_DQ42 MB_DATA41 MA_DATA41 M_A_DQ42
L21 MA_ADD7 MB_ADD7 L24 AE20 MB_DATA42 MA_DATA42 AA18
M_A_A8 L19 M26 M_B_A8 M_B_DQ43 AF20 AB18 M_A_DQ43
M_A_A9 MA_ADD8 MB_ADD8 M_B_A9 M_B_DQ44 MB_DATA43 MA_DATA43 M_A_DQ44
K22 MA_ADD9 MB_ADD9 K26 AF24 MB_DATA44 MA_DATA44 AB21
M_A_A10 R21 T26 M_B_A10 M_B_DQ45 AF23 AD21 M_A_DQ45
M_A_A11 MA_ADD10 MB_ADD10 M_B_A11 M_B_DQ46 MB_DATA45 MA_DATA45 M_A_DQ46
L22 MA_ADD11 MB_ADD11 L26 AC20 MB_DATA46 MA_DATA46 AD19
M_A_A12 K20 L25 M_B_A12 M_B_DQ47 AD20 Y18 M_A_DQ47
M_A_A13 MA_ADD12 MB_ADD12 M_B_A13 M_B_DQ48 MB_DATA47 MA_DATA47 M_A_DQ48
V24 MA_ADD13 MB_ADD13 W24 AD18 MB_DATA48 MA_DATA48 AD17
M_A_A14 K24 J23 M_B_A14 M_B_DQ49 AE18 W16 M_A_DQ49
M_A_A15 MA_ADD14 MB_ADD14 M_B_A15 M_B_DQ50 MB_DATA49 MA_DATA49 M_A_DQ50
K19 MA_ADD15 MB_ADD15 J24 AC14 MB_DATA50 MA_DATA50 W14
M_B_DQ51 AD14 Y14 M_A_DQ51
M_B_DQ52 MB_DATA51 MA_DATA51 M_A_DQ52
7 M_A_BS#0 R20 MA_BANK0 MB_BANK0 R24 M_B_BS#0 7 AF19 MB_DATA52 MA_DATA52 Y17
R23 U26 M_B_BS#1 7 M_B_DQ53 AC18 AB17 M_A_DQ53
7 M_A_BS#1 MA_BANK1 MB_BANK1 MB_DATA53 MA_DATA53
J21 J26 M_B_BS#2 7 M_B_DQ54 AF16 AB15 M_A_DQ54
7 M_A_BS#2 MA_BANK2 MB_BANK2 MB_DATA54 MA_DATA54
M_B_DQ55 AF15 AD15 M_A_DQ55
M_B_DQ56 MB_DATA55 MA_DATA55 M_A_DQ56
7 M_A_RAS# R19 MA_RAS_L MB_RAS_L U25 M_B_RAS# 7 AF13 MB_DATA56 MA_DATA56 AB13
T22 U24 M_B_DQ57 AC12 AD13 M_A_DQ57
7 M_A_CAS# MA_CAS_L MB_CAS_L M_B_CAS# 7 MB_DATA57 MA_DATA57
T24 U23 M_B_DQ58 AB11 Y12 M_A_DQ58
7 M_A_WE# MA_WE_L MB_WE_L M_B_WE# 7 MB_DATA58 MA_DATA58
M_B_DQ59 Y11 W11 M_A_DQ59
M_B_DQ60 MB_DATA59 MA_DATA59 M_A_DQ60
AE14 MB_DATA60 MA_DATA60 AB14
M_B_DQ61 AF14 AA14 M_A_DQ61
M_B_DQ62 MB_DATA61 MA_DATA61 M_A_DQ62
Athlon 64 S1g2 SOCKET_638_PIN AF11 MB_DATA62 MA_DATA62 AB12
M_B_DQ63 AD11 AA12 M_A_DQ63
MB_DATA63 MA_DATA63
Athlon 64 S1g2 M_B_DM0 M_A_DM0
A12 E12
Processor Socket M_B_DM1 B16
MB_DM0 MA_DM0
C15 M_A_DM1
M_B_DM2 MB_DM1 MA_DM1 M_A_DM2
SOCKET_638_PIN M_B_DM3
A22 MB_DM2 MA_DM2 E19
M_A_DM3
E25 MB_DM3 MA_DM3 F24
M_B_DM4 AB26 AC24 M_A_DM4
M_B_DM5 MB_DM4 MA_DM4 M_A_DM5
AE22 MB_DM5 MA_DM5 Y19
M_B_DM6 AC16 AB16 M_A_DM6
M_B_DM7 MB_DM6 MA_DM6 M_A_DM7
7 M_B_DM[0..7] AD12 MB_DM7 MA_DM7 Y13 M_A_DM[0..7] 7
M_B_DQS0 C12 G13 M_A_DQS0
M_B_DQS#0 MB_DQS_H0 MA_DQS_H0 M_A_DQS#0
7 M_A_CLKOUT1 7 M_B_CLKOUT1 B12 MB_DQS_L0 MA_DQS_L0 H13
M_B_DQS1 D16 G16 M_A_DQS1
M_B_DQS#1 MB_DQS_H1 MA_DQS_H1 M_A_DQS#1
2
C16 MB_DQS_L1 MA_DQS_L1 G15 2
C264 C252 M_B_DQS2 A24 C22 M_A_DQS2
1.5pF_4 1.5pF_4 M_B_DQS#2 MB_DQS_H2 MA_DQS_H2 M_A_DQS#2
A23 MB_DQS_L2 MA_DQS_L2 C21
M_B_DQS3 F26 G22 M_A_DQS3
7 M_A_CLKOUT1# 7 M_B_CLKOUT1# MB_DQS_H3 MA_DQS_H3
PLACE CLOSE TO PROCESSOR PLACE CLOSE TO PROCESSOR M_B_DQS#3 E26 G21 M_A_DQS#3
M_B_DQS4 MB_DQS_L3 MA_DQS_L3 M_A_DQS4
7 M_A_CLKOUT7 WITHIN 1.5 INCH 7 M_B_CLKOUT7 WITHIN 1.5 INCH AC25 MB_DQS_H4 MA_DQS_H4 AD23
M_B_DQS#4 AC26 AC23 M_A_DQS#4
M_B_DQS5 MB_DQS_L4 MA_DQS_L4 M_A_DQS5
AF21 MB_DQS_H5 MA_DQS_H5 AB19
C90 C100 M_B_DQS#5 AF22 AB20 M_A_DQS#5
1.5pF_4 1.5pF_4 M_B_DQS6 MB_DQS_L5 MA_DQS_L5 M_A_DQS6
AE16 MB_DQS_H6 MA_DQS_H6 Y15
M_B_DQS#6 AD16 W15 M_A_DQS#6
7 M_A_CLKOUT7# 7 M_B_CLKOUT7# MB_DQS_L6 MA_DQS_L6
M_B_DQS7 AF12 W12 M_A_DQS7
M_B_DQS#7 MB_DQS_H7 MA_DQS_H7 M_A_DQS#7
AE12 MB_DQS_L7 MA_DQS_L7 W13

M_B_DQS0 M_A_DQS0
+SMDDR_VTERM M_B_DQS1 Athlon 64 S1g2 SOCKET_638_PIN M_A_DQS1
M_B_DQS2 Athlon 64 S1g2 M_A_DQS2
M_B_DQS3 M_A_DQS3
M_B_DQS4 Processor Socket M_A_DQS4
C92 C259 C147 C93 C255 C261 C95 C97 C94 C96 C254 C260 C257 C256 C98 C99 M_B_DQS5 SOCKET_638_PIN M_A_DQS5
M_B_DQS6 M_A_DQS6
4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 .22U_4 .22U_4 .22U_4 .22U_4 1000P_4 1000P_4 1000P_4 1000P_4 180P_4 180P_4 180P_4 180P_4 M_B_DQS7 M_A_DQS7
7 M_B_DQS[0..7] M_A_DQS[0..7] 7
M_B_DQS#0 M_A_DQS#0
M_B_DQS#1 M_A_DQS#1
M_B_DQS#2 M_A_DQS#2
M_B_DQS#3 M_A_DQS#3
M_B_DQS#4 M_A_DQS#4
M_B_DQS#5 M_A_DQS#5
M_B_DQS#6 M_A_DQS#6
M_B_DQS#7 M_A_DQS#7
7 M_B_DQS#[0..7] M_A_DQS#[0..7] 7

1 1

Quanta Computer Inc.


PROJECT : ZY7

WWW.AliSaler.Com
Size Document Number Rev
1A
AMD Griffin DDRII MEMORY I/F
Date: Thursday, June 26, 2008 Sheet 4 of 35
A B C D E
5 4 3 2 1

ATHLON Control and Debug +1.8VSUS

3
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO If AMD SI is not used, the SID pin can be left unconnected and SIC Need Check .-1001 Q15
EXIT BALL FIELD) AND 500 mils LONG. should have a 390-  (∮5%) pulldown to VSS.
2 R93
16,29,32 CPU_COREPG
2N7002
+1.8VSUS R363 390_4 CPU_SID *0_4

CPU_VDDA_RUN R366 390_4 CPU_SIC

1
+1.8VSUS
R374 *390_4
+2.5V L57 R97 R96
BLM18PG330SN1D_6 R373 1K/F_4 CPU_ALERT
CPU_VDDA_RUN R92 1K_4 100K_4 11/19
D D
390 Ohm 300_4

2
C602 C593 C235 C246 Q16
100U-6.3V_3528 4.7u/6.3V_6 U25D MMBT3904
.22U_4 3300p/50V_4 R87 0_4 CPU_THERMTRIP_L# R91 33_4 1 3
13 CPU_THERMTRIP# SYS_SHDN# 28,32
CPU_VDDA_RUN F8 M11
Keep trace from resisor to CPU within 0.6" VDDA1 KEY1
F9 VDDA2 KEY2 W18
CPU_CLKP C262 3900P_4 keep trace from caps to CPU within 1.2"
CPU_CLKIN_SC_P A9 A6 CPU_SVC_R +1.8VSUS
CPU_CLKIN_SC_N CLKIN_H SVC CPU_SVD_R +1.8VSUS
A8 CLKIN_L SVD A4
R175
2 CPU_CLKP
169/F_6 LDT_RST# B7
PWRGD_C RESET_L R90
2 CPU_CLKN A7 PWROK
LDT_STOP# F10 AF6 CPU_THERMTRIP_L# 330_4
CPU_CLKN C263 3900P_4 CPU_LDT_REQ#_CPU LDTSTOP_L THERMTRIP_L CPU_PROCHOT# R89
C6 LDTREQ_L PROCHOT_L AC7
AA8 CPU_MEMHOT# 300_4
CPU_SIC MEMHOT_L Q14
place them to CPU within 1.5" AF4 SIC

2
CPU_SID AF5 MMBT3904
CPU_ALERT SID CPU_THERMDC
AE6 ALERT_L THERMDC W7
W8 CPU_THERMDA CPU_PROCHOT# 3 1
THERMDA EC_PROCHOT# 25
R132 44.2/F_4 CPU_HTREF0 R6
R129 44.2/F_4 CPU_HTREF1 HT_REF0 R88 *0_4
VLDT_RUN P6 HT_REF1 SB_PROCHOT# 12
+1.8VSUS
29 CPU_VDD0_FB_H F6 VDD0_FB_H VDDIO_FB_H W9 CPU_VDDIO_FB_H 31
E6 Y9 +1.8VSUS
29 CPU_VDD0_FB_L VDD0_FB_L VDDIO_FB_L CPU_VDDIO_FB_L 31
+1.8VSUS
connect to CPU CORE power FB 29 CPU_VDD1_FB_H Y6 VDD1_FB_H VDDNB_FB_H H6 VDD_NB_FB_H 29
R435 AB6 G6
29 CPU_VDD1_FB_L VDD1_FB_L VDDNB_FB_L VDD_NB_FB_L 29
300_4 R99
CPU_DBRDY G10 *330_4
CPU_TMS DBRDY
AA9 TMS DBREQ_L E10 CPU_DBREQ# R122
CPU_TCK AC9 route as differential *300_4
PWRGD_C CPU_TRST# TCK
12 CPU_PWRGD
R439 0_4 AD9 TRST_L TDO AE9 CPU_TDO as short as possible Q17

2
C652 CPU_TDI AF9 testpoint under package *MMBT3904
.1u/10V_4 TDI
Add PUll H/L RES.--0610 CPU_TEST23_TSTUPD AD7 J7 CPU_TEST28_H_PLLCHRZ_P CPU_MEMHOT# 3 1
+1.8VSUS T91 TEST23 TEST28_H T25 CPUMEMHOT# 25
H8 CPU_TEST28_L_PLLCHRZ_N
TEST28_L T26
C CPU_TEST18_PLLTEST1 H10 connect to CPU CORE power controlier C
T32 TEST18
CPU_TEST19_PLLTEST0 G9 D7 CPU_TEST17_BP3
T29 TEST19 TEST17 T35
CPU_TEST16_BP2
Add PUll H/L RES.--0610 CPU_TEST25_H_BYPASSCLK_H E9
TEST16 E7
F7 CPU_TEST15_BP1
T33 VID Override Circuit
T34 TEST25_H TEST15 T106
R447 CPU_TEST25_L_BYPASSCLK_L E8 C7 CPU_TEST14_BP0
T31 TEST25_L TEST14 T105 +1.8VSUS
300_4
CPU_TEST21_SCANEN AB8 C3
T94 TEST21 TEST7
CPU_TEST20_SCANCLK2 AF7 K8
T90 TEST20 TEST10
R446 0_4 LDT_STOP# CPU_TEST24_SCANCLK1 AE7
10,12 CPU_LDT_STOP# T168 TEST24
CPU_TEST22_SCANSHIFTEN AE8 C4
+1.8VSUS T93 TEST22 TEST8
CPU_TEST12_SCANSHIFTENB AC8
T1 TEST12
CPU_TEST27_SINGLECHAIN AF8 R434 R433
T92 TEST27
C9 CPU_TEST29_H_FBCLKOUT_P 1K_4 1K_4
TEST29_H T36
R165 0_4 CPU_TEST9_ANALOGIN C2 C8 CPU_TEST29_L_FBCLKOUT_N
TEST9 TEST29_L T104
AA6 TEST6 Serial VID Clock
R436 CPU_SVC_R R432 0_4
SVC 29
300_4 A3 H18
RSVD1 RSVD10
A5 RSVD2 RSVD9 H19
B3 RSVD3 RSVD8 AA7 Serial VID Data
B5 D5 CPU_SVD_R R431 0_4
RSVD4 RSVD7 SVD 29
R437 0_4 LDT_RST# C1 C5
10,12 CPU_LDT_RST# RSVD5 RSVD6

CPU_PWRGD R438 0_4


PGD_IN 29
+1.8VSUS Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2 R442 R441
Processor Socket *220_4 *220_4
Add pull up R448 SOCKET_638_PIN
300_4

CPU_LDT_REQ#_CPU R449 0_4 CPU_LDT_REQ#


CPU_LDT_REQ# 10
VFIX MODE
+1.8VSUS
B SVC SVD Voltage Output(CPU Power) B

0 0 1.4V
CPU_TEST27_SINGLECHAIN R369 300_4
CPU_TEST25_L_BYPASSCLK_L R559 300_4 0 1 1.2V
1 0 1.0V
CPU_TEST18_PLLTEST1 R141 300_4 1 1 0.8V
CPU_TEST19_PLLTEST0 R140 300_4
CPU_TEST15_BP1 R450 300_4
CPU_TEST14_BP0 R451 300_4
HDT CONNECTOR
CPU_TEST21_SCANEN R383 300_4 +1.8VSUS
CPU_TEST20_SCANCLK2 R371 300_4
CPU_TEST24_SCANCLK1 R372 300_4 +1.8VSUS
CN22
CPU_TEST22_SCANSHIFTEN R370 300_4 R532
CPU_TEST12_SCANSHIFTENB R379 300_4 300_4 *ASP-68200-07-25P-LDV
CPU_TEST25_H_BYPASSCLK_H R560 300_4
CPU_TEST23_TSTUPD R561 300_4 1 2
GND1 GND2
3 RSVD1 GND4 4
5 RSVD0 GND6 6
CPU_DBREQ# 7 8
CPU_DBRDY DBREQ_L GND8
9 DBRDY GND10 10
+3V
CPU H/W MONITOR
CPU_TCK 11 12
CPU_TMS TCK GND12
13 TMS GND14 14
CPU_TDI 15 16
CPU_TRST# TDI GND16
2/20/08' Reserve 0 ohm 17 TRST_L GND18 18
for CPU thermal issue CPU_TDO 19 20
R107 Q41 TDO GND20
21 22
on C-test VCC_PROC_IO_21 GND22
2

+3V 4.7K_4 2N7002E 23 24 H_LDT_RST#


VCC_PROC_IO_23RESET_L
GND26 25
+3V KEY
1 3 2ND_MBDATA 25
+1.8VSUS +3V
15 MIL
R112 47/F_6 3V_THM R105 +3V
2

10K_4
A
C105 Address 98H To SB GPIO R462 R456
A

.1u/10V_4 1 3 THERM_ALERT# 13
R615 *0_4 R108 10K_4 1K/F_4
U6 G781 Q37 2N7002E 4.7K_4 Q40
2

1 6 2N7002E H_LDT_RST#
VCC -ALT
2

CPU_THERMDC 3 7 KBSMDAT
DXN SMDATA KBSMCLK
2 DXP SMCLK 8 1 3 2ND_MBCLK 25
4 5 LDT_RST# 1 3
C102 -OVT GND +3V Q51

CPU_THERMDA
2200P_4 MMBT3904 Quanta Computer Inc.
10 mil trace / PROJECT : ZY7
R104
10 mil space 10K_4 To FAN Size Document Number Rev
1A
AMD Griffin CTRL & DEBUG
CPUFAN#_ON 20
Date: Thursday, June 26, 2008 Sheet 5 of 35
5 4 3 2 1
A B C D E

PROCESSOR POWER AND GROUND


4 4

U25F
AA4 VSS1 VSS66 J6
AA11 VSS2 VSS67 J8
AA13 VSS3 VSS68 J10
CPU_CORE0 CPU_CORE1 AA15 J12 CPU_CORE0
VSS4 VSS69
AA17 VSS5 VSS70 J14
U25E AA19 VSS6 VSS71 J16
AB2 VSS7 VSS72 J18
G4 VDD0_1 VDD1_1 P8 AB7 VSS8 VSS73 K2
H2 VDD0_2 VDD1_2 P10 AB9 VSS9 VSS74 K7
J9 R4 AB23 K9 C207 C218 C205 C197 C209
VDD0_3 VDD1_3 VSS10 VSS75 22U-10V_8 22U-10V_8 .22U_4 .01u/25V_4 180P_4
J11 VDD0_4 VDD1_4 R7 AB25 VSS11 VSS76 K11
J13 VDD0_5 VDD1_5 R9 AC11 VSS12 VSS77 K13
J15 VDD0_6 VDD1_6 R11 AC13 VSS13 VSS78 K15
K6 VDD0_7 VDD1_7 T2 AC15 VSS14 VSS79 K17
K10 VDD0_8 VDD1_8 T6 AC17 VSS15 VSS80 L6 REV B:Del C193, C203, C178 and C184,C185
K12 T8 AC19 L8 CPU_CORE1
K14
VDD0_9 VDD1_9
T10 AC21
VSS16 VSS81
L10
for ISL request --0226
VDD0_10 VDD1_10 VSS17 VSS82
L4 VDD0_11 VDD1_11 T12 AD6 VSS18 VSS83 L12
L7 VDD0_12 VDD1_12 T14 AD8 VSS19 VSS84 L14

1
L9 VDD0_13 VDD1_13 U7 AD25 VSS20 VSS85 L16
L11 U9 AE11 L18 C421 +
VDD0_14 VDD1_14 VSS21 VSS86 C174 C161 C163 C160
L13 VDD0_15 VDD1_15 U11 AE13 VSS22 VSS87 M7
L15 U13 AE15 M9 330u_2V_7343 22U-10V_8 .22U_4 .01u/25V_4 180P_4

2
VDD0_16 VDD1_16 VSS23 VSS88
3 M2 VDD0_17 VDD1_17 U15 AE17 VSS24 VSS89 AC6 3
M6 VDD0_18 VDD1_18 V6 AE19 VSS25 VSS90 M17
M8 VDD0_19 VDD1_19 V8 AE21 VSS26 VSS91 N4
M10 VDD0_20 VDD1_20 V10 AE23 VSS27 VSS92 N8
N7 VDD0_21 VDD1_21 V12 B4 VSS28 VSS93 N10
N9 VDD0_22 VDD1_22 V14 B6 VSS29 VSS94 N16
N11 W4 B8 N18 CPU_VDDNB_CORE
VDD0_23 VDD1_23 VSS30 VSS95
VDD1_24 Y2 B9 VSS31 VSS96 P2
CPU_VDDNB_CORE K16 VDDNB_1 VDD1_25 AC4 B11 VSS32 VSS97 P7
M16 VDDNB_2 VDD1_26 AD2 B13 VSS33 VSS98 P9
P16 VDDNB_3 B15 VSS34 VSS99 P11
T16 VDDNB_4 VDDIO27 Y25 +1.8VSUS B17 VSS35 VSS100 P17
V16 V25 B19 R8 C214 C201 C186
VDDNB_5 VDDIO26 VSS36 VSS101 22U-10V_8 22U-10V_8 22U-10V_8
VDDIO25 V23 B21 VSS37 VSS102 R10
+1.8VSUS H25 VDDIO1 VDDIO24 V21 B23 VSS38 VSS103 R16
J17 VDDIO2 VDDIO23 V18 B25 VSS39 VSS104 R18
K18 VDDIO3 VDDIO22 U17 D6 VSS40 VSS105 T7
K21 VDDIO4 VDDIO21 T25 D8 VSS41 VSS106 T9
K23 VDDIO5 VDDIO20 T23 D9 VSS42 VSS107 T11
K25 VDDIO6 VDDIO19 T21 D11 VSS43 VSS108 T13
L17 VDDIO7 VDDIO18 T18 D13 VSS44 VSS109 T15
M18 VDDIO8 VDDIO17 R17 D15 VSS45 VSS110 T17
M21 VDDIO9 VDDIO16 P25 D17 VSS46 VSS111 U4
M23 P23 D19 U6
M25
VDDIO10
VDDIO11
VDDIO15
VDDIO14 P21 D21
VSS47
VSS48
VSS112
VSS113 U8 DECOUPLING BETWEEN PROCESSOR AND DIMMs
N17 VDDIO12 VDDIO13 P18 D23 VSS49 VSS114 U10
D25 U12
2
E4
VSS50
VSS51
VSS115
VSS116 U14 PLACE CLOSE TO PROCESSOR AS POSSIBLE 2
F2 VSS52 VSS117 U16
Athlon 64 S1g2 SOCKET_638_PIN F11 U18
VSS53 VSS118 +1.8VSUS
Athlon 64 S1g2 F13 VSS54 VSS119 V2
F15 V7
Processor Socket F17
VSS55 VSS120
V9
VSS56 VSS121
SOCKET_638_PIN F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
F23 V15 C127 C128 C234 C232 C129 C239 C126 C236 C237 C118 C117 C238 C131
VSS59 VSS124 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 .22U_4 .22U_4 .22U_4 .22U_4 .22U_4 .22U_4 .01u/25V_4 .01u/25V_4 180P_4
F25 VSS60 VSS125 V17
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
H21 VSS63 VSS128 Y23
H23 VSS64 VSS129 N6
J4 VSS65

A1 A26 Athlon 64 S1g2 SOCKET_638_PIN


Athlon 64 S1g2
Processor Socket
AMD S1g2 SOCKET_638_PIN
Griffin
uPGA638
1 1

Top View

AF1 Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
1A
AMD Griffin PWR & GND
Date: Thursday, June 26, 2008 Sheet 6 of 35
A B C D E

WWW.AliSaler.Com
A B C D E

+1.8VSUS +1.8VSUS

103
104
111
112
117
118

103
104
111
112
117
118
81
82
87
88
95
96

81
82
87
88
95
96
4 M_A_A[0..15] M_A_DQ[0..63] 44 M_B_A[0..15] M_B_DQ[0..63] 4
M_A_A0 102 5 M_A_DQ1 M_B_A0 102 5 M_B_DQ4

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
M_A_A1 A0 DQ0 M_A_DQ5 M_B_A1 A0 DQ0 M_B_DQ1 Change Vakue from 10u to 22u.-1001
101 A1 DQ1 7 101 A1 DQ1 7
M_A_A2 100 17 M_A_DQ2 M_B_A2 100 17 M_B_DQ2
M_A_A3 A2 DQ2 M_A_DQ3 M_B_A3 A2 DQ2 M_B_DQ3 +SMDDR_VTERM +SMDDR_VTERM +1.8VSUS
99 A3 DQ3 19 99 A3 DQ3 19
M_A_A4 98 4 M_A_DQ0 M_B_A4 98 4 M_B_DQ5
4
M_A_A5 A4 DQ4 M_A_DQ4 M_B_A5 A4 DQ4 M_B_DQ0 4
97 A5 DQ5 6 97 A5 DQ5 6
M_A_A6 94 14 M_A_DQ7 M_B_A6 94 14 M_B_DQ6 C165 *10U/6.3V_8
M_A_A7 A6 DQ6 M_A_DQ6 M_B_A7 A6 DQ6 M_B_DQ7 M_A_CKE0 R139 47_4 C113 *10U/6.3V_8
M_A_A8
92
93
A7 J2 DQ7 16
23 M_A_DQ12 M_B_A8
92
93
A7 J1 DQ7 16
23 M_B_DQ8 M_B_CKE0 R142 47_4 C110 *10U/6.3V_8
M_A_A9 A8 DQ8 M_A_DQ8 M_B_A9 A8 DQ8 M_B_DQ9 C125 *10U/6.3V_8
M_A_A10
91
105
A9 REVERSE DQ9 25
35 M_A_DQ10 M_B_A10
91
105
A9 REVERSE DQ9 25
35 M_B_DQ10 C228 22U-10V_8
M_A_A11 A10 DQ10 M_A_DQ14 M_B_A11 A10 DQ10 M_B_DQ15 M_A_ODT0 RP5
90 A11 DQ11 37 90 A11 DQ11 37 1 2 47X2_4 C154 .1U/10V_4
M_A_A12 89 20 M_A_DQ13 M_B_A12 89 20 M_B_DQ12 M_A_A10 3 4 C152 22U-10V_8
M_A_A13 A12 DQ12 M_A_DQ9 M_B_A13 A12 DQ12 M_B_DQ13 M_B_CS#0 RP4
116 A13 DQ13 22 116 A13 DQ13 22 1 2 47X2_4 C122 .1U/10V_4
M_A_A14 86 36 M_A_DQ15 M_B_A14 86 36 M_B_DQ14 M_B_ODT0 3 4 C149 .1U/10V_4
M_A_A15 A14 DQ14 M_A_DQ11 M_B_A15 A14 DQ14 M_B_DQ11 C245 .1U/10V_4
84 A15 DQ15 38 84 A15 DQ15 38
43 M_A_DQ21 43 M_B_DQ16 M_A_BS#1 RP9 1 2 47X2_4 C144 .1U/10V_4
DQ16 M_A_DQ17 DQ16 M_B_DQ21 M_A_A0 C247 .1U/10V_4
4 M_A_BS#0 107 BA0 DQ17 45 4 M_B_BS#0 107 BA0 DQ17 45 3 4
106 55 M_A_DQ23 106 55 M_B_DQ19 M_A_BS#2 R137 47_4 C211 .1U/10V_4
4 M_A_BS#1 BA1 DQ18 4 M_B_BS#1 BA1 DQ18
85 57 M_A_DQ18 85 57 M_B_DQ23 C151 .1U/10V_4
4 M_A_BS#2 BA2 DQ19 4 M_B_BS#2 BA2 DQ19
44 M_A_DQ20 44 M_B_DQ20 M_A_CAS# RP2 1 2 47X2_4 C196 .1U/10V_4
M_A_DM0 DQ20 M_A_DQ19 M_B_DM0 DQ20 M_B_DQ17 M_A_ODT1 C187 .1U/10V_4
10 DM0 DQ21 46 10 DM0 DQ21 46 3 4
M_A_DM1 26 56 M_A_DQ22 M_B_DM1 26 56 M_B_DQ18 M_A_RAS# R128 47_4 C123 .1U/10V_4
M_A_DM2 DM1 DQ22 M_A_DQ16 M_B_DM2 DM1 DQ22 M_B_DQ22 C242 .1U/10V_4
52 DM2 DQ23 58 52 DM2 DQ23 58
M_A_DM3 67 61 M_A_DQ29 M_B_DM3 67 61 M_B_DQ29 M_A_CS#0 R125 47_4 C210 .1U/10V_4
M_A_DM4 DM3 DQ24 M_A_DQ28 M_B_DM4 DM3 DQ24 M_B_DQ28 M_A_CS#1 R126 47_4 C135 .1U/10V_4
130 DM4 DQ25 63 130 DM4 DQ25 63
M_A_DM5 147 73 M_A_DQ31 M_B_DM5 147 73 M_B_DQ26 M_A_A13 R124 47_4 C191 .1U/10V_4
M_A_DM6 DM5 DQ26 M_A_DQ26 M_B_DM6 DM5 DQ26 M_B_DQ27 C223 .1U/10V_4
170 DM6 DQ27 75 170 DM6 DQ27 75
M_A_DM7 185 62 M_A_DQ25 M_B_DM7 185 62 M_B_DQ24 C137 .1U/10V_4
4 M_A_DM[0..7] DM7 DQ28 4 M_B_DM[0..7] DM7 DQ28
64 M_A_DQ24 64 M_B_DQ25 M_B_A2 RP8 1 2 47X2_4 C190 .1U/10V_4
M_A_DQS0 DQ29 M_A_DQ27 M_B_DQS0 DQ29 M_B_DQ30 M_B_BS#1 C220 .1U/10V_4
13 DQS0 DQ30 74 13 DQS0 DQ30 74 3 4
M_A_DQS1 31 76 M_A_DQ30 M_B_DQS1 31 76 M_B_DQ31 M_B_BS#2 R138 47_4 C119 .1U/10V_4
M_A_DQS2 DQS1 DQ31 M_A_DQ38 M_B_DQS2 DQS1 DQ31 M_B_DQ32 C192 .1U/10V_4
51 DQS2 DQ32 123 51 DQS2 DQ32 123
M_A_DQS3 70 125 M_A_DQ36 M_B_DQS3 70 125 M_B_DQ36 M_B_WE# RP3 3 4 47X2_4 C124 .1U/10V_4
M_A_DQS4 DQS3 DQ33 M_A_DQ35 M_B_DQS4 DQS3 DQ33 M_B_DQ39 M_B_CAS# C183 .1U/10V_4
131 DQS4 DQ34 135 131 DQS4 DQ34 135 1 2
M_A_DQS5 148 137 M_A_DQ37 M_B_DQS5 148 137 M_B_DQ35 M_B_RAS# R127 47_4 C226 .1U/10V_4
M_A_DQS6 DQS5 DQ35 M_A_DQ32 M_B_DQS6 DQS5 DQ35 M_B_DQ33 C194 .1U/10V_4
169 DQS6 DQ36 124 169 DQS6 DQ36 124
M_A_DQS7 188 126 M_A_DQ33 M_B_DQS7 188 126 M_B_DQ37 M_B_CS#1 RP1 3 4 47X2_4 C213 .1U/10V_4
4 M_A_DQS[0..7] DQS7 DQ37 4 M_B_DQS[0..7] DQS7 DQ37
134 M_A_DQ34 134 M_B_DQ34 M_B_ODT1 1 2 C225 .1U/10V_4
M_A_DQS#0 DQ38 M_A_DQ39 M_B_DQS#0 DQ38 M_B_DQ38 C233 .1U/10V_4
11 DQS0 DQ39 136 11 DQS0 DQ39 136
M_A_DQS#1 29 141 M_A_DQ45 M_B_DQS#1 29 141 M_B_DQ40 M_B_A13 R123 47_4 C208 .1U/10V_4
M_A_DQS#2 DQS1 DQ40 M_A_DQ44 M_B_DQS#2 DQS1 DQ40 M_B_DQ41 C216 .1U/10V_4
49 DQS2 DQ41 143 49 DQS2 DQ41 143
3 M_A_DQS#3 68 151 M_A_DQ42 M_B_DQS#3 68 151 M_B_DQ46 C231 .1U/10V_4 3
M_A_DQS#4 DQS3 DQ42 M_A_DQ46 M_B_DQS#4 DQS3 DQ42 M_B_DQ43 C243 .1U/10V_4
129 DQS4 DQ43 153 129 DQS4 DQ43 153
M_A_DQS#5 146 140 M_A_DQ41 M_B_DQS#5 146 140 M_B_DQ44 M_A_BS#0 RP6 1 2 47X2_4 C171 .1U/10V_4
M_A_DQS#6 DQS5 DQ44 M_A_DQ40 M_B_DQS#6 DQS5 DQ44 M_B_DQ45 M_A_WE# C138 .1U/10V_4
167 DQS6 DQ45 142 167 DQS6 DQ45 142 3 4
M_A_DQS#7 186 152 M_A_DQ43 M_B_DQS#7 186 152 M_B_DQ47 M_A_A2 RP11 1 2 47X2_4 C153 .1U/10V_4
4 M_A_DQS#[0..7] DQS7 DQ46 4 M_B_DQS#[0..7] DQS7 DQ46
154 M_A_DQ47 154 M_B_DQ42 M_A_A4 3 4 C132 .1U/10V_4
DQ47 M_A_DQ55 DQ47 M_B_DQ53 M_A_A6 RP17
DQ48 157 DQ48 157 1 2 47X2_4 C219 .1U/10V_4
30 159 M_A_DQ54 30 159 M_B_DQ49 M_A_A7 3 4 C182 .1U/10V_4
4 M_A_CLKOUT1 CK0 DQ49 4 M_B_CLKOUT1 CK0 DQ49
32 173 M_A_DQ50 32 173 M_B_DQ55 M_A_A11 RP21 3 447X2_4 C198 .1U/10V_4
4 M_A_CLKOUT1# CK0 DQ50 4 M_B_CLKOUT1# CK0 DQ50
164 175 M_A_DQ51 164 175 M_B_DQ54 M_A_A14 1 2 C200 .1U/10V_4
4 M_A_CLKOUT7 CK1 DQ51 4 M_B_CLKOUT7 CK1 DQ51
166 158 M_A_DQ53 166 158 M_B_DQ48 M_A_A12 RP18 1 2 47X2_4 C176 .1U/10V_4
4 M_A_CLKOUT7# CK1 DQ52 4 M_B_CLKOUT7# CK1 DQ52
160 M_A_DQ48 160 M_B_DQ52 M_A_A9 3 4 C240 *.1U/10V_4
DQ53 M_A_DQ49 DQ53 M_B_DQ50 M_A_A3 RP10
4 M_A_CKE0 79 CKE0 DQ54 174 4 M_B_CKE0 79 CKE0 DQ54 174 1 2 47X2_4
80 176 M_A_DQ52 80 176 M_B_DQ51 M_A_A1 3 4 C224 *.1U/10V_4
4 M_A_CKE1 CKE1 DQ55 4 M_B_CKE1 CKE1 DQ55
179 M_A_DQ56 179 M_B_DQ60 M_A_A8 RP14 1 2 47X2_4
DQ56 M_A_DQ60 DQ56 M_B_DQ57 M_A_A5 C139 *.1U/10V_4
4 M_A_RAS# 108 RAS DQ57 181 4 M_B_RAS# 108 RAS DQ57 181 3 4
113 189 M_A_DQ59 113 189 M_B_DQ62 M_A_A15 RP22 3 4 47X2_4
4 M_A_CAS# CAS DQ58 4 M_B_CAS# CAS DQ58
109 191 M_A_DQ58 109 191 M_B_DQ59 M_A_CKE1 1 2 C170 *.1U/10V_4
4 M_A_WE# WE DQ59 4 M_B_WE# WE DQ59
SO-DIMM

M_A_DQ57

SO-DIMM
110 180 110 180 M_B_DQ61
4 M_A_CS#0 S0 DQ60 4 M_B_CS#0 S0 DQ60
115 182 M_A_DQ61 115 182 M_B_DQ56 C164 *.1U/10V_4
4 M_A_CS#1 S1 DQ61 4 M_B_CS#1 S1 DQ61
192 M_A_DQ63 192 M_B_DQ63
DQ62 M_A_DQ62 DQ62 M_B_DQ58 AMD suggestion : 0603 X7R 0.1U each
4 M_A_ODT0 114 ODT0 DQ63 194 4 M_B_ODT0 114 ODT0 DQ63 194
119 119 M_B_A0 1 2 47X2_4 R-Pack between +1.8VSUS and
4 M_A_ODT1 ODT1 4 M_B_ODT1 ODT1 AMD suggestion : 0603 X7R +SMDDR_VTERM
50 50 M_B_A6 RP13 3 4
NC1 T37 NC1 T103 for each R-pack
198 69 +3V R360 10K_4 198 69 M_B_A4 1 2 47X2_4
SA0 NC2 T100 SA0 NC2 T30
R357 0_4 M_B_A7 RP16
200 SA1 NC3 83
120
NEED CUT 200 SA1 NC3 83
120 M_B_A11
3
1
4
2 47X2_4
MEM_SMBDAT NC4 MEM_SMBDAT NC4 M_B_A14 RP20 +1.8VSUS +SMDDR_VTERM
195 SDA NC/TEST 163 T95 195 SDA NC/TEST 163 T3 3 4
MEM_SMBCLK 197 MEM_SMBCLK 197 M_B_A3 1 2 47X2_4
C86 .1U/10V_4 SCL C87 .1U/10V_4 SCL M_B_A1 RP12 3 4
+3V M_B_A8 47X2_4 C195 .1U/10V_4
+3V 199 VDDspd 199 VDDspd NEED CUT M_B_A5 RP15
1
3
2
4
MVREF_DIM MVREF_DIM 1 196 MVREF_DIM MVREF_DIM 1 196 M_B_A12 1 2 47X2_4 C177 .1U/10V_4
VREF VSS56 VREF VSS56 M_B_A9 RP19
VSS55 193 VSS55 193 3 4
2

C273 C271 C269 2 190 2 190 M_B_A10 1 2 47X2_4 C121 .1U/10V_4

2.2U/6.3V_6 .1U/10V_4 1000P_4


3
8
VSS0
VSS1 (H=5.2) VSS54
VSS53 187
184
C272
2.2U/6.3V_6
C270
.1U/10V_4
C268
1000P_4
3
8
VSS0
VSS1 (H=9.2) VSS54
VSS53 187
184
M_B_BS#0
M_B_A15
RP7 3
3
4
4 47X2_4 C148 .1U/10V_4
1

VSS2 VSS52 VSS2 VSS52 M_B_CKE1 RP23


2
9 VSS3 VSS51 183 9 VSS3 VSS51 183 1 2 2
12 178 12 178 C244 .1U/10V_4
VSS4 VSS50 VSS4 VSS50
15 VSS5 VSS49 177 15 VSS5 VSS49 177
18 172 18 172 C142 .1U/10V_4
VSS6 VSS48 VSS6 VSS48
21 VSS7 VSS47 171 21 VSS7 VSS47 171
24 168 24 168 C227 .1U/10V_4
VSS8 VSS46 VSS8 VSS46
27 VSS9 VSS45 165 27 VSS9 VSS45 165
28 162 28 162 C229 .1U/10V_4
VSS10 VSS44 VSS10 VSS44
33 VSS11 VSS43 161 33 VSS11 VSS43 161
34 156 34 156 C180 .1U/10V_4
VSS12 VSS42 VSS12 VSS42
39 VSS13 VSS41 155 39 VSS13 VSS41 155
40 150 40 150 +3V C204 .1U/10V_4
VSS14 VSS40 VSS14 VSS40
41 VSS15 VSS39 149 41 VSS15 VSS39 149
42 145 42 145 C172 .1U/10V_4
VSS16 VSS38 VSS16 VSS38
47 VSS17 VSS37 144 47 VSS17 VSS37 144
48 139 48 139 C206 .1U/10V_4
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS18 VSS36 VSS18 VSS36

2
4
53 VSS19 VSS35 138 53 VSS19 VSS35 138
54 133 54 133 RP37 C136 .1U/10V_4
VSS20 VSS34 +SMDDR_VREF +1.8VSUS VSS20 VSS34 *4.7KX2_4
Q34 C166 .1U/10V_4
59
60
65
66
71
72
77
78
121
122
127
128
132

59
60
65
66
71
72
77
78
121
122
127
128
132

*2N7002E

2
DDRII_SODIMM_R H5.2 DDRII_SODIMM_R H9.2 Add 2 Cap.-1001

1
3
R191 R193
3 1 MEM_SMBDAT
2,13,18,19 PDAT_SMB
*0_4 1K/F_4

MVREF_DIM MVREF_DIM R355 0_4

+3V
C274 R192
+3V
1U/10V/04 1K/F_4 D26 Q35
*2N7002E

2
1
MEM_SMBDAT 3 1 MEM_SMBCLK
3 2,13,18,19 PCLK_SMB
*DA204U
2 R354 0_4
1 1

+3V
D25
11/19
1
MEM_SMBCLK
3
*DA204U
2
Quanta Computer Inc.
PROJECT : ZY7
Size Document Number Rev
1A
DDR-II SODIMM*2
Date: Thursday, June 26, 2008 Sheet 7 of 35
A B C D E
5 4 3 2 1

U24A
HT_TXD0 HT_RXD0

08
Y25 HT_RXCAD0P HT_TXCAD0P D24
HT_TXD#0 HT_RXD#0 HT_RXD[15..0]
HT_TXD1
Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25
HT_RXD1 HT_RXD[15..0] 3
V22 HT_RXCAD1P HT_TXCAD1P E24
HT_TXD#1 V23 E25 HT_RXD#1 HT_RXD#[15..0]
HT_TXD2 HT_RXCAD1N HT_TXCAD1N HT_RXD2 HT_RXD#[15..0] 3
V25 HT_RXCAD2P HT_TXCAD2P F24
HT_TXD#2 V24 F25 HT_RXD#2 HT_CPU_UPCLK[1..0]
HT_TXD3 HT_RXCAD2N HT_TXCAD2N HT_RXD3 HT_CPU_UPCLK[1..0] 3
U24 HT_RXCAD3P HT_TXCAD3P F23
HT_TXD#3 U25 F22 HT_RXD#3 HT_CPU_UPCLK#[1..0]
HT_TXD4 HT_RXCAD3N HT_TXCAD3N HT_RXD4 HT_CPU_UPCLK#[1..0] 3
T25 HT_RXCAD4P HT_TXCAD4P H23
HT_TXD#4 T24 H22 HT_RXD#4 HT_CPU_UPCTL[1..0]
HT_RXCAD4N HT_TXCAD4N HT_CPU_UPCTL[1..0] 3

HYPER TRANSPORT CPU I/F


HT_TXD5 P22 J25 HT_RXD5
HT_TXD#5 HT_RXCAD5P HT_TXCAD5P HT_RXD#5 HT_CPU_UPCTL#[1..0]
P23 HT_RXCAD5N HT_TXCAD5N J24 HT_CPU_UPCTL#[1..0] 3
HT_TXD6 P25 K24 HT_RXD6
D HT_RXCAD6P HT_TXCAD6P D
HT_TXD#6 P24 K25 HT_RXD#6 HT_TXD[15..0]
HT_TXD7 HT_RXCAD6N HT_TXCAD6N HT_RXD7 HT_TXD[15..0] 3
N24 HT_RXCAD7P HT_TXCAD7P K23
HT_TXD#7 N25 K22 HT_RXD#7 HT_TXD#[15..0]
HT_RXCAD7N HT_TXCAD7N HT_TXD#[15..0] 3
HT_TXD8 AC24 F21 HT_RXD8 HT_CPU_DWNCLK[1..0]
HT_TXD#8 HT_RXCAD8P HT_TXCAD8P HT_RXD#8 HT_CPU_DWNCLK[1..0] 3
AC25 HT_RXCAD8N HT_TXCAD8N G21
HT_TXD9 AB25 G20 HT_RXD9 HT_CPU_DWNCLK#[1..0]
HT_TXD#9 HT_RXCAD9P HT_TXCAD9P HT_RXD#9 HT_CPU_DWNCLK#[1..0] 3
AB24 HT_RXCAD9N HT_TXCAD9N H21
HT_TXD10 AA24 J20 HT_RXD10 HT_CPU_DWNCTL[1..0]
HT_TXD#10 HT_RXCAD10P HT_TXCAD10P HT_RXD#10 HT_CPU_DWNCTL[1..0] 3
AA25 HT_RXCAD10N HT_TXCAD10N J21
HT_TXD11 Y22 J18 HT_RXD11 HT_CPU_DWNCTL#[1..0]
HT_TXD#11 HT_RXCAD11P HT_TXCAD11P HT_RXD#11 HT_CPU_DWNCTL#[1..0] 3
Y23 HT_RXCAD11N HT_TXCAD11N K17
HT_TXD12 W21 L19 HT_RXD12
HT_TXD#12 HT_RXCAD12P HT_TXCAD12P HT_RXD#12
W20 HT_RXCAD12N HT_TXCAD12N J19
HT_TXD13 V21 M19 HT_RXD13
HT_TXD#13 HT_RXCAD13P HT_TXCAD13P HT_RXD#13
V20 HT_RXCAD13N HT_TXCAD13N L18
HT_TXD14 U20 M21 HT_RXD14 signals RS780 RX780
HT_TXD#14 HT_RXCAD14P HT_TXCAD14P HT_RXD#14
U21 HT_RXCAD14N HT_TXCAD14N P21
HT_TXD15 U19 P18 HT_RXD15
HT_TXD#15 HT_RXCAD15P HT_TXCAD15P HT_RXD#15
U18 HT_RXCAD15N HT_TXCAD15N M18 HT_TXCALP
R641 R641
HT_CPU_DWNCLK0 T22 H24 HT_CPU_UPCLK0 301ohm 1% 1.21k ohm 1%
HT_CPU_DWNCLK#0 HT_RXCLK0P HT_TXCLK0P HT_CPU_UPCLK#0
T23 HT_RXCLK0N HT_TXCLK0N H25 HT_TXCALN
HT_CPU_DWNCLK1 AB23 L21 HT_CPU_UPCLK1
HT_CPU_DWNCLK#1 HT_RXCLK1P HT_TXCLK1P HT_CPU_UPCLK#1
AA22 HT_RXCLK1N HT_TXCLK1N L20
HT_RXCALP
HT_CPU_DWNCTL0 M22 M24 HT_CPU_UPCTL0 R661 R661
HT_CPU_DWNCTL#0 HT_RXCTL0P HT_TXCTL0P HT_CPU_UPCTL#0
M23 HT_RXCTL0N HT_TXCTL0N M25 301 ohm 1% 1.21k ohm 1%
HT_CPU_DWNCTL1 R21 P19 HT_CPU_UPCTL1 HT_RXCALN
HT_CPU_DWNCTL#1 HT_RXCTL1P HT_TXCTL1P HT_CPU_UPCTL#1
R20 HT_RXCTL1N HT_TXCTL1N R18
C R406 301/04/F HT_RXCALP HT_TXCALP R405 301/04/F C
C23 HT_RXCALP HT_TXCALP B24
HT_RXCALN A24 B25 HT_TXCALN
HT_RXCALN HT_TXCALN
RS780(RX780)

This block is for UMA RS780 only , RX780 can


remove all component

U24D
PAR 4 OF 6
AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
AE15 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) Y19
AA12 MEM_A4(NC) MEM_DQ4(NC) V17
AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20
AD15 AD19

SBD_MEM/DVO_I/F
MEM_A9(NC) MEM_DQ9/DVO_D5(NC)
AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22
B AE13 AC18 B
MEM_A11(NC) MEM_DQ11/DVO_D7(NC)
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
AE17 MEM_BA1(NC)
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_DQS0N/DVO_IDCKN(NC) W18
W12 MEM_RASb(NC) MEM_DQS1P(NC) AD20
Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
AD18 MEM_WEb(NC)
AB13 MEM_CSb(NC) MEM_DM0(NC) W17
AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
V14 MEM_ODT(NC)
AE23 +1.8_IOPLLVDD18_NB R382 0_6 +1.8V
IOPLLVDD18(NC) +1.1V_IOPLLVDD R381 0_6
V15 MEM_CKP(NC) IOPLLVDD(NC) AE24 +1.1V
W14 MEM_CKN(NC)
IOPLLVSS(NC) AD23
AE12 MEM_COMPP(NC)
AD12 AE18 SPM_VREF1
MEM_COMPN(NC) MEM_VREF(NC)
RS780(RX780)

R385 *1K_4 R380 *1K_4

C504 *.1U/10V_4 C513 *.1U/10V_4 +1.8V

A A

Quanta Computer Inc.


PROJECT : ZY7

WWW.AliSaler.Com
Size Document Number Rev
1A
RS740/RS780-HT LINK I/F 1/4
Date: Thursday, June 26, 2008 Sheet 8 of 35
5 4 3 2 1
5 4 3 2 1

U24B PEG_RXN[15:0] PEG_TXN[15:0]


17 PEG_RXN[15:0] PEG_TXN[15:0] 17
PEG_RXP15 D4 A5 C_PEG_TXP15 C580 *EV^.1u/10V_4 PEG_TXP15
PEG_RXN15 GFX_RX0P GFX_TX0P C_PEG_TXN15 C579 *EV^.1u/10V_4 PEG_TXN15 PEG_RXP[15:0] PEG_TXP[15:0]
PEG_RXP14
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5
C_PEG_TXP14 C573 *EV^.1u/10V_4 PEG_TXP14
17 PEG_RXP[15:0] PEG_TXP[15:0] 17
A3 GFX_RX1P GFX_TX1P A4
PEG_RXN14 B3 B4 C_PEG_TXN14 C577 *EV^.1u/10V_4 PEG_TXN14
PEG_RXP13 GFX_RX1N GFX_TX1N C_PEG_TXP13 C570 *EV^.1u/10V_4 PEG_TXP13
C2 GFX_RX2P GFX_TX2P C3
PEG_RXN13 C1 B2 C_PEG_TXN13 C572 *EV^.1u/10V_4 PEG_TXN13
PEG_RXP12 GFX_RX2N GFX_TX2N C_PEG_TXP12 C564 *EV^.1u/10V_4 PEG_TXP12
D E5 GFX_RX3P GFX_TX3P D1 D
PEG_RXN12 F5 D2 C_PEG_TXN12 C566 *EV^.1u/10V_4 PEG_TXN12
PEG_RXP11 GFX_RX3N GFX_TX3N C_PEG_TXP11 C559 *EV^0.1U/10V_4 PEG_TXP11
G5 GFX_RX4P GFX_TX4P E2
PEG_RXN11 G6 E1 C_PEG_TXN11 C563 *EV^0.1U/10V_4 PEG_TXN11
PEG_RXP10 GFX_RX4N GFX_TX4N C_PEG_TXP10 C550 *EV^0.1U/10V_4 PEG_TXP10
H5 GFX_RX5P GFX_TX5P F4 Close to North Bridge
PEG_RXN10 H6 F3 C_PEG_TXN10 C549 *EV^0.1U/10V_4 PEG_TXN10
PEG_RXP9 GFX_RX5N GFX_TX5N C_PEG_TXP9 C551 *EV^0.1U/10V_4 PEG_TXP9
J6 GFX_RX6P GFX_TX6P F1
PEG_RXN9 J5 F2 C_PEG_TXN9 C556 *EV^0.1U/10V_4 PEG_TXN9
PEG_RXP8 GFX_RX6N GFX_TX6N C_PEG_TXP8 C546 *EV^0.1U/10V_4 PEG_TXP8
J7 GFX_RX7P GFX_TX7P H4
PEG_RXN8 J8 H3 C_PEG_TXN8 C548 *EV^0.1U/10V_4 PEG_TXN8 C_PEG_TXP15 C391 IV^0.1u/10V_4

PCIE I/F GFX


GFX_RX7N GFX_TX7N IV_HDMITX2P 17
PEG_RXP7 L5 H1 C_PEG_TXP7 C545 *EV^0.1U/10V_4 PEG_TXP7 C_PEG_TXN15 C276 IV^0.1u/10V_4
GFX_RX8P GFX_TX8P IV_HDMITX2N 17
PEG_RXN7 L6 H2 C_PEG_TXN7 C544 *EV^0.1U/10V_4 PEG_TXN7
PEG_RXP6 GFX_RX8N GFX_TX8N C_PEG_TXP6 C541 *EV^0.1U/10V_4 PEG_TXP6 C_PEG_TXP14 C288 IV^0.1u/10V_4
M8 GFX_RX9P GFX_TX9P J2 IV_HDMITX1P 17
PEG_RXN6 L8 J1 C_PEG_TXN6 C543 *EV^0.1U/10V_4 PEG_TXN6 C_PEG_TXN14 C294 IV^0.1u/10V_4
GFX_RX9N GFX_TX9N IV_HDMITX1N 17
PEG_RXP5 P7 K4 C_PEG_TXP5 C535 *EV^0.1U/10V_4 PEG_TXP5
PEG_RXN5 GFX_RX10P GFX_TX10P C_PEG_TXN5 C536 *EV^0.1U/10V_4 PEG_TXN5 C_PEG_TXP13 C297 IV^0.1u/10V_4
M7 GFX_RX10N GFX_TX10N K3 IV_HDMITX0P 17
PEG_RXP4 P5 K1 C_PEG_TXP4 C537 *EV^0.1U/10V_4 PEG_TXP4 C_PEG_TXN13 C324 IV^0.1u/10V_4
GFX_RX11P GFX_TX11P IV_HDMITX0N 17
PEG_RXN4 M5 K2 C_PEG_TXN4 C540 *EV^0.1U/10V_4 PEG_TXN4
PEG_RXP3 GFX_RX11N GFX_TX11N C_PEG_TXP3 C533 *EV^0.1U/10V_4 PEG_TXP3 C_PEG_TXP12 C398 IV^0.1u/10V_4
R8 GFX_RX12P GFX_TX12P M4 IV_HDMICLK+ 17
PEG_RXN3 P8 M3 C_PEG_TXN3 C534 *EV^0.1U/10V_4 PEG_TXN3 C_PEG_TXN12 C419 IV^0.1u/10V_4
GFX_RX12N GFX_TX12N IV_HDMICLK- 17
PEG_RXP2 R6 M1 C_PEG_TXP2 C531 *EV^0.1U/10V_4 PEG_TXP2
PEG_RXN2 GFX_RX13P GFX_TX13P C_PEG_TXN2 C530 *EV^0.1U/10V_4 PEG_TXN2
R5 M2
PEG_RXP1 P4
GFX_RX13N
GFX_RX14P
GFX_TX13N
GFX_TX14P N2 C_PEG_TXP1 C528 *EV^0.1U/10V_4 PEG_TXP1 To HDMI
PEG_RXN1 P3 N1 C_PEG_TXN1 C529 *EV^0.1U/10V_4 PEG_TXN1
PEG_RXP0 GFX_RX14N GFX_TX14N C_PEG_TXP0 C521 *EV^0.1U/10V_4 PEG_TXP0
T4 GFX_RX15P GFX_TX15P P1
C PEG_RXN0 T3 P2 C_PEG_TXN0 C524 *EV^0.1U/10V_4 PEG_TXN0 REV B: Add HDMI CAP circuit for layout request --0216 C
GFX_RX15N GFX_TX15N
T6 PCIE_RXP0 AE3 AC1 PCIE_TXP0_C T7
T4 PCIE_RXN0 GPP_RX0P GPP_TX0P PCIE_TXN0_C T5
AD4 GPP_RX0N GPP_TX0N AC2
AE2 AB4 PCIE_TXP1_C C348 .1u/10V_4
19 PCIE_RXP1 GPP_RX1P GPP_TX1P PCIE_TXP1 19
AD3 AB3 PCIE_TXN1_C C349 .1u/10V_4
19 PCIE_RXN1 GPP_RX1N GPP_TX1N PCIE_TXN1 19
AD1 AA2 PCIE_TXP2_C C478 .1u/10V_4
19 PCIE_RXP2 GPP_RX2P GPP_TX2P PCIE_TXP2 19
AD2 PCIE I/F GPP AA1 PCIE_TXN2_C C480 .1u/10V_4
19 PCIE_RXN2 GPP_RX2N GPP_TX2N PCIE_TXN2 19
V5 Y1 PCIE_TXP3_C C459 .1u/10V_4
19 PCIE_RXP3 GPP_RX3P GPP_TX3P PCIE_TXP3 19
W6 Y2 PCIE_TXN3_C C460 .1u/10V_4
19 PCIE_RXN3 GPP_RX3N GPP_TX3N PCIE_TXN3 19
U5 Y4 PCIE_TXP4_C C133 .1u/10V_4
21 PCIE_RXP4 GPP_RX4P GPP_TX4P PCIE_TXP4 21
U6 Y3 PCIE_TXN4_C C134 .1u/10V_4
21 PCIE_RXN4 GPP_RX4N GPP_TX4N PCIE_TXN4 21
U8 V1 PCIE_TXP5_C C523 .1u/10V_4
24 PCIE_RXP5 GPP_RX5P GPP_TX5P PCIE_TXP5 24
U7 V2 PCIE_TXN5_C C520 .1u/10V_4
24 PCIE_RXN5 GPP_RX5N GPP_TX5N PCIE_TXN5 24
AA8 AD7 A_TX0P_C C505 .1u/10V_4 PCIE_NB_SB_TX0P 12
12 PCIE_SB_NB_RX0P SB_RX0P SB_TX0P
Y8 AE7 A_TX0N_C C506 .1u/10V_4 PCIE_NB_SB_TX0N 12
12 PCIE_SB_NB_RX0N SB_RX0N SB_TX0N
AA7 AE6 A_TX1P_C C501 .1u/10V_4 PCIE_NB_SB_TX1P 12
12 PCIE_SB_NB_RX1P SB_RX1P SB_TX1P
Y7 AD6 A_TX1N_C C500 .1u/10V_4 PCIE_NB_SB_TX1N 12
12 PCIE_SB_NB_RX1N SB_RX1N SB_TX1N
AA5 PCIE I/F SB AB6 A_TX2P_C C508 .1u/10V_4 PCIE_NB_SB_TX2P 12
12 PCIE_SB_NB_RX2P SB_RX2P SB_TX2P
AA6 AC6 A_TX2N_C C507 .1u/10V_4 PCIE_NB_SB_TX2N 12
12 PCIE_SB_NB_RX2N SB_RX2N SB_TX2N
W5 AD5 A_TX3P_C C503 .1u/10V_4 PCIE_NB_SB_TX3P 12
12 PCIE_SB_NB_RX3P SB_RX3P SB_TX3P
Y5 AE5 A_TX3N_C C502 .1u/10V_4 PCIE_NB_SB_TX3N 12
12 PCIE_SB_NB_RX3N SB_RX3N SB_TX3N
AC8 NB_PCIECALRP R109 1.27K/04
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R110 2K/04
B PCE_CALRN(PCE_BCALRN) AB8 +1.1V B

RS780(RX780)

A A

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
1A
RX780/RS780-PCIE I/F 2/4
Date: Thursday, June 26, 2008 Sheet 9 of 35
5 4 3 2 1
5 4 3 2 1

U24C

Need Check RGB Pull Low RES value!--1026


+3V_AVDD_NB

+1.8V_AVDDDI_NB

+1.8V_AVDDQ_NB
F12
E12
F14
G15
H15
H14
AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)
PART 3 OF 6
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
A22
B22
A21
B21
B20
A20
A19 LA_DATAP3
INT_TXLOUT0 17
INT_TXLOUT0# 17
INT_TXLOUT1 17
INT_TXLOUT1# 17
INT_TXLOUT2 17
INT_TXLOUT2# 17
10
TXOUT_L3P(NC) T24
R136 *150R_4 TV_C/R1 E17 B19 LA_DATAN3

CRT/TVOUT
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) T28
R130 *150R_4 TV_Y/G1 F17
R134 *150R_4 TV_COMP1 Y(DFT_GPIO2)
F15 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) B18 INT_TXUOUT0 17
REV E: Change R393 value from 150ohm TXOUT_U0N(NC) A18 INT_TXUOUT0# 17
17 INT_CRT_RED R148 IV^0_4 CRT_R_1 G18 A17
to 133ohm following AMD change---0214 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) INT_TXUOUT1 17
R149 IV^133R_4 G17 B17
REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) INT_TXUOUT1# 17
17 INT_CRT_GRN R151 IV^0_4 CRT_G_1 E18 D20
GREEN(DFT_GPIO1) TXOUT_U2P(NC) INT_TXUOUT2 17
R150 IV^150R_4 F18 D21
GREENb(NC) TXOUT_U2N(NC) INT_TXUOUT2# 17
D 17 INT_CRT_BLU R152 IV^0_4 CRT_B_1 E19 D18 LB_DATAP3 D
BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) T21
R153 IV^150R_4 F19 D19 LB_DATAN3
BLUEb(NC) TXOUT_U3N(NC) T23
RX780: Powered from the 1.8-V rail
and driven by SB600 LDT_RST#, or R408 IV^0_4 HSYNC_INT A11 B16
17 INT_HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) INT_TXLCLKOUT 17
R407 IV^0_4 VSYNC_INT B11 A16
SB700 LDT_RST# or A_RST#. 17 INT_VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) INT_TXLCLKOUT# 17
R162 IV^0_4 DDCDATA_INT E8 D16
RS780: Powered from the 3.3-V rail 17 INT_CRT_DDCDAT DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4) INT_TXUCLKOUT 17
R163 IV^0_4 DDCCLK_INT F8 D17
17 INT_CRT_DDCCLK DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1) INT_TXUCLKOUT# 17
and driven by SB600 LDT_RST#, or
SB700 LDT_RST# or A_RST#. R159 715R/06 DAC_RSET_NB G14 DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB
VDDLTP18(NC) A13
+1.1V_PLLVDD A12 B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
RX780 D14

LVTM
R146 *0_4 NB_RST#_IN PLLVDD18(NC) +1.8V_VDDLT_18_NB
5,12 CPU_LDT_RST# B12 A15

PLL PWR
PLLVSS(NC) VDDLT18_1(NC)
VDDLT18_2(NC) B15
RS780 +1.8V_VDDA18HTPLL H17 A14
R155 0_4 VDDA18HTPLL VDDLT33_1(NC)
12 NB_PLTRST# VDDLT33_2(NC) B14
+1.8V_VDDA18PCIEPLL D7 VDDA18PCIEPLL1
North Bridge RESET E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
VSSLT2(VSS) D15
NB_RST#_IN D8 C16
NB_PWRGD_IN SYSRESETb VSSLT3(VSS)
16 NB_PWRGD_IN A10 POWERGOOD VSSLT4(VSS) C18
NB_LDT_STOP# C10 C20

PM
ALLOW_LDTSTOP LDTSTOPb VSSLT5(VSS)
C12 ALLOW_LDTSTOP VSSLT6(VSS) E20
VSSLT7(VSS) C22
NBHT_REFCLKP C25
2 NBHT_REFCLKP HT_REFCLKP
NBHT_REFCLKN C24 I RS780 only
2 NBHT_REFCLKN HT_REFCLKN
R167 0R/04 NB_REFCLK_P E11
2 EXT_NB_OSC REFCLK_P/OSCIN(OSCIN)

CLOCKs
R166 0_4 NB_REFCLK_N F11 I E9 R164 IV^0_4
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) INT_LVDS_DIGON 17
+3V R418 4.7K/04 HDTV_DET +1.1V F7 R157 IV^0_4
LVDS_BLON(PCE_RCALRP) INT_LVDS_BL_BRGHT 18
R171 R172 NBGFX_CLKP T2 G12 R144 IV^0_4
GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) INT_LVDS_BLON 17
4.7K/04 4.7K/04 NBGFX_CLKN T1 I/O
GFX_REFCLKN
2 NBGFX_CLKP
NBGPP_CLKP U1 SWAP BLON/BRGHT.--1108
2 NBGFX_CLKN GPP_REFCLKP
NBGPP_CLKN U2 I/O
2 NBGPP_CLKP GPP_REFCLKN
2 NBGPP_CLKN
SBLINK_CLKP V4
2 SBLINK_CLKP GPPSB_REFCLKP(SB_REFCLKP)
C SBLINK_CLKN V3 C
VDDG_NB 2 SBLINK_CLKN GPPSB_REFCLKN(SB_REFCLKN)
RS780 only
R416 IV^4.7K/04 NB_I2C_DATA R414 IV^0_4 NB_I2C_DATA A9
17 INT_LVDS_EDIDDATA I2C_DATA
R415 IV^0_4 NB_I2C_CLK INT_HDMI_HPD_R R417 IV^0_4
R412 IV^4.7K/04 NB_I2C_CLK
17 INT_LVDS_EDIDCLK
R410 IV^0_4 HDTV_DET
B9
B8
I2C_CLK MIS. TMDS_HPD(NC) D9
D10 TMDS_HPD1
INT_HDMI_HPD 17
17 INT_HDMI_DATA DDC_DATA/AUX0N(NC) HPD(NC) T98
R409 IV^0_4 A8
17 INT_HDMI_CLK DDC_CLK/AUX0P(NC)
RS740_DFT_GPIO0 B7 D12 SUS_STAT#_NB R168 0R/04
T99 AUX1P(NC) TVCLKIN(PWM_GPIO5) SUS_STAT# 13
RS740_DFT_GPIO1 A7
T101 AUX1N(NC)
Change PU from +3V to VDDG_NB.--1015 AE8 R_NB_THRMDA
THERMALDIODE_P T96
R428 0_4 STRP_DATA B10 AD8 R_NB_THRMDC
30 +NB_CORE_ON STRP_DATA THERMALDIODE_N T97
G11 RSVD TESTMODE D13 TEST_EN

selects Loading of straps from RS780_AUX_CAL C8 R413


T102 AUX_CAL(NC)
EPROM 1.82K/04
1 : use default vaule , default RS780(RX780)
0 : I2C Master can load strap
values from EEPROM
if connected, or use default
values if not connected
REV B: Change PU from +3V_S5 to +3V
RX780 --RS780_AUX_CAL RX780 follow AMD CRB suggest.--0201
+1.1V L56 +1.1V_PLLVDD
L21 +3V_AVDD_NB
RS780 -- SUS_ATAT RS780_AUX_CAL R419 *3K/04
+3V
TI160808U300 BLM18PG221SN1D +1.8V
PLLVDD - Graphics PLL
C575 not applicable to BLM18PG221SN1D
C241 2.2U/6.3V/06 L55 +1.8V_VDDLTP18_NB
RX780 VDDLTP18 - LVDS or DVI/HDMI PLL
10U/6.3V/06
C574 C601 not applicable to RX780
2.2U/6.3V/06 100p/50V_6
+1.8V AVDD-DAC Analog
Enables Debug Bus acess
through memory T/O pads and GPIO. RS780 not applicable to RX780 +1.8V
BLM21PG221SN1D
0 : Enable RS780 , Default INT_VSYNC R424 3K_4 L22 +1.8V_PLLVDD18 R158 TI160808U300 +1.8V_AVDDDI_NB AVDDI-DAC Digital L53 +1.8V_VDDLT_18_NB
+3V
1 : Disable RS780 not applicable to RX780
B (RS780 use VSYNC#) TI160808U300 VDDLT18 - LVDS or B
C221 4.7u/6.3V_6 DVI/HDMI digital
C248 C217 10U/6.3V/06 C646 C576
10U/6.3V/08 C571 not applicable to
10U/6.3V/06
100p/50V_6 .1U/10V_4 RX780
L20 +1.8V_AVDDQ_NB AVDDQ-DAC Bandgap Reference
PLLVDD18 - Graphics PLL TI160808U300 not applicable to RX780
Indicates if memory Side port RS780 not applicable to RX780
C215
is available or not 10U/6.3V/06 REV B: Add C601,C646,C647,C648 100PF for EMI request.--0201
INT_HSYNC R426 3K/04 +3V
0: available RS780 , Default
1: Not available RS780 R425 *3K_4
( RS780 use HSYNC#) +1.8V

TI160808U300 20mils width R457 *0R/06


L18 +1.8V_VDDA18PCIEPLL RX780 +1.8V VDDG_NB
For extrnal EEPROM Debug only
RS780/RX780 +1.8V
VDDG_NB R458 0_6
C230 +3V
STRP_DATA R423 *10K_4 VDDG_NB 4.7U/6.3V/06 RS780
R452
2

R427 2.2K_4 *4.7K_4 C648


VDDA18PCIEPLL -PCIE PLL Q50
1 3 NB_LDT_STOP# 100p/50V_6
5,12 CPU_LDT_STOP#
*BSS138_NL/SOT23

20mils width
L17 +1.8V_VDDA18HTPLL R459 0_4

TI160808U300
C:REV Change it follow AMD suggest.
A C647 C107 A
4.7U/6.3V/06
100p/50V_6

VDDA18HTPLL -HT LINK PLL

R460 0_4 ALLOW_LDTSTOP


5 CPU_LDT_REQ#

12 ALLOW_LDTSTOP
Quanta Computer Inc.
PROJECT : ZY7

WWW.AliSaler.Com 5 4 3 2
Size

Date:
Document Number
RX780/RS780-SYS I/F 3/4
Thursday, June 26, 2008
1
Sheet 10 of 35
Rev
1A
5 4 3 2 1

13

AE14
AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
RX780/RS780 POWER DIFFERENCE TABLE

L1
L2
L4
L7
J4
U24F
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
PIN NAME RX780 RS780 PIN NAME RX780 RS780
D D
VDDHT +1.1V +1.1V IOPLLVDD NC +1.1V

VDDHTRX +1.1V +1.1V AVDD NC +3.3V


PART 6/6

GROUND VDDHTTX +1.2V +1.2V AVDDDI NC +1.8V

VDDA18PCIE +1.8V +1.8V AVDDQ NC +1.8V

VDDG18 +1.8V +1.8V PLLVDD NC +1.1V


VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VDD18_MEM NC +1.8V PLLVDD18 NC +1.8V
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDDPCIE +1.1V +1.1V VDDA18PCIEPLL +1.8V +1.8V

VDDC +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V


A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDD_MEM NC +1.8V/1.5V VDDLTP18 NC +1.8V

VDDG33 NC +3.3V VDDLT18 NC +1.8V

IOPLLVDD18 NC +1.8V VDDLT33 NC NC

C C

+1.1V
VDDHT - HT
LINK digital
+1.1V 2A for RS780M
U24E
I/O for 0.6A L16 +1.1V_VDDHT +1.1V_VDD_PCIE
0.7A R376 0R/08
J17 VDDHT_1 VDDPCIE_1 A6 +1.1V
RX780/RS780 BLM21PG221SN1D K16 PART 5/6 B6
VDDHT_2 VDDPCIE_2
L16 VDDHT_3 VDDPCIE_3 C6 VDDPCIE - PCIE-E Main power
C116 C143 C158 C168 M16 D6 C175 C156 C120 C199 C162
4.7u/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDHT_4 VDDPCIE_4 .1u/10V_4 .1u/10V_4 1U/10V/04 1U/10V/04 4.7u/6.3V_6
P16 VDDHT_5 VDDPCIE_5 E6
VDDHTRX - HT R16 VDDHT_6 VDDPCIE_6 F6
LINK RX I/O for T16 VDDHT_7 VDDPCIE_7 G7
RX780/RS780 0.45A +1.1V_VDDHTRX VDDPCIE_8 H8
L19 H18 J9
BLM21PG221SN1D VDDHTRX_1 VDDPCIE_9
G19 VDDHTRX_2 VDDPCIE_10 K9
F20 VDDHTRX_3 VDDPCIE_11 M9
C222 C202 C212 C179 E21 L9
4.7u/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDHTRX_4 VDDPCIE_12
D22 VDDHTRX_5 VDDPCIE_13 P9
B23 R9
+1.2V 2A for RS780M+SB700 A23
VDDHTRX_6
VDDHTRX_7
VDDPCIE_14
VDDPCIE_15 T9
0.5A +1.2V_VDDHTTX VDDPCIE_16 V9 VDDC - Core Logic power
+1.2V L14 AE25 U9
BLM21PG221SN1D VDDHTTX_1 VDDPCIE_17
AD24 VDDHTTX_2 7A
AC23 VDDHTTX_3 VDDC_1 K12 +NB_CORE
+1.35V for C104 C114 C115 C155 C108 AB22 J14
4.7u/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDHTTX_4 VDDC_2 C251 C258
A1-1 chip AA21 VDDHTTX_5 VDDC_3 U16
VDDHTTX - HT Y20 J11 C169 C150 C141 C167 C249
bug , A1-2 W19
VDDHTTX_6 VDDC_4
K15 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 10U/6.3V/08 1000P_4 1000P_4

POWER
can remove LINK TX I/O for VDDHTTX_7 VDDC_5
V18 M12
B RX780/RS780 U17
VDDHTTX_8 VDDC_6
L14 B
VDDHTTX_9 VDDC_7
T17 VDDHTTX_10 VDDC_8 L11 Add Cap for EMI.--1102
R17 M13
+1.8V 1A for RS780M+SB700 P17
VDDHTTX_11 VDDC_9
M15
VDDHTTX_12 VDDC_10
M17 VDDHTTX_13 VDDC_11 N12

L46
600mA +1.8V_VDDA18PCIE VDDC_12 N14
C157 C146 C130 C250
+1.8V J10 VDDA18PCIE_1 VDDC_13 P11
BLM21PG221SN1D P10 P13 .1u/10V_4 .1u/10V_4 .1u/10V_4 10U/6.3V/08
VDDA18PCIE_2 VDDC_14
K10 VDDA18PCIE_3 VDDC_15 P14
VDDA18PCIE - C512 C111 C112 C145 C140 C173 M10 R12
4.7u/6.3V_6 4.7u/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDA18PCIE_4 VDDC_16
PCIE TX stage L10 VDDA18PCIE_5 VDDC_17 R15
W9 T11
I/O for H9
VDDA18PCIE_6 VDDC_18
T15
RX780/RS780 VDDA18PCIE_7 VDDC_19
T10 VDDA18PCIE_8 VDDC_20 U12
R10 VDDA18PCIE_9 VDDC_21 T14
Y9 VDDA18PCIE_10 VDDC_22 J16
AA9 VDDA18PCIE_11
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
VDD18 - RS780 I/O 0.005A AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11
transform +1.8V R131 0R/06 AE9 Y11
VDDA18PCIE_14 VDD_MEM3(NC)
U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
C188 AB10 R117 0_6
1U/10V/04 +1.8V_VDDG18_NB VDD_MEM5(NC)
F9 VDDG18_1(VDD18_1) VDD_MEM6(NC) AC10
G9 RS780 3.3V(0.03A)
VDDG18_2(VDD18_2) +3V_VDDG33 R145 0_6
0.005A +1.8V_VDD18_MEM
AE11 VDD18_MEM1(NC) VDDG33_1(NC) H11 +3V
+1.8V R377 0_6 AD11 H12
VDD18_MEM2(NC) VDDG33_2(NC) C189 C181 C490 C499
VDD18_MEM For UMA RS780 only C511 RS780(RX780) .1U/10V_4 .1U/10V_4
1U/10V/04 1000P_4 1000P_4
Not applicable to RX780
A memory I/O transform A

Add Cap for EMI.--1102


VDD33 - 3.3V I/O
Not applicable to RX780
Quanta Computer Inc.
PROJECT : ZY7
Size Document Number Rev
1A
RX780/RS780-POWER 4/4
Date: Thursday, June 26, 2008 Sheet 11 of 35
5 4 3 2 1
5 4 3 2 1

25 PCIE_RST_EC# R522 33_4


19 PCIE_RST# R524 33_4
10 NB_PLTRST# R525 33_4
19 NEWCARD_RST# R523 33_4
17 MXM_RST# R521 33_4 U30A
R520 33_4
18,21 LAN_RST#
R519 33_4 A_RST#_SB N2
SB700 P4 PCLK_PCM_R R225 22R/04
24 4IN1_RST# A_RST# PCICLK0 PCLK_PCM 23
D Part 1 of 5 P3 PCCLK_DEBUG_R R495 *22R/04 D

PCI CLKS
PCICLK1 T80
9 PCIE_SB_NB_RX0P C613 .1u/10V_4 A_RX0P_C V23 P1 PCI_CLK2_R R493 22R/04 PCI_CLK_TPM 16
C614 .1u/10V_4 A_RX0N_C PCIE_TX0P PCICLK2 PCI_CLK3_R R494 22R/04
9 PCIE_SB_NB_RX0N V22 PCIE_TX0N PCICLK3 P2 PCI_CLK3 16
9 PCIE_SB_NB_RX1P C612 .1u/10V_4 A_RX1P_C V24 T4 PCI_CLK4_R R497 22R/04 PCI_CLK4 16
C611 .1u/10V_4 A_RX1N_C PCIE_TX1P PCICLK4 PCI_CLK5_R R496 22R/04
9 PCIE_SB_NB_RX1N V25 PCIE_TX1N PCICLK5/GPIO41 T3 PCI_CLK5 16
9 PCIE_SB_NB_RX2P C609 .1u/10V_4 A_RX2P_C U25
C610 .1u/10V_4 A_RX2N_C PCIE_TX2P
9 PCIE_SB_NB_RX2N U24 PCIE_TX2N
9 PCIE_SB_NB_RX3P C608 .1u/10V_4 A_RX3P_C T23
C607 .1u/10V_4 A_RX3N_C PCIE_TX3P PCIRST#_L R491 33_4 PCIRST#
9 PCIE_SB_NB_RX3N T22 PCIE_TX3N PCIRST# N1 PCIRST# 19,23

PCI EXPRESS INTERFACE


U22 AD[0..31]
9 PCIE_NB_SB_TX0P PCIE_RX0P AD[0..31] 16,23
U21 U2 AD0
9 PCIE_NB_SB_TX0N PCIE_RX0N AD0
U19 P7 AD1
9 PCIE_NB_SB_TX1P PCIE_RX1P AD1
V19 V4 AD2
9 PCIE_NB_SB_TX1N PCIE_RX1N AD2
R20 T1 AD3 CN18 R445 R444
9 PCIE_NB_SB_TX2P PCIE_RX2P AD3
R21 V3 AD4 1 3RTC_CHG1 RTC_CHG2
9 PCIE_NB_SB_TX2N PCIE_RX2N AD4 +5VPCU
R18 U1 AD5 RTC_CONN
9 PCIE_NB_SB_TX3P PCIE_RX3P AD5
R17 V1 AD6 Q47 16K/F_4 0_4
9 PCIE_NB_SB_TX3N PCIE_RX3N AD6
V2 AD7 MMBT3904 R453

2
R465 562R/04 PCIE_CALRP_SB AD7 AD8 VCCRTC_2 68.1K/F_4
T25 PCIE_CALRP AD8 T2 2 1
R209 2.05K/04 PCIE_CALRN_SB T24 W1 AD9
+1.2V_PCIE_VDDR PCIE_CALRN AD9 AD10 RTC_CHG3 R454 150K_4
AD10 T9
+1.2V L30 BLM18PG221SN1D +1.2V_PCIE_PVDD P24 R6 AD11
PCIE_PVDD AD11 AD12 R430 1K_4
AD12 R7
P25 R5 AD13
C277 C279 PCIE_PVSS AD13 AD14 VCCRTC_1 D32 CH500H
AD14 U8
10U/6.3V/08 1U/10V/04 U5 AD15
AD15 AD16
AD16 Y7
W8 AD17 D33 CH500H VCCRTC
AD17 +3VPCU
V9 AD18
AD18 AD19 C592 .1u/10V_4
AD19 Y8
AA8 AD20
AD20 AD21 C600 4.7U_8
C AD21 Y4 C
Y3 AD22
AD22 AD23 C596 1U/10V/04
AD23 Y2
AA2 AD24
AD24

1
AB4 AD25
AD25 AD26
2 SBSRC_CLKP N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1
N24 AB3 AD27 G1
2 SBSRC_CLKN PCIE_RCLKN/NB_LNK_CLKN AD27
AB2 AD28 *SHORT_ PAD

2
T120 NB_DISP_CLKP AD28 AD29

PCI INTERFACE
K23 NB_DISP_CLKP AD29 AC1
T111 NB_DISP_CLKN K22 AC2 AD30
NB_DISP_CLKN AD30 AD31
AD31 AD1
T110 NB_HT_CLKP M24 W2
NB_HT_CLKP CBE0# CBE0# 23
T109 NB_HT_CLKN M25 U7
NB_HT_CLKN CBE1# CBE1# 23
CBE2# AA7 CBE2# 23
T57 CPU_HT_CLKP P17 Y1
CPU_HT_CLKP CBE3# CBE3# 23
T41 CPU_HT_CLKN M18 AA6
CPU_HT_CLKN FRAME# FRAME# 23
DEVSEL# W5 DEVSEL# 23
T108 SLT_GFX_CLKP M23 AA5
SLT_GFX_CLKP IRDY# IRDY# 23
T107 SLT_GFX_CLKN M22 Y5
SLT_GFX_CLKN TRDY# TRDY# 23
PAR U6 PAR 23
T49 GPP_CLK0P J19 W6 +3V
GPP_CLK0P STOP# STOP# 23
T51 GPP_CLK0N J18 W4
GPP_CLK0N PERR# PERR# 23
V7 SERR#
SERR# T73
T47 GPP_CLK1P L20 AC3 REQ0# GNT3# R482 8.2K_4
GPP_CLK1P REQ0# REQ0# 23
T48 GPP_CLK1N L19 AD4 REQ1#
GPP_CLK1N REQ1# T165
REQ2# R483 *8.2K_4
CLOCK GENERATOR
REQ2# AB7 T65
T58 GPP_CLK2P M19 AE6 REQ3#
GPP_CLK2P REQ3#/GPIO70 T150
T50 GPP_CLK2N M20 AB6 REQ4#
GPP_CLK2N REQ4#/GPIO71 T67
AD2 SB_GPIO65 R479 100K/F_4
GNT0# GNT0# 23
T40 GPP_CLK3P N22 AE4 GNT1#
GPP_CLK3P GNT1# T166
T38 GPP_CLK3N P22 AD5 GNT2#
GPP_CLK3N GNT2# T155
RTC_X1 AC6 GNT3#
GNT3#/GPIO72 T151
T54 L18 AE5 GNT4#
Y5 25M_48M_66M_OSC GNT4#/GPIO73 T149
B AD6 CLKRUN#_R 0_4 R478 B
CLKRUN# CLKRUN# 23,25
3 2 V5 LOCK#
LOCK# T72
R214 *0_4 J21 25M_X1 INTE#
INTE#/GPIO33 AD3 T160
INTF#/GPIO34 AC4 INTA# 23
4 1 RTC_X2 AE2 INTG#
INTG#/GPIO35 T158
R481 T44 J20 AE3 INTH#
25M_X2 INTH#/GPIO36 T162
32.768KHZ LPC_CLK0 16
R194 22_4
PCCLK_DEBUG 19
*20M/06 R480 20M/06 G22
LPCCLK0 LPC_CLK1 16
E22 R467 22_4 LPC_CLK_EC
LPCCLK1 LPC_CLK_EC 25
RTC_X1 A3 H24
RTC XTAL

X1 LAD0 LAD0 19,25


C642 C639 H23
LAD1 LAD1 19,25
18P/50V/04 18P/50V/04 J25
LAD2 LAD2 19,25
J24
LPC

LAD3 LAD3 19,25


RTC_X2 B3 H25
X2 LFRAME# LFRAME# 19,25
H22 LDRQ0#_SB C178
LDRQ0# T39
+1.8V R213 *300_4 AB8 10p_4
LDRQ1#/GNT5#/GPIO68 LDRQ1# 19
AD7 SB_GPIO65
BMREQ#/REQ5#/GPIO65 T148
SERIRQ V15 SERIRQ 19,23,25

10 ALLOW_LDTSTOP F23 ALLOW_LDTSTP


5 SB_PROCHOT# F24 PROCHOT# RTCCLK C3 RTC_CLK 16
5 CPU_PWRGD F22 C2 INTRUDER_ALERT# REV C:Add C178 --0408
LDT_PG T163
RTC

INTRUDER_ALERT#
CPU

5,10 CPU_LDT_STOP# G25 LDT_STP# VBAT B2 VCCRTC


5,10 CPU_LDT_RST# G24 LDT_RST#
1

G2
SB700 *SHORT_ PAD1 C644
.1u/10V_4
2

A A

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev

WWW.AliSaler.Com
1A
SB700-PCIE/PCI/CPU/LPC 1/4
Date: Thursday, June 26, 2008 Sheet 12 of 35
5 4 3 2 1
5 4 3 2 1

Add Pull high RES.--1011


R464 4.7K_4 KBSMI#

13
+3V_S5 +3V
NC only ,Can't be install
R518 *2.2K_4 SB_TEST0
U30D

R233 *2.2K/04 SB_TEST1 Part 4 of 5


E1
SB700
23 PCI_PME# PCI_PME#/GEVENT4#
RI# E2 C8 CLK_48M_USB
T167 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC CLK_48M_USB 2
R232 *2.2K/04 SB_TEST2 SLP_S2 H7
T60 SLP_S2/GPM9#
R224 0_4 F5 G8 USB_RCOMP_SB R219 11.8K/06

USB MISC
D 25 SUSB# SLP_S3# USB_RCOMP D
R492 0_4 G1
25 SUSC# SLP_S5#

ACPI / WAKE UP EVENTS


R517 0_4 H2
25 DNBSWON# PWR_BTN#
H1 R222
+3V_S5 16 SB_PWRGD_IN PWR_GOOD
K3 *10_6
10 SUS_STAT# SUS_STAT#
SB_TEST2 H5 E6
R504 *10K/04 SWI# SB_TEST1 TEST2 USB_FSD13P
H4 TEST1 USB_FSD13N E7
SB_TEST0 H3 TEST0

USB 1.1
GATEA20 Y15 F7 C327
+3V SCL0/SDATA0 25 GATEA20 GA20IN/GEVENT0# USB_FSD12P
is 3V tolerance Clock gen/Robson/TV 25 RCIN# RCIN# W15 E8 *10p_4
KBRST#/GEVENT1# USB_FSD12N
AMD datasheet define it tuner 25 EC_SCI# K4 LPC_PME#/GEVENT3#
KBSMI# K24 H11 for EMI
/DDR2/DDR2 25 KBSMI# LPC_SMI#/EXTEVNT1# USB_HSD11P USBP5+ 19
R472 2.2K_4 PCLK_SMB F1 J10 TV Min-Card
thermal/Accelerometer T164 S3_STATE/GEVENT5# USB_HSD11N USBP5- 19
SYS_RST# J2
R473 2.2K_4 PDAT_SMB PCIE_WAKE# SYS_RESET#/GPM7#
19,21,25 PCIE_WAKE#
SWI#
H6
F2
WAKE#/GEVENT8# USB_HSD10P E11
F11
USBP10+ 19 Fingerprint
T159 BLINK/GPM6# USB_HSD10N USBP10- 19
CPU_THERMTRIP# J6
5 CPU_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2#
WD_PWRGD W14 A11
16 WD_PWRGD NB_PWRGD USB_HSD9P T137
SCL1/SDATA1 is 3V/S5 tolerance USB_HSD9N B11 T136
+3V_S5 R230 0_4 D3
AMD datasheet define it 25 RSMRST# RSMRST#
USB_HSD8P C10 USBP8+ 19
USB_HSD8N D10 USBP8- 19 USB Connector
R488 2.2K_4 MSMB_CLK
R487 2.2K_4 MSMB_DATA Change Net name .-1001 AE18 G11
24 CR_WAKE# SATA_IS0#/GPIO10 USB_HSD7P USBP9+ 26
SATA_IS1 AD18 H12 Docking
T127 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBP9- 26
LAN_DISABLE# AA19
T46 SMARTVOLT/SATA_IS2#/GPIO4
W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBP6+ 19
R515 *0_4 SB_NWD_CLK_REQ# V17 E14 BLUETOOTH
+3V_S5 2,19 NEW_CLKREQ# CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USBP6- 19
SCL2/SDATA2 is 3V/S5 tolerance W20 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
AMD datasheet define it R211 0_4 ACZ_SPKR W21 C12

USB 2.0
22 PCSPK SPKR/GPIO2 USB_HSD5P USBP1+ 19
epress card 2,7,18,19 PCLK_SMB AA18 SCL0/GPOC0# USB_HSD5N D12 USBP1- 19 EXT USB Connector
R210 2.2K_4 SB_SCLK2 W18
2,7,18,19 PDAT_SMB SDA0/GPOC1#
R208 2.2K_4 SB_SDATA2 K1 B12
19,21 MSMB_CLK SCL1/GPOC2# USB_HSD4P USBP4+ 19
K2 A12 EXT USB Connector

GPIO
19,21 MSMB_DATA SDA1/GPOC3# USB_HSD4N USBP4- 19
17 PE_RESET_MXM# AA20 DDC1_SCL/GPIO9
+3V Y18 G12
T53 DDC1_SDA/GPIO8 USB_HSD3P USBP3+ 19
PM_BATLOW# C1 G14 EXT USB Connector
T77 LLB#/GPIO66 USB_HSD3N USBP3- 19
R238 4.7K/04 SUS_STAT# SES_INT Y19
T52 SHUTDOWN#/GPIO5
C R463 *10K_4 SB_NWD_CLK_REQ# GEVENT7# G5 H14 C
T76 DDR3_RST#/GEVENT7# USB_HSD2P USBP2+ 18
USB_HSD2N H15 USBP2- 18 Carama USB
G3
USB_HSD1P A13 USBP7+ 19
2 1 SYS_RST# B13 Wirless Min-Card
USB_HSD1N USBP7- 19

*SHORT_ PAD1 USB_HSD0P B14 USBP0+ 19


CPU_MEMHOT#_IN B9 A14 USB Connector
T138 USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USBP0- 19
R218 *0_4 SMBALERT#_1 B8
5 THERM_ALERT# USB_OC5#/IR_TX0/GPM5#
R476 *10K_4 A8 A18

USB OC
+3V USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
SB_JTAG_TDO A9 B18
SB_JTAG_TCK USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
CPPE#_EC F8 D21 SB_SCLK2
19 CPPE#_EC USB_OC1#/GPM1# SCL2/IMC_GPIO11
Add HDA for MXM.-- Ver D: Change---0520 SB_JTAG_RST# E4 F19 SB_SDATA2
USB_OC0#/GPM0# SDA2/IMC_GPIO12 SB_SCLK3
E20 T43
1015 ACZ_BCLK M1
SCL3_LV/IMC_GPIO13
E21 SB_SDATA3
To Azalia ACZ_SDOUT
ACZ_SDIN0_R
M2
J7
AZ_BITCLK
AZ_SDOUT
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15 E19
D19
T45

AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 SB_GPIO16 16


ACZ_SDOUT R511 33R/04 ACZ_SDIN1_R SPI/LPC define

HD AUDIO
ACZ_SDOUT_AUDIO 22 J8 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 E18 SB_GPIO17 16
ACZ_SDIN2_R L8
R490 *EV^33R/04 T152 AZ_SDIN2/GPIO44
ACZ_SDOUT_MXM 17 M3 AZ_SDIN3/GPIO46 IMC_GPIO18 G20
ACZ_SYNC L6 G21
AZ_SYNC IMC_GPIO19
16 ACZ_RST# M4 AZ_RST# IMC_GPIO20 D25

INTEGRATED uC
ACZ_SYNC R242 33R/04 L5 D24
ACZ_SYNC_AUDIO 22 AZ_DOCK_RST#/GPM8# IMC_GPIO21
HD audio IMC_GPIO22 C25
R243 *EV^33R/04 interface is C24
ACZ_SYNC_MXM 17 IMC_GPIO23
3.3V voltage IMC_GPIO24 B25
IMC_GPIO25 C23
ACZ_BCLK R505 33R/04
ACZ_BITCLK_AUDIO 22
IMC_GPIO26 B24
R489 *EV^33R/04 B23
ACZ_BITCLK_MXM 17 IMC_GPIO27
IMC_GPIO28 A23
IMC_GPIO29 C22
ACZ_RST# R236 33R/04 A22
ACZ_RESET#_AUDIO 22 IMC_GPIO30
IMC_GPIO31 B22
R235 *EV^33R/04 B21
ACZ_RESET#_MXM 17 IMC_GPIO32
IMC_GPIO33 A21
+VDD33_18 H19 D20
IMC_GPIO0 IMC_GPIO34

INTEGRATED uC
B B
T171 MXM_RUNPWROKH20 C20
ACZ_SDIN2_R R217 0R/04 T170 IMC_GPIO1 IMC_GPIO35
ACZ_SDIN2 17 H21 SPI_CS2#/IMC_GPIO2 IMC_GPIO36 A20
R206 22K/04 HDD_AUX_RST# F25 B20
IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37
IMC_GPIO38 B19
MXM_PWR_EN D22 A19
ACZ_SDIN0_R R221 0R/04 T169 IMC_GPIO4 IMC_GPIO39
ACZ_SDIN0 22 E24 IMC_GPIO5 IMC_GPIO40 D18
E25 IMC_GPIO6 IMC_GPIO41 C18
D23 IMC_GPIO7
Add GPIO pin.--1008

To Modem Board SB700

ACZ_SDOUT R510 33R/04


ACZ_SDOUT_MDC 22
ACZ_SYNC R240 33R/04 +3V_S5
ACZ_SYNC_MDC 22
ACZ_BCLK R506 33R/04 C319
ACZ_BITCLK_MDC 22 CN8
10p_4
ACZ_RST# R237 33R/04
ACZ_RESET#_MDC 22 1 SB_JTAG_TCK
ACZ_SDIN1_R R241 0R/04 2 SB_JTAG_TDO
ACZ_SDIN1 22 3 CPPE#_EC
SB JTAG 4
5
SB_TEST1
6 SB_JTAG_RST#
7
8

*S/W JTAG DEBUG


For EMI
ACZ_SDOUT C650 *10p_4

ACZ_SYNC C344 *10p_4

A ACZ_BCLK C649 *10p_4 A

ACZ_RST# C345 *10p_4

ACZ_SDIN0_R C329 *10p_4

ACZ_SDIN1_R C336 *10p_4

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
1A
SB700-ACPI/GPIO/USB 2/4
Date: Thursday, June 26, 2008 Sheet 13 of 35
5 4 3 2 1
5 4 3 2 1

SATA PORT 0,1,2,3


can support AHCI
mode
PLACE SATA AC COUPLING
CAPS CLOSE TO SB600

C638 .01u/16V_4 SATA_TXP0_C


U30B

SB700
14
20 SATA_TXP0 AD9 SATA_TX0P IDE_IORDY AA24 T116
C637 .01u/16V_4 SATA_TXN0_C Part 2 of 5
SATA1 20 SATA_TXN0 AE9 SATA_TX0N IDE_IRQ AA25
Y22
T115
IDE_A0 T42
C636 .01u/16V_4 SATA_RXN0_C AB10 AB23 IF THERE IS NO IDE, TEST
D 20 SATA_RXN0 SATA_RX0N IDE_A1 T118 D
C635 .01u/16V_4 SATA_RXP0_C AC10 Y23
20 SATA_RXP0 SATA_RX0P IDE_A2 T113 POINTS FOR DEBUG BUS
IDE_DACK# AB24 T119
20 SATA_TXP1
C634 .01u/16V_4 SATA_TXP1_C AE10 SATA_TX1P IDE_DRQ AD25 T121 IS MANDATORY
C633 .01u/16V_4 SATA_TXN1_C
SATA2 20 SATA_TXN1 AD10 SATA_TX1N IDE_IOR# AC25
AC24
T117
IDE_IOW# T124
C631 .01u/16V_4 SATA_RXN1_C AD11 Y25
20 SATA_RXN1 SATA_RX1N IDE_CS1# T112
C630 .01u/16V_4 SATA_RXP1_C AE11 Y24
20 SATA_RXP1 SATA_RX1P IDE_CS3# T114
AB12 SATA_TX2P IDE_D0/GPIO15 AD24 T123
AC12 SATA_TX2N IDE_D1/GPIO16 AD23 T122

ATA 66/100/133
IDE_D2/GPIO17 AE22 T126
AE12 SATA_RX2N IDE_D3/GPIO18 AC22 T125
AD12 SATA_RX2P IDE_D4/GPIO19 AD21 T128
IDE_D5/GPIO20 AE20 T132
AD13 AB20

SERIAL ATA
SATA_TX3P IDE_D6/GPIO21 T130
AE13 SATA_TX3N IDE_D7/GPIO22 AD19 T134
IDE_D8/GPIO23 AE19 T133
AB14 SATA_RX3N IDE_D9/GPIO24 AC20 T131
AC14 AD20 +3V R468 *10K_4 BOARD_ID0 R471 *10K_4
SATA_RX3P IDE_D10/GPIO25 T129
AE21 BOARD_ID0
C304 .01u/16V_4 SATA_TXP4_C IDE_D11/GPIO26 BOARD_ID1
20 SATA_TXP4 AE14 SATA_TX4P IDE_D12/GPIO27 AB22
C305 .01u/16V_4 SATA_TXN4_C AD14 AD22 BOARD_ID2 R187 *10K_4 BOARD_ID1 R188 *10K_4
20 SATA_TXN4 SATA_TX4N IDE_D13/GPIO28 BOARD_ID3
SATA ODD C306 .01u/16V_4 SATA_RXN4_C AD15
IDE_D14/GPIO29 AE23
AC23 BOARD_ID4
20 SATA_RXN4 SATA_RX4N IDE_D15/GPIO30
C303 .01u/16V_4 SATA_RXP4_C AE15 R203 *10K_4 BOARD_ID2 R205 *10K_4
20 SATA_RXP4 SATA_RX4P
AB16 SATA_TX5P
AC16 R189 *10K_4 BOARD_ID3 R190 *10K_4
SATA_TX5N
SPI_DI/GPIO12 G6 T64
AE16 SATA_RX5N SPI_DO/GPIO11 D2 T157
C AD16 D1 C
SATA_RX5P SPI_CLK/GPIO47 T156
F4

SPI ROM
SPI_HOLD#/GPIO31 T74
R216 1K/F_4 SATA_RBIAS_PN V12 F3
SATA_CAL SPI_CS#/GPIO32 T161
R202 *EV@10K_4 BOARD_ID4 R204 *IV@1K_4
PLVDD_SATA-- SATA_X1 Y12 U15 LAN_RST#_SB
SATA_X1 LAN_RST#/GPIO13 T55
SATA PLL J1 ROM_RST#
ROM_RST#/GPIO14 T154
PLACE SATA_CAL SATA_X2 AA12
POWER SATA_X2
M8 SB_FANOUT0
RES VERY CLOSE SB_SATA_LED# W11
FANOUT0/GPIO3
M5 CR_CPPE#
T62
20 SB_SATA_LED# SATA_ACT#/GPIO67 FANOUT1/GPIO48 CR_CPPE# 24
TO BALL OF SB700 FANOUT2/GPIO49 M7 MXM_PRESENT#
R220 10K/04 MXM_PRESENT# 17
+3V
SB_FANTACH0
NOTE:

SATA PWR
+1.2V_PLLVDD_SATA AA11 PLLVDD_SATA FANIN0/GPIO50 P5 T75
P8 SB_FANTACH1
FANIN1/GPIO51 T61
R361 IS 1K 1% FOR 25MHz +3V_XTLVDD_SATA W12 R8 PORT_80_PWR_DWN
XTLVDD_SATA FANIN2/GPIO52 T66
XTAL, 4.99K 1% FOR 100MHz XTLVDD_SATA-- SATA C6 TEMP_COMM
TEMP_COMM T142
INTERNAL CLOCK crystal power TEMPIN0/GPIO61 B6 TEMPIN0
T141
A6 TEMPIN1
TEMPIN1/GPIO62 T140

HW MONITOR
A5 MB_THRMDA_SB
TEMPIN2/GPIO63 T143
C320 B5
TEMPIN3/TALERT#/GPIO64 T145
SATA_X1
A4 VIN0
VIN0/GPIO53 T147
10p_4 B4 VIN1
VIN1/GPIO54 T146
2

Y2 C4 VIN2
VIN2/GPIO55 T153
R215 D4 VIN3
VIN3/GPIO56 T70
25MHZ 10M/06 D5 VIN4
VIN4/GPIO57 T68
D6 VIN5
T69
1

C310 VIN5/GPIO58 VIN6


VIN6/GPIO59 A7 T144
SATA_X2 B7 VIN7
VIN7/GPIO60 T139
B 10p_4 +3V_S5 B
Change from +3V to +3V_S5.--1212
5mA +3V_VDD_HWM L37 0_6
AVDD F6

SB700 G7 AVDD--H/W monitor


AVSS
Analog power

+1.2V ( 1.2V @ 60mA) +1.2V_PLLVDD_SATA 77mA


L35
BLM18PG221SN1D
1

C323 C325
2.2U/6.3V/06 .1u/10V_4
2

+3V 1mA
( 3.3V @ 1.2mA) +3V_XTLVDD_SATA

L34
BLM18PG221SN1D

A C318 A
1U/10V/04

Place near
ball
Quanta Computer Inc.
PROJECT : ZY7
Size Document Number Rev
1A

WWW.AliSaler.Com 5 4 3 2
Date:
SB700-SATA/IDE/HWM/SPI 3/4
Thursday, June 26, 2008 Sheet
1
14 of 35
5 4 3 2 1

D D

PLACE ALL THE DECOUPLING CAPS ON

23
THIS SHEET CLOSE TO SB AS POSSIBLE.

VDD-- S/B CORE power


+3.3V_SB_R U30C +1.2V_VCC_SB_R
R227 0R/08 VDDQ--3.3V I/O power 0.8A 604mA R200
2 1 L9
SB700 L15 2 1 0_8 U30E
+3V VDDQ_1 VDD_1 +1.2V
M9 VDDQ_2 Part 3 of 5 VDD_2 M12
1

T15 VDDQ_3 VDD_3 M14 SB700


1

1
C338 U9 N13 A2

CORE S0
C342 C300 C328 C326 C311 C332 C308 VDDQ_4 VDD_4 C316 C322 C321 C317 C280 VSS_1
U16 P12 A25

PCI/GPIO I/O
100U/6.3V_3528 10U/6.3V/08 1U/10V/04 1U/10V/04 1U/10V/04 1U/10V/04 1U/10V/04 1U/10V/04 VDDQ_5 VDD_5 1U/10V/04 1U/10V/04 1U/10V/04 1U/10V/04 22U-10V_8 VSS_2
U17 P14 B1
2

2
VDDQ_6 VDD_6 VSS_3
V8 VDDQ_7 VDD_7 R11 VSS_4 D7
W7 VDDQ_8 VDD_8 R15 T10 AVSS_SATA_1 VSS_5 F20
Y6 VDDQ_9 VDD_9 T16 U10 AVSS_SATA_2 VSS_6 G19
1.8V : FLASH MEMORY MODE(DEFAULT) AA4 VDDQ_10 U11 AVSS_SATA_3 VSS_7 H8
AB5 U12 K9
3.3V: IDE MODE AB21
VDDQ_11
CKVDD_1.2V-- Internal V11
AVSS_SATA_4 VSS_8
K11
VDDQ_12 AVSS_SATA_5 VSS_9
clock Generator I/O V14 AVSS_SATA_6 VSS_10 K16
+VDD33_18 +1.2V_CKVDD W9 L4
VDD33_18--3.3V IDE I/O power power L28 AVSS_SATA_7 VSS_11
Y9 AVSS_SATA_8 VSS_12 L7
1.8V flash memory I/O power 0.45A 286mA BLM18PG221SN1D Y11 L10
R201 2 AVSS_SATA_9 VSS_13
+3V 1 0_8 Y20 VDD33_18_1 CKVDD_1.2V_1 L21 +1.2V Y14 AVSS_SATA_10 VSS_14 L11
AA21 L22 Y17 L12

IDE/FLSH I/O

CLKGEN I/O
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_11 VSS_15
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 AA9 AVSS_SATA_12 VSS_16 L14
1

1
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB9 AVSS_SATA_13 VSS_17 L16
C278 C282 C290 C292 C291 C285 C283 C284 C295 AB11 M6
10U/6.3V/08 1U/10V/04 1U/10V/04 1U/10V/04 1U/10V/04 2.2U/6.3V/06 AVSS_SATA_14 VSS_18
AB13 M10
2

2
2.2U/6.3V/06 2.2U/6.3V/06 2.2U/6.3V/06 AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
C AB17 AVSS_SATA_17 VSS_21 M13 C
AC8 AVSS_SATA_18 VSS_22 M15
AD8 AVSS_SATA_19 VSS_23 N4
AE8 N12
+1.2V_PCIE_VDDR
POWER AVSS_SATA_20 VSS_24
VSS_25 N14
L29 P6
BLM18PG221SN1D VSS_26
PCIE_VDDR--PCIE I/O power 844mA VSS_27 P9
+1.2V P18 PCIE_VDDR_1
S5_3.3--3.3v standby power VSS_28 P10
P19 +3VALW_R A15 P11
PCIE_VDDR_2 R474 0R/6 AVSS_USB_1 VSS_29

A-LINK I/O
P20 PCIE_VDDR_3 0.01A B15 AVSS_USB_2 VSS_30 P13
1

P21 PCIE_VDDR_4 S5_3.3V_1 A17 2 1 +3V_S5 C14 AVSS_USB_3 VSS_31 P15


C281 C287 C299 C296 C298 C301 R22 A24 D8 R1
22U-10V_8 1U/10V/04 1U/10V/04 1U/10V/04.1u/10V_4 .1u/10V_4 PCIE_VDDR_5 S5_3.3V_2 Change to 0603 AVSS_USB_4 VSS_32
R24 B17 D9 R2
2

PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_5 VSS_33

1
3.3V_S5 I/O
R25 PCIE_VDDR_7 S5_3.3V_4 J4 D11 AVSS_USB_6 VSS_34 R4
J5 C302 C337 C615 D13 R9
S5_3.3V_5 AVSS_USB_7 VSS_35

GROUND
L1 1U/10V/04 1U/10V/04 22U-10V_8 D14 R10

2
S5_3.3V_6 AVSS_USB_8 VSS_36
S5_3.3V_7 L2 D15 AVSS_USB_9 VSS_37 R12
L58 +1.2V_AVDD_SATA E15 R14
BLM18PG221SN1D AVSS_USB_10 VSS_38
AVDD_SATA--SATA phy power 0.2A F12 AVSS_USB_11 VSS_39 T11
+1.2V AA14 AVDD_SATA_1
S5_1.2V--1.2V standby power F14 AVSS_USB_12 VSS_40 T12
AB18 +1.2VALW_R G9 T14
AVDD_SATA_4 R501 0R/6 AVSS_USB_13 VSS_41
AA15 0.22A H9 U4

SATA I/O
AVDD_SATA_2 AVSS_USB_14 VSS_42
1

AA17 G2 2 1 +1.2V_S5 H17 U14

CORE S5
C624 C616 C307 C312 C622 AVDD_SATA_3 S5_1.2V_1 AVSS_USB_15 VSS_43
AC18 AVDD_SATA_5 S5_1.2V_2 G4 J9 AVSS_USB_16 VSS_44 V6

1
22U-10V_8 .1u/10V_4 .1u/10V_4 1U/10V/04 1U/10V/04 AD17 J11 Y21
2

AVDD_SATA_6 C339 C343 AVSS_USB_17 VSS_45


AE17 AVDD_SATA_7 J12 AVSS_USB_18 VSS_46 AB1
0.2A 1U/10V/04 1U/10V/04 J14 AB19

2
AVSS_USB_19 VSS_47
USB_PHY_1.2V_1 A10 +1.2V_USB_PHY_R J15 AVSS_USB_20 VSS_48 AB25
USB_PHY_1.2V_2 B10 K10 AVSS_USB_21 VSS_49 AE1
K12 AVSS_USB_22 VSS_50 AE24
K14 AVSS_USB_23
+3V_AVDD_USB K15 AVSS_USB_24
AVDDTX--USB Phy PCIE_CK_VSS_9 P23
L59 Analog I/O power V5_VREF--PCI 5V TOLERANCE R16
BLM18PG221SN1D PCIE_CK_VSS_10
0.2A +5V_VREF
4mA R477 PCIE_CK_VSS_11 R19
B +3V_S5 A16 AVDDTX_0 V5_VREF AE7 1 2 1K/04 +5V PCIE_CK_VSS_12 T17 B
B16 AVDDTX_1 PCIE_CK_VSS_13 U18
C16 AVDDTX_2 AVDDCK_3.3V J16 +3V_AVDDCK 7mA H18 PCIE_CK_VSS_1 PCIE_CK_VSS_14 U20
1

D16 AVDDTX_3 1 2 +3V J17 PCIE_CK_VSS_2 PCIE_CK_VSS_15 V18

1
C627 C625 C313 C314 D17 K17 44mA D36 J22 V20
PLL

AVDDTX_4 AVDDCK_1.2V +1.2V_AVDDCK PCIE_CK_VSS_3 PCIE_CK_VSS_16


22U-10V_8 22U-10V_8 .1u/10V_4 .1u/10V_4 E17 C640 CH501H-40PT L-F K25 V21
2

AVDDTX_5 PCIE_CK_VSS_4 PCIE_CK_VSS_17


USB I/O

For support USB wakeup-->3V_S5 F15 E9 +3V_AVDDC 1U/10V/04 M16 W19

2
AVDDRX_0 AVDDC PCIE_CK_VSS_5 PCIE_CK_VSS_18
F17 AVDDRX_1 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22
F18 AVDDRX_2 16mA M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
G15 AVDDRX_3 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W25
G17 AVDDRX_4
G18 AVDDRX_5 F9 AVSSC AVSSCK L17
Part 5 of 5
1

C619 C618 C628 C621 C629 C620 C626 SB700


1U/10V/04 1U/10V/04 1U/10V/04 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4
2

SB700

+3V_S5 L36 +3V_AVDDC


+1.2V_S5 +1.2V_USB_PHY_R BLM18PG221SN1D AVDDC--USB Analog PLL power
R475 0_6 USB_PHY_1.2V--USB Phy
2 1 digital power
1

C333 1 C334
1

C632 .1u/10V_4
2

2
C331 C330 10U/6.3V/08 2.2U/6.3V/06
1U/10V/04 1U/10V/04
2

A A
+1.2V
+1.2V_AVDDCK +3V +3V_AVDDCK
L31 AVDDCK_1.2--USB Phy L33 AVDDCK_3.3--Analog
BLM18PG221SN1D digital power BLM18PG221SN1D system PLL power
1

C309 C315
2.2U/6.3V/06 2.2U/6.3V/06
Quanta Computer Inc.
2

PROJECT : ZY7
Size Document Number Rev
1A
SB700-PWR/DECOUPLING 4/4
Date: Thursday, June 26, 2008 Sheet 15 of 35
5 4 3 2 1
5 4 3 2 1

OVERLAP COMMON PADS WHERE


POSSIBLE FOR DUAL-OP RESISTORS. 16
It must ready
REV C:Add C684 and C696 --0408
refore RSMRST#
+3V_S5
D D
+3V

1
+3V +3V_S5
Maybe can be remove -- internla pull up
R469
2.2K_4 check AMD
REQUIRED STRAPS

2
1

1
C684 C696
R527
10K/04 330p_4 330p_4 R526 R486
10K/04 *10K_4 13 SB_GPIO17

2
13 SB_GPIO16

2
12 PCI_CLK_TPM 12 PCI_CLK4
12 LPC_CLK0 12 RTC_CLK

1
12 PCI_CLK3
12 PCI_CLK5 12 LPC_CLK1 13 ACZ_RST#
GPIO16 R470 R212
*2.2K/04 2.2K/04 GPIO17
1

2
1

1
R512

1
10K/04
R513 R528 R226
2

10K/04 *10K_4 R514 R199 R466 10K/04 TYPE GPIO16 GPIO17


*10K_4 10K/04 10K/04
2

2
2

2
FWH L : 2.2K L : 2.2K
pull down pull down

C
PCI_CLK_TPM PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 RTC_CLK AZ_RST# C
LPC NC L : 2.2K
pull down
PULL BOOTFAIL USE RESERVED RESERVED ENABLE PCI CLKGEN INTERNAL EC
HIGH TIMER DEBUG MEM BOOT ENABLED RTC ENABLED
L : 2.2K
ENABLED STRAPS SPI NC
pull down
DEFAULT

EXT. RTC
PULL BOOTFAIL IGNORE DISABLE PCI CLKGEN (PD on X1, EC
LOW TIMER DEBUG MEM BOOT DISABLED apply DISABLED RSVD NC NC
DISABLED STRAPS 32KHz to DEFAULT
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)

NB_PWRGD_IN:
RS780/RX780 = 1.8V; RS740 = 3.3V
DEBUG STRAPS SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23] +3V_S5 R185 10K/04 Do NOT share it with SB_PWRGD when use Internal Clk Gen
(Need SB PLL initialize firstly)

+3V R181 *10K_4 R186 0_4 SB_PWRGD_IN


SB_PWRGD_IN 13

C265 +1.8V
*2.2U/6.3V_6
B B
12,23 AD28 +1.8V
12,23 AD27 R182 Change Value follow AMD CRB.--1029
12,23 AD26 *0_4
12,23 AD25 U7 R180
12,23 AD24 1 5 C253 .1u/10V_4 300_4
D5 CH501H-40PT L-F NC VCC RX780,RS780
12,23 AD23
5,29,32 CPU_COREPG 1 2 2 A
3 4 R179 *33_4 NB_PWRGD_IN
GND Y NB_PWRGD_IN 10
R500 R509 R499 R507 R508 R498
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 D4 CH501H-40PT L-F *NL17SZ17DFT2G
1 2 SOT-353
17,25 PWROK_EC

Change Pull down RES from 10k to 2.2k.-1001

0_4 R183
13 WD_PWRGD
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
C641
REV B: U7,R179 unstuff,PR183 stuff,follow A1-2chip .--0202
USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED 1000P_4
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET NB/SB POWER GOOD CIRCUIT
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
REV B: Add 1N Capacitor to Smoothing NB_PWRGD_IN ---0202
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM
A AL17SZ17000 IC(5P) NL17SZ17DFT2G(SOT-353) SOT-353 A
LOW SHORT PCI PLL ACPI PLL PCIE STRAPS
RESET BCLK ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5) SOT23-5

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
1A

WWW.AliSaler.Com 5 4 3 2
Date:
SB700-STRAPS,PWRGD
Thursday, June 26, 2008 Sheet
1
16 of 35
5 4 3 2 1

CN16B

LVDS_TXUCK# 148 207 HDMI_CLK#


LVDS_TXUCK LVDS_UCLK# HDMI_DVI_CLK# / DVI_A_CLK# HDMI_CLK VIN CN16A
150 LVDS_UCLK HDMI_DVI_CLK / DVI_A_CLK 209

*EV^10u/25V_1206 C603 1 125


LVDS_TXU0# HDMI_TX0# PWR_SRC CLK_REQ#
172 LVDS_UTX0# HDMI_DVI_TX0# / DVI_A_TX0# 225 3 PWR_SRC
LVDS_TXU1# 166 219 HDMI_TX1# *EV^.1u/25V_6 C591 5 R397 *0_4
LVDS_UTX1# HDMI_DVI_TX1# / DVI_A_TX1# PWR_SRC PE_RESET_MXM# 13
LVDS_TXU2# 160 213 HDMI_TX2# *EV^1000p_4 C586 7
LVDS_UTX2# HDMI_DVI_TX2# / DVI_A_TX2# PWR_SRC R398 *EV^0_4

DVI-A
154 LVDS_UTX3# 9 PWR_SRC PEX_RST# 127 MXM_RST# 12
REV B:Del MXM_POWEREN circuit 11 PWR_SRC
227 HDMI_TX0 13
follow AMD request--0214 LVDS_TXU0 174
HDMI_DVI_TX0 / DVI_A_TX0
221 HDMI_TX1 15
PWR_SRC
LVDS_TXU1 LVDS_UTX0 HDMI_DVI_TX1 / DVI_A_TX1 HDMI_TX2 PWR_SRC
168 LVDS_UTX1 HDMI_DVI_TX2 / DVI_A_TX2 215 PEX_REFCLK# 121 CLK_PCIE_MXM# 2
LVDS_TXU2 162 *EV^1u/10V_4 C582 +5V 123
LVDS_UTX2 PEX_REFCLK CLK_PCIE_MXM 2
156 205 HDMI_HPD *EV^.1u/16V_4 C583
LVDS_UTX3 HDMI_DVI_HPD / DVI_A_HPD *EV^1000p_4 C581

DVI / HDMI
18 5VRUN PEG_RXN[15:0] 9
+3V

LVDS
LVDS_TXLCK# 178 115 PEG_RXN0
D
LVDS_TXLCK LVDS_LCLK# HDMI_DCCLK PEX_RX0# PEG_RXN1 D
180 LVDS_LCLK DDCB_CLK 220 PEX_RX1# 109
218 HDMI_DCDATA *EV^10u/6.3V_6 C487 226 103 PEG_RXN2
DDCB_DAT *EV^.1u/16V_4 C488 3V3RUN PEX_RX2# PEG_RXN3
228 3V3RUN PEX_RX3# 97
LVDS_TXL0# 202 *EV^1000p_4 C489 230 91 PEG_RXN4
LVDS_TXL1# LVDS_LTX0# 3V3RUN PEX_RX4# PEG_RXN5
196 LVDS_LTX1# PEX_RX5# 85
LVDS_TXL2# 190 177 +2.5V 79 PEG_RXN6
LVDS_LTX2# DP_L0 / IGP/DVI_B_CLK# *EV^1u/10V_4 C496 PEX_RX6# PEG_RXN7
184 LVDS_LTX3# DP_L0# / IGP/DVI_B_CLK 179 PEX_RX7# 73
*EV^.1u/16V_4 C495 222 67 PEG_RXN8
*EV^1000p_4 C493 2V5RUN PEX_RX8# PEG_RXN9

DVI-B
PEX_RX9# 61
LVDS_TXL0 204 201 +1.8V 55 PEG_RXN10
LVDS_TXL1 LVDS_LTX0 DP_L1 / IGP/DVI_B_TX0# PEX_RX10# PEG_RXN11
198 LVDS_LTX1 DP_L2 / IGP/DVI_B_TX1# 195 PEX_RX11# 49
LVDS_TXL2 192 189 2 43 PEG_RXN12
LVDS_LTX2 DP_L3 / IGP_/DVI_B_TX2# *EV^100u/6.3V_3528 C604 1V8RUN PEX_RX12# PEG_RXN13
186 LVDS_LTX3 4 1V8RUN PEX_RX13# 37
PEG_RXN14

+
6 1V8RUN PEX_RX14# 31
LCD_ON 212 203 *EV^10u/10V_8 C598 8 25 PEG_RXN15
LVDS_BLON LVDS_PPEN DP_L1# / IGP/DVI_B_TX0 *EV^10u/10V_8 C595 1V8RUN PEX_RX15#
216 LVDS_BLEN DP_L2# / IGP/DVI_B_TX1 197 10 1V8RUN
214 191 *EV^.1u/16V_4 C589 12
LVDS_BL_BRGHT DP_L3# / IGP_DVI_B_TX2 1V8RUN PEG_RXP[15:0] 9
EV_LVDS_BL_BRGHT 14
18 EV_LVDS_BL_BRGHT 1V8RUN
LCD_EDIDCLK 210 181 DVI_B_HPD R365 *EV^100K_4 117 PEG_RXP0
LCD_EDIDDAT DDCC_CLK DP_HPD / DVI_B_HPD/GND PEX_RX0 PEG_RXP1
208 DDCC_DAT PEX_RX1 111
17 105 PEG_RXP2
GND PEX_RX2 PEG_RXP3
19 GND PEX_RX3 99
R390 20 93 PEG_RXP4
CRTHSYNC SDIN2_MXM *EV^22_4 GND PEX_RX4 PEG_RXP5
139 VGA_HSYNC HDA_SDI / IGP 147 ACZ_SDIN2 13 21 GND PEX_RX5 87
CRTVSYNC 141 149 R607 *0_4 22 81 PEG_RXP6
VGA_VSYNC HDA_SDO / IGP ACZ_SDOUT_MXM 13 GND PEX_RX6
151 23 75 PEG_RXP7
IGP_RSVD / IGP GND PEX_RX7

CRT
VGA_RED 136 159 24 69 PEG_RXP8
VGA_GRN VGA_RED DP_AUX# / IGP GND PEX_RX8 PEG_RXP9
140 VGA_GREEN DP_AUX / IGP 161 29 GND PEX_RX9 63
VGA_BLU 144 163 32 57 PEG_RXP10
VGA_BLUE IGP_RSVD / IGP GND PEX_RX10 PEG_RXP11
IGP_RSVD / IGP 165 35 GND PEX_RX11 51
CRTDCLK 143 167 38 45 PEG_RXP12
CRTDDAT DDCA_CLK IGP_RSVD / IGP GND PEX_RX12 PEG_RXP13
145 DDCA_DAT IGP_RSVD / IGP 169 41 GND PEX_RX13 39
171 44 33 PEG_RXP14
IGP_RSVD / IGP GND PEX_RX14 PEG_RXP15
IGP_RSVD / IGP 173 47 GND PEX_RX15 27
50 GND
128 TV_Y/HDTV_Y/TV_CVBS RSVD 185 53 GND
RSVD 183 56 GND

TV
124 TV_C/HDTV_Pr IGP_RSVD / RSVD 155 59 GND PEG_TXN[15:0] 9
IGP_RSVD / RSVD 153 62 GND
C 132 131 R608 *0_4 65 118 PEG_TXN0 C
TV_CVBS/HDTV_Pb HDA_BCLK / RSVD ACZ_BITCLK_MXM 13 GND PEX_TX0#
129 R609 *0_4 68 112 PEG_TXN1
HDA_SYNC / RSVD ACZ_SYNC_MXM 13 GND PEX_TX1#
71 106 PEG_TXN2
R443 *EV^0_4 GND PEX_TX2# PEG_TXN3
PWROK_EC 16,25 74 GND PEX_TX3# 100
VGA_THERM# 137 16 77 94 PEG_TXN4
20,25 VGA_THERM# THERM# RUNPWROK GND PEX_TX4#
80 88 PEG_TXN5
GND PEX_TX5# PEG_TXN6
18,25 MXM_DATA 3 1 133 SMB_DAT AC/BATT# 157 83 GND PEX_TX6# 82
135 R461 *0_4 86 76 PEG_TXN7
SMB_CLK PWROK_MXM 25 GND PEX_TX7#
Q42 89 70 PEG_TXN8
*EV^2N7002 D30 *BAS316 ACIN GND PEX_TX8# PEG_TXN9
92 64
2

*EV^MXM_TYPEII GND PEX_TX9# PEG_TXN10


95 GND PEX_TX10# 58
R386 *10K_4 98 52 PEG_TXN11
+3V +3V GND PEX_TX11#
Q43 101 46 PEG_TXN12
GND PEX_TX12#
2

*EV^2N7002 104 40 PEG_TXN13


13 ACZ_RESET#_MXM GND PEX_TX13#
107 34 PEG_TXN14
VTHM_CLK GND PEX_TX14# PEG_TXN15
18,25 MXM_CLK 3 1 110 GND PEX_TX15# 28

R610
3 1 113

47K
GND
116 GND PEG_TXP[15:0] 9
R378 119

10K
Q38 *0_4 GND PEG_TXP0
126 GND PEX_TX0 120
*EV^10K_4 130 114 PEG_TXP1
*EV^DTA114YUA GND PEX_TX1 PEG_TXP2
134 108

2
HDA_RST# / GND PEX_TX2 PEG_TXP3
138 GND PEX_TX3 102
142 96 PEG_TXP4
GND PEX_TX4

3
146 90 PEG_TXP5
GND PEX_TX5 PEG_TXP6
152 GND PEX_TX6 84
158 78 PEG_TXP7
SPDIF / GND PEX_TX7 PEG_TXP8
2 ACIN 25,27 164 GND PEX_TX8 72
Q39 170 66 PEG_TXP9
GND PEX_TX9 PEG_TXP10
175 GND PEX_TX10 60
*EV^2N7002 176 54 PEG_TXP11
GND PEX_TX11 PEG_TXP12

MXM_SPDIF_OUT
182 48

1
GND PEX_TX12 PEG_TXP13
187 GND PEX_TX13 42
188 36 PEG_TXP14
GND PEX_TX14 PEG_TXP15
193 GND PEX_TX15 30
194 GND
199 GND
200 GND PAD1 231
206 GND
B
211 GND PAD2 232 B
22 MXM_SPDIF_OUT 217 GND
223 GND
224 GND PRSNT1# 122 MXM_PRESENT# 14
229 26 R396 *EV^0_4
GND PRSNT2#

*EV^MXM_TYPEII

RN24 1 2 IV^0_4P2R
18 LVDS_TXLCK# INT_TXLCLKOUT# 10
18 LVDS_TXLCK 3 4 INT_TXLCLKOUT 10
R394 IV^0_4
10 INT_CRT_RED VGA_RED 18
R392 IV^0_4 RN21 1 2 IV^0_4P2R
10 INT_CRT_GRN VGA_GRN 18 18 LVDS_TXL0# INT_TXLOUT0# 10
R391 IV^0_4 3 4
10 INT_CRT_BLU VGA_BLU 18 18 LVDS_TXL0 INT_TXLOUT0 10
RN22 1 2 IV^0_4P2R
18 LVDS_TXL1# INT_TXLOUT1# 10
R120 IV^0_4 3 4
10 INT_HSYNC CRTHSYNC 18 18 LVDS_TXL1 INT_TXLOUT1 10
R121 IV^0_4
10 INT_VSYNC CRTVSYNC 18
RN23 1 2 IV^0_4P2R
18 LVDS_TXL2# INT_TXLOUT2# 10
18 LVDS_TXL2 3 4 INT_TXLOUT2 10
R119 IV^0_4 RN28 1 2 IV^0_4P2R
10 INT_CRT_DDCCLK CRTDCLK 18 18 LVDS_TXUCK# INT_TXUCLKOUT# 10
R118 IV^0_4 3 4
10 INT_CRT_DDCDAT CRTDDAT 18 18 LVDS_TXUCK INT_TXUCLKOUT 10
RN25 1 2 IV^0_4P2R
18 LVDS_TXU0# INT_TXUOUT0# 10
18 LVDS_TXU0 3 4 INT_TXUOUT0 10
RN26 1 2 IV^0_4P2R
18 LVDS_TXU1# INT_TXUOUT1# 10
R356 IV^0_4 3 4
10 INT_LVDS_BLON LVDS_BLON 18 18 LVDS_TXU1 INT_TXUOUT1 10
R359 IV^0_4
10 INT_LVDS_DIGON LCD_ON 18
RN27 1 2 IV^0_4P2R
18 LVDS_TXU2# INT_TXUOUT2# 10
18 LVDS_TXU2 3 4 INT_TXUOUT2 10
RN20 IV^0_4P2R
10 INT_LVDS_EDIDDATA 3 4 LCD_EDIDDAT 18
1 2 RN19 1 2 IV^0_4P2R
10 INT_LVDS_EDIDCLK LCD_EDIDCLK 18 18 HDMI_CLK IV_HDMICLK+ 9
18 HDMI_CLK# 3 4 IV_HDMICLK- 9
A RN16 1 2 IV^0_4P2R A
18 HDMI_TX0 IV_HDMITX0P 9
18 HDMI_TX0# 3 4 IV_HDMITX0N 9
RN6 1 2 IV^0_4P2R RN17 1 2 IV^0_4P2R
10 INT_HDMI_CLK HDMI_DCCLK 18 18 HDMI_TX1 IV_HDMITX1P 9
10 INT_HDMI_DATA 3 4 HDMI_DCDATA 18 18 HDMI_TX1# 3 4 IV_HDMITX1N 9
RN18 1 2 IV^0_4P2R
18 HDMI_TX2 IV_HDMITX2P 9
R147 IV^0_4 3 4
10 INT_HDMI_HPD HDMI_HPD 18 18 HDMI_TX2# IV_HDMITX2N 9

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
1A
MXM
Date: Thursday, June 26, 2008 Sheet 17 of 35
5 4 3 2 1
1 2 3 4 5 6 7 8

D28 +3V C101 .1u/16V_4 +15V


+5V_CRT2
+3V REV C: unstuff R3, Q1,Q4,Q5, Add and stuff D17, D21---0410
1 D29 1N5819HW
CRT_SEN# 2 1 +5V_CRT2 R14
3 +5V

3
CN15 +3V

16
*DA204U 330K_6 Q9
2 CRT AO3404
6 +3VPCU LCDONG 2 LCD_VCC
VGA_RED_SYS L49 BLM18BA220SN1D_6_0.3A CRT_R1 1 11 R3 R5
7 L2
VGA_GRN_SYS L48 BLM18BA220SN1D_6_0.3A CRT_G1 2 12 0_6
8 R9 C3 LCDVCC1 10K_4 10K_4

1
3
VGA_BLU_SYS L47 BLM18BA220SN1D_6_0.3A CRT_B1 3 13
9 100K_4 .01u/25V_4 10u/6.3V_6 BL_ON 2 1 LID591# 20,25

3
4 14 R15 C8 C9 C7
R393 C525 R389 C517 R384 C509 C510 C518 C526 10 2 D1 BAS316
5 15 22_8 .1u/16V_4 .01u/16V_4
150/F_4 10p_4 150/F_4 10p_4 150/F_4 10p_4 10p_4 10p_4 10p_4 Q6 Q7 BL# 2

3
PDTC143TT 2N7002E LCDDISCHG

3
A Q5 A

17

3
2 2N7002E 2
17 LCD_ON EC_FPBACK# 25
R375 10K_4 +3V

1
17 LVDS_BLON 2
R364 0_4 CRT_SEN# R11 LCDON# 2 Q1
25,26 CRT_SENSE#

1
R4 DTC144EUA
R362 *0_4 Q8 Q4
C498 2.2u/6.3V_6 100K_4 2N7002E 100K_4 2N7002E

1
1
U23 CM2009
+5V 1 16 VSYNC1 R116 15_4 VSYNC1_1 R103 EZ^0_4
VCC_SYNC SYNC_OUT2 CRT_VSYNC_DOCK 26
C538 .22u/10V_4
+3V 7 14 HSYNC1 R113 15_4 HSYNC1_1 R106 EZ^0_4
VCC_DDC SYNC_OUT1 CRT_HSYNC_DOCK 26
+5V_CRT2 R395 *0_4 8 15 CRTVSYNC 17
C532 .22u/10V_4 BYP SYNC_IN2 C91 C106
+3V 2 13 CRTHSYNC 17 +5V_CRT2 10p_4 10p_4
VCC_VIDEO SYNC_IN1
C539 CRT_R1 3 10 CRTDCLK R388 4.7K/04 +3V
VIDEO_1 DDC_IN1 R115 R114
CRTDCLK 17
.22u/10V_4 CRT_G1 4 11 CRTDDAT R387 4.7K/04 6.8K_4 6.8K_4
VIDEO_2 DDC_IN2 +3V
CRTDDAT 17
CRT_B1 5 9 CRTDCLK_R R102 EZ^0_4
VIDEO_3 DDC_OUT1 CRT_DDCCLK_DOCK 26
6 12 CRTDDAT_R R111 EZ^0_4
GND DDC_OUT2 CRT_DDCDAT_DOCK 26

C88 C109 +3VPCU


10p_4 10p_4 C84 0.1u/10V_4 U31
5 1
2 HDMI_HP_BUF1
U21
4 3
16 +5V
VGA_RED VCC VGA_RED_SYS +3V NL17SZ17
4 C_A A0 2 To IV/EV VGA
3 VGA_RED_DOCK
VGA_GRN 7
A1
5 VGA_GRN_SYS
VGA_RED_DOCK 26
R6 0_4 BRIGHTNESS Hot Plug Detect C80 0.1u/10V_4
C_B B0 25 CONTRAST
6 VGA_GRN_DOCK
B1 VGA_GRN_DOCK 26
VGA_BLU 9 11 VGA_BLU_SYS R8 *EV^0_4
C_C C0 17 EV_LVDS_BL_BRGHT

5
10 VGA_BLU_DOCK 1
C1 VGA_BLU_DOCK 26
12 14 R7 IV^0_4 R64 4
C_D D0 10 INT_LVDS_BL_BRGHT 17 HDMI_HPD
13 1K_4 2 LAN_RST#
D1 LAN_RST# 12,21
DOCK_INSERT_5V 1
26 DOCK_INSERT_5V

3
B SE U9 B
15 EN# GND 8 C798
TC7SH08FU
EZ^SN74CBTLV3257PWR LCD_EDIDCLK R10 *2.2K_4 LAN_RST#
+3V
R621
LCD_EDIDDAT R12 *2.2K_4 *0_4
+3V *.1U_4
VGA_RED R95 *NZ^0_4 VGA_RED_SYS
17 VGA_RED
DOCK_INSERT_5V
VGA_GRN R94 *NZ^0_4 VGA_GRN_SYS Q45
17 VGA_GRN

2
EZ^2N7002E
VGA_BLU R98 *NZ^0_4 VGA_BLU_SYS +5V
17 VGA_BLU
1 3 R411 1K_4 +5V

2
+5V Q44
C554 C557 C558 BSS138
HDMI_HP_BUF1 1 3 R404 1K_4 HDMI_HP_A
.1u/16V_4 .1u/16V_4 .1u/16V_4

2
VIN_LCD D3 D2 C561
CN1 R403
1 2 LCD_VCC *.1U/10V_4
1 2 BAS316 BAS316 *10K_4
3 3 4 4
C2 .1u/16V_4 5 6 LCD_EDIDDAT 17

1
5 6
+3V 7 7 8 8 LCD_EDIDCLK 17

2
CCD_PWR 9 10 BRIGHTNESS R177 R176 Q46
CCD_PWR 9 10
11 12 EZ^BSS138
11 12 BUSBP2+ 2K_4 2K_4
13 13 14 14 1 3 DOCK_DVI_HPD 26
BL_ON 15 16 BUSBP2- CN17
15 16 L24
17 17 18 18
LVDS_TXLCK 19 20 LVDS_TXUCK 1 3 HDMI_DCCLK_1 HDMI_DDCCLK_R 20
17 LVDS_TXLCK 19 20 LVDS_TXUCK 17 17 HDMI_DCCLK SHELL1
LVDS_TXLCK# 21 22 LVDS_TXUCK# MB_HDMITX2 19
17 LVDS_TXLCK# 21 22 LVDS_TXUCK# 17 D2+
23 24 Q20 220R_100MHZ 18
LVDS_TXL0 23 24 LVDS_TXU0 2N7002E C267 MB_HDMITX2# D2 Shield
17 LVDS_TXL0 25 26 LVDS_TXU0 17 17
2

LVDS_TXL0# 25 26 LVDS_TXU0# MB_HDMITX1 D2-


17 LVDS_TXL0# 27 27 28 28 LVDS_TXU0# 17 16 D1+
29 30 +3V R178 1K_4 *.1u/16V_4 15
LVDS_TXL1 29 30 LVDS_TXU1 MB_HDMITX1# D1 Shield
17 LVDS_TXL1 31 31 32 32 LVDS_TXU1 17 14 D1-
LVDS_TXL1# 33 34 LVDS_TXU1# Q19 MB_HDMITX0 13
17 LVDS_TXL1# 33 34 LVDS_TXU1# 17 D0+
2

35 36 2N7002E 12
LVDS_TXL2 35 36 LVDS_TXU2 L25 MB_HDMITX0# D0 Shield
17 LVDS_TXL2 37 37 38 38 LVDS_TXU2 17 11 D0- GND 23
LVDS_TXL2# 39 40 LVDS_TXU2# 1 3 HDMI_DCDATA_1 HDMI_DDCDATA_R MB_HDMICLK 10
17 LVDS_TXL2# 39 40 LVDS_TXU2# 17 17 HDMI_DCDATA CK+
41 41 42 42 9 CK Shield GND 22
220R_100MHZ MB_HDMICLK# 8 U26 *RClamp0514M_AG
C266 CK- MB_HDMICLK MB_HDMICLK
7 CE Remote 1 1 10 10
C LCD_CON40X2 MB_HDMICLK# MB_HDMICLK# C
6 NC 2 2 9 9
*.1u/16V_4 MB_HDMI_DDCCLK 5 3
MB_HDMI_DDCDATA DDC CLK MB_HDMI_DDCCLK VCC GND 8 MB_HDMI_DDCCLK
4 DDC DATA 4 4 7 7
HDM@POLY 1.1A F5 3 MB_HDMI_DDCDATA 5 MB_HDMI_DDCDATA
+3V
+5V GND 5 6 6
2 +5V
R13 HDMI_HP_A R605 HP_DET 1
VIN VIN_LCD 0_4 HP DET
SHELL2 21

0_8 C6 C5 C4 D59 R591 U29 R606 C808 U28 *RClamp0514M_AG


HDMI CON
*0_6 10K_4 0.1u/10V_4 MB_HDMITX2 1 MB_HDMITX2
10u/25V_1206 10u/25V_1206 .1u/25V_6 MB_HDMICLK MB_HDMITX2# 1 10 10 MB_HDMITX2#
2 VDD D0+A 47 2 2 9 9
EZ^CH500H 6 46 MB_HDMICLK# 3
VDD D0-A MB_HDMITX2 MB_HDMITX1 VCC GND 8 MB_HDMITX1
11 VDD D1+A 44 4 4 7 7
15 43 MB_HDMITX2# MB_HDMITX1# 5 MB_HDMITX1#
C661 C668 C666 C667 VDD D1-A MB_HDMITX1 DOCK_HDMICLK R617 EZ^100/F_4 DOCK_HDMICLK# 5 6 6
24 VDD D2+A 41
36 40 MB_HDMITX1# DOCK_HDMITX2 R616 EZ^100/F_4 DOCK_HDMITX2#
.22u/10V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 VDD D2-A MB_HDMITX0 DOCK_HDMITX1 R618 EZ^100/F_4 DOCK_HDMITX1#
48 VDD CLK+A 38
22 37 MB_HDMITX0# DOCK_HDMITX0 R619 EZ^100/F_4 DOCK_HDMITX0#
AVDD CLK-A U27 *RClamp0514M_AG
R2 *0_6 HDMI_CLK 4 35 +3V MB_HDMITX0 1 MB_HDMITX0
17 HDMI_CLK
HDMI_CLK# D0+ D0+B DOCK_HDMICLK 26
MB_HDMITX0# 1 10 10 MB_HDMITX0#
17 HDMI_CLK# 5 D0- D0-B 34 DOCK_HDMICLK# 26 2 2 9 9
+3V HDMI_TX2 7 32 3
CCD_PWR
17 HDMI_TX2
HDMI_TX2# D1+ D1+B DOCK_HDMITX2 26
HDMI_HP_A VCC GND 8 HDMI_HP_A
+3V 1 3 17 HDMI_TX2# 8 D1- D1-B 31 DOCK_HDMITX2# 26 4 4 7 7
HDMI_TX1 9 29 5
Q3 AO3403 C1
17 HDMI_TX1
HDMI_TX1# D2+ D2+B DOCK_HDMITX1 26
R604 R597 5 6 6
17 HDMI_TX1# 10 D2- D2-B 28 DOCK_HDMITX1# 26
R1 HDMI_TX0 12 26
17 HDMI_TX0 DOCK_HDMITX0 26
2

CCD_PWRON# 4.7u/6.3V_6 HDMI_TX0# CLK+ CLK+B Q59 *4.7K_4 *4.7K_4


17 HDMI_TX0# 13 CLK- CLK-B 25 DOCK_HDMITX0# 26

2
4.7K_4 +3V *2N7002E
RN1 0_4P2R HDMICLK 19 3
BUSBP2+ R586 *4.7K_4 HS_A0/S4 HDMIDATA SCL/S3 GND R601 *0_4 HDMIDATA
13 USBP2+ 1 2 20 SDA/S2 GND 14 2,7,13,19 PDAT_SMB 3 1
3 4 BUSBP2- R587 *4.7K_4 HS_A1/S5 27 R600 EZ^0_4
13 USBP2- GND 17,25 MXM_DATA
R589 *4.7K_4 HS_A2/S6 HS_MS 1 30
L1 R588 *4.7K_4 HS_A3/S7 MS GND R598 0_4 R154 *499/F_4 MB_HDMICLK#
GND 33
3

1 2 HS_A0/S4 49 39 R156 *499/F_4 MB_HDMICLK


1 2 R590 EZ^0_4 HS_A0/S4 HS_A1/S5 A0/S4 GND +3V
4 4 3 3 50 A1/S5 GND 42
2 R584 EZ^0_4 HS_A1/S5 HS_A2/S6 51 45 +5V R160 *499/F_4 MB_HDMITX0#
CCD_POWERON 25 A2/S6 GND

3
*DLW21HN900SQ2L R583 EZ^0_4 HS_A2/S6 HS_A3/S7 52 53 R161 *499/F_4 MB_HDMITX0
R585 EZ^0_4 HS_A3/S7 A3/S7 GND Q57
GND 57
Q2 17 21 *2N7002E R169 *499/F_4 MB_HDMITX1#
1

TEST_OUT GND
DTC144EUA 16 SEL_OUT AGND 23 +3V 2 2 R170 *499/F_4 MB_HDMITX1
18 NC TEST_IN 54
R602 *0_4 3 1 HDMICLK R173 *499/F_4 MB_HDMITX2#
D 2,7,13,19 PCLK_SMB D
+3V HS_SEL_IN 55 R603 EZ^0_4 R174 *499/F_4 MB_HDMITX2
SEL_IN 17,25 MXM_CLK
U43 56 D60 1 2 Q18

1
+5V R594 *EZ^4.7K_4 OE EZ^BAS316 R599 0_4 R143 *2N7002E
VCC 16
HDMI_DDCCLK_R 4 2 MB_HDMI_DDCCLK R593 *0_4 HS_MS R592
C_A A0
A1 3 DOCK_HDMI_DDCCLK 26
HDMI_DDCDATA_R 7 5 MB_HDMI_DDCDATA EZ^PI3HDMI412AD EZ^4.7K_4 HDMI_CLK# RN12 1 2*NZ^0_4P2R MB_HDMICLK# *100K_4
C_B B0 HDMI_CLK MB_HDMICLK
B1 6 DOCK_HDMI_DDCDATA 26 3 4
9 C_C C0 11
10 +3V HDMI_TX0# RN11 1 2 *NZ^0_4P2R MB_HDMITX0#
C1 HDMI_TX0 MB_HDMITX0
12 C_D D0 14 3 4
D1 13
DOCK_INSERT_5V 1 HDMI_TX1# RN10 1 2 *NZ^0_4P2R MB_HDMITX1#
SE R596 HDMI_TX1 MB_HDMITX1
15 8 3 4
EN# GND
*4.7K_4 HDMI_TX2# RN9 MB_HDMITX2#
Quanta Computer Inc.
1 2 *NZ^0_4P2R
EZ^SN74CBTLV3257PWR HDMI_TX2 3 4 MB_HDMITX2
DOCK_INSERT_5V D61 1 2 *BAS316 HS_SEL_IN PROJECT : ZY7

WWW.AliSaler.Com
HDMI_DDCCLK_R RN8 1 2 *NZ^0_4P2RMB_HDMI_DDCCLK Size Document Number Rev
R595 EZ^0_4 HDMI_DDCDATA_R MB_HDMI_DDCDATA 1A
3 4 LVDS/CRT/TVOUT/CCD/DVI
Date: Thursday, June 26, 2008 Sheet 18 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

To NEW-CARD & EXT. USB Bluetooth


+3VSUS +3V

Fingerprint 20mil INT. USB REV B:Modify it for ESD issue on 2/20
650mA 2A 1.3A 275mA R207 R198
+3VSUS 1 3 BT_POWER

+1.5V +5VPCU +3V +3V_S5 *0_6 Q29 AO3403 C464 USBPWRP1


0_6

2
CN9 CN7 4.7u/6.3V_6 CN21
CN11 RN14 *0_4P2R
2 2 1 1 25 BT_POWERON# 1 1 5 5
4 3 1 6 3 4 BUSBP8- 2 6
4 3 1 1 6 13 USBP8- 2 6
6 5 RN7 1 2 0_4P2R BUSBP10- 2 1 2 BUSBP8+ 3 7 C617
6 5 13 USBP10- 25 2 13 USBP8+ 3 7
8 7 3 4 BUSBP10+ RN15 1 2 0_4P2R BUSBP6+ 3 4 8
8 7 13 USBP10+ 36 13 USBP6+ 3 4 8

1
BUSBP6- L32 470p_4
10 10 9 9 4 13 USBP6- 3 4 4 4
A L23 A
12 12 11 11 5 5 4 4 3 3
L45 D37 D38 SYUIN_USB
14 14 13 13 1 1 2 2 1 1 2 2
PDAT_SMB 16 15 NEWCARD_RST# 12 4 3 Finger_H1.95 1 2
2,7,13,18 PDAT_SMB 16 15 4 3 1 2
PCLK_SMB 18 17 CPPE# 4 3 USB_BT_5P CL-2M2012-121JT
2,7,13,18 PCLK_SMB 18 17 4 3
USBON# 20 19 R0IV18_ESD R0IV18_ESD
25,26 USBON# NEW_CLKREQ# 2,13

2
20 19 *DLW21HN900SQ2L
22 22 21 21
USBP1- 24 23 *DLW21HN900SQ2L
13 USBP1- 24 23 CLK_PCIE_NEW# 2 20 BT_LED
USBP1+ 26 25 REV C:Add R198 and R207 --0408
13 USBP1+ 26 25 CLK_PCIE_NEW 2
CL-2M2012-121JT 28 27
L79 4 USBP3-_C 28 27
13 USBP3- 4 3 3USBP3+_C 30 30 29 29 PCIE_RXN1 9
13 USBP3+ 1 1 2 2 32 32 31 31 PCIE_RXP1 9 USBPWRP1
60mil L27
USBPWR1
34 34 33 33
13 USBP4-
L80 4
4 3 3USBP4-_C 36 36 35 35 PCIE_TXN1 9 CN19
2USBP4+_C TI201209G121_8_3A
13 USBP4+ 1 1 2 38 38 37 37 PCIE_TXP1 9 Add CAP--1107 +5VPCU
CL-2M2012-121JT
40 40 39 39
C293 10u/10V_8 U8 RT9711BPF
60mil RN13 *0_4P2R
BUSBP0-
1 1 5 5
42 42 41 41 13 USBP0- 3 4 2 2 6 6
MODULE 'A' TV card 2 IN1 USBPWR1 BUSBP0+ C590 C584
NEW CARD_CON20X2 C286 1u/10V_4 OUT3 8 13 USBP0+ 1 2 3 3 7 7
+
3 IN2 OUT2 7 4 4 8 8

1
L26 470p_4
USBON# OUT1 6 100u/6.3V_3528
4 EN# 4 4 3 3
MODULE 'B' Wireless card 1 1 2 D34 D35 SYUIN_USB
REV B:Modify it for EMI.--0218 9
GND
5 R196 *6.34K/F_4 1 2
GND-C OC# CL-2M2012-121JT
R0IV18_ESD R0IV18_ESD

2
R266 0_4 CPPE#
13 CPPE#_EC
Double Stack MINI CARD

B
REV B:Modify footprint--- 2/22 B

MINI-CARD MODULE 'A' MODULE 'B'


CN33
+3V_MINI R539 0_8 +3V_MINI_A +3V_MINI_B R540 0_8 +3V_MINI
CAPACITOR 92
71
A_+3.3V B_+3.3V 52
24
A_+3.3Vaux B_+3.3Vaux
on Module 54 A_+3.3V B_+3.3V 2

87 A_LED_WPAN# B_LED_WPAN# 46
RF_LED# R538 *0_4 RF_LED#_A 85 44 RF_LED#_B R327 0_4
A_LED_WLAN# B_LED_WLAN# RF_LED# 20
83 A_LED_WWAN# B_LED_WWAN# 42
USBP5+ R344 *0_4 USBP5+_C 80 38 USBP7+_C R541 0_4
13 USBP5+ A_USB_D+ B_USB_D+ USBP7+ 13
USBP5- R340 *0_4 USBP5-_C 78 36 USBP7-_C R542 0_4
13 USBP5- A_USB_D- B_USB_D- USBP7- 13
MINI_SMDATA 76 32 MINI_SMDATA
MINI_SMCLK A_SMB_DATA B_SMB_DATA MINI_SMCLK
74 A_SMB_CLK B_SMB_CLK 30
PCIE_TXP2 33 77 PCIE_TXP3
9 PCIE_TXP2 A_PETp0 B_PETp0 PCIE_TXP3 9
PCIE_TXN2 31 75 PCIE_TXN3
9 PCIE_TXN2 A_PETn0 B_PETn0 PCIE_TXN3 9 +3V
9 PCIE_RXP2
PCIE_RXP2
PCIE_RXN2
25 A_PERp0 B_PERp0 72 PCIE_RXP3
PCIE_RXN3
PCIE_RXP3 9 +3V for WWAN card is 2.75A
9 PCIE_RXN2 23 A_PERn0 B_PERn0 70 PCIE_RXN3 9
PCIE_RST# 69 22 PCIE_RST#
12 PCIE_RST# A_PERST# B_PERST#
CLK_PCIE_TV 13 63 CLK_PCIE_MINI R317 0_8 +3V_MINI +3V_MINI_B +3V_MINI_A
2 CLK_PCIE_TV A_REFCLK+ B_REFCLK+ CLK_PCIE_MINI 2
CLK_PCIE_TV# 11 61 CLK_PCIE_MINI#
2 CLK_PCIE_TV# A_REFCLK- B_REFCLK- CLK_PCIE_MINI# 2
7 58 C623 C450 C453 C447 C448 C457 C445 C454 C657 C653 C655
2 TV_CLKREQ# A_CLKREQ# B_CLKREQ# MINI_CLKREQ# 2
PCIE_WAKE_WL_R_# WAKE_WL_A# 1 53 WAKE_WL_B# PCIE_WAKE_WL_R_#
R537 *0_4 A_WAKE# B_WAKE# R534 0_4 *22u/6.3V_8 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4

+1.5V +1.5V

89 A_+1.5V B_+1.5V 48
C
73 A_+1.5V B_+1.5V 28 C
57 A_+1.5V B_+1.5V 6
+1.5V +5V
500mA, 25mil
LFRAME# R569 0_4 A_LFRAME#_R 65 16 LFRAME#_R R318 *0_4 R565 0_6 +5V_TV-CARD
NC NC LFRAME# 12,25
LAD3 R612 0_4 A_LAD3_R 64 14 LAD3_R R313 *0_4
NC NC LAD3 12,25
LAD2 R570 0_4 A_LAD2_R 62 12 LAD2_R R319 *0_4 C455 C456 C444 C693 C694
NC NC LAD2 12,25
LAD1 R611 0_4 A_LAD1_R 60 10 LAD1_R R314 *0_4 R323
NC NC LAD1 12,25
LAD0 R440 0_4 A_LAD0_R 59 8 LAD0_R R320 *0_4 .1u/16V_4 .1u/16V_4 4.7u/6.3V_6 4.7u/6.3V_6 .1u/16V_4 +3V
NC NC LAD0 12,25
R332 0_4 SERIRQ_R 51 91 Debug 10K_4
12,23,25 SERIRQ NC NC

2
R333 0_4 LDRQ1#_R 49 90
12 LDRQ1# C-Link_RST C-Link_RST
R563 0_4 PCIE_RST#_R 47 88
12,23 PCIRST# C-Link_DAT C-Link_DAT
12 PCCLK_DEBUG R562 0_4 LPC_CLK_DEBUG1_R 45 86 3 1 MINI_SMDATA
C-Link_CLK C-Link_CLK 13,21 MSMB_DATA
Q27
+3V_MINI R564 0_6 +3V_MINI_R 41 82 2N7002
NC NC
39 NC NC 81
Modify it for Debug.--1017. TV use +3V C692 *0_4
R315
.1u/16V_4 19 67 R324
NC NC
17 NC NC 66 +3V
+3VSUS

2
RF_EN R613 *0_4 RF_EN_A 68 20 RF_EN_B R614 0_4 RF_EN 10K_4
A_W_DISABLE# B_W_DISABLE# RF_EN 25
+5V_TV-CARD R566 0_6 +5V_TV-CARD_R 5 56 R331 3 1 MINI_SMCLK
A_BT_CHCLK B_BT_CHCLK 13,21 MSMB_CLK

2
3 55 Q28
A_BT_DATA B_BT_DATA Q30 4.7K_4 2N7002
TV use +5V
43 GND GND 84
PCCLK_DEBUG 37 79 *DTC144EUA R316 *0_4
GND GND PCIE_WAKE_WL_R_#
For EMI 26 GND GND 50 13,21,25 PCIE_WAKE# 3 1
D 21 GND GND 40 D
18 GND GND 35
R567 15 34
GND GND
9 29
GND

GND

*22_4 GND GND


4 GND GND 27

Quanta Computer Inc.


93

94

C695
*10P_4 SP@QUASAR-CA0404-071N21_92P PROJECT : ZY7
Size Document Number Rev
A/B MODULE Share pin 1A
NEW&MINI&TV CARD/USB/BT/CIR
Date: Thursday, June 26, 2008 Sheet 19 of 35
1 2 3 4 5 6 7 8
5 4 3 2 1

U38
CM1213-04SO
LED Power/Suspend: Blue/ Amber
SATA1 SATA_TXN0 1 CH1 CH4 6 SATA_RXN0
SATA2
2 VN VP 5 +5VSATA1
CN28
SATA_TXP0 3 4 SATA_RXP0 SATA_HDD D55 *PESD5V0S1BL_ESD Power LED
CN26 CH2 CH3
S1 1 2 1
SATA_HDD LED1
S2 2 SATA_TXP1 14
S1 1 23 S23 S3 3 SATA_TXN1 14 25 SUSLED# 4 2
2 SATA_TXP0 14 24 4 PWR_VCC R346 330_4
S2 S24 S4 +3VPCU
23 S23 S3 3 SATA_TXN0 14 S5 5 SATA_RXN1 14 25 PWRLED# 3 1
24 4 6 LED_B/O
S24 S4 S6 SATA_RXP1 14
S5 5 SATA_RXN0 14 S7 7 2 1
D 6 D54 *PESD5V0S1BL_ESD D
S6 SATA_RXP0 14
7 R304 0_8
S7 +3.3VSATA2 D56 *PESD5V0S1BL_ESD
S8 8 +3V
R548 9 2 1 Battery LED
8 +3.3VSATA1 +3V
S9
10
100mil U39 LED2
S8 S10 CM1213-04SO
S9 9
10
100mil 0_8 S11 11
12 SATA_TXP1 1 6 SATA_TXN1
25 BATLED1# 4 2
BAT_VCC R347 330_4
S10 S12 CH1 CH4 +3VPCU
S11 11 S13 13 25 BATLED0# 3 1
12 14 +5VSATA2 2 5 +5VSATA2 LED_G/O
S12 S14 VN VP
S13 13
14 +5VSATA1 S15 15
16
100mil SATA_RXN1 3 4 SATA_RXP1
2
D57
1
*PESD5V0S1BL_ESD
S14 S16 CH2 CH3
15 17
S15
16
100mil S17
18
S16 S18
S17 17 S19 19
S18 18 S20 20
19 21 +3.3VSATA2
S19 +3.3VSATA1 S21
S20 20 S22 22
21 C415 C416 C414
S21 C680 C675 C674
S22 22
4.7u/6.3V_6 4.7u/6.3V_6 .1u/16V_4
4.7u/6.3V_6 4.7u/6.3V_6 .1u/16V_4

+5V +5V

R535 R311
+5VSATA1 +5VSATA2
SATA_LED#_R 1 3
+

+
C 0_8 C662 C658 C664 C663 C659 C660 C706 0_8 C433 C428 C437 C438 C430 C431 C707 Q60 C
MMBT3906
100u/6.3V_3528 4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 .01u/16V_4 .01u/16V_4 .1u/16V_4 100u/6.3V_3528 4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 .01u/16V_4 .01u/16V_4 .1u/16V_4

2
SB_SATA_LED#_C R308 0_4
SB_SATA_LED# 14

ODD (SATA) TP CONN To Power/B +3VPCU +3V


+5V
CN2
1 1
R421 4.7K_4 R422 0_6 TP_VCC 25mil 2
3
2
+5V +5V 3
CN20 4
R420 4.7K_4 C578 .1u/16V_4 NBSWON# 4
25 NBSWON# 5 5
CN6 25 MX0 MX0 6
MX5 6
GND 1 1 7 7
2 SATA_TXP4 14 MX6 8
A+ L51 BK1608LL121_6_150mA TPDATA_R 2 MX7 8
A- 3 SATA_TXN4 14 25 TPDATA 3 25 MX7 9 9
4 L52 BK1608LL121_6_150mA TPCLK_R MY0 10
GND 25 TPCLK 4 10
5 25 MY4 MY4 11
B- SATA_RXN4 14 5 7 11
6 NUMLED# 12
B+ SATA_RXP4 14 6 8 25 NUMLED# 12
7 C568 C567 CAPSLED# 13
B GND 25 CAPSLED# 13 B
ACES_88058-0601 SATA_LED#_R 14
10p_4 10p_4 PWRLED# 14
15 15
8 SATA_DP R455 1K_4 SUSLED# 16
DP +5V_ODD LID591# 16
5V 9 18,25 LID591# 17 17
5V 10 18 18 21 21
MD 11 19 19 22 22
12 2 1 NBSWON# 20
GND D58 20
GND 13
*PESD5V0S1BL_ESD SW-20P
GND 14
GND 15

C16654-122A4-L_Serial_ATA FAN +3V CN3

+3V R358
10K_4
To Switch/B RF_LED#
1
19 RF_LED# 2
2 1 BT_LED 3
VGA_THERM# 17,25 19 BT_LED
Q36 25 MX4 MX4 4
2

R361 2N7002 D24 *BAS316 +3V 25 MX5 MX5 5


10K_4 25 MX2 MX2 6
+5V +5V_ODD 3 1 2 1 MX1 7
+5V CPUFAN#_ON 5 25 MX1
D27 25 MX6 MX6 8
R429 BAS316 R353 25 MY0 MY0 9
10K_6 25 ARCADE_KEY ARCADE_KEY 10 13
11 14
0_8 C587 C599 C597 C594 C588 12
25 FANSIG
10u/6.3V_8 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 +5V
C497 U20 CN14 Aces 88501-120N
A A
2 3 TH_FAN_POWER
VIN VO 1
2.2u/6.3V_6 1
GND 5
6
30 MIL 2
FON# GND C494 C492 C491 3 6
GND 7 4 7
4 8 .01u/16V_4
25 CPUFAN# VSET GND 22u/6.3V_8 1000p_4 5
G995 FAN
Quanta Computer Inc.
G995 pin 1 have internal PU to VIN
PROJECT : ZY7
Size Document Number Rev
32 FAN_CTRL
1A
HDD/ODD/LED/SW/TP/FAN
Date: Thursday, June 26, 2008 Sheet 20 of 35
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

Giga LAN BCM5787M/5764M LAN SWITCH


3V_LAN_S5

3V_LAN_S5 C482 10u/6.3V_6


R82 0_4 PCLK_SMB_LAN
13,19 MSMB_CLK
R81 0_4 PDAT_SMB_LAN C81 4.7u/6.3V_6 C483 .1u/16V_4 U19 to Docking

10
18
27
38
50
56
13,19 MSMB_DATA

1
6
9
C41 .1u/16V_4
C60 .1u/16V_4 3V_LAN_S5

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7

GND11
GND12
GND13
C70 .1u/16V_4 TX0P 2 48 TX0P_DOCK
A0 0B1 TX0P_DOCK 26
47 TX0N_DOCK
1B1 TX0N_DOCK 26
TX0N 3 A1 TX1P_DOCK
2B1 43 TX1P_DOCK 26
U2 TX1N_DOCK

15
19
56
61

38
52
68
3B1 42 TX1N_DOCK 26

6
VDDCIO_12 5
20mil L11 TX1P 7 37 TX2P_DOCK

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

AVDD/DC
AVDD/DC
VDDP/DC
D VDDC/VDDCIO A2 4B1 TX2P_DOCK 26 D
55 36 BIASVDD BK1608HS121_6_0.3A 36 TX2N_DOCK
VDDC/VDDCIO BIASVDD 5B1 TX2N_DOCK 26
13 C57 .1u/16V_4 TX1N 8
VAUX_12 VDDC A3
20 L9 32 TX3P_DOCK
VDDC 6B1 TX3P_DOCK 26
34 23 XTALVDD BK1608HS121_6_0.3A TX3N_DOCK
60
VDDC XTALVDD C38 .1u/16V_4
PI3L500 7B1 31 TX3N_DOCK 26
L13 VDDC L12 TX2P
20mil AVDDL 39 48 BK1608HS121_6_0.3A
11 A4 0LED1 22
23
DOCK_ACTLED# 26
VAUX_12 AVDDL TRD2-/AVDDH 1LED1 DOCK_LINKLED# 26
C82 4.7u/6.3V_6 TX2N 12 52
BK1608HS121_6_0.3A C65 .1u/16V_4 51 AVDDL
BCM5764M
10mm X 10mm TRD1-/AVDDH 42 AVDDH C62 .1u/16V_4 A5 2LED1
TX0P_SYS
0B2 46
68-Pin QFN C75 .1u/16V_4 45 TX0N_SYS
L8 TX3P 1B2
20mil GPHY_PLLVDD 35 50 TX3P
14 A6
41 TX1P_SYS
C48 4.7u/6.3V_6 GPHY_PLLVDD TRD3+ TX3N TX3N 2B2 TX1N_SYS
TRD3- 49 15 A7 3B2 40
BK1608HS121_6_0.3A C53 .1u/16V_4
47 TX2N 35 TX2P_SYS
L6 TRD2+/TRD2N TX2P 4B2 TX2N_SYS
20mil PCIE_PLLVDD 30
AVDDL/TRD2P 46
LAN_ACTLED# 19
5B2 34
PCIE_PLLVDD/PCIE_PLLVDDL AVDDL LED0 TX3P_SYS
AVDD 45 6B2 30
BK1608HS121_6_0.3A C34 4.7u/6.3V_6 LAN_LINKLED# 20 29 TX3N_SYS
C43 .1u/16V_4 LED1 7B2
27 PCIE_VDD/PCIE_PLLVDDL
44 TX1P 3V_LAN_S5 R348 10K_4 54 25 LAN_ACTLED#_SYS
AVDDL/TRD1P TX1N LED2 0LED2
TRD1+/TRD1N 43 1LED2 26 LAN_LINKLED#_SYS
L10 D20 BAS316 DOCKIN#_SEL
20mil PCIE_SDS_VDD 33 41 TX0N
22,25,26 DOCKIN# 17 SEL 2LED2 51
PCIE_VDD/PCIE_VDDL TRD0- TX0P
40

GND00
GND01
GND02
GND03
GND04
GND05
GND06
GND07
GND08
GND09
GND10
BK1608HS121_6_0.3A TRD0+
0: A to B1 5 NC
C35 4.7u/6.3V_6 24 1: A to B2
C46 .1u/16V_4 PCIE_GND/PCIE_VDDL LINKLED# R305 0_4 LAN_LINKLED#
LINKLED# 2
1

13
16
21
24
28
33
39
44
49
53
55
SPD100LED# EZ^PI3L500 (LAN SW)
SPD1000LED# 67
66 LAN_ACTLED#
C36 .1U/10V_4 TXDP_E TRAFFICLED#
9 PCIE_RXP4 26 PCIE_TXDP
C37 .1U/10V_4 TXDN_E 25 8
9 PCIE_RXN4 PCIE_TXDN GPIO2
9 PCIE_TXP4 31 PCIE_RXDP
9 PCIE_TXN4 32 PCIE_RXDN
PCIE_WAKE_LAN_R_# 12 9 TX0N RN2 1 2 *NZ^0_4P2R TX0N_SYS
WAKE# UART_MODE BCM_WP TX0P TX0P_SYS
C
12,18 LAN_RST# 10 PERST# GPIO1_SERIALDI 7 3 4 C

2 CLK_PCIE_LAN 29 REFCLK+ GPIO0_SERIALDO 4


28 TX1N RN3 1 2 *NZ^0_4P2R TX1N_SYS
2 CLK_PCIE_LAN# REFCLK- TX1P TX1P_SYS
3 4
Modify for B test 65 BCM_SCL R73 *4.7K_4
SCLK SI R71 5764^4.7K_4
SI 63 SI,SO,CS#,SCLK have internal pull up
R77 1K/F_4 AUX_PRES 54 64 BCM_SDA R72 *4.7K_4 TX2N RN4 1 2 *NZ^0_4P2R TX2N_SYS
3V_LAN_S5 VAUXPRSNT SO
R78 1K/F_4 VMA_PRES 53 62 CS# R70 *4.7K_4 TX2P 3 4 TX2P_SYS 3V_LAN_S5 R349 *10K_4 LAN_ACTLED# R350 *NZ^0_4 LAN_ACTLED#_SYS
+3V VMAINPRSNT CS#
R63 4.7K_4 LOW_PWR 3 R80 5764^4.7K_4 3V_LAN_S5
LOW_PWR TX3N RN5 1 2 *NZ^0_4P2R TX3N_SYS R352 *10K_4 LAN_LINKLED# R351 *NZ^0_4 LAN_LINKLED#_SYS
R68 *4.7K_4 PCLK_SMB_LAN 58 59 ENERGY_DET_R R69 0_4 TX3P 3 4 TX3P_SYS
3V_LAN_S5 SMB_CLK NC/(ENERGY_DET) ENERGY_DET 25
R67 *4.7K_4 PDAT_SMB_LAN 57 SMB_DATA
C31 27p_4 XTALO_R R28 200_4 XTALO 22
XTALI XTALO
21 XTALI VDDP/VDDCIO 17 VDDCIO_12
1

Transfomer
Y1 R39 1.18K/F_4 RDAC 37 RDAC
Source 1: DELTA LFE9249 DB0ZR1LAN11
25MHz
Modify for B test 18
2

C32 27p_4 REGCTL25/REGOUT12IO

Source 2: Bothand GST5009 DBKN1NLAN03


R53 0_4 BCM_CLKREQ# 11
2 LAN_CLKREQ# NC(CLK_REQ#)
14 LAN REGCTL12
R50 *5787^0_4 REGCTL12
3V_LAN_S5
REV B: SWAP net for layout issue---0214
R48 5764^4.7K_4 16 R41 39K_6
GND

3V_LAN_S5 REG_GND/SUPER_IDDQ
Package Body
U1
LAN_CLKREQ# from MCP77 chipset has Internal 15K to 3.3V Q13 R44 VAUX_25_R 1 24
69

TCT1 MCT1

2
BCM5764MA0KMLG DTC144EUA TX0P_SYS 2 23 X-TX0P
4.7K_4 C16 C22 TX0N_SYS TD1+ MX1+ X-TX0N
3 TD1- MX1- 22
LAN_CLKREQ if available. Pull high 4.7K
for 5764m and pull low 0 ohm for 5787m .1u/16V_4 .1u/16V_4 VAUX_25_R 4 21
PCIE_WAKE_LAN_R_# TX2P_SYS TCT2 MCT2 X-TX2P
13,19,25 PCIE_WAKE# 3 1 5 TD2+ MX2+ 20
TX2N_SYS 6 19 X-TX2N
TD2- MX2-
VAUX_25_R 7 18
TX1P_SYS TCT3 MCT3 X-TX1P
8 TD3+ MX3+ 17
TX1N_SYS 9 16 X-TX1N
B
C20 C19 TD3- MX3- B
VAUX_25_R 10 15
3V_LAN_S5 .1u/16V_4 .1u/16V_4 TX3P_SYS TCT4 MCT4 X-TX3P
11 14
LAN POWER EEPROM TX3N_SYS 12
TD4+
TD4-
MX4+
MX4- 13 X-TX3N

HPL-68 R17 R18 R20 R22


R86 R84 R83 C83
*5787^.1u/16V_4 75/F_8 75/F_8 75/F_8 75/F_8
20mil *5787^4.7K_4 *4.7K_4 *4.7K_4
+3V_S5 3V_LAN_S5 VAUX_12 VDDCIO_12 U5 C26
L3 L5
8 VCC A0 1
C12 22u/6.3V_8 C72 .1u/16V_4 BCM_WP 7 2 1500P/2KV_1808
BCM_SCL WP A1
6 SCL NC 3
C10 .1u/16V_4 BKP1608HS181T_6_1.5A *BK1608HS121_6_0.3A C55 .1u/16V_4 R85 BCM_SDA 5 4
SDA GND
*4.7K_4 *5787^AT24C64

RJ45 connector
Modify for C test

CN12
EEPROM Strapping
LAN_LINKLED#_SYS 10
3V_LAN_S5 R23 220_4 LAN_VCC3 GREEN_N
9
SO SI CS# SCLK GREEN_P EMI
X-TX3N 8 LAN_VCC3 C25 .1u/16V_4
X-TX3P TX1-
24c64 1 1 0 1 7 TX1+
X-TX1N 6 LAN_VCC4 C14 .1u/16V_4
X-TX2N RX1-
5 TX2- GND2 14
AT45DB011B 1 0 1 1 X-TX2P 4
X-TX1P TX2+ LAN_ACTLED#_SYS C21 .1u/16V_4
3 RX1+ GND1 13
X-TX0N 2
X-TX0P RX2- LAN_LINKLED#_SYS C11 .1u/16V_4
1 RX2+
BCM_RESET#
R76 5764^0_4 LAN_ACTLED#_SYS12
A
Q11 40mil R79 5764^0_4
3V_LAN_S5
3V_LAN_S5 R16 220_4 LAN_VCC4 11
YELLOW_N
A

MMJT9435 WP# YELLOW_P


40mil 4 FOXCONN_RJ45
VAUX_12
R21 1.5_1206 LAN_REG1_2V 3 2 U4
3V_LAN_S5
R19 *1.5_1206 C27 10u/6.3V_6 BCM_SDA 1 8 SI
VAUX_25 SI SO
C28 .1u/16V_4 BCM_SCL 2 7
C29 .1u/16V_4 BCM_RESET# SCK GND
3 6 3V_LAN_S5
1

LAN REGCTL12 C63 .1u/16V_4 CS# RESET# VCC WP#


4 CS# WP# 5
C78 .1u/16V_4 C77
C23 C24 25mil C40 .1u/16V_4 Quanta Computer Inc.
4.7u/6.3V_6 .1u/16V_4 C42 .1u/16V_4 5764^AT45DB011B-SC(LAN FLASH) 5764^.1u/16V_4

512K~1M PROJECT : ZY7


Size Document Number Rev
1A
GigaLAN BCM5787M/5764M & RJ45
Date: Thursday, June 26, 2008 Sheet 21 of 35
5 4 3 2 1
5 4 3 2 1

CODEC Speaker Amplifier Amplifier POWER


+5V_ADO +3V_AVDD
C677 1u/16V_6 ADOGND
C672 +3V L77 +3V_AVDD
4.7u/6.3V_6 FBMH1608HM151_6_2A
ADOGND .1u/16V_4 SECNTL
MIC1-VREFO-R R279 2.2K_4 MIC1_R1
C688 C703 C705 C701 C691
MIC2-VREFO

15

14

23
U32

6
8
4.7u/6.3V_6 .1u/16V_4 4.7u/6.3V_6 .1u/16V_4
EAPD R281 *0_4 MIC1-VREFO-L R273 2.2K_4 MIC1_L1 SURR-L C687 2.2U/6.3V_6 SURR-L-1 R549 10K/F_6 SURR-L-2 1 20

CT
LVDD
RVDD

NC
VDD3

SECNTL
LIN1 VOL
C375 10u/6.3V_6 SURR-R C686 2.2U/6.3V_6 SURR-R-1 R551 10K/F_6 SURR-R-2 18 ADOGND
RIN1

MUTE_888VB
C379 .1u/16V_4 INSPKL+ R575 10K/04 2 13 ADOGND
SURR-L LIN2 IN1/IN2
C679 330p_4 17
INSPKR+ R553 10K/04 RIN2 INSPKR+
SURR-R ROUT+ 19
D C683 330p_4 12 INSPKR- D
ADOGND ROUT- INSPKL+ C702 4.7u/6.3V_6 ADOGND
LOUT+ 24
VDDA_CODEC ADOGND C673 4.7u/6.3V_6 RBYPASS 16 7 INSPKL- U33
C685 4.7u/6.3V_6 LBYPASS RBYPASS LOUT-
3 LBYPASS +3V_AVDD 2 VIN VOUT 1 +NVDD
6 5 MUTE#
C+ /SHDN

THRMPAD
C704 4.7u/6.3V_6 ADOGND

36

35

34

33

32

31

30

29

28

27

26

25
3 4

GNDPAD
GNDPAD
GNDPAD
GNDPAD
C- GND

GND/HS
GND/HS
GND/HS
GND/HS
U13 1441 MUTE R574 0_4 SHDN 5 SHDN G5930

Sense B

VREF
FRONT-R

NC/Sense C

MIC1-VREFO-R
FRONT-L

GPIO1/LINE2- REFO

MIC2-VREFO

LINE1-VREFO

MIC1-VREFO-L

AVSS1

AVDD1
ADOGND R550 0_4 SE/BTL 11
X5R CH5471M9907 SE/BTL
G1441

25
22
21
10
9
26
27
28
29
MONO_OUT R294 268^0_4 MONO_268 37 24 LINE1-R C352 4.7u/6.3V_6 LINE1-R1

38
MONO-OUT/VREFO LINE1-R
23 LINE1-L C353 4.7u/6.3V_6 LINE1-L1
MUTE +3V_AVDD +5V_ADO
VDDA_CODEC AVDD2 LINE1-L
FRONT-L 39 22 MIC1-R C354 4.7u/6.3V_6 MIC1_R1 R558 R576
HP-OUT-L/SURR-L MIC1-R ADOGND
ADOGND R298 20K/F_6 40 21 MIC1-L C355 4.7u/6.3V_6 MIC1_L1 100K_4 100K_4
JDREF MIC1-L

LINE OUT Amplifier


FRONT-R 41 20 C358 *.1u/16V_4 1 2 1441 MUTE
HP-OUT-R/SURR-R CD-R 25 AMP_MUTE#
C:REV Change footprint D47 BAS316

3
ADOGND 42 19 C359 *.1u/16V_4
AVSS2 CD-GND ADOGND R573 10K/04
43 NC/CENTER
ALC268/ALC888S-VC CD-L 18 C360 *.1u/16V_4
Gain = -(Rf/Ri) C697 47P_4 EAPD MUTE# 2
Q53
1 2
44 17 MIC2_INT_R C356 1u/16V_6 D49 BAS316 2N7002E
NC/LFE MIC2-R U36
MONO_OUT R295 *888^0_4 MONO_888 45 16 MIC2_INT_L C357 1u/16V_6 MIC2_INTL1
NC/SIDE-L MIC2-L ACZ_RESET#_AUDIO 1 2

1
T86 46 15 FRONT-L C698 4.7u/6.3V_6 HPL-1 R571 10K/F_6 HPL-2 7 - 2 HPL D48 *BAS316
DMIC_CLK/SIDE-R NC/LINE2-R INL OUTL
DVSS1/DMIC_DATA

SECNTL 1 2
GPIO3/DMIC_CLK

EAPD R296 0_4 EAPD_268_888 47 14 + D46 *BAS316 ADOGND


DMIC-1/2/GPIO0

EAPD NC/LINE2-L
SPDIF_OUT R297 0_4 SPDIFO SENSEA R253 20K/F_4 MIC1_JD#
SDATA-OUT

48 SPDIFO Sense A 13 +3V_AVDD 8 PVDD


SDATA-IN MIC1_JD# 26

PCBEEP
RESET#
BIT-CLK

R254 10K/F_4 LINEIN_JD#


DVDD1

DVDD2
SUBWOOFER
DVSS2

LINEIN_JD# 26

SYNC
+NVDD 3 NVDD PGND 1
R247 39.2K/F_4 LINEOUT_JD# +3V_AVDD R554 *100K_4 9
+3V LINEOUT_JD# 26 GND +5V_ADO
MUTE# 5
1

10

11

12
SHDN#
CN30
C 1.6Vrms +3V + 4 ADOGND C
PCBEEP
CB^NL17SZ86DFT2G FRONT-R C700 4.7u/6.3V_6 HPR-1 R552 10K/F_6 HPR-2 6 OUTR 1441 MUTE 1
U11 INR - 2
MONO_OUT C690 1u/16V_6
+AZA_VDD

3 6

5
C392 C393 1 PCSPK
PCSPK 13
DVSS

10u/6.3V_6 .1u/16V_4 C369 1u/16V_6 BEEP_1 R262 10K_4 BEEP 4 G1412 4 7


PCMSPK 5
2 PCMSPK 23
C699 47P_4 *SUBWOOFER

3
FOR CB BEEP ADOGND ADOGND
268^0_6

C370 R257 R248 R572 10K/04 HPR


100P/50V_6 1K_4
17 MXM_SPDIF_OUT R302 *888^0_4 CB^10K_4

D50 BAS316
21,25,26 DOCKIN# Add JP for EMI.--1112 Modify Footprint.-- 9/28
LINE OUT/SPDIF
FOR NO CARDBUS R568 *10K_4
+3V
R284

ACZ_BITCLK

BEEP R256 NO_CB^0_4 PCSPK Green


ACZ_SDIN

ACZ_RESET#_AUDIO 13 CN29
TO DOCKING
R502 0_8 LINEOUT_JD# 5 9
BEEP_1 4 HPL_SYS R557 EZ^0_4 HPL_DOCK
HPL_DOCK 26
ACZ_SYNC_AUDIO 13 R503 *0_8 10 HPR_SYS R545 EZ^0_4 HPR_DOCK
HPR_DOCK 26
HPL R555 75/F_4 HPL_SYS1 L76 BK1608LL121_6_0.15A HPL_SYS 3 ADOGND
3

R270 22_4 HPR R547 75/F_4 HPR_SYS1 L74 BK1608LL121_6_0.15A HPR_SYS 2


ACZ_SDIN0 13
Q24 R261 0_6 1
R276 22_4 LINE1-L2 L61 EZ^BK1608LL121_6_0.15A LINEINL_DOCK
ACZ_BITCLK_AUDIO 13 LINEINL_DOCK 26
2 MUTE_BEEP ADOGND R546 R556 C676 C689 7 LED LINE1-R2 L64 EZ^BK1608LL121_6_0.15A LINEINR_DOCK
MUTE_BEEP 25 Drive LINEINR_DOCK 26
C388 22P/50V_4 *1K_4 *1K_4 470p/50V_NPO_4 470p/50V_NPO_4 8
IC
Tied at one point only 6
CB^2N7002
ACZ_SDOUT_AUDIO 13 under the codec or ADOGND 2SJ-D373_SPDIF MIC1_L2 L67 EZ^BK1608LL121_6_0.15A MIC1_L_DOCK
MIC1_L_DOCK 26
1

near the codec ADOGND MIC1_R2 L69 EZ^BK1608LL121_6_0.15A MIC1_R_DOCK


MIC1_R_DOCK 26
SPDIF_OUT
SPDIF_OUT 26
Add PU C:REV del SPDIF circuit

Codec/AMP Power +1.5V.--1016


VDDA_CODEC L78 +5V +1.5V R278 *0_6
FBMH1608HM151_6_2A
+3V R271 0_6 +AZA_VDD
B B
C377 C376
U37
VDDA_CODEC 60mil 4 3 4.7u/6.3V_6 .1u/16V_4
OUT IN
C371 C417 2 C412 C413
R301 GND
4.7u/6.3V_6 .1u/16V_4 5 SET SHDN 1 4.7u/6.3V_6 .1u/16V_4 ESD D39
+3V +3V

*28.7K/F_6 *MAX8863 +5V L43 +5V_ADO D45


ADOGND R300 FBMH1608HM151_6_2A 1 1
60mil LINEIN_JD# LINEOUT_JD#
*10K/F_6 3 3
C410 C411 C422 C423 C429 C420
2 2
VOUT = 1.25 ( 1+R1/R2 ) ADOGND
2nd source : G923-330T1U
4.7u/6.3V_6 .1u/16V_4 4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 4.7u/6.3V_6 *DA204U
AL000923003 *DA204U
R1 R2 ADOGND ADOGND

4.8375V 28.7K 10K


LINE IN
ADOGND
D44
+3V
D41
BLUE HPL_SYS 1 2
CN23
MDC ACZ_BITCLK_MDC1 R544 *0_4 ACZ_BITCLK_AUDIO +3V_S5
INT MIC. LINE1-L1 R484 75/F_4 LINE1-L2 L62 BK1608LL121_6_0.15A LINEINL_SYS
1
2
7
MIC1_JD#
1 *Uclamp0511P_4_ESD
ADOGND
CN5 R401 *0_4 3 D43
6
1 2 R400 0_4 R531 2.2K_4 MIC2-VREFO LINE1-R1 R516 75/F_4 LINE1-R2 L65 BK1608LL121_6_0.15A LINEINR_SYS 3
ACZ_SDOUT_MDC GND RSV LINEIN_JD# 2 HPR_SYS
13 ACZ_SDOUT_MDC 3 AC_SDO RSV 4 +3V_S5 4 1 2
5 6 C552 .1u/16V_4 CN24 8 *DA204U
ACZ_SYNC_MDC GND 3.3V R530 1K_4 MIC2_INTL1 C651 C643 ADOGND
13 ACZ_SYNC_MDC 7 AC_SYNC GND 8 1 Change value from 0 to 75 ohm.--1016 5
R399 22_4 MDC_SDIN1 9 10 2 *Uclamp0511P_4_ESD ADOGND
13 ACZ_SDIN1 AC_SDI GND
11 12 R581 0_4 3 470p/50V_NPO_4 470p/50V_NPO_4 LINEIN-2SJ-T351-S11
13 ACZ_RESET#_MDC AC_RST# AC_BCLK ACZ_BITCLK_MDC 13
15 16 4 C654
C542 GND GND
MDC R582 *0_4 ACZ_BITCLK_MDC1 INT_MIC *22p_4 Normal OPEN Jack
*10p_4 ADOGND
R402 C553
Check ADOGND R341 0_6
Footprint it R229 0_6
*33_4 *33p_4 R228 0_6

MIC
A
R343 0_6 A
C474 .1u/16V_4
SPEAKER CN25
C442
C346
.1u/16V_4
.1u/16V_4
1 7 C347 .1u/16V_4
MIC1_L1 R533 75/F_4 MIC1_L2 L68 BK1608LL121_6_0.15A MIC1_L 2 C477 *1000p_4
CN27 C427 *1000p_4
6
INSPKR- L70 EZ^BK1608LL121_6_0.15A INSPKR-N SPEAKER-CON MIC1_R1 R536 75/F_4 MIC1_R2 L71 BK1608LL121_6_0.15A MIC1_R 3
INSPKR+ L72 EZ^BK1608LL121_6_0.15A INSPKR+N 1 MIC1_JD#
25 4
INSPKL- L73 EZ^BK1608LL121_6_0.15A INSPKL-N 8 ADOGND
INSPKL+ L75 EZ^BK1608LL121_6_0.15A INSPKL+N 36
4 5
C665 C656
C681 C678 C671 C670 MIC-2SJ-T351-S11

180P_4 180P_4 180P_4 180P_4


ADOGND 470p/50V_NPO_4 470p/50V_NPO_4 Quanta Computer Inc.
Normal OPEN Jack
PROJECT : ZY7
ADOGND ADOGND Size Document Number Rev
1A
CODEC/AMP/MDC
Date: Thursday, June 26, 2008 Sheet 22 of 35
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

IDSEL SELECT POWER-ON-STRAPPING


(SEE NOTE & TABLE FOR OPTIONS)

NOTE: IDSEL SELECTION! R_A_CCLK R306 33_4 A_CCLK

THIS DEVICE UTILIZES A "SELECTABLE IDSEL" SCHEME. R321 33K/F_6


+3V
IDSEL CAN BE CONNECTED INTERNALLY TO ONE OF THREE
PCI AD LINES OR EXTERNAL IDSEL SIGNAL. C424 C451 C458 C439 R322 33K/F_6 VPPD0

D
22K TO 47K PULL-UP & PULL-DOWN RESISTORS ARE
REQUIRED TO BE CONNECTED TO PINS 123 & 124 TO
4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 .1u/16V_4
U16
PCMCIA SOCKET Check it
D
SELECT ONE OF THE 4 POSSIBLE IDSEL CONNECTIONS. OZ601T CN10
THE TABLE BELOW SHOWS THE 4 POSSIBLE COMBINATIONS.
64 124 VCCD0 1 17
CONFIGURING IDSEL TO BE INTERNALLY CONNECTED ALLOWS CORE_VCC VCC5#/VCCD0#/SDATA GND1 SKTA/VCC1 SKT_VCC
77 125 VCCD1 A_CAD0 2 51
FOR A FULL PARALLEL POWER MODE. IF AN EXTERNALLY CORE_VCC VCC3#/VCCD1#/SCLK A_CAD1 SKTAAD0/D3 SKTA/VCC2
97 CORE_VCC VPP_PGM/VPPD0/SLATCH 123 3 SKTAAD1/D4
CONNECTED IDSEL IS REQUIRED THEN AN INVERTER MUST 115 A_CAD3 4 18
BE CONNECTED TO VPP_PGM TO CREATE VPP_VCC. CORE_VCC A_CAD5 SKTAD3/D5 SKTA/VPP1
5 SKTAD5/D6 SKTA/VPP2 52
1 103 A_CAD31 A_CAD7 6
PCI_VCC CAD31 A_CAD30 A_CC/BE0# SKTAAD7/D7
VCC5# VPP_PGM IDSEL SELECT 20 PCI_VCC CAD30 102 7 -SKTACBE0/CE1#
AD[31..0] 33 101 A_CAD29Del SKT_VCC.-0927 A_CAD9 8
(124) (123) 12,16 AD[31..0] PCI_VCC CAD29 SKTAAD9/A10
100 A_CAD28 A_CAD11 9 69
AD31 CAD28 A_CAD27 A_CAD12 SKTABAD11/OE# GND5
4 AD31 CAD27 99 10 SKTAAD12/A11 GND6 70
AD30 5 110 A_CAD26 A_CAD14 11 71
DOWN DOWN AD18 AD29 AD30 CAD26 A_CAD25 A_CC/BE1# SKTAAD14/A9 GND7
6 AD29 CAD25 109 12 -SKTACBE1/A8 GND8 72
AD28 7 108 A_CAD24 A_CPAR 13 73
AD27 AD28 CAD24 A_CAD23 A_CPERR# SKTAPAR/A13 GND9
8 AD27 CAD23 106 14 -SKTAPERR/A14 GND10 74
DOWN UP AD20 AD26 9 105 A_CAD22 A_CGNT# 15 75
AD25 AD26 CAD22 A_CAD21 A_CINT# -SKTAGNT/WE# GND11
10 AD25 CAD21 104 16 -SKTAINT/RDY GND12 76
AD24 13 118 A_CAD20 77
UP DOWN AD25 AD23 AD24 CAD20 A_CAD19 GND13
14 AD23 CAD19 95 UPPER PIN GND14 78
AD22 15 94 A_CAD18 A_CCLK 19 79
AD21 AD22 CAD18 A_CAD17 A_CIRDY# SKTAPCLK/A16 GND15
16 AD21 CAD17 93 20 -SKTAIRDY/A15 GND16 80
UP UP PIN 127 AD20 17 75 A_CAD16 A_CC/BE2# 21 81
AD19 AD20 CAD16 A_CAD15 A_CAD18 -SKTACBE2/A12 GND17
C
18 AD19 CAD15 73 22 SKTAAD18/A7 GND18 82 C
AD18 19 74 A_CAD14 A_CAD20 23 83
AD17 AD18 CAD14 A_CAD13 A_CAD21 SKTAAD20/A6 GND19
For EMI AD16
21
22
AD17 CAD13 71
72 A_CAD12 A_CAD22
24
25
SKTAAD21/A5 GND20 84

AD15 AD16 CAD12 A_CAD11 A_CAD23 SKTAAD22/A4


28 AD15 CAD11 70 26 SKTAAD23/A3
Modify it from 150 to 100ohm.--0928 PCLK_PCM AD14 29 69 A_CAD10 A_CAD24 27
AD13 AD14 CAD10 A_CAD9 A_CAD25 SKTAAD24/A2
30 AD13 CAD9 68 28 SKTAAD25/A1
AD12 31 85 A_CAD8 A_CAD26 29 85
AD11 AD12 CAD8 A_CAD7 A_CAD27 SKTAAD26/A0 NC
34 AD11 CAD7 84 30 SKTAAD27/D0 NC 86
AD20 R328 100/F_4 PCM_IDSEL AD10 35 82 A_CAD6 A_CAD29 31 87
R329 AD9 AD10 CAD6 A_CAD5 A_CRSVD/D2 SKTAAD29/D1 NC
36 AD9 CAD5 83 32 SKTARSVD/D2 NC 88
AD8 37 80 A_CAD4 A_CCLKRUN# 33
*22_4 AD7 AD8 CAD4 A_CAD3 -SKTACLKRUN/WP
38 AD7 CAD3 81 34 GND2
ID Select : AD20 AD6 39 78 A_CAD2
AD5 AD6 CAD2 A_CAD1
40 AD5 CAD1 79 35 GND3
Interrupt Pin : INTA# C463 AD4 41 76 A_CAD0 A_CCD1# 36
AD3 AD4 CAD0 A_CAD2 -SKTACD1/CD1#
42 AD3 37 SKTAAD2/D11
Request Indicate : REQ0# *22p_4 AD2 43 A_CAD4 38
AD1 AD2 R_A_CCLK A_CAD6 SKTAD4/D12
44 AD1 CCLK 107 39 SKTAAD6/D13
Grant Indicate : GNT0# AD0 46 114 A_CFRAME# A_CRSVD/D14 40
PCM_IDSEL AD0 CFRAME# A_CIRDY# A_CAD8 SKTARSVD/D14
127 IDSEL CIRDY# 117 41 SKTAAD8/D15
CBE3# 11 116 A_CTRDY# A_CAD10 42
12 CBE3# C/BE3# CTRDY# SKTAAD10/CE2#
CBE2# 12 113 A_CDEVSEL# A_CVS1# 43
12 CBE2# C/BE2# CDEVSEL# -SKTAVS1/VS1#
CBE1# 49 61 A_CSTOP# A_CAD13 44
12 CBE1# C/BE1# CSTOP# SKTAAD13/IORD#
CBE0# 50 58 A_CPAR A_CAD15 45
12 CBE0# C/BE0# CPAR SKTAAD15/IOWR#
B 60 A_CPERR# A_CAD16 46 B
CPERR# A_CSERR# A_CRSVD/A18 SKTAAD16/A17
12 PCLK_PCM 26 PCI_CLK CSERR# 91 47 -SKTRSVD/A18
DEVSEL# 27 89 A_CREQ# A_CBLOCK# 48
12 DEVSEL# DEVSEL# CREQ# -SKTALOCK/A19
FRAME# 23 62 A_CGNT# A_CSTOP# 49
12 FRAME# FRAME# CGNT# -SKTASTOP/A20
IRDY# 24 88 A_CINT# A_CDEVSEL# 50
12 IRDY# IRDY# CINT# SKT_VCC -SKTADEVSEL/A21
TRDY# 25 59 A_CBLOCK#
12 TRDY# TRDY# CBLOCK#
STOP# 47 87 A_CCLKRUN# LOWER PIN
12 STOP# STOP# CCLKRUN#
PAR 48 119 A_CRST#R312 47K A_CTRDY# 53
12 PAR PAR CRST# -SKTATRDY/A22
98 A_CRSVD/D2 A_CFRAME# 54
PERR# R2_D2 A_CRSVD/D14 A_CAD17 -SKTAFRAME/A23
12 PERR# 51 PERR#/SPKR_OUT R2_D14 86 55 SKTAAD17/A24
63 A_CRSVD/A18 A_CAD19 56
REQ0# R2_A18 A_CVS1# A_CVS2# SKTAAD19/A25
12 REQ0# 2 REQ# CVS1 57 57 -SKTAVS2VS2#
SKT_VCC +3V +5V GNT0# 3 121 A_CVS2# A_CRST# 58
12 GNT0# GNT# CVS2 -SKTARST/RESET
56 A_CCD1# A_CSERR# 59
PCIRST# R334 0_4 PCIRST#_R CCD1# A_CCD2# A_CREQ# 0SKTASERR/WAIT#
12,19 PCIRST# 126 RST# CCD2# 122 60 -SKTAREQ/INPACK#
PCI_PME# R330 0_4 PCM_PME# 120 92 A_CAUDIO A_CC/BE3# 61
13 PCI_PME# PME#/RI_OUT# CAUDIO -SKTACBE3/REG#
C472 C471 C475 C473 C465 C467 90 A_CSTSCHG A_CAUDIO 62
CSTSCHG A_CSTSCHG SKTAAUDIO/BVD2
12,25 CLKRUN# 55 MF6 (CLKRUN#) 63 -SKTASTSCHG/BVD1
4.7u/6.3V_6 .1u/16V_4 4.7u/6.3V_6 .1u/16V_4 4.7u/6.3V_6 .1u/16V_4 PCMSPK 54 111 A_CC/BE3# A_CAD28 64
22 PCMSPK MF4 (RI_OUT#) CC/BE3# SKTAAD28/D8
SERIRQ 53 112 A_CC/BE2# A_CAD30 65
12,19,25 SERIRQ MF3 (SERIRQ#) CC/BE2# SKTAAD30/D9
52 66 A_CC/BE1# A_CAD31 66
12 INTA# MF0 (INTA#) CC/BE1# SKTAAD31/D10
67 A_CC/BE0# A_CCD2# 67
CC/BE0# -SKTACD2/CD2#
68

GND
GND
GND
GND
GND
GND4
U18
A
6 VCC1 +3.3 1 A
5 2 PCMCIA_SOCKET

32
45
65
96
128
VCCD0 VCC2 +3.3
7 VCC5# +5V 3
VCCD1 8 4
VCC3# GND
Check Footprint OZ2210G Quanta Computer Inc.
22K TO 47K PULL-UPS MUST BE PLACED PROJECT : ZY7
Size Document Number Rev
ON INTA#, PME#, SERIRQ# & CLKRUN#. 1A
PCMCIA(OZ601)
Date: Thursday, June 26, 2008 Sheet 23 of 35
5 4 3 2 1
A B C D E

+3V +1.8V_VDD L44


*BK1608HS220_6_1A
+1.8V 4 IN 1 CARD READER
VCC_XD VCC_XD

CN31
C446 C470 C469 C449 C434 C435 C440 C468 C452 C436 23
XD_D0/MS_D0/SD_D0 (4)SD-VCC
25 (7)SD-DAT0
10u/6.3V_6 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 10u/6.3V_6 .1u/16V_4 .1u/16V_4 .1u/16V_4 XD_D1/MS_D1/SD_D1 29
XD_D2/MS_D2/SD_D2 (8)SD-DAT1
10 (9)SD-DAT2 (18)XD-VCC 33
XD_D3/MS_D3/SD_D3 11
XD_CE#/MS_SCLK/SD_CLK (1)SD-DAT3 XD_CD#
24 (5)SD-CLK (19)XD-CD 34
4 XD_WE#/MS_BS/SD_CMD 12 1 XD_R/B# 4
SD_CD# (2)SD-CMD (2)XD-R/B XD_RE#
36 SD-CD (3)XD-RE 2
XD_WP#/SD_WP# 35 3 XD_CE#/MS_SCLK/SD_CLK
SD-WP (4)XD-CE XD_CLE
(5)XD-CLE 4
+3V 5 XD_ALE
(6)XD-ALE XD_WE#/MS_BS/SD_CMD
(7)XD-WE 6
7 XD_WP#/SD_WP#
(8)XD-WP
14 8 XD_D0/MS_D0/SD_D0
XD_D0/MS_D0/SD_D0 (9)MS-VCC (10)XD-D0 XD_D1/MS_D1/SD_D1
19 9

XD_D4/SD_D4
XD_D5/SD_D5
XD_D6/SD_D6
XD_D7/SD_D7
XD_D1/MS_D1/SD_D1 (4)MS-DATA0 (11)XD-D1 XD_D2/MS_D2/SD_D2
20 (3)MS-DATA1 (12)XD-D2 26
XD_D2/MS_D2/SD_D2 18 27 XD_D3/MS_D3/SD_D3
XD_D3/MS_D3/SD_D3 (5)MS-DATA2 (13)XD-D3 XD_D4/SD_D4

XD_RE#
16 (7)MS-DATA3 (14)XD-D4 28
XD_CE#/MS_SCLK/SD_CLK 15 30 XD_D5/SD_D5
MS_CD# (8)MS-SCLK (15)XD-D5 XD_D6/SD_D6
17 (6)MS-INS (16)XD-D6 31
XD_WE#/MS_BS/SD_CMD 21 32 XD_D7/SD_D7
(2)MS-BS (17)XD-D7

+3V +1.8V_VDD +3V +1.8V_VDD


36
35
34
33
32
31
30
29
28
27
26
25
U17 13 (3)SD/(1)MS/(1)XD-GND SDIO-GND 37
22 (6)SD/(10)MS/(9)XD-GND SDIO-GND1 38

TAV33
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
NC
NC
NC
GND
GND
GND
CARD_READER_TTN
37 DV18 GND 24
38 23 XD_R/B#
PCIES_EN MDIO13 XD_ALE VCC_XD VCC_XD
39 PCIES MDIO14 22
XD_CLE 40 21
XD_WP#/SD_WP# MDIO7 CR1_LEDN CN32
3 41 MDIO6 DV33 20 3
XD_CE#/MS_SCLK/SD_CLK_R 42 19 21
XD_WE#/MS_BS/SD_CMD MDIO5 DV33 XD_D0/MS_D0/SD_D0 SD-VCC
43 18 31
+3V 44
MDIO4
DV33
JMB385 DV18
CR1_PCTLN 17 MC_PWR_CTRL# XD_D1/MS_D1/SD_D1 34
SD-DAT0
SD-DAT1
XD_D3/MS_D3/SD_D3 45 16 SD_CD# XD_D2/MS_D2/SD_D2 9 38
XD_D2/MS_D2/SD_D2 MDIO3 CR1_CD0N MS_CD# XD_D3/MS_D3/SD_D3 SD-DAT2 XD-VCC
46 MDIO2 CR1_CD1N 15 11 SD-DAT3
XD_D1/MS_D1/SD_D1 47 14 T89 XD_CE#/MS_SCLK/SD_CLK 25 2 XD_CD#
XD_D0/MS_D0/SD_D0 MDIO1 SEECLK R620 0_4 CR_CPPE# XD_WE#/MS_BS/SD_CMD SD-CLK XD-CD XD_R/B#
48 MDIO0 SEEDAT 13 CR_CPPE# 14 15 SD-CMD XD-R/B 3
APCLKN

APREXT
APCLKP

SD_CD# XD_RE#
APGND

39 4
APVDD

APRXN
XRSTN

APRXP

APTXN
APTXP
XTEST

APV18

XD_WP#/SD_WP# SD-C/D XD-RE XD_CE#/MS_SCLK/SD_CLK


41 SD-WP XD-CE 5
6 XD_CLE
XD-CLE XD_ALE
REV:E Modify 19 SD-VSS1 XD-ALE 7
+1.8V_VDD 29 8 XD_WE#/MS_BS/SD_CMD
1
2
3
4
5
6
7
8
9
10
11
12

JMICRON SD-VSS2 XD-WE XD_WP#/SD_WP#


40 SD-GND XD-WP 13

12 23 XD_D0/MS_D0/SD_D0
12 4IN1_RST# XD_D0/MS_D0/SD_D0 MS-VCC XD-D0 XD_D1/MS_D1/SD_D1
22 MS-DATA0 XD-D1 27
APTXP_C C462 .1u/10V_4 XD_D1/MS_D1/SD_D1 24 30 XD_D2/MS_D2/SD_D2
PCIE_RXP5 9 MS-DATA1 XD-D2
PREXT

APTXN_C C461 .1u/10V_4 XD_D2/MS_D2/SD_D2 20 32 XD_D3/MS_D3/SD_D3


PCIE_RXN5 9 MS-DATA2 XD-D3
XD_D3/MS_D3/SD_D3 16 33 XD_D4/SD_D4
2 CLK_PCIE_CR# XD_CE#/MS_SCLK/SD_CLK MS-DATA3 XD-D4 XD_D5/SD_D5
2 CLK_PCIE_CR PCIE_TXN5 9 14 MS-SCLK XD-D5 35
MS_CD# 18 36 XD_D6/SD_D6
PCIE_TXP5 9 MS-INS XD-D6
XD_WE#/MS_BS/SD_CMD 26 37 XD_D7/SD_D7
MS-BS XD-D7
43 GND
R325 8.2K_4 12 mil 10 MS-VSS1
28 MS-VSS2 XG-GND1 1
42 GND XD-GND2 17
2 2
2 1 *CARD_READER_PROCONN
CR_WAKE# 13 VCC_XD
+3V D62 *BAS316

R338 4.7K_4 SD_CD# 2 1


D19 BAS316 XD_CD# R336 10K_4 XD_R/B#
R337 4.7K_4 MS_CD# 2 1 R309 10K_4 XD_WP#/SD_WP# Memory Card Power Supply Use 0805 type and over 20 mils trace
D18 BAS316 width on both side
C476 +3V
R310 10K_4 XD_CLE XD_RE# R326 200K_4
270p_4 250mA VCC_XD
XD_ALE R335 200K_4 R342
R339 MC_PWR_CTRL#

1
*10K_4 0_8
XD_CE#/MS_SCLK/SD_CLK_R R485 22_4 XD_CE#/MS_SCLK/SD_CLK 30mil Q31
MC_PWR_CTRL# 2
VCC_XD
*AO3403
C466

3
.1u/16V_4
+1.8V_VDD 30mil C426 C432 C425
For APVDD(pin5) VCC_XD
.01u/16V_4 .01u/16V_4 .01u/16V_4
APVDD(pin5) must put C601/1000pF close to R345 C479

1
APVDD(pin5) (length must under 120mil) and *100K_4 4.7u/6.3V_6 1
trace width = 20mil, after C601, pls put one C441 C443
more 0.1uF for it. .1u/16V_4 1000p_4

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev

WWW.AliSaler.Com A B C D
Date:
CARD READER JMB385
Thursday, June 26, 2008 Sheet
E
24 of 35
1A
5 4 3 2 1

I/O ADDRESS SETTING


L41 +3V
+3VPCU +A3VPCU I/O Address
BK1608HS220_6_1A C396 C404 BADDR1-0 Index Data
.1u/16V_4 10u/6.3V_6 C386 C380 00 XOR TREE TEST MODE
+3VPCU E775AGND 4.7u/6.3V_6 .1u/16V_4 01 CORE DEFINED
10 2Eh 2Fh
C401 C400 C361 C340 C382 C351 11 164Eh 164Fh

115

102
U12

19
46
76
88

4
4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 SHBM=0: Enable shared memory with host BIOS
D D

VCC1
VCC2
VCC3
VCC4
VCC5

AVCC

VDD
BADDR0 CCD_POWERON R293 10K_4

3 97 uR_SOUT_CR R292 *10K_4


12,19 LFRAME# LFRAME GPI90/AD0 TEMP_MBAT 27
12,19 LAD0 126 LAD0 GPI91/AD1 98 +1.8V_MXM BADDR1
127 99 RF_EN R267 10K_4
12,19 LAD1 LAD1 GPI92/AD2 PCIE_WAKE# 13,19,21
12,19 LAD2 128 LAD2 A/D GPI93/AD3 100 ICMNT 27 SHBM
12,19 LAD3 1 LAD3 GPIO05/AD4 108
12 LPC_CLK_EC 2 LCLK GPIO04/AD5 96

12,23 CLKRUN# 8 GPIO11/CLKRUN


GPI94/DA0 101 CC-SET 27
LPC_CLK_EC 121 105
13 GATEA20 GA20 GPI95/DA1 CPUFAN# 20
D/A GPI96/DA2 106 T135
13 RCIN# 122 KBRST GPI97/DA3 107 CV-SET 27
+3VPCU
R280 D6 2 1 BAS316 SCI#_UR 29 LPC
13 EC_SCI# ECSCI/GPIO54
64 MBCLK R244 4.7K_4
GPIO01/TB2 ACIN 17,27
22_4 6 95 MBDATA R239 4.7K_4
18 EC_FPBACK# GPIO24/LDRQ GPIO03/AD6 NBSWON# 20
GPIO06 93 LID591# 18,20
124 94 2ND_MBCLK R231 4.7K_4
20 ARCADE_KEY GPIO10/LPCPD GPIO07/AD7 SUSB# 13
119 2ND_MBDATA R234 4.7K_4
GPIO23/SCL3 MXM_CLK 17,18
C387 7 109
12 PCIE_RST_EC# LREST GPIO30/CIRTX2 SUSLED# 20
10P_4 120 MXM_CLK R289 4.7K_4
GPIO31/SDA3 MXM_DATA 17,18
123 65 MXM_DATA R290 4.7K_4
19,26 USBON# GPIO67/PWUREQ GPIO32/D_PWM BATLED0# 20
GPIO33/H_PWM 66 BATLED1# 20
12,19,23 SERIRQ 125 SERIRQ GPIO36/TB3 15 VRON 29
16 VGA_THERM# R303 *10K_4 +3V
GPIO40/F_PWM MAINON 32
2 1 KBSMI#_uR 9 17 PWROK_MXM
13 KBSMI# GPIO65/SMI GPIO42/TCK PWROK_MXM 17
D14 BAS316 GPIO 20
GPIO43/TMS AMP_MUTE# 22
GPIO44/TDI 21 EC_PROCHOT# 5
MX0 54 22
CN4 KBSIN0 GPIO45/E_PWM SUSON 31,32
MX1 55 23
KBSIN1 GPIO46/CIRRXM/TRST ENERGY_DET 21
1 MY0 MX2 56 24
C 1 MY0 20 KBSIN2 GPO47/SCL4 +1.2V_ON 30,32 C
2 MY1 MX3 57 25
2 KBSIN3 GPIO50/TDO D/C# 27
3 MY2 MX4 58 26 +3VPCU
3 KBSIN4 GPIO51/TA3 S5_ON 28,32 U10
4 MY3 MX5 59 27
4 KBSIN5 GPIO52/CIRTX2/RDY CPUMEMHOT# 5
5 MY4 MX6 60 28 HWPG 2ND_MBCLK 6 1
5 MY4 20 KBSIN6 GPIO53/SDA4 SCL A0
6 MY5 MX7 61 91 DNBSWON#_uR D16 BAS316 2ND_MBDATA 5 2
6 KBSIN7 GPIO81 DNBSWON# 13 SDA A1
7 MY6 110 3
7 GPO82/TRIS BT_POWERON# 19 A2
8 MY7 MY0 53 112
8 KBSOUT0/JENK GPO84/BADDR0 CCD_POWERON 18
9 MY8 MY1 52 80 7 8
9 KBSOUT1/TCK GPIO41 DOCKIN# 21,22,26 WP VCC
10 MY9 MY2 51 4
10 MY10 MY3 KBSOUT2/TMS GND C335
11 11 50 KBSOUT3/TDI
12 MY11 MY4 49 KB 31 24LC08
12 KBSOUT4/JEN0 GPIO56/TA1 MUTE_BEEP 22
13 MY12 MY5 48 117 RBS_RST T85 .1u/16V_4
13 MY13 MY6 KBSOUT5/TDO GPIO20/TA2
14 14 47 KBSOUT6/RDY GPIO14/TB1 63 FANSIG 20
15 MY14 MY7 43
15 MY15 MY8 KBSOUT7
16 16
MY16 MY9
42 KBSOUT8 TIMER GPIO15/A_PWM 32 CONTRAST 18
17 17 41 KBSOUT9 GPIO21/B_PWM 118 NUMLED# 20
18 MY17 MY10 40 62
18 KBSOUT10 GPIO13/C_PWM PWRLED# 20
19 MX7 MY11 39 81
19 MX7 20 KBSOUT11 GPIO66/G_PWM CAPSLED# 20 +3VPCU
20 MX6 MY12 38
20 MX6 20 KBSOUT12/GPIO64 +3VPCU
21 MX5 MY13 37
21 MX5 20 KBSOUT13/GPIO63
22 MX4 MY14 36 84 U15
22 MX4 20 KBSOUT14/GPIO62 GPIO77/SPI_DI CRT_SENSE# 18,26
23 MX3 MY15 35 SPI 83 SPI_SDI_uR 2 8
23 KBSOUT15/GPIO61/XOR_OUT GPO76/SPI_DO/SHBM RF_EN 19 SO VDD
24 MX2 MY16 34 82 R287
24 MX2 20 GPIO60/KBSOUT16 GPIO75/SPI_SCK CELL-SET 27
25 MX1 MY17 33 SPI_SDO_uR 5 7 C395
25 MX1 20 GPIO57/KBSOUT17 SI HOLD
26 MX0
26 MX0 20
75 RSMRST#_UR R251 0_4 10K_4 SPI_SCK_uR 6 3 .1u/16V_4
GPIO72/IRRX1/SIN2 RSMRST# 13 SCK WP
FFC_26P_KB 70 73
27 MBCLK GPIO17/SCL1 GPIO70/IRRX2_IRSL0 SUSC# 13
69 74 PWROK_EC_UR R245 0_4 SPI_CS0#_uR 1 4
27 MBDATA GPIO22/SDA1 GPIO71/IRTX/SOUT2 PWROK_EC 16,17 CE VSS
5 2ND_MBCLK 67 GPIO73/SCL2 SMB IR GPIO87/CIRRXM/SIN_CR 113 NC_TEMP 32
W25X80VSSIG
5 2ND_MBDATA 68 GPIO74/SDA2 GPIO34/CIRRXL 14
GPIO16/CIRTX 114
111 uR_SOUT_CR R291 0_4 1V8_ON T83
GPO83/SOUT_CR/BADDR1
20 TPCLK 72 GPIO37/PSCLK1
+3VPCU 71
20 TPDATA GPIO35/PSDAT1
B RP24 10K_10P8R 27 CHG-EN 10 86 SPI_SDI_uR_R R269 47_4 SPI_SDI_uR B
GPIO26/PSCLK2 F_SDI
10 1 MX3 T79 11 GPIO27PSDAT2 PS/2 F_SDO 87 SPI_SDO_uR_R R285 47_4 SPI_SDO_uR
MX4 9 2 MX2 12 FIU 90 SPI_CS0#_uR
MX5 8 GPIO25/PSCLK3 F_CS0
3 MX1 17,20 VGA_THERM# R307 0_4 13 GPIO12/PSDAT3 F_SCK 92 SPI_SCK_uR_R R299 47_4 SPI_SCK_uR +3V
MX6 7 4 MX0
MX7 6 5 E775_32KX1 77 30 ECDB_CLOCK T78 R246
32KX1/32KCLKIN GPIO55/CLKOUT
85 VCC_POR# R282 4.7K_4 +3VPCU
+3VPCU VCC_POR 10K_4
VCORF
AGND
GND1
GND2
GND3
GND4
GND5
GND6

R252 20M_6 E775_32KX2 79 104 VREF_uR R288 0_4 +A3VPCU


32KX2 VREF D13 BAS316
30 HWPG_1V_NB
R263
WPCE775 D12 BAS316
32 HWPG_1.1V_NB
5
18
45
78
89
116

103

VCORF_uR 44

Y4 33K/F_4 D11 BAS316 HWPG


31 HWPG_1.8V
1 4
D7 BAS316
32 HWPG_1.5V
C397 .1u/16V_4
C362 C368 C403 .1u/16V_4
C341
32.768KHz L40
18p_4 18p_4 1u/10V_4
D8 BAS316
32 HWPG_CPUIO
E775AGND BK1608HS220_6_1A
D9 BAS316
28 SYS_HWPG
12/12 to avoid floating D10 BAS316
32 HWPG_1.2V_S5
E775AGND
D15 *BAS316
32 HWPG_2.5V
VRON

R577 10K_4

A A
S5_ON
+3VPCU
R578 100K_4
MY0 R223 10K_4

SUSON

R579 100K_4

Quanta Computer Inc.


MAINON

R580 100K_4
PROJECT : ZY7
Size Document Number Rev
1A
WPCE775C_0DG & FLASH
Date: Thursday, June 26, 2008 Sheet 25 of 35
5 4 3 2 1
5 4 3 2 1

+5VPCU CN13-2 CN13-1


CABLE DOCK CN13-4 CN13-3
EZ^CABLE DOCKING EZ^CABLE DOCKING EZ^CABLE DOCKING EZ^CABLE DOCKING
5V_USB,3A
46 GND P3-PWR: 5V_USB,3A 68 REV C: Change to 1K --0408 65 P1-PWR : GND GND 1
EZ^0_4 R26 BUSBP9+ 47 2
13 USBP9+ USB+ DVI_CLKP DOCK_HDMICLK 18
EZ^0_4 R30 BUSBP9- 48 33 3
13 USBP9- USB- LIN_IN_DT# LINEIN_JD# 22 DVI_CLKN DOCK_HDMICLK# 18
USBON# 49 34 R35 EZ^1K_4 DOCKIN2# 20
19,25 USBON# USB_EN# LIN_IN_L LINEINL_DOCK 22 DOCK_DT2#
LIN_IN_R 35 LINEINR_DOCK 22 GND 4
VAUX_25 50 21 5
RESERVED1 22 HPL_DOCK HP_L DVI_TX0P DOCK_HDMITX0 18
EZ^0_4 R529 CRT_SEN#_D 51 36 22 6
18,25 CRT_SENSE# RESERVED2 MIC_DT# MIC1_JD# 22 22 HPR_DOCK HP_R DVI_TX0N DOCK_HDMITX0# 18
L7 VAUX_25_EZ 52 37 23
D LAN_PWR MIC_L MIC1_L_DOCK 22 22 LINEOUT_JD# HP_DT# D
LAN-PWR,500mA *EZ^BK1608HS121_6_0.3A 38 ADOGND1 24 7
MIC_R MIC1_R_DOCK 22 GNDA GND
21 DOCK_ACTLED# 53 LAN_ACT DVI_TX1P 8 DOCK_HDMITX1 18
54 39 ADOGND1 DOCK_DVI_HP_A 25 9
21 DOCK_LINKLED# LAN_LINK GNDA DVI_DT DVI_TX1N DOCK_HDMITX1# 18
55 GND 18 DOCK_HDMI_DDCDATA 26 DVI_DDCDT
DOCK_DT1# 40 DOCKIN# 21,22,25 18 DOCK_HDMI_DDCCLK 27 DVI_DDCCK GND 10
21 TX0P_DOCK 56 LAN_0 SPDIF 41 SPDIF_OUT 22 DVI_TX2P 11 DOCK_HDMITX2 18
21 TX0N_DOCK 57 LAN_0# 18 CRT_VSYNC_DOCK 28 VGA_VS DVI_TX2N 12 DOCK_HDMITX2# 18
To LAN 58 GND GND 42 18 CRT_HSYNC_DOCK 29 VGA_HS GND 13

21 TX1P_DOCK 59 LAN_1 LAN_2 43 TX2P_DOCK 21 18 CRT_DDCCLK_DOCK 30 VGA_DDCCK VGA_R 14 VGA_RED_DOCK 18


21 TX1N_DOCK 60 LAN_1# LAN2# 44 TX2N_DOCK 21 18 CRT_DDCDAT_DOCK 31 VGA_DDCDT GND 15
61 GND VGA_G 16 VGA_GRN_DOCK 18
GND 45 +5V 32 5V_S0 GND 17
62 VA_DOCK 18
21 TX3P_DOCK LAN_3 VGA_B VGA_BLU_DOCK 18
63 19

GND

GND

GND

GND
21 TX3N_DOCK LAN_3# GND

NC

NC
64 GND P4-PWR : 19V,5A 67 TO POWER VA (19V,5A) 66 P2-GND

69

70

71

72

74

73
C481 C33
EZ^10u/25V_1206
D42 +3V EZ^.1u/16V_4
EMI Solution
1
C C
CRT_SEN#_D
3 DOCK_ACTLED# C64 *10p_4
*DA204U
2 DOCK_LINKLED# C66 *10p_4

VA_DOCK VA1 +5V HPL_DOCK C56 *10p_4

R29 *EZ^0_6 1 HPR_DOCK C59 *10p_4


3
R31 *EZ^0_6 2 +3V_S5 LINEINL_DOCK C45 *10p_4
PD5 SBM1040-13-F R24
LINEINR_DOCK C61 *10p_4
EZ^10K_4
2

MIC1_L_DOCK C52 *10p_4


PD6 R25
DOCK_INSERT_5V 18 To CRT

3
SW1010CPT Q12 MIC1_R_DOCK C67 *10p_4
DCIN_S EZ^10K_4 EZ^2N7002E +3V_S5
1

DOCKIN# 2
R543 VGA_RED_DOCK C484 *10p_4
C30
B VGA_GRN_DOCK C485 *10p_4 B
EZ^.1u/16V_4 *10K_4

1
VGA_BLU_DOCK C486 *10p_4
DOCK_IN

3
Q58 CRT_HSYNC_DOCK C68 *10p_4
A1A:(9/18) Refer to Acer DVR1019 *2N7002E
To EC
CRT_VSYNC_DOCK C71 *10p_4
2 C418
CRT_DDCCLK_DOCK C74 *10p_4
*.1u/16V_4
CRT_DDCDAT_DOCK C69 *10p_4

1
R43 EZ^0_4
R40 EZ^0_4
C51 EZ^.1u/16V_4
C39 EZ^.1u/16V_4
C44 EZ^.1u/16V_4
CHECK +3V or +5V C54 EZ^.1u/16V_4
C58 *1000p_4
+3V_S5 +5V C47 *1000p_4

A DOCK_DVI_HP_A R47 EZ^1K_4 ADOGND1 A


DOCK_DVI_HPD 18
C383 C385 C384 C515 C73 C76

EZ^4.7u/6.3V_6 EZ^1u/10V_4 EZ^.1u/16V_4 EZ^4.7u/6.3V_6 EZ^1u/10V_4 EZ^.1u/16V_4 R49 R46 Quanta Computer Inc.
*10K_4 EZ^10K_4 PROJECT : ZY7
Size Document Number Rev
REV:E Modify 1A
CABLE DOCK
Date: Thursday, June 26, 2008 Sheet 26 of 35
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

PJ1 VA PD2 VA1


PF1 PL1 PDS1040S-13 PR166 PQ41 VIN PQ37
DCJK-2DC-G756-X06-5P-H LITTLE-7A-1206 UPB201212T-121Y-N 1 0.02_7520 FDD6685 FDD6685
1 1 2 3 VA2 3 4 3 4
2 2
3
PC4
R1 PR40

1
1
PC1 PC2 PC41 PR162 PC28 PC29
33K_6
2200p/50V_6 PL2 0.1u/50V_6 0.1u/50V_6 PD1 0.1u/50V_6 220K/F_6 0.1u/50V_6 2200p/50V_6
5
4

POWER_JACK UPB201212T-121Y-N P4SMAJ20A

D PC3 PC5 D

2
0.1u/50V_6 0.1u/50V_6
1 6 PR48
PD3 PR51 0_6 10K_6
Modify it on 9/22 SW1010CPT PR163 2 5
+3VPCU D/C# 25
220K/F_6
PR2 PD4 3 4

3
*10K/F_6
ACIN_1 2 1 DCIN_S PQ5
17,25 ACIN
IMD2AT108
2
*ZD12V
PR1 PR3 PQ4
*6.8K/F_6 *10K/F_6 DMN601K-7

1
PL3 VIN
PR195 PR196 UPB201212T-121Y-N
4.7K_4 100K_4 PC39 VA3
2.2u/10V_8
ISL6251_VDD 1 2
Input sense resistor and Constant power setting table PR159 PR158 2200p/50V_6

3
2.2/F_6 20/F_6 PC162

PR50
65W 90W 2 PC119 4.7_6 PC15
0.1u/50V_6 4.7u/10V_8
PQ48 ISL6251_VDDP
20m Ohm 20m Ohm DMN601K-7
1 2
PC23 PC22 PC21
R1 CSIP CSIN 2200p/50V_6 0.1u/50V_6 10u/25V_1206
C CS+020AGM00 CS+020AGM00 C

5
6
7
8
PD13

19

20

15
1
RB500V-40
PR47
71.5K Ohm 6.19K Ohm

CSIP

CSIN

VDD

VDDP
20/F_6 PR136 PC115
R2 6251LR CSOP 21 2.7_6 .1u/50V_8
4
PQ35
CS37153F917 CS26193F929 CSOP 6251B_2
16 6251B_1 FDS8878 9/10 Change PL4 to 6R8.
BOOT

2
PC37
47n/25V_6
10K Ohm 10K Ohm ISL6251_UGATE PL5 PR132
R3 17

1
BAT-V CSON 22 UGATE 6R8uH 0.03_3720
CS31003F949 CS31003F949

3
2
1
CSON BAT-V
PR49 18 ISL6251_PHASE
PHASE

5
6
7
8
20/F_6
2200p/50V_6
PU1 14 ISL6251_LGATE PC163
PR201 0_6 ISL6251A LGATE PC109
23 ACPRN 4
6251EN PC126 .01u/50V_6
PR165 0.1u/50V_6 13
PR202 10/F_6 PGND PQ34
PD17 25 CHG-EN 100K/F_6 DCIN_S DCIN 24 12 FDS6690AS
RB500V-40 DCIN GND PC110
PR160 6251LR 2200p/50V_6

3
2
1
82.5K/F_6 11 PC106 PC107
6251ACSET 2 VADJ BAT-V 10u/25V_1206 10u/25V_1206
ACSET
PR194 *0_6 PC7 10 VREF
100p/50V_6 PR161 ACLIM
3 EN

VCOMP
TEMP_MBAT 10K/F_6

ICOMP
CELLS

CHLIM
B TEMP_MBAT 25 B

VRFE
PR153 PR148
R2

ICM
UPB201212T-121Y-N 6.19K/F_6 *514K/F_6
PCN1 PF2 PL6
MBAT+ 1 2 BAT-V Float = 4.2V / CELL

6251ICOMP 5

9
1 VADJ
2 BUS-10A-1206 PR156 CV-SET 25
3 PL7 *10K/F_6 ACLIM PR27 *0_6
8 4 UPB201212T-121Y-N ISL6251_VDD 6251EN VREF
9 5
1

6251VCOMP1
PR9
6 100K/F_6 PR157 CC-SET 25 PR149 PR137
7
+3VPCU
10K/F_6 R3 10K/F_6 *514K/F_6
2

SUYIN_BATTERY PC9 6251CELLS_1 PC25


PC8 PC6 0.1u/25V_6 100p/50V_6
6251CELLS_1
10mil PR46
3

10K/F_6
47p/50V_6 47p/50V_6 PC120 PR164
PR150 2200p/50V_6 100_4
PR5 PR4 *0_6 6251CELLS_2 2 6251VCOMP2 ICMNT
ICMNT 25
100_4 100_4
3

PR155 LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050)


MBCLK 25 PQ2 3.3K/F_6
DMN601K-7 CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A
1

2
25 CELL-SET 2
MBDATA 25 PR42 4.026A=(1/0.02)((0.05/2.365)Vaclm+0.05)
PQ3 100K/F_6 PC117

1
PR32 DMN601K-7 .01u/50V_6
Vaclm=((33//152)/(33//152+19.6//152))*Vref
1

+3VPCU 100K/F_6
1

A PD8 PD9 A
1

ZD3.6V ZD3.6V PR8 PC11


R2=adapter current sense resistnece
1

*100K/F_6 .01u/50V_6 PC118 PC125


PD7 *100p/50V_6 3300p/50V_4
2

3TEMP_MBAT

*DA204U
Quanta Computer Inc.
2

PROJECT : ZY7
CELL-SET = Hi ----> Cells = VDD ---->4S Size Document Number Rev
A:(9/7) Add ESD diode base on EC FAE suggestion CELL-SET = Low ----> Cells = GND ---->3S 1A
CHARGER (ISL6251A)
Date: Thursday, June 26, 2008 Sheet 27 of 35
5 4 3 2 1
5 4 3 2 1

MAIND
MAIND 31,32

ISL6237_3V
SUSD PL16
SUSD 32 PBY201209T-121
5,32 SYS_SHDN# 1 2 VIN

PL15 PR191 VL
PBY201209T-121 0_4
D VIN D
REV B:add reverse PR203--0218

2
PC160
PC158 PC98 2200p/50V_6
+ VL 4.7u/10V_8 PC150

1
2200p/50V_6 0.1u/50V_6

PR185
390K_4

2
PR189 0_4 PR126
39K/F_4 PC96 0_4 PC148 PC147

2
PC97 PC99 PC101 PC153 PR182 1u-10V_6 2200P_4 10u/25V_1206
0.1u/50V_6 2200p/50V_6 10u/25V_1206 0.1u/50V_6

1
2

5
6
7
8
PC152 PC103 PC154 PC94
100u/25V_6X7.7 *10u/25V_1206 *.01u/16V_4 0.1u/50V_6

1
3V5V_EN REFPR203 *0_6 4
3V_DH PQ47

8
7
6
5
PR127 *0_6 FDS8878
PR183 OCP : 8A
115K_4

8
7
6
5
4
3
2
1
4 5V_DH +3VPCU
PQ31 PL12

LDOREFIN
LDO

ONLDO
VIN
NC

VCC
TON
REF

3
2
1
FDS8878 2R2uH-5.8mR
OCP: 8A +3VPCU
PR121 3V_LX

5
6
7
8
+5VPCU +5VPCU
9 32 REFIN2 200K/F_6
PL13 BYP REFIN2
10 31 1 2

1
2
3
2R2uH-5.8mR OUT1 ILIM2
C 11 FB1 OUT2 30 C
+5VPCU 5V_LX 1 2 12 PU10 29 SKIP 4
PR193 178K/F_6 DDPWRGD_R 13 ILIM1 ISL6237 SKIP# DDPWRGD_R
PGOOD1 PGOOD2 28
2

8
7
6
5
3V5V_EN 14 27 3V5V_EN PC161 PR118 +
PR190 EN1 EN2 2200p/50V_6 0_6 PC145
15 DH1 DH2 26
*0_4 16 25 PQ46 0.1u/50V_6 PC146
+ 5V_DL LX1 LX2
4 37 PAD
PC159 36
1

3
2
1
PAD

PGND
PVCC
PC105 PC157 PC104 2200p/50V_6 PQ32 FDS6690AS

BST1

BST2
GND
PAD
PAD
PAD

DL1

DL2
PC93

NC
2

FDS6690AS PC100 0.1u/50V_6


PR192 0.1u/50V_6 PR124

35
34
33

17
18
19
20
21
22
23
24
0_4 PR131 1/F_6
1
2
3

1/F_6 1 2
1 2 3V_DL PR113
1

*0_6 330u/6.3V_6X5.7
10u/25V_1206 0.1u/50V_6
VL PR128 SKIP PR120 *0_6 REF
330u/6.3V_6X5.7 0_6
2
PC155 0.1u/50V_6 PC95 PR115 0_6
3 1u/16V_6
C562 C585 C605 PD15
OCP:8A 1 1PS302 PC156 Change from 5V_DL to 3V_DL.--1121 +3VPCU
1000P_4 1000P_4 1000P_4
L(ripple current) 0.1u/50V_6
PC149 PR116
=(19-5)*5/(2.2u*0.4M*19) 0.1u/50V_6 2 OCP:8A *10K/F_6
~4.1867A 3
L(ripple current) DDPWRGD_R PR117 0_6
B SYS_HWPG 25 B
Iocp=8-(4.1867/2)=5.9067A PD14
Add Cap for EMI.--1102 1 1PS302 =(19-3.3)*3.3/(2.2u*0.5M*19)
Vth=5.9067A*15mOhm=88.6mV ~2.48A
PR184 +3VPCU
R(Ilim)=(88.6mV*10)/5uA
+15V_ALWP 1 2 REFIN2 Iocp=8-(2.48/2)=6.76A
~177.2K +15V

1
PR186 *0_6
PR188 PR187 Vth=6.76A*15mOhm=101.4mV
22_8 PC151 *200K_4 *39K_4 R(Ilim)=(101.4mV*10)/5uA
0.1u/50V_6
~202.8K

1
2
5
6
VIN +3V_S5 +15V +5VPCU
+3VPCU
SUSD 3 PQ16
+3VPCU FDC653N_NL
PR93 PR87 PR95
1M_6 22_8 1M_6

4
5
6
7
8

5
6
7
8

+3VSUS
S5D MAIND 4

1
2
5
6
MAIND 4
3

PQ14
3

PQ33 FDS8878 S5D 3 PQ15


2 FDS8884 FDC653N_NL
25,32 S5_ON
2
PR86 2
3
2
1

4
1M_6 PQ13
1

3
2
1

PQ11 PQ10 DMN601K-7


+3V_S5
DTC144EU DMN601K-7
1

A A
1

+5V
+3V

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
1A
SYSTEM 5V/3V (ISL6237)
WWW.AliSaler.Com 5 4 3 2
Date: Thursday, June 26, 2008 Sheet
1
28 of 35
5 4 3 2 1

PL8 PL20
2.5uH_7.5A PBY201209T-121
Offset & LGATE_NB
CPU_VDDNB_CORE VIN
OFS/VFIXEN Droop SVI VFIX

1
GND O O X PC170
5 VDD_NB_FB_H +

1
+3.3V X X O 2200p/50V_6

2
1

D1

D1
S2

G2
PR15
+5V X O X 10/F_6 + PC32
10u/25V_1206

2
PQ36 PC14 PC18 PC12

2
5 VDD_NB_FB_L FDS6900AS 10u/25V_1206 10u/25V_1206 0.1u/50V_6 PC127
100u/25V_6X7.7

S1/D2
Metal VID Codes PR22

G1
PR11 10/F_6 10/F_6
D
SVC SVD Output +5VPCU
add it.--1023 D

8
PC31
0 0 1.1 330u_2V_7343

2
UGATE_NB
0 1 1.0 PC113

1
1u/25V_8

1
1 0 0.9 PR145 PC114
PR142 0_8 22.1K/F_4 1000p/50V_6

2
1 1 0.8
PC108
33p/50V_4
PC112
VFIXEN VID Codes PR12 10/F_6 1200p/50V_4
VIN

1
SVC SVD Output PL19
PBY201209T-121

2
0 0 1.4 VIN

2
PC13

1
0 1 1.2 0.1u/50V_6 PR36 LGATE_NB

1
11.3K/F_6 PC168
1 0 1.0

2
PR138 PHASE_NB 2200p/50V_6
1 1 0.8 44.2K/F_4 PR16 PR23

5
0_4 0_4
UGATE_NB PC20 PC124 PC38 PC35
0.1u/50V_6 10u/25V_1206 10u/25V_1206 0.1u/50V_6

1
+5VPCU PR33 0_4 UGATE_0 4
+3VPCU

49

48

47

46

45

44

43

42

41

40

39

38

37

1
2
3
PR37 *0_4 PR28 PQ39

GND

VIN

VCC

FB_NB

COMP_NB

FSET_NB

VSEN_NB

RTN_NB

OCSET_NB

PGND_NB

LGATE_NB

PHASE_NB

UGATE_NB
+3V 1/F_6 AOL1414
PR35 PL10 0.36uH
10K/F_6 1 2 CPU_CORE0
1 OFS/VFIXEN BOOT_NB 36

4
C C
PR133 0_4 PR34 PR43 1/F_6 PC169

1
*10K/F_4 2 35 1 2 PR141
5,16,32 CPU_COREPG PGOOD BOOT_0

5
2200p/50V_6 + + +
PR10 0_4 PC33 PR134
+1.8V +3V 3 34 UGATE_0 0.1u/50V_6

2
PWROK UGATE_0 0_6 0_6
Pin 49 is GND Pin 4
PR17 0_4
2

PQ1 PR21 4 33 PHASE_0 PQ40 PC172 PC42 PC133


5 SVD

1
2
3
DTC144EU SVD PHASE_0 AOL1412 ISP_0 330u_2V_7343 330u_2V_7343 330u_2V_7343
10K_6
PR18 0_4
5 32 ISN_0
5 SVC SVC PGND_0
5 PGD_IN 1 3
PR19 0_4
PR38 *0_4 6 PU11 31 LGATE_0 +5VPCU PL18
25 VRON ENABLE LGATE_0
ISL6265 PBY201209T-121
VIN
7 RBIAS PVCC 30 1 2

1
2 1 PR14 PR7 PC34 PC166
107K_4 10K/F_4 8 29 LGATE_1 2.2u/10V_6

2
OCSET LGATE_1

5
PR13 PC10 2200p/50V_6
255/F_4 4700p/25V_4
9 VDIFF_0 PGND_1 28
UGATE_1 4 PC123 PC122 PC121
PR6 10u/25V_1206 10u/25V_1206 0.1u/50V_6
1K/F_4 10 27 PHASE_1

1
2
3
FB_0 PHASE_1 PQ42
AOL1414 REV B:Add PC172,PC173 for ISL request --0226
1 2 11 26 UGATE_1
COMP_0 UGATE_1
PR20 PC17 PL9 0.36uH
54.9K/F_4 1 2 1200p/50V_4 12 25 1 2 1 2 CPU_CORE1
VW_0 BOOT_1

COMP_1
VDIFF_1
VSEN_0

VSEN_1

PC16 PR26 PR41 1/F_6 PC36


RTN_0

RTN_1

4
ISN_0

ISN_1
ISP_0

VW_1

ISP_1
180P_4 6.81K/F_4 0.1u/50V_6 PC167
FB_1

1
B 2 1 B
2200p/50V_6 + + + +
PC26
13

14

15

16

17

18

19

20

21

22

23

24
1000p/50V_6 LGATE_1 4

2
PR30 PR39
PQ38

1
2
3
AOL1412 0_6 0_6 PC40 PC173 PC128
ISP_0 PR25 PR144 PR146 PR151 330u_2V_7343 330u_2V_7343 330u_2V_7343
0_4 0_4 0_4 0_4
Close to PR135 PC171
2

3.92K/F_4 PR139 ISN_1 *330u_2V_7343


CPU socket 18.2K/F_4 PC111
CPU_CORE0 0.1u/50V_6
1

PR31
PR24 ISN_0 PC24 18.2K/F_4
10/F_6 0.1u/50V_6
1
2

PR154
5 CPU_VDD0_FB_H 6.81K/F_4 ISP_1
1

5 CPU_VDD0_FB_L PC27 PR29


1000p/50V_6 3.92K/F_4 ISN_1

Parallel

PR143
10/F_6

Close to
CPU socket
1

PC116
2

1200p/50V_4
2

PR147 PC19
10/F_6 4700p/25V_4
1

A 5 CPU_VDD1_FB_L PR45 PC30 A


180P_4
2

5 CPU_VDD1_FB_H 1K/F_4

PR140
255/F_4
CPU_CORE1
PR152
10/F_6
Quanta Computer Inc.
PR44
54.9K/F_4 PROJECT : ZY7
Size Document Number Rev
1A
AMD Gfiffin (ISL6265)
Date: Thursday, June 26, 2008 Sheet 29 of 35
5 4 3 2 1
1 2 3 4 5

A A

VIN-NB CORE PL17


PBY201209T-121
VIN
+5VPCU
PR109 PC164

2200p/50V_6
10_6
PD12 PC77
change to 1.2v_on RB500V-40 0.1u/50V_6
PC82
enable 11/16

5
6
7
8
PR107 PC81
1M_6 *.1u_6
4.7u/10V_8

2
PR96 4 PC76
B 0_6 PQ7 10u/25V_1206 B
PR99 PC79 FDS8878
PR104 47K_6 100K/F_6 .1u/50V_8
25,32 +1.2V_ON 15 EN/DEM BOOT 13
9/27 Modify
+3V UGATE-1V PL4
16 12 OCP: 6A

3
2
1
PC84 TON UGATE 2.5uH_7.5A
0.1u/50V_6 1 11 PHASE-1V
VOUT PHASE +NB_CORE
PR94 4.53K/F_6
2 VDD OC 10 1V

5
6
7
8
PR110 PU8 PC165

1
*10K_6 3 RT8202 9
FB VDDP 2200p/50V_6 +
9/27 Modify
4 8 LGATE-1V 4 PR105
25 HWPG_1V_NB PGOOD LGATE PQ8 PC88

2
6 7 FDS6690AS 3.65K/F_6 33p/50V_6
GND PGND
5 17
Rds*OCP=RILIM*20uA
NC TPAD
14 Change R2 from 4.7K to 3.65K.--1121
GND

GND

GND

GND

3
2
1
NC
1

PC87 PC86 PC83 PC72 PC73 PR112


1u/16V_6 560u/2.5V_6X5.7 10u/10V_8 10K/F_6
2

18

19

20

21

*1000p/50V_6 .01u/50V_6 VOUT=(1+R2/R3)*0.75


1V_FB

C TON=3.85p*RTON*Vout/(Vin-0.5) 6A OCP --- OC=4.53K C

FDS6690AS Rds=15mOhm 9/26 Addition


Frequency=Vout/(Vin*TON) HI --- 1.0V
+5VPCU LOW ---1.1V
PR85
1V_FB
PR198

3
35.7K/F_6 10K/F_6
PR84
0_6
2

1
PQ12
DMN601K-7 PR197 PR199
*0_6

2
100/F_6

3
PC78
0.022u/50V_6

2 +NB_CORE_ON 10
PQ49
DMN601K-7
D D

1
Quanta Computer Inc.
PROJECT : ZY7
Size Document Number Rev
1A
NB_CORE(RT8202)

WWW.AliSaler.Com 1 2 3 4
Date: Thursday, June 26, 2008 Sheet

5
30 of 35
5 4 3 2 1

PL21
PBY201209T-121
VIN

+1.8VSUS
PR167
PC134 11/19 Modify
D *2.2/F_6 D

5
10u/10V_1206
PU12
TPS51116 PQ43 PC129 PC131 PC130
PR170 *0_6 1 19 4 AOL1414 PC132 2200p/50V_6 10u/25V_1206 10u/25V_1206
4 CPU_VTT_SENSE VLDOIN DRVH *2200p/50V_6
2 20 PC137 0.1u/50V_6
OCP: 12.44A
+SMDDR_VTERM

1
2
3
VTT VBST PL11
PR169 0_6 4 18 +1.8VSUS
PC135 PC136 VTTSNS LL
10u/10V_8 10u/10V_8 5 17 2R2uH-5.8mR
GND DRVL

5
3 16 +
VTTGND PGND PR175
DIS_MODE 6 11 S3_1.8V PR179
MODE S3 0_6 *2.2/F_6
4
7 12 S5_1.8V PR180
+SMDDR_VREF VTTREF S5 0_6 SUSON 25,32
PQ44

1
2
3
PR176 5VIN 8 14 5VIN AOL1412
0_6 PC141 COMP V5IN PC142 PC144 PC48
0.033u/50V_6 9 13 PR181 +3VPCU +3VPCU *2200p/50V_6 560u/2.5V_6X5.7 10u/10V_8
VDDSNS PGOOD 100K/F_6

GND
GND
GND
GND
GND
GND
GND
5VIN 10 15
VDDQSET CS
PR177

21
22
23
24
25
26
27
0_6 PC138
PR171
*1000p/50V_6 5.1K/D_6

PR172 *0_6 DIS_MODE FOR DDR II


5VIN
+5VPCU HWPG_1.8V 25

1
C PR174 PC139 C
0_6
+1.8VSUS PR168 0_6 4.7u/6.3V_6

2
PR173 (10u*PR135)/Rdson+Delta_I/2=Iocp
*110K/F_6
5 CPU_VDDIO_FB_H
PR57 *0_6 R2 Delta IL=(19-1.8)*1.8/(2.2uH*0.4MHz*19)
5 CPU_VDDIO_FB_L
PR56 *0_6 =1.852A
PR178
PR35=5.296K=(12.44-1.852/2)*4.6m/10u
R1 *76.8K/F_6 S3_1.8V S5_1.8V

+1.8VSUS
PC140 PC143
*0.1u/50V_6 *0.1u/50V_6

R1=(100*Vout-R2)K
if tune Vout ,PR133 un-mount, PR139 PR140 mount 1
2
5
6
8/27 Add CAP for Delay time.
MAIND 3 PQ45
28,32 MAIND 4
FDC653N_NL

B B
+1.8V

C REV: change to 330PF for EMI request

+5VPCU +3V +3V +1.1V +1.8VSUS +1.8VSUS +1.8VSUS +NB_CORE

C547 C645 C514 C103 C275 C289 C606 C516

1000P_4 330P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4

Add Cap for EMI.--1112

A A

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
1A
DDR 1.8V(TPS51116)
Date: Thursday, June 26, 2008 Sheet 31 of 35
5 4 3 2 1
5 4 3 2 1

PQ6
AOL1414
+1.8VSUS
3
5 2
1
PC63
PC64 +3VPCU
0.1u/50V_6 10u/6.3V_6

4
9338DRV

PR75
PR69 +5VPCU *100K_4
D 0_6 PC68 PU6 D
+3VSUS +1.2V 0.1u/25V_6 RT9025-25PSP
PR63 100K_4 4 1
VPP PGOOD HWPG_1.2V_S5 25

2
4.5A
3 6 PC62 PR76 2 6 +1.2V_S5
25 HWPG_CPUIO PGD DRV 25,28 S5_ON 10K/F_6 VEN VO
.01u/16V_4 PR73

1
PR61 *10K_6 Rg 14K/F_6 3 1A
+3VPCU VIN
MAINON 9338EN 4 PC66 8
EN GND

ADJ
5 + 9 5
ADJ PC65 GND NC PR71

GND
PR62 0_6 +5VPCU 0.1u/50V_6 470U/2V_7 PC61
1 Vout1 = (1+Rg/Rh)*0.5 17.4K/F_6

7
VCC PR74 10u/10V_8
25,30 +1.2V_ON 10K/F_6

2
PC60 PU5 Rh 0.8V
PR60 *0_6 0.1u/50V_6 G9338 Change it for layout.--1029
NTC resistor on Thermal module
PC70 PC71 PC69
5,16,29 CPU_COREPG 10u/4V_8 0.1u/25V_6 *0.1u/50V_6
PC67 PR72
10u/6.3V_6 34K/F_6 VL VL VIN VIN
PC57

2
*1u/16V_6
Vout =0.8(1+R1/R2) PD10
=1.2V RB500V-40
SYS_SHDN# 5,28

1
+3VPCU PR78 PR81
1.74K/F_4 200K/F_4 PR77
200K/_6
PC74
PR52 0.1U/X7R-50V_6

3
+5VPCU *100K_4 +3VSUS

8
C C
PC47 PU2 2.469V 3 +
0.1u/25V_6 RT9018A 1 2
4 1 PR123 20 FAN_CTRL FAN_CTRL 2
VPP PGOOD HWPG_1.1V_NB 25 +5VPCU -
100K_4 PQ9
PR54 2 6 +1.1V PU7A DMN601K-7
25 MAINON

4
0_6 VEN VO PC91 PU9 LM393 PC75

1
3 2A 0.1u/25V_6 RT9025-25PSP 0.1U/X7R-50V_6
+1.8VSUS VIN
8 GND 4 VPP PGOOD 1 HWPG_1.5V 25
ADJ

PR200 9 5 PR80
GND NC PR55 MAINON PR114 196K/F_4
REV B:Change to +1.8VSUS from +3VPCU --0215 2 VEN VO 6 +1.5V +3VPCU
100K/F_6 13K/F_6 PC45 10K/F_6
7

10u/10V_8 3 1.5A
+1.8VSUS VIN
8 GND

ADJ
0.8V 9 5 VL
GND NC PR130
PC44 PC46 PC43 30.1K/F_6 PC102

7
10u/4V_8 0.1u/25V_6 *0.1u/50V_6 10u/10V_8 PR82
PR53 100K/F_6
34K/F_6 0.8V
PR79
PC89 PC90 PC92 10K/F_6 PU7B
RB500V
10u/4V_8 0.1u/25V_6 *0.1u/50V_6
Vout =0.8(1+R1/R2) PR129
5 +
7 1 2
=1.1V 34K/F_6 4.95V 6 -
NC_TEMP 25

Vout =0.8(1+R1/R2) PD11

=1.5V LM393

PR83
1M/F_6
B B
VIN +1.8VSUS +3VSUS +SMDDR_VTERM +15V
For EC control thermal protection (output 3.3V)
+NB_CORE
VIN +1.2V +3VSUS

PR97 PR100 PR102 PR101 PR98


1M_6 22_8 22_8 22_8 1M_6
PR122 PR108 PR125
1M_6 22_8 22_8 PR59
SUS_ON_G SUSD +5VPCU 100K_4
SUSD 28
3

PC52 PU3
3

0.1u/25V_6 RT9025-25PSP

3
PR103 4 1
VPP PGOOD HWPG_2.5V 25

3
2 1M_6 2 2 2 2
25,31 SUSON PC85 PR119 MAINON PR58 2 6
10K/F_6 VEN VO +2.5V
PQ24 PQ26 PQ25 PQ27 *2200p/25V_4 +1.2V_ON 2 1M_6 2 2
PQ23 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 +3VSUS 3 0.75A
1

DTC144EU PQ28 PQ29 VIN


8
1

GND

ADJ
PQ30 DMN601K-7 DMN601K-7 9 5

1
DTC144EU GND NC PR64
add it.--1008

1
73.2K/F_6 PC58

7
10u/10V_8

VIN +1.1V +1.8V


0.8V
+3V +5V +15V
PC49 PC50 PC51
modify 11/16 10u/4V_8 0.1u/25V_6 *0.1u/50V_6
PR65
PR111 PR92 PR91 PR89 PR90 PR88 34K/F_6
1M_6 22_8 22_8 22_8 22_8 1M_6 Vout =0.8(1+R1/R2)
A A
MAINON_ON_G MAIND
=2.5V
MAIND 28,31
3

3
3

PR106
MAINON 2 1M_6 2 2 2 2 2

PQ21 PQ20 PQ17 PQ19 PQ18


PC80
*2200p/25V_4
Quanta Computer Inc.
PQ22 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7
PROJECT : ZY7
1

DTC144EU
1

Size Document Number Rev


1A
Discharge (1.1V/1.2V/2.5V)
Date: Thursday, June 26, 2008 Sheet 32 of 35

5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

ISL6265
VCC_CORE
PU11 <VRON>

RT8202
+NB_CORE
PU8 <+1.2V_ON+RC>
D D

+5VPCU
<AC/DC Insert>

+5VPCU
FDS8884
+5V
PQ33 <MAIND>
VIN

ISL6237 +3VPCU
PU10 <AC/DC Insert>

C C
FDC653N +3V_S5
PQ15 <S5D>

FDC653N +3VSUS
+3VPCU

ADAPTER <SUSD>
PQ16
Charger RT9025
+2.5V
ISL6251A VIN PU3 <MAINON>
FDS8878
+3V
BATTERY PU1
PQ14 <MAIND>

RT9025
+1.2V_S5
PU6 <S5_ON>

+1.8VSUS
B B
<SUSON>

FDC653N
+1.8V
VIN

+1.8VSUS

PQ45 <MAINON>

G9338
+1.2V
PU5 +1.2V_ON
TPS51116
PU5
RT9025
+1.5V
PU9 <MAINON>

RT9018 +1.1V
PU2 <MAINON>

A A

SMDDR_VTERM
<MAINON>

SMDDR_VREF
<SUSON>
Quanta Computer Inc.
PROJECT : ZY7
Size Document Number Rev
1A
Power Tree
Date: Thursday, June 26, 2008 Sheet 33 of 35
5 4 3 2 1
5 4 3 2 1

MODEL
ZY7
Model REV CHANGE LIST FROM To
X 1A
X 1A
ZY7 MB 1A 1A First release--0107 X 1A
X 1A
X 1A
D 1A 2A D
Page 02 change C350 from unstuff to 22P for EMI request--0215
1A 2A
Page 03 Add HOLE39 for ME request--0215
1A 2A
Page 06 Del C193, C203, C178 and C184,C185 for ISL6265 request--0226
1A 2A
Page 29 PC172,PC173 for ISL6265 request--0226
1A 2A
Page 09 Add HDMI CAP circuit for layout request --0216
1A 2A
page 10 Add C601,C646,C647,C648 100PF for EMI request--0201
1A 2A
Page 10 Change R149 value from 150ohm to 140 ohm following AMD change---0214
1A 2A
Page 10 Change +3V_AVDD_NB PU from +3V_S5 to +3V follow AMD CRB suggest.--0201
1A 2A
Page 16 Add C641 1N Capacitor to Smoothing NB_PWRGD_IN ---0202
1A 2A
Page 16 Change U7,R179 unstuff,PR183 stuff,follow A1-2chip .--0202
1A 2A
Page 17 Del MXM_POWEREN circuit follow AMD request--0214
1A 2A
2B Page 18 Change R393 value from 150ohm to 140 ohm following AMD change---0214
1A 2A
Page 19 Add L79,L80 for EMI request--0218
1A 2A
Page 19 add reseve D34,D35,D37,D38 for ESD request--0218
1A 2A
Page 21 SWAP TX0P/N with TX3P/N net for LAN layout issue--0214
1A 2A
Page 21 change R39 Value from 1.24K to 1.2K and sutff R63 for LAN issue--0215
1A 2A
Page 22 del VR button function follow Spec--0218
1A 2A
Page 28 add reverse PR203 ---0218
1A 2A
page 32 PU2 Power source change to +1.8VSUS from +3VPCU--0128
1A 2A
C 1A 2A C

1A 2A
1A 2A
1A 2A
2A 2B
page 18 add R617,R616,R618,R619 for HDMI vendor suggest--0331
2A 2B
page 21 SWAP CN12 LAN_LINKLED#_SYS and LAN_ACTLED#_SYS net for LAN LED issue---0331
2A 2B
page 22 change u36 footprint---0331
2A 2B
page 22 del SPDF circuit, C684, R561,Q52 cancel, U34 cancel----0331
2A 2B
page 10 unstuff Q50 and R452,stuff R459 follow AMD suggest---0402
2A 2B
page 19 add R198 and R207(reserve) for FP S3 issue---0408
2A 2B
2C Page 31 change C645 from 1000P to 330P for EMI issue---0408
2A 2B
Page 16 add C684, C696 330PF for EMI issue---0408
2A 2B
Page 12 add C178 10PF for EMI issue ---0408
2A 2B
Page 26 change R35 to 1K for Docking AC issue---0408
2A 2B
Page 18 unstuff R3, Q1,Q4,Q5, Add and stuff D17, D21---0410
2A 2B
2A 2B
2A 2B
2B 3A

B B

2D

A A

DOC NO. PROJECT MODEL : ZY7 APPROVED BY: DATE: 2008/01/07

PART NUMBER: DRAWING BY: REVISON: 3A

Title
<Title>

Size Document Number Rev

WWW.AliSaler.Com
5 4 3 2
Custom<Doc>

Date: Thursday, June 26, 2008 Sheet


1
34 of 35
<RevCode>
5 4 3 2 1
NB CLOCK INPUT TABLE
NB CLOCKS RS740 RX780 RS780

HT_REFCLKP

HT_REFCLKN
66M SE(SE)
NC
100M DIFF
100M DIFF
100M DIFF
100M DIFF
Clock distribution SMBUS Table
REFCLK_P
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) 100M DIFF
REFCLK_N NC NC vref
100M DIFF
GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)* CPU_HT_CLK
DIMM1 DIMM2 GPP_REFCLK NC 100M DIFF 100M DIFF(OUT) PCI CLK0
D
PCMCIA D
NB_HT_CLK 33MHZ
GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF
SDATA0/SCLK0(+3V) Switch DDR
2 PAIR MEM CLK

2 PAIR MEM CLK


* RS780 can be used as clock buffer to output two PCIE referecence clocks PCI CLK1 +3V
By deault, chip will configured as input mode, BIOS can program it to output mode. 25M_48M_66M_OSC 33MHZ SB700
Switch CLK GEN
AMD NB AMD SB PCI CLK2
SDATA1/SCLK1(+3V) (Reserve) +3V
SB700 33MHZ
RS740/RX780/RS780
HT REFCLK HT_REFCLK
SDATA2/SCLK2(+3V_S5) MINI CARD
PCI CLK3 Switch
100MHz DIFF(RX780/RS780) NB_DISP_CLK +3V
AM2/AM2g2 CPU 33MHZ
1 PAIR CPU CLK REFCLK GFX_REF GPP_SB_REF GPP_REF GPP_CLK3 SDATA3/SCLK3(+3V_S5)
200MHZ PCI CLK4
AM2 SOCKET NEW CARD
33MHZ
NB-OSCIN +3V
14.318MHZ
LPC_CLK0
NBGFX_CLK LPC DEBUG CARD
33MHZ
100MHZ LAN
+3V_S5

32.768KHZ
SBLINK_CLK LPC CLK1
C
EC C
100MHZ
EXTERNAL 33MHZ
GPP_CLKP
CLK GEN.
100MHZ
AZ_BITCLK
NB GPP PCIE CLK NB PCIE Ref clock PCIE_RCLK/ HD AUDIO CON
NB_LNK_CLK
100MHZ

PCIE CLK SLT_GFX_CLK


100MHZ MXM 1 - 16 LANES BATTERY
SDA1/SCL1(+3VPCU)
PCIE CLK +3VPCU
GPP_CLK0
100MHZ MINI PCIE
PCIE CLK
GPP_CLK1 SDA2/SCL2(+3VPCU) Switch CPU THERMAL SENOR
100MHZ TV CARD EC +3V
PCIE CLK
GPP_CLK2
100MHZ CARD READER EEPROM
PCIE CLK
+3VPCU
100MHZ NEW CARD
USB_CLK
B B

32.768KHz
PCIE CLK MXM

SATA
25MHz
100MHZ LAN SDA3/SCL3(+3VPCU) Switch
SATA +3V
RTC CLK

25MHZ
SDA4/SCL4(+3VPCU)

USB CLK

48MHZ

14.31818MHz

A A

Quanta Computer Inc.


PROJECT : ZY7
Size Document Number Rev
A
Clock/SMBUS
Date: Thursday, June 26, 2008 Sheet 35 of 37
5 4 3 2 1
5 4 3 2 1

FDC653N +3V_S5 <S5D>


ZY7 Power On Sequence Charger (ISL6251A)
PQ18
VIN RT9025-25PSP
BATTERY PU1 FDC653N +3VSUS<SUSD> +2.5V <MIANON>
+3VPCU PU9
From AC,Battery VIN PQ13
<HWPG_2.5V>
+5VPCU +3VPCU SYSTEM 5V/3V (ISL6237) FDS8878 +3V <MIAND>
PQ17
From PWM SYS_HWPG(PCU) PU2
RT9025
From Power Button NBSWON# +1.2V_S5 <S5_ON>
PU7 <HWPG_1.2V_S5>
ADAPTER
From EC S5_ON +5VPCU
<SYS_HWPG> FDS8884 +5V <MIAND>
D
+5V_S5 PQ14 D

+3V_S5
+1.2V_S5 HWPG_1.2V_S5 >10ms
From EC RSMRST# >100ms
From EC DNBSWON# +SMDDR_VTERM <SUSUON>
From SB PCIE_WAKE# DDR 1.8V(TPS51116)
+SMDDR_VREF <SUSUON> FDC653N +1.8V <MIANON>
PU6
From SB to EC SUSB#,SUSC# PQ30
SUSON
+1.8VSUS <SUSUON>
From EC SUSON G9338
<HWPG_1.8V> +1.2V <+1.2V_ON>
PU10
+3VSUS +1.8VSUS SMDDR_VREF,SMDDR_VTERM <HWPG_CPUIO>
From PWM HWPG_1.8V MAINON
RT9025-25PSP
From EC MAINON +1.1V <MIANON>
PU11
+5V +3V +2.5V +1.8V +1.5V,+1.1V,+1.35V <HWPG_1.1V_NB>

From LDO HWPG_1.1V_NB,HWPG_1.5V,HWPG_1.35V,HWPG_2.5V RT9025-25PSP


+1.5V <MIANON>
MAINON PU8
From EC VRON <HWPG_1.2V>
CPU_CORE0,CPU_CORE1,CPU_VDDNB_CORE RT9025-25PSP
+1.35V<MIANON>
From PWM CPU_COREPG(CPU) PU12
<HWPG_1.35V_VDDHTTX>
From EC +1.2V_ON
C C
+1.2V
CPU_CORE0 <VRON>
From LDO HWPG_CPUIO MIANON+RC CPU Core( ISL6265)
CPU_CORE1 <VRON>
From EC +1.2v_ON+RC PU3

From EC +NB_CORE CPU_VDDNB_CORE <VRON>


<CPU_COREPG>
From PWM HWPG_1V_NB
HWPG
From EC ECPWROK
SB_PWRGD_IN 0~30ns
From SB WD_PWRGD RT8202
+NB_CORE(1.0~1.35V) <MAINON+RC>
PU4
NB_PWRGD_IN(level shift) 99ms~108ms
From SB CPU_PWRGD <HWPG_1V_NB>
102ms~113ms
From SB PLTRST# ,PCIRST# 1.9ms~2.3ms
From SB CPU_LDT_RST# POWER Distribution
From SB CPU_LDT_STOP# >1us VCC_CORE CPU

+5VPCU FINGERPRINT
Power State / Voltage Rail Activity Summary
+3VPCU CIR,EC,SW/B,SUSLED,PWR LED,BAT LED,SPI FLASH
B B

SYSTEM SLEEP PROCESSOR +1.1V RS780


Description RTC ALWAYS S5 SUS RUN
STATE STATE STATE
+NB_CORE RS780
G0 S0 C0 RUNNING ON ON ON ON ON
+5V CRT,HDMI,DOCK,PCMCIA,AUDIO,HDD,ODD,FAN,TP,TV CARD,SB700,MXM
P-state transitions
G0 S0 C0 under OS control ON ON ON ON ON CPU,CLK GEN,SB700,RS780,MXM,DDR,DOCK,EC,CARD READER,PCMCIA,CODEC,LAN,HDD,NEW CARD,MINI
RUNNING +3V
CARD,LCD,CM2009,HDMI,CAMERA,CODEC,HEADPHONE,AMP
HALT
G0 S0 C1 ON ON ON ON ON +3V_S5 DOCK,MDC,LAN,NEW CARD

G0 S0 C2 Stop grant,caches snoopable


ON ON ON ON ON +3VSUS SUSLED,BT
Stop grant, no
LDTSTOP,not +2.5V CPU,MXM
G0 S0 C1E/C3 expected,cache snoops ON ON ON ON ON
Stop grant with LDTSTOP, +1.2V_S5 SB700
G0 S0 C1E/C3 cache not snoopable ON ON ON ON ON CPU,SB700
+1.8VSUS
Powered on suspend
G1 S1 OFF ON ON ON ON ON +1.8V CARD READER,RS780,SB700

G1 S3 OFF SLEEPING Suspend to RAM


ON ON ON ON OFF +1.2V SB600 , RS780 , CPU , CLK GEN

Suspend to disk +SMDDR_VTERM DDR , CPU


A G2 S4 OFF ON ON ON OFF OFF A

+SMDDR_VREF DDR
G2 S5 OFF SOFT OFF ON ON ON OFF OFF
+1.5V NEW CARD,MINI CARD
G2/G3 S5 LOW OFF POWER BUTTON ONLY ON ON OFF OFF OFF
+5V_S5
G3 OFF MECHANICAL OFF ON OFF OFF OFF OFF
Quanta Computer Inc.
PROJECT : ZY7
Size Document Number Rev
A
Power Sequence
Date: Thursday, June 26, 2008 Sheet 36 of 36
5 4 3 2 1

WWW.AliSaler.Com

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