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Before SN A9YVISOTWO06301
6)3/47/
$6$2ECEIVER

6)3/47/
$6$2ECEIVER
SECTION 1
SUMMARY

CONTENTS

PRODUCT SAFETY SERVICING GUIDELINES.......................................................................................... 1-4

SERVICING PRECAUTIONS ....................................................................................................................... 1-5


* General Servicing Precautions
* Insulation checking prodedure
* Electrostatically Sensitive Devices

SPECIFICATIONS ......................................................................................................................................... 1-6

DISASSEMBLY .............................................................................................................................................. 1-7

PRINCIPAL PART LOCATION ...................................................................................................................... 1-8

EXPLODED VIEW ......................................................................................................................................... 1-9

1-3
PRODUCT SAFETY SERVICING GUIDELINES
CAUTION : DO NOT ATTEMPT TO MODIFY THIS PRODUCT IN VOLTAGE MEASURE MUST NOT EXCEED 75 VOLTS R.M.S.
ANY WAY. NEVER PERFORM CUSTOMIZED INSTALLATIONS THIS CORRESPONDS TO 0.5 MILLIAMP AC ANY VALUE
WITHOUT MANUFACTURER’S APPROVAL. UNAUTHORIZED EXCEEDING THIS LIMIT CONSTITUTES A POTENTIAL
MODIFICATIONS WILL NOT ONLY VOID THE WARRANTY, BUT SHOCK HAZARD AND MUST BE CORRECTED IMMEDIATELY.
MAY LEAD TO YOUR BEING LIABLE FOR ANY RESULTING
PROPERTY DAMAGE OR USER INJURY.
SERVICE WORK SHOULD BE PERFORMED ONLY AFTER YOU
ARE THOROUGHLY FAMILIAR WITH ALL OF THE FOLLOWING
SAFETY CHECKS AND SERVICING GUIDELINES. TO DO
OTHERWISE, INCREASES THE RISK OF POTENTIAL HAZARDS
AND INJURY TO THE USER.
WHILE SERVICING, USE AN ISOLATION TRANSFORMER FOR
PROTECTION FROM AC LINE SHOCK.
SAFETY CHECKS SUBJECT : GRAPHIC SYMBOLS
AFTER THE ORIGINAL SERVICE PROBLEM HAS BEEN
THE LIGHTNING FLASH WITH ARROWHEAD SYMBOL, WITHIN AN
CORRECTED. A CHECK SHOULD BE MADE OF THE EQUILATERAL TRIANGLE, IS INTENDED TO ALERT THE USER TO THE
FOLLOWING. PRESENCE OF UNINSULATED “DANGEROUS VOLTAGE” WITHIN THE
PRODUCT’S ENCLOSURE THAT MAY BE OF SUFFICIENT MAGNITUDE TO
SUBJECT : FIRE & SHOCK HAZARD CONSTITUTE A RISK OF ELECTRIC SHOCK.
1. BE SURE THAT ALL COMPONENTS ARE POSITIONED IN THE EXCLAMATION POINT WITHIN AN EQUILATERAL TRIANGLE IS
SUCH A WAY AS TO AVOID POSSIBILITY OF ADJACENT INTENDED TO ALERT THE USER TO THE PRESENCE OF IMPORTANT
OPERATING AND MAINTENANCE (SERVICING) INSTRUCTIONS IN THE
COMPONENT SHORTS. THIS IS ESPECIALLY IMPORTANT LITERATURE ACCOMPANYING THE APPLIANCE.
ON THOSE MODULES WHICH ARE TRANSPORTED TO AND
FROM THE REPAIR SHOP.
2. NEVER RELEASE A REPAIR UNLESS ALL PROTECTIVE SUBJECT : TIPS ON PROPER INSTALLATION
DEVICES SUCH AS INSULATORS, BARRIERS, COVERS, 1. NEVER INSTALL ANY PRODUCT IN A CLOSED-IN RECESS,
SHIELDS, STRAIN RELIEFS, POWER SUPPLY CORDS, AND CUBBYHOLE OR CLOSELY FITTING SHELF SPACE. OVER
OTHER HARDWARE HAVE BEEN REINSTALLED PER OR CLOSE TO HEAT DUCT, OR IN THE PATH OF HEATED
ORIGINAL DESIGN. BE SURE THAT THE SAFETY PURPOSE AIR FLOW.
OF THE POLARIZED LINE PLUG HAS NOT BEEN DEFEATED. 2. AVOID CONDITIONS OF HIGH HUMIDITY SUCH AS:
3. SOLDERING MUST BE INSPECTED TO DISCOVER POSSIBLE OUTDOOR PATIO INSTALLATIONS WHERE DEW IS A
COLD SOLDER JOINTS, SOLDER SPLASHES OR SHARP FACTOR, NEAR STEAM RADIATORS WHERE STEAM
SOLDER POINTS. BE CERTAIN TO REMOVE ALL LOOSE LEAKAGE IS A FACTOR, ETC.
FOREIGN PARTICLES. 3. AVOID PLACEMENT WHERE DRAPERIES MAY OBSTRUCT
4. CHECK FOR PHYSICAL EVIDENCE OF DAMAGE OR REAR VENTING. THE CUSTOMER SHOULD ALSO AVOID THE
DETERIORATION TO PARTS AND COMPONENTS. FOR USE OF DECORATIVE SCARVES OR OTHER COVERINGS
FRAYED LEADS, DAMAGED INSULATION (INCLUDING AC WHICH MIGHT OBSTRUCT VENTILATION.
CORD). AND REPLACE IF NECESSARY FOLLOW ORIGINAL 4. WALL AND SHELF MOUNTED INSTALLATIONS USING A
LAYOUT, LEAD LENGTH AND DRESS. COMMERCAL MOUNTING KIT MUST FOLLOW THE FACTORY
5. NO LEAD OR COMPONENT SHOULD TOUCH A RECEIVING APPROVED MOUNTING INSTRUCTIONS A PRODUCT
TUBE OR A RESISTOR RATED AT 1 WATT OR MORE. LEAD MOUNTED TO A SHELF OR PLATFORM MUST RETAIN ITS
TENSION AROUND PROTRUDING METAL SURFACES MUST ORIGINAL FEET (OR THE EQUIVALENT THICKNESS IN
BE AVOIDED. SPACERS) TO PROVIDE ADEQUATE AIR FLOW ACROSS
6. ALL CRITICAL COMPONENTS SUCH AS FUSES, THE BOTTOM, BOLTS OR SCREWS USED FOR FASTENERS
FLAMEPROOF RESISTORS, CAPACITORS, ETC. MUST BE MUST NOT TOUCH ANY PARTS OR WIRING. PERFORM
REPLACED WITH EXACT FACTORY TYPES, DO NOT USE LEAKAGE TEST ON CUSTOMIZED INSTALLATIONS.
REPLACEMENT COMPONENTS OTHER THAN THOSE 5. CAUTION CUSTOMERS AGAINST THE MOUNTING OF A
SPECIFIED OR MAKE UNRECOMMENDED CIRCUIT PRODUCT ON SLOPING SHELF OR A TILTED POSITION,
MODIFICATIONS. UNLESS THE PRODUCT IS PROPERLY SECURED.
7. AFTER RE-ASSEMBLY OF THE SET ALWAYS PERFORM AN 6. A PRODUCT ON A ROLL-ABOUT CART SHOULD BE STABLE
AC LEAKAGE TEST ON ALL EXPOSED METALLIC PARTS OF ON ITS MOUNTING TO THE CART. CAUTION THE
THE CABINET, (THE CHANNEL SELECTOR KNOB, ANTENNA CUSTOMER ON THE HAZARDS OF TRYING TO ROLL A CART
TERMINALS. HANDLE AND SCREWS) TO BE SURE THE SET WITH SMALL CASTERS ACROSS THRESHOLDS OR DEEP
IS SAFET TO OPERATE WITHOUT DANGER OF ELECTRICAL PILE CARPETS.
SHOCK. DO NOT USE A LINE ISOLATION TRANSFORMER 7. CAUTION CUSTOMERS AGAINST THE USE OF A CART OR
DURING THIS TEST USE AN AC VOLTMETER, HAVING 5000 STAND WHICH HAS NOT BEEN LISTED BY UNDERWRITERS
OHMS PER VOLT OR MORE SENSITIVITY, IN THE LABORATORIES, INC. FOR USE WITH THEIR SPECIFIC
FOLLOWING MANNER; CONNECT A 1500 OHM 10 WATT MODEL OF TELEVISION RECEIVER OR GENERICALLY
RESISTOR, PARALLELED BY A .15 MFD, 150V AC TYPE APPROVED FOR USE WITH T.V.’S OF THE SAME OR
CAPACITOR BETWEEN A KNOWN GOOD EARTH GROUND LARGER SCREEN SIZE.
(WATER PIPE, CONDUIT, ETC.) AND THE EXPOSED 8. CAUTION CUSTOMERS AGAINST THE USE OF EXTENSION
METALLIC PARTS, ONE AT A TIME. CORDS, EXPLAIN THAT A FOREST OF EXTENSIONS
MEASURE THE AC VOLTAGE ACROSS THE COMBINATION SPROUTING FROM A SINGLE OUTLET CAN LEAD TO
OF 1500 OHM RESISTOR AND .15 MFD CAPACITOR. DISASTROUS CONSEQUENCES TO HOME AND FAMILY.
REVERSE THE AC PLUG AND REPEAT AC VOLTAGE
MEASUREMENTS FOR EACH EXPOSED METALLIC PART.
1-4
SERVICING PRECAUTIONS
CAUTION : Before servicing the A/V Receiver covered by this Electrostatically Sensitive (ES) Devices
service data and its supplements and addends, read and follow the Some semiconductor (solid state) devices can be damaged easily by
SAFETY PRECAUTIONS. NOTE : if unforeseen circumstances static electricity. Such components commonly are called
create conflict between the following servicing precautions and any Electrostatically Sensitive (ES) Devices. Examples of typical Es
of the safety precautions in this publication, always follow the safety devices are integrated circuits and some field effect transistors and
precautions. semiconductor chip components.
Remember Safety First: The following techniques should be used to help reduce the
incidence of component damage caused by static electricity.
General Servicing Precautions
1. Always unplug the A/V Receiver AC power cord from the AC 1. Immediately before handling any semiconductor component or
power source before: semiconductor-equipped assembly, drain off any electrostatic
(1) Removing or reinstalling any component, circuit board, charge on your body by touching a known earth ground.
module, or any other assembly. Alternatively, obtain and wear a commercially available
(2) Disconnecting or reconnecting any internal electrical plug or discharging wrist strap device, which should be removed for
other electrical connection. potential shock reasons prior to applying power to the unit under
(3) Connecting a test substitute in parallel with an electrolytic test.
capacitor.
Caution : A wrong part substitution or incorrect polarity installation 2. After removing an electrical assembly equipped with ES devices,
of electrolytic capacitors may result in an explosion hazard. place the assembly on a conductive surface such as aluminum
foil, to prevent electrostatic charge buildup or exposure of the
2. Do not spray chemicals on or near this A/V Receiver or any of its assembly.
assemblies.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
3. Unless specified otherwise in this service data, clean electrical devices.
contacts by applying an appropriate contact cleaning solution to
the contacts with a pipe cleaner, cottontipped swab, or 4. Use only an antistatic solder removal device. Some solder
comparable soft applicator. removal devices not classified a “anti-static” can generate
Unless specified otherwise in this service data, lubrication of electrical charges sufficient to damage ES devices.
contacts is not required.
5. Do not use freonpropelled chemicals. These can generate
4. Do not defeat any plug/socket B+ voltage interlocks with which electrical charge sufficient to damage ES devices.
instruments covered by this service manual might be equipped.
6. Do not remove a replacement ES device from its protective
5. Do not apply AC power to this A/V Receiver and/or any of its package until immediately before you are ready to install it. (Most
electrical assemblies unless all solid-state device heat sinks are replacement ES devices are packaged with leads electrically
correctly installed. shorted together by conductive foam, aluminum foil, or
comparable conductive material).
6. Always connect test instrument ground lead to the appropriate
ground before connecting the test instrument positive lead. Always 7. lmmediately before removing the protective material from the
remove the test instrument ground lead last. leads of a replacement ES device, touch the protective material to
the chassis or circuit assembly into which the device will be
Insulation Checking Procedure installed.
Disconnect the attachment plug from the AC outlet and turn the
power on. Connect an insulation resistance meter(500V) to the Caution : Be sure no power is applied to the chassis or circuit, and
blades of the attachment plug. The insulation resistance between observe all other safety precautions.
each blade of the attachment plug and accessible conductive parts
(Note 1) should be more than 1M-ohm. 8. Minimize bodily motions when handing unpackaged replacement
Note 1 : Accessible Conductive Parts including Metal panels, Input ES devices. (Normally harmless motion such as the brushing
terminals, Earphone jacks, etc. together of your clothes fabric or the lifting of your foot from a
carpeted floor can generate static electricity sufficient to damage
an ES device.)

1-5
SPECIFICATIONS
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1-6
---  9

1-7
*,
*Ê*,/-Ê"
/"

1-8
EXPLODED VIEW (AH VER.) before SN A9YVISOTWO06301

1-9 1-10
·ͺ΄΀΅Έ΀Ͳ͹͑ͶΉ΁ͽ΀͵Ͷ͵͑·ͺͶΈ͑΁Ͳ΃΅΄͑ͽͺ΄΅
ͿΠ͟ ΁Ͳ΃΅΄͑ͿΠ͟ ͵Ͷ΄ʹ΃ͺ΁΅ͺ΀Ϳ ΂͘΅Ί ͿΠ͟ ΁Ͳ΃΅΄͑ͿΠ͟ ͵Ͷ΄ʹ΃ͺ΁΅ͺ΀Ϳ ΂͘΅Ί
͢ ʹ͸Ή͢Ͳͤͪͨ΋ʹͧͥ ΀΃ͿͲ;ͶͿ΅͑͝ʹ΀·Ͷ΃ ͢ ΄͢ ʹ΅ͳͤͧ͜ͻ΃ ΄ʹ΃ͶΈ ͣͥ
ͣ ʹͻʹ͢Ͳͩ͡͡ ;Ͳ͸ͿͶ΅ ͢ ΄ͣ ʹ΅ͳͤͧ͜ͷͷ΋΃ ΄ʹ΃ͶΈ ͣ͢
ͤ ʹ͸΃͢Ͳͥͤͪͳͣͪ ʹ΀·Ͷ΃͑͝ͻͲʹͼ ͢ ΄ͤ ʹ΅ͳͤͩ͜ͻͷ΋΃ ΄ʹ΃ͶΈ ͥ͢
ͥ ʹ͸Ή͢Ͳͤͪͧʹͧͪ ΀΃ͿͲ;ͶͿ΅͑͝͵΀΀΃ ͢ ΄ͥ ʹ΅ͳͤ͜͢͡ͻͷ΋΃ ΄ʹ΃ͶΈ ͧ͢
ͦ ʹ͸΃͢Ͳͥͤͩͳͣͪ ͵΀΀΃ ͢ ΄ͦ ʹ΅Έͤͩ͜ͻͷ΋΃ ΄ʹ΃ͶΈ ͥ
ͧ ʹ͸ͼ͢Ͳͣͨ͢΋Ͳ ·΀ͽΆ;Ͷ͑ͼͿ΀ͳ͑Ͳ΄΄͘Ί ͢ ΄ͧ ʹ΅Έͤͧ͜͢ͻ΃ ΄ʹ΃ͶΈ ͥ
ͨ ʹ͸ͼ͢Ͳͤͣ͢΋Ͳ ΃΀΅Ͳ΃Ί͑ͼͿ΀ͳ͑Ͳ΄΄͘Ί ͢ ΄ͨ ʹ΅Έͤͣ͜͡ͻ΃ ΄ʹ΃ͶΈ ͥ
ͩ ʹͼ;͢Ͳͪͣ͢΋ʹͧͥ Ͳͽ͑΁ͲͿͶͽ ͢ ΄ͩ ʹ͹͵͢Ͳͣͤ͡΃ ΄ʹ΃ͶΈ͑͝΄΁ͶʹͺͲͽ ͥ
ͪ ʹ͸͸͢Ͳͣͥ͡΋Ͳ ͸΃ͺͽͽ͑Ͳ΄΄͘Ί ͤ ΄ͪ ʹ͹͵͢Ͳͣ͢͡΃ ΄ʹ΃ͶΈ͑͝΄΁ͶʹͺͲͽ ͧ
͢͡ ʹ;͹͢Ͳͣͩͤ ΄Ά΁΁΀΃΅͑͝Ͳͽ͑΁ͲͿͶͽ ͧ ΄͢͡ ʹ΅Έ΄ͤ͜͢͡͸΃ ΄ʹ΃ͶΈ ͢
͢͢ ʹ͸ͳ͢Ͳͣͥ͡΋ ͳͲ͵͸Ͷ͑͝ͿͲ͵ ͢ ΄͢͢ ʹ΅ͳ͵ͤͩ͜ͻͷ΋΃ ΄ʹ΃ͶΈ͑͝͵΀΅ ͢͡
ͣ͢ ʹ͸ͽ͢Ͳͣͧͨ΋ ͺͿ͵ͺʹͲ΅΀΃͑͝΁΀ΈͶ΃ ͢
ͤ͢ ʹͳ΅͢Ͳͦͩ͢͡΋Ͳ ΁΀ΈͶ΃͑ͼͿ΀ͳ͑Ͳ΄΄͘Ί ͢ ͿΠ͟ ΁Ͳ΃΅΄͑ͿΠ͟ ͵Ͷ΄ʹ΃ͺ΁΅ͺ΀Ϳ ΂͘΅Ί
ͥ͢ ʹ͸ͼ͢Ͳͣͧ͢΋Ͳ ͷΆͿʹ΅ͺ΀Ϳ͑ͼͿ΀ͳ͑Ͳ΄΄͘Ί ͢ ʹ΀΁ͣͥͧ͢͡ʹ͞A ͷ΃΀Ϳ΅͑΁ʹͳ͑Ͳ΄΄͘Ί ͢
ͦ͢ ʹ͸Ά͢Ͳͥ͢͢ΆͲͣͩ ΈͺͿ͵΀Έ ͢ ͩ͢ ʹΆ΁ͣͥͧ͢͢͡͞ ͷͺ΁͑ͳ΀Ͳ΃͵
ͧ͢ ʹ͸Έ͢Ͳͥͥͪͳͤͥ ΁ͲͿͶͽ͑͝΄Άͳ ͢ ͪ͢ ʹΆ΁ͣͥͧͣ͢͡͞ ͶͿʹ΀͵Ͷ΃͑ͳ΀Ͳ΃͵
ͨ͢ ʹ;΋͢Ͳͤ͢͢΋ ͷͺͽ΅Ͷ΃ ͢ ͣ͡ ʹΆ΁ͣͥͧͥ͢͡͞ ͹ͶͲ͵΁͹΀ͿͶ͑ͳ΀Ͳ΃͵
ͩ͢ ʹΆ΁ͣͥͧ͢͢͡͞ ͷͺ΁͑ͳ΀Ͳ΃͵ ͣ͢ ʹΆ΁ͣͥͧͤ͢͡͞ ͺͿ΁Ά΅͑ͳ΀Ͳ΃͵
ͪ͢ ʹΆ΁ͣͥͧͣ͢͡͞ ͶͿʹ΀͵Ͷ΃͑ͳ΀Ͳ΃͵ ͣͨ ʹΆ΁ͣͥͧͦ͢͡͞ ʹ΀ͿͿͶʹ΅͑ͳ΀Ͳ΃͵
ͣ͡ ʹΆ΁ͣͥͧͥ͢͡͞ ͹ͶͲ͵΁͹΀ͿͶ͑ͳ΀Ͳ΃͵
ͣ͢ ʹΆ΁ͣͥͧͤ͢͡͞ ͺͿ΁Ά΅͑ͳ΀Ͳ΃͵ ͤͪ ʹ΀΁ͣͥͨ͢͡ʹ-A ;ʹΆ͑΁ʹͳ͑Ͳ΄΄͘Ί ͢
ͣͣ ʹͼͽ͢Ͳͪͦ͡͹ͧ͢ ͷ΀΀΅ ͥ
ͣͤ ʹ͹͸͢Ͳͣͪͨ ʹΆ΄͹ͺ΀Ϳ͑͝ͷ΀΀΅ ͥ ʹ΀΁ͣͥͩ͢͡ʹ͞A Ͳ;΁͑΁ʹͳ͑Ͳ΄΄͘Ί ͢
ͣͥ ʹ͹͵͢Ͳͧͣ͡͸ͷʹ ΄ʹ΃ͶΈ͑͝΄΁ͶʹͺͲͽ ͣ ͣͪ ʹΆ΁ͣͥͩ͢͢͡͞ ΁΀ΈͶ΃͑ͳ΀Ͳ΃͵
ͣͦ ʹΆͲ͢Ͳͣͩͥͳͤͧ ʹ͹Ͳ΄΄ͺ΄ ͢ ͤͤ ʹΆ΁ͣͥͩͤ͢͡͞ Ͳ;΁͑ͳ΀Ͳ΃͵
ͣͧ ʹͽ΅ͦ΃ͤͪ͡΋Ά ΅΃ͿͲ΄͑͑͝΁΀ΈͶ΃ ͢ ͤͦ ʹΆ΁ͣͥͩͣ͢͡͞ ·ͺ͵Ͷ΀͑ͳ΀Ͳ΃͵
ͣͨ ʹΆ΁ͣͥͧͦ͢͡͞ ʹ΀ͿͿͶʹ΅͑ͳ΀Ͳ΃͵ ͤͩ ʹΆ΁ͣͥͩͥ͢͡͞ ΄Άͳ͑΅΃ͲͿ΄͑ͳ΀Ͳ΃͵
ͣͩ ʹͲ͵ͽͨͨ΋Ͳ ;Ͷʹ͹ͲͿͺ΄;͑Ͳ΄΄͘Ί ͢
ͣͪ ʹΆ΁ͣͥͩ͢͢͡͞ ΁΀ΈͶ΃͑ͳ΀Ͳ΃͵ ͤͨ ʹ΀΁ͪͦͩ͢͢͵Ͳ ;΁Ͷ͸͑΁ʹͳ͑Ͳ΄΄͘Ί ͢
ͤ͡ ʹ;͵͢Ͳͥͦͧ ͳ΃ͲʹͼͶ΅͑͝ͷͲͿ ͢
ͤ͢ ʹͷͿʹͷͣͧͦ͢͢΄ ͵ʹ͑ͷͲͿ ͢ New Part Numbers Non-1W Versions
ͤͣ ʹ;ΊͣͲͪͥ͢ ͹ͶͲ΅΄ͺͿͼ ͢
ͤͤ ʹΆ΁ͣͥͩͤ͢͡͞ Ͳ;΁͑ͳ΀Ͳ΃͵
ͤͥ ʹ;͹͢Ͳͪ͢͢ ΄Ά΁΁΀΃΅͑͝͹ͶͲ΅΄ͺͿͼ ͥ COP12046B-A
VISO TWO FRONT PCB ASSY C version NON-1W with the TIMER button
ͤͦ ʹΆ΁ͣͥͩͣ͢͡͞ ·ͺ͵Ͷ΀͑ͳ΀Ͳ΃͵ COP12046C
ͤͧ ʹ΃Ͷ͢Ͳͨͣ͡ ΄Ά΁΁΀΃΅͑͝΁ʹͳ ͣ VISO TWO FRONT PCB ASSY AH version NON-1W with the TIMER button
COP12047B-A
ͤͨ ʹ΀΁ͪͦͩ͢͢͵Ͳ ;΁Ͷ͸͑΁ʹͳ͑Ͳ΄΄͘Ί͑ ͑ ͑ ͑ ͑ ͑ ͑ ͑ ͑ ͑ ͑ ͢ VISO TWO INPUT PCB ASSY C version NON-1W
COP12047C
ͤͩ ʹΆ΁ͣͥͩͥ͢͡͞ ΄Άͳ͑΅΃ͲͿ΄͑ͳ΀Ͳ΃͵ VISO TWO INPUT PCB ASSY AH version NON-1W
COP12048B-A
ͤͪ ʹ΀΁ͣͥͨ͢͡ʹ ;ʹΆ͑΁ʹͳ͑Ͳ΄΄͘Ί ͢ VISO TWO AMP & VIDEO & POWER PCB ASSY C version NON-1W will ship with standby supply
ͥ͡ ʹͿ·;ͳͥ͢͡;Ͳ͡ͻͩͽ΄ ΅ΆͿͶ΃͑;΀͵ΆͽͶ ͢ COP12048C
VISO TWO AMP & VIDEO & POWER PCB ASSY AH version NON-1W will ship with standby supply
ͥ͢ ʹͼͷͣͲͤͩͣΊͼ͢ ΁ͲͿͶͽ͑͝΃ͶͲ΃ ͢

1-11
EXPLODED VIEW (C VER.) before SN A9YVISOTWO06301

1-12 1-13
·ͺ΄΀΅Έ΀ʹ͑ͶΉ΁ͽ΀͵Ͷ͵͑·ͺͶΈ͑΁Ͳ΃΅΄͑ͽͺ΄΅
ͿΠ͟ ΁Ͳ΃΅΄͑ͿΠ͟ ͵Ͷ΄ʹ΃ͺ΁΅ͺ΀Ϳ ΂͘΅Ί ͿΠ͟ ΁Ͳ΃΅΄͑ͿΠ͟ ͵Ͷ΄ʹ΃ͺ΁΅ͺ΀Ϳ ΂͘΅Ί
͢ ʹ͸Ή͢Ͳͤͪͨ΋ʹͧͥ ΀΃ͿͲ;ͶͿ΅͑͝ʹ΀·Ͷ΃ ͢ ΄͢ ʹ΅ͳͤͧ͜ͻ΃ ΄ʹ΃ͶΈ ͣͥ
ͣ ʹͻʹ͢Ͳͩ͡͡ ;Ͳ͸ͿͶ΅ ͢ ΄ͣ ʹ΅ͳͤͧ͜ͷͷ΋΃ ΄ʹ΃ͶΈ ͣ͢
ͤ ʹ͸΃͢Ͳͥͤͪͳͣͪ ʹ΀·Ͷ΃͑͝ͻͲʹͼ ͢ ΄ͤ ʹ΅ͳͤͩ͜ͻͷ΋΃ ΄ʹ΃ͶΈ ͥ͢
ͥ ʹ͸Ή͢Ͳͤͪͧʹͧͪ ΀΃ͿͲ;ͶͿ΅͑͝͵΀΀΃ ͢ ΄ͥ ʹ΅ͳͤ͜͢͡ͻͷ΋΃ ΄ʹ΃ͶΈ ͧ͢
ͦ ʹ͸΃͢Ͳͥͤͩͳͣͪ ͵΀΀΃ ͢ ΄ͦ ʹ΅Έͤͩ͜ͻͷ΋΃ ΄ʹ΃ͶΈ ͥ
ͧ ʹ͸ͼ͢Ͳͣͨ͢΋Ͳ ·΀ͽΆ;Ͷ͑ͼͿ΀ͳ͑Ͳ΄΄͘Ί ͢ ΄ͧ ʹ΅Έͤͧ͜͢ͻ΃ ΄ʹ΃ͶΈ ͥ
ͨ ʹ͸ͼ͢Ͳͤͣ͢΋Ͳ ΃΀΅Ͳ΃Ί͑ͼͿ΀ͳ͑Ͳ΄΄͘Ί ͢ ΄ͨ ʹ΅Έͤͣ͜͡ͻ΃ ΄ʹ΃ͶΈ ͥ
ͩ ʹͼ;͢Ͳͪͣ͢΋ʹͧͥ Ͳͽ͑΁ͲͿͶͽ ͢ ΄ͩ ʹ͹͵͢Ͳͣͤ͡΃ ΄ʹ΃ͶΈ͑͝΄΁ͶʹͺͲͽ ͥ
ͪ ʹ͸͸͢Ͳͣͥ͡΋Ͳ ͸΃ͺͽͽ͑Ͳ΄΄͘Ί ͤ ΄ͪ ʹ͹͵͢Ͳͣ͢͡΃ ΄ʹ΃ͶΈ͑͝΄΁ͶʹͺͲͽ ͧ
͢͡ ʹ;͹͢Ͳͣͩͤ ΄Ά΁΁΀΃΅͑͝Ͳͽ͑΁ͲͿͶͽ ͧ ΄͢͡ ʹ΅Έ΄ͤ͜͢͡͸΃ ΄ʹ΃ͶΈ ͢
͢͢ ʹ͸ͳ͢Ͳͣͥ͡΋ ͳͲ͵͸Ͷ͑͝ͿͲ͵ ͢ ΄͢͢ ʹ΅ͳ͵ͤͩ͜ͻͷ΋΃ ΄ʹ΃ͶΈ͑͝͵΀΅ ͢͡
ͣ͢ ʹ͸ͽ͢Ͳͣͧͨ΋ ͺͿ͵ͺʹͲ΅΀΃͑͝΁΀ΈͶ΃ ͢ ΄ͣ͢ ʹ͹͵͢Ͳͦͦ͡΃ ΄ʹ΃ͶΈ͑͝΄΁ͶʹͺͲͽ ͢
ͤ͢ ʹͳ΅͢Ͳͦͩ͢͡΋Ͳ ΁΀ΈͶ΃͑ͼͿ΀ͳ͑Ͳ΄΄͘Ί ͢
ͥ͢ ʹ͸ͼ͢Ͳͣͧ͢΋Ͳ ͷΆͿʹ΅ͺ΀Ϳ͑ͼͿ΀ͳ͑Ͳ΄΄͘Ί ͢ ͿΠ͟ ΁Ͳ΃΅΄͑ͿΠ͟ ͵Ͷ΄ʹ΃ͺ΁΅ͺ΀Ϳ ΂͘΅Ί
ͦ͢ ʹ͸Ά͢Ͳͥ͢͢·Ͳͣͩ ΈͺͿ͵΀Έ ͢ ʹ΀΁ͣͥͧ͢͡ͳ͞A ͷ΃΀Ϳ΅͑΁ʹͳ͑Ͳ΄΄͘Ί ͢
ͧ͢ ʹ͸Έ͢Ͳͥͥͪͳͤͥ ΁ͲͿͶͽ͑͝΄Άͳ ͢ ͩ͢ ʹΆ΁ͣͥͧ͢͢͡͞ ͷͺ΁͑ͳ΀Ͳ΃͵
ͨ͢ ʹ;΋͢Ͳͤ͢͢΋ ͷͺͽ΅Ͷ΃ ͢ ͪ͢ ʹΆ΁ͣͥͧͣ͢͡͞ ͶͿʹ΀͵Ͷ΃͑ͳ΀Ͳ΃͵
ͩ͢ ʹΆ΁ͣͥͧ͢͢͡͞ ͷͺ΁͑ͳ΀Ͳ΃͵ ͣ͡ ʹΆ΁ͣͥͧͥ͢͡͞ ͹ͶͲ͵΁͹΀ͿͶ͑ͳ΀Ͳ΃͵
ͪ͢ ʹΆ΁ͣͥͧͣ͢͡͞ ͶͿʹ΀͵Ͷ΃͑ͳ΀Ͳ΃͵ ͣ͢ ʹΆ΁ͣͥͧͤ͢͡͞ ͺͿ΁Ά΅͑ͳ΀Ͳ΃͵
ͣ͡ ʹΆ΁ͣͥͧͥ͢͡͞ ͹ͶͲ͵΁͹΀ͿͶ͑ͳ΀Ͳ΃͵ ͣͨ ʹΆ΁ͣͥͧͦ͢͡͞ ʹ΀ͿͿͶʹ΅͑ͳ΀Ͳ΃͵
ͣ͢ ʹΆ΁ͣͥͧͤ͢͡͞ ͺͿ΁Ά΅͑ͳ΀Ͳ΃͵
ͣͣ ʹͼͽ͢Ͳͪͦ͡͹ͧ͢ ͷ΀΀΅ ͥ ͤͪ ʹ΀΁ͣͥͨ͢͡B-A MʹΆ͑΁ʹͳ͑Ͳ΄΄͘Ί ͢
ͣͤ ʹ͹͸͢Ͳͣͪͨ ʹΆ΄͹ͺ΀Ϳ͑͝ͷ΀΀΅ ͥ
ͣͥ ʹ͹͵͢Ͳͧͣ͡͸ͷʹ ΄ʹ΃ͶΈ͑͝΄΁ͶʹͺͲͽ ͣ ʹ΀΁ͣͥͩ͢͡ͳ͞A Ͳ;΁͑΁ʹͳ͑Ͳ΄΄͘Ί ͢
ͣͦ ʹΆͲ͢Ͳͣͩͥͳͤͧ ʹ͹Ͳ΄΄ͺ΄ ͢ ͣͪ ʹΆ΁ͣͥͩ͢͢͡͞ ΁΀ΈͶ΃͑ͳ΀Ͳ΃͵
ͣͧ ʹͽ΅ͦ΃ͤͪ͡΋Ͷ ΅΃ͲͿ΄͑͑͝΁΀ΈͶ΃ ͢ ͤͤ ʹΆ΁ͣͥͩͤ͢͡͞ Ͳ;΁͑ͳ΀Ͳ΃͵
ͣͨ ʹΆ΁ͣͥͧͦ͢͡͞ ʹ΀ͿͿͶʹ΅͑ͳ΀Ͳ΃͵ ͤͦ ʹΆ΁ͣͥͩͣ͢͡͞ ·ͺ͵Ͷ΀͑ͳ΀Ͳ΃͵
ͣͩ ʹͲ͵ͽͨͨ΋Ͳ ;Ͷʹ͹ͲͿͺ΄;͑Ͳ΄΄͘Ί ͢ ͤͩ ʹΆ΁ͣͥͩͥ͢͡͞ ΄Άͳ͑΅΃ͲͿ΄͑ͳ΀Ͳ΃͵
ͣͪ ʹΆ΁ͣͥͩ͢͢͡͞ ΁΀ΈͶ΃͑ͳ΀Ͳ΃͵
ͤ͡ ʹ;͵͢Ͳͥͦͧ ͳ΃ͲʹͼͶ΅͑͝ͷͲͿ ͢ ͤͨ ʹ΀΁ͪͦͩ͢͢͵ʹ ;΁Ͷ͸͑΁ʹͳ͑Ͳ΄΄͘Ί ͢
ͤ͢ ʹͷͿʹͷͣͧͦ͢͢΄ ͵ʹ͑ͷͲͿ ͢
ͤͣ ʹ;ΊͣͲͪͥ͢ ͹ͶͲ΅΄ͺͿͼ ͢ New Part Numbers Non-1W Versions
ͤͤ ʹΆ΁ͣͥͩͤ͢͡͞ Ͳ;΁͑ͳ΀Ͳ΃͵
ͤͥ ʹ;͹͢Ͳͪ͢͢ ΄Ά΁΁΀΃΅͑͝͹ͶͲ΅΄ͺͿͼ ͥ
COP12046B-A
ͤͦ ʹΆ΁ͣͥͩͣ͢͡͞ ·ͺ͵Ͷ΀͑ͳ΀Ͳ΃͵ VISO TWO FRONT PCB ASSY C version NON-1W with the TIMER button
ͤͧ ʹ΃Ͷ͢Ͳͨͣ͡ ΄Ά΁΁΀΃΅͑͝΁ʹͳ ͣ COP12046C
VISO TWO FRONT PCB ASSY AH version NON-1W with the TIMER button
ͤͨ ʹ΀΁ͪͦͩ͢͢͵ʹ ;΁Ͷ͸͑΁ʹͳ͑Ͳ΄΄͘Ί ͢ COP12047B-A
VISO TWO INPUT PCB ASSY C version NON-1W
ͤͩ ʹΆ΁ͣͥͩͥ͢͡͞ ΄Άͳ͑΅΃ͲͿ΄͑ͳ΀Ͳ΃͵ COP12047C
VISO TWO INPUT PCB ASSY AH version NON-1W
ͤͪ ʹ΀΁ͣͥͨ͢͡ͳ ;ʹΆ͑΁ʹͳ͑Ͳ΄΄͘Ί ͢ COP12048B-A
VISO TWO AMP & VIDEO & POWER PCB ASSY C version NON-1W will ship with standby supply
ͥ͡ ʹͿ·;ͳͥ͢͡;Ͳ͢ͻͩͽ ΅ΆͿͶ΃͑;΀͵ΆͽͶ ͢ COP12048C
ͥ͢ ʹͼͷ͢Ͳͤͩͣ΋ͼ͢ ΁ͲͿͶͽ͑͝΃ͶͲ΃ ͢ VISO TWO AMP & VIDEO & POWER PCB ASSY AH version NON-1W will ship with standby supply

1-14
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/,
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" / /-


" / /-
IC BLOCK DIAGRAMS & PIN DESCRIPTION .......................................................................................... 2-2
SPECIAL FUNTION KEY............................................................................................................................ 2-43
TROUBLESHOOTING ................................................................................................................................ 2-44
DIAGRAM.................................................................................................................................................... 2-47
1. BLOCK DIAGRAM ................................................................................................................................ 2-47
2. WIRING DIAGRAM .............................................................................................................................. 2-49
3. SCHEMATIC DIAGRAM ...................................................................................................................... 2-51
• FRONT PART ............................................................................................................................. 2-51
• MCU & INPUT PART.................................................................................................................. 2-53
• DSP & CODEC PART................................................................................................................. 2-55
• POWER PART............................................................................................................................ 2-57
• AMP PART................................................................................................................................... 2-59
• VIDEO PART.......................................................................................................................
............ 2-61
• XM & SUB-POWER PART......................................................................................................... 2-63
• MPEG PART............................................................................................................................... 2-65

4. PRINTED CIRCUIT BOARDS ............................................................................................................. 2-67


• FRONT BOARD.......................................................................................................................... 2-67
• INPUT BOARD............................................................................................................................ 2-69
• AMP & VIDEO BOARD............................................................................................................... 2-73
• MPEG BOARD............................................................................................................................ 2-77
IC BLOCK DIAGRAMS & PIN DESCRIPTION
MCU(T5CC1) : IC21

Pin Assignment and Pin Functions


The assignment of input/output pins for the T5CC1, their names and functions are as follows:

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88 P65
DVCC 89 87 P64/SCOUT
P66 90 86 P63/INT0
DVSS 91 85 P62/SI/SCL
P50/AN0 92 84 P61/SO/SDA
P51/AN1 93 83 P60/SCK
P52/AN2 94 82 P43/CS3
P53/AN3/ADTRG 95 81 P42/CS2
P54/AN4 96 80 P41/CS1
P55/AN5 97 79 P40/CS0
P56/AN6 98 78 P37/BOOT
P57/AN7 99 77 P36/R/W
VREFH 100 76 P35/BUSAK

VREFL 1 75 P34/BUSRQ
AVSS 2 74 P33/WAIT
AVCC 3 73 P32/HWR
P70/TA0IN 4 72 P31/WR
P71/TA1OUT 5 71 P30/RD
P72/TA3OUT 6 70 P27/A7/A23
P73/TA4IN 7 69 P26/A6/A22
P74/TA5OUT 8 68 P25/A5/A21
P75/TA7OUT 9 67 P24/A4/A20
P80/TB0IN0/INT5 10 66 P23/A3/A19
P81/TB0IN1/INT6 11 65 P22/A2/A18
P82/TB0OUT0 12 Top view 64 DVCC
P83/TB0OUT1 13 QFP100 63 NMI
P84/TB1IN0/INT7 14 62 DVSS
P85/TB1IN1/INT8 15 61 P21/A1/A17
P86/TB1OUT0 16 60 P20/A0/A16
P87/TB1OUT1 17 59 P17/AD15/A15
P90/TXD0 18 58 P16/AD14/A14
P91/RXD0 19 57 P15/AD13/A13
P92/SCLK0/CTS0 20 56 P14/AD12/A12
P93/TXD1 21 55 P13/AD11/A11
P94/RXD1 22 54 P12/AD10/A10
P95/SCLK1/CTS1 23 53 P11/AD9/A9
AM0 24 52 P10/AD8/A8
DVCC 25 51 P07/AD7

X2 26 50 P06/AD6
DVSS 27 49 P05/AD5
X1 28 48 P04/AD4
AM1 29 47 P03/AD3
RESET 30 46 P02/AD2
P96/XT1 31 45 P01/AD1
P97/XT2 32 44 P00/AD0
EMU0 33 43 ALE
EMU1 34 42 PA7
PA0/INT1 35 41 PA6
PA1/INT2 36 40 PA5
PA2/INT3 37 39 PA4
38 PA3/INT4

2-2
isvjrGkphnyht

DVCC [3]
ADTRG (P53) CPU (TLCS-900/L1) DVSS [3]
AN0 to AN7 10-Bit 8CH X1
XWA W A H-OSC
X2
(P50 to P57) XBC B C
AD
XDE D E Clock Gear EMU0
AVCC, AVSS Converter
XHL H L Clock doubler EMU1
VREFH, VREFL
XIX IX XT1 (P96)
XIY IY L-OSC XT2 (P97)
XIZ IZ
TXD0 (P90) XSP SP RESET
SIO/UART/IrDA
RXD0 (P91) 32 bits AM0
(SIO0) AM1
SCLK0/ CTS0 (P92) SR F ALE
TXD1 (P93) PC
SIO/UART Port 0 (P00 to P07)
RXD1 (P94) AD0 to AD7
(SIO1) (P10 to P17)
SCLK1/ CTS1 (P95) Port 1
AD8/A8 to AD15/A15
SCK (P60) Serial Bus Watchdog Port 2 (P20 to P27)
SO/SDA (P61) Interface Timer (WDT) A0/A16 to A7/A23
SI / SCL (P62) (SBI) RD (P30)
 WR (P31)
Special timer HWR (P32)
8-Bit Timer Port 3
TA0IN (P70) BUSRQ (P34)
(TMRA0) for CLOCK
BUSAK (P35)
8-Bit Timer
TA1OUT (P71) R/ W (P36)
(TMRA1)
16-KB RAM BOOT (P37)

8-Bit Timer  Port 6 SCOUT(P64), P65, P66


(TMRA2)
Port A PA4 to PA7
8-Bit Timer
TA3OUT (P72) (P40 to P43)
(TMRA3) CS/WAIT
Controller CS0 to CS3
8-Bit Timer 256-KB FLASH (4-BLOCK)
TA4IN (P73) WAIT (P33)
(TMRA4) E2PROM
Interrupt NMI
8-Bit Timer INT0 (P64)
TA5OUT (P74) Controller INT1 to INT4
(TMRA5)
(PA0 to PA3)
TB0IN0/INT5 (P80)
8-Bit Timer 16-Bit Timer TB0IN1/INT6 (P81)
(TMRA6) (TMRB0) TB0OUT0 (P82)
TB0OUT1 (P83)
8-Bit Timer
TA7OUT (P75) 4-KB BOOT ROM TB1IN0/INT7 (P84)
(TMRA7) 16-Bit Timer TB1IN1/INT8 (P85)
(TMRB1) TB1OUT0 (P86)
TB1OUT1 (P87)

( ): Initial function after reset





2-3
अ࣪ࣿࣜऌअऊࣜऀँएࣿऎअऌऐअऋऊࣜࣤअࣿࣜࣜࣨࣜंईࣽएऄࣩऱࣜࣿऋउࣶࣜࣜऐࣱ࣭ࣿࣿࣥ
ऌअऊࣜऊऋ ऌअऊࣜऊࣽउँ अ࣫ऋ ंऑऊࣿऐअऋऊ
࣭ ःऊऀ ࣩ ःऊऀ
࣮ ࣽऒएएࣜ ࣩ ःऊऀ
࣯ ࣽऒࣿࣿ ࣩ ऌफळडमࣜएऱबबनवࣜबफमर
ࣰ ऒंऀछऀऋऑऐ ऋ ऒंऀࣜऀथयबनझवࣜऀझरझࣜफऱरࣜबफमर
ࣱ ऒंऀछࣿईइ ऋ ऒंऀࣜऀथयबनझवࣜࣿनफटधࣜफऱरࣜबफमर
ࣲ ऒंऀछࣾईइ ऋ ऒंऀࣜऀथयबनझवࣜࣾनझपधࣜफऱरࣜबफमर
ࣳ ऒंऀछࣿए ऋ ऒंऀࣜऀथयबनझवࣜࣿतथबࣜयडनडटरफमࣜबफमर
ࣴ ऄऌछअऊࣜ अ ऄडझठबतफपडࣜथपࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
ࣵ ंऑऊࣿऐअऋऊछउऑऐँ ऋ ंऱपटरथफपࣜउऱरडࣜबफमरࣜࣤࣽटरथलडࣜࣞईࣞࣥ
࣭࣬ ࣽउऌछउऑऐँ࣭ ऋ ࣽउऌࣜउऱरडࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
࣭࣭ ࣽउऌछउऑऐँ࣮ ऋ ࣽउऌࣜउऱरडࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
࣭࣮ ࣿऊऐछऋंं ऋ ࣿडपरडमࣜउऱरडࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
࣭࣯ एऑऎऎछऋंं ऋ एऱममफऱपठࣜउऱरडࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
ࣰ࣭ एऑࣾछऋंं ऋ एऑࣾࣜउऱरडࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
ࣱ࣭ ऀऒऀछࣿएࣜࣤंऌࣿछएऐࣾࣥ अ ऀऒऀࣜࣿतथबࣜयडनडटरफमࣜबफमर
ࣲ࣭ ऎँࣿछउऑऐँ ऋ ऎँࣿࣜफऱरࣜउऱरडࣜबफमरࣜࣤࣽटरथलडࣜࣞईࣞࣥࣜ
࣭ࣳ थऌफठछऀँऐ अ थऌफठࣜऀडरडटरࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
࣭ࣴ औउࣜ࣢ࣜऀࣽࣾछऐऔ ऋ औउࣜ࣢ࣜऀࣽࣾࣜऀझरझࣜफऱरࣜबफमरࣜ
࣭ࣵ औउࣜ࣢ࣜऀࣽࣾछऎऔ अ औउࣜ࣢ࣜऀࣽࣾࣜऀझरझࣜथपबऱरࣜबफमरࣜ
࣮࣬ ऐऑऊँऎछउऑऐँ ऋ ऐऑऊँऎࣜउऱरडࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
࣮࣭ ऎए࣮࣯࣮छऐऔ ऋ ऎए࣮࣯࣮ࣜअपरडमढझटडࣜऀझरझࣜफऱरࣜबफमर
࣮࣮ ऎए࣮࣯࣮छऎऔ अ ऎए࣮࣯࣮ࣜअपरडमढझटडࣜऀझरझࣜथपࣜबफमर
࣮࣯ ࣾऑंंँऎछࣿए ऋ ࣾऱढढडमࣜअࣿࣜࣿतथबࣜयडनडटरफमࣜबफमर
ࣰ࣮ ऀऒࣿࣿ ࣩ ऌफळडमࣜएऱबबनवࣜबफमर
ࣱ࣮ ऀऒࣿࣿ ࣩ ऌफळडमࣜएऱबबनवࣜबफमर
ࣲ࣮ ऋएࣿछऋऑऐ ऋ ࣮ࣳउऄशࣜࣿमवयरझनࣜटफपपडटरथफपࣜबफमर
࣮ࣳ ऀऒएए ࣩ ःऊऀ
࣮ࣴ ऋएࣿछअऊ अ ࣮ࣳउऄशࣜࣿमवयरझनࣜटफपपडटरथफपࣜबफमर
࣮ࣵ ऀऒࣿࣿ ࣩ ऌफळडमࣜएऱबबनवࣜबफमर
࣯࣬ ऎँएँऐ अ ऎडयडरࣜबफमर
࣯࣭ ऋएࣿछअऊ अ ࣲ࣯࣮࣪ࣳࣴउऄशࣜࣿमवयरझनࣜटफपपडटरथफपࣜबफमर
࣯࣮ ऋएࣿछऋऑऐ ऋ ࣲ࣯࣮࣪ࣳࣴउऄशࣜࣿमवयरझनࣜटफपपडटरथफपࣜबफमर
࣯࣯ ऊऋࣜऑएँ ࣩ ऊफࣜटफपपडटरथफप
ࣰ࣯ ऊऋࣜऑएँ ࣩ ऊफࣜटफपपडटरथफप
ࣱ࣯ ऎँउऋऐँछअऊ अ एवयरडऩࣜऎडऩफरडࣜऀझरझࣜथपࣜबफमर
ࣲ࣯ ऎऀएछऀࣽऐࣽ अ ऎऀएࣜऀझरझࣜबफमर
࣯ࣳ ऎऀएछࣿईइ अ ऎऀएࣜࣿनफटधࣜबफमर
࣯ࣴ ࣾࣽࣿइࣩऑऌࣜ अ ࣾझटधࣜऑबࣜबफमर
࣯ࣵ ऌईईछࣿँ ऋ ऌईईࣜࣿतथबࣜडपझञनडࣜबफमर
ࣰ࣬ ऌईईछऀࣽऐࣽ ऋ ऌईईࣜऀझरझࣜथपࣜबफमर
ࣰ࣭ ऌईईछࣿईइ ऋ ऌईईࣜࣿनफटधࣜबफमर
ࣰ࣮ ऌईईछऀऋऑऐ अ ऌईईࣜऀझरझࣜफऱरࣜबफमर
ࣰ࣯ ऊऋࣜऑएँ ࣩ ऊफࣜटफपपडटरथफप
ࣰࣰ एऐँऎँऋ अ ऐऱपडमࣜउफठऱनडࣜएऐँऎँऋࣜࣿफपरमफनࣜबफमर
ࣰࣱ ऐऑऊँऀࣜ अ ऐऱपडमࣜउफठऱनडࣜऐऑऊँऀࣜࣿफपरमफनࣜबफमर
ࣰࣲ ऌऎऋऐँࣿऐछअऊࣜ अ ऌमफरडटरथफपࣜबफमरࣜࣤࣽटरथलडࣜࣞईࣞࣥ
ࣰࣳ ऋऌऐअऋऊ अ ऋबरथफपࣜबफमरࣜࣤऄࣶࣜࣜंउࣱࣜ࣬इऄशࣜयरडबࣨईࣶࣜࣜंउ࣭ࣜ࣬࣬इऄशࣜयरडबࣥ
ࣰࣴ ऋऌऐअऋऊ अ ऋबरथफपࣜबफमरࣜࣤऄࣶࣜࣜࣽउࣜࣵइࣜयरडबࣨईࣶࣜࣜࣽउ࣭ࣜ࣬इࣜयरडबࣥ
ࣰࣵ ࣽउऌछंࣽऊ ऋ उझथपࣜंࣽऊࣜफबडमझरथफपࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
2-4
ࣱ࣬ एऌइछऋऊ ऋ एबडझधडमࣜफपࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
ࣱ࣭ ंईࣽएऄछࣽऀऀऎ࣭ࣴ ऋ ंनझयतࣜअࣿࣜࣿफपरमफनࣜबफमर
ࣱ࣮ ࣾऑंंँऎछࣿईइ ऋ ࣾऱढढडमࣜअࣿࣜࣿनफटधࣜबफमर
ࣱ࣯ ँऌछएऀࣽ अ࣫ऋ ँऌऎऋउࣜऀझरझࣜबफमर
ࣰࣱ ँऌछएࣿई ऋ ँऌऎऋउࣜࣿनफटधࣜबफमर
ࣱࣱ ऀएऌछࣽࣾछअऊऐऎँऍ अ ऀएऌࣜअपरडममऱबरࣜमडभऱडयरࣜबफमर
ࣱࣲ ऀएऌछࣽࣾछࣿएࣜࣜࣜࣜࣜࣜࣜ ऋ ऀएऌࣜࣽࣾࣜࣿतथबࣜयडनडटरफमࣜबफमर
ࣱࣳ ऀएऌ࣫ࣿऋऀँࣿछऀछऋऑऐ अ ऀएऌ࣫ࣿऋऀँࣿࣜऀझरझࣜथपࣜबफमर
ࣱࣴ ऀएऌ࣫ࣿऋऀँࣿछࣿईइ ऋ ऀएऌ࣫ࣿऋऀँࣿࣜࣿनफटधࣜबफमर
ࣱࣵ ऀएऌ࣫ࣿऋऀँࣿछऀࣽऐࣽ ऋ ऀएऌ࣫ࣿऋऀँࣿࣜऀझरझࣜफऱरࣜबफमर
ࣲ࣬ ऀएऌࣜछࣿࣜअऊऐऎँऍࣜࣜࣜ अ ऀएऌࣜअपरडममऱबरࣜमडभऱडयरࣜबफमर
ࣲ࣭ ऀएऌछऎँएँऐ ऋ ऀएऌࣜऎडयडरࣜबफमर
ࣲ࣮ ऀऒएए ࣩ ःऊऀ
ࣲ࣯ ऀऒࣿࣿ ࣩ ऌफळडमࣜएऱबबनवࣜबफमर
ࣰࣲ ऀऒࣿࣿ ࣩ ऌफळडमࣜएऱबबनवࣜबफमर
ࣱࣲ ࣿऋऀँࣿछࣿए ऋ ࣿऋऀँࣿࣜࣿतथबࣜयडनडटरफमࣜबफमर
ࣲࣲ ࣿऋऀँࣿछऎँएँऐ ऋ ࣿऋऀँࣿࣜऎडयडरࣜबफमर
ࣲࣳ ऀएऌछࣿछࣿए ऋ ऀएऌࣜࣿतथबࣜयडनडटरफमࣜबफमर
ࣲࣴ औउछऀࣽࣿछऎँएँऐ ऋ औउࣜऀࣽࣿࣜऎडयडरࣜबफमर
ࣲࣵ औउछऀࣽࣿछउऑऐँ ऋ औउࣜऀझटࣜउऱरडࣜबफमर
ࣳ࣬ ँऒऋईछउऑऐँ ऋ ँऒऋईࣜउऱरडࣜबफमर
࣭ࣳ ँऒऋईछࣿईइ ऋ ँऒऋईࣜࣿनफटधࣜबफमर
࣮ࣳ ँऒऋईछऀࣽऐࣽ ऋ ँऒऋईࣜऀझरझࣜबफमर
࣯ࣳ ऀऒऀछऎँएँऐࣜࣤऎँएँऐࣥ ऋ ऀऒऀࣜऎडयडरࣜबफमर
ࣰࣳ औउछऎँएँऐ ऋ औउࣜऎडयडरࣜबफमर
ࣱࣳ ँऔऌछऀࣽऐࣽ ऋ ँऔऌࣜअࣿࣜऀझरझࣜबफमर
ࣲࣳ ँऔऌछࣿँ࣭ ऋ ँऔऌࣜअࣿࣜࣿतथबࣜडपझञनडࣜबफमर
ࣳࣳ ँऔऌछࣿईइ ऋ ँऔऌࣜࣿनफटधࣜबफमर
ࣳࣴ ࣾऋऋऐࣜउऋऀँ अ ࣾऋऋऐࣜउफठडࣜबफमरࣜࣤࣽटरथलडࣜࣞईࣞࣥ
ࣳࣵ ऀऒऀछऋऊࣜࣤउऌँःࣜऋऊࣥ अ ऀऒऀࣜऋऊࣜबफमर
ࣴ࣬ उऋऀँईࣜऋऌऐअऋऊ ऋ उफठडनࣜफबरथफप
࣭ࣴ एउࣽईईछंࣽऊछऋऊ ऋ एऩझननࣜंࣽऊࣜफबडमझरथफपࣜबफमरࣜࣤࣽटरथलडࣜࣞऄࣞࣥ
࣮ࣴ ऀऒऀࣽछएँई ऋ ऀऒऀࣩࣽऱठथफࣜयडनडटरफमࣜबफमर
࣯ࣴ ऀऒऀछࣿईइࣜࣤंऌࣿछࣿईइࣥ ऋ ऀऒऀࣜࣿनफटधࣜबफमर
ࣰࣴ ऀऒऀछऀऋऑऐࣜࣤअऎऎࣿऒࣥ ऋ ऀऒऀࣜऀझरझࣜफऱरࣜबफमर
ࣱࣴ ऀऒऀछऀࣽऐࣽࣜࣤंऌࣿछऀऋऑऐࣥ अ ऀऒऀࣜऀझरझࣜथपࣜबफमर
ࣲࣴ ऑࣽऎऐछऎँएँऐ ऋ ऑझमरࣜअࣿࣜऎडयडरࣜबफमर
ࣴࣳ ऌऋओँऎछऋऊ ऋ ऌफळडमࣜऋऊࣜबफमर
ࣴࣴ ࣾऑंंँऎछऀࣽऐࣽछऋऑऐ अ ࣾऱढढडमࣜअࣿࣜऀझरझࣜफऱरࣜबफमर
ࣴࣵ ऀऒࣿࣿ ࣩ ऌफळडमࣜएऱबबनवࣜबफमर
ࣵ࣬ ࣾऑंंँऎछऀࣽऐࣽछअऊ ऋ ࣾऱढढडमࣜअࣿࣜऀझरझࣜथपࣜबफमर
࣭ࣵ ऀऒएए ࣩ ःऊऀ
࣮ࣵ इँकࣜअऊ࣯ अ इँकࣜऀझरझࣜथपࣜबफमर
࣯ࣵ इँकछअऊ࣮ अ इँकࣜऀझरझࣜथपࣜबफमर
ࣰࣵ इँकछअऊ࣭ अ इँकࣜऀझरझࣜथपࣜबफमर
ࣱࣵ आऋः࣮ࣜࣽࣜࣤंऑऊࣩऑऌࣥ अ ंऱपटरथफपࣜࣽࣜࣿफपरमफनࣜबफमर
ࣲࣵ आऋः࣮ࣜࣽࣜࣤंऑऊࣩऀऋओऊࣥ अ ंऱपटरथफपࣜࣾࣜࣿफपरमफनࣜबफमर
ࣵࣳ आऋः࣭ࣜࣽࣜࣤऒऋईࣩऑऌࣥ अ ऒफनऱऩडࣜऀझरझࣜथपࣜबफमर
ࣵࣴ आऋः࣭ࣜࣽࣜࣤऒऋईࣩऀऋओऊࣥ अ ऒफनऱऩडࣜऀझरझࣜथपࣜबफमर
ࣵࣵ ࣾऑंंँऎछअऎऍ अ ࣾऱढढडमࣜअࣿࣜअपरडममऱबरࣜमडभऱडयरࣜबफमर
࣭࣬࣬ ऀऒࣿࣿ अ ऌफळडमࣜएऱबबनवࣜबफमर
2-5
I.C PIN DESCRIPTIONS (IC45 : AUDIO DSP : CS494003)

PIN No PIN Name I/O Function


1 UHS0 O DSP C Control Mode Select BIT 0
2 HUS1 O DSP C Control Mode Select BIT 0
3 INTREQ,ABODY O Open-drain interrupt-request output
4 FA1,FSCDIN I Host Address Bit One or SPI Serial Control data input
5 GPIO20 O General Purpose output
6 FA0,FSCCLK I Host parallel Address Bit Zero or Serial Control Port Clock
7 FHS2,FSCDIO O DSP AB Control port mode select bit2
8 GPIO21 O General Purpose output
9 FDAT7 I DSP AB Bidirectional data bus
10 VDD6 2.5V Supply Voltage
11 VSS6 2.5V Ground
12 FWR,FDS I Host write Strobe or Host data strobe
13 FRD,FR/W O Host Parallel Output Enable or
14 FDAT6 I DSP AB Bidirectional data bus
15 FCS I Host Parallel Chip Select , Host Serial SPI Chip Select
16 FINTREQ O Open-drain interrupt-request output
17 FDBCK I Reserved
18 FDAT5 I DSP AB Bidirectional data bus
19 FDAT4 I DSP AB Bidirectional data bus
20 VDD7 2.5V Supply Voltage
21 VSS7 2.5V Ground
22 FDAT3 I DSP AB Bidirectional data bus
23 FDBDA I Reserved
24 FDAT2 I DSP AB Bidirectional data bus
25 DBDA I Debug Data
26 DBCK I Debug Clock
27 FDAT1 I DSP AB Bidirectional data bus
28 TEST I Reserved
29 FDAT0 I DSP AB Bidirectional data bus
30 NV_WE O SRAM Write Enable
31 NV_OE O SRAM Output Enable
32 NV_CS O SRAM Chip Select
33 SD_WE O SDRAM Write Enable
34 SD_DATA0 O SDRAM Data Bus 0
35 SD_DATA1 O SDRAM Data Bus 1
36 SD_DATA2 O SDRAM Data Bus 2
37 SD_DATA3 O SDRAM Data Bus 3
38 SD_DATA4 O SDRAM Data Bus 4
39 SD_DQM0 O SDRAM Data Mask 0
40 SD_DATA5 O SDRAM Data Bus 5
41 VSSSD4 SDRAM Ground
42 VDDSD4 SDRAM Power Supply
43 SD_DATA6 O SDRAM Data Bus 6
44 SD_DATA7 O SDRAM Data Bus 7
45 SD_DQM1 O SDRAM Data Mask 1
46 SD_DATA15 O SDRAM Data Bus 15

2-6
PIN No PIN Name I/O Function
47 SD_DATA14 O SDRAM Data Bus 14
48 NC5 No Connect (Ground)
49 SD_DATA13 O SDRAM Data Bus 13
50 VSSSD3 SDRAM Ground
51 VDDSD3 SDRAM Power Supply
52 SD_DATA12 O SDRAM Data Bus 12
53 SD_DATA11 O SDRAM Data Bus 11
54 SD_DATA10 O SDRAM Data Bus 10
55 SD_DATA9 O SDRAM Data Bus 9
56 SD_DATA8 O SDRAM Data Bus 8
57 VSSSD2 SDRAM Ground
58 VDDSD2 SDRAM Power Supply
59 SD_CLK_OUT O SDRAM CLOCK DATA OUT
60 SD_ADR9 O SDRAM Address Bus
61 SD_CLK_IN I SDRAM CLOCK DATA IN
62 SD_ADR8 O SDRAM Address Bus 8
63 SD_ADR7 O SDRAM Address Bus 7
64 SD_CLK_EN I SDRAM Ground
65 SD_ADR6 O SDRAM Address Bus 6
66 SD_ADR5 O SDRAM Address Bus 5
67 SD_ADR4 O SDRAM Address Bus 4
68 SD_CS I SDRAM Chip Select
69 VSSSD1 SDRAM Ground
70 VDDSD1 SDRAM Power Supply
71 SD_BA O SDRAM Bank Address Select
72 SD_ADR10 O SDRAM Address Bus 10
73 SD_ADR0 O SDRAM Address Bus 0
74 SD_ADR1 O SDRAM Address Bus 1
75 SD_ADR2 O SDRAM Address Bus 2
76 SD_ADR3 O SDRAM Address Bus 3
77 SD_RAS O SDRAM Row Address Strobe
78 SD_CAS O SDRAM Column Address Strobe
79 SDATAN3 I PCM Audio input Data 3
80 SDATAN2 I PCM Audio input Data 2
81 SDATAN1 I PCM Audio input Data 1
82 SDATAN0 I PCM Audio input Data 0
83 NC4
No Connect (Ground)
84 NC3
85 LRCLKN I PCM audio input sample rate clock
86 SCLKN I PCM audio input bit clock
87 LRCLK1 O Audio Output Sample Rate Clock
88 NC2
No Connect (Ground)
89 NC1
90 VDD1 2.5V Supply Voltage
91 VSS1 2.5V Ground
92 XMT958,AUDATA7 O Digital Audio Output 7 , S/PDIF Transmitter
93 AUDATA6 O Digital Audio Output 6
94 AUDATA5 O Digital Audio Output 5
95 HDATA7 O DSP C Bidirectional data bus 7

2-7
PIN No PIN Name I/O Function
96 HDATA6 O DSP C Bidirectional data bus 6
97 HDATA5 O DSP C Bidirectional data bus 5
98 SCLK1 O Audio output bit clock
99 MCLK I Audio Master clock
100 VDD2 2.5V Supply Voltage
101 VSS2 2.5V Ground
102 AUDATA4 O Digital Audio Output 4
103 HDATA4 O DSP C Bidirectional data bus 4
104 SCLK0 O Audio output bit clock
105 HDATA3 O DSP C Bidirectional data bus 3
106 AUDATA3 O Digital Audio Output 3
107 AUDATA2 O Digital Audio Output 2
108 LRCLK0 O Audio Output Sample Rate Clock
109 AUDATA1 O Digital Audio Output 1
110 AUDATA0 O Digital Audio Output 0
111 CMPCLK,SCLKN2 I PCM audio input bit clock
112 HDATA2 O DSP C Bidirectional data bus 2
113 VSS3 2.5V Ground
114 VDD3 2.5V Supply Voltage
115 HDATA1 O DSP C Bidirectional data bus 1
116 HDATA0 O DSP C Bidirectional data bus 0
117 CMPREQ,FLRCLK2 I PCM Audio Data input bit clock
118 CMPDAT,FSDATA2 I PCM Audio data input Number two
119 FLRCLKN1 I PCM audio data input one
120 WR,DS I DSP AB Control port mode select bit 0
121 RD,R/W I DSP AB Control port mode select bit 1
122 PLLVSS PLL Ground voltage
123 FILT2 Phase-Locked Loop Filter
124 FILT1 Phase-Locked Loop Filter
125 PLLVDD PLL supply voltage
126 XTALO O Crystal OSC Output
127 XTAL,1CLKIN I External Clock input/Crystal OSC input
128 CLKSEL I DSP Clock select
129 CS O Host parallel Chip Select
130 A0 O Host Parallel Address bit 0
131 FSDATAN1 I PCM Audio Data input one
132 VDD4 2.5V Supply Voltage
133 VSS4 2.5V Ground
134 FSCLKN1,STCLK2 I PCM audio input bit clock
135 SCS I Host Serial SPI Chip Select (Active "L")
136 SCDIN I SPI Serial control data input
137 VSS5 2.5V Ground
138 VDD5 2.5V Supply Voltage
139 A1 O Host Address bit 1
140 SCDOUT O Serial control port data
141 HNBSY I Input Host Message status
142 SCCLK O Serial control port clock
143 UHS2,CS_OUT O DSP C Control Mode Select BIT 2
144 RESET I Master Reset Input

2-8
PIN ASSIGNMENT(IC45: CS494003)

AUDATA7, XMT958B, GPIO31


AUDATA3, XMT958A

SD_ADDR3 ,EXTA3
SD_ADDR2 ,EXTA2
SD_ADDR1 ,EXTA1
SD_ADDR0, EXTA0
SDATAN0, GPIO24
SDATAN1, GPIO25
SDATAN2, GPIO26
SDATAN3, GPIO27
AUDATA4, GPIO28

AUDATA5, GPIO29
AUDATA6, GPIO30

LRCLKN, GPIO23
SCLKN, GPIO22
HDATA3, GPIO3

HDATA4, GPIO4

HDATA5, GPIO5
HDATA6, GPIO6
HDATA7, GPIO7
AUDATA2

SD_CAS
SD_RAS
LRCLK0

LRCLK1
SCLK0

SCLK1
MCLK
VDD2

VDD1
VSS2

VSS1

NC1
NC2

NC3
NC4
105

100

90

85

75
95

80
AUDATA1 SD_ADDR10, EXTA10
AUDATA0 110 SD_BA, EXTA19
CMPCLK, FSCLKN2 70 VDDSD1
HDATA2, GPIO2 VSSSD1
VSS3 SD_CS
VDD3 SD_ADDR4, EXTA4
HDATA1, GPIO1 115 SD_ADDR5, EXTA5
HDATA0, GPIO0 65 SD_ADDR6, EXTA6
CMPREQ, FLRCLKN2 SD_CLK_EN
CMPDAT, FSDATAN2 SD_ADDR7, EXTA7
FLRCLKN1 SD_ADDR8, EXTA8
WR, DS, GPIO10 120 SD_CLK_IN
RD, R/W, GPIO11 60 SD_ADDR9, EXTA9
PLLVSS SD_CLK_OUT
VDDSD2

PLLVDD 125
CS494003 55
VSSSD2
SD_DATA8, EXTA11
SD_DATA9, EXTA12
SD_DATA10, EXTA13
SD_DATA11, EXTA14
CS, GPIO9 SD_DATA12, EXTA15
A0, GPIO13 130 VDDSD3
FSDATAN1 50 VSSSD3
VDD4 SD_DATA13, EXTA16
VSS4 NC5
FSCLKN1, STCCLK2 SD_DATA14, EXTA17
SCS 135 SD_DATA15, EXTA18
SCDIN 45 SD_DQM1
VSS5 SD_DATA7, EXTD7
VDD5 SD_DATA6, EXTD6
A1, GPIO12 VDDSD4
SCDOUT, SCDIO 140 VSSSD4
HINBSY, GPIO8 40 SD_DATA5, EXTD5
SCCLK SD_DQM0
UHS2, CS_OUT, GPIO17 SD_DATA4, EXTD4
RESET 144 SD_DATA3, EXTD3

35
25

30
20
10

15
5
1
UHS0, GPIO18
UHS1, GPIO19
INTREQ, ABOOT

GPIO20
FAO, FSCCLK

GPIO21
FDAT7
VDD6
VSS6

FDAT6

FDBCK

DBCK
FDAT5

VDD7

DBDA
VSS7

TEST
FDAT0
NV_WE, GPIO16
FA1, FSCDIN

FHS2, FSCDIO, FSCDOUT

FHS0, FWR, FDS


FHS1, FRD, FR/W

FCS
FINTREQ

FDAT4

FDAT3
FDBDA
FDAT2

FDAT1

NV_OE, GPIO15
NV_CS, GPIO14
SD_WE
SD_DATA0, EXTD0
SD_DATA1, EXTD1
SD_DATA2, EXTD2

BLOCK DIAGRAM(IC45: CS494003)

SAI 0 Serial External Memor y


Compressed SAI 1 Audio Interface
Digital SAI 2 Interface
S
I
Interface SAI 3
H N
Farme Multi-Standard
A T DAO 0
Digital Shifter Audio Decoder R DSP C Digital
E
Audio E Audio
R DAO 1
Input D Programmable Output
M
N
32-Bit DSP
E A
DSP AB M L
O B
Input R GPIO and I/O
U
PLL Clock Buffer Parallel or Serial Y DSP DSP Controller
S
Manager RAM Host Interface RAM ROM
Parallel or Serial
Host Interface

2-9
CODEC+DIR (AK4589) : IC44

isvjr kph nyh t

2-10
PIN DESCRIPTION

2-11
PIN DESCRIPTION

2-12
PIN DESCRIPTION

2-13
VOLUME&FUNCTION (BD3816K1) : IC31

2-14
2-15
VIDEO DRIVER IC : IC55



CTRAP 1 32 COUT
6dB 75Ω

MUTE1 2 MUTE1 TEST 31 TEST

CIN 3 1.5-6M 6dB 75Ω 30 MIXOUT


BPF
20k

GND 4 29 MIXFB

6M
YIN 5 LPF 28 GND

VCC 6 27 YTRAP
CLAMP

GND 7 CLAMP
26 GND

12M
PYIN 8 LPF
6dB 75Ω 25 YOUT

GND 9 24 YFB

PYTRAP 10 23 GND

VCC 11 6dB 75Ω 22 PYOUT

6M
PbIN 12
LPF
21 PYFB
20k

GND 13 20 GND

6M
PrIN 14
LPF
6dB 75Ω 19 PbOUT
20k

MUTE2 15 MUTE2 18 N.C.

PrTRAP 16 6dB 75Ω 17 PrOUT

2-16
XM : IC70

Functional Description

I2S_OCLK (M=o, S=n/u)


XMDTIC Inter-IC I2S_LRCLK (M=o; S=i)
I2S_SCLK (M=o; S=i)
Sound
(I2S) I2S_DATA (M=o; S=i)
I2S_RATE (M=o, S=n/u)
MUTE (M=o, S=n/u)

3.3V High Speed HSDP_EN# (M=o; S=i)


GND Data Port HSDP_CLK (M=o; S=i)
(HSDP) HSDP_DATA (M=o; S=i)
COMM ENGINE

COMM_TX_P
COMM_TX_M Low Speed
COMM_RX_P Data Port LSDP (M=o; S=i)
COMM I/F

COMM_RX_M (LSDP)

SAII_REQ (M=i; S=o)


LINKACTIVE (M=o, S=o)
SAII SAII_CLK (M=o; S=i)
COMM_TX_EN (M=o, S=o) SAII_DATA (M=o; S=i)

Sys Ctrlr SC_RX_IN (M=i, S=i)


(CBM) SC_TX_OUT (M=o, S=o)
Bus I/F SC_RATE (M=i, S=o)

RESET# (M=i, S=i)


OSC_IN ANT_REV (M=o, S=n/u)
OSC DT4_MODE (M=i, S=i)
Misc Status
OSC_OUT SLAVE_SEL (M=i, S=i)
RAM & Control
TEST (M=i, S=i)
(RFU – I2C_SCL)
(RFU – I2C_SDA)

2-17
Device Pin-out

I2S_LRCLK
SAII_DATA

I2S_OCLK

I2S_DATA
I2S_SCLK
SAII_CLK
SAII_EN

MUTE
VDD

VDD
VSS

VSS
48
47
46
45
44
43
42
41
40
39
38
37
LSDP 1 36 HSDP_EN#
VSS 2 35 DT4_MODE
SC_TX_OUT 3 34 HSDP_CLK
VDD 4 33 VDD
SC_RX_IN 5 32 HSDP_DATA
RFU (I2C_SCL) 6 31 VSS
RFU (I2C_SDA) 7
XM/DT IC 30 TEST
VDD 8
Rev 3B/4A 29 SC_RATE
ANT_REV 9 28 OSC_IN
VSS 10 27 VDD
RESET# 11 26 OSC_OUT
SLAVE_SEL 12 25 VSS
13
14
15
16
17
18
19
20
21
22
23
24
VSS

VSS

VSS
VDD

VDD
COMM_RX_M
I2S_RATE
LINKACTIVE

COMM_RX_P

COMM_TX_M
COMM_TX_P
COMM_TX_EN

2-18
Pin Descriptions
Table 3.2 Pin Descriptions
Pin Direct- Function Function
Pin Name Notes
# ion in Slave Mode in Master Mode
S=In Out= 4mA, SLC
1 LSDP Low Speed Data Port Input Low Speed Data Port Output
M=Out In=LVTTL S/T
S=Out System Controller Bus (CBM) System Controller Bus (CBM)
3 SC_TX_OUT 4mA, SLC
M=Out Transmit Data Out Transmit Data Out
S=In System Controller Bus (CBM) System Controller Bus (CBM)
5 SC_RX_IN LVTTL S/T
M=In Receive Data In Receive Data In
Reserved for Future Use (pull
Reserved for Future Use (pull
S=In
6 RFU (I2C-SCL) down with a 100k resistor to down with a 100k resistor to LVTTL S/T
M=In
Ground) Ground)
Reserved for Future Use (pull
Reserved for Future Use (pull
S=In
7 RFU (I2C-SDA) down with a 100k resistor to down with a 100k resistor to LVTTL S/T
M=In
Ground) Ground)
Indication of incompatible
S=n/u Not used in Slave mode, leave
9 ANT_REV antenna (refer to section 4mA, SLC
M=Out unconnected
4.3.2 for usage)
S=In Asynchronous Reset In, Asynchronous Reset In,
11 RESET# LVTTL S/T
M=In (Active Low) (Active Low)
S=In Master/Slave Mode Select In Master/Slave Mode Select In
12 SLAVE_SEL LVTTL S/T
M=In (High = Slave Mode) (Low = Master Mode)
S=Out Output driven high, leave Indicator of incoming I2S data
13 I2S_RATE 4mA, SLC
M=Out unconnected rate (see section 4.4.2)
Link Active indicator (High = Link Active indicator (High =
S=Out
14 LINKACTIVE DT bus link is active and data DT bus link is active and data 4mA, SLC
M=Out
is flowing) is flowing)
DT Comm Bus External DT Comm Bus External
S=Out
15 COMM_TX_EN Transceiver Direction Transceiver Direction 4mA, SLC
M=Out
Control Output (0=Tx, 1=Rx) Control Output (0=Tx, 1=Rx)
S=In DT Differential Comm Bus DT Differential Comm Bus
18 COMM_RX_P LVDS in+
M=In Internal Receiver Positive In Internal Receiver Positive In
S=In DT Differential Comm Bus DT Differential Comm Bus
19 COMM_RX_M LVDS in–
M=In Internal Receiver Negative In Internal Receiver Negative In
DT Differential Comm Bus DT Differential Comm Bus
S=Out
22 COMM_TX_M Internal Transmitter Negative Internal Transmitter Negative LVDS out–
M=Out
Out Out
DT Differential Comm Bus DT Differential Comm Bus
S=Out
23 COMM_TX_P Internal Transmitter Positive Internal Transmitter Positive LVDS out+
M=Out
Out Out
S=Out
26 OSC_OUT Crystal Driver Output Crystal Driver Output
M=Out
S=In
28 OSC_IN Crystal/ Ext. Clock Input Crystal/ Ext. Clock Input
M=In
SC interface baud rate select
SC interface baud rate Output
SC_RATE Input
S=Out (High = DT4_MODE is high Out= 4mA, SLC
29 (Rev 4A only, pull (High = 115.2K baud, Low =
M=In and the Master DTIC is In=LVTTL S/T
down for rev 3B) 9600 baud)
operating at 115.2K baud)
S=In Factory Test Mode Select Factory Test Mode Select
30 TEST LVTTL S/T
M=In (1=Test, 0= Normal Oper.) (1=Test, 0= Normal Oper.)

2-19
Pin Direct- Function Function
Pin Name Notes
# ion in Slave Mode in Master Mode
S=In High Speed Data Port Data High Speed Data Port Data Out= 4mA, SLC
32 HSDP_DATA
M=Out Input Output In=LVTTL S/T
S=In High Speed Data Port Clock High Speed Data Port Clock Out= 4mA, SLC
34 HSDP_CLK
M=Out Input Output In=LVTTL S/T
Enables/Disables driver on
Enables/Disables drivers on
SC_RATE and ANT_REV
S=In MUTE and ANT_REV (High
35 DT4_MODE (High = enable driver) This In=LVTTL S/T
M=In = enable drivers) This pin
pin was VSS on rev 3
was VSS on rev 3 XM/DT IC
XM/DT IC
S=In High Speed Data Port Enable High Speed Data Port Enable Out= 4mA, SLC
36 HSDP_EN#
M=Out Input (Active low) Output (Active low) In=LVTTL S/T
S=In I2S Digital Audio Port Data Out= 4mA, SLC
37 I2S_DATA I2S Digital Audio Port Data In
M=Out Out In=LVTTL S/T
S=In I2S Digital Audio Port Bit I2S Digital Audio Port Bit Out= 4mA, SLC
39 I2S_SCLK
M=Out Clock In Clock Out In=LVTTL S/T
S=In I2S Digital Audio Port I2S Digital Audio Port Out= 4mA, SLC
41 I2S_LRCLK
M=Out Left/Right Clock In Left/Right Clock Out In=LVTTL S/T
I2S Digital Audio Port
S=In I2S Digital Audio Port
43 I2S_OCLK Oversample Clock Out= 4mA, SLC
M=Out Oversample Clock Out
(not used, leave unconnected)
Provides a mechanism for
S=n/u Not used in Slave mode, leave
44 MUTE muting the audio during an Out= 4mA, SLC
M=Out unconnected
I2S rate change (High=mute)
S=Out Out= 4mA, SLC
45 SAII_CLK SAII Port Clock Output SAII Port Clock Input
M=In In=LVTTL S/T
S=Out Out= 4mA, SLC
47 SAII_DATA SAII Port Data Output SAII Port Data Input
M=In In=LVTTL S/T
S=In Out= 4mA, SLC
48 SAII_REQ SAII Port Request Input SAII Port Request Output
M=Out In=LVTTL S/T

Function Function
Pin# Pin Name Type Notes
in Slave Mode in Master Mode
4, 8, 17, 20,
VDD PWR +3.3V Supply Voltage +3.3V Supply Voltage
27, 33, 40, 46
2, 10, 16, 21,
24, 25, 31, 38, VSS GND Digital Ground Digital Ground
42

Notes: All Inputs are 3.3V LVTTL compatible; S/T = Schmitt Trigger inputs; SLC = Slew Rate Controller Output

2-20
SD RAM : IC47

PIN CONFIGURATION

V DD 1 50 V SS
DQ0 2 49 DQ15
DQ1 3 48 DQ14
V SSQ 4 47 VSSQ
DQ2 5 46 DQ13
DQ3 6 45 DQ12
V DDQ 7 44 VDDQ
DQ4 8 43 DQ11
DQ5 9 42 DQ10
V SSQ 10 41 VSSQ
DQ6 11 40 DQ9
DQ7 12 39 DQ8
VDDQ 13 50pin TSOP II 38 VDDQ
LDQM 14 400mil x 825mil 37 NC
/WE 15 0.8mm pin pitch 36 UDQM
/CAS 16 35 CLK
/RAS 17 34 CKE
/CS 18 33 NC
A11 19 32 A9
A10 20 31 A8
A0 21 30 A7
A1 22 29 A6
A2 23 28 A5
A3 24 27 A4
V DD 25 26 VSS

PIN DESCRIPTION

PIN PIN NAME DESCRIPTION

The system clock input. All other inputs are referenced to the SDRAM on the rising
CLK Clock
edge of CLK.
Controls internal clock signal and when deactivated, the SDRAM will be one of the
CKE Clock Enable
states among power down, suspend or self refresh.

CS Chip Select Command input enable or mask except CLK, CKE and DQM
BA Bank Address Select either one of banks during both RAS and CAS activity.

Row Address : RA0 ~ RA10, Column Address : CA0 ~ CA7


A0 ~ A10 Address
Auto-precharge flag : A10
Row Address Strobe,
RAS, CAS and WE define the operation.
RAS, CAS, WE Column Address Strobe, Write
Refer function truth table for details
Enable
LDQM, UDQM Data Input/Output Mask DQM control output buffer in read mode and mask input data in write mode

DQ0 ~ DQ15 Data Input/Output Multiplexed data input / output pin

VDD/VSS Power Supply/Ground Power supply for internal circuit and input buffer
VDDQ/VSSQ Data Output Power/Ground Power supply for DQ

NC No Connection No connection

2-21
FUNCTIONAL BLOCK DIAGRAM

1Mx16 Synchronous DRAM

Self Refresh Counter

Row Addr. Latch/Predecoder

Row Decoder
Refresh Refresh
Interval Timer Counter 512Kx16
Auto/Self Refresh

Bank 0
Ref. Addr.[0:11]

Address[0:10]

Sense AMP & I/O gates


Column Decoder

CLK DQ0
Precharge Address DQ1
CKE DQ2

Data Input/Output Buffers


Register
Row Active DQ3
BA(A11) DQ4
DQ5
State Machine

Column Active Column Addr.


CS DQ6
Latch & Counter
DQ7
RAS Overflow DQ8
Burst Length DQ9
CAS Counter DQ10
DQ11
WE DQ12
DQ13
UDQM DQ14
Column Decoder DQ15
LDQM Sense AMP & I/O gates
Row Addr. Latch/Predecoder

512Kx16
Bank 1

Mode Register Test Mode I/O Control

2-22
64M SDRAM (M12L64164A) : IC12

PIN ASSIGNMENT FUNCTIONAL BLOCK DIAGRAM


Top View

V DD 1 54 V SS
DQ 0 2 53 DQ15
VDD Q 3 52 VSSQ
DQ 1 4 51 DQ14 CLK Clock
DQ 2 5 50 DQ13 Generator Bank D
CKE
VSSQ 6 49 VDD Q Bank C
Bank B
DQ 3 7 48 DQ12
Address Row
8 47 DQ11

Row Decoder
DQ 4 Address
VDD Q 9 46 VSSQ Buffer
Mode & Bank A
DQ 5 10 45 DQ10
Register Refresh
DQ 6 11 44 DQ 9
Counter
VSSQ 12 43 VDD Q
DQ 7 13 42 DQ 8
14 41 VSS Sense Amplifier
V DD
L(U)DQM
Command Deco der

L DQ M 15 40 NC Column
CS Address Column Decoder
Co ntrol Log ic

WE 16 39 UDQM
Buffer
C AS 17 38 CLK RAS

Input & Output


&

Latch Circuit
R AS 18 37 CKE Refresh

Buffer
CAS
CS 19 36 NC Counter
Data Control Circuit DQ
A 13 20 35 A 11 WE
A 12 21 34 A9
A 10 /AP 22 33 A8
A0 23 32 A7
A1 24 31 A6
A2 25 30 A5
A3 26 29 A4
V DD 27 28 VSS

PIN FUNCTION DESCRIPTION


PIN NAME INPUT FUNCTION
CLK System Clock Active on the positive going edge to sample all inputs
Disables or enables device operation by masking or enabling all
CS Chip Select inputs except CLK , CKE and L(U)DQM
Masks system clock to freeze operation from the next clock cycle.
CKE Clock Enable CKE should be enabled at least one cycle prior new command.
Disable input buffers for power down in standby.

A0 ~ A11 Address Row / column address are multiplexed on the same pins.
Row address : RA0~RA11, column address : CA0~CA7

A12 , A13 Bank Select Address Selects bank to be activated during row address latch time.
Selects bank for read / write during column address latch time.
Latches row addresses on the positive going edge of the CLK with
RAS Row Address Strobe RAS low.
Enables row access & precharge.
Latches column address on the positive going edge of the CLK with
CAS Column Address Strobe CAS low.
Enables column access.
Enables write operation and row precharge.
WE Write Enable
Latches data in starting from CAS , WE active.
Makes data output Hi-Z, tSHZ after the clock and masks the output.
L(U)DQM Data Input / Output Mask
Blocks data input when L(U)DQM active.
DQ0 ~ DQ15 Data Input / Output Data inputs / outputs are multiplexed on the same pins.
VDD / VSS Power Supply / Ground Power and ground for the input buffers and the core logic.
Isolated power supply and ground for the output buffers to provide
VDDQ / VSSQ Data Output Power / Ground improved noise immunity.
NC No Connection This pin is recommended to be left No Connection on the device.

2-23
Motor Driver IC (AM5888) : IC16

SLQ#DVVLJQPHQW

2-24
2-25
zPin description

PIN No Pin Name Function


1 VINFC Input for focus driver
2 TRB_1 Connect to external transistor base
3 REGO2 Regulator voltage output, connect to external transistor collector
4 VINSL+ Input for the sled driver
5 REGO1 Regulator voltage output, connect to external transistor collector
6 FWD Tray driver forward input
7 REV Tray driver reverse input
8 Vcc1 Vcc for pre-drive block and power block of sled and tray
9 VOTR- Tray driver output (-)
10 VOTR+ Tray driver output (+)
11 VOSL+ Sled driver output (+)
12 VOSL- Sled driver output (-)
13 VOFC- Focus driver output (-)
14 VOFC+ Focus driver output (+)
15 VOTK+ Tracking driver output (+)
16 VOTK- Tracking driver output (-)
17 VOLD+ Spindle driver output (+)
18 VOLD- Spindle driver output (-)
19 Vcc2 Vcc for power block of spindle, tracking and focus
20 NC No Connection
21 VCTL Speed control input of tray driver
22 GND Ground
23 VINLD Input for spindle driver
24 NC No Connection
25 TRB_2 Connect to external transistor base
26 VINTK Input for tracking driver
27 BIAS Input for reference voltage
28 MUTE Input for mute control
Notes) Symbol of + and – (output of drivers) means polarity to input pin.
(For example, if voltage of pin1 is high, pin14 is high.)

2-26
Flash Memory (M29W160ET) : IC11

Logic Diagram Signal Names

A0-A19 Address Inputs

VCC DQ0-DQ7 Data Inputs/Outputs

DQ8-DQ14 Data Inputs/Outputs

20 15 DQ15A–1 Data Input/Output or Address Input


A0-A19 DQ0-DQ14
E Chip Enable

W DQ15A–1 G Output Enable


M29W160ET
E M29W160EB W Write Enable

G RB RP Reset/Block Temporary Unprotect

RP RB Ready/Busy Output
BYTE BYTE Byte/Word Organization Select

VCC Supply Voltage

VSS VSS Ground


AI06849B

NC Not Connected Internally

TSOP Connections

A15 1 48 A16
A14 BYTE
A13 VSS
A12 DQ15A–1
A11 DQ7
A10 DQ14
A9 DQ6
A8 DQ13
A19 DQ5
NC DQ12
W DQ4
RP 12 M29W160ET 37 VCC
NC 13 M29W160EB 36 DQ11
NC DQ3
RB DQ10
A18 DQ2
A17 DQ9
A7 DQ1
A6 DQ8
A5 DQ0
A4 G
A3 VSS
A2 E
A1 24 25 A0
AI06850

2-27
UART IC : IC39

XR20M1170 BLOCK DIAGRAM

VCC 1.62V – 3.63V


64 Byte
TX FIFO TX
ENIR#
64 Byte
EN485# RX FIFO RX
UART
IRQ# Regs RTS#
CTS#
SDA
GPIOs
SCL I2C/SPI GPIO[7:0]
A0/CS# Interface
BRG
A1/SI
SO XTAL1
Crystal Osc/Buffer
XTAL2
I2C/SPI#

2-28
VIDEO SW IC (NJM2595) : IC51, IC52, IC53

5-INPUT 3-OUTPUT VIDEO SWITCH

• mlh{|ylz
• 5-input 3-output
• Operating Voltage p4.0 to p6.5V
• Operating current p15mAtyp. at Vcc=p5V
• Crosstalk -65dBtyp.
• Internal 6dB Amplifier
• Internal 757 Driver
• Bipolar Technology
• Package Outline DIP16,DMP16

• GwpuGjvumpn|yh{pvuGˆ•‹GisvjrGkphnyht

V+ SW2 SW1 SW5


16 10 14 2

Vin1 13
S1 S5
Vin2 9 6dB 757
20k Amp Driver 1 Vout1
20k
S2
Vin3 7
20k S4 S6
6dB 757

Vin4 5 Amp Driver 15 Vout2


20k S3 20k

Vin5 3
20k S7
6dB 757
Amp Driver 11 Vout3
20k

4 6 12 8

SW3 SW4 GND V-

2-29
INVERTER IC (TC74HCU04AFN) : IC50

PIN ASSIGNMENT

1A 1 14 Vcc
1Y 2 13 6A
2A 3 12 6Y
2Y 4 11 5A
3A 5 10 5Y
3Y 6 9 4A
GND 7 8 4Y

LOGIC SYMBOL

(1) (2)
1A 1Y
(3) (4)
2A 2Y
(5) (6)
3A 3Y
(9) (8)
4A 4Y
(11) (10)
5A 5Y
(13) (12)
6A 6Y

TRUTH TABLE

A Y
L H
H L

2-30
LOGIC IC : IC30 / IC38 (74LCX08MX)

Logic Symbol Connection Diagrams


IEEE/IEC Pin Assignments for SOIC, SOP, and TSSOP

Pad Assignments for DQFN

Pin Descriptions
Pin Names Description
An, Bn Inputs
On Outputs

(Top View)

N JM 2068MD (OP A M P) : IC32, IC33, IC34

• P IN F UNC IT ON
1 8
1. A OUT P UT
A 2. A-INP UT
2 7 3. A+INP UT
B 4. V
5. B +INP UT
3 6
6. B -INP UT
7. B OUT P UT
4 5 8. V

2-31
OR GATE : IC48(74LCX32TTR)
Pin Connection And IEC Logic Symbols

2-32
MULTIPLEXERS : IC49(74VHC157FT)

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.

FUNCTION TABLE
INPUTS OUTPUT
G A/B A B Y
H X X X L
L L L X L
L L H X H
L H X L L
L H X H H

logic diagram (positive logic)


2
1A

4
3 1Y
1B

5
2A

7
6 2Y
2B

11
3A

9
10 3Y
3B

14
4A

12
13 4Y
4B

15
G
1
A/B

Pin numbers shown are for the D, DB, J, NS, PW, RGY, and W packages.

2-33
2CH DAC : IC71(AK4384)

LRCK
P/S MCLK

VDD

Clock VSS
SMUTE/CSN De-emphasis
μP Control Divider VCOM
ACKS/CCLK Interface
DIF0/CDTI
DZFL

DZFR
8X ΔΣ SCF
ATT Modulator LPF AOUTL
Audio Interpolator
BICK Data
SDTI
Interface 8X ΔΣ SCF
ATT Interpolator LPF AOUTR
Modulator

PDN

2-34
 Pin Layout

MCLK 1 16 DZFL

BICK 2 15 DZFR

SDTI 3 14 VDD

LRCK 4 Top 13 VSS


View
PDN 5 12 VCOM

SMUTE/CSN 6 11 AOUTL

ACKS/CCLK 7 10 AOUTR

DIF0/CDTI 8 9 P/S

PIN/FUNCTION

No. Pin Name I/O Function


1 MCLK I Master Clock Input Pin
An external TTL clock should be input on this pin.
2 BICK I Audio Serial Data Clock Pin
3 SDTI I Audio Serial Data Input Pin
4 LRCK I L/R Clock Pin
5 PDN I Power-Down Mode Pin
When at “L”, the AK4384 is in the power-down mode and is held in reset. The
AK4384 should always be reset upon power-up.
6 SMUTE I Soft Mute Pin in parallel mode
“H”: Enable, “L”: Disable
CSN I Chip Select Pin in serial mode
7 ACKS I Auto Setting Mode Pin in parallel mode
“L”: Manual Setting Mode, “H”: Auto Setting Mode
CCLK I Control Data Clock Pin in serial mode
8 DIF0 I Audio Data Interface Format Pin in parallel mode
CDTI I Control Data Input Pin in serial mode
9 P/S I Parallel/Serial Select Pin (Internal pull-up pin)
“L”: Serial control mode, “H”: Parallel control mode
10 AOUTR O Rch Analog Output Pin
11 AOUTL O Lch Analog Output Pin
12 VCOM O Common Voltage Pin, VDD/2
Normally connected to VSS with a 0.1μF ceramic capacitor in parallel with a
10μF electrolytic cap.
13 VSS - Ground Pin
14 VDD - Power Supply Pin
15 DZFR O Rch Data Zero Input Detect Pin
16 DZFL O Lch Data Zero Input Detect Pin
Note: All input pins except pull-up pin should not be left floating.

2-35
EEPROM : IC22(AT24C08N10SC)

2-36
FET : IC14(HN1K05FU)
Equivalent Circuit (top view) Marking

6 5 4 6 5 4

Q1
KK
Q2

1 2 3 1 2 3

(Q1, Q2 common)

Switching Time Test Circuit


(a) Test circuit (b) VIN
1.5 V
VGS 90%
ID
OUT VDD = 1.5 V
1.5 V IN 10%
D.U. <= 1% 0
VIN: tr, tf < 5 ns VDD
50 9

0 10%
RL

(Zout = 50 W)
Common Source
(c) VOUT
10 ms VDD 90%
Ta = 25°C VDS VDS (ON)
VIN
tr tf

ton toff

2-37
RDS DEMODULATION IC(LC72723M) : IC29

Pin Assignment

Block Diagram

2-38
VIDEO SW IC(PI5V330) : IC56, IC59

Low On-Resistance Wideband/Video


Quad 2-Channel Mux/DeMux
Features Description
• High-performance solution to switch between video sources Pericom Semiconductor’s PI5V330 is a true bidirectional Quad
• Wide bandwidth: 200 MHz 2-channel multiplexer/demultiplexer recommended for both RGB
• Low On-Resistance: 3Ω and composite video switching applications. The video switch can
be driven from a current output RAMDAC or voltage output com-
• Low crosstalk at 10 MHz: –58dB
posite video source.
• Ultra-low quiescent power (0.1μA typical)
Low On-Resistance and wide bandwidth make it ideal for video and
• Single supply operation: +5.0V
other applications. Also this device has exceptionally high current
• Fast switching: 10ns capability which is far greater than most analog switches offered
• High-current output: 100mA today. A single 5V supply is all that is required for operation.
• Packaging (Pb-free & Green Available): The PI5V330 offers a high-performance, low-cost solution to
– 16-pin 300-mil wide plastic SOIC (S) switch between video sources. The application section describes the
– 16-pin 150-mil wide plastic SOIC (W) PI5V330 replacing the HC4053 multiplier and buffer/amplifier.
– 16-pin 150-mil wide plastic QSOP (Q)

Block Diagram Pin Configuration

S1A IN 1 16 VCC
DA
S2A S1A 2 15 EN
S2A 3 14 S1D
S1B
DB DA 4 13 S2D
S2B
S1B 5 12 DD
S2B 6 11 S1C
S1C
DC DB 7 10 S2C
S2C
GND 8 9 DC
S1D
DD
S2D

DECODER/DRIVERS

Pin Description
Pin Name Description
EN IN
S1A, S1B, S1C, S1D
Analog Video I/O
S2A, S2B, S2C, S2D
IN Select Input
Truth Table EN Enable
EN IN ON Switch D A , DB
Analog Video I/O
0 0 S1A, S1B, S1C, S1D DC, DD
0 1 S2A, S2B, S2C, S2D GND Ground
1 X Disabled VCC Power

2-39
RESET IC(RH5VT18C) : IC25

BLOCK DIAGRAMS

VDD
2

OUT
+
1

Vref

3
GND

TIME CHART

Released Voltage +VDET


Detector Threshold Hysteresis
Supply Voltage Detected Voltage –VDET
(VDD)
Minimum Operating Voltage
GND

Output Voltage
(OUT)

GND

tPLH

DEFINITION OF OUTPUT DELAY TIME t PLH

+VDET + 2.0V

Input Voltage
(VDD)

0.7V
GND

+VDET +2.0V

Output Voltage
+VDET + 2.0V
2

GND

tPHL tPLH

2-40
RS232 TRANSCEIVER : IC28

PIN CONFIGURATION

PIN DESCRIPTION
PIN No SYMBOL NAME AND F UNCTION
1 C1+ Positive Terminal for the first Charge Pump Capacitor
2 V+ Doubled Voltage Terminal
3 C1- Negative Terminal for the first Charge Pump Capacitor
4 C2+ Positive Terminal for the second Charge Pump Capacitor
5 C2- Negative Terminal for the second Charge Pump Capacitor
6 V- Inverted Voltage Terminal
7 T2OUT Second Transmitter Output Voltage
8 R2IN Second Receiver Input Voltage
9 R2OUT Second Receiver Output Voltage
10 T2IN Second Transmitter Input Voltage
11 T1IN First Transmitter Input Voltage
12 R1OUT First Receiver Output Voltage
13 R1IN First Receiver Input Voltage
14 T1OUT First Transmitter Output Voltage
15 GND Ground
16 VCC Supply Voltage

2-41
TRANSISTOR, REGULATOR IC BLOCK DIAGRAM

TO-92S TO-92 TO-220 TO-92L

1. Emitter 1. Emitter 1. INPUT 1. Emitter


2. Collector 2. Collector 2. OUTPUT 2. Collector
3. Base 3. Base 3. GND 3. Base
123 123
123 123

KRA102M KRC102M KTC3200GR KSB811Y KSC2316Y


KSC2785Y KTA1271Y
KSA1175Y KTA1268GR

TO-126 TO-220 TO-3P TO-220

1. Emitter 1. INPUT 1. Base 1. INPUT


2. Collector 2. GND 2. Collector 2. OUTPUT
3. Base 3. OUTPUT 3. Emitter 3. GND
4. CONTROL
123 123 1 2 3 1234

KTC3114A 2SB1559 KIA78R05 KIA278R05


KTA1360Y KIA7806 2SD2389 KIA278R12 KIA278R08
KTC3423Y

TO-220 SOT-23
3
1. Base 1. Base
TOP VIEW
2. Collector 2. Emitter
3. Emitter 3. Collecfor
1 2
123

KTB1369Y KRA102S
KTD2061Y KRC102S
KTD1304

2-42
SPECIAL FUNTION KEY

FEATURE REMOTE KEY OPERATING FRONT KEY OPERATING

AM FUNCTION STATE
Micom Reset(Host+Mpeg) -
PLAY KEY(SHORT) -> STOP(SHORT) KEY-> DISPLAY(LONG) KEY

AM FUNCTION STATE
HOST Soft version Display -
PLAY KEY(SHORT)-> STOP(SHORT) KEY-> TUNER MODE(LONG) KEY

SET UP ON STATE
MPEG Soft version&Region Display -
NURBER "2" + "5" + "8" + "0" KEY

XM FUNCTION STATE
XM Test Tone Check -
TUNER MODE (LONG) KEY(five second)

AM FUNTION STATE
Turn on all VFD dots and icons Check -
MENU(LONG)KEY(five second)

FM/AM FUNCTION STATE


-. DISPLAY (LONG) KEY
-. UP/DOWN KEY(character change)
Station/preset naming Methord -
-. LEFT/RIGHT(cursor move)
-. MEMORY KEY (memory seg blinking)
-. MEMORY KEY (save)

Auto-preset Methord - MEMORY (LONG) KEY

Tuner freq for factory testing - TUNER MODE(LONG) KEY (five second)

XM FUNCTION STATE
XM signal strength Check -
MENU (LONG) KEY
Press DEVICE SELECTOR "DVD" Key
OPEN
Region Change Press Remocon Key: 2->5->8->0 -
Press Remocon number key.
ex) region free:0 , region2: 2
Resolution Change display long key ( 2 sec ) -> right cursor display long key ( 2 sec ) -> memory key

NTSC<-->PAL Change - memory long key ( 5 sec )


(Preset Mode)
Preset Delete - 1.Display key + Memory SHORT key -->1 Preset Delete
2.Display key + Memory LONG key --> ALL Preset Delete

(AM funtion) TUNER MODE key + Memory key Push more than 5sec
AM Frequency STEP Change -
AM Step 9kHz<->10kHz toggle change

2-43
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%JGEM& %JGEM3
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ΊͶ΄ ΊͶ΄ +U`8


+U8CRRNKGF %JGEM4
%JGEM& CRRNKGFVQ%0
VQ%0RKPᐲ! 4
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%JGEM6
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444

(14#..219'4+5104'.#;4;/756$'10̖

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VQ$0ᐰ! EKTEWKV +U8CRRNKGF
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Ϳ΀
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2-44
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ΊͶ΄

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2-45
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2-46
1. BLOCK DIAGRAM

2-47 2-48
2. WIRING DIAGRAM before SN A9YVISOTWO06301

2-49 2-50
3. SCHEMATIC DIAGRAM before SN A9YVISOTWO06301
FRONT PART
FL91

RESET
PGND
LGND

VDD

OSC

Q16
TSB
TSA

16G
VH

DA
CP
CS
F2

F1
CFL16BT130GINK

69 64 63 62 61 60 59 58 57 56 55 54 53 52 1

C901 C902

0.1uF 0.1uF

R940 C941
KEY_IN_3 KEY_IN_3

7
10K 1000P
GND GND

6
C3A206
C3203Y

R902
C3A206
R957 FUNC_A FUNC_A

Q914
R901

R903

R905

33K
10

5
S941
47K

220/10V
R913 R958 FUNC_B FUNC_B

C957

4
CLOCK SET
1K 47K

R942

1K
R959 VOL_B VOL_B

3
100K
S942

R914

R915

10K
47K
R960 VOL_A VOL_A

0.1uF

2
Q923 BAND

C904

R904

10

CN71
BN71
47K

1.5K
R943
A102 GND GND
R923 D921

1
S943

0 1SS133
FM MUTE

220/10V

1.8K
C921

R944
R910 47

2.7K

2.7K

2.7K

2.7K
R951

R952

R953

R954
R911 47 S944
VR91
R912 CSR2A036Z VR92
47
VOLUME FUNCTION TONE

2.7K
R945
270P

270P

270P

2
Q921 S946

1
A102

0.022u

0.022u

0.022u

0.022u
C910

C911

C912

C951

C952

C953

C954
OP/CL

CN22
-FL(AC)

3.3K
R947
1
+FL(AC) S948

3
2
+39V DC

3
PLAY/PAUSE
GND

1.2K

1.2K

5.6K
R925

R924

R955

R956

R949
680

680

Q922

4
C102 GND S949

5
R922 POWER_H

6
STOP

JW95
0 VFD_CE

7.5K
R950
D925

CJP15GA115ZY
VFD_DATA S950

8
B O R906 D909
VFD_CLK

9
SURROUND
10K 1SS133 VFD_ BLK

220/10V
CVD50BOBBWGA

10
0.1uF
C908

C909

11
HP_L_CH

12
STANDBY-LED H/P_GND
ENCODER B'D

13

FRONT B'D <-------> MCU B'D


HP_R_CH

14
0.1uF
C906
GND

15
Q906
C102M

D975 OPEN

HEADPHONE B'D D976 OPEN

JW91

JW92
R926

22K
R975 4.7

R983 OPEN
R982 OPEN

C982 OPEN

C983 OPEN
JK93

1SS133

1SS133
1SS133

1SS133

OPEN

OPEN
D983

OPEN

OPEN
D981

D967

D969
D982

D984

D968

D970
Headphones C975 0.1uF
L-CH
CN72

L-CH
BN72
1

2
0.022u

3 GND H/P_GND
C977

7 VGND GND VGND GND


R-CH GND VGND
R-CH 5
C C
3

8 GND

CN95
1
0.022u

13

1
C978

2
GND GND FUNC_UP

12
4

GND
VGND 3

2
1 FUNC_DOWN
4

11
R979 H/P IN H/P IN
C980
Y Y
5

VOL_UP JK92

10

3
100
1/50V

VOL_DOWN
0.1uF
S-VIDEO
C979

9
GND

270P

270P
CJP13GA115ZY

C966

C965
R966

R965
C981

75
75
4
H/P IN

8
0.1uF GND CVBS

5
KEY_IN_1

6
KEY_IN_2
JW98

R967
C967
VGND

270P
KEY_IN_3 JK91

75
VIDEO_IN

4
ST+5V
JW93
1

3
REMOTE

2
2
ST+3.3V

VIDEO 4
CN23
1
OPEN

R(MONO)
OPEN
D932

D931

R-CH R970

CN31
3

1
C931 R931 47 0
GND

150P
220K
R972

C972
4
10K

2
1000P
AUDIO
L-CH
7
* DVD MECHA CONNECTOR BOARD

3
C937 5
S9 31 R937

R971
L

C971
220K

150P
1000P 10K RC91 6
UP R969
S937

R932

1K
470

FRONT B'D
S932 POWER
REMOTE

R938

1K
SENSOR
BN15 BN14 LEFT S93 8

1.5K
R933
1 2 3 4 5 1 2 3 4 5 6 Vcc GND VOUT

S933
SET UP
3 2 1

1.5K
R939
ENTER S939
R961
1.8K
R934

S934 MEMORY 1.2K


R962
DOWN
100
2.7K
R935

1 2 3 4 5 S935

220/10V
1 2 3 4 5 6
VIDEO4 B'D

150P
C962

C961
CN15 DVD OP/CL CN14 DVD SLED/SPDL RIGHT
3.3K
R936

S 936

DISPLAY

** IMPORTANT SAFETY NOTICE.


COMPONENT IDENTIFIED BY MARK HAVE SPECIAL CHARACTERISICS.
IMPORTANT FOR SAFETY. WHEN REPLACING ANY OF THESE COMPONENTS
USE ONLY MANUFACTURER'S SPECIFIED PARTS.
** THE UNIT OF RESISTANCE IS OHM.
K = 1000 OHM. M = 1000KOHM.
** THE UNIT OF CAPACITANCE IS MICROFARAD(uF)
6 -
pF = 10 uF
** THIS SCHEMATIC DIAGRAM MAY MODIFIED AT ANY TIME WITH THE
IMPROVEMENT OF PERFORMANCE.

2-51 2-52
MCU & INPUT PART before SN A9YVISOTWO06301

2-53 2-54
DSP & CODEC PART

2-55 2-56
POWER PART before SN A9YVISOTWO06301

Q6 Q7
JK71

5600P(M)
AMP R-OUT
R1 R1

C895
CSL3A017ZU 1

L-OUT
AMP L-OUT

4
2
C102S R2 A102S R2
R880 CRJ10DJ561T

5
R1 = R2 = 10k

10(1W)

10(1W)
R875 R880 3
R875 CRJ10DJ471T

R894

R893

R-OUT
5600P(M)
Q842
470 560 C102S RY89

C896
4

CN63
PROTECT-IN

HJP06GA130ZK
D883 AMP-RELAY-ON

0.047(M)

0.047(M)
C898

6
C894

C893
AMP+VCC CJJ5P011Z
R889 22(1/4) TH71 Q881 1SS355 D842

2
CRTSYPSX10850JD A102S 4700P(M)
D882

10/50V
FROM AMP PART

C881
R881

10K
AMP L-OUT L891 C897
2 1
)BTO01/37, 0 1SS355

3
1SS355 C842
CLEY0R5KAK
4700P(M)
R891 22(1/4)

4
0.01uF
*POWER PART

R879

10K
R842

5 0
AMP-VEE
AMP+VCC
6

6800/50V
10/50V
0.01uF
D851 2

0.15/100V

0.15/100V
1.5K
C878

C855
R878

R859

R857

R855
C879

18K

43K

43K
Q878 AC 33V

C853

C851

CN72
C3875S R861

CJP03GA90ZY
4

FROM TRANS
1
Q883 R863 18K GND

2
C3875S
R860

0.15/100V

0.15/100V
18K 600V/6A 3
R886 R883 AC 33V

6800/50V

C854

C852

3
18K

C856
R862

R858

R856
18K

43K

43K
Q882
22K 0
CN65

C3875S
1
HJP06GA130ZK

470/10V
0.01uF
R885 AMP-VEE

1.5K
C884
AMP L-GND

R884
C885
2

22K IC83 KIA7812API BK1


BK7
FROM AMP PART

R882
3

+12V
BK2
3 OUT IN 1 D819
BK8
SHORT PROTECT 0

100/16V
0.01uF
4

C833
R832

C832
10K
BK3
COMMON 1N4003

3300/25
Q846

0.01uF
IC81

R819

C819
R847

C847
10K
C3875S

15K
D820
2
5

KIA7808API BK4
AMP R-GND

1N4003

0.01uF
6

+8V

C848
BK5
3 OUT IN 1

10/50V

0.01uF
C846
R846

C845
10K

100/16V
DC+15V D815 BK6

0.01uF
R801
Q845 COMMON

C829
R829

R827

C827
18K

10K
Q847
A1504S C3875S
2 1N4003 0.15

3300/25

0.01(M)
R815

C815

C801
15K
R831 D816
AMP+VCC

0.15/100V
CN64

10K AC 14V
HJP06GA130ZK

1N4003

C803

9
100/16V
D817

0.01uF
R890 22(1/4) 1

C830

3300/25V
R830

R828
AMP-RELAY-ON

C828
18K

10K

0.01(M)
2

R817

C817

CJP09GA01ZY
GND

FROM TRANS
C802
15K
GND

8
FROM AMP PART

1N4003

AMP+VCC
R877

1K

AMP-VEE
AMP R-OUT L892

DSP+5V
D818 R802

+12V
3

-8V AC 14V
CLEY0R5KAK OUT IN
3 2

7
C877
R892 22(1/4) DC-15V 1N4003 0.15
R804 0.15
4

D821 AC 11V

6
0.01uF

0.01(M)
DSP+5.6V IC82 KIA7909PI 1N4003

C804
5

0.15/100V
GND

6800uF/16V

5
C806
15K
IC84

C821
6

HVIKA78R08

0.01(M)
C805

4
AMP-VEE +12V D822

R821
R805 0.15
+12V MPEG+8V
VOUT VIN
1

3
2 1 1N4003
BN71

470/10V
0.01uF

0.01uF
C839

BN18
C838

+8V

VDIS

GND
10K
1
GND

100/16V
D823

C835
R838 R807 0.15
2

2
-8V

OPEN

R835
R895 100 4 3

C834

0.01(M)
MCU PART

R834
2
+8V OPEN 2A04H

CN73
C807
100
3

1
R896

0.15/100V
C809
12000/16V

10000/16V
3

15K
GND

C824

C823
4

Q876 A1271Y

TO MPEG PART

0.01(M)
C808
R876
D824 R808 0.15

4
-8V

R823
D875
5

3.3 Q895 A1271Y

0.01uF
7

7
2A04H

10K

100/16V
5
1SS355
R874

C837
10K

10/50V
6

IC85
C875

R898 6

6
HVIKIA278R05PI

C836
R836
D825 R810
DSP+5V6 Q875
7

VOUT
4.7K DVD +5V
VIN 1

0.01(M)
R871 D871 D872 R897 5
2

5
SB2100 0.15

C810
OPEN
R841

BN74_2

0.15/100V
Q896

R864

10K
1

OPEN

OPEN

ON/OFF
OPEN OPEN 4.7K
C871

C812
R825 OPEN
4

GND
R872
CN75

4
FAN

CJP07GA01ZY

10000/16V

10000/16V
4

0.01(M)
C107S

0.01uF
2

OPEN

C825

C826
C841

C811
R873 3
3

3
D826 R811
1K C107S
2
CN26

2
CN74
1

SB2100 0.15
D840

BN74_1
IC86

REGULATOR PART
GND
HVIKIA278R05PI 1
2

1
VOUT
VIN 1

DSP+5.6V
PROTECT-IN D867
2 RLS4148SR
R869 R867
3

AMP-RELAY-ON

ON/OFF
CUP12048-4

GND
R840
4

10 1SS355 1K
10/50V
0.01uF

1SS355

4
C869

R865
C870

D868

18K
5

OPEN
Q865
MCU PART

FUNC-MUTE-OUT 3
R866 C3875S
6
CJP13GA115ZY

18K
R868

0
8

GND
9

R887
H/P-L
10

330(1W)
**IMPORTANT SAFETY NOTICE.
11

H/P-R R888 COMPONENTS IDENTIFIED BY MARK HAVE SPECIAL CHARACTERISTICS.


12

ST+5.6V 330(1W)
IMPORTANT FOR SAFETY. WHEN REPLACING ANY OF THESE COMPONENTS.
13

USE ONLY MANUFACTUREY'S SPECIFIED PARTS.


**THE UNIT OF RESISTANCE IS OHM. K=1000 OHM, M=1000 KOHM
- 6
**THE UNIT OF CAPACITANCE IS MICROFARAD (uF) 1pF = 10 uF
**THIS SCHEMATIC DIAGRAM MAY BE MODIFIED AT ANYTIME
WITH THE IMPROVEMENT OF PERFORMANCE

2-57 2-58
AMP PART

R667

22(1/4)

R639

560

R641

R643
560

75
1.5K

1.5K
R615

R617
Q639 Q643 Q671
A1268GR KTA1360Y 2SD2389P

R613 C613 R671

470 680P Q641 3.3(1/4)


A1268GR R685
Q683
C 3875 10K

R679

220/63V
1K

C633
R629

33K

BN63
0.22
R659
R651

R655

R661

R675
22K
560

HJP06GB131ZK
10K

10/50V
2K
Q611

C683

R683
Q609 +VCC

1K
C3200GR

2
C3200GR

2
C603

10/50V
R603

TO POWER PART
CJP02GA01ZY
C651
1

3
1K 10/50V
Q607

CN67
L-OUT

3
Q651

1
100P
D1304

33P
R605

R653

R657
C605

C653
33K

22K
560
R601

R663
220/63V

470
47K

4
CVT2SC4495

C635
R607

0.22
R609

R611

R677
0

5
4.7K
C637
R665 R681 -VCC

R697

O
OPEN

6
12P

R627

1K
1.8K
Q627

R631

1.5K
C3200GR
D619 R619
Q649 Q673
1SS355 43K Q647 KTC3423Y 2SB1559P
C3200GR

RLS4148SR
100/16V
Q625 R673
1SS355

C631
D623

D645
C3198
3.3(1/4)
R621

47k

100/16V
C625

R645

560
1SS355
D625

R625

R647

R649
270

560
L-GND

75
CJP07GA19ZY

BN65
HJP06GB131ZK
R669
CN32

TO POWER PART
22(1/4)
R691
6

3
F_MUTE
Q691 OPEN
R694 PROTECT
OPEN R668
5

4
P_M
D691

OPEN

OPEN
R-GND
22(1/4)
4

5
1.5K

1.5K
D692

OPEN

R616

R618

R640

R642

R644
560

560

75
3

6
RCH Q672

R686
Q640

10K
2SD2389P
A1268GR
2

C614
OPEN

R614 R672
R692
R602

47K

LCH
1

470 680P Q642 3.3(1/4)


Q692 A1268GR Q644
OPEN Q684
KTA1360Y
C3875
FROM INPUT

R680
R695
220/63V

1K
C634
R630

33K
R604

R660
R652

R662
10

10K
560

2K
1K

Q610 Q612

R656

22K

BN64
0.22
R676

HJP06GB131ZK
10/50V
R699 C3200GR C3200GR

C684

R684
2
+VCC

1K
10/50V
C604

2
C662
75 1

TO POWER PART
CJP02GA01ZY
R608

4.7K

2
Q608
10/50V

3
D1304

3
Q652
R654

R658

R664
22K
560

470

CN68
R-OUT
220/63V

1
CVT2SC4495
33P
C636
R610

R612

C654
0

4
100P
R606

C606
33K

0.22
R678

5
C638
R628

R698
-VCC
1K

0
R666 R682
OPEN

6
12P
Q648 1.8K
C3200GR
R632

1.5K

D620 R620

1SS355 43K
Q626
Q628
C3200GR
Q650
KTC3423Y
Q674
2SB1559P
)BTO01/37, 2
C3198
*AMP PART
1SS355
D624

RLS4148SR
100/16V

R674
C632

D646
100/16V
C626

3.3(1/4)
R622

47k

1SS355
D626

R626

270

R646

R648

R650
560

560

75

R670

22(1/4)

**IMPORTANT SAFETY NOTICE. **THE UNIT OF CAPACITANCE IS MICROFARAD (uF)


COMPONENTS IDENTIFIED BY MARK HAVE SPECIAL CHARACTERISTICS. - 6
1pF = 10 uF
IMPORTANT FOR SAFETY. WHEN REPLACING ANY OF THESE COMPONENTS.
**THIS SCHEMATIC DIAGRAM MAY BE MODIFIED AT ANYTIME
USE ONLY MANUFACTUREY'S SPECIFIED PARTS.
WITH THE IMPROVEMENT OF PERFORMANCE
**THE UNIT OF RESISTANCE IS OHM.
K=1000 OHM, M=1000 KOHM

2-59 2-60
VIDEO PART

V-INPUT
P-SCAN
VCR VID4 SAT DVD / OFF

VIDEO PART
R793 REC-Y

75 1%

V-SW1 L PAGE #1
H H H L

100P

R791
C793

22K
DGND VCR-CVBS
)BTO01/37, 1
V-SW2 H
REC-CVBS

100P
H H H L

C792

R790

22K
C SW1
+5VV
VCR OUT R792 REC-C R741
SW2

SCART_CVBS
Y

VCR_REC
75 1% 4.7

100/16V
JK52

0.01uF
L(X)

V-GND
+8V

V-SW3 L(X) L H L

C741

C742
CJJ9P004Z
COM

VCR
R789 REC-CVBS
+5VV
IC57 KIA7805API
75 1% -5VV
16 15 14 13 12 11 10 9

100P

R788
OUT IN

C789

22K
Y IC51
COMPOSITE
R743
3 1
V-SW4 L(X) L H H L
MONITOR OUT C 4.7 GND

100/16V

220/16V
0.01uF

0.01uF
C737

C731

R731
C735

C733

10K
2
1 2 3 4 5 6 7 8
V-SW5 H H H H L

0.01uF
R799 MONI-Y

100/16V
COM

C744

C743
VID4
DVD
MONITOR

SAT
75 1 %

100P

R797
C799

22K
MONI-CVBS

SAT-CVBS

100/16V

220/16V
0.01uF

0.01uF
VID4_CVBS

CN24
C738

C732

R732
C736

C734

10K
1 V+8V

1
100P

FROM INPUT PART


R796
C798

22K
SW3
GND

2
R798 MONI-C -8V
SW4

3
V-8V
75 1% 3 OUT IN 2

4
DVD_CVBS V-GND
R795 MONI-CVBS

5
IR-IN
SW5 KIA7905PI IC58
75 1%

100P
C795

6
EXP_CLK

R794
VCR-Y

22K
-5VV

7
EXP_DATA

R745

75
R726
REC-Y

8
EXP_CE2
100 EXP_CLK

9
R727 D-GND
R580
+5VV SW1

10
100 EXP_DATA R-CH
R746 R728 0
SW2

11
R579
AGND
100 EXP_CE2

VCR_REC
4 .7

12
L-CH

V-GND
100/16V

VCR-Y
C779

0.01uF
SAT-Y

C746

C747
-5VV 0

AH VER. USE

13
ST+5V(VIDEO) ST+5V

470P

470P

470P
C726

C727

C728
10/50V

R568

R567
C VER. USE

75 1%

14
0

0
R748

R781
16 15 14 13 12 11 10 9 +5.6V

220P
D+5V

C781

15
DGND 4.7 D+12V D+12V

16
IC52
S-VIDEO(Y)

75 1%
220P

17
ST+5V(VIDEO)
R780
C780

0.01uF
C

100/16V

XM_R

XM_L
C749

C748
R729

16
1 2 3 4 5 6 7 8

1
C778 STB VDD
Y
CABLE/SAT IN SAT-C
4.7

100/16V
SAT-Y

VID4-Y

C729
DVD-Y
MONITOR
10/50V

IC54
JK51
CJJ9P004Z C776
SAT-CVBS

15
VID4_Y

2
DATA EN IC55
MONI-Y
DGND BH7862FS VIDEO
10/50V
SW4
75 1%
220P

R718 C718 L703


R777
C777

CN16
C.SW1 SCART_TV_SW SCART_TVSW
DVD_C

14

32
COUT CTRAP

1
SW3 CLK Q5
C 0.68uH

56p
C703
75 1% 0.1uF SQUEEZE

FROM MPEG PART


SAT-Y SQUEEZE

2
DVD_Y

31
Y

47p
R719

C719
TEST MUTE1

2
CVBS

75
VCR IN
DVD_CVBS

3
SW1 C.SW2
C704

13
4
SW5 Q1 Q6 GND

30
MIXOUT CTRAP

4
COM 100X4 0.1uF CHROMA

R704

75

5
VCR-C

29
COMP_SW1 MIXFB GND

4
SW2 SCART.M GND

4
12
5

6
Q2 Q7
C785 SW7 C705
VCR-Y

3
LUMA
REC-C

28
100X4 GND YIN

7
GND

2
10/50V 100/16V
+5VV SW1 SW1 C717 L717 BD71 +5VV

R705
75 1%

8
8

4
SW3 SW5
220P

75
R787
C787

SW5

11

27
YTRAP VCC

6
Q3 Q8 PR/R

1
R750 SW2 SW2 0.68uH 60

9
100/16V
7

3
56p

0.1uF
C702

C701
-5VV RN72 G ND

VCR_REC
4.7 SW3

26

10
V-GND
GND

7
2
100/16V

6
GND

VCR-C
0.01uF
C750
R752

C751
SW4 PB/B
SW4 Qs C715 C706

10

11
R715
75 1%

7
5

1
Q4
220P

R786
C786

DVD_Y

25
YOUT PYIN

8
4.7 GND

12
16 15 14 13 12 11 10 9 RN71 75 1% 100/16V 100/16V
C784
VCR-C C714 C706 : CCEA1CH101T Y/G

24

13
47p
R717

C716
GND
==> JUMPER

9
YFB

75
8

9
10/50V VSS Qs 22/50V GND
C707

14
IC53 L707
S-VIDEO(C)

0.01uF
C782

100/16V

23

10
COM

C753
VCR-CVBS PYTRAP

C752
GND

15
0.39uH

75(1%)

75(1%)

75(1%)
C713 22p
R713
10/50V

22

11

16
1 2 3 4 5 6 7 8 PYOUT VCC
75 1%
220P

0 100/16V
R783
C783

C708

17
C712 R708

SAT-C

VID4-C
DVD-C

21

12
MONITOR
PYFB PbIN

R721

R722
R720
MONI-C VID4_C 22/50V 100/16V 0
DVD_PY

20

13
GND GND

SAT-C SW4
R711 C711 C709 R709
ST+5V(VIDEO) DVD_PB

19

14
PbOUT PrIN
SW3
0 330/16V 100/16V 0
DVD_PR

18

15
DVD_C N.C MUTE2

R710 C710

R583

100
SW5

22/50V

22/50V

22/50V
C720

C721

C722
17

16
PrOUT PrTRAP

0 330/16V

R773 C772

75 1% 470/10V
A102S
C773

R754
22P

+5VV

JK53
R584

2.2/50V
4.7

220K
R582
C582
COM_Y_OUT

SAT_PB_IN
10/50V

RGB_Y_OUT
0.01uF
C754

C755

R771 C770 5.6K

DVD_Y/G_IN

DVD_PB_IN
CAB_PB_IN
SAT_PY_IN

Y/G_OUT
DVD_PY
COMPONENT OUT
Q583

PB_OUT
75 1%

CAB_Y/G_IN
470/10V
Y_IN
C771

COMP_SW1
22P

100K
DVD_PB

R585
16

15

14

13

12

11

10

SW1
+5VV SW7
Pr 16 15 14 13 12 11 10 9
DVD_PR
R769 C768

8
SAT_PR_IN

75 1% 470/10V 1 2 3 4 5 6 7 8
IC59 HVIPI5V330SWE
C769

22P

R756

22K

IC56 HVIPI5V330SWE
1 2 3 4 5 6 7 8
SW1
1

R577 C577
16 15 14 13 12 11 10 9
R_PR_OUT

C_PR_OUT

R_PB_OUT

C_PB_OUT

+5VV
PR_IN

PB_IN

COM RGB

9
16

15

14

13

12

11

10
1K 10/50V
Pb R723

PR_OUT
SW1 H L

DVD_PR_IN
R573

CAB_PR_IN
100K
R575
4.7

100/16V

0.01uF
C723

C724
5.6K
Q573
C766 D1304T

470/10V
DVD SAT
75 1%
C767

R767
22P

100K
R576
R574
SW1 H L
CABLE/SAT C764
5.6K
Q574
Y SAT_PR_IN
D1304T R578 C578
470/10V
75 1%
C765

R765
22P

1K 10/50V C761
SAT_PB_IN S-C

BN95

VIDEO 4
VID4_C

INPUT
C762 10/50V
SAT_PY_IN

2
470/10V C760
75 1%

S-Y
C763

R763

VID4_Y
22P

3
10/50V

4
C759
VID4_CVBS

5
10/50V COMPOSITE

R599
21
JK54

SQUEEZE
SCART_TV_SW

68
20

CVBS
100P

R598
C599

22K
19

L:CVBS OUT(0V~0.4V)

+5VV
18

H:RGB OUT(1V~3V) R596


17

10
Q596
RGB_SW
R597

10K

A102S
16
SCART OUTPUT

RED
15

RGB : L
CVBS : H
14

R595
C595 470/10V
13

75
12

GREEN R594
C594 470/10V
11

ST+5V(VIDEO)
75
10

R593
470/10V

C VER. ONLY
C593
IC60
9

75 KP1010B
TV_SW RGB : H
COMPONENT : L
8

R760 R757 3.3K R758

IR IN
BLUE

4
7

D+12V
270 100
R759
6

100P

100P

100P
C592

C591

C590

Q587 Q595 3.9K


5

C102S C102S

22/50V
2

C757
1.5K

1.5K
R589

R587
4

L-CH

0.1uF
C758
3

9.5V~12V : AV Mode Q757


R-CH 5V~8V : Widescreen 16:9 WIDE : H
4:3 : L A102S
10/50V
1

0V~2V : TV Mode(Not used)


C589

JK55
IR IN

** IMPORTANT SAFETY NOTICE.


COMPONENT IDENTIFIED BY MARK HAVE SPECIAL CHARACTERISICS.
IMPORTANT FOR SAFETY. WHEN REPLACING ANY OF THESE COMPONENTS
USE ONLY MANUFACTURER'S SPECIFIED PARTS.
** THE UNIT OF RESISTANCE IS OHM.
K = 1000 OHM. M = 1000KOHM.
** THE UNIT OF CAPACITANCE IS MICROFARAD(uF)
-6
pF = 10 uF
** THIS SCHEMATIC DIAGRAM MAY MODIFIED AT ANY TIME WITH THE
IMPROVEMENT OF PERFORMANCE.

2-61 2-62
XM & SUB-POWER PART

XM PART +5VX

AH VER. ONLY

22/50V
C511

C512

0.1uF
R N70
XM_MCLK MCLK DZFL

16
1
1

5
XM_LRLK

IC71
XM_BCLK BICK DZFR

15
2
4

8
22X4
XM_DATA SDTI VDD

14
3
+5VX

LRCK VSS

13
4

10/50V
R513

C516
10K

AK4384VT
PDN VCOM
)BTO01/37, 3

12
5
+8V

C513

0.1uF
SMUTE AOUTL C517 R519 C523 C527 XM-L

11
6
1.5K R525 0.001
10/50V 10/50V EUR:T 2.5A L 250V

R529

100
R523
MCU POWER PRAT

R521
3.3K

1K
3.3K
AOUTR USA:T 5A L 250V

R514
R 515 ACKS

FROM POWER TRANSFORMER


10
7
270p

330P
R517

C519
D991

0.022u
R995

10K
F991

100K
10K C525

R527
C529
0.0012
5 6 7 8 1 RLS4148SR

C521
DIFO P/S RY91

9
3 4

0.1uF

CN98

R992
1

RB160L60TE25

10
47/25V
22K
22K
22K
IC72

1SS355
XM_L

C995
D995

D992
R547
R549

R548

C547

0.0012
+3V3

C522
XM_R 2 1

C530

0.022u

R991
2

22
CSL1E002ZE
4 3 2 1

330P
R518

C520
10K
CN97

100K
R528
C526 +5.6V

0.1uF
C546
+8V

9
270p Q995

R526 R524
CN27

GND

8
POWER ON
100K
100K

C550
1

3.3K 3.3K XM-R

R530

R522
100
22/50V D996

1K
DAC_RST R555 0 1

KJJ7A013Z
P_DET
2

7
OLT2
C518 R520 C524 C528 C102S
XM_RST 1N4003 D993 D994

FROM AC OUTLET

22/50V
3

C996
48
47
46
45
44
43
42
41
40
39
38
37
R531
R551
R552

ST5.6V

6
DAC_MUTE R556 0 LSDP_TXRX HSDP_EN 22K 10/50V 1.5K 0.001 10/50V 2
R545

25 26 27 28 29 30 31 32 33 34 35 36
1
4

1N5819 1N4003
-8V
22K VSS VSS

VDD

VDD
SAII_EN

I2S_OCLK

IS2_SCLK
VSS

VSS

VSS
I2S_DATA
SAII_CLK
SAII_DATA

I2S_LRCLK
D-GND F992 D-GND

2
5

5
2

KJJ7A022Z
XM_TX R553 100 SC_TX_OUT HSDP_CLK R544 22K IC99

OLT1
3
6

KBA2D2500TLET
C531
AC39V

4
XM_RX VDD VDD C543 0.1uF
R554 100 T 2.5A L 250V D997
4
7

C VER. : J991 (EUR) +15V


1
0.1uF SC_RX_IN HSDP_DATA R543 22K AH VER. : J992(USA) AC 13V 1 IN OUT 3
AC5V
5

3
1N4003
IC70 3 4 KIA7806
VSS VSS

1000/25V

100/16V
0.01uF
6

XM+5.6V COMMON

C997

C992
C998

2
COMMAND SEL HVIXMDTIC TEST
R532 100K
2
7
13 COMMAND_RX_DIG
14 COMMAND_TX_DIG

C532 0.1uF VDD VSS


45.1584MHz
8

1
5
R533 AC5V

1SS133
IRQ# OSC_IN

D998
C3A206
L502

19 COMM_RX_M
9

22 COMM_TX_M
15 COMM_TXEN

AC CORD
18 COMM_RX_P

23 COMM_TX_P

J991
C542

4700P
10K VSS VDD D-GND

C999
CN99
12 11 10

45.1584MHz
Variable

1
R539 X501 HLZ9Z014Z
6 R996
RESET# OSC_OUT 0.1uF
17 VDD

20 VDD

1
16 VSS

21 VSS

24 VSS

10/50V

10/50V
0.1uF

0.1uF
SLAVE-SEL VSS 1

C504

C501
0

C541

C503

C502
180P
R540 J992
NOT USED 1 2 2
C3A206 R997
1000p

0.1uF

1M 7
C552

C551

2.7uH
L541
C539

C540

18p
18p
1

2
+3V3 +5VX R998
AC230V/50Hz(C) 8
22K
22K
22K

4.7/50V
1
AC120V/60Hz(AH) R990

6.8V

6.8V
CHGND

D999

D990
C994
0.1uF

0.1uF
C536

C537
R534

3.3M R999
R535

R536

IC50
1 9
L508 L505 FOR AH VER. ONLY
D505 1
T901
2 Out In 3
XM+5.6V CLT5L057ZW
HLZ9Z014Z HLZ9Z014Z 1SR159-200

GND
100/16V

100/16V
+3V3 1

C507

C505
C508

C506
0.1uF

0.1uF
RB160L60TE25
D563

R538
JK59

R561 22 0
R557

1K

500mA
XM BUS 1 L560
D- C559 R559
*option
2
D+ 0.1uF
10 0
1 2 3 4
3 C560 R560
0.1uF
C558
R558

1K

GND
100/16V
10/50V

DLW21HN121SQ2L
0.1uF

4 0.1uF
22p
C563

C565
C564

C562

100
C561

22p

R562 22
*option

*option

** IMPORTANT SAFETY NOTICE.


COMPONENT IDENTIFIED BY MARK HAVE SPECIAL CHARACTERISICS.
IMPORTANT FOR SAFETY. WHEN REPLACING ANY OF THESE COMPONENTS
USE ONLY MANUFACTURER'S SPECIFIED PARTS.
** THE UNIT OF RESISTANCE IS OHM.
K = 1000 OHM. M = 1000KOHM.
** THE UNIT OF CAPACITANCE IS MICROFARAD(uF)
-6
pF = 10 uF
** THIS SCHEMATIC DIAGRAM MAY MODIFIED AT ANY TIME WITH THE
IMPROVEMENT OF PERFORMANCE.

2-63 2-64
MPEG PART

2-65 2-66
4. PRINTED CIRCUIT BOARDS
FRONT BOARD before SN A9YVISOTWO06301

2-67 2-68
INPUT BOARD (TOP VIEW) before SN A9YVISOTWO06301

2-69 2-70
INPUT BOARD (BOTTOM VIEW) before SN A9YVISOTWO06301

2-71 2-72
AMP & VIDEO BOARD (TOP VIEW) before SN A9YVISOTWO06301

p ly e
u p abl ts
S ail en
b y v n
d r A o ly
a n ge mp al
St on Co idu
L r i v
o
N rd Ind e
O

2-73 2-74
AMP & VIDEO BOARD (BOTTOM VIEW) before SN A9YVISOTWO06301

p ly e
u p abl ts
S ail en
b y v n
d r A o
a n ge mp lly
St on Co dua
o
L r
e i v i
N rd nd
O I

2-75 2-76
MPEG BOARD (TOP VIEW)

2-77 2-78
MPEG BOARD (BOTTOM VIEW)

2-79 2-80
SECTION 3
ELECTRICAL PARTS LIST
0QVGU̒2CTVPWODGTUCTGKPFKECVGFHQTOQUVOGEJCPKECNRCTVU
2NGCUGWUGVJKURCTVPWODGTHQTRCTVUQTFGT
̒+/2146#065#('6;016+%'
%QORQPGPVUKFGPVKHKGFD[OCTMJCXGURGEKCNEJCTCEVGTKUVKEUKORQTVCPVHQTUCHGV[
9JGPTGRNCEKPICP[QHVJGUGEQORQPGPVUWUGQPN[OCPWHCEVWTG UURGEKHKGFRCTVU
̒6JGWPKVQHTGUKUVCPEGKU1*/

-
ೱ /
- ೱ
̒6JGWPKVQHECRCEKVCPEGKU/+%41(#4#&
v(
2v(

0WODGTKPI5[UVGOQH4GUKUVQT
6[RG 9CVVCIG 6QNGTCPEG
9
%
* 4& %CTDQP
9
%4) /GVCN1ZKFG 9 (r
-43 (WUG 9 ,r
%4( %GOGPV 9 -r
9
%4, %CTDQP%JKR
9

%4&  6, 6


6[RG 9CVVCIG 5JCRG6QNGTCPEG 8CNWG

0WODGTKPI5[UVGOQH%CRCEKVQT

6[RG 8QNVCIG 6QNGTCPEG


%%75 %GTCOKE%JKR ,8*8
%%-6 %GTCOKE4CFKCNV[RG #8,8 (r
*%3+ 2QN[GUVGT %8#8 ,r
%%'# 'NGEV '8 -r
*%$5 %GTCOKE#ZKCNV[RG 88

%%75 *  -%


6[RG 8QNVCIG 8CNWG 6QNGTCPEG2GEWNKCTKV[

4'(01 2#4601 &'5%4+26+10 4'/#4-5


2%$ %12$QNF 8+51691(41062%$#55 ; #*8'4`%
%72 2%$(41068+51691
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$- %/&# $4#%-'6(.6
$- %/&# $4#%-'6(.6
$- %/%# 2.#6')0&
$- %/%# 2.#6')0&
$- %/&# $4#%-'62%$
$0 %9$$'0 9+4'#55 ;
2//// 2////
$0 %9$$'0 9+4'#55 ;
2//// 2////
$0 %9$%'9 9+4'#55 ; 2////
$0 %9$%'9 9+4'#55 ; 2////
% %%$5*<(6 %#2%'4#/+% W(8<
% %%$5*<(6 %#2%'4#/+% W(8<
% %%$5*<(6 %#2%'4#/+% W(8<
% %%$5*<(6 %#2%'4#/+% W(8<
% %%'##-56 %#2'.'%6 W(8
% %%$5*<(6 %#2%'4#/+% W(8<
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
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2(8 %*72$-#$<
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% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*<(6 %#2%'4#/+%
2(8 %*72(<#$,
% %%$5*<(6 %#2%'4#/+%
2(8 %*72(<#$,
% %%$5*<(6 %#2%'4#/+%
2(8 %*72(<#$,
3-1
4'(01 2#4601 &'5%4+26+10 4'/#4-5
% %%$5*<(6 %#2%'4#/+%
2(8 %*72(<#$,
% %%'##-56 %#2'.'%6 W(8
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%'##-56 %#2'.'%6 W(8
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*-$6 %#2%'4#/+%
2(8 %*72$-#$<
% %%$5*<(6 %#2%'4#/+% W(8<
% *%3+*,<6 %#2/;.#4 W(8,
% *%3+*,<6 %#2/;.#4 W(8,
% %%'#*-546 %#2'.'%6 W(85/#..5+<'
% %%$5*<(6 %#2%'4#/+% W(8<
% %%$5*<(6 %#2%'4#/+% W(8<
%0 %,2)$<; 9#('4#0).'
2+0
%0 %,2)$<; 9#('4
%0 %,2)#<; 9#('4%#4&%#$.'
%0 %,2)#<; 9#('4%#4&%#$.'
%0 %,2)$<; 9#('4#0).'
2+0
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%0 %,2)#<; 9#('4564#+)*6
%0 %,2)$<; 9#('4
& %8&55/6 &+1&' 55
& %8&55/6 &+1&' 55
& %8&.#$/# .'&%1.14
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& %8&55/6 &+1&' 55
& %8&55/6 &+1&' 55
& %8&55/6 &+1&' 55
& %8&55/6 &+1&' 55
(. %(.$6)+0- 8(& $6%+0-
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3 *86-4%/6 64 -4%/
3 *86-6%;6 64 -6%;
3 *86-4#/6 64 -4#/
3 *86-4%/6 64 -4%/
3 *86-4#/6 64 -4#/
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4 %# 9+4'%122'4
4 %4&6,6 4'5%#4$10 1*/9,
4 %4&6,6 4'5%#4$10 1*/9,
4 %4&6,6 4'5%#4$10 -1*/9,
4 %4&6,6 4'5%#4$10 -1*/9,
4 %4&6,6 4'5%#4$10 1*/9,
4 %4&6,6 4'5%#4$10 1*/9,
4 %4&6,6 4'5%#4$10 1*/9,
4 %4&6,6 4'5%#4$10 -1*/9,
4 %4&6,6 4'5%#4$10 -1*/9,
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4 %# 9+4'%122'4
4 %4&6,6 4'5%#4$10 1*/9,
4 %4&6,6 4'5%#4$10 1*/9,
4 %4&6,6 4'5%#4$10 -1*/9,
4 %4&6,6 4'5%#4$10 -1*/9,
4 %4&6(6 4'5%#4$10 -9(
4 %4&6(6 4'5%#4$10 -9(
4 %4&6(6 4'5%#4$10 -9(
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5 %56#<6 596#%6
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84 %54#< 84'0%1&'4
2%$ %12$QNF 8+51691+02762%$#55 ; #*8'4`%
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QJO *%$-(6
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QJO *%$-(6
$0 %9<8+51691$0 5*+'.&9+4'#55 ;
2//// 2////
$0 %9<8+51691$0 5*+'.&9+4'#55 ;
2//// 2////
$0 %9<8+51691$0 5*+'.&9+4'#55 ;
2//
$0 %9$&$/ 9+4'#55 ; 2////
% %%75*,# %#2%*+2 2(8,
% %%75*,# %#2%*+2 2(8,
% *%3+*,<6 %#2/;.#4 2(8,
% *%3+*,<6 %#2/;.#4 2(8,
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% %%'##*6 %#2'.'%6 W(8
% %%75*-% %#2%*+2 W(8-
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% %%75*,# %#2%*+2
2(8%1) 2(8,
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2//// 2////
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