Infineon TLI4971 A120T5 E0001 DataSheet v01 - 01 EN
Infineon TLI4971 A120T5 E0001 DataSheet v01 - 01 EN
Infineon TLI4971 A120T5 E0001 DataSheet v01 - 01 EN
Datasheet Please read the Important Notice and Warnings at the end of this document Revision 1.1
www.infineon.com 09-03-2020
TLI4971
Datasheet
Pin Configuration
Pin configuration
IPN Pin No. Symbol Function
1 VDD Supply voltage
8 2 GND Ground
7 Reference voltage input or
3 VREF
1 output
3 2
6 5 4 4 AOUT Analog signal output
Over-current detection
5 OCD1 output 1 (open drain
output)
Figure 1 Pin layout PG-TISON-8-5 Over-current detection
The current IPN is measured as a positive value 6 OCD2 output 2 (open drain
when it flows from pin 8 (+) to pin 7 (-) through the output)
integrated current rail. Negative current terminal
7 IP-
pin (current-out)
Positive current terminal
8 IP+
pin (current-in)
Target Applications
The TLI4971 is suitable for AC as well as DC current measurement applications:
Electrical drives
Current monitoring
Photovoltaic & general purpose inverters
Overload and over-current detection
Chargers
etc.
Due to its implemented magnetic interference suppression, it is extremely robust when exposed to external
magnetic fields. The device is suitable for fast over-current detection with a configurable threshold level.
This allows the control unit to switch off and protect the affected system from damage, independently from
the main measurement path.
General Description
The current flowing through the current rail on the primary side induces a magnetic field that is differentially
measured by two Hall probes. The differential measurement principle of the magnetic field combined with
the current rail design provides superior suppression of any ambient magnetic stray fields. A high
performance amplifier combines the signal resulting from the differential field and the internal compensation
information provided by the temperature and stress compensation unit. Finally the amplifier output signal is
fed into a differential output amplifier which is able to drive the analog output of the sensor.
Depending on the selected programming option, the analog output signal can be provided either as:
Single-ended
Fully-differential
Semi-differential
In single-ended mode, the pin VREF is used as a reference voltage input. The analog output signal is provided
on pin AOUT. In fully-differential mode, both AOUT (positive polarity) and VREF (negative polarity) are used
as signal outputs whereas VDD is used as reference voltage input. Compared to the single-ended mode, the
fully-differential mode enables doubling of the output voltage swing.
In semi-differential mode a chip-internal reference voltage is used and provided on VREF (output). The
current sensing information is provided in a single-ended way on AOUT.
For fast over-current detection, the raw analog signal provided by the Hall probes is fed into comparators
with programmable switching thresholds.
A user-programmable deglitch filter is implemented to enable the suppression of fast switching transients.
The open-drain outputs of the OCD pins are active “low” and they can be directly combined into a wired-AND
configuration on board level to have a general over-current detection signal.
All user-programmable parameters such as OCD thresholds, deglitching filter settings and output
configuration mode are stored in an embedded EEPROM memory.
Programming of the memory can be performed in the application through a Serial Inspection and
Configuration Interface (SICI). The interface is descripded in detail in the programming guide which can be
found on the Infineon webside. Please contact your local Infineon sales office for further documentation.
Block Diagram
The current flowing through the current rail on the primary side induces a magnetic field, that is measured by
two Hall probes differentially. The differential measurement principle provides superior suppression of any
ambient magnetic stray fields. A high performance amplifier combines the signal resulting from the differential
field and the compensation information, provided by the temperature and stress compensation unit. Finally
the amplifier output signal is fed into a differential output amplifier, which is able to drive the analog output
of the sensor.
Infrastructure VDD
IP+ (power, clk, references)
GND
Integrated
current rail Bias signal f or EEPROM
Diagnosis Mode
Referen ces OCD1
OCD2
VREF
Temp
MUX
Stress Output
Offset
IP-
Stress above the limit values listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute
ratings. Exceeding only one of these values may cause irreversible damage to the integrated circuit.
Product Characteristics
Table 2 Operating Ranges
General conditions (unless otherwise specified): VDD = 3.3V; TS = -40°C … +105°C
Parameter Symbol Min. Typ. Max. Unit Note / Test Condition
Supply voltage VDD 3.1 3.3 3.5 V
Ambient temperature at Measured at
TS -40 - 105 °C
soldering point soldering point
Capacitance on analog W/o decoupling resistor, including
CO 4.7 6.8 8 nF
output pin parasitic cap on the board
Capacitor on VDD CVDD - 220 - nF
Default value is
semi-differential mode.
Reference input voltage VREF - 1.65 - V
Other values available by EEPROM:
1.2V, 1.5V, 1.8V
Reference input voltage
VREF_var -10 - 10 %
variation
EEPROM programming
VIO_PRG 20.5 - 20.7 V
voltage
Single-ended
Fully-differential
Semi-differential In this mode, the quiescent voltages and the
sensitivity are both ratiometric with respect to VDD
Single-Ended Output Mode if ratiometricity is enabled.
In single-ended mode VREF is used as an input pin Semi-Differential Output Mode
to provide the analog reference voltage, VREF. The
voltage on AOUT, VAOUT, is proportional to the In semi-differential output mode, the sensor is
measured current IPN at the current rail: using a chip-internal reference voltage to generate
the quiescent voltage that is available on pin VREF
(used as output).
The quiescent voltage VOQ is the value of VAOUT when The analog measurement result is available as
IPN=0. VOQ tracks the voltage on VREF single-ended output signal on AOUT. The
dependence of sensitivity and output offset on
reference voltage is the same as described in single-
The reference voltage can be set to different values ended output mode.
which allow either bidirectional or uniderictional The quiescent voltage is programmable at 3
current sensing. The possible values of VREFNOM are different values, VOQbid_1 and VOQbid_2 for
indicated in Table 2. bidirectional current and VOQuni for unidirectional
The sensitivity is by default non ratiometric to VREF. current (see Table 4).
If ratiometricity is activated the sensitivity becomes
as follows:
Total error distribution
Figure 3 shows the total output error at 0h (ETOTT)
and over lifetime (ETOTL) over the full scale range for
sensitivity range S1 (10mV/A).
Fully-Differential Output Mode Current [%FS]
Irail
2 x I THR
ITHR
1 2 3
t
Glitch
counter
threshold
t
ΔtD_OCDx
VOCD
VDD
0.5 x V DD
Isolation Characteristics
TLI4971 conforms functional isolation.
Table 8 Isolation Characteristics
Parameter Symbol Min Typ Max Unit Note / Test Conditions
Maximum rated working
VIOWM - - 690 V RMS, @ 4000m altitude
voltage (sine wave)1)2)3)
Maximum rated working
VIOWMP - - 975 V Peak, @ 4000m altitude
voltage (sine wave)1)2)3)
Maximum repetitive Max DC voltage, spike,
VIORM - - 1150 V
isolation voltage2)3) @ 4000m altitude
Apparent charge voltage Partial discharge < 5pC peak
VPDtest 1500 - - V
capability (method B)2)3) @ 0m altitude
Isolation test voltage3)4) VISO 2500 - - V RMS, 60s
RMS, in production,
VISOP 3000 - - V
Isolation production test 1.2s, UL certified version
voltage RMS, in production, 600ms,
VISOP 2470 - - V
Non-UL certified version
Peak, rise time = 1.2µs,
Isolation pulse test voltage3) Vpulse 4500 - - V
fall time = 50µs
Minimum external creepage
CPG 4 - - mm
distance
Minimum external clearance
CLR 4 - - mm
distance
Minimum comparative Material
CTI - - -
tracking index group II
Isolation resistance3) RIO 10 - - GΩ UIO = 500V DC, 1min
1) The given value is considered an example based on pollution degree 2.
2) After stress test according to qualification plan.
3) Not subject to production test - verified by design and characterization.
4) Agency type tested for 60 seconds by UL according to UL 1577 standard.
System integration
VCC_IO VCC_IO VDCLink
AOUT
OCD1
OCD2
VREF
Driver 25V GND
µC PGND
VCC_IO VCC_IO
VAREF
EN VAREF
VAREF
4k7Ω 4k7Ω
1kΩ
1nF
GPIO
25V
1nF 6.8nF 220nF
1kΩ
220Ω 50V 25V 25V
A/D
A/D
220Ω
A/D
220Ω
A/D
VREF
Driver 25V
GND
µC PGND
1nF
GPIO
25V
1nF
A/D
220Ω 50V
A/D 220Ω
A/D 220Ω
A/D 220Ω
A/D 220Ω
A/D 220Ω
15nF 15nF 15nF 15nF 15nF 15nF 6.8nF 6.8nF 6.8nF 6.8nF 6.8nF 6.8nF
25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V
VSens VCC_IO
VDD VCC
220nF 4k7Ω 4k7Ω GND
GND GND
TLI4971 µC
220Ω
VREF A/Din
220Ω
AOUT A/Din
OCD1 INTN
OCD2 INTN
6.8nF 6.8nF 1nF 1nF 15nF 15nF
25V 25V 25V 50V 25V 25V
For bandwidth limitation an external filter is recommended as shown in the above application circuits.
Package
The TLI4971 is packaged in a RoHS compliant, halogen-free leadless package (QFN-like).
|0.2|
0.1 A 0.1 A
STANDOFF
0.05 MAX
2.32 0.6
0.1 A 0.25
0.25
B 0.25 0.30 0.30
A 7 8
1.41
1.13
0.4
1.63
0.1 B
2.75
3.0
0.4
0.1 B
8
4.2
0.55
0.8
6 1.0 1.0 8x 1
0.1 M A
INDEX MARKING 1.1 MAX. 1.4
0.4
2.26
1.61
R0.20
R0.30
R0.20 R0.30
0.60 0.60
Revision History
Major changes since the last revision
Date Description of change
10-02-2020 Initial version
09-03-2020 Pre-configured OCD threshold levels changed / Page3, Table 6 and Table 7
Standard Product Configuration updated on Page 3 / OCD settings according to Table 6 and Table 7
Updated Table 8, isolation characteristics
Updated application circuits
Editorial changes
Revision update 1.1
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Edition 09-03-2020 The information given in this document shall in no For further information on the product, technology,
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Published by characteristics (“Beschaffenheitsgarantie”) . contact your nearest Infineon Technologies office
(www.infineon.com).
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81726 München, Germany values stated herein and/or any information
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intended application and the completeness of the
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respect to such application.