Lenovo Legion 5-15IMH05H - LCFC NM-C921 Rev 1.0

A B C D E
LCFC NM-C921
1 1
om
Y550 M/B Schematics Document
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ck
lo
2 2
Comet Lake H-Processor with DDR4 + NV N18P-G61/G62 GPU
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st
fa
2019-12-16
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ru
REV:1.0
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3 3
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4 4
Security Classification
Classification LC Future Center Secret Data Title
Issued Date 2018/08/02 Deciphered Date 2018/08/02 Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Y550
Date: Wednesday, January 15, 2020 Sheet 1 of 83
A B C D E
A B C D E
VBIOS
W25Q80
8M
Page 28
nVidia N18P-G61/G62
HDMI Conn.
1
Page 42 PCI-Express 16X Gen3 Memory BUS (DDR4 non-ECC) 1
Channel B DDR4-SO-DIMM x1
GDDR6*4 4GB eDP x4 Lane
Intel CPU Page 12
Comet Lake H 45W 1.2V DDR4 2933MT/s TBD

Page 31~34 UP TO 16G x 1
Memory BUS (DDR4 non-ECC)
BGA-1440 Channel A
DP x4 Lane eDP Conn
eDP x4 Lane MUX
eDP x4 Lane
42mm*28mm DDR4-SO-DIMM x1
FHD Page 13
5.4Gbps PS8331B 1.2V DDR4 2933 MT/s TBD
Page 41 Page 39 Page 5~11
sw
UP TO 16G x 1
USB redriver DMI *4
+ Switch
PS8747 USB 3.1 1x
USB Type-C EDP_SW USB Right Page 55
Conn.
Page 44 USB3.1 Port2 USB20 Port10 SUB-Board
USB2.0 1x
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Page 45 Card Reader For 17'
USB3.1 Port4 USB 3.0 1x 5Gbps PCIe 1x PCIe Port 15
TypeC PDC
CC Logic RTS5457T HDD Conn.
SATA Gen3 Intel PCH USB3.1 1x
.c
Page 49
2 Page 48 SATA Port3 USB Left 2
Page 43 USB2.0 1x USB3.1 Port3 USB2.0 Port1
ck
SSD M.2 Conn.
PCIe 4x Gen3
Comet Lake H
/Optane Memory
SATA Gen3 Page 50
USB Back port 1
lo
Page 46 PCIe Port 9-12 USB3.1 2x
USB3.1 Port1 USB2.0 Port0
PCIe 4x Gen3
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SSD M.2 Conn. USB2.0 2x Page 51
USB Back port 2
USB3.1 1x /Optane Memory FCBGA USB3.1 Port5 USB2.0 Port 10
USB IO board SATA Gen3 26mm*24mm
USB3.1 1x
st
USB3.1 Port2 USB2.0 Port2 Page 46 PCIe Port 17-20
PCIe 1x Page 53
Card Reader For 17' USB2.0 1x
fa
LAN Realtek PCIe 1x EC IT8176 int. keyboard
PCIe Port 15 RJ45 Conn. RTL8111H-CG USB2.0 Port9
Page 57 Page 56
s-
PCIe Port14
Page 55 USB 2.0 1x M.2 Card (WLAN&BT)
Int. Camera USB2.0 1x
Page 41 USB2.0 Port6 PCIe 1x
m
PCIe Port13 USB2.0 Port14
HD Audio
CNVio
IIC M.2 CRF Module
3
USB2.0
ru Page 24~30
Page 47
3
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LPC
SPI BUS SPI ROM
SPK Conn. Codec
Page 58 ALC3287 16MB
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Page 18
Page 58
SMBUS EC TPM
w
int. DMIC conn ITE IT8227-LQFP128 SLB9670VQ2.0

Page 55 Page 52 Reserved
w
Page 55
Sub-board
HP&Mic Combo Conn.
Page 58 USB3.1 x1 DB
Touch Pad G-sensor Battery Thermal Sensor Thermal Sensor CPU FAN
Reserved F75303M F75303M GPU FAN USB3.1 x1 DB
Page 55 Page 59 Page 66 Page 60 Page 60 Page 60 Cardreader X1 For 17'
POWER BUTTON DB
RGB KB conn For 17'
for RGB SKU

USB2.0 Port7 Page 63
4
MIC board For PRC SKU
4
Security Classification LC Future Center Secret Data Title
Issued Date 2018/08/02 Deciphered Date 2018/08/02 Block Diagram

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
Y550 1.0
Date: Tuesday, January 14, 2020 Sheet 2 of 83

A B C D E
A B C D E
Voltage Rails ( O --> Means ON , X --> Means OFF )

SIGNAL
+5VS STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
+3VS
Power Plane Full ON HIGH HIGH HIGH HIGH ON ON ON ON
VCCIO
VCCSA S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
1
VCCSTG 1
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+3VALW
VCCCPUCORE S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
B+ +3VALW_PCH +1.2V VCCGFXCORE
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+5VALW +1.8VS_AON
+1.8VGS
State BOM Structure Control Table
NVVDD
+1.0VGS
BOM Structure BTO Item BOM Structure BTO Item
@ Not stuff USB@ USB2.0 port1 for USB Port
FBVDDQ 15@ 15'' Stuff NPI@ NPI stage stuff
17@ 17'' stuff DCI@ DCI
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i5@i7@i9@ CPU Part Debug@ USB2.0 port 1for Debug
S0 O O O O O PRC@ PRC TPM@ For support TPM sku part
WW@ Worldwide GS@ Reserved for G-sensor
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OPT@ NV GPU part OPTANE@ For Optane SKU stuff
S3 O O O O X M4GX4@S4GX4@ VRAM part MIRROR@ MIRROR
ck
2 N18PG61@ N18PG61 PART NOMIRROR@ No MIRROR 2
N18PG62@ N18PG62 PART ME@ ME part(connector)

S3
O O O O X
lo
GYSNC@ GSYNC support part EMC@ EMC part
Battery only
DDS@ Dynamic Display Switch part EMC_NS@ EMC not stuff
un
MUX@ EDP MUX Switch part RF@ RF part
MUX1@ Colay DDS and MUX RF-NS@ RF No part
S5 S4/AC Only O O O X X
st
HDMI@ HDMI logo CD@ Cost down part
CNVI@ CNVi support part UP9632_@ UP9632 part stuff
fa
S5 S4 8111GUL@ LAN Chip 8111GUL part
Battery only O X X X X 8111H@ LAN Chip 8111H part
s-
EMC_8111H@ LAN 8111H EMC Part
S5 S4 AG@ Anti-ghost Part
m
AC & Battery X X X X X BL@ BL Part
don't exist
ru
RGB@ RGB Part
.fo MP@ Mass Production Stage Part
3 3
w
USB2.0 Port table USB3.0 Port table SATA Port table PCIE Port table
w
Port Function Port Function Port Function Port Function

w
1 Back USB3.0 1 Back USB3.0 0A NA 1:8 NA

2 Left USB3.0 2 Right USB3.0(DB) 0B NA 9:12 M.2 SSD/Optane
3 Right USB3.0 3 Left USB3.0 1A NA 13 WLAN Gen1
4 Type-C Port 4 Type-C Port 1B NA 14 LAN Gen1
5 NA 5 Back USB3.0 2 NA 15 Card Reader
6 Camera 6 NA 3 HDD Gen3 17:20 M.2 SSD/Optane
7 RGB 4 NA
8 NA 5 NA
4 4
9 AG 7 NA
10 Back USB3.0
11:13 NA Security Classification LC Future Center Secret Data Title
Issued Date 2018/08/02 Deciphered Date 2018/08/02 Notes List

14 BT THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
A B C D E
5 4 3 2 1
+3VS
thermal sensor
2.2K
+3VALW
PD Controller AG Controller RGB SML0CLK
SML0DATA
RTS5457 IT8176
2.2K
UT2 UI22 +3VS
Dual MOS Control
D D
EC_SMB_CK0
EC_SMB_DA0
m
+3VALW_R
co
Change IC NVDD controller Vcore controller
Battery BQ24780SRUYR NCP81611 MP2979A
JBATT1 PU101 PU7501 PU2901
k.
2.2K
oc
EC
l
un
EC_SMB_CK1
EC_SMB_DA1
C C
+1.8VS_AON +3VALW_PCH
st
UE1
IT8227E
fa
2.2K 2.2K
s-
VGA( UV1 ) PCH( UH1 )
m
+3VS Thermal sensor
VGA_SMB_CK2 SML1CLK
VGA_SMB_DA2 SML1DATA F75303M G-Sensor
ru
+1.8VS_AON +3VS US1 LIS2DWLTR
2.2K
Dual MOS Control Dual MOS Control US2
.fo
EC_SMB_CK2
w
EC_SMB_DA2
w
w
B B
+3VS
SMBUS Control Table

+1.8VS_AON
SOURCE VGA BATT IT8226E SODIMM WLAN Thermal PCH TP Charger RGB KB USB-C HiFi Audio Anti-ghost 2.2K
WiMAX Sensor Module Backlight PD
PANEL
EC_SMB_CK0 IT8226E
X X X X X X X X X X V X V 2.2K GPU_I2CB_SCL
EC_SMB_DA0 +3VALW
+5VS +3VALW_AG
VGA GPU_I2CB_SDA
EC_SMB_CK1 IT8226E
X V V X X X X X V X X X X
EC_SMB_DA1 +3VALW_R +3VALW_R +3VALW_R +3VALW_R Dual MOS
EC_SMB_CK2 IT8226E V X V X X V V X X X X X X
+3VS
EC_SMB_DA2 +3VS +1.8VS_AON +3VS Reserve +3VALW_PCH I2CB_SCL
PCH_SMBCLK
UV1 I2CB_SDA
PCH
X X X V X X X V X X X X X
PCH_SMBDATA
PCH_RGBKB_SCL
+3VALW_PCH +3VS +3VS N18P-G61 G62
X X X X X X X X X X V X X X
PCH_RGBKB_SDA +LDO_3V3
EC_SMB_CK0 IT8226E
+3VALW
X X X X X X X X X X V X X
EC_SMB_DA0 +5VS
A A
EC SM Bus1 address EC SM Bus2 address PCH SM Bus address PCH I2C 2 Bus address
Device Address Device Address
Device Address Device Address
DDR DIMMA 1010 000X b RGB Backlight Need to update
Smart Battery 0X16 Thermal Sensor F75303M 1001_100x b
DDR DIMMB 1010 010X b
Charger 0001 0010 b VGA 0x9E (default)
TP Module Need to update
PCH Need to update
Wlan Reserved
Thermal Sensor NCT7718W 1001100xb Title
Security Classification LC Future Center Secret Data
Issued Date 2018/08/02 Deciphered Date 2018/08/02 I2C Block
D 1.0
5 4 3 2 1
5 4 3 2 1
25 PCIE_CRX_GTX_N[0..15]
25 PCIE_CRX_GTX_P[0..15]
PCIE_CTX_C_GRX_N[0..15] 25
PCIE_CTX_C_GRX_P[0..15] 25
D D
UC1C
PCIE_CRX_GTX_P15 E25 B25 PCIE_CTX_GRX_P15 OPT@ CC32 1 2 0.22U_0201_6.3V6-K PCIE_CTX_C_GRX_P15
PCIE_CRX_GTX_N15 D25 PEG_RXP_0 PEG_TXP_0 A25 PCIE_CTX_GRX_N15 OPT@ CC16 1 2 0.22U_0201_6.3V6-K PCIE_CTX_C_GRX_N15
PEG_RXN_0 PEG_TXN_0
PCIE_CRX_GTX_N14 F24 PEG_RXP_1 PEG_TXP_1 C24 PCIE_CTX_GRX_N14 OPT@ CC15 1 2 0.22U_0201_6.3V6-K PCIE_CTX_C_GRX_N14
PEG_RXN_1 PEG_TXN_1
PEG_RXN_2 PEG_TXN_2
PEG_RXN_3 PEG_TXN_3
PCIE_CRX_GTX_P11 PCIE_CTX_GRX_P11 OPT@ PCIE_CTX_C_GRX_P11
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E21 B21 CC28 1 2 0.22U_0201_6.3V6-K
PEG_RXN_4 PEG_TXN_4
PEG_RXN_5 PEG_TXN_5
.c
PEG_RXN_6 PEG_TXN_6
k
C PEG_RXN_7 PEG_TXN_7 C
oc
PCIE_CRX_GTX_P7 D17 A17 PCIE_CTX_GRX_P7 OPT@ CC24 1 2 0.22U_0201_6.3V6-K PCIE_CTX_C_GRX_P7
PCIE_CRX_GTX_N7 E17 PEG_RXP_8 PEG_TXP_8 B17 PCIE_CTX_GRX_N7 OPT@ CC8 1 2 0.22U_0201_6.3V6-K PCIE_CTX_C_GRX_N7
PEG_RXN_8 PEG_TXN_8
PCIE_CRX_GTX_P6 F16 C16 PCIE_CTX_GRX_P6 OPT@ CC23 1 2 0.22U_0201_6.3V6-K PCIE_CTX_C_GRX_P6
PCIE_CRX_GTX_N6 PEG_RXP_9 PEG_TXP_9 PCIE_CTX_GRX_N6 PCIE_CTX_C_GRX_N6
l
E16 B16 OPT@ CC7 1 2 0.22U_0201_6.3V6-K
PEG_RXN_9 PEG_TXN_9
un
PEG_RXN_10 PEG_TXN_10
st
PCIE_CRX_GTX_N3 E13 PEG_RXP_12 PEG_TXP_12 B13 PCIE_CTX_GRX_N3 PCIE_CTX_C_GRX_N3
fa
OPT@ CC4 1 2 0.22U_0201_6.3V6-K
s-
m
VCCIO PCIE_CRX_GTX_N0 E10 PEG_RXP_15 PEG_TXP_15 B10 PCIE_CTX_GRX_N0 OPT@ CC1 1 2 0.22U_0201_6.3V6-K PCIE_CTX_C_GRX_N0
ru
RC1 2 1 24.9_0402_1% PEG_COMP G2
PEG_RCOMP
Note:
Place R_comp inside CPU cavity
Trace width>=12 mils ,Min Spacing>15mil
.fo
DMI_CRX_PTX_P0 D8 B8 DMI_CTX_PRX_P0
B
Max length<400 mils. 19 DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 E8 DMI_RXP_0 DMI_TXP_0 A8 DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 19 B
19 DMI_CRX_PTX_N0 DMI_RXN_0 DMI_TXN_0 DMI_CTX_PRX_N0 19
w
DMI_CRX_PTX_P1 E6 C6 DMI_CTX_PRX_P1
19 DMI_CRX_PTX_P1 DMI_CRX_PTX_N1 F6 DMI_RXP_1 DMI_TXP_1 B6 DMI_CTX_PRX_N1 DMI_CTX_PRX_P1 19
w
DMI_CRX_PTX_P2 D5 B5 DMI_CTX_PRX_P2
19 DMI_CRX_PTX_P2 DMI_CRX_PTX_N2 E5 DMI_RXP_2 DMI_TXP_2 A5 DMI_CTX_PRX_N2 DMI_CTX_PRX_P2 19
w
DMI_CRX_PTX_P3 J8 D4 DMI_CTX_PRX_P3
19 DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 J9 DMI_RXP_3 DMI_TXP_3 B4 DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 19
COMETLAKE-H-CPU_BGA1440
@ 3 OF 13
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (1/7) DMI,PEG

Custom 1.0
5 4 3 2 1
5 4 3 2 1
UC1E
17 PCH_CPU_BCLK
17 PCH_CPU_BCLK#
RC28 1
RC29 1
2@ 0_0402_5%
2@ 0_0402_5%
CPU_BCLK
CPU_BCLK#
B31
A32 BCLKP
BCLKN
CFG_0
CFG_1
BN25
BN27
BN26
CFG0
CFG1 @
CFG2
PAD 1
TC89
CFG STRAPS for CPU
CPU_PCIBCLK CFG_2
VCCST 17 PCH_CPU_PCIBCLK
RC15 1 2@ 0_0402_5%
CPU_PCIBCLK#
D35
PCI_BCLKP CFG_3
BN28 CFG3
CFG3 61 Stall reset sequence after PCU PLL lock until de-asserted
RC13 1 2@ 0_0402_5% C36 BR20 CFG4
17 PCH_CPU_PCIBCLK# PCI_BCLKN CFG_4 BM20 CFG5  1 Default Normal eration
17 PCH_CPU_NSSC_CLK
RC17 1 2@ 0_0402_5% CPU_NSSC_CLK
CPU_NSSC_CLK#
E31
CLK24P
CFG_5
CFG_6
BT20 CFG6 * No stall
RC16 1 2@ 0_0402_5% D31 BP20 CFG7
17 PCH_CPU_NSSC_CLK# CLK24N CFG_7 BR23 CFG0
1
CFG_8
1 CFG_9
BR22  0 Stall
CC186 RC66 RC76 BT23
0.1U_0201_6.3V7-K 100_0402_1% 56.2_0402_1% CFG_10 BT22
CFG_11 BM19
2
@
CFG_12 Reserved configuration lane
BR19 CFG13 @ PAD 1
TC82
2
D CFG_13 BP19 CFG14 @ PAD 1 D
1 2 VR_SVID_ALRT#_R BH31 CFG_14 BT19 1 TC83
RC65 220_0402_5% CFG15 @ PAD
72 SVID_ALERT# VR_SVID_CLK VIDALERT# CFG_15 TC84
72 SVID_CLK
RC3 1 2 0_0402_5%
VR_SVID_DAT
BH32
VIDSCK CFG1 N/A
RC14 1 2 0_0402_5% BH29 BN23
72 SVID_DATA H_PROCHOT#_R VIDSOUT CFG_17
52,72 H_PROCHOT# RC9 1 2 499_0402_1% BR30 BP23
PROCHOT# CFG_16 BP22
RC7 1 2 1K_0201_5% CC178 1 2 .1U_0402_10V6-K DDR_PG_CTRL BT13 CFG_19 BN22
VCCSTG DDR_VTT_CNTL CFG_18
@ PCI ress Static 1 Lane Numbering Reversal






















BR27 @ PAD 1
BPM#_0 TC27
BT27 @ PAD 1
BPM#_1 BM31 1 TC28
@ PAD




























VCCST_PWRGD H13 BPM#_2 BT30 @ PAD 1
TC29 CFG2
VCCST_PWRGD BPM#_3 TC42
16
H_CPUPWRGD
RC32 1 2 1/20W_22_5%_0201 CPUPWRGOOD_R
BUF_CPU_RST#
BT31
PROCPWRGD
*
RC22 1 2 1/20W_22_5%_0201 BP35 BT28
14
CPU_PLTRST# H_PM_SYNC BM34 RESET# PROC_TDO BL32 PROC_TDO 61
14 H_PM_SYNC H_PM_DOWN_R PM_SYNC PROC_TDI PROC_TDI 61 Reserved configuration lane
RC33 1 2 20_0402_5% BP31 BP28
14 H_PM_DOWN EC_PECI_R PM_DOWN PROC_TMS PROC_TMS 61
RC763 1 2@ 0_0402_5% BT34 BR28
14,52 EC_PECI PECI PROC_TCK PROC_TCK 61
RC764 1 2@ H_THRMTRIP#_R J31
14,25 H_THRMTRIP# THERMTRIP#
0_0402_5% BP30 N/A
VCCST RC11 1 2 1K_0402_5% BR33 PROC_TRST# BL30 PROC_TRST# 61 CFG3
SKTOCC# PROC_PREQ# PROC_PREQ# 61
BN1 BP27
PROC_SELECT# PROC_PRDY# PROC_PRDY# 61
RC174 1 @ 2 10K_0402_5% H_CATERR# BM30
CATERR# BT25
CFG_RCOMP eDP enable
AT13
100P_0402_50V8J
100P_0402_50V8J
ZVM#
2
.1U_0402_10V6-K
1 1 1 AW13
MSM#
CC177
need double confirm if need staff and 1%  1 Disabled
CC175
CC176
om
AU13 RC175
AY13 RSVD_AU13 49.9_0402_1%
2 2 2@ RSVD_AY13 CFG4  0 nabled
*
1
5 OF 13 close to CPU
+3VALW COMETLAKE-H-CPU_BGA1440 PCI ress Bifurcation

+3VS
.c
@
C  00 1 8 PCI ress C
UC1M
CFG[6:5]
2
 01 reserved
k
RC177 RC178
+1.2V 100K_0402_5% 100K_0402_5% E2 VCCST  10 8 PCI ress
RSVD_TP5
oc
@ 1 PAD @ E3
TC111 E1 IST_TRIG
11 1 1 PCI ress
*
1
D1 RSVD_TP4
1
SM_PG_CTRL RSVD_TP3
SM_PG_CTRL 69
1
RC18 BR1 BK28 P G Training
1K_0402_5% BT2 RSVD_TP1 RSVD11 BJ28 RC57
nl
RSVD_TP2 RSVD10 51_0402_5%
*
1
C BN35 @  1 default P G Train immediately

2
2 QC1 RSVD15
following R S T# deassertion
2
B MMBT3904WH_SOT323-3 J24
u
RSVD28
H24 CFG7  0 P G Wait for BI S for training
3
BN33 RSVD27
DDR_PG_CTRL BL34 RSVD14 PROC_PREQ#
st
RSVD13
N29 Reserved configuration lane
R14 RSVD30
VCCSTG
2
RSVD31
fa
AE29
RSVD_AE29
RC179
10K_0402_5%
AA14
AP29 RSVD_AA14 CFG[19:8] N/A
@ AP14 RSVD5
RSVD4
2
A36
s-
1
VSS_A36 RC78
A37 51_0402_1%
Debug Pin VSS_A37 @
Logic Buffer CPU_TRIGIN H23
m
22 CPU_TRIGIN
1
PCH_TRIGIN RC4 1 2 30_0402_5% CPU_TRIGOUT J23 PROC_TRIGIN
22 PCH_TRIGIN PROC_TRIGOUT
1 F30
CC174 RSVD24 PROC_TDO
ru
.1U_0402_10V6-K
@ E30
2 RSVD23
B B
.fo
B30 BL31
C30 RSVD7 RSVD12 AJ8
RSVD21 RSVD3 G13
RSVD25
G3 VCCIO
J3 RSVD26 C38
w
RSVD29 RSVD22 C1
RSVD20 BR2
BR35 RSVD17 BP1
BR31 RSVD19 RSVD16 B38
w
+3VS +3VALW VCCST BH30 RSVD18 RSVD8 B2

RSVD9 RSVD6
13 OF 13
w
1
RC75
2
1
2
1
1
1K_0402_5% @
RC292 RC291 RC139 RC140 RC141 RC142 RC143 RC144
10K_0402_5% 10K_0402_5% 1K_0201_5% 1K_0201_5% 1K_0201_5% 1K_0201_5% 1K_0201_5% 1K_0201_5%
2
@ @ @ @ @ @ @
1
2
1
2
RC50 1 2 60.4_0402_1% VCCST_PWRGD
CFG3
CFG1 CFG7
CFG6
1
CC179 CFG5
330P_0402_50V8J CFG4
1
QC3 D QC2 D CFG2

2
CPUCORE_ON 2 2 CFG0
52,72 CPUCORE_ON G G
1
1
1
1
L2N7002KWT1G_SOT323-3 S 1 S L2N7002KWT1G_SOT323-3 RC185 RC146
3
CC33 1K_0201_5% 1K_0201_5% RC56 RC53 RC54 RC52 RC51 RC55

0.022U_0402_16V7-K @ @ 1K_0201_5% 1K_0201_5% 1K_0201_5% 1K_0201_5% 1K_0201_5% 1K_0201_5%
@ @ @ @ @
2
2
2
2
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (2/7) PM, XDP, CLK, CFG
Custom
Y550 1.0

5 4 3 2 1
5 4 3 2 1
DDRA_DQ[0..63] 12
UC1A
DDRA_DQ0 DDRB_DQ[0..63] 13
AG1 BR6 UC1B
12 DDRA_CLK0 AG2 DDR0_CKP_0/DDR0_CKP_0 DDR0_DQ_0/DDR0_DQ_0 BT6 DDRA_DQ1 AM9 BT11 DDRB_DQ0
12 DDRA_CLK0# DDR0_CKN_0/DDR0_CKN_0 DDR0_DQ_1/DDR0_DQ_1 DDRA_DQ2 13 DDRB_CLK0 DDR1_CKP_0/DDR1_CKP_0 DDR1_DQ_0/DDR0_DQ_16 DDRB_DQ1
AK2 BP3 AN9 BR11
12 DDRA_CLK1 DDR0_CKP_1/DDR0_CKP_1 DDR0_DQ_2/DDR0_DQ_2 DDRA_DQ3 13 DDRB_CLK0# DDR1_CKN_0/DDR1_CKN_0 DDR1_DQ_1/DDR0_DQ_17 DDRB_DQ2
AK1 BR3 AM7 BT9
12 DDRA_CLK1# AL3 DDR0_CKN_1/DDR0_CKN_1 DDR0_DQ_3/DDR0_DQ_3 BN5 DDRA_DQ4 13 DDRB_CLK1 AM8 DDR1_CKP_1/DDR1_CKP_1 DDR1_DQ_2/DDR0_DQ_18 BR8 DDRB_DQ3
NC/DDR0_CKP_2 DDR0_DQ_4/DDR0_DQ_4 DDRA_DQ5
DDR CHA Ma ing 13 DDRB_CLK1# DDR1_CKN_1/DDR1_CKN_1 DDR1_DQ_3/DDR0_DQ_19 DDRB_DQ4
DDR CHB Ma ing
AK3 BP6 AM11 BP11
AL2 NC/DDR0_CKN_2 DDR0_DQ_5/DDR0_DQ_5 BP2 DDRA_DQ6 AM10 NC/DDR1_CKP_2 DDR1_DQ_4/DDR0_DQ_20 BN11 DDRB_DQ5
AL1 NC/DDR0_CKP_3 DDR0_DQ_6/DDR0_DQ_6 BN3 DDRA_DQ7 DDR CHA DATA DDRA_DQS AJ10 NC/DDR1_CKN_2 DDR1_DQ_5/DDR0_DQ_21 BP8 DDRB_DQ6 DDR CHB S DIMM H DDRB_DQS
D NC/DDR0_CKN_3 DDR0_DQ_7/DDR0_DQ_7 BL4 DDRA_DQ8 AJ11 NC/DDR1_CKP_3 DDR1_DQ_6/DDR0_DQ_22 BN8 DDRB_DQ7 D
DDRA_DQ0---DQ1 DDRB_DQ0---DQ0
AT1 DDR0_DQ_8/DDR0_DQ_8 BL5 DDRA_DQ9 DDRA_DQ1---DQ NC/DDR1_CKN_3 DDR1_DQ_7/DDR0_DQ_23 BL12 DDRB_DQ8 DDRB_DQ1---DQ
12 DDRA_CKE0 DDR0_CKE_0/DDR0_CKE_0 DDR0_DQ_9/DDR0_DQ_9 DDRA_DQ10 DDRA_DQ ---DQ DDR1_DQ_8/DDR0_DQ_24 DDRB_DQ9 DDRB_DQ ---DQ5
AT2 BL2 DDRA_DQ3---DQ3 DDRA_DQS0---DQS0_t AT8 BL11 DDRB_DQ3---DQ3 DDRB_DQS0---DQS0_t
12 DDRA_CKE1 AT3 DDR0_CKE_1/DDR0_CKE_1 DDR0_DQ_10/DDR0_DQ_10 BM1 DDRA_DQ11 DDRA_DQ ---DQ5 DDRA_DQS#0---DQS0_c 13 DDRB_CKE0 AT10 DDR1_CKE_0/DDR1_CKE_0 DDR1_DQ_9/DDR0_DQ_25 BL8 DDRB_DQ10 DDRB_DQ ---DQ DDRB_DQS#0---DQS0_c
DDR0_CKE_2/DDR0_CKE_2 DDR0_DQ_11/DDR0_DQ_11 DDRA_DQ12 DDRA_DQ5---DQ0 13 DDRB_CKE1 DDR1_CKE_1/DDR1_CKE_1 DDR1_DQ_10/DDR0_DQ_26 DDRB_DQ11 DDRB_DQ5---DQ1
AT5 BK4 DDRA_DQ ---DQ AT7 BJ8 DDRB_DQ ---DQ7
DDR0_CKE_3/DDR0_CKE_3 DDR0_DQ_12/DDR0_DQ_12 BK5 DDRA_DQ13 DDRA_DQ7---DQ7 AT11 DDR1_CKE_2/DDR1_CKE_2 DDR1_DQ_11/DDR0_DQ_27 BJ11 DDRB_DQ12 DDRB_DQ7---DQ
AD5 DDR0_DQ_13/DDR0_DQ_13 BK1 DDRA_DQ14 DDR1_CKE_3/DDR1_CKE_3 DDR1_DQ_12/DDR0_DQ_28 BJ10 DDRB_DQ13
12 DDRA_CS0# DDR0_CS#_0/DDR0_CS#_0 DDR0_DQ_14/DDR0_DQ_14 DDRA_DQ15 DDR1_DQ_13/DDR0_DQ_29 DDRB_DQ14
AE2 BK2 DDRA_DQ8---DQ8 AF11 BL7 DDRB_DQ8---DQ1
12 DDRA_CS1# AD2 DDR0_CS#_1/DDR0_CS#_1 DDR0_DQ_15/DDR0_DQ_15 BG4 DDRA_DQ16 DDRA_DQ9---DQ1 13 DDRB_CS0# AE7 DDR1_CS#_0/DDR1_CS#_0 DDR1_DQ_14/DDR0_DQ_30 BJ7 DDRB_DQ15 DDRB_DQ9---DQ8
DDRA_DQ10---DQ1 13 DDRB_CS1# DDRB_DQ10---DQ13
AE5 NC/DDR0_CS#_2 DDR0_DQ_16/DDR0_DQ_32 BG5 DDRA_DQ17 DDRA_DQ11---DQ11 DDRA_DQS1---DQS1_t AF10 DDR1_CS#_1/DDR1_CS#_1 DDR1_DQ_15/DDR0_DQ_31 BG11 DDRB_DQ16 DDRB_DQ11---DQ1 DDRB_DQS1---DQS1_t
NC/DDR0_CS#_3 DDR0_DQ_17/DDR0_DQ_33 BF4 DDRA_DQ18 DDRA_DQ1 ---DQ9 DDRA_DQS#1---DQS1_c
AE10 NC/DDR1_CS#_2 DDR1_DQ_16/DDR0_DQ_48 BG10 DDRB_DQ17 DDRB_DQ1 ---DQ15 DDRB_DQS#1---DQS1_c
DDR0_DQ_18/DDR0_DQ_34 DDRA_DQ13---DQ13 NC/DDR1_CS#_3 DDR1_DQ_17/DDR0_DQ_49 DDRB_DQ13---DQ10
DDRA_ODT0 AD3 BF5 DDRA_DQ19 DDRA_DQ1 ---DQ10 BG8 DDRB_DQ18 DDRB_DQ1 ---DQ9
12 DDRA_ODT0 DDRA_ODT1 DDR0_ODT_0/DDR0_ODT_0 DDR0_DQ_19/DDR0_DQ_35 DDRA_DQ20 DDRA_DQ15 DQ15 DDRB_ODT0 DDR1_DQ_18/DDR0_DQ_50 DDRB_DQ19 DDRB_DQ15---DQ11
AE4 BG2 AF7 BF8
12 DDRA_ODT1 AE1 NC/DDR0_ODT_1 DDR0_DQ_20/DDR0_DQ_36 BG1 DDRA_DQ21 13 DDRB_ODT0 DDRB_ODT1 AE8 DDR1_ODT_0/DDR1_ODT_0 DDR1_DQ_19/DDR0_DQ_51 BF11 DDRB_DQ20
NC/DDR0_ODT_2 DDR0_DQ_21/DDR0_DQ_37 DDRA_DQ22 DDRA_DQ1 ---DQ 0 13 DDRB_ODT1 NC/DDR1_ODT_1 DDR1_DQ_20/DDR0_DQ_52 DDRB_DQ21 DDRB_DQ1 ---DQ1
AD4 BF1 DDRA_DQ17---DQ1
AE9 BF10 DDRB_DQ17---DQ 0
NC/DDR0_ODT_3 DDR0_DQ_22/DDR0_DQ_38 BF2 DDRA_DQ23 DDRA_DQ18---DQ19 AE11 NC/DDR1_ODT_2 DDR1_DQ_21/DDR0_DQ_53 BG7 DDRB_DQ22 DDRB_DQ18---DQ17
AH5 DDR0_DQ_23/DDR0_DQ_39 BD2 DDRA_DQ24 DDRA_DQ19---DQ DDRA_DQS ---DQS _t NC/DDR1_ODT_3 DDR1_DQ_22/DDR0_DQ_54 BF7 DDRB_DQ23 DDRB_DQ19---DQ19 DDRB_DQS ---DQS _t
12 DDRA_BA0 DDR0_CAB_4/DDR0_BA_0 DDR0_DQ_24/DDR0_DQ_40 DDRA_DQ25
DDRA_DQ 0---DQ17 DDRA_DQS# ---DQS _c DDR1_DQ_23/DDR0_DQ_55 DDRB_DQ24
DDRB_DQ 0---DQ 3 DDRB_DQS# ---DQS _c
AH1 BD1 DDRA_DQ 1---DQ 1 AH10 BB11 DDRB_DQ 1---DQ18
12 DDRA_BA1 AU1 DDR0_CAB_6/DDR0_BA_1 DDR0_DQ_25/DDR0_DQ_41 BC4 DDRA_DQ26 DDRA_DQ ---DQ 3 13 DDRB_MA16_RAS# AH11 DDR1_CAB_3/DDR1_MA_16 DDR1_DQ_24/DDR0_DQ_56 BC11 DDRB_DQ25 DDRB_DQ ---DQ 1
12 DDRA_BG0 DDR0_CAA_5/DDR0_BG_0 DDR0_DQ_26/DDR0_DQ_42 DDRA_DQ27 DDRA_DQ 3---DQ18 13 DDRB_MA14_WE# DDR1_CAB_2/DDR1_MA_14 DDR1_DQ_25/DDR0_DQ_57 DDRB_DQ26 DDRB_DQ 3---DQ
BC5 AF8 BB8
DDR0_DQ_27/DDR0_DQ_43 DDRA_DQ28 13 DDRB_MA15_CAS# DDR1_CAB_1/DDR1_MA_15 DDR1_DQ_26/DDR0_DQ_58 DDRB_DQ27
AH4 BD5 BC8
12 DDRA_MA16_RAS# AG4 DDR0_CAB_3/DDR0_MA_16 DDR0_DQ_28/DDR0_DQ_44 BD4 DDRA_DQ29 DDRA_DQ ---DQ 8
AH8 DDR1_DQ_27/DDR0_DQ_59 BC10 DDRB_DQ28 DDRB_DQ ---DQ
DDRA_DQ 5---DQ DDRB_DQ 5---DQ
12 DDRA_MA14_WE# DDR0_CAB_2/DDR0_MA_14 DDR0_DQ_29/DDR0_DQ_45 DDRA_DQ30 13 DDRB_BA0 DDR1_CAB_4/DDR1_BA_0 DDR1_DQ_28/DDR0_DQ_60 DDRB_DQ29
AD1 BC1 DDRA_DQ ---DQ31 AH9 BB10 DDRB_DQ ---DQ31
12 DDRA_MA15_CAS# DDR0_CAB_1/DDR0_MA_15 DDR0_DQ_30/DDR0_DQ_46 BC2 DDRA_DQ31 DDRA_DQ 7---DQ30 DDRA_DQS3---DQS3_t 13 DDRB_BA1 AR9 DDR1_CAB_6/DDR1_BA_1 DDR1_DQ_29/DDR0_DQ_61 BC7 DDRB_DQ30 DDRB_DQ 7---DQ 9 DDRB_DQS3---DQS3_t
12 DDRA_MA[0..9] DDRA_DQ 8---DQ 5 DDRA_DQS#3---DQS3_c 13 DDRB_BG0 DDRB_DQ 8---DQ 8 DDRB_DQS#3---DQS3_c
DDRA_MA0 AH3 DDR0_DQ_31/DDR0_DQ_47 AB1 DDRA_DQ32 DDRA_DQ 9---DQ 9 DDR1_CAA_5/DDR1_BG_0 DDR1_DQ_30/DDR0_DQ_62 BB7 DDRB_DQ31 DDRB_DQ 9---DQ 7
DDRA_MA1 DDR0_CAB_9/DDR0_MA_0 DDR0_DQ_32/DDR1_DQ_0 DDRA_DQ33 DDRA_DQ30---DQ 13 DDRB_MA[0..9] DDRB_MA0 DDR1_DQ_31/DDR0_DQ_63 DDRB_DQ32 DDRB_DQ30---DQ30
AP4 AB2 DDRA_DQ31---DQ 7 AJ9 AA11 DDRB_DQ31---DQ 5
DDRA_MA2 AN4 DDR0_CAB_8/DDR0_MA_1 DDR0_DQ_33/DDR1_DQ_1 AA4 DDRA_DQ34 DDRB_MA1 AK6 DDR1_CAB_9/DDR1_MA_0 DDR1_DQ_32/DDR1_DQ_16 AA10 DDRB_DQ33
DDRA_MA3 AP5 DDR0_CAB_5/DDR0_MA_2 DDR0_DQ_34/DDR1_DQ_2 AA5 DDRA_DQ35 DDRB_MA2 AK5 DDR1_CAB_8/DDR1_MA_1 DDR1_DQ_33/DDR1_DQ_17 AC11 DDRB_DQ34
DDRA_DQ3 ---DQ37 DDRB_DQ3 ---DQ3
DDRA_MA4 AP2 NC/DDR0_MA_3 DDR0_DQ_35/DDR1_DQ_3 AB5 DDRA_DQ36 DDRA_DQ3 ---DQ3 DDRB_MA3 AL5 DDR1_CAB_5/DDR1_MA_2 DDR1_DQ_34/DDR1_DQ_18 AC10 DDRB_DQ35 DDRB_DQ33---DQ38
om
DDRA_MA5 AP1 NC/DDR0_MA_4 DDR0_DQ_36/DDR1_DQ_4 AB4 DDRA_DQ37 DDRA_DQ3 ---DQ35 DDRB_MA4 AL6 NC/DDR1_MA_3 DDR1_DQ_35/DDR1_DQ_19 AA7 DDRB_DQ36 DDRB_DQ3 ---DQ3
DDR0_CAA_0/DDR0_MA_5 DDR0_DQ_37/DDR1_DQ_5 DDRA_DQ35---DQ39 DDRA_DQS ---DQS _t NC/DDR1_MA_4 DDR1_DQ_36/DDR1_DQ_20 DDRB_DQ35---DQ33 DDRB_DQS ---DQS _t
DDRA_MA6 AP3 AA2 DDRA_DQ38 DDRA_DQ3 ---DQ3 DDRA_DQS# ---DQS _c DDRB_MA5 AM6 AA8 DDRB_DQ37 DDRB_DQ3 ---DQ39 DDRB_DQS# ---DQS _c
DDRA_MA7 AN1 DDR0_CAA_2/DDR0_MA_6 DDR0_DQ_38/DDR1_DQ_6 AA1 DDRA_DQ39 DDRA_DQ37---DQ33 DDRB_MA6 AN7 DDR1_CAA_0/DDR1_MA_5 DDR1_DQ_37/DDR1_DQ_21 AC8 DDRB_DQ38 DDRB_DQ37---DQ35
DDR0_CAA_4/DDR0_MA_7 DDR0_DQ_39/DDR1_DQ_7 DDRA_DQ38---DQ38 DDR1_CAA_2/DDR1_MA_6 DDR1_DQ_38/DDR1_DQ_22 DDRB_DQ38---DQ37
DDRA_MA8 AN3 V5 DDRA_DQ40 DDRA_DQ39---DQ3 DDRB_MA7 AN10 AC7 DDRB_DQ39 DDRB_DQ39---DQ3
DDRA_MA9 AT4 DDR0_CAA_3/DDR0_MA_8 DDR0_DQ_40/DDR1_DQ_8 V2 DDRA_DQ41 DDR1_CAA_4/DDR1_MA_7 DDR1_DQ_39/DDR1_DQ_23
DDRA_MA10_AP AH2 DDR0_CAA_1/DDR0_MA_9 DDR0_DQ_41/DDR1_DQ_9 U1 DDRA_DQ42 DDRA_DQ 0---DQ 5 DDRB_MA8 AN8 W8 DDRB_DQ40 DDRB_DQ 0---DQ
12 DDRA_MA10_AP DDRA_MA11 DDR0_CAB_7/DDR0_MA_10 DDR0_DQ_42/DDR1_DQ_10 DDRA_DQ43 DDRA_DQ 1---DQ 0 DDRB_MA9 DDR1_CAA_3/DDR1_MA_8 DDR1_DQ_40/DDR1_DQ_24 DDRB_DQ41 DDRB_DQ 1---DQ 0
AN2 U2 AR11 W7
12 DDRA_MA11
.c
DDR0_CAA_7/DDR0_MA_11 DDR0_DQ_43/DDR1_DQ_11 DDRA_DQ ---DQ 3 DDR1_CAA_1/DDR1_MA_9 DDR1_DQ_41/DDR1_DQ_25 DDRB_DQ ---DQ
DDRA_MA12 AU4 V1 DDRA_DQ44 DDRA_DQ 3---DQ DDRA_DQS5---DQS5_t DDRB_MA10_AP AH7 V10 DDRB_DQ42 DDRB_DQ 3---DQ 3 DDRB_DQS5---DQS5_t
12 DDRA_MA12 DDRA_MA13 DDR0_CAA_6/DDR0_MA_12 DDR0_DQ_44/DDR1_DQ_12 DDRA_DQ45 DDRA_DQ ---DQ DDRA_DQS#5---DQS5_c 13 DDRB_MA10_AP DDRB_MA11 DDR1_CAB_7/DDR1_MA_10 DDR1_DQ_42/DDR1_DQ_26 DDRB_DQ43 DDRB_DQ ---DQ 5 DDRB_DQS#5---DQS5_c
C AE3 V4 AN11 V11 C
12 DDRA_MA13 DDRA_BG1 AU2 DDR0_CAB_0/DDR0_MA_13 DDR0_DQ_45/DDR1_DQ_13 U5 DDRA_DQ46 DDRA_DQ 5---DQ 1 13 DDRB_MA11 DDRB_MA12 AR10 DDR1_CAA_7/DDR1_MA_11 DDR1_DQ_43/DDR1_DQ_27 W11 DDRB_DQ44 DDRB_DQ 5---DQ 1
DDRA_DQ ---DQ DDRB_DQ ---DQ
12 DDRA_BG1 DDRA_ACT# DDR0_CAA_9/DDR0_BG_1 DDR0_DQ_46/DDR1_DQ_14 DDRA_DQ47 13 DDRB_MA12 DDRB_MA13 DDR1_CAA_6/DDR1_MA_12 DDR1_DQ_44/DDR1_DQ_28 DDRB_DQ45
AU3 U4 DDRA_DQ 7---DQ 7 AF9 W10 DDRB_DQ 7---DQ 7
ck
12 DDRA_ACT# DDR0_CAA_8/DDR0_ACT# DDR0_DQ_47/DDR1_DQ_15 DDRA_DQ48 13 DDRB_MA13 DDRB_BG1 DDR1_CAB_0/DDR1_MA_13 DDR1_DQ_45/DDR1_DQ_29 DDRB_DQ46
R2 AR7 V7
DDRA_PARITY AG3 DDR0_DQ_48/DDR1_DQ_32 P5 DDRA_DQ49 DDRA_DQ 8---DQ53 13 DDRB_BG1 DDRB_ACT# AT9 DDR1_CAA_9/DDR1_BG_1 DDR1_DQ_46/DDR1_DQ_30 V8 DDRB_DQ47 DDRB_DQ 8---DQ 9
12 DDRA_PARITY DDRA_ALERT# NC/DDR0_PAR DDR0_DQ_49/DDR1_DQ_33 DDRA_DQ50 DDRA_DQ 9---DQ 8 13 DDRB_ACT# DDR1_CAA_8/DDR1_ACT# DDR1_DQ_47/DDR1_DQ_31 DDRB_DQ48 DDRB_DQ 9---DQ50
AU5 R4 DDRA_DQ50---DQ5 R11 DDRB_DQ50---DQ55
12 DDRA_ALERT# NC/DDR0_ALERT# DDR0_DQ_50/DDR1_DQ_34 P4 DDRA_DQ51 DDRA_DQ51---DQ51 DDRA_DQS ---DQS _t DDRB_PARITY AJ7 DDR1_DQ_48/DDR1_DQ_48 P11 DDRB_DQ49 DDRB_DQ51---DQ51DDRB_DQS ---DQS _t
DDR0_DQ_51/DDR1_DQ_35 DDRA_DQ52 DDRA_DQ5 ---DQ 9 DDRA_DQS# ---DQS _c 13 DDRB_PARITY DDRB_ALERT# NC/DDR1_PAR DDR1_DQ_49/DDR1_DQ_49 DDRB_DQ50 DDRB_DQ5 ---DQ5 DDRB_DQS# ---DQS _c
R5 DDRA_DQ53---DQ5 AR8 P7 DDRB_DQ53---DQ5
lo
12 DDRA_DQS#[0..7] DDRA_DQS#0 DDR0_DQ_52/DDR1_DQ_36 DDRA_DQ53 13 DDRB_ALERT# NC/DDR1_ALERT# DDR1_DQ_50/DDR1_DQ_50 DDRB_DQ51
BR5 P2 DDRA_DQ5 ---DQ55 R8 DDRB_DQ5 ---DQ53
DDRA_DQS#1 BL3 DDR0_DQSN_0/DDR0_DQSN_0DDR0_DQ_53/DDR1_DQ_37 R1 DDRA_DQ54 DDRA_DQ55---DQ50 DDR1_DQ_51/DDR1_DQ_51 R10 DDRB_DQ52 DDRB_DQ55---DQ 8
DDRA_DQS#2 DDR0_DQSN_1/DDR0_DQSN_1DDR0_DQ_54/DDR1_DQ_38 DDRA_DQ55 13 DDRB_DQS#[0..7] DDRB_DQS#0 DDR1_DQ_52/DDR1_DQ_52 DDRB_DQ53
BG3 P1 BN9 P10
DDRA_DQS#3 BD3 DDR0_DQSN_2/DDR0_DQSN_4DDR0_DQ_55/DDR1_DQ_39 M4 DDRA_DQ56 DDRA_DQ5 ---DQ5 DDRB_DQS#1 BL9 DDR1_DQSN_0/DDR0_DQSN_2DDR1_DQ_53/DDR1_DQ_53 R7 DDRB_DQ54 DDRB_DQ5 ---DQ
un
DDR0_DQSN_3/DDR0_DQSN_5DDR0_DQ_56/DDR1_DQ_40 DDRA_DQ57---DQ57 DDR1_DQSN_1/DDR0_DQSN_3DDR1_DQ_54/DDR1_DQ_54 DDRB_DQ57---DQ 1
DDRA_DQS#4 AA3 M1 DDRA_DQ57 DDRA_DQ58---DQ58 DDRB_DQS#2 BG9 P8 DDRB_DQ55 DDRB_DQ58---DQ59
DDRA_DQS#5 U3 DDR0_DQSN_4/DDR1_DQSN_0DDR0_DQ_57/DDR1_DQ_41 L4 DDRA_DQ58 DDRA_DQ59---DQ 3 DDRA_DQS7---DQS7_t DDRB_DQS#3 BC9 DDR1_DQSN_2/DDR0_DQSN_6DDR1_DQ_55/DDR1_DQ_55 L11 DDRB_DQ56 DDRB_DQ59---DQ 0DDRB_DQS7---DQS7_t
DDR0_DQSN_5/DDR1_DQSN_1DDR0_DQ_58/DDR1_DQ_42 DDRA_DQ 0---DQ 1 DDRA_DQS#7---DQS7_c DDR1_DQSN_3/DDR0_DQSN_7DDR1_DQ_56/DDR1_DQ_56 DDRB_DQ 0---DQ58DDRB_DQS#7---DQS7_c
DDRA_DQS#6 P3 L2 DDRA_DQ59 DDRA_DQ 1---DQ 0 DDRB_DQS#4 AC9 M11 DDRB_DQ57 DDRB_DQ 1---DQ5
DDRA_DQS#7 L3 DDR0_DQSN_6/DDR1_DQSN_4DDR0_DQ_59/DDR1_DQ_43 M5 DDRA_DQ60 DDRA_DQ ---DQ DDRB_DQS#5 W9 DDR1_DQSN_4/DDR1_DQSN_2DDR1_DQ_57/DDR1_DQ_57 L7 DDRB_DQ58 DDRB_DQ ---DQ57
DDR0_DQSN_7/DDR1_DQSN_5DDR0_DQ_60/DDR1_DQ_44 DDRA_DQ 3---DQ59 DDR1_DQSN_5/DDR1_DQSN_3DDR1_DQ_58/DDR1_DQ_58 DDRB_DQ 3---DQ 3
M2 DDRA_DQ61 DDRB_DQS#6 R9 M8 DDRB_DQ59
12 DDRA_DQS[0..7] DDRA_DQS0 DDR0_DQ_61/DDR1_DQ_45 DDRA_DQ62 DDRB_DQS#7 DDR1_DQSN_6/DDR1_DQSN_6DDR1_DQ_59/DDR1_DQ_59 DDRB_DQ60
st
BP5 L5 M9 L10
DDRA_DQS1 BK3 DDR0_DQSP_0/DDR0_DQSP_0DDR0_DQ_62/DDR1_DQ_46 L1 DDRA_DQ63 DDR1_DQSN_7/DDR1_DQSN_7DDR1_DQ_60/DDR1_DQ_60 M10 DDRB_DQ61
DDRA_DQS2 BF3 DDR0_DQSP_1/DDR0_DQSP_1DDR0_DQ_63/DDR1_DQ_47 13 DDRB_DQS[0..7] DDRB_DQS0 BP9 DDR1_DQ_61/DDR1_DQ_61 M7 DDRB_DQ62
DDRA_DQS3 BC3 DDR0_DQSP_2/DDR0_DQSP_4 BA2 DDRB_DQS1 BJ9 DDR1_DQSP_0/DDR0_DQSP_2DDR1_DQ_62/DDR1_DQ_62 L8 DDRB_DQ63
DDRA_DQS4 DDR0_DQSP_3/DDR0_DQSP_5 NC/DDR0_ECC_0 DDRB_DQS2 DDR1_DQSP_1/DDR0_DQSP_3DDR1_DQ_63/DDR1_DQ_63
fa
AB3 BA1 BF9
DDRA_DQS5 V3 DDR0_DQSP_4/DDR1_DQSP_0 NC/DDR0_ECC_1 AY4 DDRB_DQS3 BB9 DDR1_DQSP_2/DDR0_DQSP_6 AW11
DDRA_DQS6 R3 DDR0_DQSP_5/DDR1_DQSP_1 NC/DDR0_ECC_2 AY5 DDRB_DQS4 AA9 DDR1_DQSP_3/DDR0_DQSP_7 NC/DDR1_ECC_0 AY11
DDRA_DQS7 M3 DDR0_DQSP_6/DDR1_DQSP_4 NC/DDR0_ECC_3 BA5 DDRB_DQS5 V9 DDR1_DQSP_4/DDR1_DQSP_2 NC/DDR1_ECC_1 AY8
DDR0_DQSP_7/DDR1_DQSP_5 NC/DDR0_ECC_4 BA4 DDRB_DQS6 P9 DDR1_DQSP_5/DDR1_DQSP_3 NC/DDR1_ECC_2 AW8
s-
AY3 NC/DDR0_ECC_5 AY1 DDRB_DQS7 L9 DDR1_DQSP_6/DDR1_DQSP_6 NC/DDR1_ECC_3 AY10
BA3 DDR0_DQSP_8/DDR0_DQSP_8 NC/DDR0_ECC_6 AY2 DDR1_DQSP_7/DDR1_DQSP_7 NC/DDR1_ECC_4 AW10
1 OF 13
DDR0_DQSN_8/DDR0_DQSN_8 NC/DDR0_ECC_7 AW9 NC/DDR1_ECC_5 AY7
COMETLAKE-H-CPU_BGA1440 AY9 DDR1_DQSP_8/DDR1_DQSP_8 NC/DDR1_ECC_6 AW7
m
DDR CHANNEL A
DDR1_DQSN_8/DDR1_DQSN_8 NC/DDR1_ECC_7
@
B
ru +V_DDR_REFA_R
+V_DDR_REF_R
+V_DDR_REFB_R
BN13
BP13
BR13
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ 2 OF 13
DDR_RCOMP_0
DDR_RCOMP_1
DDR_RCOMP_2
G1
H1
J2
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
B
.fo
COMETLAKE-H-CPU_BGA1440 DDR CHANNEL B
@
DDR4 COMPENSATION SIGNALS

w
SM_RCOMP0 RC5 1 2 121_0402_1%

w
SM_RCOMP1 RC6 1 2 75_0402_1%
SM_RCOMP2 RC8 1 2 100_0402_1%

w
CAD Note:
Trace width=12~15 mil, Spcing>25 mils
Max trace length= 500 mil
Place close to CPU
RC147 1 @ 2 0_0402_5% +V_DDR_REFA_R

+VREF_CA_DIMMA_R
PAD @ TC109 1 +VREF_DQ_DIMM_R RC36 1 2 0_0402_5% +V_DDR_REF_R
RC37 1 @ 2 0_0402_5% +V_DDR_REFB_R
+VREF_DQ_DIMMB_R
@
CAD Note:
Trace width= 20 mil, Spcing=20 mils
A DDR_VR F_CA : Connected to VR F_CA on DIMM CH-A A
DDR0_VR F_DQ : NC
DDR1_VR F_DQ : Connected to VR F_CA on DIMM CH-B
Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (3/7) DDRVI

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
D D
UC1D
K36 D29 CPU_EDP_TX0+

DDI1_TXP_0 EDP_TXP_0 CPU_EDP_TX0- CPU_EDP_TX0+ 39
K37 E29
DDI1_TXN_0 EDP_TXN_0 CPU_EDP_TX1+ CPU_EDP_TX0- 39
J35 F28
J34 E28
H37 A29
H36 B29
J37 C28
J38 B28
DDI1_TXN_3 EDP_TXN_3 CPU_EDP_TX3- 39
D27 C26 CPU_EDP_AUX
m
DDI1_AUXP EDP_AUXP CPU_EDP_AUX# CPU_EDP_AUX 39
E27 B26
DDI1_AUXN EDP_AUXN CPU_EDP_AUX# 39
H34
co
H33 DDI2_TXP_0
F37 DDI2_TXN_0 A33 VCCIO
G38 DDI2_TXP_1 DISP_UTILS
F34 DDI2_TXN_1
DDI2_TXP_2
k.
F35 D37 EDP_COMP 2 1
E37 DDI2_TXN_2 DISP_RCOMP 24.9_0402_1% RC49
DDI2_TXP_3
oc
E36
C DDI2_TXN_3 COMPENSATION FOR DDI interface C
F26
E26 DDI2_AUXP CAD Note:Trace width=20 mils ,Spacing=25mil,
DDI2_AUXN
nl
Max length=100 mils. Must reference GND
C34
D34 DDI3_TXP_0
DDI3_TXN_0
u
B36
B34 DDI3_TXP_1
DDI3_TXN_1
st
F33
E33 DDI3_TXP_2
C33 DDI3_TXN_2
DDI3_TXP_3
fa
B33
DDI3_TXN_3 G27 PROC_AUDIO_CLK_CPU
PROC_AUDIO_CLK PROC_AUDIO_CLK_CPU 16
A27 G25 PROC_AUDIO_SDO_CPU PROC_AUDIO_SDO_CPU 16
B27 DDI3_AUXP PROC_AUDIO_SDI G29 PROC_AUDIO_SDI_CPU_R RC180 1 2 20_0402_5%
s-
DDI3_AUXN PROC_AUDIO_SDO PROC_AUDIO_SDI_CPU 16
4 of 13
Place near CPU
m
1
@
RC762
ru
33_0402_5%
@
2
.fo 1
CC185
w
B 10P_0402_50V8J B
2@
w
w
A A

Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (4/7) eDP, DDI
A3 1.0
5 4 3 2 1
5 4 3 2 1
VCCGFXCORE VCCGFXCORE
VCCCPUCORE VCCCPUCORE VCCCPUCORE
UC1J VCCCPUCORE UC1K
UC1I AT14 BD35
AA13 AH13 K14 W35 AT31 VCCGT1 VCCGT80 BD36
AA31 VCC1 VCC64 AH14 L13 VCC_K14 VCC_W35 W36 AT32 VCCGT2 VCCGT81 BE31
AA32 VCC2 VCC65 AH29 L14 VCC_L13 VCC_W36 W37 AT33 VCCGT3 VCCGT82 BE32
AA33 VCC3 VCC66 AH30 N13 VCC_L14 VCC_W37 W38 AT34 VCCGT4 VCCGT83 BE33
AA34 VCC4 VCC67 AH31 N14 VCC_N13 VCC_W38 Y29 AT35 VCCGT5 VCCGT84 BE34
AA35 VCC5 VCC68 AH32 N30 VCC_N14 VCC_Y29 Y30 AT36 VCCGT6 VCCGT85 BE35
AA36 VCC6 VCC69 AJ14 N31 VCC_N30 VCC_Y30 Y31 AT37 VCCGT7 VCCGT86 BE36
AA37 VCC7 VCC70 AJ29 N32 VCC_N31 VCC_Y31 Y32 AT38 VCCGT8 VCCGT87 BE37
AA38 VCC8 VCC71 AJ30 N35 VCC_N32 VCC_Y32 Y33 AU14 VCCGT9 VCCGT88 BE38
AB29 VCC9 VCC72 AJ31 N36 VCC_N35 VCC_Y33 Y34 AU29 VCCGT10 VCCGT89 BF13 CRB lace to VR side need confirm with PWR
AB30 VCC10 VCC73 AJ32 N37 VCC_N36 VCC_Y34 Y35 AU30 VCCGT11 VCCGT90 BF14
AB31 VCC11 VCC74 AJ33 N38 VCC_N37 VCC_Y35 Y36 AU31 VCCGT12 VCCGT91 BF29 VCCGFXCORE
AB32
AB35
VCC12
VCC13
VCC75
VCC76
AJ34
AJ35
P13
P14
VCC_N38
VCC_P13
VCC_Y36 AU32
AU35
VCCGT13
VCCGT14
VCCGT92
VCCGT93
BF30
BF31
VCCGT_SENSE
1
AB36 VCC14 VCC77 AJ36 P29 VCC_P14 AU36 VCCGT15 VCCGT94 BF32 RC60
AB37 VCC15 VCC78 AK31 P30 VCC_P29 AU37 VCCGT16 VCCGT95 BF35 100_0402_1%
AB38 VCC16 VCC79 AK32 P31 VCC_P30 AU38 VCCGT17 VCCGT96 BF36
AC13 VCC17 VCC80 AK33 P32 VCC_P31 AV29 VCCGT18 VCCGT97 BF37
D AC14 VCC18 VCC81 AK34 P33 VCC_P32 AV30 VCCGT19 VCCGT98 BF38 D
2
AC29 VCC19 VCC82 AK35 P34 VCC_P33 AV31 VCCGT20 VCCGT99 BG29 VCCGT_SENSE_R
VCC20 VCC83 VCC_P34 VCCGT21 VCCGT100 72 VCCGT_SENSE
AC30 AK36 P35 AV32 BG30
AC31 VCC21 VCC84 AK37 P36 VCC_P35 AV33 VCCGT22 VCCGT101 BG31 VSSGT_SENSE_R
AC32 VCC22 VCC85 AK38 R13 VCC_P36 AV34 VCCGT23 VCCGT102 BG32 72 VSSGT_SENSE
VCC23 VCC86 VCC_R13 VCCGT24 VCCGT103
1
AC33 AL13 R31 AV35 BG33
AC34 VCC24 VCC87 AL29 R32 VCC_R31 AV36 VCCGT25 VCCGT104 BG34
AC35 VCC25 VCC88 AL30 R33 VCC_R32 AW14 VCCGT26 VCCGT105 BG35 RC63
AC36 VCC26 VCC89 AL31 R34 VCC_R33 AW31 VCCGT27 VCCGT106 BG36 100_0402_1%
AD13 VCC27 VCC90 AL32 R35 VCC_R34 AW32 VCCGT28 VCCGT107 BH33
2
AD33 VCC31 VCC94 AL38 T29 VCC_R38 AW36 VCCGT32 VCCGT111 BH37
AD34 VCC32 VCC95 AM13 T30 VCC_T29 AW37 VCCGT33 VCCGT112 BH38
AD35 VCC33 VCC96 AM14 T31 VCC_T30 AW38 VCCGT34 VCCGT113 BJ16
AD36 VCC34 VCC97 AM29 T32 VCC_T31 AY29 VCCGT35 VCCGT114 BJ17
VCC35 VCC98 VCC_T32 VCCGT36 VCCGT115
om
AD37 AM30 T35 AY30 BJ19
AD38 VCC36 VCC99 AM31 T36 VCC_T35 AY31 VCCGT37 VCCGT116 BJ20
AE13 VCC37 VCC100 AM32 T37 VCC_T36 AY32 VCCGT38 VCCGT117 BJ21
AE14 VCC38 VCC101 AM33 T38 VCC_T37 AY35 VCCGT39 VCCGT118 BJ23
AE30 VCC39 VCC102 AM34 U29 VCC_T38 AY36 VCCGT40 VCCGT119 BJ24
AE31 VCC40 VCC103 AM35 U30 VCC_U29 AY37 VCCGT41 VCCGT120 BJ26
AE32 VCC41 VCC104 AM36 U31 VCC_U30 AY38 VCCGT42 VCCGT121 BJ27
AE35 VCC42 VCC105 AN13 U32 VCC_U31 BA13 VCCGT43 VCCGT122 BJ37 CRB lace to VR side need confirm with PWR
AE36 VCC43 VCC106 AN14 U33 VCC_U32 BA14 VCCGT44 VCCGT123 BJ38
AE37 VCC44 VCC107 AN31 U34 VCC_U33 BA29 VCCGT45 VCCGT124 BK16 VCCCPUCORE
.c
AE38 VCC45 VCC108 AN32 U35 VCC_U34 BA30 VCCGT46 VCCGT125 BK17
AF29
AF30
VCC46
VCC47
VCC48
VCC109
VCC110
VCC111
AN33
AN34
U36
V13
VCC_U35
VCC_U36
VCC_V13
BA31
BA32
VCCGT47
VCCGT48
VCCGT49
VCCGT126
VCCGT127
VCCGT128
BK19
BK20
VCC_SENSE
1
AF31 AN35 V14 BA33 BK21 RC59
AF32 VCC49 VCC112 AN36 V31 VCC_V14 BA34 VCCGT50 VCCGT129 BK23 100_0402_1%
k
AF33 VCC50 VCC113 AN37 V32 VCC_V31 BA35 VCCGT51 VCCGT130 BK24
AF34 VCC51 VCC114 AN38 V33 VCC_V32 BA36 VCCGT52 VCCGT131 BK26
AF35 VCC52 VCC115 AP13 V34 VCC_V33 BB13 VCCGT53 VCCGT132 BK27
2
oc
AF36 VCC53 VCC116 AP30 V35 VCC_V34 BB14 VCCGT54 VCCGT133 BL15
AF37 VCC54 VCC117 AP31 V36 VCC_V35 BB31 VCCGT55 VCCGT134 BL16
AF38 VCC55 VCC118 AP32 V37 VCC_V36 BB32 VCCGT56 VCCGT135 BL17 VCCCORE_SENSE VCCSENSE_R
VCC56 VCC119 VCC_V37 VCCGT57 VCCGT136 72 VCCCORE_SENSE
AG14 AP35 V38 BB33 BL23
AG31 VCC57 VCC120 AP36 W13 VCC_V38 BB34 VCCGT58 VCCGT137 BL24
AG32 VCC58 VCC121 AP37 W14 VCC_W13 BB35 VCCGT59 VCCGT138 BL25
AG33 VCC59 VCC122 AP38 W29 VCC_W14 BB36 VCCGT60 VCCGT139 BL26
nl
AG34 VCC60 VCC123 K13 W30 VCC_W29 BB37 VCCGT61 VCCGT140 BL27
AG35 VCC61 VCC124 W31 VCC_W30 BB38 VCCGT62 VCCGT141 BL28 VSSCORE_SENSE VSSSENSE_R
VCC62 VCC_W31 VCCGT63 VCCGT142 72 VSSCORE_SENSE
AG36 W32 BC29 BL36
VCC63 VCC_W32 BC30 VCCGT64 VCCGT143 BL37
1
COMETLAKE-H-CPU_BGA1440 BC31 VCCGT65 VCCGT144 BM15
10 OF 13
VCCGT66 VCCGT145
tu
@ BC32 BM16
AG37 VCCSENSE_R BC35 VCCGT67 VCCGT146 BM17 RC62
VCC_SENSE AG38 VSSSENSE_R BC36 VCCGT68 VCCGT147 BM36 100_0402_1%
C VSS_SENSE BC37 VCCGT69 VCCGT148 BM37 C
2
COMETLAKE-H-CPU_BGA1440 BC38 VCCGT70 VCCGT149 BN15
9 OF 13
BD13 VCCGT71 VCCGT150 BN16
@
s
VCCGT75 VCCGT154
fa
BD31 BN38
BD32 VCCGT76 VCCGT155 BP15
BP37 VCCGT79 VCCGT158 BR37
BP38 VCCGT159 VCCGT164 BT15
s-
BR15 VCCGT160 VCCGT165 BT16
VCCGT163 VCCGT168
VSSGT_SENSE_R
m
AH37
VSSGT_SENSE AH38 VCCGT_SENSE_R
VCCGT_SENSE
11 OF 13 COMETLAKE-H-CPU_BGA1440
@
ru
PDG near: 70uf 7uf 0
.fo
backside:10uf 3 1uf 5
w VCCGFXCORE
10uF 10pcs CD 2pcs
w
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
w
PDG near: 70uf 7uf 0 1 1 1 1 1 1 1 1 1 1
CC107
CC110
CC106
CC105
CC103
CC117
CC98
CC108
CC102
CC104
backside:10uf 3 1uf 5 @ @
B 2 2 2 2 2 2 2 2 2 2 B
VCCCPUCORE
10uF 32pcs CD 2pcs
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1uF 12pcs CD 2pcs

CC62
CC265
CC79
CC74
CC81
CC83
CC88
CC94
CC93
CC89
CC86
CC87
CC255
CC262
CC263
CC264
CC80
CC77
CC76
CC84
CC260
CC78
CC91
CC92
CC85
CC256
CC257
CC258
CC259
CC261
CC82
CC75
CC187 CC188
33P_0201_50V8-J 33P_0201_50V8-J
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 RF_NS@ 2 RF_NS@
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC190
CD@
CD@
CC189
CC235
CC236
CC237
CC239
CC242
CC246
CC245
CC234
CD@
CC238
CC240
CC241
CC243
CD@
CD@
33P_0402_50V8J
CD@
33P_0402_50V8J
@ @ RF_NS@ RF_NS@
2 2 2 2 2 2 2 2 2 2 2 2 2 2
V1 0
Near CPU
Near CPU
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC197
CC209
CC201
CC203
CC204
CC205
CC207
CC208
CC213
CC214
CC191
CC193
CC192
CC198
CC210
CC216
CC196
CC199
CC200
CC206
CC211
CC212
CC215
CC194
CC195
CC202
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
@
@
@
@
@
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC220
CC226
CC217
CC223
CC229
CC232
CC227
CC266
CC221
CC267
CC218
CC222
CC224
CC225
CC219
CC230
CC231
CC228
CC233
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
@
@
@
@
@
@
A A
CD@ CD@ CD@ CD@ CD@ CD@ CD@
1uF 45pcs CD 2pcs
Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (5/7) PWR, BYPASS
D 1.0
5 4 3 2 1
5 4 3 2 1
VCCSA
VCCSA +1.2V
10uF 7pcs
UC1L
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
J30 AA6
K29 VCCSA1 VDDQ1 AE12
VCCSA2 VDDQ2 1 1 1 1 1 1 1 1 1
K30 AF5 CC247 CC248
VCCSA3 VDDQ3
CC136
CC141
CC140
CC142
CC139
CC138
CC137
K31 AF6 33P_0402_50V8J 33P_0402_50V8J
K32 VCCSA4 VDDQ4 AG5 RF_NS@ RF_NS@
K33 VCCSA5 VDDQ5 AG9 +1.2V 2 2 2 2 2 2 2 2 2
CD@
K34 VCCSA6 VDDQ6 AJ12
K35 VCCSA7 VDDQ7 AL11
L31 VCCSA8 VDDQ8 AP6
L32 VCCSA9 VDDQ9 AP7
L35 VCCSA10 VDDQ10 AR12
VCCSA11 VDDQ11
Close to Y12 Pin
L36 AR6 1
VCCSA12 VDDQ12
D
L37
L38
M29
VCCSA13
VCCSA14
VDDQ13
VDDQ14
AT12
AW6
AY6
CC172
10U_0603_6.3V6M Near CPU D
VCCSA15 VDDQ15 2
1U_0402_6.3V6K
M30 J5 1
M31 VCCSA16 VDDQ16 J6
VCCSA17 VDDQ17
1uF 1pcs
CC249
M32 K12
M33 VCCSA18 VDDQ18 K6
M34 VCCSA19 VDDQ19 L12 2
M35 VCCSA20 VDDQ20 L6
M36 VCCSA21 VDDQ21 R6
VCCIO VCCSA22 VDDQ22 T6
VDDQ23 W6
VDDQ24 Y12
AG12 VDDQ25
G15 VCCIO1 +1.2V
G17 VCCIO2
G19 VCCIO3 BH13
G21 VCCIO4 VCCPLL_OC1 BJ13
VCCIO5 VCCPLL_OC2 VCCST
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 H15 G11 1 1
H16 VCCIO6 VCCPLL_OC3
VCCIO7
CC147
CC148
CC149
CC150
CC254
H17 H30
H19 VCCIO8 VCCST VCCSTG
CD@
2 2 2 VCCIO9 2 2
1U_0402_6.3V6K
H20 H29 1
H21 VCCIO10 VCCSTG2
VCCIO11
1U_0402_6.3V6K
1U_0402_6.3V6K
CC250
H26 G30 1 1
H27 VCCIO12 VCCSTG1 VCCST
VCCIO13 2
CC251
CC252
J15 H28
J16 VCCIO14 VCCPLL1 J28
J17 VCCIO15 VCCPLL2 2 2
J19 VCCIO16 @
om
J20 VCCIO17 M38 VCCSA_SENSE_R
J21 VCCIO18 VCCSA_SENSE M37 VSSSA_SENSE_R V1 0
J26 VCCIO19 VSSSA_SENSE
J27 VCCIO20 H14 VCCIO_SENSE_R
VCCIO21 VCCIO_SENSE J14 VSSIO_SENSE_R
VSSIO_SENSE
1 1U_0402_6.3V6K 1
.c
VCCIO COMETLAKE-H-CPU_BGA1440 CC253 CC180
12 OF 13
C @ 47U_0805_6.3V6-M C
2 2 @
ck
Follow PDG Rev1.0
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1
CC182
CC183
CC184
lo
@
CD@
CD@
2 2 2
+1.2V
10uF 11pcs CD 1pcs
un
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1
st
CC52
CC53
CC54
CC51
CC55
CC57
CC58
CC59
CC56
CC60
2 2 2 2 2 2 2 2 2 2
fa
CD@
CD@
CD@
CD@
s-
m
CC63
22U_0603_6.3V6-M
22U_0603_6.3V6-M
CC64
22U_0603_6.3V6-M
CC65
22U_0603_6.3V6-M
CC66
1 1 1 1
22uF 4pcs
ru
2 2 2 2
B B
.fo
CD@
CD@
w
w
CRB lace to CPU CRB lace to CPU

w
VCCSA VCCIO
VCCSA_SENSE VCCIO_SENSE
1
RC151 RC155
100_0402_1% 100_0402_1%
@
2
VCCSA_SENSE_R RC154 1 2 VCCIO_SENSE_R

72 VCCSA_SENSE 71 VCC_IO_SEN
0_0402_5%
VSSSA_SENSE_R RC152 1 2 VSSIO_SENSE_R
72 VSSSA_SENSE 71 VSS_IO_SEN
0_0402_5%
1
RC149 RC153
100_0402_1% 100_0402_1%
2
Modify request by PWR 1 /
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (6/7) PWR, BYPASS
C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
D D
UC1F UC1G UC1H
A10 AK4 AW5 BJ15 BN4 F15
A12 VSS_1VSS_82 AL10 AY12 VSS_244
VSS_163 BJ18 BN7 VSS_325 VSS_409 F17
VSS_164 BJ22 BP12 VSS_326 VSS_410 F19
VSS_165 BJ25 BP14 VSS_327 VSS_411 F2
A20 VSS_4VSS_85 AL33 B9 VSS_247
VSS_166 BJ29 BP18 VSS_328 VSS_412 F21
A22 VSS_5VSS_86 AL34 BA10 VSS_248
VSS_167 BJ30 BP21 VSS_329 VSS_413 F23
VSS_168 BJ31 BP24 VSS_330 VSS_414 F25
VSS_169 BJ32 BP25 VSS_331 VSS_415 F27
VSS_170 BJ33 BP26 VSS_332 VSS_416 F29
VSS_171 BJ34 BP29 VSS_333 VSS_417 F3
A6 VSS_91
VSS_10 AM1 BA6 VSS_253
VSS_172 BJ35 BP33 VSS_334 VSS_418 F31
A9 VSS_92
VSS_173 BJ36 BP34 VSS_335 VSS_419 F36
AA12 VSS_93
VSS_174 BK13 BP7 VSS_336 VSS_420 F4
AA29 VSS_94
VSS_175 BK14 BR12 VSS_337 VSS_421 F5
AA30 VSS_95
VSS_14 AM37 BB1 VSS_257
VSS_176 BK15 BR14 VSS_338 VSS_422 F8
AB33 VSS_96
VSS_177 BK18 BR18 VSS_339 VSS_423 F9
AB34 VSS_97
VSS_178 BK22 BR21 VSS_340 VSS_424 G10
AB6 VSS_98
VSS_179 BK25 BR24 VSS_341 VSS_425 G12
AC1 VSS_99
VSS_18 AN12 BB3 VSS_261
VSS_180 BK29 BR25 VSS_342 VSS_426 G14
AC12 VSS_100
VSS_181 BK6 BR26 VSS_343 VSS_427 G16
AC2 VSS_101
VSS_182 BL13 BR29 VSS_344 VSS_428 G18
AC3 VSS_102
VSS_183 BL14 BR34 VSS_345 VSS_429 G20
AC37 VSS_103
VSS_184 BL18 BR36 VSS_346 VSS_430 G22
AC38 VSS_104
VSS_23 AP10 BC12 VSS_266
VSS_185 BL19 BR7 VSS_347 VSS_431 G23
AC4 VSS_105
VSS_186 BL20 BT12 VSS_348 VSS_432 G24
AC5 VSS_106
VSS_187 BL21 BT14 VSS_349 VSS_433 G26
AC6 VSS_107
VSS_188 BL22 BT18 VSS_350 VSS_434 G28
AD10 VSS_108
VSS_189 BL29 BT21 VSS_351 VSS_435 G4
om
AD11 VSS_109
VSS_190 BL33 BT24 VSS_352 VSS_436 G5
AD12 VSS_110
VSS_29 AP9 BD10 VSS_272
VSS_191 BL35 BT26 VSS_353 VSS_437 G6
AD29 VSS_111
VSS_30 AR1 BD11 VSS_273
VSS_192 BL38 BT29 VSS_354 VSS_438 G8
AD30 VSS_112
VSS_193 BL6 BT32 VSS_355 VSS_439 G9
AD6 VSS_113
VSS_194 BM11 BT5 VSS_356 VSS_440 H11
AD8 VSS_114
VSS_195 BM12 C11 VSS_357 VSS_441 H12
AD9 VSS_115
VSS_196 BM13 C13 VSS_358 VSS_442 H18
.c
AE33 VSS_116
VSS_197 BM14 C15 VSS_359 VSS_443 H22
AE34 VSS_117
VSS_198 BM18 C17 VSS_360 VSS_444 H25
C C
AE6 VSS_118
VSS_37 AR31 BE1 VSS_280
VSS_199 BM2 C19 VSS_361 VSS_445 H32
AF1 VSS_119
VSS_200 BM21 C21 VSS_362 VSS_446 H35
ck
AF12 VSS_120
VSS_201 BM22 C23 VSS_363 VSS_447 J10
AF13 VSS_121
VSS_202 BM23 C25 VSS_364 VSS_448 J18
AF14 VSS_122
VSS_203 BM24 C27 VSS_365 VSS_449 J22
AF2 VSS_123
VSS_204 BM25 C29 VSS_366 VSS_450 J25
AF3 VSS_124
VSS_205 BM26 C31 VSS_367 VSS_451 J32
o
AF4 VSS_125
VSS_206 BM27 C37 VSS_368 VSS_452 J33
AG10 VSS_126
VSS_45 AR4 BF12 VSS_288
VSS_207 BM28 C5 VSS_369 VSS_453 J36
AG11 VSS_127
VSS_46 AR5 BF33 VSS_289
VSS_208 BM29 C8 VSS_370 VSS_454 J4
nl
AG13 VSS_128
VSS_47 AT29 BF34 VSS_290
VSS_209 BM3 C9 VSS_371 VSS_455 J7
AG29 VSS_129
VSS_48 AT30 BF6 VSS_291
VSS_210 BM33 D10 VSS_372 VSS_456 K1
AG30 VSS_130
VSS_49 AT6 BG12 VSS_292
VSS_211 BM35 D12 VSS_373 VSS_457 K10
AG6 VSS_131
VSS_50 AU10 BG13 VSS_293
VSS_212 BM38 D14 VSS_374 VSS_458 K11
u
AG7 VSS_132
VSS_213 BM5 D16 VSS_375 VSS_459 K2
AG8 VSS_133
VSS_214 BM6 D18 VSS_376 VSS_460 K3
AH12 VSS_134
VSS_53 AU33 VSS_296
VSS_215 VSS_377 VSS_461
st
BG38 BM7 D20 K38
AH33 VSS_135
VSS_216 BM8 D22 VSS_378 VSS_462 K4
AH34 VSS_136
VSS_55 AU6 BH1 VSS_298
VSS_217 BM9 D24 VSS_379 VSS_463 K5
AH35 VSS_137
VSS_218 BN12 D26 VSS_380 VSS_464 K7
VSS_138
VSS_57 VSS_300
VSS_219 VSS_381 VSS_465
fa
AH36 AU8 BH11 BN14 D28 K8
AH6 VSS_139
VSS_220 BN18 D3 VSS_382 VSS_466 K9
AJ1 VSS_140
VSS_59 AV37 BH14 VSS_302
VSS_221 BN19 D30 VSS_383 VSS_467 L29
AJ13 VSS_141
VSS_60 AV38 BH2 VSS_303
VSS_222 BN2 D33 VSS_384 VSS_468 L30
AJ2 VSS_142
VSS_61 AW1 BH3 VSS_304
VSS_223 BN20 D6 VSS_385 VSS_469 L33
s-
AJ3 VSS_143
VSS_224 BN21 D9 VSS_386 VSS_470 L34
AJ37 VSS_144
VSS_225 BN24 E34 VSS_387 VSS_471 M12
AJ38 VSS_145
VSS_226 BN29 E35 VSS_388 VSS_472 M13
AJ4 VSS_146
VSS_227 BN30 E38 VSS_389 VSS_473 N10
m
AJ5 VSS_147
VSS_228 BN31 E4 VSS_390 VSS_474 N11
AJ6 VSS_148
VSS_229 BN34 E9 VSS_391 VSS_475 N12
W4 VSS_149
VSS_68 U6 T2 VSS_311
VSS_230 P38 N3 VSS_392 VSS_476 N2
W5 VSS_150
VSS_69 V12 T3 VSS_312
VSS_231 P6 N33 VSS_393 VSS_477 BT8
ru
Y10 VSS_151
VSS_70 V29 T33 VSS_313
VSS_232 R12 N34 VSS_394 VSS_478 BR9
Y11 VSS_152
VSS_71 V30 T34 VSS_314
VSS_233 R29 N4 VSS_395 VSS_479
Y13 VSS_153
VSS_72 A14 T4 VSS_315
VSS_234 AY14 N5 VSS_396 A3
Y14 VSS_154
VSS_73 AD7 T5 VSS_316
VSS_235 BD38 N6 VSS_397 VSS_A3 A34
B VSS_155
VSS_74 VSS_317
VSS_236 VSS_398 VSS_A34 B
.fo
Y37 V6 T7 R30 N7 A4
Y38 VSS_156
VSS_75 W1 T8 VSS_318
VSS_237 T1 N8 VSS_399 VSS_A4 B3
Y7 VSS_157
VSS_76 W12 T9 VSS_319
VSS_238 T10 N9 VSS_400 VSS_B3 B37
Y8 VSS_158
VSS_77 W2 U37 VSS_320
VSS_239 T11 P12 VSS_401 VSS_B37 BR38
Y9 VSS_159
VSS_78 W3 U38 VSS_321
VSS_240 T12 P37 VSS_402 VSS_BR38 BT3
AK29 VSS_160
VSS_79 W33 BJ12 VSS_322
VSS_241 T13 M14 VSS_403 VSS_BT3 BT35
w
AK30 VSS_161
VSS_80 W34 BJ14 VSS_323
VSS_242 T14 M6 VSS_404 VSS_BT35 BT36
VSS_162
VSS_81 VSS_324
VSS_243 N1 VSS_405 VSS_BT36 BT4
COMETLAKE-H-CPU_BGA1440 COMETLAKE-H-CPU_BGA1440 F11 VSS_406 VSS_BT4 C2
6 OF 13 7 OF 13 F13 VSS_407 VSS_C2 D38
w
@ @ VSS_408 VSS_D38
8 OF 13
@
w
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (6/7) PWR, VSS
C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
DDR4 SO-DIMM A
+1.2V+1.2V +1.2V+1.2V
+1.2V
+1.2V+1.2V +1.2V+1.2V JDDRL1B
1
RD5
JDDRL1A 240_0402_5% DDRA_MA3 131 132 DDRA_MA2
7 DDRA_MA3 DDRA_MA1 A3 A2 DDRA_EVENT# DDRA_MA2 7
133 134
7 DDRA_MA1 135 A1 EVENT_n/NF 136
2
1 2 DDRA_CLK0 137 VDD_9 VDD_10 138 DDRA_CLK1
DDRA_DQ4 VSS_1 VSS_2 DDRA_DQ1 DDRA_EVENT# 7 DDRA_CLK0 DDRA_CLK0# CK0_t CK1_t/NF DDRA_CLK1# DDRA_CLK1 7
3 4 139 140
7 DDRA_DQ4 5 DQ5 DQ4 6 DDRA_DQ1 7 7 DDRA_CLK0# 141 CK0_c CK1_c/NF 142 DDRA_CLK1# 7
DDRA_DQ0 7 VSS_3 VSS_4 8 DDRA_DQ5 DDRA_PARITY 143 VDD_11 VDD_12 144 DDRA_MA0
7 DDRA_DQ0 9 DQ1 DQ0 10 DDRA_DQ5 7 7 DDRA_PARITY Parity A0 DDRA_MA0 7
DDRA_DQS#0 11 VSS_5 VSS_6 12
D 7 DDRA_DQS#0 DDRA_DQS0 DQS0_C DM0_n/DBl0_n DDRA_BA1 DDRA_MA10_AP D
13 14 145 146
7 DDRA_DQS0 15 DQS0_t VSS_7 16 DDRA_DQ6 7 DDRA_BA1 147 BA1 A10/AP 148 DDRA_MA10_AP 7
DDRA_DQ7 VSS_8 DQ6 DDRA_DQ6 7 DDRA_CS0# VDD_13 VDD_14 DDRA_BA0
17 18 149 150
7 DDRA_DQ7 19 DQ7 VSS_9 20 DDRA_DQ2 7 DDRA_CS0# DDRA_MA14_WE# 151 CS0_n BA0 152 DDRA_MA16_RAS# DDRA_BA0 7
DDRA_DQ3 VSS_10 DQ2 DDRA_DQ2 7 7 DDRA_MA14_WE# A14/WE_n A16/RAS_n DDRA_MA16_RAS# 7
21 22 153 154
7 DDRA_DQ3 DQ3 VSS_11 DDRA_DQ9 DDRA_ODT0 VDD_15 VDD_16 DDRA_MA15_CAS#
23 24 155 156
DDRA_DQ13 25 VSS_12 DQ12 26 DDRA_DQ9 7 7 DDRA_ODT0 DDRA_CS1# 157 ODT0 A15/CAS_n 158 DDRA_MA13 DDRA_MA15_CAS# 7
7 DDRA_DQ13 DQ13 VSS_13 DDRA_DQ8 7 DDRA_CS1# CS1_n A13 DDRA_MA13 7
27 28 159 160
DDRA_DQ12 29 VSS_14 DQ8 30 DDRA_DQ8 7 DDRA_ODT1 161 VDD_17 VDD_18 162
7 DDRA_DQ12 DQ9 VSS_15 DDRA_DQS#1 7 DDRA_ODT1 ODT1 C0/CS2_n/NC +VREF_CA_DIMMA
31 32 163 164
VSS_16 DQS1_c DDRA_DQS1 DDRA_DQS#1 7 VDD_19 VREFCA DDRA_SA2
33 34 165 166
35 DM1_n/DBl_n DQS1_t 36 DDRA_DQS1 7 167 C1/CS3_n/NC SA2 168
.1U_0402_10V6-K
VSS_17 VSS_18 VSS_53 VSS_54
2.2U_0603_6.3V6K
DDRA_DQ15 37 38 DDRA_DQ10 DDRA_DQ33 169 170 DDRA_DQ36
7 DDRA_DQ15 DQ15 DQ14 DDRA_DQ10 7 7 DDRA_DQ33 DQ37 DQ36 DDRA_DQ36 7 1 1
39 40 171 172
DDRA_DQ14 41 VSS_19 VSS_20 42 DDRA_DQ11 DDRA_DQ37 173 VSS_55 VSS_56 174 DDRA_DQ32
7 DDRA_DQ14 DQ10 DQ11 DDRA_DQ11 7 7 DDRA_DQ37 DQ33 DQ32 DDRA_DQ32 7
43 44 175 176
DDRA_DQ21 45 VSS_21 VSS_22 46 DDRA_DQ16 DDRA_DQS#4 177 VSS_57 VSS_58 178 2 2
7 DDRA_DQ21 DQ21 DQ20 DDRA_DQ16 7 7 DDRA_DQS#4 DDRA_DQS4 DQS4_c DM4_n/DBl4_n
47 48 179 180
CD2
CD3
DDRA_DQ20 49 VSS_23 VSS_24 50 DDRA_DQ17 7 DDRA_DQS4 181 DQS4_t VSS_59 182 DDRA_DQ35
7 DDRA_DQ20 DQ17 DQ16 DDRA_DQ17 7 DDRA_DQ38 VSS_60 DQ39 DDRA_DQ35 7
51 52 183 184
DDRA_DQS#2 VSS_25 VSS_26 7 DDRA_DQ38 DQ38 VSS_61 DDRA_DQ34
53 54 185 186
7 DDRA_DQS#2 DDRA_DQS2 55 DQS2_c DM2_n/DBl2_n 56 DDRA_DQ39 187 VSS_62 DQ35 188 DDRA_DQ34 7
7 DDRA_DQS2 DQS2_t VSS_27 DDRA_DQ19 7 DDRA_DQ39 DQ34 VSS_63 DDRA_DQ40
57 58 189 190
DDRA_DQ22 59 VSS_28 DQ22 60 DDRA_DQ19 7 DDRA_DQ44 191 VSS_64 DQ45 192 DDRA_DQ40 7
7 DDRA_DQ22 DQ23 VSS_29 DDRA_DQ23 7 DDRA_DQ44 DQ44 VSS_65 DDRA_DQ45
61 62 193 194
DDRA_DQ18 VSS_30 DQ18 DDRA_DQ23 7 DDRA_DQ41 VSS_66 DQ41 DDRA_DQ45 7
63 64 195 196
7 DDRA_DQ18 65 DQ19 VSS_31 66 DDRA_DQ24 7 DDRA_DQ41 197 DQ40 VSS_67 198 DDRA_DQS#5
DDRA_DQ29 VSS_32 DQ28 DDRA_DQ24 7 VSS_68 DQS5_c DDRA_DQS5 DDRA_DQS#5 7
67 68 199 200
7 DDRA_DQ29 69 DQ29 VSS_33 70 DDRA_DQ25 201 DM5_n/DBl5_n DQS5_t 202 DDRA_DQS5 7
DDRA_DQ25 7
m
DDRA_DQ28 71 VSS_34 DQ24 72 DDRA_DQ43 203 VSS_69 VSS_70 204 DDRA_DQ47
7 DDRA_DQ28 DQ25 VSS_35 DDRA_DQS#3 7 DDRA_DQ43 DQ46 DQ47 DDRA_DQ47 7
73 74 205 206
75 VSS_36 DQS3_c 76 DDRA_DQS3 DDRA_DQS#3 7 DDRA_DQ46 207 VSS_71 VSS_72 208 DDRA_DQ42
DM3_n/DBl3_n DQS3_t DDRA_DQS3 7 7 DDRA_DQ46 DQ42 DQ43 DDRA_DQ42 7
77 78 209 210
co
DDRA_DQ27 79 80 DDRA_DQ26 DDRA_DQ50 211 212 DDRA_DQ48
7 DDRA_DQ27 DQ30 DQ31 DDRA_DQ26 7 7 DDRA_DQ50 DQ52 DQ53 DDRA_DQ48 7
81 82 213 214
DDRA_DQ30 83 VSS_39 VSS_40 84 DDRA_DQ31 DDRA_DQ52 215 VSS_75 VSS_76 216 DDRA_DQ49
7 DDRA_DQ30 85 DQ26 DQ27 86 DDRA_DQ31 7 7 DDRA_DQ52 217 DQ49 DQ48 218 DDRA_DQ49 7
87 VSS_41 VSS_42 88 DDRA_DQS#6 219 VSS_77 VSS_78 220
C C
89 CB5/NC CB4/NC 90 7 DDRA_DQS#6 DDRA_DQS6 221 DQS6_c DM6_n/DBl6_n 222
k.
VSS_43 VSS_44 7 DDRA_DQS6 DQS6_t VSS_79 DDRA_DQ53
91 92 223 224
CB1/NC CB0/NC DDRA_DQ54 VSS_80 DQ54 DDRA_DQ53 7
93 94 225 226
95 VSS_45 VSS_46 96 7 DDRA_DQ54 227 DQ55 VSS_81 228 DDRA_DQ55
DQS8_c DM8_n/DBl_n/NC DDRA_DQ51 VSS_82 DQ50 DDRA_DQ55 7
c
97 98 229 230
99 DQS8_t VSS_47 100 7 DDRA_DQ51 231 DQ51 VSS_83 232 DDRA_DQ61
VSS_48 CB6/NC DDRA_DQ60 VSS_84 DQ60 DDRA_DQ61 7
101 102 233 234
lo
CB2/NC VSS_49 7 DDRA_DQ60 DQ61 VSS_85 DDRA_DQ57
103 104 235 236
105 VSS_50 CB7/NC 106 DDRA_DQ56 237 VSS_86 DQ57 238 DDRA_DQ57 7
CB3/NC VSS_51 PCH_DRAMRST# 7 DDRA_DQ56 DQ56 VSS_87 DDRA_DQS#7
107 108 239 240
DDRA_CKE0 109 VSS_52 RESET_n 110 DDRA_CKE1 PCH_DRAMRST# 13,16 241 VSS_88 DQS7_c 242 DDRA_DQS7 DDRA_DQS#7 7
un
7 DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 7 DM7_n/DBl7_n DQS7_t DDRA_DQS7 7
111 112 243 244
DDRA_BG1 113 VDD_1 VDD_2 114 DDRA_ACT# DDRA_DQ62 245 VSS_89 VSS_90 246 DDRA_DQ59
7 DDRA_BG1 DDRA_BG0 BG1 ACT_n DDRA_ALERT# DDRA_ACT# 7 7 DDRA_DQ62 DQ62 DQ63 DDRA_DQ59 7
115 116 247 248
7 DDRA_BG0 BG0 ALERT_n DDRA_ALERT# 7 DDRA_DQ58 VSS_91 VSS_92 DDRA_DQ63
117 118 249 250
DDRA_MA12 119 VDD_3 VDD_4 120 DDRA_MA11 7 DDRA_DQ58 251 DQ58 DQ59 252 DDRA_DQ63 7
7 DDRA_MA12 DDRA_MA9 A12 A11 DDRA_MA7 DDRA_MA11 7 SMB_CLK_S3 VSS_93 VSS_94 SMB_DATA_S3
121 122
st
7 DDRA_MA9 1 13,16 SMB_CLK_S3 253 254
A9 A7 DDRA_MA7 7 RD18 1 DDRA_VDDSPD SCL SDA DDRA_SA0 SMB_DATA_S3 13,16
123 124 2 255 256
DDRA_MA8 125 VDD_5 VDD_6 126 DDRA_MA5 +3VS 257 VDDSPD SA0 258
7 DDRA_MA8 CD69 0_0402_5% +0.6VS
DDRA_MA6 127 A8 A5 128 DDRA_MA4 DDRA_MA5 7 0.1U_0402_10V7K VPP_1 VTT DDRA_SA1
7 DDRA_MA6 @ 1 1 259 260
A6 A4 DDRA_MA4 7 2 VPP_2 SA1
fa
129 130
VDD_7 VDD_8 @
CD27 CD28 261 262
2.2U_0603_6.3V6K .1U_0402_10V6-K GND_1 GND_2
Layout Note: 2 2 ARGOS_D4AR0-26005-1P40
Place near DIMM ARGOS_D4AR0-26005-1P40
s-
@
@
@
RD20 1 2 0_0402_5%
m
+2.5V +2.5V
+0.6VS
+3VS +3VS +3VS
ru
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1 1 1 1
RD22 RD24 RD26
CD59
CD60
CD57
CD58
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
B 0_0402_5% 0_0402_5% 0_0402_5% B

.fo
1 1 1
CD23 @ @ @ 2@ 2@
CD24
CD25
2 2
2
2 2 2 DDRA_SA0 DDRA_SA1 DDRA_SA2

w
1
1
1
RD23 RD25 RD27

@ @ @
w
0_0402_5% 0_0402_5% 0_0402_5%

2
2
2
Note:
VREF trace width:20 mils at least
Spacing:20mils to other signal/planes
Place near DIMM scoket
SPD Address 0H Layout Note:
Place near DIMM
+1.2V
+VREF_CA_DIMMA_R
Change RD to 0ohm jum

1
+1.2V
RD1
1K_0402_1%
2
220U_B2_6.3VM_R25M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+VREF_CA_DIMMA
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 2
0.1U_0402_10V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
RD2 CD7 1 CD8 1 CD9 1 CD10 CD11 CD12 CD13 CD14

CD98 1 CD97 1 CD96 1 CD95 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
.1U_0402_10V6-K
2_0402_5% CD81 CD82
CD67
CD15
CD16
CD17
CD68
CD18
CD65
CD66
+
CD5
33P_0402_50V8J 33P_0402_50V8J
1K_0402_1%
1 1
CD21
CD1 RF_NS@ RF_NS@

EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
0.022U_0402_16V7-K 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 @ 2 2
2
2
2 2
RD3
A A
1
RD4
24.9_0402_1%
Near JDDRL1
2
For EMC Security Classification LC Future Center Secret Data Title
Issued Date 2018/08/02 Deciphered Date 2018/08/02 DDRVI SO-DIMM A

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
DDR4 SO-DIMM B
+1.2V +1.2V +1.2V +1.2V
+1.2V
JDDRH1A
+1.2V+1.2V +1.2V+1.2V
1
RD6
1 2 JDDRH1B
240_0402_5%
DDRB_DQ2 3 VSS_1 VSS_2 4 DDRB_DQ4
7 DDRB_DQ2 5 DQ5 DQ4 6 DDRB_DQ4 7
2
DDRB_DQ5 7 VSS_3 VSS_4 8 DDRB_DQ0 DDRB_MA3 131 132 DDRB_MA2
D 7 DDRB_DQ5 DQ1 DQ0 DDRB_DQ0 7 DDRB_EVENT# 7 DDRB_MA3 DDRB_MA1 A3 A2 DDRB_EVENT# DDRB_MA2 7 D
9 10 133 134
DDRB_DQS#0 11 VSS_5 VSS_6 12 7 DDRB_MA1 135 A1 EVENT_n/NF 136
7 DDRB_DQS#0 DDRB_DQS0 DQS0_C DM0_n/DBI0_n DDRB_CLK0 VDD_9 VDD_10 DDRB_CLK1
13 14 137 138
7 DDRB_DQS0 15 DQS0_t VSS_7 16 DDRB_DQ1 7 DDRB_CLK0 DDRB_CLK0# 139 CK0_t CK1_t/NF 140 DDRB_CLK1# DDRB_CLK1 7
DDRB_DQ6 VSS_8 DQ6 DDRB_DQ1 7 7 DDRB_CLK0# CK0_c CK1_c/NF DDRB_CLK1# 7
17 18 141 142
7 DDRB_DQ6 DQ7 VSS_9 DDRB_DQ7 DDRB_PARITY VDD_11 VDD_12 DDRB_MA0
19 20 143 144
DDRB_DQ3 21 VSS_10 DQ2 22 DDRB_DQ7 7 7 DDRB_PARITY Parity A0 DDRB_MA0 7
7 DDRB_DQ3 DQ3 VSS_11 DDRB_DQ8
23 24
DDRB_DQ10 25 VSS_12 DQ12 26 DDRB_DQ8 7 DDRB_BA1 145 146 DDRB_MA10_AP
7 DDRB_DQ10 DQ13 VSS_13 DDRB_DQ9 7 DDRB_BA1 BA1 A10/AP DDRB_MA10_AP 7
27 28 147 148
DDRB_DQ14 VSS_14 DQ8 DDRB_DQ9 7 DDRB_CS0# VDD_13 VDD_14 DDRB_BA0
29 30 149 150
7 DDRB_DQ14 DQ9 VSS_15 DDRB_DQS#1 7 DDRB_CS0# DDRB_MA14_WE# CS0_n BA0 DDRB_MA16_RAS# DDRB_BA0 7
31 32 151 152
VSS_16 DQS1_c DDRB_DQS1 DDRB_DQS#1 7 7 DDRB_MA14_WE# WE_n/A14 RAS_n/A16 DDRB_MA16_RAS# 7
33 34 153 154
35 DM1_n/DBl1_n DQS1_t 36 DDRB_DQS1 7 DDRB_ODT0 155 VDD_15 VDD_16 156 DDRB_MA15_CAS#
DDRB_DQ12 VSS_17 VSS_18 DDRB_DQ11 7 DDRB_ODT0 DDRB_CS1# ODT0 CAS_n/A15 DDRB_MA13 DDRB_MA15_CAS# 7
37 38 7 DDRB_CS1# 157 158
7 DDRB_DQ12 DQ15 DQ14 DDRB_DQ11 7 CS1_n A13 DDRB_MA13 7
39 40 159 160
DDRB_DQ13 41 VSS_19 VSS_20 42 DDRB_DQ15 DDRB_ODT1 161 VDD_17 VDD_18 162
7 DDRB_DQ13 DQ10 DQ11 DDRB_DQ15 7 7 DDRB_ODT1 ODT1 C0/CS2_n/NC +VREF_CA_DIMMB
43 44 163 164
DDRB_DQ22 45 VSS_21 VSS_22 46 DDRB_DQ17 165 VDD_19 VREFCA 166 DDRB_SA2
7 DDRB_DQ22 DQ21 DQ20 DDRB_DQ17 7 C1/CS3_n/NC RFU/SA2
47 48 167 168
DDRB_DQ18 49 VSS_23 VSS_24 50 DDRB_DQ16 DDRB_DQ38 169 VSS_53 VSS_54 170 DDRB_DQ34
.1U_0402_10V6-K
2.2U_0603_6.3V6K
7 DDRB_DQ18 51 DQ17 DQ16 52 DDRB_DQ16 7 7 DDRB_DQ38 171 DQ37 DQ36 172 DDRB_DQ34 7
1 1
DDRB_DQS#2 53 VSS_25 VSS_26 54 DDRB_DQ35 173 VSS_55 VSS_56 174 DDRB_DQ39
7 DDRB_DQS#2 DDRB_DQS2 55 DQS2_c DM2_n/DBl2_n 56 7 DDRB_DQ35 175 DQ33 DQ32 176 DDRB_DQ39 7
7 DDRB_DQS2 DQS2_t VSS_27 DDRB_DQ23 DDRB_DQS#4 VSS_57 VSS_58
57 58 177 178 2
DDRB_DQ20 VSS_28 DQ22 DDRB_DQ23 7 7 DDRB_DQS#4 DDRB_DQS4 DQS4_c DM4_n/DBl4_n 2
59 60 179 180
7 DDRB_DQ20 DQ23 VSS_29 7 DDRB_DQS4 DQS4_t VSS_59
CD31
61 62 DDRB_DQ21 181 182 DDRB_DQ36
CD30
DDRB_DQ19 VSS_30 DQ18 DDRB_DQ21 7 DDRB_DQ33 VSS_60 DQ39 DDRB_DQ36 7
63 64 183 184
7 DDRB_DQ19 65 DQ19 VSS_31 66 DDRB_DQ28 7 DDRB_DQ33 185 DQ38 VSS_61 186 DDRB_DQ37
DDRB_DQ28 7 DDRB_DQ37 7
om
DDRB_DQ27 67 VSS_32 DQ28 68 DDRB_DQ32 187 VSS_62 DQ35 188
7 DDRB_DQ27 DQ29 VSS_33 DDRB_DQ25 7 DDRB_DQ32 DQ34 VSS_63 DDRB_DQ44
69 70 189 190
DDRB_DQ31 71 VSS_34 DQ24 72 DDRB_DQ25 7 DDRB_DQ40 191 VSS_64 DQ45 192 DDRB_DQ44 7
7 DDRB_DQ31 DQ25 VSS_35 DDRB_DQS#3 7 DDRB_DQ40 DQ44 VSS_65 DDRB_DQ45
73 74 193 194
75 VSS_36 DQS3_c 76 DDRB_DQS3 DDRB_DQS#3 7 DDRB_DQ41 195 VSS_66 DQ41 196 DDRB_DQ45 7
DM3_n/DBl3_n DQS3_t DDRB_DQS3 7 7 DDRB_DQ41 DQ40 VSS_67 DDRB_DQS#5
77 78 197 198
DDRB_DQ30 VSS_37 VSS_38 DDRB_DQ26 VSS_68 DQS5_c DDRB_DQS5 DDRB_DQS#5 7
79 80 199 200
7 DDRB_DQ30 DDRB_DQ26 7 DDRB_DQS5 7
.c
81 DQ30 DQ31 82 201 DM5_n/DBl5_n DQS5_t 202
DDRB_DQ24 83 VSS_39 VSS_40 84 DDRB_DQ29 DDRB_DQ42 203 VSS_69 VSS_70 204 DDRB_DQ47
C C
7 DDRB_DQ24 85 DQ26 DQ27 86 DDRB_DQ29 7 7 DDRB_DQ42 205 DQ46 DQ47 206 DDRB_DQ47 7
87 VSS_41 VSS_42 88 DDRB_DQ46 207 VSS_71 VSS_72 208 DDRB_DQ43
ck
CB5/NC CB4/NC 7 DDRB_DQ46 DQ42 DQ43 DDRB_DQ43 7
89 90 209 210
CB1/NC CB0/NC 7 DDRB_DQ52 DQ52 DQ53 DDRB_DQ54 7
93 94 213 214
DQS8_c DM8_n/DBI_n/NC 7 DDRB_DQ48 DQ49 DQ48 DDRB_DQ55 7
97 98 217 218
lo
99 DQS8_t VSS_47 100 DDRB_DQS#6 219 VSS_77 VSS_78 220
101 VSS_48 CB6/NC 102 7 DDRB_DQS#6 DDRB_DQS6 221 DQS6_c DM6_n/DBl6_n 222
CB2/NC VSS_49 7 DDRB_DQS6 DQS6_t VSS_79 DDRB_DQ53
103 104 223 224
105 VSS_50 CB7/NC 106 DDRB_DQ50 225 VSS_80 DQ54 226 DDRB_DQ53 7
un
CB3/NC VSS_51 PCH_DRAMRST# 7 DDRB_DQ50 DQ55 VSS_81 DDRB_DQ49
107 108 227 228
DDRB_CKE0 VSS_52 RESET_n DDRB_CKE1 PCH_DRAMRST# 12,16 DDRB_DQ51 VSS_82 DQ50 DDRB_DQ49 7
109 110 229 230
7 DDRB_CKE0 111 CKE0 CKE1 112 DDRB_CKE1 7 7 DDRB_DQ51 231 DQ51 VSS_83 232 DDRB_DQ59
DDRB_BG1 VDD_1 VDD_2 DDRB_ACT# DDRB_DQ57 VSS_84 DQ60 DDRB_DQ59 7
113 114 233 234
7 DDRB_BG1 DDRB_BG0 115 BG1 ACT_n 116 DDRB_ALERT# DDRB_ACT# 7 7 DDRB_DQ57 235 DQ61 VSS_85 236 DDRB_DQ62
7 DDRB_BG0 BG0 ALERT_n DDRB_ALERT# 7 DDRB_DQ61 VSS_86 DQ57 DDRB_DQ62 7
117 118
st
1 237 238
DDRB_MA12 VDD_3 VDD_4 DDRB_MA11 7 DDRB_DQ61 DQ56 VSS_87 DDRB_DQS#7
119 120 239 240
7 DDRB_MA12 DDRB_MA9 121 A12 A11 122 DDRB_MA7 DDRB_MA11 7 241 VSS_88 DQS7_c 242 DDRB_DQS7 DDRB_DQS#7 7
CD70
7 DDRB_MA9 A9 A7 DDRB_MA7 7 0.1U_0402_10V7K DM7_n/DBl7_n DQS7_t DDRB_DQS7 7
123 124 243 244
DDRB_MA8 VDD_5 VDD_6 DDRB_MA5 2 DDRB_DQ56 VSS_89 VSS_90 DDRB_DQ63
fa
125 126 245 246
7 DDRB_MA8 DDRB_MA6 A8 A5 DDRB_MA4 DDRB_MA5 7 @ 7 DDRB_DQ56 DQ62 DQ63 DDRB_DQ63 7
127 128 247 248
7 DDRB_MA6 A6 A4 DDRB_MA4 7 DDRB_DQ60 VSS_91 VSS_92 DDRB_DQ58
129 130 249 250
VDD_7 VDD_8 7 DDRB_DQ60 251 DQ58 DQ59 252 DDRB_DQ58 7
SMB_CLK_S3 253 VSS_93 VSS_94 254 SMB_DATA_S3
s-
RD19 1 12,162 SMB_CLK_S3 DDRB_VDDSPD 255 SCL SDA 256 DDRB_SA0 SMB_DATA_S3 12,16
+3VS VDDSPD SA0
0_0402_5% 1 1 257 258 +0.6VS
ARGOS_D4AS0-26005-1P40 @ CD53 259 VPP_1 Vtt 260 DDRB_SA1
ME@ 2.2U_0603_6.3V6K CD54 VPP_2 SA1
m
.1U_0402_10V6-K 261 262
2 2 GND_1 GND_2
+3VS +3VS +3VS
ARGOS_D4AS0-26005-1P40
ru
ME@
1
1
RD28 RD33
RD30 @
0_0402_5% @ 0_0402_5% RD21 1 2 0_0402_5%
B
0_0402_5% +2.5V B
.fo
@ @
2
2
DDRB_SA0 DDRB_SA1 DDRB_SA2

w
1
RD31
RD29 RD32
@ @ 0_0402_5% @ +2.5V
0_0402_5% 0_0402_5%
w
2
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
1 +VREF_DQ_DIMMB_R +1.2V
1 1 1
CD61
CD62
CD64
CD63
Change RD1 to 0ohm jum
SPD Address H
1
2 2@ 2 2@
RD11
Layout Note: 1K_0402_1%
Place near DIMM
1 2 +VREF_CA_DIMMB
2
RD12
+1.2V 2_0402_5%
1
1 1
CD29
.1U_0402_10V6-K
Layout Note: 0.022U_0402_16V7-K
1K_0402_1%
Place near DIMM 2 2
2
1
CD47
RD14
RD13
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
24.9_0402_1%
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD35 1 CD36 1 CD37 1 CD38 1 CD39 1 CD40 1 CD41 1 CD42 1 1 1 1 1 1 1 1 1 1 1

CD83 CD84
CD46
CD74
CD43
CD44
CD71
CD72
CD73
CD45
2
+0.6VS 33P_0402_50V8J 33P_0402_50V8J
RF_NS@ RF_NS@
A
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 CAD Note: A
Trace width= 20 mil, Spcing=20 mils
1U_0402_6.3V6K
For EMC
1U_0402_6.3V6K
10U_0402_6.3V6M
CD49
1 1 1
Near JDDRH1
CD50
CD51
2 2 2
Issued Date 2018/08/02 Deciphered Date 2018/08/02 DDRVI SO-DIMM B

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
+3VS
1
D D
@
RH924 +3VS
10K_0201_5%
2
UH1C
AR2 G36 PCIE_PRX_DTX_N9
LCD_OD# CL_CLK PCIE9_RXN PCIE_PRX_DTX_P9 PCIE_PRX_DTX_N9 46
AT5 F36
CL_DATA PCIE9_RXP PCIE_PRX_DTX_P9 46
1
AU4 C34 PCIE_PTX_DRX_N9 NGFF SSD1

CL_RST# PCIE9_TXN PCIE_PTX_DRX_N9 46
1
LCD over drive control D34 PCIE_PTX_DRX_P9
PCIE9_TXP PCIE_PTX_DRX_P9 46
RH923 D: low for D off Default P48
10K_0201_5% RH133 V47 GPP_K8
High for D on 10K_0201_5% V48 GPP_K9 K37 PCIE_PRX_DTX_N10
PCIE_PRX_DTX_N10 46
2
W47 GPP_K10 PCIE10_RXN J37 PCIE_PRX_DTX_P10

PCIE_PRX_DTX_P10 46
2
GPP_K11 PCIE10_RXP PCIE_PTX_DRX_N10
PCIE10_TXN
C35
PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 46 NGFF SSD1
L47 B35
GPP_K0 PCIE10_TXP PCIE_PTX_DRX_P10 46
L46
EC_SCI# RH95 1 2@ 0_0201_5% U48 GPP_K1 F44 PCIE_PRX_DTX_N15
m
20,52 EC_SCI# RTS5457_SM_INT GPP_K2 PCIE15_RXN / SATA2_RXN PCIE_PRX_DTX_P15 PCIE_PRX_DTX_N15 56
RH828 1 @ 2 0_0201_5% U47 E45
43,52
RTS5457_SM_INT LCD_OD# GPP_K3 PCIE15_RXP / SATA2_RXP PCIE_PTX_DRX_N15 PCIE_PRX_DTX_P15 56
41 LCD_OD#
RH922 1 2@ 0_0201_5% N48
GPP_K4 PCIE15_TXN / SATA2_TXN
B40
PCIE_PTX_DRX_P15
0.1u_0201_10V6K 2 1 CH15
PCIE_PTX_C_DRX_N15 56 LAN
RH920 1 @ 2 0_0201_5% N47 C40 0.1u_0201_10V6K 2 1 CH16
Reserved GPP_K 1 for RGB INT 52,54 RGB_KB_INT PCIE_PTX_C_DRX_P15 56
co
P47 GPP_K5 PCIE15_TXP / SATA2_TXP
yong 0 / R46 GPP_K6 L41 PCIE_PRX_DTX_N16
GPP_K7 PCIE16_RXN / SATA3_RXN PCIE_PRX_DTX_P16 PCIE_PRX_DTX_N16 55
PCIE_PTX_DRX_P11 PCIE16_RXP / SATA3_RXP
M40
PCIE_PTX_DRX_N16 PCIE_PRX_DTX_P16 55 Card Reader
C36 B41
46 PCIE_PTX_DRX_P11 PCIE11_TXP / SATA0A_TXP PCIE16_TXN / SATA3_TXN PCIE_PTX_DRX_N16 55
k.
PCIE_PTX_DRX_N11 B36 C41 PCIE_PTX_DRX_P16
46 PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 PCIE11_TXN / SATA0A_TXN PCIE16_TXP / SATA3_TXP PCIE_PTX_DRX_P16 55
NGFF SSD1 46 PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11
F39
PCIE11_RXP / SATA0A_RXP PCIE_SATA_PRX_DTX_N17
G38 K43
46 PCIE_PRX_DTX_N11 PCIE11_RXN / SATA0A_RXN PCIE17_RXN / SATA4_RXN PCIE_SATA_PRX_DTX_N17 46
c
K44 PCIE_SATA_PRX_DTX_P17
PCIE17_RXP / SATA4_RXP PCIE_SATA_PTX_DRX_N17 PCIE_SATA_PRX_DTX_P17 46
C AR42 A42 C
PCIE_SATA_PTX_DRX_N17 46
lo
AR48 GPP_F10 / SATA_SCLOCK PCIE17_TXN / SATA4_TXN B42 PCIE_SATA_PTX_DRX_P17
GPP_F11 / SATA_SLOAD PCIE17_TXP / SATA4_TXP PCIE_SATA_PTX_DRX_P17 46
AU47
GPP_F13 / SATA_SDATAOUT0 PCIE_PRX_DTX_N18
NGFF SSD
AU46 P41
PCIE_PRX_DTX_N18 46
un
GPP_F12 / SATA_SDATAOUT1 PCIE18_RXN / SATA5_RXN R40 PCIE_PRX_DTX_P18
PCIE_PTX_DRX_N14 PCIE18_RXP / SATA5_RXP PCIE_PTX_DRX_N18 PCIE_PRX_DTX_P18 46
CH17 1 2 0.1u_0201_10V6K C39 C42
47 PCIE_PTX_C_DRX_N14 PCIE_PTX_DRX_P14 PCIE14_TXN / SATA1B_TXN PCIE18_TXN / SATA5_TXN PCIE_PTX_DRX_P18 PCIE_PTX_DRX_N18 46
CH18 1 2 0.1u_0201_10V6K D39 D42
47 PCIE_PTX_C_DRX_P14 PCIE_PRX_DTX_N14 PCIE14_TXP / SATA1B_TXP PCIE18_TXP / SATA5_TXP PCIE_PTX_DRX_P18 46
WLAN 47 PCIE_PRX_DTX_N14
D46
PCIE14_RXN / SATA1B_RXN
st
PCIE_PRX_DTX_P14 C47 AK48 SATA_LED# RH15 1 2 10K_0201_5%
47 PCIE_PRX_DTX_P14 PCIE14_RXP / SATA1B_RXP GPP_E8 / SATALED# +3VS
AH41
SATA_PTX_DRX_N13 B38 GPP_E0 / SATAXPCIE0 / SATAGP0 AJ43 SSD_DET#
48 SATA_PTX_DRX_N13 PCIE13_TXN / SATA0B_TXN GPP_E1 / SATAXPCIE1 / SATAGP1 SSD_DET# 46
fa
SATA_PTX_DRX_P13 C38 AK47
48 SATA_PTX_DRX_P13 SATA_PRX_DTX_N13 PCIE13_TXP / SATA0B_TXP GPP_E2 / SATAXPCIE2 / SATAGP2
HDD 48 SATA_PRX_DTX_N13 SATA_PRX_DTX_P13
C45
PCIE13_RXN / SATA0B_RXNGPP_F0 / SATAXPCIE3 / SATAGP3
AN47
SSD_DET1#
NGFF SSD
C46 AM46
48 SATA_PRX_DTX_P13 PCIE13_RXP / SATA0B_RXP GPP_F1 / SATAXPCIE4 / SATAGP4 SSD_DET1# 46
AM43
s-
PCIE_SATA_PTX_DRX_P12 E37 GPP_F2 / SATAXPCIE5 / SATAGP5 AM47
46 PCIE_SATA_PTX_DRX_P12 PCIE_SATA_PTX_DRX_N12 PCIE12_TXP / SATA1A_TXP GPP_F3 / SATAXPCIE6 / SATAGP6
D38 AM48
46 PCIE_SATA_PTX_DRX_N12 PCIE_SATA_PRX_DTX_P12 PCIE12_TXN / SATA1A_TXN GPP_F4 / SATAXPCIE7 / SATAGP7
NGFF SSD1 J41
m
46 PCIE_SATA_PRX_DTX_P12 PCIE_SATA_PRX_DTX_N12 PCIE12_RXP / SATA_1A_RXP
H42 AU48
46 PCIE_SATA_PRX_DTX_N12 PCIE_PTX_DRX_P20 PCIE12_RXN / SATA1A_RXN GPP_F21 / eDP_BKLTCTL PCH_EDP_PWM 39,40
B44 AV46
46 PCIE_PTX_DRX_P20 PCIE_PTX_DRX_N20 PCIE20_TXP / SATA7_TXP GPP_F20 / eDP_BKLTEN PCH_EDP_ENBKL 39,40
A44 AV44
46 PCIE_PTX_DRX_N20 PCH_EDP_ENVDD 39,40
ru
PCIE_PRX_DTX_P20 R37 PCIE20_TXN / SATA7_TXN GPP_F19 / eDP_VDDEN
46 PCIE_PRX_DTX_P20 PCIE_PRX_DTX_N20 PCIE20_RXP / SATA7_RXP THRMTRIP#_PCH
R35 AD3 RH34 1 2 620_0402_5%
46 PCIE_PRX_DTX_N20 PCIE_PTX_DRX_P19 PCIE20_RXN / SATA7_RXN THRMTRIP# PCH_PECI H_THRMTRIP# 6,25
NGFF SSD 46 PCIE_PTX_DRX_P19 PCIE_PTX_DRX_N19
D43
PCIE19_TXP / SATA6_TXP PECI
AF2
H_PM_SYNC_R
RH35 1 2 13_0402_5%
EC_PECI 6,52
46 PCIE_PTX_DRX_N19
46 PCIE_PRX_DTX_P19
46 PCIE_PRX_DTX_N19
.fo
PCIE_PRX_DTX_P19
PCIE_PRX_DTX_N19
C44
N42
M44
PCIE19_TXN / SATA6_TXN
PCIE19_RXP / SATA6_RXP
PCIE19_RXN / SATA6_RXN3 OF 13
PM_SYNC
PLTRST_CPU#
PM_DOWN
AF3
AG5
AE2
CPU_PLTRST#
H_PM_DOWN
RH13 1 2 30_0402_1%
H_PM_SYNC
CPU_PLTRST# 6
H_PM_DOWN
6
6
w
COMETLAKE-H-PCH_FCBGA874
1
B B
1 1
.1U_0402_10V6-K
CH280
.1U_0402_10V6-K
CH281
@ RH836
w
10K_0201_5%
@2 @2
2
w
PCH_EDP_PWM RH311 1 2 100K_0201_5%
PCH_EDP_ENBKL RH312 1 2 10K_0201_5%
PCH_EDP_ENVDD RH313 1 2 100K_0201_5%

A A
modify by grace 1 /

Issued Date 2018/08/02 Deciphered Date 2018/08/02 PCH (1/9) PCIe/SATA/GPPFG
A3
Y550 1.0

5 4 3 2 1
5 4 3 2 1
NEED close to PCH
EMC_NS@ 33P_0201_50V8-J 2 1 CH296 LPC_AD3

+3VS
HuiH request Reserved Cap 11/12

D D
UH1F
1
10K_0201_5%
10K_0201_5%
RH104
RH113
USB30_TX_N1 F9 BB39 LPC_AD0_R RH128 1 2@ 0_0201_5%
50 USB30_TX_N1 USB30_TX_P1 USB31_1_TXN GPP_A1 / LAD0 / ESPI_IO0 LPC_AD1_R LPC_AD0 52
F7 AW37 RH130 1 2@ 0_0201_5%
Back USB (3.0) 50 USB30_TX_P1 USB30_RX_N1 D11 USB31_1_TXP GPP_A2 / LAD1 / ESPI_IO1 AV37 LPC_AD2_R RH131 1 2@ 0_0201_5%
LPC_AD1 52
50 USB30_RX_N1 USB30_RX_P1 USB31_1_RXN GPP_A3 / LAD2 / ESPI_IO2 LPC_AD3_R LPC_AD2 52
C11 BA38 RH132 1 2@ 0_0201_5%
50 USB30_RX_P1 LPC_AD3 52
2
USB30_TX_N2 C3 USB31_1_RXP GPP_A4 / LAD3 / ESPI_IO3
55 USB30_TX_N2 USB30_TX_P2 USB31_2_TXN
D4
Right USB (3.0) 55 USB30_TX_P2 USB30_RX_N2 B9 USB31_2_TXP BE38 LPC_FRAME#
55 USB30_RX_N2 USB31_2_RXN GPP_A5 / LFRAME# / ESPI_CS0# LPC_FRAME# 52
DB 55 USB30_RX_P2
USB30_RX_P2 C9
USB31_2_RXP GPP_A6 / SERIRQ / ESPI_CS1#
AW35 SERIRQ
SERIRQ 52
BA36 TPM_SPI_IRQ# 55
C17 GPP_A7 / PIRQA# / ESPI_ALERT0# BE39 KBRST#
USB31_6_TXN GPP_A0 / RCIN# / ESPI_ALERT1# For LPC_CLK KBRST# 52
C16 BF38
G14 USB31_6_TXP GPP_A14 / SUS_STAT# / ESPI_RESET# R：0Ω to Ω
F14 USB31_6_RXN BB36 CLK_PCI_EC_R RH84 1 2 22_0402_5% CLK_PCI_EC
USB30_TX_N5 USB31_6_RXP GPP_A9 / CLKOUT_LPC0 / ESPI_CLK CLK_PCI_EC 52
C15 BB34
m
51 USB30_TX_N5 USB30_TX_P5 USB31_5_TXN GPP_A10 / CLKOUT_LPC1
B15
Back USB (3.0) 51 USB30_TX_P5 USB30_RX_N5 J13 USB31_5_TXP T48 PCH_SMI# RH821 1 @ 2 0_0201_5% 08/ 5
51 USB30_RX_N5 USB30_RX_P5 USB31_5_RXN GPP_K19 / SMI# EC_SMI# 18,52
K13 T47 1
51 USB30_RX_P5
o
USB31_5_RXP GPP_K18 / NMI# RH129 1 @ 2 10K_0201_5% +3VS
USB30_TX_P3 G12 CH265
49 USB30_TX_P3 USB31_3_TXP
.c
USB30_TX_N3 F11 AH40 33P_0402_50V8J
LEFT USB (3.0) 49 USB30_TX_N3 USB30_RX_P3 C10 USB31_3_TXN GPP_E6 / SATA_DEVSLP2 AH35 DEVSLP 2 EMC@
49 USB30_RX_P3 USB31_3_RXP GPP_E5 / SATA_DEVSLP1 DEVSLP 46
MB(AOU) 49 USB30_RX_N3
USB30_RX_N3 B10
USB31_3_RXN GPP_E4 / SATA_DEVSLP0
AL48
ck
AP47
TYPE-C_USB3_TX_P4 GPP_F9 / SATA_DEVSLP7 V0
44 TYPE-C_USB3_TX_P4 TYPE-C_USB3_TX_N4
C14
USB31_4_TXP GPP_F8 / SATA_DEVSLP6
AN37 NGFF SSD
B14 AN46
44 TYPE-C_USB3_TX_N4 TYPE-C_USB3_RX_P4 USB31_4_TXN GPP_F7 / SATA_DEVSLP5
J15 AR47 DEVSLP1
C
TYPE-C USB (3.0) 44 TYPE-C_USB3_RX_P4 DEVSLP1 46
C
lo
TYPE-C_USB3_RX_N4 K16 USB31_4_RXP GPP_F6 / SATA_DEVSLP4 AP48
44 TYPE-C_USB3_RX_N4 USB31_4_RXN GPP_F5 / SATA_DEVSLP3
6 OF 13 change D VSLP to SATA Port1 by Bing 0 1
un
change D VSLP1 to SATA Port7 by Bing 0 1
H：Slee Mode
L：Active Mode
st
fa
s-
m
ru
+3VS
.fo DDPB_DATA RH834 1 @ 2 2.2K_0201_5%

w
B B
DDPC_DATA RH33 1 @ 2 2.2K_0201_5%
UH1E
w
AL13 DDPB_CLK PAD 1 @

GPP_I5 / DDPB_CTRLCLK DDPB_DATA IT37 DDPD_DATA
AR8 RH835 1 @ 2 2.2K_0201_5%
GPP_I6 / DDPB_CTRLDATA
w
AT6 AN13 DDPC_CLK PAD 1 @

44 TYPE-C_DP_HPD GPP_I0 / DDPB_HPD0 / DISP_MISC0 GPP_I7 / DDPC_CTRLCLK DDPC_DATA IT28
AN10 AL10
42 HDMI_HPD GPP_I1 / DDPC_HPD1 / DISP_MISC1 GPP_I8 / DDPC_CTRLDATA DDPD_CLK
AP9 AL9 PAD 1 @
CNVI_EN# GPP_I2 / DDPD_HPD2 / DISP_MISC2 GPP_I9 / DDPD_CTRLCLK DDPD_DATA IT36
AL15 AR3
47 CNVI_EN# GPP_I3 / DDPF_HPD3 / DISP_MISC3 GPP_I10 / DDPD_CTRLDATA AN40
GPP_F23 / DDPF_CTRLDATA AT49
GPP_F22 / DDPF_CTRLCLK
AP41
GPP_F14 / PS_ON#
PCH_EDP_HPD AN6 M45 DDPB_CTRLDATA
39 PCH_EDP_HPD GPP_I4 / EDP_HPD / DISP_MISC4 GPP_K23 / IMGCLKOUT1 L48 The signal has a weak internal pull-down.
GPP_K22 / IMGCLKOUT0 T45
GPP_K21 H Port B is detected.
1
T46
RH310 GPP_K20
GPP_H23 / TIME_SYNC0
AJ47 * L Port B is not detected.
100K_0201_5% 5 OF 13
@ DDPC_CTRLDATA
The signal has a weak internal pull-down.
2
H Port C is detected.
* L Port C is not detected. (Default)
DDPD_CTRLDATA
The signal has a weak internal pull-down.
H Port D is detected.
A
* L Port D is not detected. (Default)
A

Issued Date 2018/08/02 Deciphered Date 2018/08/02 PCH (2/9) USB3/GPPAEFGHI
A3 1.0
5 4 3 2 1
5 4 3 2 1
MC request
08/ 1
HDA_BIT_CLK
+3VALW_PCH
HDA_SDO This signal has a weak internal pull-down. 1
EMC_NS@
* 0 = Enable security measures defined in the Flash Descriptor.
1 = Disable Flash Descriptor Security (override). This CH303
1
22P_0201_258J
strap should only be asserted high using external pull- RH25 2
up in manufacturing/debug environments ONLY. 1K_0201_5%
@
2
@ +1.2V
RH9 1 2 0_0201_5%
52 ME_FLASH
UH1D
RH805 1 2 33_0402_5% HDA_BIT_CLK BD11 BF36
58 PCH_HDA_BIT_CLK HDA_BCLK / I2S0_SCLK GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
1
PCH_HDA_SDIN0 BE11 AV32 PM_CLKRUN#
D 58 PCH_HDA_SDIN0 HDA_SDOUT HDA_SDI0 / I2S0_RXD GPP_A8 / CLKRUN# D
RH806 1 2 33_0402_5% BF12 RH756
58 PCH_HDA_SDOUT HDA_SYNC HDA_SDO / I2S0_TXD
RH804 1 2 33_0402_5% BG13 BF41 470_0201_5%
58 PCH_HDA_SYNC HDA_SYNC / I2S0_SFRM GPD11 / LANPHYPC
PLAC N AR PCH 1 HDA_RST# BE10 BD42
@ PAD
2
TH39 BF10 HDA_RST# / I2S1_SCLK GPD9 / SLP_WLAN# PM_SLP_WLAN# 47
BE12 HDA_SDI1 / I2S1_RXD BB46
BD12 I2S1_TXD / SNDW2_DATA DRAM_RESET# BE32 PCH_DRAMRST# 12,13
I2S1_SFRM / SNDW2_CLK GPP_B2 / VRALERT# BF33
PLAC N AR PCH GPP_B1 / GSPI1_CS1# / TIME_SYNC1 BE29
RH754 1 2 30_0402_5% PROC_AUDIO_SDO_PCH AM2 GPP_B0 / GSPI0_CS1# R47
8 PROC_AUDIO_SDO_CPU HDACPU_SDO GPP_K17 / ADR_COMPLETE
AN3 AP29 @
8 PROC_AUDIO_SDI_CPU 1 2 30_0402_5% PROC_AUDIO_CLK_PCH HDACPU_SDI GPP_B11 / I2S_MCLK SYS_PWROK_R
RH755 AM3 AU3 RH193 1 2 0_0201_5%
8 PROC_AUDIO_CLK_CPU HDACPU_SCLK SYS_PWROK SYS_PWROK 52
@
AV18 BB47 WAKE# RH69 1 2 0_0201_5%
AW18 GPP_D8 / I2S2_SCLK WAKE# BE40 SLP_A# 1 PCIE_WAKE# 47,52,56
CNVI_MODEM_CLKREQ GPP_D7 / I2S2_RXD GPD6 / SLP_A# SLP_LAN# TH30 PAD @
BA17 BF40 1
CNVI_RF_RESET# BE16 GPP_D6 / I2S2_TXD / MODEM_CLKREQ SLP_LAN# BC28 SLP_S0 1 TH31 PAD @
GPP_D5 / I2S2_SFRM / CNV_RF_RESET# GPP_B12 / SLP_S0# TH32 PAD @
om
BF15 BF42 PM_SLP_S3#_R RH70 1 2@ 0_0201_5%
BD16 GPP_D20 / DMIC_DATA0 / SNDW4_DATA GPD4 / SLP_S3# BE42 PM_SLP_S4#_R PM_SLP_S3# 52
RH71 1 2@ 0_0201_5%
AV16 GPP_D19 / DMIC_CLK0 / SNDW4_CLK GPD5 / SLP_S4# BC42 PM_SLP_S5#_R 1 PM_SLP_S4# 52
GPP_D18 / DMIC_DATA1 / SNDW3_DATA GPD10 / SLP_S5# TH33 PAD @
AW15
GPP_D17 / DMIC_CLK1 / SNDW3_CLK BE45 SUSCLK
GPD8 / SUSCLK SUSCLK 47
BF44 BATLOW#
GPD0 / BATLOW# BE35 SUSACK#_R
PCH_RTCRST# BE47 GPP_A15 / SUSACK# BC37 SUSWARN#_R RH745 1 @ 2 0_0201_5%
52 PCH_RTCRST# PCH_SRTCRST# RTCRST# GPP_A13 / SUSWARN# / SUSPWRDNACK
BD46
SRTCRST#
.c
@
RH12 1 2 0_0201_5% PCH_PWROK_R AY42 BG44 PCH_LAN_WAKE#
52 PCH_PWROK PCH_RSMRST#_R PCH_PWROK GPD2 / LAN_WAKE# PCH_AC_PRESENT_R
RH14 1 2@ 0_0201_5% BA47 BG42 RH76 1 2@ 0_0201_5%
52,61 EC_RSMRST# RSMRST# GPD1 / ACPRESENT BD39 SLP_SUS# 1 AC_PRESENT 52
@
PCH_DPWROK_R SLP_SUS# PM_PWRBTN#_R TH34 PAD @
RH239 1 2 0_0201_5% AW41 BE46 RH75 1 2@ 0_0201_5%
SMB_ALERT# BE25 DSW_PWROK GPD3 / PWRBTN# AU2 SYS_RESET# PBTN_OUT# 52,61
ck
PCH_SMBCLK GPP_C2 / SMBALERT# SYS_RESET# SYS_RESET# 61
BE26 AW29
PCH_SMBDATA BF26 GPP_C0 / SMBCLK GPP_B14 / SPKR AE3 PCH_BEEP 58
SMB0_ALERT# BF24 GPP_C1 / SMBDATA CPUPWRGD H_CPUPWRGD 6
RH925 1 2@ 0_0201_5%
GPP_C5 / SML0ALERT# TOP_SWAP_EN 52
SML0CLK BF25 AL3
BE24 GPP_C3 / SML0CLK ITP_PMODE AH4 ITP_PMODE 61
SML0DATA
SMB1_ALERT# GPP_C4 / SML0DATA PCH_JTAGX JTAGX 61
BD33 AJ4 08/15
52,60 SMB1_ALERT# GPP_B23 / SML1ALERT# / PCHHOT# PCH_JTAG_TMS PCH_TMS 61
lo
SML1CLK BF27 AH3
+3VALW_PCH BE27 GPP_C6 / SML1CLK PCH_JTAG_TDO AH2 PCH_TDO 61
SML1DATA
GPP_C7 / SML1DATA PCH_JTAG_TDI PCH_TDI 61
AJ3
1 2 10K_0201_5% SUSWARN#_R 4 OF 13 PCH_JTAG_TCK PCH_TCK 61
RH56 @
un
+3VALW
RH17 1 2 10K_0201_5% PM_PWRBTN#_R

PCH_AC_PRESENT_R
CMOS
C RH58 1 2 10K_0201_5% C
st
RH60 1 2 10K_0201_5% BATLOW#
RH80 1 2 4.7K_0201_5% WAKE#
RH747 1 2 10K_0201_5% PCH_LAN_WAKE#
1
VCCRTC CH4 @ @ DH13
fa
+3VS 1U_0402_6.3V6K RH284 1 2 0_0201_5% 1 2 EC_RSMRST#
68,69 ALW_PWRGD
RH3 1 2 20K_0402_5% 2 PCH_SRTCRST# RB751V-40_SOD323-2
RH67 1 2 10K_0201_5% SYS_RESET#
RH65 1 2 8.2K_0201_5% PM_CLKRUN#
RH4 1 2 20K_0402_5% PCH_RTCRST#
s-
1 @
1
1 CH5 JCMOS1
CH1 1U_0402_6.3V6K SHORT PADS RSMRST# sequence control circuit
1U_0402_6.3V6K
2
2
2@
m
RH921 1 @ 2 10K_0201_5% PCH_AC_PRESENT_R
RH18 1 2 100K_0201_5% SYS_PWROK_R
RH54 1 2 10K_0201_5% PCH_PWROK_R
RH59 1 2 100K_0201_5% PCH_RSMRST#_R
CH304 1 2 0.1U_25V_K_X5R_0402 MC request
ru
EMC_NS@ lace close to PCH ball
RH61 1 2 100K_0201_5% PCH_DPWROK_R 08/
@ +3VALW_PCH AS EMC request
close to PCH
HDA_SDOUT
RH28 1 @ 2 1K_0201_5% PCH_BEEP PCH_PWROK_R SYS_PWROK_R PCH_DPWROK_R PCH_HDA_SDIN0
+3VALW_PCH
.fo
ST
Ph
K
R
 
/D
g
G
P
P
_
Bh¨

4¨T
RPH3 @
T


w
SS
ww
k


 

 






(
D

-f


w

)

1 4 SML0CLK 1 1 1 1 1
CH84 EMC_NS@
.1U_0402_10V6-K
CH85 EMC_NS@
.1U_0402_10V6-K
CH83 EMC_NS@
.1U_0402_10V6-K
CH283
2.2P_0402_50V8-C
CH284
2.2P_0402_50V8-C
2 3 SML0DATA 〃
*
E




〃
2.2K_0404_4P2R_5%
2 2 2 2 2
EMC_NS@
EMC_NS@
RH765 1 2 2.2K_0201_5% SMB_ALERT# RH768 1 @ 2 2.2K_0201_5%
RH766 1 @ 2 2.2K_0201_5% SMB0_ALERT# RH769 1 @ 2 2.2K_0201_5%
RH767 1 @ 2 2.2K_0201_5% SMB1_ALERT# RH770 1 @ 2 2.2K_0201_5%
Strap
GPP_C2 /SMBALERT#
w
This signal has a weak internal pull-down.
w
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality).
1 = Enable Intel ME Crypto Transport Layer Security DIMM1, DIMM2 RPH8 +3VS GPU, EC, Thermal Sensor
1 4
(TLS) cipher suite (with confidentiality). Must be +3VS +3VALW_PCH
2
B RPH4 RPH7 2 3 B
G
2
pulled up to support Intel AMT with TLS.(Default) 1 4 2N7002KDWH 1 4

G
+3VALW_PCH Vth= min 1V, max 2.5V +3VS

2 3 2 3 2.2K_0404_4P2R_5%
ESD 2KV
GPP_C5 /SML0ALERT#
This signal has a weak internal pull-down. 2.2K_0404_4P2R_5% 2.2K_0404_4P2R_5% SML1CLK 6 1 EC_SMB_CK2
S
PCH_SMBCLK SMB_CLK_S3 EC_SMB_CK2 28,52,59,60
6 1
D
0 = LPC is selected (for EC). (Default) 69 PCH_SMBCLK
S
SMB_CLK_S3 12,13
5
QH2A L2N7002KDW1T1G_SOT363-6
D
1 = eSPI is selected (for EC).
G
5
QH1A L2N7002KDW1T1G_SOT363-6
G
GPP_B23 /SML1ALERT# /PCHHOT#

0 = Disable Intel DCI-OOB (Default) SML1DATA 3 4 EC_SMB_DA2
S
1 = Enable Intel DCI-OOB PCH_SMBDATA 3 4 SMB_DATA_S3 EC_SMB_DA2 28,52,59,60
D
69 PCH_SMBDATA
S
Note:When used as PCHHOT# and strap low, a 150K SMB_DATA_S3 12,13

QH2B L2N7002KDW1T1G_SOT363-6
D
pull-up is needed to ensure it does not override the QH1B L2N7002KDW1T1G_SOT363-6

internal pull-down strap sampling.
+3VS
RH849 1 @ 2 150K_0402_5% SMB1_ALERT#
CNVI_RF_RESET#
CNVI_MODEM_CLKREQ CNVI_RF_RESET# 47
CNVI_MODEM_CLKREQ 47
1
Place close to PCH RH830

yong 0 / 5 71.5K_0402_1% RH829 Place close to PCH
CNVI@ 75K_0402_5% yong 0 / 5
CNVI@
2
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 PCH (3/9) HDA,RTC,SMBUS,PM

D 1.0
5 4 3 2 1
5 4 3 2 1
D UH1G D
BE33
D7 GPP_A16 / CLKOUT_48 Y4
6 PCH_CPU_NSSC_CLK CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_P
C6 Y3
6 PCH_CPU_NSSC_CLK# CLKOUT_CPUNSSC_N CLKOUT_ITPXDP_N
B8 A6
6 PCH_CPU_BCLK CLKOUT_CPUPCIBCLK_P
CLKOUT_CPUBCLK_P PCH_CPU_PCIBCLK 6
C8 B6
6 PCH_CPU_BCLK# CLKOUT_CPUPCIBCLK_N
CLKOUT_CPUBCLK_N PCH_CPU_PCIBCLK# 6
AJ6
XTAL24_OUT U9 CLKOUT_PCIE_N0 AJ7
XTAL24_IN U10 XTAL_OUT CLKOUT_PCIE_P0 AH9
XTAL_IN CLKOUT_PCIE_N1 AH10
RH6 1 2 60.4_0402_1% PCH_CLK_BIASREF T3 CLKOUT_PCIE_P1
XCLK_BIASREF AE14 CLK_PCIE_WLAN#
PDG 0Ω±1 % PCH_RTCX1 CLKOUT_PCIE_N2 CLK_PCIE_WLAN CLK_PCIE_WLAN# 47
CRB 0 Ω±1% PCH_RTCX2
BA49
RTCX1 CLKOUT_PCIE_P2
AE15
CLK_PCIE_WLAN 47 WLAN
BA48
0 /11 RTCX2 AE6 CLK_PCIE_LAN#
Y NG CLKOUT_PCIE_N3 CLK_PCIE_LAN CLK_PCIE_LAN# 56
BF31 AE7 LAN
om
GPP_B5 / SRCCLKREQ0# CLKOUT_PCIE_P3 CLK_PCIE_LAN 56
BE31
+3VS WLAN_CLKREQ# AR32 GPP_B6 / SRCCLKREQ1# AC2
47 WLAN_CLKREQ# LAN_CLKREQ# GPP_B7 / SRCCLKREQ2# CLKOUT_PCIE_N4
BB30 AC3
56 LAN_CLKREQ# GPP_B8 / SRCCLKREQ3# CLKOUT_PCIE_P4
BA30
LAN_CLKREQ# SSD_CLKREQ1# GPP_B9 / SRCCLKREQ4# CLK_PCIE_SSD1#
RH89 1 2 10K_0201_5%
46 SSD_CLKREQ1#
AN29
GPP_B10 / SRCCLKREQ5# CLKOUT_PCIE_N5
AB2
CLK_PCIE_SSD1# 46 M.2 SSD1
.c
AE47 AB3 CLK_PCIE_SSD1
WLAN_CLKREQ# Modify by david 0 / 5 SSD_CLKREQ# GPP_H0 / SRCCLKREQ6# CLKOUT_PCIE_P5 CLK_PCIE_SSD1 46
RH90 1 2 10K_0201_5% AC48
46 SSD_CLKREQ# GPP_H1 / SRCCLKREQ7#
AE41 W4
GPP_H2 / SRCCLKREQ8# CLKOUT_PCIE_N6
ck
RH912 1 2 10K_0201_5% SSD_CLKREQ1# CARD_CLKREQ# AF48 W3
55 CARD_CLKREQ# GPP_H3 / SRCCLKREQ9# CLKOUT_PCIE_P6
AC41
RH917 1 2 10K_0201_5% SSD_CLKREQ# GPU_CLKREQ# AC39 GPP_H4 / SRCCLKREQ10# W7 CLK_PCIE_SSD#
25 GPU_CLKREQ# GPP_H5 / SRCCLKREQ11# CLKOUT_PCIE_N7 CLK_PCIE_SSD CLK_PCIE_SSD# 46
C AE39 W6
CLK_PCIE_SSD 46 M.2 SSD C
lo
RH918 1 2 10K_0201_5% CARD_CLKREQ# AB48 GPP_H6 / SRCCLKREQ12# CLKOUT_PCIE_P7
AC44 GPP_H7 / SRCCLKREQ13# AC14
RH94 1 2 10K_0201_5% GPU_CLKREQ# AC43 GPP_H8 / SRCCLKREQ14# CLKOUT_PCIE_N8 AC15 Modify by david 0 / 5
un
GPP_H9 / SRCCLKREQ15# CLKOUT_PCIE_P8
RH852 1 @ 2 10K_0201_5% V2 U2 CLK_PCIE_CARD#
CLKOUT_PCIE_N15 CLKOUT_PCIE_N9 CLK_PCIE_CARD CLK_PCIE_CARD# 55
V3
CLKOUT_PCIE_P15 CLKOUT_PCIE_P9
U3
CLK_PCIE_CARD 55 CARD READER
st
T2 AC9
T1 CLKOUT_PCIE_N14 CLKOUT_PCIE_N10 AC11
fa
AA1 AE9 CLK_PCIE_GPU#
CLKOUT_PCIE_N13 CLKOUT_PCIE_N11 CLK_PCIE_GPU CLK_PCIE_GPU# 25
Y2
AE11
CLK_PCIE_GPU 25 GPU
AC7 R6
s-
CLKOUT_PCIE_N12 CLKIN_XTAL CLKIN_XTAL_LCP 47
AC6 RH824 1 2 10K_0402_5%
CLKOUT_PCIE_P127 OF 13
m
change from 0ohm to 10K on 080 by Bing
ru
.fo PCH_RTCX1
RH92 2 1 200K_0402_1%
w
B B
RH1 1 2 10M_0402_5% PCH_RTCX2
YH2
w
@
2 3 XTAL24_IN_LR RH30 1 2 0_0402_5% XTAL24_IN YH1
GND1 OSC2
w
@ 1 2
XTAL24_OUT RH32 1 2 0_0402_5% XTAL24_OUT_LR 1 4
OSC1 GND2 32.768KHZ_9PF_X1A0001410002
1 1 1 1
24MHZ_6PF_7V24000032
CH9 CH10 CH2 CH3
15P_0402_50V8J 15P_0402_50V8J 9P_0402_50V8-B 8P_50V_B_NPO_0402
2 2 2 2
Stone 051
Default De-Po if want to Po in B M need change PN to SM07000 00
LH78 @
XTAL24_IN 1 2 XTAL24_IN_LR
1 2
XTAL24_OUT 4 3 XTAL24_OUT_LR
4 3
EXC24CH500U_4P
A A

Issued Date 2018/08/02 Deciphered Date 2018/08/02 PCH (3/9) CLOCK,GPPBH
A3 1.0
5 4 3 2 1
5 4 3 2 1
SPI_SI_C
52,55 SPI_SI_C
SPI_SO_C
52,55 SPI_SO_C
SPI_CLK_PCH_C
52,55 SPI_CLK_PCH_C
D D
UH1A
BE36 AV29
GPP_A11 / PME# / SD_VDD2_PWR_EN# GPP_B13 / PLTRST# PLT_RST# 28,46,47,52,55,56
1
R15
R13 RSVD_1 Y47 RH43
RSVD_2 GPP_K16 / GSXCLK Y46 100K_0201_5%
GPP_K12 / GSXDOUT Y48
GPP_K13 / GSXSLOAD W46
2
RH826 1 2 0_0201_5% AL37 GPP_K14 / GSXDIN AA45
1 AN35 VSS_1 GPP_K15 / GSXSRESET#
@ PAD TH37 TP_1 @
SPI_SI_R0 RH109 1 2 33_0402_5% SPI_SI_C RH305 1 2 1/20W_10_1%_0201 SPI_SI AU41 AL47 PCH_E3_SMI# RH926 1 2 0_0201_5%
SPI_SO_R0 1 2 33_0402_5% SPI_SO_C SPI_SO SPI0_MOSI GPP_E3 / CPU_GP0 EC_SMI# 15,52
RH111 RH306 1 2 1/20W_10_1%_0201 BA45 AM45
SPI_CS0#_R RH107 1 2@ 0_0201_5% SPI_CS0# AY47 SPI0_MISO GPP_E7 / CPU_GP1 BF32 RH927 1 @ 2 10K_0201_5%
SPI_CLK_PCH_0 52 SPI_CS0#_R 1 SPI0_CS0# GPP_B3 / CPU_GP2 +3VS
2 33_0402_5% SPI_CLK_PCH_CRH307 1 2 1/20W_10_1%_0201 SPI_CLK_PCH AW47 BC33
RH105 AW48 SPI0_CLK GPP_B4 / CPU_GP3
SPI_WP#_R0 RH250 1 2 33_0402_5% SPI_WP#_C RH308 1 2 1/20W_10_1%_0201 SPI0_CS1# AE44 +3VALW_PCH
SPI_WP# AY48 GPP_H18 / SML4ALERT# AJ46
SPI_HOLD#_R0 61 SPI_WP#
RH252 1 2 33_0402_5% SPI_HOLD#_C RH309 1 2 1/20W_10_1%_0201 SPI_HOLD# BA46 SPI0_IO2 GPP_H17 / SML4DATA AE43
SPI_CS2# AT40 SPI0_IO3 GPP_H16 / SML4CLK AC47 RH825 1 2 100K_0402_5% Follow DS:100K
55 SPI_CS2# BE19 SPI0_CS2# GPP_H15 / SML3ALERT# AD48
BF19 GPP_D1 / SPI1_CLK / SBK1 / BK1 GPP_H14 / SML3DATA AF47 Strap PIN
BF18 GPP_D0 / SPI1_CS# / SBK0 / BK0 GPP_H13 / SML3CLK AB47 RH753 1 @ 2 4.7K_0402_5%
BE18 GPP_D3 / SPI1_MOSI / SBK3 / BK3 GPP_H12 / SML2ALERT# AD47
m
BC17 GPP_D2 / SPI1_MISO / SBK2 / BK2 GPP_H11 / SML2DATA AE48
BD17 GPP_D22 / SPI1_IO3 GPP_H10 / SML2CLK BB44 RH743 2 1 1M_0402_5%
GPP_D21 / SPI1_IO2 1 OF 13 INTRUDER# VCCRTC
o
.c
+3VALW_PCH
change to 100K ull-u on 0703 GPP_H15 /SML3ALERT# (Strap reserved)
ck
External pull-up is required. Recommend 100K if pulled
RH123 1 2 100K_0201_5% SPI_WP# up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be
C RH125 1 2 100K_0201_5% SPI_HOLD# RH771 1 @ 2 1K_0201_5% any on-board device driving it to opposite direction C
during strap sampling.
lo
+3V_SPI Power Plane: Primary Well
RH772 1 @ 2 1K_0201_5% SPI_SO GPP_H12 /SML2ALERT#

This signal has a weak internal pull-down.
*
un
0 = Master Attached Flash Sharing (MAFS) enabled
2
RH500 DH14 RH773 1 2 100K_0201_5% SPI_SI RH833 1 @ 2 1K_0201_5% (Default)
SPI_SI_XDP 61 1 = Slave Attached Flash Sharing (SAFS) enabled.
RB520CM-30T2R_VMN2M2
0_0402_5% NPI@ change to 100K ull-u on 070 Warning: This strap must be configured to ‘0’
1
(SAFS is disabled) if the eSPI or LPC
1
+3VALW_PCH +3V_SPI strap is configured to ‘0’ (eSPI i s
@ disabled)
st
@ SPI0_MOSI,SPI0_MISO,SPI0_IO[2:3] all have internal pull up
RH171 1 2 0_0402_5% Notes:
SPI0_MOSI 1. The internal pull-down is disabled after RSMRST#
+3VS 128Mb Flash ROM 1 External pull-up is required. Recommend 100K if pulled de-asserts.
UH3 up to 3.3V or 75K if pulled up to 1.8V. 2. This signal is in the primary well.
CH13
fa
RH172 1 @ 2 0_0402_5% SPI_CS0#_R 1 8 .1U_0402_10V6-K This strap should sample HIGH. There should NOT be
/CS VCC any on-board device driving it to opposite direction
SPI_SO_R0 2 7 SPI_HOLD#_R0 2 during strap sampling.
DO(IO1) /HOLD(IO3)
+3V_SPI
s-
SPI_WP#_R0 3 6 SPI_CLK_PCH_0 SPI0_IO2
1. If support DS3, connect to +3VS and don't support EC mirror code; /WP(IO2) CLK External pull-up is required. Recommend 100K if pulled
SPI_SI_R0 up to 3.3V or 75K if pulled up to 1.8V.
* 2. If don't support DS3, connect to +3VALW_PCH and support EC mirror code. 4
GND DI(IO0)
5
This strap should sample HIGH. There should NOT be
2
any on-board device driving it to opposite direction
m
1
RH119 CH268 during strap sampling.
W25Q128JVSIQ_SO8 10_0402_5% 10P_0402_50V8J
EMC_NS@ @ SPI0_IO3
2 External pull-up is required. Recommend 100K if pulled
1
up to 3.3V or 75K if pulled up to 1.8V.
ru
1
CH11 This strap should sample HIGH. There should NOT be
10P_0402_50V8J any on-board device driving it to opposite direction
EMC_NS@ during strap sampling.
2
.fo
w
B B
w
w
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 PCH (5/9) SPI,SMBUS,GPPBEGH

A2
Y550 1.0

5 4 3 2 1
5 4 3 2 1
UH1B
DMI_CTX_PRX_N0 K34 J3 USB20_N0
5 DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 DMI0_RXN USB2N_1 USB20_P0 USB20_N0 50
J35 J2
5 DMI_CTX_PRX_P0 DMI_CRX_PTX_N0 C33 DMI0_RXP USB2P_1 N13 USB20_N1 USB20_P0 50 BACK USB (3.0)
5 DMI_CRX_PTX_N0 DMI_CRX_PTX_P0 DMI0_TXN USB2N_2 USB20_P1 USB20_N1 49
B33 N15
5
5
DMI_CRX_PTX_P0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N1 G33 DMI0_TXP USB2P_2 K4 USB20_N2 USB20_P1 49 LEFT USB (3.0)
DMI_CTX_PRX_P1 DMI1_RXN USB2N_3 USB20_P2 USB20_N2 55
D F34 K3 D
5 DMI_CTX_PRX_P1 DMI_CRX_PTX_N1 C32 DMI1_RXP USB2P_3 M10
USB20_P2 55 Right USB (3.0)
5 DMI_CRX_PTX_N1 DMI_CRX_PTX_P1 DMI1_TXN USB2N_4 TYPE-C_PCH_USB20_N4 45
B32 L9 Type C
5 DMI_CRX_PTX_P1 DMI_CTX_PRX_N2 DMI1_TXP USB2P_4 TYPE-C_PCH_USB20_P4 45
5 DMI_CTX_PRX_N2 K32 M1
DMI_CTX_PRX_P2 J32 DMI2_RXN USB2N_5 L2
5 DMI_CTX_PRX_P2 DMI_CRX_PTX_N2 DMI2_RXP USB2P_5 USB20_N6
C31 K7
5 DMI_CRX_PTX_N2 DMI_CRX_PTX_P2 DMI2_TXN USB2N_6 USB20_P6 USB20_N6 41
B31 K6
5
5
DMI_CRX_PTX_P2
DMI_CTX_PRX_N3
DMI_CTX_PRX_N3 G30 DMI2_TXP USB2P_6 L4 USB20_N7 USB20_P6 41 Camera
DMI_CTX_PRX_P3 DMI3_RXN USB2N_7 USB20_P7 USB20_N7 54
F30 L3
5 DMI_CTX_PRX_P3 DMI_CRX_PTX_N3 C29 DMI3_RXP USB2P_7 G4
USB20_P7 54 RGB
5 DMI_CRX_PTX_N3 DMI_CRX_PTX_P3 DMI3_TXN USB2N_8
B29 G5
5 DMI_CRX_PTX_P3 DMI3_TXP USB2P_8 USB20_N9
A25 M6
RSVD_3 USB2N_9 USB20_P9 USB20_N9 53
m
B25 N8
P24 RSVD_4 USB2P_9 H3 USB20_N10 USB20_P9 53 AG
RSVD_5 USB2N_10 USB20_P10 USB20_N10 51
R24 H2
C26 RSVD_6 USB2P_10 R10 USB20_P10 51 USB (3.0)
B26 RSVD_7 USB2N_11 P9 +3VALW_PCH
co
F26 RSVD_8 USB2P_11 G1 RPH5
G26 RSVD_9 USB2N_12 G2
B27 RSVD_10 USB2P_12 N3 USB_OC4# 4 5
C27 RSVD_11 USB2N_13 N2 USB_OC7# 3 6
L26 RSVD_12 USB2P_13 E5 USB20_N14 USB_OC6# 2 7
RSVD_13 USB2N_14 USB20_P14 USB20_N14 47 USB_OC3#
M26 F6 1 8
k.
D29 RSVD_14 USB2P_14 USB20_P14 47 Bluetooth
E28 RSVD_15 AH36 USB_OC0# 10K_1206_8P4R_5%
K29 RSVD_16 GPP_E9 / USB2_OC0# AL40 USB_OC1#
M29 RSVD_17 GPP_E10 / USB2_OC1# AJ44 USB_OC2# USB_OC1# 55 USB 3.1 RPH6
oc
RSVD_18 GPP_E11 / USB2_OC2# AL41 USB_OC3# USB_OC2# 49 USB Charger USB_OC0# 4 5
G17 GPP_E12 / USB2_OC3# AV47 USB_OC4# USB_OC3# 50 USB 3.1 USB_OC5# 3 6
F16 PCIE1_RXN / USB31_7_RXNGPP_F15 / USB2_OC4# AR35 USB_OC5# USB_OC2# 2 7
A17 PCIE1_RXP / USB31_7_RXPGPP_F16 / USB2_OC5# AR37 USB_OC6# USB_OC1# 1 8
PCIE1_TXN / USB31_7_TXNGPP_F17 / USB2_OC6# USB_OC7#
B17
PCIE1_TXP / USB31_7_TXPGPP_F18 / USB2_OC7#
AV43 50ohm single ended chanel
l
R21
P21 PCIE2_RXN / USB31_8_RXN F4 RH127 2 1 113_0402_1% 10K_1206_8P4R_5%
un
B18 PCIE2_RXP / USB31_8_RXP USB2_COMP F3 RH184 2 1 1K_0402_5%
C18 PCIE2_TXN / USB31_8_TXN USB2_VBUSSENSE U13 +3VALW_PCH
K18 PCIE2_TXP / USB31_8_TXP RSVD_19 G3 RH183 2 1 1K_0402_5%
J18 PCIE3_RXN / USB31_9_RXN USB2_ID
B19 PCIE3_RXP / USB31_9_RXP BE41 GPD7 RH814 1 2 100K_0201_5%
C19 PCIE3_TXN / USB31_9_TXN GPD7
st
C N18 PCIE3_TXP / USB31_9_TXP G45 C
R18 PCIE4_RXN / USB31_10_RXN PCIE24_TXP G46
Strap Pin, refer PDG
D20 PCIE4_RXP / USB31_10_RXP PCIE24_TXN Y41
C20 PCIE4_TXN / USB31_10_TXN PCIE24_RXP Y40
fa
PCIE4_TXP / USB31_10_TXP PCIE24_RXN
2
F20 G48 GPD7:
G20 PCIE5_RXN PCIE23_TXP G49 RH837 ternal ull-u is required Recommend 100 kohm
B21 PCIE5_RXP PCIE23_TXN W44 This stra should sam le HIGH
PCIE5_TXN PCIE23_RXP 10K_0201_5% There should N T be any on-board device
A22 W43 @
PCIE5_TXP PCIE23_RXN driving it to o osite direction during stra
s-
K21 H48 sam ling
1
J21 PCIE6_RXN PCIE22_TXP H47
D21 PCIE6_RXP PCIE22_TXN U41
C21 PCIE6_TXN PCIE22_RXP U40
B23 PCIE6_TXP PCIE22_RXN F46
m
C23 PCIE7_TXP PCIE21_TXP G47
J24 PCIE7_TXN PCIE21_TXN R44
L24 PCIE7_RXP PCIE21_RXP T43
F24 PCIE7_RXN PCIE21_RXN
ru
G24 PCIE8_RXN
B24 PCIE8_RXP
C24 PCIE8_TXN
PCIE8_TXP 2 OF 13
.fo
w
w
w
B B
UH1M
@ BD4 CNVI_WR_CLK_N
PXS_PWREN PXS_PWREN_R CNV_WR_CLKN BE3 CNVI_WR_CLK_P CNVI_WR_CLK_N 47
RH314 1 2 0_0201_5% AW13
28,62 PXS_PWREN PCH_GPU_EVENT# GPP_G0 / SD_CMD CNV_WR_CLKP CNVI_WR_CLK_P 47
BE9
28 PCH_GPU_EVENT# GPP_G1 / SD_DATA0
BF8 BB3 CNVI_WR_D0_N
GPP_G2 / SD_DATA1 CNV_WR_D0N BB4 CNVI_WR_D0_P CNVI_WR_D0_N 47
@ BF9
PXS_RST# PXS_RST#_R GPP_G3 / SD_DATA2 CNV_WR_D0P BA3 CNVI_WR_D1_N CNVI_WR_D0_P 47
RH315 1 2 0_0201_5% BG8
+1.8VALW 28 PXS_RST# GPP_G4 / SD_DATA3 CNV_WR_D1N BA2 CNVI_WR_D1_P CNVI_WR_D1_N 47
BE8
V1 0 GPP_G5 / SD_CD# CNV_WR_D1P CNVI_WR_D1_P 47
BD8
PCH_FB_GC6_EN AV13 GPP_G6 / SD_CLK BC5 CNVI_WT_CLK_N
28 PCH_FB_GC6_EN GPP_G7 / SD_WP CNV_WT_CLKN BB6 CNVI_WT_CLK_P CNVI_WT_CLK_N 47
RH815 2 1 10K_0201_5% GPP_J4 CNVI_WT_CLK_P 47
RH809 1 2 20K_0402_5% GPP_J6 RH812 1 @ 2 2.2K_0402_5% AP3 CNV_WT_CLKP
RH810 1 @ 2 2.2K_0201_5% GPP_J9 RH808 1 @ 2 2.2K_0201_5% +1.8VALW AP2 GPP_I11 / M2_SKT2_CFG0 BE6 CNVI_WT_D0_N
GPP_I12 / M2_SKT2_CFG1 CNV_WT_D0N BD7 CNVI_WT_D0_P CNVI_WT_D0_N 47
AN4 CNVI_WT_D0_P 47
AM7 GPP_I13 / M2_SKT2_CFG2 CNV_WT_D0P BG6 CNVI_WT_D1_N
Strap Pin GPP_I14 / M2_SKT2_CFG3 CNV_WT_D1N BF6 CNVI_WT_D1_P CNVI_WT_D1_N 47
CNV_WT_D1P BA1 CNVI_WT_D1_P 47
1
1
AV6 RH303 1 CNVI@ 2

RH831 RH832 AY3 GPP_J0 / CNV_PA_BLANKING CNV_WT_RCOMP 150_0402_1%
20K_0402_5% 20K_0402_5% AR13 GPP_J1 / CPU_C10_GATE# B12 PCIE_RCOMN
AV7 GPP_J11 / A4WP_PRESENT PCIE_RCOMPN A13 PCIE_RCOMP RH741 2 1 100_0402_1%
GPP_J10 PCIE_RCOMPP BE5 SD_1P8_RCOMP CAD Note:
AW3 RH742 1 2 200_0402_1% Trace width=15 mils ,Spacing=15mil
2
2
AT10 GPP_J2 SD_1P8_RCOMP BE4 SD_3P3_RCOMP RH819 1 2 200_0402_1%

RH302 1 CNVI@ 2 22_0402_5% GPP_J4 AV4 GPP_J3 SD_3P3_RCOMP BD1 Max length= N/A mils.
47 CNVI_BRI_DT GPP_J4 / CNV_BRI_DT / UART0B_RTS#
GPPJ_RCOMP_1P8_1 BE1 RCOMP_1P8
47 CNVI_BRI_RSP AY2 RH820 1 2 200_0402_1% 0602 Stone: Add refer to EDS&CRB
RH304 1 CNVI@ 2 22_0402_5% GPP_J6 BA4 GPP_J5 / CNV_BRI_RSP / UART0B_RXD
GPPJ_RCOMP_1P8_2 BE2
47 CNVI_RGI_DT GPPJ_RCOMP_1P8_3
GPP_J6 / CNV_RGI_DT / UART0B_TXD
47 CNVI_RGI_RSP AV3
AW2 GPP_J7 / CNV_RGI_RSP / UART0B_CTS# Y35
GPP_J9 AU9 GPP_J8 / CNV_MFUART2_RXD RSVD_28 Y36
GPP_J9 / CNV_MFUART2_TXD RSVD_29
BC1 CNVI_LDO_MON 1
RSVD_30 TH38 @
AL35
TP_2
13 OF 13
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 Blank

Custom 1.0
5 4 3 2 1
5 4 3 2 1
+3VS
Bit Boot BI S
GPP_B22 /GSPI1_MOSI (Boot BIOS Strap Bit BBS) Destination
This Signal has a weak internal pull-down.
This field determines the destination of accesses to the
RH854 2 @ 1 10K_0201_5% VGA_ALERT#_PCH BIOS memory range. Also controllable using Boot BIOS 0 SPI (Default)
Destination bit (Bus0, Device31, Function0, offset DCh,bit6)
0: SPI(default)
1: LPC
D Notes: 1 LPC D
1. The internal pull-down is disabled after PCH_PWROK is high.
4. This signal is in the primary well.
+3VALW_PCH
Strap PIN SKU ID +3VALW_PCH

UH1K
RH750 1 @ 2 4.7K_0201_5% BA26
PCH_WLAN_OFF# BD30 GPP_B22 / GSPI1_MOSI BA20
47 PCH_WLAN_OFF# PWM_OUT_EN_RR GPP_B21 / GSPI1_MISO GPP_D9 / ISH_SPI_CS# / GSPI2_CS0# BB20
RH928 1 @ 2 0_0201_5% AU26
40,52 PWM_OUT_EN F2_KEY_RR GPP_B20 / GSPI1_CLK GPP_D10 / ISH_SPI_CLK / GSPI2_CLK BB16
RH853 1 2@ 0_0201_5% AW26
53 F2_KEY
2
GPP_B18_NO_REBOOT BE30 GPP_B19 / GSPI1_CS0# GPP_D11 / ISH_SPI_MISO / GP_BSSB_CLK / GSPI2_MISO AN18
10K_0201_5%
10K_0201_5%
10K_0201_5%
10K_0201_5%
10K_0201_5%
10K_0201_5%
61 GPP_B18_NO_REBOOT GPP_B18 / GSPI0_MOSI GPP_D12 / ISH_SPI_MOSI / GP_BSSB_DI / GSPI2_MOSI
BD29 @ @ @ @ @ @
56 LAN_PWR_ON# EC_EDP_ENVDD_RR GPP_B17 / GSPI0_MISO
RH929 1 @ 2 0_0201_5% BF29 BF14
40,52 EC_EDP_ENVDD BB26 GPP_B16 / GSPI0_CLK GPP_D16 / ISH_UART0_CTS# / CNV_WCEN AR18
GPP_B15 / GSPI0_CS0# GPP_D15 / ISH_UART0_RTS# / GSPI2_CS1# / CNV_WFEN BF17
RH152 1
RH155 1
RH153 1
RH163 1
RH774 1
RH776 1
EC_SCI# RH780 1 @ 2 0_0201_5% BB24 GPP_D14 / ISH_UART0_TXD / I2C2_SCL BE17
14,52 EC_SCI# PCH_BT_OFF# GPP_C9 / UART0A_TXD GPP_D13 / ISH_UART0_RXD / I2C2_SDA
BE23
47 PCH_BT_OFF# GPP_C8 / UART0A_RXD PCH_GPA18
AP24
55 PCH_TP_INT BA24 GPP_C11 / UART0A_CTS# PCH_GPA19
50 USBDEBUG GPP_C10 / UART0A_RTS# PCH_GPA20
BD21 PCH_GPA21
AW24 GPP_C15 / UART1_CTS# / ISH_UART1_CTS# AG45 PCH_GPA23
AP21 GPP_C14 / UART1_RTS# / ISH_UART1_RTS# GPP_H20 / ISH_I2C0_SCL AH46 PCH_GPA22
25,28 VGA_PWRGD VGA_ALERT#_PCH AU24 GPP_C13 / UART1_TXD / ISH_UART1_TXD GPP_H19 / ISH_I2C0_SDA
GPP_C12 / UART1_RXD / ISH_UART1_RXD AH47
2 RH157
2 RH158
2 RH159
2 RH195
2 RH775
2 RH777
EDP_SW AV21 GPP_H22 / ISH_I2C1_SCL AH48
39,40 EDP_SW
om
PCH_FNLK AW21 GPP_C23 / UART2_CTS# GPP_H21 / ISH_I2C1_SDA
52,55 PCH_FNLK PCH_UART2_TXD GPP_C22 / UART2_RTS#
BE20
47 PCH_UART2_TXD PCH_UART2_RXD GPP_C21 / UART2_TXD
BD20
10K_0201_5%
10K_0201_5%
10K_0201_5%
10K_0201_5%
10K_0201_5%
10K_0201_5%
47 PCH_UART2_RXD GPP_C20 / UART2_RXD AV34 PCH_GPA23 @ @ @ @
RH857 1 2@ 0_0201_5% PCH_TP_CLK_R BE21 GPP_A23 / ISH_GP5 AW32 PCH_GPA22
55 PCH_TP_CLK PCH_TP_DATA_R BF21 GPP_C19 / I2C1_SCL GPP_A22 / ISH_GP4 PCH_GPA21
RH858 1 2@ 0_0201_5% BA33
55 PCH_TP_DATA GPP_C18 / I2C1_SDA GPP_A21 / ISH_GP3 PCH_GPA20
BC22 BE34
1
.c
1
BF23 GPP_C17 / I2C0_SCL GPP_A20 / ISH_GP2 BD34 PCH_GPA19
GPP_C16 / I2C0_SDA GPP_A19 / ISH_GP1 BF35 PCH_GPA18
C C
BE15 GPP_A18 / ISH_GP0 BD38
BE14 GPP_D4 / ISH_I2C2_SDA / I2C3_SDA / SBK4 / BK4 / SD_VDD1_PWR_EN# / ISH_GP7
GPP_A17
ck
GPP_D23 / ISH_I2C2_SCL / I2C3_SCL 11 OF 13
lo
un
st
PCH_GPA add for distinguish
Board ID table need modify L350: H
yong 07/10 Y550:L
fa
yong 07/11
+3VALW_PCH
+1.8VS_AON
PCH_GPA PCH_GPA 3
Function PCH_GPA18 PCH_GPA19 PCH_GPA 0 PCH_GPA 1
s-
L3 0: H Y550: L Reserved
1
RH300
4.7K_0402_5%
Y550-15-N18E G0 0 0 0 0 0 0
2
m
2
EDP_SW
3 1 VGA_ALERT#_PCH
28 VGA_ALERT#
Y550-15-N18E G1 0 0 0 1 0 0
ru
1
RH301
QH22 4.7K_0402_5%
B
LSI1012XT1G_SC-89-3
Y550-15-N18P G61 0 0 1 0 0 0 B
.fo
@
2
Y550-15-N18P G62 0 0 1 1 0 0
V0
w
Y540-17-N18E G0 0 1 0 0 0 0
w
Y540-17-N18E G1 0 1 0 1 0 0
0
w
Y540-17-N18P G61 0 1 1 0 0
Y540-17-N18P G62 0 1 1 1 0 0
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 PCH (6/9) GPPPABCD, I2C
C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
+VCCPGPPD +1.8VALW
0 1 A RH221 1 2 0_0402_5% +3VALW_PCH +3VALW
+VCCPRIM_1P05 +VCCPFUSE_3P3
Need short
D D
J7
1
0 10 A RH220 1 2 0_0402_5% 2 1
RH789 +1.05VALW Need short +VCCPRIM_1P05 2 1
0_0805_5%
CRB: 5 95A JUMP_43X79
JCH2 UH1H
1 2 PDG: 1 5A AA22 @
+VCCPRIM_FUSE_1P05 2 1 2 AA23 VCCPRIM_1P05_1 AW9
+VCCPHV_3P3
@ VCCPRIM_1P05_2 VCCPRIM_3P3_1 +VCCPGPPA
AB20
JUMP_43X79 AB22 VCCPRIM_1P05_3 BF47
0 001 A RH791 1 2 0_0402_5% @ AB23 VCCPRIM_1P05_4 DCPRTC_1 BG47 0 101A RH222 1 2 0_0402_5%
VCCPRIM_1P05_5 DCPRTC_2 2
.1U_0402_10V6-K
AB27
+VCCPRIM_CNV_HVLDO_1P05 AB28 VCCPRIM_1P05_6 V23 follow CRB em ty +VCCPGPPBC
CH26
VCCPRIM_1P05_7 VCCPRIM_3P3_2 +VCCPUSB2_3P3 0 /1 yong
AB30 AN44 +3V_SPI
0 A RH790 1 2 0_0402_5% AD20 VCCPRIM_1P05_8 VCCSPI @1 0 3 3A RH223 1 2 0_0402_5%
AD23 VCCPRIM_1P05_9 BC49
+VCCDUSB_1P05 AD27 VCCPRIM_1P05_10 VCCRTC_1 BD49 +VCCPGPPEF
VCCPRIM_1P05_11 VCCRTC_2 +VCCRTC_3P3
AD28
0 A RH792 1 2 0_0402_5% AD30 VCCPRIM_1P05_12 AN21 0 17 A RH224 1 2 0_0402_5%
+1.05VALW +VCCMPHY_1P05 VCCPRIM_1P05_13 VCCPGPPG_3P3 +VCCPGPPG
AF23 AY8
+VCCDSW_1P05 VCCPRIM_1P05_14 VCCPRIM_3P3_3 +VCCPHVLDO_3P3 +VCCPGPPG
AF27 BB7
JCH4 AF30 VCCPRIM_1P05_15 VCCPRIM_3P3_4
RH793 1 @ 2 0_0402_5% 1 2 U26 VCCPRIM_1P05_16 AC35 0 1 5A RH225 1 2 0_0402_5%
1 2 VCCPRIM_1P05_17 VCCPGPPHK_1 +VCCPGPPHK
U29 AC36
+VCCCLPLLEBB_1P05 V25 VCCPRIM_1P05_18 VCCPGPPHK_2 AE35 +VCCPUSB2_3P3
JUMP_43X79 VCCPRIM_1P05_19 VCCPGPPEF_1 +VCCPGPPEF
V27 AE36
0 109A RH794 1 2 0_0402_5% @ V28 VCCPRIM_1P05_20 VCCPGPPEF_2 0 095A RH226 1 2 0_0402_5%
V30 VCCPRIM_1P05_21 AN24
+VCCAZPLL_1P05 VCCPRIM_1P05_22 VCCPGPPD +VCCPGPPD +VCCPGPPHK
V31 AN26
@ VCCPRIM_1P05_23 VCCPGPPBC_1 AP26
+VCCPGPPBC
m
0 015A RH795 1 2 0_0603_5% AD31 VCCPGPPBC_2 0 A RH784 1 2 0_0402_5%
+VCCA_SRC_1P05 +VCCPRIM_FUSE_1P05 VCCPRIM_1P05_24
AE17 AN32
+VCCPRIM_CNV_HVLDO_1P05 VCCPRIM_1P05_25 VCCPGPPA +VCCPGPPA +VCCPHV_3P3
0 1 9A RH797 1 2 0_0402_5% W22 AT44 +VCCPGPPHK
+VCCDUSB_1P05 VCCDUSB_1P05_1 VCCPRIM_3P3_5 +VCCPFUSE_3P3 +VCCPGPPEF
co
W23 BE48 0 18 A RH746 1 2 0_0402_5%
VCCDUSB_1P05_2 VCCDSW_3P3_1 +VCCDSW
BE49
+VCCA_OCPLL1_1P05 BG45 VCCDSW_3P3_2 +VCCPHVLDO_3P3
.1U_0402_10V6-K
+VCCDSW_1P05
.1U_0402_10V6-K
BG46 VCCDSW_1P05_1 BB14
VCCDSW_1P05_2 VCCHDA +VCCHDA 1
C 0 0198A RH787 1 2 0_0402_5% W31 AG19 0 97A RH785 1 2 0_0402_5% 1 C
CH270
+VCCCLPLLEBB_1P05
CH81
VCCPRIM_MPHY_1P05 VCCPRIM_1P8_1 AG20 @
k.
+VCCA_OC_1P05 D1 VCCPRIM_1P8_2 AN15 @
+VCCAZPLL_1P05 VCCPRIM_1P05_26 VCCPRIM_1P8_3
E1 AR15 2 2
0 0085A RH798 1 2 0_0402_5% 0 13A C49 VCCPRIM_1P05_27 VCCPRIM_1P8_4 BB11
+VCCAMPHYPLL_1P05 VCCAMPHYPLL_1P05_1 VCCPRIM_1P8_5 +VCCPRIM_1P8
c
D49
+VCCA_BCLKPLL2_1P05 E49 VCCAMPHYPLL_1P05_2 AF19
VCCAMPHYPLL_1P05_3 VCCPHVLDO_1P8_1 AF20 +VCCPHVLDO_1P8
lo
0 0 1A RH799 1 2 0_0402_5% P2 VCCPHVLDO_1P8_2
+VCCA_XTAL_1P05 VCCA_XTAL_1P05_1
P3 AG31 Option1:Use external VRM(default)
VCCA_XTAL_1P05_2 VCCPRIM_1P05_28 +VCCFHV1_1P05 stuff RH816,unstuff RH807
+VCCA_SRC_1P05 W19 AF31 +VCCFHV0_1P05
W20 VCCA_SRC_1P05_1 VCCPRIM_1P05_29 AK22 Option2:Use internal LDO
un
VCCA_SRC_1P05_2 VCCDPHY_1P24_1 +VCCLDOSRAM_IN_1P24 unstuff RH816,stuff RH807
AK23 RH807 RH816
+VCCPRIM_1P05 C1 VCCDPHY_1P24_2 +VCCPHVLDO_1P8 1 2 0_0402_5% +VCCPRIM_1P8 1 2 0_0402_5%
+VCCA_OCPLL1_1P05 VCCAPLL_1P05_1 +1.8VALW
+VCCFHV1_1P05 C2 AJ22 @
V19 VCCAPLL_1P05_2 VCCDPHY_1P24_3 AJ23
+VCCA_OC_1P05 VCCA_BCLK_1P05 VCCDPHY_1P24_4 +VCCDPHY_1P24
RH199 1 2 0_0402_5% BG5
VCCDPHY_1P24_5 +VCCDPHY_1P24_MAR
B1
st
+VCCFHV0_1P05 +VCCA_BCLKPLL2_1P05 B2 VCCAPLL_1P05_3 K47 VCCMPHY_SENSE
VCCAPLL_1P05_4 VCCMPHY_SENSE 1 1
VSSMPHY_SENSE
CH278
1U_0402_6.3V6K
B3 K46
CH298
4.7U_0603_6.3V6K
RH200 1 2 0_0402_5% VCCAPLL_1P05_5 8 OF 13 VSSMPHY_SENSE @
fa
COMETLAKE-H-PCH_FCBGA874 2 2
s-
@
RH817 1 2 0_0402_5% +VCCDPHY_1P24
+VCCPRIM_1P05
m
+VCCA_XTAL_1P05
@
+VCCDPHY_1P24_MAR RH818 1 2 0_0402_5% +VCCLDOSRAM_IN_1P24
+VCCPRIM_1P05 +VCCMPHY_1P05 +VCCDSW_1P05 +VCCA_BCLKPLL2_1P05 +VCCDUSB_1P05
RH827 1 2 0_0603_5%
ru
4.7U_0603_6.3V6K
1 CRB: no connect thri in
CH276
22U_0603_6.3V6-M
0 /1 yong
1
CH299
CH253
22U_0603_6.3V6-M
1U_0402_6.3V6K
1 1 1 1 2 1 +VCCAMPHYPLL_1P05
CH30
1U_0402_6.3V6K
CH25
1U_0402_6.3V6K
CH29
22U_0603_6.3V6-M
CH272
1U_0402_6.3V6K
.1U_0402_10V6-K
2 follow CRB D L 1 L CATI N Place close to BG5

B 2 B
CH279
CH292
0 /1 Y NG
.fo
@ LH2 1 2 0_0603_5% 2@
2 2 2 2 1@ 2
CRB: only 1u ca 1 @ 1 1
CH255
1U_0402_6.3V6K
CH273
22U_0603_6.3V6-M
need confirm folllow PDG:
0 /1 yong placeholder LC filter follow CRB D L 1 L CATI N
w
If used,need to confirm LC spec 0 /1 Y NG

2 2 @
w
VCCRTC +VCCRTC_3P3
RH216 1 2 0_0402_5% 0 000 1 A

w
.1U_0402_10V6-K
1U_0402_6.3V6K
1 1
CRB lace to PCH
CH245
CH244
+VCCPRIM_1P05
+1.05VALW_SENSE 2 2
1
RH909
100_0402_1%
@
2
+3VALW +VCCHDA +3VALW_PCH +VCCDSW

70 VCCMPHY_SENSE
70 VSSMPHY_SENSE
LH1 1 2 0_0402_5% RH206 1 2 0_0402_5%
1
@
+3VS +3VALW
@ RH908
100_0402_1%
LH3 1 @ 2 0_0402_5% RH205 1 2 0_0402_5%
2
.1U_0402_10V6-K
+VCCA_OCPLL1_1P05 +VCCPHVLDO_3P3 +VCCCLPLLEBB_1P05 +VCCAZPLL_1P05 +VCCA_OC_1P05
.1U_0402_10V6-K
2 V1 0 1
CH271
CH248
A A
lace close to PCH ball @
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
yong 07/0
1 2
2 2 1 1 2 1 1 1
CH302
1U_0402_6.3V6K
CH288
CH290
4.7U_0402_6.3V6M
CH300
22U_0603_6.3V6-M
CH287
1U_0402_6.3V6K
CH289
CH301
22U_0603_6.3V6-M
CH291
1 1 2@ 2 1 2@ 2@ 2@
Issued Date 2018/08/02 Deciphered Date 2018/08/02 PCH (7/9) PWR

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
UH1L
BG3 M24 UH1I

BG33 VSS_145 VSS_196 M32 A2 AL12
BG37 VSS_146 VSS_197 M34 A28 VSS_2 VSS_73 AL17
D C12 VSS_149 VSS_200 N12 A37 VSS_5 VSS_76 AL26 D
C25 VSS_150 VSS_201 N16 A4 VSS_6 VSS_77 AL29
C48 VSS_153 VSS_204 N37 A47 VSS_9 VSS_80 AM1
C5 VSS_154 VSS_205 N38 A48 VSS_10 VSS_81 AM18
D12 VSS_155 VSS_206 P26 A5 VSS_11 VSS_82 AM32 UH1J
D16 VSS_156 VSS_207 P29 A8 VSS_12 VSS_83 AM49 Y14
D17 VSS_157 VSS_208 P4 AA19 VSS_13 VSS_84 AN12 RSVD_20 Y15
m
D30 VSS_158 VSS_209 P46 AA20 VSS_14 VSS_85 AN16 RSVD_21 U37
D33 VSS_159 VSS_210 R12 AA25 VSS_15 VSS_86 AN34 RSVD_22 U35
VSS_160 VSS_211 VSS_16 VSS_87 RSVD_23
co
D8 R16 AA27 AN38
E10 VSS_161 VSS_212 R26 AA28 VSS_17 VSS_88 AP4 N32
E13 VSS_162 VSS_213 R29 AA30 VSS_18 VSS_89 AP46 RSVD_24 R32
E15 VSS_163 VSS_214 R3 AA31 VSS_19 VSS_90 AR12 RSVD_25
k.
E17 VSS_164 VSS_215 R34 AA49 VSS_20 VSS_91 AR16 AH15
E19 VSS_165 VSS_216 R38 AA5 VSS_21 VSS_92 AR34 RSVD_26 AH14
VSS_166 VSS_217 VSS_22 VSS_93 RSVD_27
oc
E22 R4 AB19 AR38
E24 VSS_167 VSS_218 T17 AB25 VSS_23 VSS_94 AT1
E26 VSS_168 VSS_219 T18 AB31 VSS_24 VSS_95 AT16
E31 VSS_169 VSS_220 T32 AC12 VSS_25 VSS_96 AT18 AL2
nl
E33 VSS_170 VSS_221 T4 AC17 VSS_26 VSS_97 AT21 PREQ# AM5 PCH_PREQ# 61
E35 VSS_171 VSS_222 T49 AC33 VSS_27 VSS_98 AT24 PRDY# AM4 PCH_PRDY# 61
VSS_172 VSS_223 VSS_28 VSS_99 CPU_TRST# CPU_TRST# 61
u
E40 T5 AC38 AT26 AK3 PCH_TRIGOUT RH758 1 2 30_0402_5% CPU_TRIGIN 6
C VSS_173 VSS_224 VSS_29 VSS_100 TRIGGER_OUT C
E42 T7 AC4 AT29 AK2
st
VSS_174 VSS_225 VSS_30 VSS_101 TRIGGER_IN PCH_TRIGIN 6
E8 U12 AC46 AT32
F41 VSS_175 VSS_226 U15 AD1 VSS_31 VSS_102 AT34 10 OF 13
F43 VSS_176 VSS_227 U17 AD19 VSS_32 VSS_103 AT45
fa
F47 VSS_177 VSS_228 U21 AD2 VSS_33 VSS_104 AV11
VSS_178 VSS_229 VSS_34 VSS_105 1
G44 U24 AD22 AV39 CH181
s-
G6 U33 AD25 AW10 .1U_0402_10V6-K
H8 VSS_180 VSS_231 U38 AD49 VSS_36 VSS_107 AW4 @
J10 VSS_181 VSS_232 V20 AE12 VSS_37 VSS_108 AW40 2
m
J26 VSS_182 VSS_233 V22 AE33 VSS_38 VSS_109 AW46
J29 VSS_183 VSS_234 V4 AE38 VSS_39 VSS_110 B47
J4 VSS_184 VSS_235 V46 AE4 VSS_40 VSS_111 B48
ru
J40 VSS_185 VSS_236 W25 AE46 VSS_41 VSS_112 B49
J46 VSS_186 VSS_237 W27 AF22 VSS_42 VSS_113 BA12
.fo
J47 W28 AF25 BA14
J48 VSS_188 VSS_239 W30 AF28 VSS_44 VSS_115 BA44
J9 VSS_189 VSS_240 Y10 AG1 VSS_45 VSS_116 BA5
K11 VSS_190 VSS_241 Y12 AG22 VSS_46 VSS_117 BA6
w
K39 VSS_191 VSS_242 Y17 AG23 VSS_47 VSS_118 BB41
M16 VSS_192 VSS_243 Y33 AG25 VSS_48 VSS_119 BB43
M18 Y38 AG27
w BB9
M21 VSS_194 VSS_245 Y9 AG28 VSS_50 VSS_121 BC10
VSS_246
VSS_19512 OF 13 AG30 VSS_51 VSS_122 BC13
w
COMETLAKE-H-PCH_FCBGA874 AG49 VSS_52 VSS_123 BC15
B B
AH12 VSS_53 VSS_124 BC19
AJ19 VSS_57 VSS_128 BC35
AJ28 VSS_61 VSS_132 BD43
AJ30 VSS_62 VSS_133 BE44
AJ31 VSS_63 VSS_134 BF1
AK19 VSS_64 VSS_135 BF2
AK28 VSS_68 VSS_139 BG17
VSS_73 VSS_144
9 OF 13
A A

Issued Date 2018/08/02 Deciphered Date 2018/08/02 PCH (9/9) VSS
B
Y550 1.0

5 4 3 2 1
5 4 3 2 1
D D
o m
.c
ck
lo
un
C C
st
fa
s-
m
ru
.fo
w
w
w
B B
A A

B
Y550 1.0

5 4 3 2 1
5 4 3 2 1
STRAP2 STRAP1 STRAP0 RAMCFG[4:0] H=High: Tied to 1.8V

N18P-G61 G62 GPIO M=Middle: Tied to 0.9V
L L L 00000
L=Low: Tied to 0V
GPIO I/O ACTIVE Function Description I/O Termination L H L 00010
GPIO0 OUT - PWM Output to control NVVDD L H H 00011
GPIO1 OUT - FB Enable for GC6 2.1 H H L 00110
GPIO2 IN - GPU EVENT H H H 00111

D D
GPIO3 OUT - GPU MUX controler

ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0] 1:ENABLE 0:DISABLE
GPIO4 OUT - GPU power sequencing for GC6 2.1 --- 1V8_MAIN_EN
L L L 1111 DEFAULT SOR0/1/2/3 ENABLE
GPIO5 IN N/A Active low Frame Lock
L L H 1110
GPIO6 OUT - Phase Shedding, NVVDD_PSI
L H L 1101
GPIO7 OUT N/A Panel Backlight (PWM)enable
L H H 1100
GPIO8 OUT - Memory voltage Control
H L L 1011
GPIO9 I/O - Active Low Thermal Alert
H L H 1010
GPIO10 OUT - Memory VREF Control (100K pull Down)
H H L 1001
GPIO11 OUT - Panel Power (LCD_VDD)enable
H H H 1000
GPIO12 IN - AC power detect or power supply overdraw input (10K pull High)
om
L L M 0111
GPIO13 IN N/A IGPU Backlight Enable
L M L 0110
GPIO14 IN N/A Hot Plug Detect for IFPA(TYPE-C)
.c
L M H 0101
C GPIO15 IN N/A Hot Plug Detect for IFPB(NA) C
L H M 0100
ck
GPIO16 OUT - DGPU PWM switch select
H L M 0011
GPIO17 IN N/A Hot Plug Detect for IFPD(DGPU eDP HPD)
lo
H M L 0010
GPIO18 IN N/A Hot Plug Detect for IFPE(NA)
H M H 0001
un
GPIO19 N/A NA
H H M 0000
GPIO20 N/A GC6_MODE
st
GPIO21 O N/A DGPU Backlight Enable
1:SMB_ALT_ADDR ENABLE
STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE
fa
GPIO22 O N/A ADC MUX select 0:SMB_ALT_ADDR DISABLE
M H H 1 1 1 1
GPIO23 OUT - GPU PCIe self-reset control 1:DEVID_SEL REBRAND
s-
M H L 1 1 1 0 0:DEVID_SEL ORIGNAL
GPIO24 N/A NA
M L H 1 1 0 1 1:PCIE_CFG LOW POWER
m
GPIO25 FVDDQ_PSI
0:PCIE_CFG HIGH POWER
M L L 1 1 0 0
GPIO26 N/A FP-FUSE
ru
1:VGA_DEVICE ENABLE
L H M 1 0 1 1
GPIO27 IN N/A Hot Plug Detect for IFPC(HDMI) 0:VGA_DEVICE DISABLE
B B
.fo
L M H 1 0 1 0
L M L 1 0 0 1
w
L L M 1 0 0 0
H H H 0 1 1 1
w
N18P-G61 G62 Power Sequence

H H L 0 1 1 0
w
H L H 0 1 0 1
H L L 0 1 0 0
+1 8VS_A N NVVDDS/+1 0VGS L H H 0 0 1 1
+1 8VGS L H L 0 0 1 0
NVVDD
NVVDD L L H 0 0 0 1 DEFAULT
NVVDDS/+1 0VGS L L L 0 0 0 0
FBVDDQ
A A
1 All ower rail ram u time should be larger than 0us 1 NVVDDS/P X_DVDD must ram down before NVVDD all
and is recommended to be less than ms other ower rails can ram down together with NVVDD
T from 1V8_MAIN_ N to P X_DVDD/NVVDD_Pgood All 3 3V devices that connect to the GPU must be
must N T e ceed ms ram down before 1V8_A N GPU can N T have any 3 3V
leakage ath after 1V8_A N and 1 8V_MAIN ower down
3 All 3 3V devices that connect to the GPU must be
owered after 1V8_A N GPU can N T have any 3 3V 3 The revious ower rail must ram down to 10% before
leakage ath before 1V8_A N resent the ne t ower rail can start ram ing down
The revious ower rail must ram u to 90% before
the ne t ower rail can start ram ing u
Issued Date 2018/08/02 Deciphered Date 2018/08/02 VGA Notes List
C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
UV1A 3A
+1.0VGS
1/17 FBA
2000mA
Under GPU(below 150mils)
AG21 Near GPU Mid way
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
PEX_DVDD_1
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
AG22 1 1
33P_0402_50V8J
33P_0402_50V8J
PEX_DVDD_2 AG24
PEX_DVDD_3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
AH25
PEX_WAKE# PEX_DVDD_4
@
TV12 1 AJ11 AG19
PEX_WAKE* PEX_CVDD_1 2 2
RF_NS@
RF_NS@
OPT@
OPT@
OPT@
OPT@
OPT@
AH21
OPT@
PLT_RST_VGA# PEX_CVDD_2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
@
AJ12
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CD85
CD86
28 PLT_RST_VGA# PEX_RST*
CV2
CV3
CV4
CV5
CLK_REQ_GPU#
CV536
CV537
AK12
CV548
CV549
CV550
CV553
CV551
CV552
CV555
CV554
CV1448
CV1449
CV1450
CV1451
CV1452
CV1453
PEX_CLKREQ*
CLK_PCIE_GPU AL13
17 CLK_PCIE_GPU CLK_PCIE_GPU# PEX_REFCLK
AK13
17 CLK_PCIE_GPU# PEX_REFCLK*
PCIE_CRX_GTX_P0 CV12 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_P0 AK14
D 5 PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 PCIE_CRX_C_GTX_N0 PEX_TX0 D
5 PCIE_CRX_GTX_N0 CV13 1 2 0.22U_0201_6.3V6-K OPT@ AJ14
PEX_TX0*
PCIE_CTX_C_GRX_P0 AN12
5 PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_N0 PEX_RX0
AM12
5 PCIE_CTX_C_GRX_N0 PEX_RX0*
PCIE_CRX_GTX_P1 CV17 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_P1 AH14
5 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 PCIE_CRX_C_GTX_N1 PEX_TX1
CV19 1 2 0.22U_0201_6.3V6-K OPT@ AG14
5 PCIE_CRX_GTX_N1
5 PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
AN14
PEX_TX1*
PEX_RX1
PEX_HVDD_1
PEX_HVDD_2
AG13
AG15
Near GPU +1.8VS_VGA
1A
AM14 AG16
5 PCIE_CTX_C_GRX_N1 PEX_RX1* PEX_HVDD_3 AG18 Under GPU(below 150mils)
PCIE_CRX_GTX_P2 CV22 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_P2 AK15 PEX_HVDD_4 AG25 Near GPU Mid way
5 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2 PCIE_CRX_C_GTX_N2 PEX_TX2 PEX_HVDD_5
5 PCIE_CRX_GTX_N2 CV23 1 2 0.22U_0201_6.3V6-K OPT@ AJ15 AH15
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
PEX_TX2* PEX_HVDD_6
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
AH18
PCIE_CTX_C_GRX_P2 AP14 PEX_HVDD_7 AH26
5 PCIE_CTX_C_GRX_P2 PEX_RX2 PEX_HVDD_8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PCIE_CTX_C_GRX_N2 AP15 AH27
5 PCIE_CTX_C_GRX_N2 PEX_RX2* PEX_HVDD_9 AJ27
PCIE_CRX_GTX_P3 PCIE_CRX_C_GTX_P3 PEX_HVDD_10
@
@
@
@
OPT@
OPT@
OPT@
@
OPT@
CV24 1 2 0.22U_0201_6.3V6-K OPT@ AL16 AK27
OPT@
OPT@
OPT@
OPT@
OPT@
5 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3 PCIE_CRX_C_GTX_N3 PEX_TX3 PEX_HVDD_11 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
5 PCIE_CRX_GTX_N3 CV25 1 2 0.22U_0201_6.3V6-K OPT@ AK16 AL27
PEX_TX3* PEX_HVDD_12
CV522
CV524
CV523
CV528
CV525
CV526
CV527
AM28
OPT@
OPT@
OPT@
OPT@
OPT@
CV532
CV535
CV533
CV534
CV302
CV1441
CV1493
CV1445
CV1447
CV1446
CV1444
CV1443
CV1442
CV1381
CV1492
PCIE_CTX_C_GRX_P3 AN15 PEX_HVDD_13 AN28
5 PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_N3 PEX_RX3 PEX_HVDD_14
AM15
PEX_TX4*
AM17
5 PCIE_CRX_GTX_N5 CV29 1 2 0.22U_0201_6.3V6-K OPT@ AG17
PEX_TX5*
PCIE_CTX_C_GRX_P5 AP17
AP18
MAX:250mA
PEX_TX6* +1.8VS_VGA
PCIE_CTX_C_GRX_P6 AN18 CORE_PLLVDD
5 PCIE_CTX_C_GRX_P6 PEX_RX6
5 PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N6 AM18
PEX_RX6* MAX:100mA
PCIE_CRX_GTX_P7 CV35 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_P7 AL19 +1.8VS_VGA
CV36 1 2 0.22U_0201_6.3V6-K OPT@ AK19 Near GPU 1 2
5 PCIE_CRX_GTX_N7 PEX_TX7* @ LV1
PCIE_CTX_C_GRX_P7 AN20 AH12 PEX_PLL_HVDD RV7 1 2 0_0402_5% HCB1608KF-300T60_2P
5 PCIE_CTX_C_GRX_P7
1U_6.3V_M_X5R_0201
PCIE_CTX_C_GRX_N7 AM20 PEX_RX7 PEX_PLL_HVDD OPT@
5 PCIE_CTX_C_GRX_N7 PEX_RX7* 1 1
22U_0805_6.3V6M
4.7U_0603_6.3V6K
m
PCIE_CRX_GTX_P8 PCIE_CRX_C_GTX_P8
1 30ohms (ESR=0.01) Bead
CV452 1 2 0.22U_0201_6.3V6-K OPT@ AK20
5 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_N8 CV39 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_N8 AJ20 PEX_TX8 P/N;SM01000M300
5 PCIE_CRX_GTX_N8 PEX_TX8* N18 change 2 2
OPT@
C C
PCIE_CTX_C_GRX_P8 AP20 2
OPT@
OPT@
5 PCIE_CTX_C_GRX_P8
CV11
CV15
PEX_RX8
CV31
PCIE_CTX_C_GRX_N8 AP21
5 PCIE_CTX_C_GRX_N8
o
PEX_RX8*
CV42 1 2 0.22U_0201_6.3V6-K OPT@ AG20
5 PCIE_CRX_GTX_N9 PEX_TX9*
.c
5 PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N9 AM21
PEX_RX9*
Place near GPU
CV44 1 2 0.22U_0201_6.3V6-K OPT@ AJ21
ck
5 PCIE_CRX_GTX_N10 PEX_TX10*
AM23
PCIE_CRX_GTX_P11 CV45 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_P11 AL22
CV46 1 2 0.22U_0201_6.3V6-K OPT@ AK22
5 PCIE_CRX_GTX_N11 PEX_TX11* CORE_PLLVDD
lo
PCIE_CTX_C_GRX_P11 AP23 UV1Q
AP24 11/17 XTAL_PLL
5 PCIE_CTX_C_GRX_N11 PEX_RX11* Place Under GPU/1 cap per pin +1.8VS_AON
PCIE_CRX_GTX_P12 CV47 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_P12 AK23 CORE_PLLVDD AD8
5 PCIE_CRX_GTX_P12
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
PCIE_CRX_GTX_N12 CV48 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_N12 AJ23 PEX_TX12 H26 XSN_PLLVDD
n
5 PCIE_CRX_GTX_N12 PEX_TX12* GPCPLL_AVDD
1 1 1 1 AE8
SP_PLLVDD
1U_6.3V_M_X5R_0201
2
PCIE_CTX_C_GRX_N12 AM24 AD7
5 PCIE_CTX_C_GRX_N12 PEX_RX12* VID_PLLVDD
tu
OPT@
OPT@
OPT@
OPT@
RV211
PCIE_CRX_GTX_P13 CV49 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_P13 AH23 2 2 2 2 10K_0402_5%
5 PCIE_CRX_GTX_P13 PEX_TX13
CV16
CV33
CV37
PCIE_CRX_GTX_N13 PCIE_CRX_C_GTX_N13
CV32
5 PCIE_CRX_GTX_N13 CV50 1 2 0.22U_0201_6.3V6-K OPT@ AG23 @
PEX_TX13*
1
AM26 XTALSSIN H1 J4 XTALOUT
s
5 PCIE_CTX_C_GRX_N13 PEX_RX13* EXT_REFCLK_FL XTAL_OUTBUFF
5 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_N14 PCIE_CRX_C_GTX_N14 PEX_TX14 XTAL_IN XTAL_OUT
CV55 1 2 0.22U_0201_6.3V6-K OPT@ AJ24 H3 H2
5 PCIE_CRX_GTX_N14
fa
PEX_TX14* XTAL_IN XTAL_OUT
1
PCIE_CTX_C_GRX_P14 AP26 N18P-FCBGA960_BGA960 RV46
AP27 @ RV209 100K_0402_5%
5 PCIE_CTX_C_GRX_N14 PEX_RX14* 1 2 OPT@
PCIE_CRX_GTX_P15 CV56 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_P15 AL25 10M_0402_5%
2
5 PCIE_CRX_GTX_P15
2
PCIE_CRX_GTX_N15 CV57 1 2 0.22U_0201_6.3V6-K OPT@ PCIE_CRX_C_GTX_N15 AK25 PEX_TX15 OPT@
s-
5 PCIE_CRX_GTX_N15 PEX_TX15* RV14
PCIE_CTX_C_GRX_P15 AN27 10K_0402_5%
5 PCIE_CTX_C_GRX_P15 PCIE_CTX_C_GRX_N15 PEX_RX15 OPT@ YV1
AM27
5 PCIE_CTX_C_GRX_N15 PEX_RX15* PEX_TERMP 1
AP29 2
1
PEX_TERMP RV34 XTAL_IN 1 4
m
2.49K_0402_1% OSC1 GND2
N18P-FCBGA960_BGA960 OPT@ 2 3 XTAL_OUT
Change PEG from X8 to X16 GND1 OSC2
B @ B
SF SDV 20170810 1
27MHZ_10PF_7V27000050
1
CV262 OPT@ CV263
ru 2
10P_0402_50V8J
OPT@ 2
10P_0402_50V8J
OPT@
.fo
Change CV262&CV263 from 12P to 8P
SIT 0129SF
w
w
1 2
OVERT#_NVEN 28
RV1207 +1.8VS_VGA
0_0402_5%
@
1 2
2
w
WRST# 52
RV20
2
RV29
0_0402_5% For SWG mode RV1243 10K_0402_5%
@
+1.8VS_AON
1 2 5.6K_0402_1%
@
H_THRMTRIP# 6,14 OPT@

RV1
1
1
0_0402_5%
1
1
For UMA mode +1.8VS_AON
@
RV2
@
CV1 1 2
choose one 10K_0402_5% 20,28 VGA_PWRGD

RV8
@
1U_6.3V_K_X5R_0201
0_0402_5%
3
D 2 1
CV66
2
5 QV1B LBSS138LT1G
2
.1U_0402_10V6-K
G LBSS138DW1T1G_SOT363-6 Vds 50V
@
@
S Id 00mA 2
4
Rdson Ma 10ohm
6
10K_0402_5%
OVERT# 2 QV1A
Vgs +- 0V
28 OVERT# Vgs th 0 5V--1V 1
G LBSS138DW1T1G_SOT363-6
OPT@
RV31
@
S
1
1 3 CLK_REQ_GPU#
1
D
@
1 17 GPU_CLKREQ#
PLT_RST_VGA# 1 2 2 QV2
CV20
RV3 G LBSS139WT1G_SC70-3
A QV5 A
@
0_0402_5% S 1U_6.3V_K_X5R_0201
LSI1012XT1G_SC-89-3
3
2
@
OPT@
@
1 Vgs(th)≤0.9V
CV21
1U_6.3V_K_X5R_0201
2
Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_(1/6):PEG I/F

Custom 1.0
5 4 3 2 1
5 4 3 2 1
Ref NV DG-08780-001
If an IFP link is unused, in general it should be left unconnected.
This includes Main and Aux links.
IFPxy_RSET and IFPxy_PLLVDD (xy=AB,CD,EF)
can be left unconnected if neither of IFPx /IFPy is in use
UV1K
5/17 IFPAB
DVI DP
SL/DL
TXC/TXC GPU_SNK0_DP3N
OPT@ TXC/TXC
AN6 UV1N
IFPAB_RSET IFPA_L3* GPU_SNK0_DP3P GPU_SNK0_DP3N 44
2 1 AJ8 AM6 8/17 IFPE
IFPAB_RSET IFPA_L3 GPU_SNK0_DP3P 44
RV68 1K_0402_1% @
AN3 GPU_SNK0_DP2N 2 1 IFPEF_RSET AD6
TXD0/0 IFPA_L2* GPU_SNK0_DP2N 44 IFPE_RSET
D CORE_PLLVDD AP3 GPU_SNK0_DP2P RV1140 1K_0402_1% D
TXD0/0 IFPA_L2 GPU_SNK0_DP2P 44
@ HDMI DP
RV69 1 2 0_0603_5% +IFPAB_PLLVDD AH8 AM5 GPU_SNK0_DP1N CORE_PLLVDD
IFPAB_PLLVDD
TXD1/1
IFPA_L1* AN5 GPU_SNK0_DP1P GPU_SNK0_DP1N
GPU_SNK0_DP1P
44
44
for Type-C DP @ AB4
IFPA_L1 RV1124 1 2 1/10W_0_+-5%_0603+IFPEF_PLLVDD AB8 IFPE_AUX_SDA* AB3
TXD1/1 IFPE_PLLVDD IFPE_AUX_SCL
1
OPT@ CV7 AK6 GPU_SNK0_DP0N
1U_6.3V_M_X5R_0201
IFPA_L0* GPU_SNK0_DP0P GPU_SNK0_DP0N 44
TXD2/2
AL6 AC5
1U_6.3V_K_X5R_0201 IFPA_L0 GPU_SNK0_DP0P 44 TXC IFPE_L3* AC4
2 TXD2/2 1 TXC IFPE_L3
@
TXD0 AC3
AH6 GPU_SNK0_AUX_DN IFPE_L2* AC2
IFPA_AUX_SDA* GPU_SNK0_AUX_DN 44 TXD0 IFPE_L2
AJ6 GPU_SNK0_AUX_DP 2
IFPA_AUX_SCL GPU_SNK0_AUX_DP 44
CV461
AC1
TXD1 IFPE_L1*
TXD1
AD1
IFPE_L1
TXC
+1.0VGS AH9 AD3
TXC IFPB_L3* TXD2 IFPE_L0*
om
@ AJ9 TXD2 AD2
RV72 1 2 0_0603_5% +IFPAB_IOVDD AG8 IFPB_L3 +1.0VGS IFPE_L0
IFP_IOVDD_5 AP5 GPU_SNK0_AUX_DP RV15 1 OPT@ 2 100K_0402_5%
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
TXD0/3 IFPB_L2*
AG9 TXD0/3
AP6 @
1U_6.3V_K_X5R_0201
IFP_IOVDD_6 IFPB_L2 RV337 1 2 0_0603_5% +IFPF_IOVDD AC7

1 1 1 1 1
4.7U_0603_6.3V6K
GPU_SNK0_AUX_DN RV1292 1 OPT@ 2 100K_0402_5% AC8 IFP_IOVDD_1

AL7 IFP_IOVDD_2
TXD1/4 IFPB_L1*
OPT@
OPT@
OPT@
AM7
OPT@
TXD1/4
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
2 2 @ 2 2 2 IFPB_L1 N18P-FCBGA960_BGA960
1U_6.3V_K_X5R_0201
CV69
CV70
CV71
AM8
.c
CV1175
1 1 1 1 1 @
CV445
IFPB_L0* AN8
4.7U_0603_6.3V6K
TXD2/5 IFPB_L0
TXD2/5
OPT@
OPT@
OPT@
OPT@
2 2 @ 2 2 2
CV463
CV462
CV446
AL8
CV1176
k
IFPB_AUX_SDA* AK8
CV460
IFPB_AUX_SCL
near GPU under GPU
oc
IFPAB
N18P-FCBGA960_BGA960 near GPU under GPU
@
nl
tu
C C
s
fa
s-
m
ru
UV1M
Decouling Value
6/17 IFPC
OPT@
2 1 IFPCD_RSET AF8 MLCC N18 N17 location
.fo
RV73 1K_0402_1% IFPCD_RSET
HDMI DP CV7 1uf 0 1uf Under UV1L
7/17 IFPD
AG2
IFPC_AUX_SDA* AG3 HDMI1_DAT 42
CV 1uf 0 1uf Under
CORE_PLLVDD IFPC_AUX_SCL HDMI1_CLK 42
HDMI DP
w
@ AG4 HDMI1_TXC-
LV4 1 2 0_0603_5% +IFPCD_PLLVDD AF7
TXC
TXC
IFPC_L3* AG5 HDMI1_TXC+ HDMI1_TXC- 42
HDMI CLK CV 1 1uf 0 1uf Under AK2 GPU_EDP_AUX#
IFPCD_PLLVDD IFPC_L3 HDMI1_TXC+ 42 IFPD_AUX_SDA* AK3 GPU_EDP_AUX GPU_EDP_AUX# 39
AH4 HDMI1_TX0- IFPD_AUX_SCL GPU_EDP_AUX 39
1 TXD0 HDMI1_TX0- 42 1uf 0 1uf Under
TXD0
IFPC_L2*
IFPC_L2
AH3 HDMI1_TX0+ w HDMI1_TX0+ 42 HDMI D0 CV70 GPU_EDP_TX3-
OPT@ CV222 For HDMI TXC
AK5
GPU_EDP_TX3- 39
1U_6.3V_M_X5R_0201 IFPC TXD1
AJ2 HDMI1_TX1-
HDMI1_TX1- 42 1uf 0 1uf Under
IFPD TXC
IFPD_L3* AK4 GPU_EDP_TX3+
GPU_EDP_TX3+ 39
2
TXD1
IFPC_L1*
IFPC_L1
AJ3 HDMI1_TX1+
HDMI1_TX1+ 42 HDMI D1 CV71 IFPD_L3
GPU_EDP_TX2-
AL4
HDMI1_TX2- TXD0 IFPD_L2* GPU_EDP_TX2+ GPU_EDP_TX2- 39
TXD2 AJ1 AL3
w
+1.0VGS IFPC_L0* AK1 HDMI1_TX2+ HDMI1_TX2- 42 TXD0 IFPD_L2 GPU_EDP_TX2+ 39
TXD2 IFPC_L0 HDMI1_TX2+ 42 HDMI D2 CV 3 1uf 0 1uf Under GPU_EDP_TX1-
@ TXD1
AM4
1 2 0_0603_5% +IFPC_IOVDD AF6 IFPD_L1* AM3 GPU_EDP_TX1+ GPU_EDP_TX1- 39
LV5 TXD1
IFP_IOVDD_3 IFPD_L1 GPU_EDP_TX1+ 39
B CV 8 1uf 0 1uf Under GPU_EDP_TX0-
AM2 B
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
AG6
TXD2 IFPD_L0* AM1 GPU_EDP_TX0+ GPU_EDP_TX0- 39
TXD2 GPU_EDP_TX0+ 39
1U_6.3V_K_X5R_0201
IFP_IOVDD_4 IFPD_L0
1 1 1 1 1 CV 1uf 0 1uf Under
4.7U_0603_6.3V6K
CV 8 1uf 0 1uf Under

OPT@
OPT@
OPT@
OPT@
2 2 @ 2 2 2 N18P-FCBGA960_BGA960
CV68
CV459
CV223
CV227
CV1174
ADD HDMI Port @ GPU_EDP_AUX# RV1293 1 OPT@ 2 100K_0402_5%

N18P-FCBGA960_BGA960
GPU_EDP_AUX RV1294 1 OPT@ 2 100K_0402_5%
@
Change HDMI P RT to IFPC follow Y550 wei 7/30
near GPU under GPU
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_(3/6):VRAM I/F

D 1.0
5 4 3 2 1
5 4 3 2 1
UV1C
3/17 FBB
UV1B
2/17 FBA
33,34 FBB_D[0..63]
m
+FB_PLLAVDD
FBB_D0 G9
31,32 FBA_D[0..63] FBB_D1 E9 FBB_D0 FBB_CMD[0..33] 33,34
D FBA_D0 FBB_D2 FBB_D1 FBB_CMD0 D
1U_6.3V_M_X5R_0201
L28 K27 G8 D13
FBA_D1 M29 FBA_D0 FB_REFPLL_AVDD FBB_D3 F9 FBB_D2 FBB_CMD0 E14 FBB_CMD1
co
FBA_D2 L29 FBA_D1 FBB_D4 F11 FBB_D3 FBB_CMD1 F14 FBB_CMD2
FBA_D2 1 FBB_D4 FBB_CMD2
FBA_D3 FBB_D5 FBB_CMD3
OPT@
M28 G11 A12
FBA_D4 N31 FBA_D3 FBB_D6 F12 FBB_D5 FBB_CMD3 B12 FBB_CMD4
FBA_D5 P29 FBA_D4 FBB_D7 G12 FBB_D6 FBB_CMD4 C14 FBB_CMD5
FBA_D6 R29 FBA_D5 2 FBB_D8 G6 FBB_D7 FBB_CMD5 B14 FBB_CMD6
CV64
FBA_D6 FBB_D8 FBB_CMD6
k.
FBA_D7 P28 Under GPU FBB_D9 F5 G15 FBB_CMD7
FBA_D8 J28 FBA_D7 FBB_D10 E6 FBB_D9 FBB_CMD7 F15 FBB_CMD8
FBA_D9 H29 FBA_D8 FBA_CMD[0..33] 31,32 FBB_D11 F6 FBB_D10 FBB_CMD8 E15 FBB_CMD9
FBA_D10 J29 FBA_D9 U30 FBA_CMD0 FBB_D12 F4 FBB_D11 FBB_CMD9 D15 FBB_CMD10
FBA_D11 FBA_D10 FBA_CMD0 T31 FBA_CMD1 FBB_D13 FBB_D12 FBB_CMD10 FBB_CMD11
oc
H28 G4 A14
FBA_D12 G29 FBA_D11 FBA_CMD1 U29 FBA_CMD2 FBB_D14 E2 FBB_D13 FBB_CMD11 D14 FBB_CMD12
FBA_D13 E31 FBA_D12 FBA_CMD2 R34 FBA_CMD3 FBB_D15 F3 FBB_D14 FBB_CMD12 A15 FBB_CMD13
FBA_D14 E32 FBA_D13 FBA_CMD3 R33 FBA_CMD4 FBB_D16 C2 FBB_D15 FBB_CMD13 B15 FBB_CMD14
FBA_D15 F30 FBA_D14 FBA_CMD4 U32 FBA_CMD5 FBB_D17 D4 FBB_D16 FBB_CMD14 C17 FBB_CMD15
FBA_D16 C34 FBA_D15 FBA_CMD5 U33 FBA_CMD6 FBB_D18 D3 FBB_D17 FBB_CMD15 D18 FBB_CMD16
nl
FBA_D17 D32 FBA_D16 FBA_CMD6 U28 FBA_CMD7 FBB_D19 C1 FBB_D18 FBB_CMD16 E18 FBB_CMD17
FBA_D18 B33 FBA_D17 FBA_CMD7 V28 FBA_CMD8 GDDR6 CMD Mapping FBB_D20 B3 FBB_D19 FBB_CMD17 F18 FBB_CMD18
x16 Mode
FBA_D19 C33 FBA_D18 FBA_CMD8 V29 FBA_CMD9 FBB_D21 C4 FBB_D20 FBB_CMD18 A20 FBB_CMD19
Lower 0..31 Upper 32..63
FBA_D20 F33 FBA_D19 FBA_CMD9 V30 FBA_CMD10 FBB_D22 B5 FBB_D21 FBB_CMD19 B20 FBB_CMD20
DRAM1 DRAM2
u
FBA_D21 F32 FBA_D20 FBA_CMD10 U34 FBA_CMD11 FBB_D23 C5 FBB_D22 FBB_CMD20 C18 FBB_CMD21
FBA_D22 H33 FBA_D21 FBA_CMD11 U31 FBA_CMD12 CHA-Byte 0,1 CHA-Byte 4,5 FBB_D24 A11 FBB_D23 FBB_CMD21 B18 FBB_CMD22
FBA_D23 H32 FBA_D22 FBA_CMD12 V34 FBA_CMD13 FBB_D25 C11 FBB_D24 FBB_CMD22 G18 FBB_CMD23
CA0_A CMD13 CMD29
st
FBA_D24 P34 FBA_D23 FBA_CMD13 V33 FBA_CMD14 FBB_D26 D11 FBB_D25 FBB_CMD23 G17 FBB_CMD24
CA1_A CMD15 CMD31
FBA_D25 P32 FBA_D24 FBA_CMD14 Y32 FBA_CMD15 FBB_D27 B11 FBB_D26 FBB_CMD24 F17 FBB_CMD25
CA2_A CMD0 CMD16
FBA_D26 P31 FBA_D25 FBA_CMD15 AA31 FBA_CMD16 FBB_D28 D8 FBB_D27 FBB_CMD25 D16 FBB_CMD26
CA3_A CMD9 CMD25
FBA_D27 P33 FBA_D26 FBA_CMD16 AA29 FBA_CMD17 FBB_D29 A8 FBB_D28 FBB_CMD26 A18 FBB_CMD27
CA4_A CMD11 CMD22
FBA_D27 FBA_CMD17 AA28 FBB_D29 FBB_CMD27
fa
FBA_D28 L31 FBA_CMD18 FBB_D30 C8 D17 FBB_CMD28
CA5_A CMD12 CMD21
FBA_D29 L34 FBA_D28 FBA_CMD18 AC34 FBA_CMD19 FBB_D31 B8 FBB_D30 FBB_CMD28 A17 FBB_CMD29
CA6_A CMD3 CMD24
FBA_D30 L32 FBA_D29 FBA_CMD19 AC33 FBA_CMD20 FBB_D32 F24 FBB_D31 FBB_CMD29 B17 FBB_CMD30
CA7_A CMD4 CMD23
FBA_D31 L33 FBA_D30 FBA_CMD20 AA32 FBA_CMD21 FBB_D33 G23 FBB_D32 FBB_CMD30 E17 FBB_CMD31
CA8_A CMD6 CMD26
FBA_D32 AG28 FBA_D31 FBA_CMD21 AA33 FBA_CMD22 FBB_D34 E24 FBB_D33 FBB_CMD31 G14 FBB_CMD32
s-
CA9_A CMD5 CMD17
FBA_D33 AF29 FBA_D32 FBA_CMD22 Y28 FBA_CMD23 FBB_D35 G24 FBB_D34 FBB_CMD32 G20 FBB_CMD33
CABI_A CMD8 CMD30
FBA_D34 AG29 FBA_D33 FBA_CMD23 Y29 FBA_CMD24 FBB_D36 D21 FBB_D35 FBB_CMD33 C12 FBB_DEBUG0 1 @ 2
CKE_A CMD7 CMD33 FBVDDQ
FBA_D35 AF28 FBA_D34 FBA_CMD24 W31 FBA_CMD25 FBB_D37 E21 FBB_D36 FBB_CMD34 C20 RV121
FBA_D36 AD30 FBA_D35 FBA_CMD25 Y30 FBA_CMD26 CHB-Byte 6,7 FBB_D38 G21 FBB_D37 FBB_CMD35 60.4_0402_1%
CHB-Byte 2,3
m
FBA_D37 AD29 FBA_D36 FBA_CMD26 AA34 FBA_CMD27 FBB_D39 F21 FBB_D38 FBB_DEBUG1 1 @ 2
CA0_B CMD10 CMD27
FBA_D38 AC29 FBA_D37 FBA_CMD27 Y31 FBA_CMD28 FBB_D40 G27 FBB_D39 RV122 1.55V
CA1_B CMD1 CMD28
C FBA_D39 AD28 FBA_D38 FBA_CMD28 Y34 FBA_CMD29 FBB_D41 D27 FBB_D40 60.4_0402_1% C
CA2_B CMD32 CMD19
FBA_D40 AJ29 FBA_D39 FBA_CMD29 Y33 FBA_CMD30 FBB_D42 G26 FBB_D41 D12
CA3_B CMD14 CMD20
FBA_D41 FBA_D40 FBA_CMD30 V31 FBA_CMD31 FBB_D43 FBB_D42 FBB_CLK0 FBB_CLK0 33
ru
AK29 CA4_B CMD11 CMD22 E27 E12
FBA_D42 AJ30 FBA_D41 FBA_CMD31 R28 FBA_CMD32 FBB_D44 E29 FBB_D43 FBB_CLK0* E20 FBB_CLK0# 33
CA5_B CMD12 CMD21
FBA_D43 AK28 FBA_D42 FBA_CMD32 AC28 FBA_CMD33 FBB_D45 F29 FBB_D44 FBB_CLK1 F20 FBB_CLK1 34
CA6_B CMD3 CMD24
FBA_D44 AM29 FBA_D43 FBA_CMD33 R32 FBA_DEBUG0 1 2 FBB_D46 E30 FBB_D45 FBB_CLK1* FBB_CLK1# 34
FBA_D44 FBA_CMD34 AC32
@ FBVDDQ 1.55V CA7_B CMD4 CMD23
FBB_D46
FBA_D45 AM31 RV119 CA8_B CMD6 CMD26
FBB_D47 D30
FBA_CMD35
.fo
FBA_D46 AN29 FBA_D45 FBA_DEBUG1 60.4_0402_1% FBB_D48 A32 FBB_D47
CA9_B CMD5 CMD17
FBA_D47 AM30 FBA_D46 1 @ 2 FBB_D49 C31 FBB_D48
CABI_B CMD8 CMD30
FBA_D48 AN31 FBA_D47 RV120 FBB_D50 C32 FBB_D49 F8 FBB_WCK01
CKE_B CMD7 CMD33
FBA_D49 AN32 FBA_D48 60.4_0402_1% FBB_D51 B32 FBB_D50 FBB_WCK01 E8 FBB_WCK01_N FBB_WCK01 33
FBA_D50 AP30 FBA_D49 FBB_D52 D29 FBB_D51 FBB_WCK01* A5 FBB_WCK23 FBB_WCK01_N 33
RESET* CMD2 CMD18
FBA_D51 AP32 FBA_D50 R30 FBA_CLK0 FBB_D53 A29 FBB_D52 FBB_WCK23 A6 FBB_WCK23_N FBB_WCK23 33
w
FBA_D52 AM33 FBA_D51 FBA_CLK0 R31 FBA_CLK0# FBA_CLK0 31 FBB_D54 C29 FBB_D53 FBB_WCK23* D24 FBB_WCK45 FBB_WCK23_N 33
FBA_D53 AL31 FBA_D52 FBA_CLK0* AB31 FBA_CLK1 FBA_CLK0# 31 FBB_D55 B29 FBB_D54 FBB_WCK45 D25 FBB_WCK45_N FBB_WCK45 34
FBA_D54 AK33 FBA_D53 FBA_CLK1 AC31 FBA_CLK1# FBA_CLK1 32 FBB_D56 B21 FBB_D55 FBB_WCK45* B27 FBB_WCK67 FBB_WCK45_N 34
FBA_D55 AK32 FBA_D54 FBA_CLK1* FBA_CLK1# 32 FBB_D57 C23 FBB_D56 FBB_WCK67 C27 FBB_WCK67_N FBB_WCK67 34
w
FBA_D56 AD34 FBA_D55 FBB_D58 A21 FBB_D57 FBB_WCK67* FBB_WCK67_N 34
FBA_D57 AD32 FBA_D56 FBB_D59 C21 FBB_D58
FBA_D58 AC30 FBA_D57 FBB_D60 B24 FBB_D59
FBA_D59 AD33 FBA_D58 FBB_D61 C24 FBB_D60
w
FBA_D60 AF31 FBA_D59 FBB_D62 B26 FBB_D61 D6 FBB_WCKB01
FBA_D61 AG34 FBA_D60 FBB_D63 C26 FBB_D62 FBB_WCKB01 D7 FBB_WCKB01_N FBB_WCKB01 33
FBA_D62 AG32 FBA_D61 FBB_D63 FBB_WCKB01* C6 FBB_WCKB23 FBB_WCKB01_N 33
FBA_D63 AG33 FBA_D62 FBB_WCKB23 B6 FBB_WCKB23_N FBB_WCKB23 33
FBA_D63 K31 FBA_WCK01 FBB_DBI0# E11 FBB_WCKB23* F26 FBB_WCKB45 FBB_WCKB23_N 33
FBA_WCK01 L30 FBA_WCK01_N FBA_WCK01 31 33 FBB_DBI0# FBB_DBI1# E3 FBB_DQM0 FBB_WCKB45 E26 FBB_WCKB45_N FBB_WCKB45 34
FBA_DBI0# P30 FBA_WCK01* H34 FBA_WCK23 FBA_WCK01_N 31 33 FBB_DBI1# FBB_DBI2# A3 FBB_DQM1 FBB_WCKB45* A26 FBB_WCKB67 FBB_WCKB45_N 34
31 FBA_DBI0# FBA_DBI1# F31 FBA_DQM0 FBA_WCK23 J34 FBA_WCK23_N FBA_WCK23 31 33 FBB_DBI2# FBB_DBI3# C9 FBB_DQM2 FBB_WCKB67 A27 FBB_WCKB67_N FBB_WCKB67 34
31 FBA_DBI1# FBA_DBI2# F34 FBA_DQM1 FBA_WCK23* AG30 FBA_WCK45 FBA_WCK23_N 31 33 FBB_DBI3# FBB_DBI4# F23 FBB_DQM3 FBB_WCKB67* FBB_WCKB67_N 34
31 FBA_DBI2# FBA_DBI3# M32 FBA_DQM2 FBA_WCK45 AG31 FBA_WCK45_N FBA_WCK45 32 34 FBB_DBI4# FBB_DBI5# F27 FBB_DQM4
31 FBA_DBI3# FBA_DBI4# AD31 FBA_DQM3 FBA_WCK45* AJ34 FBA_WCK67 FBA_WCK45_N 32 34 FBB_DBI5# FBB_DBI6# C30 FBB_DQM5
32 FBA_DBI4# FBA_DBI5# AL29 FBA_DQM4 FBA_WCK67 AK34 FBA_WCK67_N FBA_WCK67 32 34 FBB_DBI6# FBB_DBI7# A24 FBB_DQM6
32 FBA_DBI5# FBA_DBI6#AM32 FBA_DQM5 FBA_WCK67* FBA_WCK67_N 32 34 FBB_DBI7# FBB_DQM7
32 FBA_DBI6# FBA_DBI7# AF34 FBA_DQM6 +FB_PLLAVDD
32 FBA_DBI7# FBA_DQM7 FBB_EDC0 D10
33 FBB_EDC0 FBB_EDC1 D5 FBB_DQS_WP0
FBA_EDC0 M31 33 FBB_EDC1 FBB_EDC2 C3 FBB_DQS_WP1
31 FBA_EDC0 FBA_EDC1 G31 FBA_DQS_WP0 J30 FBA_WCKB01 33 FBB_EDC2 FBB_EDC3 B9 FBB_DQS_WP2 H17 +FB_PLLAVDD
31 FBA_EDC1 FBA_EDC2 E33 FBA_DQS_WP1 FBA_WCKB01 J31 FBA_WCKB01_N FBA_WCKB01 31 33 FBB_EDC3 FBB_EDC4 E23 FBB_DQS_WP3 FBB_PLL_AVDD
1U_6.3V_M_X5R_0201
B 31 FBA_EDC2 FBA_EDC3 M33 FBA_DQS_WP2 FBA_WCKB01* J32 FBA_WCKB23 FBA_WCKB01_N 31 34 FBB_EDC4 FBB_EDC5 E28 FBB_DQS_WP4 B
31 FBA_EDC3 FBA_EDC4 AE31 FBA_DQS_WP3 FBA_WCKB23 J33 FBA_WCKB23_N FBA_WCKB23 31 34 FBB_EDC5 FBB_EDC6 B30 FBB_DQS_WP5
32 FBA_EDC4 FBA_EDC5 AK30 FBA_DQS_WP4 FBA_WCKB23* AH31 FBA_WCKB45 FBA_WCKB23_N 31 34 FBB_EDC6 FBB_EDC7 A23 FBB_DQS_WP6 1
32 FBA_EDC5 FBA_EDC6 AN33 FBA_DQS_WP5 FBA_WCKB45 AJ31 FBA_WCKB45_N FBA_WCKB45 32 34 FBB_EDC7 FBB_DQS_WP7
32 FBA_EDC6 FBA_EDC7 AF33 FBA_DQS_WP6 FBA_WCKB45* AJ32 FBA_WCKB67 FBA_WCKB45_N 32
OPT@
32 FBA_EDC7 FBA_DQS_WP7 FBA_WCKB67 AJ33 FBA_WCKB67_N FBA_WCKB67 32
FBA_WCKB67* FBA_WCKB67_N 32 2
CV1161
@
Under GPU
+FB_PLLAVDD
U27
FBA_PLL_AVDD
1U_6.3V_M_X5R_0201
1 FBVDDQ FBVDDQ
H31
3.9P_50V_B_NPO_0402
FB_VREF
OPT@
2
2
1
N18P-FCBGA960_BGA960 CKE_A CKE_A
CV1160
1
OPT@ OPT@ @ RV1286 RV1287 RV1288 RV1289
RC702 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
CV1522 1/20W_49.9_1%_0201 OPT@ OPT@ OPT@ OPT@
2
1
2
FBA_CMD7 FBB_CMD7
Under GPU FBA_CMD33 FBB_CMD33
FBA_CMD2 FBB_CMD2
FBA_CMD18 FBB_CMD18
+FB_PLLAVDD
A A
30ohms (ESR=0.01) Bead
1
1
P/N;SM01000M300 RESET RV76 RV80 RESET RV87 RV88
N18 change
22U_0603_6.3V6-M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+1.8VS_VGA +FB_PLLAVDD 1 1 1 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%

2 OPT@ OPT@ OPT@ OPT@
2
2
2 2 2
1 2 +FB_PLLAVDD
OPT@
OPT@
OPT@
CV475
CV474
CV562
LV7
HCB1608KF-300T60_2P
OPT@ Title
Security Classification LC Future Center Secret Data
Place close to BGA Near GPU Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_(3/6):VRAM I/F
Custom 1.0
5 4 3 2 1
5 4 3 2 1
+1.8VS_AON
2
UV1P RV197 RV1202 RV199
12/17 MISC2 +1.8VS_AON +1.8VS_AON 100K_0402_5% 10K_0402_1% 100K_0402_5%
@ @ @ 1:ENABLE 0:DISABLE
SOR0 DISABLE
1
SOR1/2/3 ENABLE
2
H6 ROM_CS# ROM_SI
ROM_CS* RV1105 GPU ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0]
ROM_SI 1 1 ROM_SO
H5 10K_0402_5% CV465 CV464
ROM_SI H7 ROM_SO OPT@ 10U 6.3V M X5R 0402 .1U_0402_10V6-K
STRAP0 J2 ROM_SO H4 ROM_SCLK ROM_SCLK
@ OPT@ N18P L L L ENABLE
1
STRAP1 J7 STRAP0 ROM_SCLK UV3 2 2
STRAP2 J6 STRAP1 ROM_CS# RV1102 2 OPT@ 1 33_0402_5% ROM_CS#_R 1 8
STRAP3 J5 STRAP2 ROM_SO RV1101 2 1@ 0_0402_5% ROM_SO_R 2 CS# VCC 7
2
@ STRAP4 J3 STRAP3 3 DO HOLD# 6 ROM_SCLK_R RV1103 2 OPT@ 1 33_0402_5% ROM_SCLK
STRAP5 RV17 1 2 0_0402_5% MULTI_STRAP J1 STRAP4 4 WP# CLK 5 ROM_SI_R RV1104 2 OPT@ 1 33_0402_5% ROM_SI RV200 RV1203 RV202
STRAP5 GND DI 100K_0402_5% 10K_0402_1% 100K_0402_5%
1
W25Q80EWSNIG_SO8 OPT@ OPT@ OPT@

RV16 OPT@
1
40.2K_0402_1% E1
@ BUFRST*
1
2
RV203
N18P-FCBGA960_BGA960 @ 10K_0402_5%
@
2
D D
+1.8VS_AON
+1.8VS_AON
I2CB_SCL RV22 1 OPT@ 2 2.2K_0402_5%
+1.8VS_AON I2CB_SDA RV25 1 OPT@ 2 2.2K_0402_5%
2
@ 1V8_MAIN_EN RV27 2 OPT@ 1 10K_0402_5%
RV1201 1 2 0_0402_5% RV187 RV188 RV189
100K_0402_5% 100K_0402_5% 100K_0402_5%
NVVDD_PSI RV28 1 @ 2 10K_0402_5% @ @
+1.8VS_AON
1
@
VRAMCFG
1
OPT@ VGA_ALERT# RV23 1 OPT@ 2 10K_0402_5%
CV1185 UV1O
VGA_AC_DET_R GPU VRAM FB Memory (GDDR6) RAMCFG[4:0] STRAP2 STRAP1 STRAP0
1U_0402_6.3V6K 10/17 MISC1 RV26 1 OPT@ 2 10K_0402_5% STRAP2
2
2
ADC_MUX_SEL RV3811 OPT@ 2 10K_0402_5% STRAP1
RV214 Samsung 8Gb K4Z80325BC-HC14 0(0x0000) L L L
100K_0402_5%
VGA_SMB_CK2 4GB
OPT@ T4 STRAP0
AG10 I2CS_SCL T3 VGA_SMB_DA2
Internal Thermal Sensor Micron 8Gb MT61K256M32JE-14:A 1(0x0001) L L H
1
TS_AVDD I2CS_SDA
2
2
2
OVERT# M1 R2 I2CC_SCL
25 OVERT# OVERT I2CC_SCL I2CC_SDA MEM_VREF
R3 RV32 2 OPT@ 1 10K_0402_5% RV192 RV193 RV194
TV5 @ 1 AP9 I2CC_SDA 100K_0402_5% 100K_0402_5% 100K_0402_5%
TS_VREF R7 I2CB_SCL NB_FGC6 RV7582 OPT@ 1 10K_0402_5% @
K4 I2CB_SCL R6 I2CB_SDA I2CB_SCL 40
@ @
1
1
1
THERMDN I2CB_SDA I2CB_SDA 40 PWM_SW_SELECT RV1302 1 OPT@ 2 10K_0201_5%
K3
THERMDP iGPU_EDP_ENBKL RV1299 1 @ 2 100K_0201_5%
P6 NVVDD_PWM_VID
GPIO0 M3 FB_GC6_EN NVVDD_PWM_VID 79 GPU_MUX_CNTL RV1301 1 OPT@ 2 10K_0201_5%
TV1 @ 1 AM10 GPIO1 L6 GPU_EVENT#
TV2 @ 1 AP11 JTAG_TCK GPIO2 P5 GPU_MUX_CNTL GPU_EDP_ENBKL RV1305 1 OPT@ 2 100K_0201_5%
TV3 @ 1 AM11 JTAG_TMS GPIO3 P7 1V8_MAIN_EN GPU_MUX_CNTL 40
RV37 TV4 @ 1 AP12 JTAG_TDI GPIO4 L7 GPU_FRAME_LOCK# GPU_FRAME_LOCK# 41 GPU_EDP_PWM RV1306 1 OPT@ 2 100K_0201_5%
OPT@1 2 10K_0402_5% JTAG_TRST AN11 JTAG_TDO GPIO5 M7 NVVDD_PSI_GPU RV107 1 2 0_0402_5%
RV24 1 2 10K_0402_5% NVJTAG_SEL AK11 JTAG_TRST* GPIO6 N8 GPU_EDP_PWM @
NVVDD_PSI 79 GPU_EDP_ENVDD RV1307 1 OPT@ 2 10K_0201_5%
OPT@ NVJTAG_SEL GPIO7 L3 VRAM_VDDQ_ADJ GPU_EDP_PWM 39
@ GPIO8 M2 VGA_ALERT# VRAM_VDDQ_ADJ 76
RV1228 1 2 0_0402_5% ADC_IN_P_GPU AN9 GPIO9 L1 MEM_VREF
80 ADC_IN_P ADC_IN GPIO10 MEM_VREF 31,33
@ M5 GPU_EDP_ENVDD +1.8VS_AON
RV1229 1 2 0_0402_5% ADC_IN_N_GPU AM9 GPIO11 N3 VGA_AC_DET_R GPU_EDP_ENVDD 39
80 ADC_IN_N ADC_IN* GPIO12 M4 iGPU_EDP_ENBKL
GPIO13 N4 IFPA_HPD iGPU_EDP_ENBKL 40 VGA_DEVICE
GPIO14 P2 PWM_SW_SELECT_GPIO15 RV1303 2 @ 1 0_0402_5% IFPA_HPD 44
GPIO15 R8 PWM_SW_SELECT_GPIO16 RV1304 2 1@ 0_0402_5%
GPIO16 M6 GPU_EDP_HPD PWM_SW_SELECT 40 STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE
2
2
2
GPIO17 R1 IFPE_HPD 1
PAD TV16
GPU_EDP_HPD 39 +1.8VS_AON
GPIO18 P3 @ ort swa HDMI change to C ort RV19 RV21 RV74
GPIO19 P4 NB_FGC6 del - ort HPD GPI
L L H 0 0 0 1
100K_0402_5% 100K_0402_5% 100K_0402_5%
GPIO20 P1 GPU_EDP_ENBKL yong 07/1 OPT@ @ @
GPIO21 P8 ADC_MUX_SEL_R RV1239 1 2@ 0_0402_5% GPU_EDP_ENBKL 39 VRAM_VDDQ_ADJ 2 @ 1 10K_0402_5%
1
1
1
GPIO22 T8 GPU_PEX_RST_HOLD#_R @ 1 ADC_MUX_SEL 80
RV41
GPIO23 L2 PAD 1: SMB_ALT_ADDR ENABLE
TV14 OPT@ STRAP5
GPIO24 R4 FBVDDQ_PSI @ 1 2 1 10K_0402_5%
GPIO25 R5 GPIO26_FP_FUSE PAD 0: SMB_ALT_ADDR DISABLE
TV15 RV43 STRAP4
GPIO26 U3 IFPC_HPD GPIO26_FP_FUSE 29
GPIO27 IFPC_HPD 42 STRAP3 1: DEVID_SEL REBRAND
@ VGA_ALERT# 20 0: DEVID_SEL ORIGNAL
2
2
@
VGA_ALERT# 2 1 RV78 RV75 RV77 1: PCIE_CFG LOW POWER
DV6 RB751V-40_SOD323-2 100K_0402_5% 100K_0402_5% 100K_0402_5%
@ OPT@ OPT@ 0: PCIE_CFG HIGH POWER
VGA_AC_DET_R 2 1
1
1
VGA_AC_DET 52
DV1 RB751V-40_SOD323-2
1: VGA_DEVICE ENABLE
OPT@
0: VGA_DEVICE DISABLE
C C
+1.8VS_AON
+1.8VS_AON +3VS
+3VS DG Power on/off sequence

2
RV1209 RV1208 +3VALW RV12 @ +1.8VS_VGA

@ +3VS
2.2K_0402_5% 2.2K_0402_5% RV1212 RV1213 10K_0402_5% RV51 1 2 0_0402_5% DV10 +3VS
PCH_FB_GC6_EN 19 OVERT#_NVEN 1 2
OPT@ OPT@ 2.2K_0402_5% 2.2K_0402_5% OPT@
5
OPT@ OPT@ 25 OVERT#_NVEN

1
2
1
RV57 RB751V-40_SOD323-2
G2
1
1
1
10K_0402_5%
2
I2CC_SCL 4 3 OPT@ FB_GC6_EN_R RV13 RV334
S2 D2 NVDD_SCL 79 RV109
0_0402_5% 10K_0402_1%
10K_0402_5%
DV9 @
1
D OPT@ OPT@
QV35B @
2
PJT7838_SOT363-6 5 QV7B PXS_PWREN RV2201 2 0_0402_5%3
1
OPT@ LBSS138DW1T1G_SOT363-6 19,62 PXS_PWREN 1
G
2 1 1V8_MAIN_EN_R 2 NVVDD_EN 29,79 PXS_PWREN
S OPT@
OPT@
4
1
RV1211
2
0_0402_5% @ BAT54AW_SOT323-3 RV335

6
D 100K_0402_1%
G1
1
FB_GC6_EN 2 QV7A @
I2CC_SDA 1 6 1 @ 2 0_0402_5%
G LBSS138DW1T1G_SOT363-6
2
S1 D1 NVDD_SDA 79
OPT@ RV333 RV115
1
S
1
m
Vgs(th)≤1.0V RV313
100K_0402_5%
QV35A @
10K_0402_5%
2
PJT7838_SOT363-6
OPT@
OPT@
2
2 1
RV1210 RV55 1 @ 2 0_0402_5%
0_0402_5% @
+1.8VS_AON
co
+3VS
1
OPT@
2
PXS_PWREN 1 2 RV331
For Optimus Power OFF RV89 8.2K_0402_1%
DV8 10K_0402_5% OPT@
RB751V-40_SOD323-2
@ @
2
1V8_MAIN_EN_R RV1135 1 2 0_0402_5%
1
DV7
k.
1V8_MAIN_EN RV1134 1 @ 2 0_0402_5% 2 @
For GC6 Power OFF 1 RV98 2 1 0_0402_5%
NVVDD_PWRGD 3 1V0_MAIN_EN 30
For Power ON
1
79 NVVDD_PWRGD
RV4 1 OPT@ 2 BAT54AW_SOT323-3 RV330

+3VS
10K_0402_5% OPT@ 10K_0402_1%
OPT@
c
2
+1.8VS_AON
PLT_RST_VGA#
lo
2
2
2
2
RV1241 RV1138 RV1240

RV1136
10K_0402_5% 0_0402_5% 0_0402_5%
+1.8VS_AON 10K_0402_5%
@ OPT@ OPT@
@
1
1
1
1
+3VS
un
+1.8VS_AON +1.8VS_AON
2
2
B B
RV5 RV6 +3VS
2
2.2K_0402_5% 2.2K_0402_5% +3VALW RV1129
2
5
OPT@ OPT@ 10K_0402_5%

1
RV59 OPT@
G2
1
1
RV319
1
0_0402_5%
VGA_SMB_CK2 4 3 10K_0402_5% 2 RV1132
1
S2 D2 EC_SMB_CK2 16,52,59,60 OPT@ RV320
@ 10K_0402_5%
1
10K_0402_5% 1V8_MAIN_EN_R
OPT@
2
OPT@ 1V8_MAIN_EN_R 29
QV3B
2
PJT7838_SOT363-6
2
st
OPT@ D
@ 5 QV32B
2 1 GPU_EVENT# 3 1 GPU_EVENT#_R RV3181 2 0_0402_5% G LBSS138DW1T1G_SOT363-6
2
RV1238 PCH_GPU_EVENT# 19
S OPT@
4
0_0402_5% @
G1
QV8
6
VGA_SMB_DA2 1 6 D
LSI1012XT1G_SC-89-3
S1 D1 EC_SMB_DA2 16,52,59,60
OPT@
1V8_MAIN_EN 2 QV32A
Vgs(th)≤0.9V
fa
Vgs(th)≤1.0V G LBSS138DW1T1G_SOT363-6
QV3A PU AT C SID +3VS AND 7K S OPT@
1
PJT7838_SOT363-6 RV3171 @ 2 0_0402_5%

OPT@ RV1133
10K_0402_5% @
2 1
RV1235
2
0_0402_5% @
follow 330G-ICH NV review result SF0926
s-
1V8_MAIN_EN 1
RV1231 @ 2 0_0402_5% 1V8_MAIN_EN_R
m
For GC6 20180827 ref Y540 change0927SF
ru
UV12
FB_GC6_EN_R RV1101 2@ 0_0402_5% 1 4 FBVDDQ_PWR_EN
1.0VGS_PG IN B OUT Y FBVDDQ_PWR_EN 30,76
RV3251 2@ 0_0402_5% 2
+3VS IN A @
NVVDD_PWRGD 1 2 3 5 RV1218 1 2 0_0402_5%
+3VS
RV1123 @ 10K_0402_5% GND Vcc
0.1U_0402_25V6
.fo
MC74VHC1G32DFT2G_SC70-5 1
1
OPT@
1
@ CV1189
CV458
RV38 .1U_0402_10V6-K
2
0_0402_5% 2 OPT@
@
+3VS
2
1 +1.8VS_AON
w
2
CV58
RV216 .1U_0402_10V6-K
2
10K_0402_5% 2 OPT@
@ RV50
10K_0402_5%
1
OPT@
5
UV2
w
1
PLT_RST# 1 @
P
18,46,47,52,55,56 PLT_RST# B 4 VGA_RST# PLT_RST_VGA#

RV44 1 2 0_0402_5%
2 Y PLT_RST_VGA# 25
G
19 PXS_RST# A
MC74VHC1G09DFT2G_SC70-5
3
A OPT@ A
1
+3VS
RV324
w
RV217 100K_0402_5%
100K_0402_5% OPT@
OPT@
2
2
BAT54AW RV104
VF=0.32V @ IF=1mA 10K_0402_5%
DV3 OPT@
RV49 2 1@ 0_0402_5% 2
1
76 FBVDDQ_PWROK 1
RV64 2 1@ 0_0402_5% 3 VGA_PWRGD 20,25
77 1.0VGS_PG
BAT54AW_SOT323-3
OPT@
Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_(4/6):GPIO

Custom
Y550 1.0
Date: Thursday, January 16, 2020 Sheet 28 of 83

5 4 3 2 1
5 4 3 2 1
1.8V Total 1A (AON+MAIN)

5A Peak 8A 0.5A +1.8VS_AON
FBVDDQ
Cost down list: UV1H UV1I
1U 4Pcs 14/17 FBVDDQ 17/17 1V8_AON
+1.8VS_AON
Partition A Under GPU(below 150mils) AA27

AA30 FBVDDQ_01 under GPU near GPU
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
AB27 FBVDDQ_02 J8
CV99
CV112
CV113
CV100
CV101
CV102
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
AB33 FBVDDQ_03 1V8_AON_1 K8
1 1 1 1 1 1 1 1 1 1 1 1 FBVDDQ_04 1V8_AON_2
AC27
1U_0603_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
FBVDDQ_05 1 1 1 1 1 1 1 1 2 1 1 1 1
AD27 AG12
FBVDDQ_06 FP_FUSE_SRC
OPT@
OPT@
OPT@
OPT@
AE27
CV114
CV103
OPT@
@ @ @ @
2 2 2 2 2 2 2 2 2 2 2 2 FBVDDQ_07
OPT@
OPT@
AF27
FBVDDQ_08
CV104
CV105
CV106
CV115
@ 2 @ 2 2 2 2 2 2 2 1 2 2 @2 @ 2
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
AG27 @
FBVDDQ_09
CV205
CV206
B13
CV203
CV207
CV211
CV204
CV208
CV213
CV1475
CV1476
CV1477
CV1478
CV1479
D @ D
B16 FBVDDQ_10
B19 FBVDDQ_11
E13 FBVDDQ_12
E16 FBVDDQ_13
Partition B Under GPU(below 150mils) FBVDDQ_14
E19
H10 FBVDDQ_15
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_M_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
H11 FBVDDQ_16
CV1486
CV1487
CV1488
OPT@ CV1489
CV1490
CV1491
H12 FBVDDQ_17
1 1 1 1 1 1 1 1 1 1 1 1 FBVDDQ_18
H13 N18P-FCBGA960_BGA960
H14 FBVDDQ_19
FBVDDQ_20 @
OPT@
OPT@
OPT@
OPT@
H15
CV873
CV862
@ @ @
2 2 2 2 2 2 2 2 2 2 2 2 H16 FBVDDQ_21
FBVDDQ_22
CV863
CV868
CV864
CV865
H18 FP_FUSE_GPU
@ @ H19 FBVDDQ_23
H20 FBVDDQ_24
H21 FBVDDQ_25 1
1
H22 FBVDDQ_26
FBVDDQ FBVDDQ_27 RV1200 CV1104
H23
FBVDDQ_28 1/16W_2.21K_1%_0402 2.2U_0402_6.3V6M
H24 2
FBVDDQ_29 OPT@ OPT@
Under GPU(below 150mils) H8
H9 FBVDDQ_30
2
FBVDDQ_31
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2 2 2 2 L27
M27 FBVDDQ_32
N27 FBVDDQ_33
P27 FBVDDQ_34
1 1 1 1 R27 FBVDDQ_35
OPT@
OPT@
OPT@
@ FBVDDQ_36
T27
CALIBRATI N PIN N18P
CV94
CV86
CV88
CV87
T30 FBVDDQ_37
T33 FBVDDQ_38
FBVDDQ V27 FBVDDQ_39
Near GPU W27 FBVDDQ_40 FB_CAL_ _PD_VDDQ 0 hm 0 ohm 0 ohm
W30 FBVDDQ_41 RV9
W33 FBVDDQ_42
Near GPU FBVDDQ_43 FB_CAL_ _PU_GND 0 hm
Y27
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
10U_0603_6.3V6M
10U_0603_6.3V6M
FBVDDQ_44
2 2 1 1 1 1 1
FB_CAL_ T RM_GND 0 hm
33P_0402_50V8J
33P_0402_50V8J
1 1
only for N18P
OPT@
1 1 2 OPT@ 2 CD@2 2 2 +1.8VS_AON

OPT@
OPT@
RF_NS@
RF_NS@
CV91
CV97
CV93
CV90
CV92
OPT@
2 2 CD@
@
CV95
CV89
F1 FBVDDQ_SENSE_GPU RV90 1 2 0_0402_5%

CD90
CD89
FBVDDQ_SENSE FBVDDQ_VCC_SENSE 76
UV11
C F2 FBVDDQ_SENSE_GND_GPU A2 A1 FP_FUSE_GPU C
RV91 1 @ 2 0_0402_5% CV1103 1 2 OPT@
PROBE_FB_GND 2.2U_0402_6.3V6M VIN Vout
J27 FBCAL_VDDQ 1 OPT@ 2 B1 B2 GPIO26_FP_FUSE
FB_CAL_PD_VDDQ FBVDDQ GND ON GPIO26_FP_FUSE 28
RV92 40.2_0402_1%
m
H27 FBCAL_GND 1 OPT@ 2
FB_CAL_PU_GND
1
RV93 40.2_0402_1% AP22913CN4-7_X1-WLB0909-4
H25 FBCAL_TERM 1 OPT@ 2 OPT@ RV1198
FB_CAL_TERM_GND RV94 40.2_0402_1% 10K_0402_5%
co
OPT@
Place near balls
2
@
FBVDDQ
k.
FBVDDQ_VCC_SENSE @
RV310 1 2 2_0402_5%
oc
PLAC MIDWAY B TW N FBA AND FBB
nl
tu
UV1J
4/17 NC
s
AC6 AK9
AD4 NC_1 NC_20 AL10
fa
AD5 NC_2 NC_21 AL11
AE3 NC_3 NC_22 AL9
AE4 NC_4 NC_23 AN2
+1.8VS_VGA AF1 NC_5 NC_24 AP8
AF2 NC_6 NC_25 C15
s-
AF3 NC_7 NC_26 D19
B B
AF4 NC_8 NC_27 D20
AF5 NC_9 NC_28 D23
AG1 NC_10 NC_29 D26
NC_11 NC_30
m AG26
AG7
AH11
AJ26
AJ28
NC_12
NC_13
NC_14
NC_31
NC_32
NC_33
RSVD_GNDS_SENSE
NC_15
L8
M8
V32
U2
U1
ru
AJ4 NC_16RSVD_VDDS_SENSE
AJ5 NC_17
AK26 NC_18
AG26,AJ28 NC pin, NC_19
only for under GPU 1.8VS_VGA layout trace
.fo
2A
A N7 08L
Vds 30V
+1.8VS_AON +1.8VS_VGA Ids 15A
V20B+
w
Rdson 8mohm@Vgs V
0mohm@Vgs V N18P-FCBGA960_BGA960
QV16
18mohm@Vgs>10V @
AON7380_DFN8-5
Vgs +- 0V
2
RV42
w
1 Vgsth 1~3V
47K_0402_5% 2
OPT@ 5 3
w
1 CV74
1
+5VALW
2 1 10U_0603_6.3V6M
CV73 RV85
OPT@
4
Vg=16.4V@AC CV72 OPT@ 0.01U_0402_25V7K 47_0603_5%

1
Vg=7.38V@Battery 0.1U_0402_25V6 OPT@ 2

RV86 1@ 2@
2
47K_0402_5% 1 2
OPT@ RV83
1K_0402_5% 2
2
1
3
D OPT@ D
+1.8VGS_PWR_EN# 5 RV47 CV75 +1.8VGS_PWR_EN# 2
G 210K_0402_1% 0.1U_0402_25V6 G QV20
1
LBSS138DW1T1G_SOT363-6
S QV9B OPT@ OPT@ 2N7002KW_SOT323-3

4
LBSS138DW1T1G_SOT363-6
OPT@ S OPT@
2
3
6
@ D
A RV1285 OPT@ A
RV58 2 1 0_0402_5% 2 1 0_0402_5% 2 QV9A
28 1V8_MAIN_EN_R
G OPT@
0.1U_0402_25V6
S
1
1
PD3 0_0402_5% 2
3 PR4 1 2
CV38
@ RV84 +1.8V_MAIN discharger circuit

RV1284 100K_0402_5%
@
2 @ 1 0_0402_5% 1 @
28,79 NVVDD_EN 1
0_0402_5%
2
2 PR5 1 2
@
LBAT54SWT1G_SOT323-3
@
Reserve PD3/PR4/PR5/CV38 for NV sequence requirement

Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_(5/6):PWR
Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Y550 1.0

5 4 3 2 1
5 4 3 2 1
BOTH GP107 AND N18P-G5 NEED

NC AF30,AF32,AK31,AM34,E34,H30,M30,M34, NVVDD
A30,A9,B2,B23,D22,D28,D9,E4 NVVDD
UV1D UV1F NVVDD NVVDD UV1E
AG11
15/17 GND_1/2
GND_001 GND_071
AL18
16/17 GND_2/2 UV1G
13/17 NVVDD
9/17 XVDD
NVVDD
UNDER GPU NEAR GPU
A2 AL2 G25 P18 AA12 P12
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
CONFIGURABLE
33P_0402_50V8J
33P_0402_50V8J
GND_002 GND_072 GND_141 GND_190 VDD_01 VDD_51
330U_B2_2.5VM_R9M
A30 AL20 G28 P20 AA14 P14 POWER 1 1 1 1 1 1 1 1
GND_003 GND_073 GND_142 GND_191 VDD_02 VDD_52 1 1 1 1 1 1 1 1 1 1 1 1 1 1
A33 AL21 G3 P22 AA16 P16
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
CHANNELS +
A9 GND_004 GND_074 AL23 G30 GND_143 GND_192 P24 AA19 VDD_03 VDD_53 P19 U4
GND_005 GND_075 GND_144 GND_193 VDD_04 VDD_54 XVDD_01
RF_NS@
RF_NS@
OPT@
OPT@
OPT@
OPT@
AA11 AL24 G32 R12 AA21 P21 U5 2 2 2 2 2 2 2
GND_006 GND_076 GND_145 GND_194 VDD_05 VDD_55 XVDD_02 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CV137
CV134
CV149
CV1148
CV1149
AA13 AL26 G33 R14 AA23 P23 U6 2
CV139
CV140
CV141
CV142
CV143
CV144
CV145
CV146
CV1114
CV1115
CV1116
CV1118
CV1117
CV1119
CD94
CD93
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
AA15 AL28 G5 R16 AB11 R11 U7
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CD@
CV1422
AA17 GND_008 GND_078 AL30 G7 GND_147 GND_196 R19 AB13 VDD_07 VDD_57 R13 XVDD_04 U8
D
AA18 GND_009 GND_079 AL32 H30 GND_148 GND_197 R21 AB15 VDD_08 VDD_58 R15 XVDD_05 V1 D
@
AA20 AL33 K2 R23 AB17 R17 V2
AA22 GND_011 GND_081 AL5 K28 GND_150 GND_199 T11 AB18 VDD_10 VDD_60 R18 XVDD_07 V3
AA24 GND_012 GND_082 AM13 K30 GND_151 GND_200 T13 AB20 VDD_11 VDD_61 R20 XVDD_08 V4
AB12 GND_013 GND_083 AM16 K32 GND_152 GND_201 T15 AB22 VDD_12 VDD_62 R22 XVDD_09
om
AB14 AM19 K33 T17 AB24 R24
AB16 GND_015 GND_085 AM22 K5 GND_154 GND_203 T18 AC12 VDD_14 VDD_64 T12 V5
AB19 GND_016 GND_086 AM25 K7 GND_155 GND_204 T2 AC14 VDD_15 VDD_65 T14 XVDD_10 V6
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
AB2 GND_017 GND_087 AM34 L12 GND_156 GND_205 T20 AC16 VDD_16 VDD_66 T16 XVDD_11 V7
GND_018 GND_088 GND_157 GND_206 VDD_17 VDD_67 XVDD_12 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
AB21 AN1 L14 T22 AC19 T19 V8
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
AB23 GND_019 GND_089 AN10 L16 GND_158 GND_207 T24 AC21 VDD_18 VDD_68 T21 XVDD_13 W2
AB28 GND_020 GND_090 AN13 L19 GND_159 GND_208 T28 AC23 VDD_19 VDD_69 T23 XVDD_14 W3
OPT@
OPT@
OPT@
OPT@
GND_021 GND_091 GND_160 GND_209 VDD_20 VDD_70 XVDD_15 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
.c
AB30 AN16 L21 T32 AD11 U11 W4
CV1155
CV1154
CV1156
CV1157
CV1150
CV1153
CV1151
CV1152
CV1158
CV1159
CV1508
CV1512
CV1517
CV1519
CV1509
CV1510
CV1511
CV1513
CV1514
CV1515
CV1516
CV1518
@
@
@
AB32 AN19 L23 T5 AD13 U13 W5
AB5 GND_023 GND_093 AN22 M11 GND_162 GND_211 T7 AD15 VDD_22 VDD_72 U15 XVDD_17 W7
AB7 GND_024 GND_094 AN25 M13 GND_163 GND_212 U12 AD17 VDD_23 VDD_73 U17 XVDD_18
k
AC11 AN30 M15 U14 AD18 U18
AC13 GND_026 GND_096 AN34 M17 GND_165 GND_214 U16 AD20 VDD_25 VDD_75 U20 W8
AC15 GND_027 GND_097 AN4 M18 GND_166 GND_215 U19 AD22 VDD_26 VDD_76 U22 XVDD_19 Y1
oc
AC17 GND_028 GND_098 AN7 M20 GND_167 GND_216 U21 AD24 VDD_27 VDD_77 U24 XVDD_20 Y2
AC18 GND_029 GND_099 AP2 M22 GND_168 GND_217 U23 L11 VDD_28 VDD_78 V11 XVDD_21 Y3
AC20 GND_030 GND_100 AP33 Y23 GND_169 GND_218 V12 L13 VDD_29 VDD_79 V13 XVDD_22 Y4
AC22 GND_031 GND_101 B1 M24 GND_239 GND_219 V14 L15 VDD_30 VDD_80 V15 XVDD_23 Y5
AC24 GND_032 GND_102 B10 M30 GND_170 GND_220 V16 L17 VDD_31 VDD_81 V17 XVDD_24 Y6
nl
AD12 B2 M34 V19 L18 V18 Y7
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
10U_0603_6.3V6M
AD14 GND_034 GND_104 B22 N12 GND_172 GND_222 V21 L20 VDD_33 VDD_83 V20 XVDD_26 Y8
22U_0603_6.3V6-M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
GND_035 GND_105 GND_173 GND_223 VDD_34 VDD_84 XVDD_27 2 2 1 1 1 1 1 1 1 1
AD16 B23 N14 V23 L22 V22
AD19 GND_036 GND_106 B25 N16 GND_174 GND_224 W11 L24 VDD_35 VDD_85 V24
tu
AD21 GND_037 GND_107 B28 N19 GND_175 GND_225 W13 M12 VDD_36 VDD_86 W12 AA1
AD23 GND_038 GND_108 B31 N2 GND_176 GND_226 W15 M14 VDD_37 VDD_87 W14 XVDD_28 AA2 1 1 2 2 2 2 2 2 2 2
OPT@
CV433
CV436
CV1122
OPT@
OPT@
OPT@
AE2 B34 N21 W17 M16 W16 AA3
CV428
CV437
CV434
CV435
CV1120
CV1121
CD@
CD@
CV429
AE28 GND_040 GND_110 B4 N23 GND_178 GND_228 W18 M19 VDD_39 VDD_89 W19 XVDD_30 AA4
s
AE30 B7 N28 W20 M21 W21 AA5
AE32 GND_042 GND_112 C10 N30 GND_180 GND_230 W22 M23 VDD_41 VDD_91 W23 XVDD_32 AA6
AE33 GND_043 GND_113 C13 N32 GND_181 GND_231 W24 N11 VDD_42 VDD_92 Y11 XVDD_33 AA7
fa
AE5 GND_044 GND_114 C19 N33 GND_182 GND_232 W28 N13 VDD_43 VDD_93 Y13 XVDD_34 AA8
AE7 GND_045 GND_115 C22 N5 GND_183 GND_233 Y12 N15 VDD_44 VDD_94 Y15 XVDD_35
AF30 GND_046 GND_116 C25 N7 GND_184 GND_234 Y14 N17 VDD_45 VDD_95 Y17
C C
AF32 GND_047 GND_117 C28 P11 GND_185 GND_235 Y16 N18 VDD_46 VDD_96 Y18
s-
AH10 GND_048 GND_118 C7 P13 GND_186 GND_236 Y19 N20 VDD_47 VDD_97 Y20
AH13 GND_049 GND_119 D2 P15 GND_187 GND_237 Y21 N22 VDD_48 VDD_98 Y22
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
GND_050 GND_120 GND_188 GND_238 VDD_49 VDD_99 1 1 1 1 1 1 1 1 1 1 1 1 1
AH16 D22 P17 N24 Y24
AH19 GND_051 GND_121 D28 GND_189 VDD_50 VDD_100
m
AH2 GND_052 GND_122 D31 C16
AH22 GND_053 GND_123 D33 GND_OPT_1 W32 N18P-FCBGA960_BGA960 2 2 2 2 2 2 2 2 2 2 2 2 2
GND_054 GND_124 GND_OPT_2
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
AH24 D9
CV1126
CV1127
CV1130
CV1133
CV1124
CV1123
CV1125
CV1128
CV1129
CV1131
CV1132
CV1134
CV1135
CD@
CD@
CD@
CD@
CD@
GND_055 GND_125 @
AH28 E10
GND_056 GND_126
ru
AH29 E22 Optional CMD GNDs (2)
AH30 GND_057 GND_127 E25 NC for 4-Lyr cards
AH32 GND_058 GND_128 E34
AH33 GND_059 GND_129 E4 N18P-FCBGA960_BGA960
AH5 GND_060 GND_130 E5
.fo
GND_061 GND_131 @
AH7 E7
AJ7 GND_062 GND_132 F28
AK10 GND_063 GND_133 F7
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
AK31 GND_064 GND_134 G10
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
GND_065 GND_135 1 1 1 1 1 1 1 1 1 1 1
AK7 G13
GND_066 GND_136
w
AL12 G16
AL14 GND_067 GND_137 G19
AL15 GND_068 GND_138 G2 2 2 2 2 2 2 2 2 2 2 2
CV1140
CV1143
CV1141
GND_069 GND_139
OPT@
OPT@
OPT@
OPT@
AL17 G22
CV1137
CV1138
CV1139
CV1145
CV1146
CV1136
CV1142
CV1144
CD@
CD@
CD@
CD@
w
GND_070 GND_140 trace width: 16mils
differential voltage sensing.
differential signal routing.
@ VDD_SENSE
GND_SENSE
w
L4
L5
NVVDD_VDD_SENSE
NVVDD_VSS_SENSE
NVVDD_VDD_SENSE
NVVDD_VSS_SENSE
79
79
@
B B
Add RV332 for NVVDDS discharge Hai Y520 SVT

Change NVVDDS & +1.0VGS discharge circuit
HLZ SIV 0725
NVVDD +1.0VGS Change QV6/RV48/QV4/RV62 from REV@ to ns Hai Y520 SVT

FBVDDQ
1
+5VALW
15_0805_1%
15_0805_1%
15_0805_1%
15_0805_1%
15_0805_1%
15_0805_1%
15_0805_1%
RV61
2 RV327 1
2 RV328 1
RV45 1
2 RV332 1
2 RV326 1
RV63 1
2 RV329 1
470_0603_5%
@
OPT@
@
@
OPT@
OPT@
+5VALW RV48
2
47K_0402_5%
@
2
2
1
D QV6B
RV60
5
47K_0402_5% 2N7002KDWH_SOT363-6
G
1
1
OPT@
@
D
D
S
2
4
6
D QV6A
2 2
G G 2
28,76 FBVDDQ_PWR_EN G 2N7002KDWH_SOT363-6
LBSS139WT1G_SC70-3
@
S
S
A A
QV11 QV29 QV12
S
1
D
1
AO3402_SOT-23-3 AO3402_SOT-23-3
3
3
OPT@
2
28,77 1V0_MAIN_EN
@
G OPT@
S
3
Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_(6/6):PWR,VSS

Custom 1.0
5 4 3 2 1
5 4 3 2 1
UV4D
?
? UV4C
COMMON ?
?
FBVDDQ COMMON
27,32 FBA_CMD[0..33]
A11 A1 UV4B FBA_CMD13 H3 K1 +FBA_VREFC
A13 VSS_1 VDD_1 A14 UV4A FBA_CMD15 G11 CA0_A VREFC
A2 VSS_2 VDD_2 E10 FBA_CMD0 G4 CA1_A
NORMAL
A4 VSS_3 VDD_3 E5 FBA_CMD9 H12 CA2_A
VSS_4 VDD_4 27 FBA_D[0..15] NORMAL 27 FBA_D[16..31] CA3_A
B1 H13 x16 x8 FBA_CMD11 H5
B14 VSS_5 VDD_5 H2 FBA_D3 G2 FBA_D29 N2 FBA_CMD12 H10 CA4_A
C10 VSS_6 VDD_6 L13 FBA_D4 B3 DQ7_A FBA_D28 P3 DQ6_B FBA_CMD3 J12 CA5_A
C12 VSS_7 VDD_7 L2 FBA_D7 F2 DQ2_A FBA_D31 M2 DQ4_B FBA_CMD4 J11 CA6_A
D VSS_8 VDD_8 FBA_D5 DQ6_A BYTE3 FBA_D30 DQ7_B FBA_CMD6 CA7_A D
C3 P10 E3 P2 J4
C5 VSS_9 VDD_9 P5 FBA_D2 B4 DQ4_A FBA_D25 U3 DQ5_B FBA_CMD5 J3 CA8_A
VSS_10 VDD_10 BYTE0 FBA_D0 DQ0_A FBA_D24 DQ2_B FBA_CMD8 CA9_A
D1 V1 B2 V3 J5
D12 VSS_11 VDD_11 V14 FBA_D6 E2 DQ3_A FBA_D26 U4 DQ1_B FBA_CMD7 G10 CABI_n_A
D14 VSS_12 VDD_12 FBA_D1 A3 DQ5_A FBA_D27 U2 DQ0_B CKE_n_A
D3 VSS_13 DQ1_A DQ3_B N5
E11 VSS_14 FBA_EDC0 C2 FBA_EDC3 T2 TCK
VSS_15 FBVDDQ 27 FBA_EDC0 FBA_DBI0# EDC0_A 27 FBA_EDC3 FBA_DBI3# EDC0_B
E4 D2 R2 F10
F1 VSS_16 27 FBA_DBI0# DBI0_n_A 27 FBA_DBI3# DBI0_n_B TDI N10
F12 VSS_17 FBA_WCK01 D4 FBA_WCKB23 R4 TDO
VSS_18 27 FBA_WCK01 FBA_WCK01_N WCK_t_A 27 FBA_WCKB23 FBA_WCKB23_N NC3
F14 B10 D5 R5 F5
F3 VSS_19 VDDQ_1 B5 27 FBA_WCK01_N WCK_c_A 27 FBA_WCKB23_N NC4 FBA_CMD10 L3 TMS
G1 VSS_20 VDDQ_2 C1 FBA_D19 P13 FBA_CMD1 M11 CA0_B
G12 VSS_21 VDDQ_3 C11 FBA_D17 U13 DQ13_B FBA_CMD32 M4 CA1_B
x16 x8
G14 VSS_22 VDDQ_4 C14 FBA_D10 B11 FBA_D20 M13 DQ11_B FBA_CMD14 L12 CA2_B
VSS_23 VDDQ_5 FBA_D11 DQ8_A
NC BYTE2 FBA_D21 DQ15_B FBA_CMD11 CA3_B
G3 C4 G13 NC N13 L5
H11 VSS_24 VDDQ_6 E1 FBA_D15 E13 DQ15_A FBA_D16 U12 DQ14_B FBA_CMD12 L10 CA4_B
NC
H4 VSS_25 VDDQ_7 E14 FBA_D12 F13 DQ13_A FBA_D23 P12 DQ10_B FBA_CMD3 K12 CA5_B
VSS_26 VDDQ_8 BYTE1 FBA_D13 DQ14_A
NC
FBA_D18 DQ12_B FBA_CMD4 CA6_B
L11 F11 E12 NC V12 K11
L4 VSS_27 VDDQ_9 F4 FBA_D8 B12 DQ12_A FBA_D22 U11 DQ9_B FBA_CMD6 K4 CA7_B
NC
M1 VSS_28 VDDQ_10 H1 FBA_D9 B13 DQ10_A DQ8_B FBA_CMD5 K3 CA8_B
NC
M12 VSS_29 VDDQ_11 H14 FBA_D14 A12 DQ11_A FBA_EDC2 T13 FBA_CMD8 K5 CA9_B J14FBA_ZQ_1_A RV1290 1 OPT@ 2 121_0402_1%
NC
VSS_30 VDDQ_12 DQ9_A 27 FBA_EDC2 FBA_DBI2# EDC1_B FBA_CMD7 CABI_n_B ZQ_A
M14 J13 R13 M10
M3 VSS_31 VDDQ_13 J2 FBA_EDC1 C13 27 FBA_DBI2# DBI1_n_B CKE_n_B K14FBA_ZQ_1_B RV1122 1 OPT@ 2 121_0402_1%
GND
VSS_32 VDDQ_14 27 FBA_EDC1 FBA_DBI1# EDC1_A FBA_WCK23 ZQ_B
N1 K13 D13 R11
VSS_33 VDDQ_15 27 FBA_DBI1# DBI1_n_A NC 27 FBA_WCK23 FBA_WCK23_N WCK_t_B
N12 K2 R10
N14 VSS_34 VDDQ_16 L1 FBA_WCKB01 D11 27 FBA_WCK23_N WCK_c_B
NC
VSS_35 VDDQ_17 27 FBA_WCKB01 FBA_WCKB01_N D10 NC1
N3 L14 NC
P11 VSS_36 VDDQ_18 N11 27 FBA_WCKB01_N NC2 FBA_CMD2 J1
RESET_n
om
P4 VSS_37 VDDQ_19 N4 MT61K256M32JE-14-A_FBGA180
R1 VSS_38 VDDQ_20 P1 MT61K256M32JE-14-A_FBGA180
VSS_39 VDDQ_21 @
R12 P14 @
R14 VSS_40 VDDQ_22 T1 FBA_CLK0# K10
VSS_41 VDDQ_23 27 FBA_CLK0# CK_c
R3 T11 FBA_CLK0 J10
VSS_42 VDDQ_24 27 FBA_CLK0 CK_t
T10 T14 G5
T12 VSS_43 VDDQ_25 T4 NC5
.c
T3 VSS_44 VDDQ_26 U10 M5
T5 VSS_45 VDDQ_27 U5 NC6
C C
U1 VSS_46 VDDQ_28
U14 VSS_47
ck
V11 VSS_48
V13 VSS_49
V2 VSS_50 +1.8VS_AON +1.8VS_AON
V4 VSS_51
VSS_52 CLOSE TO DRAM
MT61K256M32JE-14-A_FBGA180
lo
A10
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
VPP_1 A5 @
4.7U_0603_6.3V6K
VPP_2 V10
VPP_3 1 1 1 1 1 1 1 1
V5
un
VPP_4
@
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
CV589
CV592
CV588
CV590
CV591
CV1523
CV1525
CV1524
2 2 2 2 2 2 2 2
@
st
FBVDDQ
fa
1
RV97
s-
549_0402_1%
@
2
FBVDDQ FBVDDQ 1 @ 2 +FBA_VREFC
m
RV1291 +FBA_VREFC 32
AROUND DRAM CLOSE TO DRAM CLOSE TO DRAM 16 mil
1
931_0402_1% 1
RV99 CV1521
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1K_0402_1% 820P_0402_25V7
ru
1
2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 OPT@ @
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
1
2
CD@
@
@
@
@
@
@
2 QV48
CV577
CV580
CV581
CV585
CV583
CV587
CV576
CV578
CV579
CV586
CV582
CV584
28 MEM_VREF
2
2
2
B 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 B
@
.fo
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
LSI1012XT1G_SC-89-3
CV234
CV235
CV236
CV563
CV237
CV238
@
CV490
CV491
CV178
CV221
CV220
CV228
3
Vgs(th)≤0.9V VR FC IS N T US D IN
1 C NFIGURATI N
w
FBVDDQ FBVDDQ
1K HM PULL-D WN IS
CLOSE TO DRAM CLOSE TO DRAM IN PLAC F TH 1 33K
F R RV99
w
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
w
@
@
@
@
@
@
@
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CD@
CV570
CV567
CV575
CV494
CV239
CV243
CV244
CV572
CV564
CV565
CV566
CV571
CV573
CV568
CV574
CV492
CV493
CV241
CV569
CV240
CV242
CV245
CV247
CV246
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_GDDR6_A_[31_0]

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
UV5D
?
? UV5C
COMMON ?
?
FBVDDQ COMMON
UV5A
27,31 FBA_CMD[0..33]
UV5B
A11 A1 NORMAL FBA_CMD29 H3 K1 +FBA_VREFC
A13 VSS_1 VDD_1 A14 27 FBA_D[32..47] FBA_CMD31 G11 CA0_A VREFC +FBA_VREFC 31
NORMAL
A2 VSS_2 VDD_2 E10 FBA_D40 G2 FBA_CMD16 G4 CA1_A
VSS_3 VDD_3 DQ7_A 27 FBA_D[48..63] CA2_A 1
A4 E5 FBA_D44 B3 x16 x8 FBA_CMD25 H12 CV172
B1 VSS_4 VDD_4 H13 FBA_D41 F2 DQ2_A FBA_D52 N2 FBA_CMD22 H5 CA3_A 820P_0402_25V7
B14 VSS_5 VDD_5 H2 FBA_D46 E3 DQ6_A FBA_D53 P3 DQ6_B FBA_CMD21 H10 CA4_A @
VSS_6 VDD_6 BYTE5 FBA_D42 DQ4_A FBA_D54 DQ4_B FBA_CMD24 CA5_A 2
C10 L13 B4 M2 J12
C12 VSS_7 VDD_7 L2 FBA_D47 B2 DQ0_A FBA_D55 P2 DQ7_B FBA_CMD23 J11 CA6_A
D VSS_8 VDD_8 FBA_D43 DQ3_A BYTE6 FBA_D49 DQ5_B FBA_CMD26 CA7_A D
C3 P10 E2 U3 J4
C5 VSS_9 VDD_9 P5 FBA_D45 A3 DQ5_A FBA_D51 V3 DQ2_B FBA_CMD17 J3 CA8_A
D1 VSS_10 VDD_10 V1 DQ1_A FBA_D50 U4 DQ1_B FBA_CMD30 J5 CA9_A
D12 VSS_11 VDD_11 V14 FBA_EDC5 C2 FBA_D48 U2 DQ0_B FBA_CMD33 G10 CABI_n_A
VSS_12 VDD_12 27 FBA_EDC5 FBA_DBI5# EDC0_A DQ3_B CKE_n_A
D14 D2
VSS_13 27 FBA_DBI5# DBI0_n_A FBA_EDC6
D3 T2 N5
E11 VSS_14 FBA_WCKB45 D4 27 FBA_EDC6 FBA_DBI6# R2 EDC0_B TCK
VSS_15 FBVDDQ 27 FBA_WCKB45 FBA_WCKB45_N WCK_t_A 27 FBA_DBI6# DBI0_n_B
E4 D5 F10
F1 VSS_16 27 FBA_WCKB45_N WCK_c_A FBA_WCK67 R4 TDI N10
VSS_17 27 FBA_WCK67 FBA_WCK67_N NC3 TDO
F12 R5
VSS_18 27 FBA_WCK67_N NC4
F14 B10 x16 x8 F5
F3 VSS_19 VDDQ_1 B5 FBA_D34 B11 FBA_D58 P13 FBA_CMD27 L3 TMS
NC
G1 VSS_20 VDDQ_2 C1 FBA_D38 G13 DQ8_A FBA_D60 U13 DQ13_B FBA_CMD28 M11 CA0_B
NC
G12 VSS_21 VDDQ_3 C11 FBA_D36 E13 DQ15_A FBA_D56 M13 DQ11_B FBA_CMD19 M4 CA1_B
VSS_22 VDDQ_4 BYTE4 FBA_D37 DQ13_A
NC
FBA_D57 DQ15_B FBA_CMD20 CA2_B
G14 C14 F13 NC BYTE7 N13 L12
G3 VSS_23 VDDQ_5 C4 FBA_D39 E12 DQ14_A FBA_D61 U12 DQ14_B FBA_CMD22 L5 CA3_B
NC
H11 VSS_24 VDDQ_6 E1 FBA_D32 B12 DQ12_A FBA_D59 P12 DQ10_B FBA_CMD21 L10 CA4_B
NC
H4 VSS_25 VDDQ_7 E14 FBA_D33 B13 DQ10_A FBA_D62 V12 DQ12_B FBA_CMD24 K12 CA5_B
NC
L11 VSS_26 VDDQ_8 F11 FBA_D35 A12 DQ11_A FBA_D63 U11 DQ9_B FBA_CMD23 K11 CA6_B
NC
L4 VSS_27 VDDQ_9 F4 DQ9_A DQ8_B FBA_CMD26 K4 CA7_B
M1 VSS_28 VDDQ_10 H1 FBA_EDC4 C13 FBA_EDC7 T13 FBA_CMD17 K3 CA8_B
GND
M12 VSS_29 VDDQ_11 H14 27 FBA_EDC4 FBA_DBI4# D13 EDC1_A 27 FBA_EDC7 FBA_DBI7# R13 EDC1_B FBA_CMD30 K5 CA9_B J14FBA_ZQ_2_A RV1177 1 OPT@ 2 121_0402_1%
VSS_30 VDDQ_12 27 FBA_DBI4# DBI1_n_A NC 27 FBA_DBI7# DBI1_n_B FBA_CMD33 CABI_n_B ZQ_A
M14 J13 M10
M3 VSS_31 VDDQ_13 J2 FBA_WCK45 D11 FBA_WCKB67 R11 CKE_n_B K14FBA_ZQ_2_B RV1178 1 OPT@ 2 121_0402_1%
NC
VSS_32 VDDQ_14 27 FBA_WCK45 FBA_WCK45_N NC1 27 FBA_WCKB67 FBA_WCKB67_N R10 WCK_t_B ZQ_B
N1 K13 D10 NC
VSS_33 VDDQ_15 27 FBA_WCK45_N NC2 27 FBA_WCKB67_N WCK_c_B
N12 K2
N14 VSS_34 VDDQ_16 L1
N3 VSS_35 VDDQ_17 L14 MT61K256M32JE-14-A_FBGA180
P11 VSS_36 VDDQ_18 N11 MT61K256M32JE-14-A_FBGA180 FBA_CMD18 J1
@ RESET_n
m
P4 VSS_37 VDDQ_19 N4
VSS_38 VDDQ_20 @
R1 P1
R12 VSS_39 VDDQ_21 P14
R14 VSS_40 VDDQ_22 T1 FBA_CLK1# K10
VSS_41 VDDQ_23
follow CRB bit swa 27 FBA_CLK1# CK_c
o
R3 T11 FBA_CLK1 J10
VSS_42 VDDQ_24 27 FBA_CLK1 CK_t
T10 T14 G5
.c
C C
U1 VSS_46 VDDQ_28
U14 VSS_47
ck
V11 VSS_48
V13 VSS_49
V4 VSS_51
VSS_52 CLOSE TO DRAM
lo
A10
@
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
VPP_1 A5
4.7U_0603_6.3V6K
VPP_2 V10
VPP_3 1 1 1 1 1 1 1 1
V5
un
VPP_4
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
CV596
CV598
CV597
CV599
CV600
CV1526
CV1527
CV1528
2 2 2 2 2 2 2 2
@
st
fa
s-
FBVDDQ FBVDDQ
m
AROUND DRAM CLOSE TO DRAM CLOSE TO DRAM
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
ru
2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
1
@
@
@
@
CD@
CV636
CV630
CV631
CV624
CV623
CV625
CV628
CV627
CV626
CV629
CV632
CV635
2
2
2
B 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 B
@
.fo
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV617
CV618
CV621
CV620
CV616
CV619
CV611
CV608
CV633
CV634
CV610
CV609
FBVDDQ FBVDDQ
CLOSE TO DRAM CLOSE TO DRAM
w
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
w
@
@
@
@
@
@
@
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV605
CV613
CV595
CV622
CV602
CV612
CV615
CV637
CV640
CV644
CV601
CV639
CV643
CV603
CV607
CV606
CV604
CV614
CV638
CV642
CV641
CV593
CV645
CV594
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_GDDR6_A_[63_32]

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
UV6D
?
? UV6C
COMMON ?
?
FBVDDQ COMMON
27,34 FBB_CMD[0..33]
A11 A1 UV6B FBB_CMD13 H3 K1 +FBB_VREFC
A13 VSS_1 VDD_1 A14 UV6A FBB_CMD15 G11 CA0_A VREFC
A2 VSS_2 VDD_2 E10 FBB_CMD0 G4 CA1_A
NORMAL
A4 VSS_3 VDD_3 E5 FBB_CMD9 H12 CA2_A
VSS_4 VDD_4 27 FBB_D[0..15] NORMAL 27 FBB_D[16..31] CA3_A
B1 H13 x16 x8 FBB_CMD11 H5
B14 VSS_5 VDD_5 H2 FBB_D7 G2 FBB_D28 N2 FBB_CMD12 H10 CA4_A
C10 VSS_6 VDD_6 L13 FBB_D1 B3 DQ7_A FBB_D30 P3 DQ6_B FBB_CMD3 J12 CA5_A
D
C12 VSS_7 VDD_7 L2 FBB_D5 F2 DQ2_A FBB_D29 M2 DQ4_B FBB_CMD4 J11 CA6_A D
C3 VSS_8 VDD_8 P10 FBB_D6 E3 DQ6_A BYTE3 FBB_D31 P2 DQ7_B FBB_CMD6 J4 CA7_A
VSS_9 VDD_9 BYTE0 FBB_D2 DQ4_A FBB_D24 DQ5_B FBB_CMD5 CA8_A
C5 P5 B4 U3 J3
D1 VSS_10 VDD_10 V1 FBB_D0 B2 DQ0_A FBB_D25 V3 DQ2_B FBB_CMD8 J5 CA9_A
D12 VSS_11 VDD_11 V14 FBB_D4 E2 DQ3_A FBB_D26 U4 DQ1_B FBB_CMD7 G10 CABI_n_A
D14 VSS_12 VDD_12 FBB_D3 A3 DQ5_A FBB_D27 U2 DQ0_B CKE_n_A
D3 VSS_13 DQ1_A DQ3_B N5
E11 VSS_14 FBB_EDC0 C2 FBB_EDC3 T2 TCK
E4 VSS_15 FBVDDQ 27 FBB_EDC0 FBB_DBI0# D2 EDC0_A 27 FBB_EDC3 FBB_DBI3# R2 EDC0_B F10
VSS_16 27 FBB_DBI0# DBI0_n_A 27 FBB_DBI3# DBI0_n_B TDI
F1 N10
F12 VSS_17 FBB_WCK01 D4 FBB_WCKB23 R4 TDO
F14 VSS_18 B10 27 FBB_WCK01 FBB_WCK01_N D5 WCK_t_A 27 FBB_WCKB23 FBB_WCKB23_N R5 NC3 F5
VSS_19 VDDQ_1 27 FBB_WCK01_N WCK_c_A 27 FBB_WCKB23_N NC4 FBB_CMD10 TMS
F3 B5 L3
G1 VSS_20 VDDQ_2 C1 FBB_D20 P13 FBB_CMD1 M11 CA0_B
G12 VSS_21 VDDQ_3 C11 FBB_D17 U13 DQ13_B FBB_CMD32 M4 CA1_B
x16 x8
G14 VSS_22 VDDQ_4 C14 FBB_D10 B11 FBB_D22 M13 DQ11_B FBB_CMD14 L12 CA2_B
G3 VSS_23 VDDQ_5 C4 FBB_D15 G13 DQ8_A
NC BYTE2 FBB_D21 N13 DQ15_B FBB_CMD11 L5 CA3_B
NC
H11 VSS_24 VDDQ_6 E1 FBB_D8 E13 DQ15_A FBB_D19 U12 DQ14_B FBB_CMD12 L10 CA4_B
VSS_25 VDDQ_7 BYTE1 FBB_D13 DQ13_A
NC
FBB_D23 DQ10_B FBB_CMD3 CA5_B
H4 E14 F13 NC P12 K12
L11 VSS_26 VDDQ_8 F11 FBB_D12 E12 DQ14_A FBB_D16 V12 DQ12_B FBB_CMD4 K11 CA6_B
NC
L4 VSS_27 VDDQ_9 F4 FBB_D9 B12 DQ12_A FBB_D18 U11 DQ9_B FBB_CMD6 K4 CA7_B
NC
M1 VSS_28 VDDQ_10 H1 FBB_D14 B13 DQ10_A DQ8_B FBB_CMD5 K3 CA8_B
NC
M12 VSS_29 VDDQ_11 H14 FBB_D11 A12 DQ11_A FBB_EDC2 T13 FBB_CMD8 K5 CA9_B J14FBB_ZQ_1_A RV1179 1 OPT@ 2 121_0402_1%
NC
M14 VSS_30 VDDQ_12 J13 DQ9_A 27 FBB_EDC2 FBB_DBI2# R13 EDC1_B FBB_CMD7 M10 CABI_n_B ZQ_A
VSS_31 VDDQ_13 FBB_EDC1 27 FBB_DBI2# DBI1_n_B CKE_n_B
M3 J2 C13 GND K14FBB_ZQ_1_B RV1180 1 OPT@ 2 121_0402_1%
VSS_32 VDDQ_14 27 FBB_EDC1 FBB_DBI1# EDC1_A FBB_WCK23 ZQ_B
N1 K13 D13 R11
N12 VSS_33 VDDQ_15 K2 27 FBB_DBI1# DBI1_n_A NC 27 FBB_WCK23 FBB_WCK23_N R10 WCK_t_B
VSS_34 VDDQ_16 FBB_WCKB01 27 FBB_WCK23_N WCK_c_B
N14 L1 D11 NC
N3 VSS_35 VDDQ_17 L14 27 FBB_WCKB01 FBB_WCKB01_N D10 NC1
NC
27 FBB_WCKB01_N
om
P11 VSS_36 VDDQ_18 N11 NC2 FBB_CMD2 J1
VSS_37 VDDQ_19 RESET_n
P4 N4 MT61K256M32JE-14-A_FBGA180
R1 VSS_38 VDDQ_20 P1 MT61K256M32JE-14-A_FBGA180
VSS_39 VDDQ_21 @
R12 P14 @
R14 VSS_40 VDDQ_22 T1 FBB_CLK0# K10
VSS_41 VDDQ_23 27 FBB_CLK0# CK_c
R3 T11 FBB_CLK0 J10
VSS_42 VDDQ_24 27 FBB_CLK0 CK_t
T10 T14 G5
.c
C C
U1 VSS_46 VDDQ_28
follow CRB bit swa
ck
U14 VSS_47
V11 VSS_48
V13 VSS_49
V4 VSS_51
CLOSE TO DRAM
lo
VSS_52
A10
@
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
VPP_1 A5
4.7U_0603_6.3V6K
VPP_2 V10 1 1 1 1 1 1 1 1
un
VPP_3 V5
VPP_4
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
CV649
CV650
CV652
CV651
CV653
CV1529
CV1530
CV1531
2 2 2 2 2 2 2 2
@
st
FBVDDQ
fa
1
s-
RV1181
549_0402_1%
@
2
FBVDDQ FBVDDQ 1 2 +FBB_VREFC
RV1182 +FBB_VREFC 34
AROUND DRAM CLOSE TO DRAM CLOSE TO DRAM 16 mil
1
931_0402_1% 1
@ RV1183 CV675
ru
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1K_0402_1% 820P_0402_25V7
1
2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 OPT@ @
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
2
B B
@
@
@
@
@
.fo
2 QV33
CD@
CD@
CV677
CV687
CV685
CV690
CV678
CV679
CV683
CV680
CV682
CV684
CV689
CV681
28 MEM_VREF
2
1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2
@
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
LSI1012XT1G_SC-89-3
CV669
CV672
CV670
CV673
CV671
CV674
@
CV661
CV686
CV664
CV662
CV688
CV663
3
Vgs(th)≤0.9V VR FC IS N T US D IN
1 C NFIGURATI N
w
FBVDDQ FBVDDQ
1K HM PULL-D WN IS
CLOSE TO DRAM CLOSE TO DRAM IN PLAC F TH 1 33K
w
F R RV1183
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
w
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
@
@
@
@
@
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV676
CV656
CV660
CV668
CV666
CV648
CV691
CV697
CV696
CV655
CV659
CV665
CV693
CV647
CV698
CV699
CV658
CV654
CV657
CV692
CV694
CV695
CV646
CV1520
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_GDDR6_B_[31_0]

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
UV7D
?
? UV7C
COMMON ?
?
FBVDDQ COMMON
UV7A
27,33 FBB_CMD[0..33]
UV7B
A11 A1 NORMAL FBB_CMD29 H3 K1 +FBB_VREFC
VSS_1 VDD_1 27 FBB_D[32..47] FBB_CMD31 CA0_A VREFC +FBB_VREFC 33
A13 A14 NORMAL G11
A2 VSS_2 VDD_2 E10 FBB_D43 G2 FBB_CMD16 G4 CA1_A
VSS_3 VDD_3 DQ7_A 27 FBB_D[48..63] CA2_A 1
A4 E5 FBB_D41 B3 x16 x8 FBB_CMD25 H12 CV743
B1 VSS_4 VDD_4 H13 FBB_D46 F2 DQ2_A FBB_D50 N2 FBB_CMD22 H5 CA3_A 820P_0402_25V7
B14 VSS_5 VDD_5 H2 FBB_D45 E3 DQ6_A FBB_D55 P3 DQ6_B FBB_CMD21 H10 CA4_A @
VSS_6 VDD_6 BYTE5 FBB_D42 DQ4_A FBB_D54 DQ4_B FBB_CMD24 CA5_A 2
C10 L13 B4 M2 J12
D
C12 VSS_7 VDD_7 L2 FBB_D47 B2 DQ0_A FBB_D53 P2 DQ7_B FBB_CMD23 J11 CA6_A D
C3 VSS_8 VDD_8 P10 FBB_D44 E2 DQ3_A BYTE6 FBB_D51 U3 DQ5_B FBB_CMD26 J4 CA7_A
C5 VSS_9 VDD_9 P5 FBB_D40 A3 DQ5_A FBB_D49 V3 DQ2_B FBB_CMD17 J3 CA8_A
D1 VSS_10 VDD_10 V1 DQ1_A FBB_D52 U4 DQ1_B FBB_CMD30 J5 CA9_A
D12 VSS_11 VDD_11 V14 FBB_EDC5 C2 FBB_D48 U2 DQ0_B FBB_CMD33 G10 CABI_n_A
VSS_12 VDD_12 27 FBB_EDC5 FBB_DBI5# EDC0_A DQ3_B CKE_n_A
D14 D2
D3 VSS_13 27 FBB_DBI5# DBI0_n_A FBB_EDC6 T2 N5
VSS_14 FBB_WCKB45 27 FBB_EDC6 FBB_DBI6# EDC0_B TCK
E11 D4 R2
E4 VSS_15 FBVDDQ 27 FBB_WCKB45 FBB_WCKB45_N D5 WCK_t_A 27 FBB_DBI6# DBI0_n_B F10
VSS_16 27 FBB_WCKB45_N WCK_c_A FBB_WCK67 TDI
F1 R4 N10
VSS_17 27 FBB_WCK67 FBB_WCK67_N NC3 TDO
F12 R5
F14 VSS_18 B10 27 FBB_WCK67_N NC4 F5
x16 x8
F3 VSS_19 VDDQ_1 B5 FBB_D34 B11 FBB_D60 P13 FBB_CMD27 L3 TMS
NC
G1 VSS_20 VDDQ_2 C1 FBB_D38 G13 DQ8_A FBB_D57 U13 DQ13_B FBB_CMD28 M11 CA0_B
NC
G12 VSS_21 VDDQ_3 C11 FBB_D35 E13 DQ15_A FBB_D61 M13 DQ11_B FBB_CMD19 M4 CA1_B
NC
G14 VSS_22 VDDQ_4 C14 FBB_D33 F13 DQ13_A FBB_D58 N13 DQ15_B FBB_CMD20 L12 CA2_B
G3 VSS_23 VDDQ_5 C4
BYTE4 FBB_D37 E12 DQ14_A
NC BYTE7 FBB_D56 U12 DQ14_B FBB_CMD22 L5 CA3_B
NC
H11 VSS_24 VDDQ_6 E1 FBB_D32 B12 DQ12_A FBB_D63 P12 DQ10_B FBB_CMD21 L10 CA4_B
NC
H4 VSS_25 VDDQ_7 E14 FBB_D39 B13 DQ10_A FBB_D59 V12 DQ12_B FBB_CMD24 K12 CA5_B
NC
L11 VSS_26 VDDQ_8 F11 FBB_D36 A12 DQ11_A FBB_D62 U11 DQ9_B FBB_CMD23 K11 CA6_B
NC
L4 VSS_27 VDDQ_9 F4 DQ9_A DQ8_B FBB_CMD26 K4 CA7_B
M1 VSS_28 VDDQ_10 H1 FBB_EDC4 C13 FBB_EDC7 T13 FBB_CMD17 K3 CA8_B
GND
VSS_29 VDDQ_11 27 FBB_EDC4 FBB_DBI4# EDC1_A 27 FBB_EDC7 FBB_DBI7# EDC1_B FBB_CMD30 CA9_B
M12 H14 D13 R13 K5 J14FBB_ZQ_2_A RV1184 1 OPT@ 2 121_0402_1%
M14 VSS_30 VDDQ_12 J13 27 FBB_DBI4# DBI1_n_A NC 27 FBB_DBI7# DBI1_n_B FBB_CMD33 M10 CABI_n_B ZQ_A
M3 VSS_31 VDDQ_13 J2 FBB_WCK45 D11 FBB_WCKB67 R11 CKE_n_B K14FBB_ZQ_2_B RV1185 1 OPT@ 2 121_0402_1%
NC
VSS_32 VDDQ_14 27 FBB_WCK45 FBB_WCK45_N NC1 27 FBB_WCKB67 FBB_WCKB67_N R10 WCK_t_B ZQ_B
N1 K13 D10 NC
N12 VSS_33 VDDQ_15 K2 27 FBB_WCK45_N NC2 27 FBB_WCKB67_N WCK_c_B
N14 VSS_34 VDDQ_16 L1
N3 VSS_35 VDDQ_17 L14 MT61K256M32JE-14-A_FBGA180
m
P11 VSS_36 VDDQ_18 N11 MT61K256M32JE-14-A_FBGA180 FBB_CMD18 J1
VSS_37 VDDQ_19 @ RESET_n
P4 N4 @
VSS_40 VDDQ_22
o
R14 T1 FBB_CLK1# K10
R3
T10
VSS_41
VSS_42
VDDQ_23
VDDQ_24
T11
T14 follow CRB bit swa 27
27
FBB_CLK1#
FBB_CLK1
FBB_CLK1 J10
CK_c
CK_t G5
.c
C C
U1 VSS_46 VDDQ_28
ck
U14 VSS_47
V11 VSS_48
V13 VSS_49
V4 VSS_51
CLOSE TO DRAM
lo
VSS_52
A10
@
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
VPP_1 A5
4.7U_0603_6.3V6K
VPP_2 V10 1 1 1 1 1 1 1 1
un
VPP_3 V5
VPP_4
@
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
CV750
CV751
CV747
CV749
CV748
CV1533
CV1532
CV1534
2 2 2 2 2 2 2 2
@
st
fa
s-
m
FBVDDQ FBVDDQ
AROUND DRAM CLOSE TO DRAM CLOSE TO DRAM
ru
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
1
B B
@
@
@
@
.fo CD@
CV733
CV722
CV725
CV724
CV730
CV732
CV720
CV721
CV723
CV726
CV727
CV728
2
2
1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV713
CV714
CV717
CV715
CV716
CV718
CV708
CV705
CV707
CV706
CV729
CV731
FBVDDQ FBVDDQ
CLOSE TO DRAM CLOSE TO DRAM
w
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
1U_6.3V_K_X5R_0201
w
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
@
@
@
@
@
@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV752
CV700
CV704
CD@
CV736
CV740
CV744
CV742
CV702
CV709
CV712
CV734
CV738
CV719
CV753
CV701
CV703
CV711
CV710
CV746
CV735
CV739
CV737
CV741
CV745
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 N18P_GDDR6_B_[63_32]

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
D D
o m
.c
ck
lo
un
C C
st
fa
s-
m
ru
.fo
w
w
w
B B
A A

B
Y550 1.0

5 4 3 2 1
5 4 3 2 1
D D
o m
.c
ck
lo
un
C C
st
fa
s-
m
ru
.fo
w
w
w
B B
A A

B
Y550 1.0

5 4 3 2 1
5 4 3 2 1
D D
o m
.c
ck
lo
un
C C
st
fa
s-
m
ru
.fo
w
w
w
B B
A A

B
Y550 1.0

5 4 3 2 1
5 4 3 2 1
D D
o m
.c
ck
lo
un
C C
st
fa
s-
m
ru
.fo
w
w
w
B B
A A

B
Y550 1.0

5 4 3 2 1
5 4 3 2 1
SA0000 0U00 S IC PS8331BQFN 0GTR-A QFN 0P DP SWITCH symbol & foot rint a ly
UR2
VDD33 +3VS
CPU_EDP_TX0+ CR9 1 2 0.1u_0201_10V6K IN1D0P IN1D1N 5 50 MUX_PD @

8 CPU_EDP_TX0+ IN1_D1n PD
VDD33 21 49 RR46 1 2 0_0603_5%
CPU_EDP_TX0- CR10 1 2 0.1u_0201_10V6K IN1D0N IN2AUX 30 VDD33_1 VDD33_4 47
8 CPU_EDP_TX0- IN2_PEQ 51 IN2_AUXp CEXT 46 MUX_EDP_TX0+
CPU_EDP_TX1+ CR15 1 2 0.1u_0201_10V6K IN1D1P 57 IN2_PEQ/SCL_CTL OUT_D0p 45 MUX_EDP_TX0-
8 CPU_EDP_TX1+ GND_5 OUT_D0n 1
44 EDP_HPD
CPU_EDP_TX1- CR12 1 2 0.1u_0201_10V6K IN1D1N @ OUT_HPD 42 MUX_EDP_TX1- CR33
D 8 CPU_EDP_TX1- PCH_EDP_HPD IN1_HPD OUT_D1n 2.2U_0402_6.3V6M D
RR23 1 2 0_0201_5% 3 41
CPU_EDP_TX2+ 1 2 0.1u_0201_10V6K 15 PCH_EDP_HPD 4 IN1_HPD GND_4 2
CR18 IN1D2P IN1D1P
8 CPU_EDP_TX2+ IN1_D1p
CPU_EDP_TX2- CR19 1 2 0.1u_0201_10V6K IN1D2N IN1D2P 6 40 MUX_EDP_TX2+
8 CPU_EDP_TX2- IN1_D2p OUT_D2p MUX_EDP_TX2-
IN1D2N 7 39
CPU_EDP_TX3+ CR16 1 2 0.1u_0201_10V6K IN1D3P IN1D3P 9 IN1_D2n OUT_D2n 37 MUX_EDP_TX3+ VDD33
8 CPU_EDP_TX3+ 10 IN1_D3p OUT_D3p 36 MUX_EDP_TX3-
IN1D3N
CPU_EDP_TX3- CR17 1 2 0.1u_0201_10V6K IN1D3N IN2D0N 12 IN1_D3n OUT_D3n 35 VDD33
8 CPU_EDP_TX3- IN2_HPD 13 IN2_D0n VDD33_3 34 MUX_REXT RR27 1 21/20W_4.99K_+-1%_0201
IN2D1N 15 IN2_HPD REXT 32 MUX_EDP_AUX
IN2_D1n OUT_AUXp_SCL 2
CPU_EDP_AUX CR11 1 2 0.1u_0201_10V6K IN1AUX IN2D2P 16 31 MUX_EDP_AUX#
8 CPU_EDP_AUX IN2_D2p OUT_AUXn_SDA CR32
CPU_EDP_AUX# CR13 1 2 0.1u_0201_10V6K IN1AUX# 27 IN1AUX# 0.1u_0201_10V6K
8 CPU_EDP_AUX# 24 IN1_AUXn 26 1
VDD33
25 IN2_SDA VDD33_2 29 IN2AUX#
IN2_SCL IN2_AUXn 28 IN1AUX
22 IN1_AUXp
23 IN1_SDA
IN1_SCL 48 CA_DET RR43 1 2 1M_0402_5%
CA_DET 38 PC0
GPU_EDP_TX0+ CR20 1 2 0.1u_0201_10V6K IN2D0P IN1D0N 2 PC0
26 GPU_EDP_TX0+ VDD33 IN1_D0n 43 MUX_EDP_TX1+
GPU_EDP_TX0- CR21 1 2 0.1u_0201_10V6K IN2D0N IN1D0P 1 OUT_D1p 33
26 GPU_EDP_TX0- 60 IN1_D0p GND_3
VDD33
GPU_EDP_TX1+ CR22 1 2 0.1u_0201_10V6K IN2D1P VDD33_5
26 GPU_EDP_TX1+ MUX_EDP_TX0+
56 PI0
CR30
CR35
CR31
CR34
0.1u_0201_10V6K
0.01U_0201_10V6K
0.01U_0201_10V6K
GPU_EDP_TX1- 1 2 0.1u_0201_10V6K 17 PI0 55 MUX_EDP_TX0+ 41
CR23 IN2D1N IN2D2N PC1
0.1u_0201_10V6K
26 GPU_EDP_TX1- IN2_D2n PC1 EDP_MUX_SW MUX_EDP_TX0-
2 1 1 2 IN2D3N 20 54
GPU_EDP_TX2+ 1 2 0.1u_0201_10V6K IN2_D3n SW 53 I2C_CTL_EN MUX_EDP_TX0- 41
CR24 IN2D2P
26 GPU_EDP_TX2+
om
IN1_AEQ# 59 I2C_CTL_EN 8 MUX_EDP_TX1+
GPU_EDP_TX2- IN2_AEQ# IN1_AEQ# GND_1 MUX_EDP_TX1+ 41
CR25 1 2 0.1u_0201_10V6K IN2D2N 58
26 GPU_EDP_TX2- 1 2 2 1 IN2_AEQ# 11 MUX_EDP_TX1-
IN2D0P
GPU_EDP_TX3+ IN2_D0p MUX_EDP_TX1- 41
CR26 1 2 0.1u_0201_10V6K IN2D3P 19 IN2D3P
26 GPU_EDP_TX3+ 14 IN2_D3p 52 IN1_PEQ MUX_EDP_TX2+
IN2D1P
GPU_EDP_TX3- Place near to PIN 0 1 9 IN2_D1p IN1_PEQ/SDA_CTL MUX_EDP_TX2+ 41
CR27 1 2 0.1u_0201_10V6K IN2D3N 18 61
26 GPU_EDP_TX3- GND_2 GND_6 MUX_EDP_TX2-
MUX_EDP_TX2- 41
.c
C MUX_EDP_TX3+ C
GPU_EDP_AUX 1 2 0.1u_0201_10V6K MUX_EDP_TX3+ 41
CR29 IN2AUX PS8331BQFN60GTR-A1_QFN60_5X9
26 GPU_EDP_AUX MUX_EDP_TX3-
ck
GPU_EDP_AUX# MUX_EDP_TX3- 41
CR28 1 2 0.1u_0201_10V6K IN2AUX#
26 GPU_EDP_AUX# MUX_EDP_AUX#
MUX_EDP_AUX# 41
MUX_EDP_AUX
MUX_EDP_AUX 41
lo
MUX_EDP_AUX# RR45 1 2 100K_0201_5%
VDD33
+1.8VS_AON MUX_EDP_AUX RR47 1 2 100K_0201_5%
un
IN1_AEQ# RR37 1 @ 21/20W_4.7K_5%_0201 VDD33
1
need fine tune RR59/RR 0/RR 1 IN2_AEQ# RR36 1 @ 21/20W_4.7K_5%_0201
+5VS VDD33
RR42
B M structure 10K_0201_5% IN2AUX# RR51 1 @ 2 100K_0201_5%
VDD33
08/08
st
1 IN2AUX RR52 1 @ 2 100K_0201_5%
2
MUX@
CR36
GPU_EDP_HPD
fa
1U_0402_10V6K
2 28 GPU_EDP_HPD VDD33
UR3
16 QR5822
Vcc 4 RR59 1 MUX@ 2 0_0402_5% MMBT3904WH_SOT323-3
s-
MUX_EDP_ENBKL 40,52
1
2 1A 7 RR60 1 MUX@ 2 0_0402_5% C
14,40 PCH_EDP_ENBKL GPU_EDP_ENBKL_B 1B1 2A MUX_EDP_ENVDD 40,41 IN2_HPD
3 9 RR61 1 MUX@ 2 0_0402_5% 2 RR48 1 2 100K_0201_5% RR49 1 2 0_0201_5% RR21
1B2 3A MUX_INVT_PWM 40,41 10K_0201_5%
5 12 B
14,40 PCH_EDP_ENVDD GPU_EDP_ENVDD_B 6 2B1 4A
m
1
3
2B2
2
11 15 1 1
2
14,40 PCH_EDP_PWM GPU_EDP_PWM_B 10 3B1 OE 1 EDP_MUX_SW MUX_PD
CR39 RR50 CR38
14 3B2 S 470P_25V_K_X7R_0201 CR37
4B1 100K_0201_5%
13 8 L: B1 2 EMC_NS@ 220P_25V_K_X7R_0201 220P_25V_K_X7R_0201
ru
1
4B2 GND 17 H:B 2 2 @
1
T-PAD RR22
1
CBT3257ABQ_DHVQFN16_2P5X3P5 1/20W_499_+-1%_0201 D QR5821
2 EDP_HPD
B MUX@ EDP_HPD 41 B
.fo
G
2
1 S
3
L2N7002KWT1G_SOT323-3
CR8
1U_6.3V_M_X5R_0201
w
2
+3VS
+3VS
UR4
w
1 5 for DDS
OE Vcc 08/0
GPU_EDP_PWM 2
28 GPU_EDP_PWM
2
IN_A
w
3 4 GPU_EDP_PWM_B RR25
GND OUT_Y GPU_EDP_PWM_B 40
4.7K_0402_5%
+3VALW
M74VHC1GT125DF2G_SC70-5 MUX@
1
EDP_MUX_SW
EDP_MUX_SW 40
1
MUX@
RR26
+3VS 10K_0201_5% VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
UR5
1/20W_4.7K_5%_0201
1/20W_4.7K_5%_0201
1/20W_4.7K_5%_0201
for DDS
1/20W_4.7K_5%_0201
1/20W_4.7K_5%_0201
1/20W_4.7K_5%_0201
3
1 5 08/0 MUX@
RR40
RR28
RR32
RR34
RR38
RR30
2
OE Vcc
1
QR28B
D2
1
1
GPU_EDP_ENBKL 2 5 PJT7838_SOT363-6
28 GPU_EDP_ENBKL IN_A G2 @ @ @
3 4 GPU_EDP_ENBKL_B @ @ @
S2
GND OUT_Y GPU_EDP_ENBKL_B 40
2
2
2
4
2
6
M74VHC1GT125DF2G_SC70-5 MUX@ PI0 I2C_CTL_EN PC0 PC1 IN2_PEQ IN1_PEQ

QR28A
RR31
RR33
D1
1/20W_4.7K_5%_0201
EDP_SW 2
RR41
RR35
RR29
20,40 EDP_SW G1 PJT7838_SOT363-6
1/20W_4.7K_5%_0201
1/20W_4.7K_5%_0201
1/20W_4.7K_5%_0201
1/20W_4.7K_5%_0201
2
1
1
1
1
1
0_0201_5%
+3VS
RR39
S1
for DDS @ @ @ @ @ @
UR6 08/0
A A
1
1 5 Vgs(th)≤1.0V
2
2
2
2
2
OE Vcc
GPU_EDP_ENVDD 2
28 GPU_EDP_ENVDD IN_A
3 4 GPU_EDP_ENVDD_B
GND OUT_Y GPU_EDP_ENVDD_B 40
@
RR24 1 2 0_0201_5%
M74VHC1GT125DF2G_SC70-5
Issued Date 2018/08/02 Deciphered Date 2018/08/02 EDP MUX

DP_SW :Port switching control configuration Internal ull down
at ~150KΩ 3 3V I/ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
L: In ut Port1 is selected default
H: In ut Port is selected
C
Y550 1.0

5 4 3 2 1
A B C D E
need fine tune RG107 RG108 RG88 B M structure

08/08
DP PWM L GIC C NTR L
+3VS
+3VS
1 DDS@
new add +3VS CG2
08/1
UG10 1 DDS@ 1U_0402_10V6K
UG11 CG1
1 5 1 4 PWM_SEL 1U_0402_10V6K UG2 2
OE Vcc 20,39,40 EDP_SW PWM_SW_SELECT_B 2 IN B OUT Y EC_EDP_PWM 1 5
PWM_SW_SELECT IN A 2 52 EC_EDP_PWM EDP_PWM_M Y1 Vcc
2 @ UG1 3 @
28 PWM_SW_SELECT IN_A 3 5 1 2 0_0402_5% 1 5 Y0 4 1 2 0_0402_5%
RG109 +3VS 39 GPU_EDP_PWM_B RG107
3 4 PWM_SW_SELECT_B GND Vcc 3 Y1 Vcc Z MUX_INVT_PWM 39,41
GND OUT_Y 14,39 PCH_EDP_PWM Y0 EDP_PWM_M
4 2 6
Z GND S PWM_OUT_EN 20,52
M74VHC1GT125DF2G_SC70-5 Discrete mode: DP_SW 1 2 6 PWM_SEL
DDS@ GND S
MSHybrid mode: DP_SW 0 CG103 74LVC1G3157GW_SOT363-6
DDS@ 08/1 .1U_0402_10V6-K
VCC: 3V VIH: V
2 DDS@ default high
1 DDS@ 74LVC1G3157GW_SOT363-6 1
DDS@ 08/0
S z
H Y1 DGPU
L Y0 iGPU
om
+3VS
Co-lay DP NVDD L GIC C NTR L

+3VS
.c
new add 1@
08/1 CG105 new add +3VS
UG12 1U_0402_10V6K 08/08
1 5 UG14
OE Vcc GPU_EDP_ENVDD_B 1 5 2
GPU_MUX_CNTL 2 PCH_EDP_ENVDD 3 Y1 Vcc
ck
28 GPU_MUX_CNTL IN_A Y0 EDP_ENVDD
4
1
3 4 GPU_MUX_CNTL_B Z
GND OUT_Y 2 6 EDP_MUX_SW RG100
GND S 1
0_0402_5%
M74VHC1GT125DF2G_SC70-5 CG106
74LVC1G3157GW_SOT363-6 .1U_0402_10V6-K +3VS @
DDS@
2
2
lo
@ @
+3VS
1
2
un
CG100
RG101 .1U_0402_10V6-K
2
10K_0402_5% 2 DDS@
DP NVDD L GIC C NTR L DDS@ RG102
10K_0402_5%
1
VIH: 1V Vil: 0 9V DDS@
5
Voh: 9V Vol: 0 1V Io 50uA UG5
1
2 UG13 EDP_ENVDD 1 @ @ 2
P
st
1 4 EDP_MUX_SW UG3 B 4 RG103 1 2 0_0402_5% RG1081 2 0_0402_5%
20,39,40 EDP_SW GPU_MUX_CNTL_B IN B OUT Y EDP_MUX_SW 39 PCH_EDP_ENVDD EDP_ENVDD Y MUX_EDP_ENVDD 39,41
2 1 4 2
14,39 PCH_EDP_ENVDD 20,52 EC_EDP_ENVDD
G
IN A @ GPU_EDP_ENVDD_B 2 IN B OUT Y A
3 5 1 2 0_0402_5% 39 GPU_EDP_ENVDD_B IN A
RG110 +3VS @ MC74VHC1G09DFT2G_SC70-5
3
GND Vcc 3 5 RG86 1 2 0_0402_5% DDS@
+3VS
1
GND Vcc
fa
DDS@ MC74VHC1G32DFT2G_SC70-5 1 RG104
CG104 DDS@ 100K_0402_5%
.1U_0402_10V6-K CG3 @
2
2 DDS@ .1U_0402_10V6-K
s-
2 DDS@
m
ru
.fo
w level shift for I C
w
w
+1.8VS_AON +1.8VS_AON +LCD_VDD
3 3
DP backlight L GIC C NTR L

VIH: 1V Vil: 0 9V
Voh: 9V Vol: 0 1V Io 50uA
UG4 @
2
PCH_EDP_ENBKL 1 4 EDP_ENBKL RG88 1 2 0_0402_5%
14,39 PCH_EDP_ENBKL 2 IN B OUT Y MUX_EDP_ENBKL 39,52
RG93 RG92
39 GPU_EDP_ENBKL_B IN A @ 2.2K_0402_5% 2.2K_0402_5%
2
3 5 RG87 1 2 0_0402_5%
+3VS @ @
GND Vcc
G2
G1
1
1
MC74VHC1G32DFT2G_SC70-5 1 I2CB_SCL 4 3 I2CB_SCLA_L 6 1
28 I2CB_SCL S2 D2 D1 S1 GPU_I2CB_SCL 41
DDS@
CG4
.1U_0402_10V6-K QG37B
2 DDS@ PJT7838_SOT363-6 QG38A
DDS@ PJT7838_SOT363-6
DDS@
5
G1
G2
+1.8VS_AON
I2CB_SDA 1 6 I2CB_SDA_L 3 4
28 I2CB_SDA S1 D1 D2 S2 GPU_I2CB_SDA 41
+1.8VS_AON +3VS Vgs(th)≤1.0V
QG37A
PJT7838_SOT363-6 QG38B
DDS@ PJT7838_SOT363-6
DDS@
1
2
1
.1U_0402_10V6-K
RG89 RG90 RG114 1 @ 2 0_0402_5%

100K_0402_5% CG5 10K_0402_5%
DDS@ DDS@ @
2
2
1
RG1151 @ 2 0_0402_5%
@
3 1 RG91 1 2 0_0402_5% PCH_EDP_ENBKL
28 iGPU_EDP_ENBKL
QG36
LSI1012XT1G_SC-89-3
DDS@
Vgs(th)≤0.9V
4 4
Issued Date 2018/08/02 Deciphered Date 2018/08/02 DC V TO VS INTERFACE

D 1.0
A B C D E
5 4 3 2 1
LCD POWER CIRCUIT
+LCD_VDD +3VS
UG9
W=60mils W=60mils V20B+ +LED_VDD
RG3 1 2 0_0603_5% 1 5
OUT IN FG3
4.7U_0603_6.3V6K
0.1u_0201_10V6K
2 2A 80 mil 2A 80 mil
GND 1 2
1 1
2 1 3 4
OCB EN
CG7
CG8
RG6 1 1
0_0402_5% 3A_32V_0497003PKRHF CG14 CG15 +5VALW
2 2 SY6288C20AAC_SOT23-5 4.7U_0805_25V6K 0.1U_0402_25V6 +5VALW
@
CD@ EMC@
2 2
1
RG67
D 470_0603_5% RG70 D
EMI Request
470_0603_5%
@
2
MUX_EDP_ENVDD LOGO_LED1_PWM_CONN @
39,40 MUX_EDP_ENVDD
2
YLOGO_LED_PWM_CONN
QG7 1
QG8 1
1
100K_0402_5%
.1U_0402_10V6-K
1 @ D
52 LOGO_LED1_PWM RG68 1 2 0_0402_5% 2 @ D
RG1
CG22
G 52 YLOGO_LED_PWM RG71 1 2 0_0402_5% 2
S G
2
2 2@ S
2
RG69 3 PJA138K_SOT23-3 PJA138K_SOT23-3
100K_0402_5% RG72 3
100K_0402_5%
modify by david 0 /
1
modify by david 0 /
1
m
need confirm L G ID
o
yong 07/ 3
EDP_HPD MUX_INVT_PWM LOGO_LED1_PWM_CONN YLOGO_LED_PWM_CONN
.c
EMI request
1
1
RG5 RG2
ck
1
100K_0201_5% 100K_0201_5% 1 DG6 1 DG7
EMC@ AZ5725-01F.R7GR_DFN1006P2X2 EMC@ AZ5725-01F.R7GR_DFN1006P2X2
CG101 EMC@ CG102 EMC@
2
0.1U_25V_K_X5R_0402 0.1U_25V_K_X5R_0402
2 2
2
2
2
lo
un
C C
st
EMI request
BKOFF# MUX_INVT_PWM JEDP1
2A 80 mil
fa
1
+LED_VDD 1
2
3 2
1 1 3
4
CG12 CG13 MUX_INVT_PWM 5 4
470P_25V_K_X7R_0201 470P_25V_K_X7R_0201 39,40 MUX_INVT_PWM 6 5
BKOFF#
s-
2 2 52 BKOFF# EDP_HPD 6
EMC_NS@ EMC_NS@ 7
39 EDP_HPD 8 7
+LCD_VDD 1A Inrush 2A 8
9
10 9
11 10
MUX_EDP_AUX# EDP_AUX# 11
m
CG21 1 2 0.1u_0201_10V6K 12
39 MUX_EDP_AUX# MUX_EDP_AUX EDP_AUX 12
select for L G _led PWR CG20 1 2 0.1u_0201_10V6K 13
0 /1 yong 39 MUX_EDP_AUX 14 13
MUX_EDP_TX0+ CG19 1 2 0.1u_0201_10V6K EDP_TX0+ 15 14
+5VALW_LOGO 39 MUX_EDP_TX0+ MUX_EDP_TX0- EDP_TX0- 15
CG16 1 2 0.1u_0201_10V6K 16
39 MUX_EDP_TX0- 16
RG46 1 @ 2 0_0402_5% 17
ru
DMIC_CLK_R_CONN DMIC_DATA_R_CONN +5VS MUX_EDP_TX1+ EDP_TX1+ 17
CG18 1 2 0.1u_0201_10V6K 18
39 MUX_EDP_TX1+ MUX_EDP_TX1- EDP_TX1- 18
CG17 1 2 0.1u_0201_10V6K 19
Logo_led_Power 39 MUX_EDP_TX1- 19
RG47 1 @ 2 0_0402_5% 20
+3VALW MUX_EDP_TX2+ EDP_TX2+ 20
1 1 CG26 1 2 0.1u_0201_10V6K 21
39 MUX_EDP_TX2+ MUX_EDP_TX2- EDP_TX2- 21
CG27 1 2 0.1u_0201_10V6K 22
1 2 0_0603_5% 39 MUX_EDP_TX2- 23 22
CG11 CG28 RG48
.fo
+5VALW MUX_EDP_TX3+ EDP_TX3+ 23
100P_50V_J_NPO_0201 10P_50V_D_NPO_0201 CG25 1 2 0.1u_0201_10V6K 24
2 EMC_NS@ 2 39 MUX_EDP_TX3+ MUX_EDP_TX3- EDP_TX3- 24
EMC_NS@ CG24 1 2 0.1u_0201_10V6K 25
39 MUX_EDP_TX3- 26 25
27 26
+3VS +3VS_DMIC +3VS_CMOS GSYNC# 28 27
29 28
+3VS_DMIC 40 GPU_I2CB_SCL 29
30
40 GPU_I2CB_SDA 30
w
RG81 1 2 0_0603_5% LCD_OD# 31
14 LCD_OD# 31
32
+3VS_DMIC 33 32
RG106 1 2 0_0603_5% RG82 1 2@ 0_0402_5% DMIC_DATA_R_CONN 34 33
58 DMIC_DATA_R DMIC_CLK_R_CONN 34
RG83 1 2@ 0_0402_5% 35
58 DMIC_CLK_R
w CG23
0.047U_0402_16V7K
CD@
2
19 USB20_N6
RG51
RG52
1
1
@
@
2 0_0402_5%
2 0_0402_5%
USB20_N6_R
USB20_P6_R
36
37
38
39
35
36
37
38
1 19 USB20_P6 +3VS_CMOS 39
0.5A 40
w
+3VS_CMOS 40
41
YLOGO_LED_PWM_CONN RG77 1 2@ 0_0402_5% 42 41
LOGO_LED1_PWM_CONN RG78 1 2@ 0_0402_5% 43 42 46
+1.8VS_AON 44 43 GND2 45
B
+5VALW_LOGO 44 GND1 B
CVILUX_CF69442D0R0-05-NH
ME@
2
RG65
10K_0402_5%
+3VALW
1
2
RG66
+LCD_VDD 10K_0402_5%
GPU_FRAME_LOCK# 28 For EMI
GSYNC@
EXC24CH900U_4P
3
USB20_N6 4 3 USB20_N6_R
1
QG47B 4 3
D2
1
5 PJT7838_SOT363-6
RG64 G2 GSYNC@ USB20_P6 1 2 USB20_P6_R
1 2
S2
10K_0402_5%
GSYNC@ LG1
EMC@
2
4
6
QG47A
D1
GSYNC# 2 PJT7838_SOT363-6
G1
S1
GSYNC@
1
Vgs(th)≤1.0V
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 eDP/ CMOS/Touch screen

D 1.0
Date: Friday, February 14, 2020 Sheet 41 of 83
5 4 3 2 1
5 4 3 2 1
+1.8VS_AON
@
RG31 2 1 0_0402_5% HDMI1_TX0-_R
EMC_NS@
1
HDMI1_TX0- 2 0.1u_0201_10V6K HDMI1_TX0-_C
RG60
10K_0402_5%
26 HDMI1_TX0- CG33 1 LG3 1 2
1 2
HDMI D0 HDMI1_TX0+ CG32 1 2 0.1u_0201_10V6K HDMI1_TX0+_C 4 3
26 HDMI1_TX0+ 4 3 u date by bing
018031
2
EXC24CH500U_4P
RG38 2 1 0_0402_5% HDMI1_TX0+_R
D D
IFPC_HPD
28 IFPC_HPD
@
@ QG4
RG32 2 1 0_0402_5% HDMI1_TX1-_R MMBT3904WH_SOT323-3
1
C
EMC_NS@ 2 RG58 1 2 100K_0402_5% RG59 1 2 0_0402_5% HDMI1_HPD_CON
HDMI1_TX1- CG35 1 2 0.1u_0201_10V6K HDMI1_TX1-_C LG5 1 2 B
26 HDMI1_TX1- 1 2
3
HDMI D1 1 1
1
HDMI1_TX1+ CG34 1 2 0.1u_0201_10V6K HDMI1_TX1+_C 4 3 CG29 CG30
26 HDMI1_TX1+ 4 3 RG57 220P_0402_50V7K 220P_0402_50V7K
EXC24CH500U_4P 100K_0402_5% @
RG37 2 1 0_0402_5% HDMI1_TX1+_R 2 2
2
@
om
@
RG33 2 1 0_0402_5% HDMI1_TX2-_R
+3VS
EMC_NS@ V0
HDMI1_TX2- CG37 1 2 0.1u_0201_10V6K HDMI1_TX2-_C LG4 1 2
26 HDMI1_TX2- 1 2
HDMI D2
HDMI1_TX2+ CG36 1 2 0.1u_0201_10V6K HDMI1_TX2+_C 4 3
c
26 HDMI1_TX2+ 4 3
EXC24CH500U_4P
HDMI1_TX2+_R HPD
k.
RG36 2 1 0_0402_5%
1
@ RG61
2
1M_0402_5%
G
@
oc
RG34 2 1 0_0402_5% HDMI1_CLK-_R
3
HDMI_HPD HDMI1_HPD_CON
1
15 HDMI_HPD
EMC_NS@
D
HDMI1_TXC- CG39 1 2 0.1u_0201_10V6K HDMI1_CLK-_C LG2 1 2
26 HDMI1_TXC- 1 2
QG6
nl
1
HDMI1_TXC+ CG38 1 2 0.1u_0201_10V6K HDMI1_CLK+_C 4 3 PJA138K_SOT23-3
HDMI CLK 26 HDMI1_TXC+ 4 3 RG62
C EXC24CH500U_4P 100K_0402_5% C
RG35 2 1 0_0402_5% HDMI1_CLK+_R
2
@
st
V0
fa
HDMI1_TX0+_C RG15 1 2 499_0402_1% HDMI1_TX0+_B RG23 1 2 0_0402_5%
HDMI1_TX0-_C 1 2 499_0402_1% HDMI1_TX0-_B 1 2 0_0402_5%
s-
RG16 RG24
HDMI1_TX1-_C RG18 1 2 499_0402_1% HDMI1_TX1-_B RG26 1 2 0_0402_5%
m
HDMI1_TX2-_C RG20 1 2 499_0402_1% HDMI1_TX2-_B RG63 1 2 0_0402_5%
ru
HDMI1_CLK+_C RG21 1 2 499_0402_1% HDMI1_CLK+_B RG29 1 2 0_0402_5%
HDMI1_CLK-_C RG22 1 2 499_0402_1% HDMI1_CLK-_B RG30 1 2 0_0402_5%
.fo
V1 0
+5VS +5VS_HDMI1_F +5VS_HDMI1

1
D QG1 QG5
+3VS 2 LP2301ALT1G_SOT23-3
G 2N7002KW_SOT323-3 FG2
1 3 1 2
w
S
S
3
1.1A_8V_1206L110THYR
RG4 1 @ 2
G
2
w
100K_0402_5%
58,62 SUSP
w
B B
1
2
2
DG1 @ RG43 RG45 @
HDMI1_HPD_CON 1 1 10 9 HDMI1_HPD_CON 0_0805_5% 0_0805_5% 1
CG31
HDMI1_DAT_CON 2 2 9 8 HDMI1_DAT_CON DG4 DG5 .1U_0402_10V6-K
2
1
1
RB751V-40_SOD323-2 RB751V-40_SOD323-2
HDMI1_CLK_CON 4 4 7 7 HDMI1_CLK_CON V1 0 2
+5VS_HDMI1 5 5 6 6 +5VS_HDMI1
1
1
3 3 NV suggestion
RG53 RG54
8 2.2K_0402_5% 2.2K_0402_5%
2
2
AZ1045-04F_DFN2510P10E-10-9 JHDMI1
HDMI1_HPD_CON 19
EMC_NS@ Hot_Plug_Detect
18
17 +5V_Power
+1.8VS_VGA +1.8VS_AON +1.8VS_VGA +1.8VS_AON HDMI1_DAT_CON 16 DDC/CEC_GND
DG2 HDMI1_CLK_CON 15 SDA
HDMI1_TX0-_R 1 1 HDMI1_TX0-_R SCL
10 9 14
13 Utility 20
CEC GND1
2
2
HDMI1_TX0+_R 2 2 9 8 HDMI1_TX0+_R HDMI1_CLK-_R RG14 1 2 1/16W_6.8_5%_0402 HDMI1_CLK-_CON 12

RG41 RG42 RG39 RG40 11 TDMS_Clock- 21
HDMI1_CLK-_R 4 4 HDMI1_CLK-_R HDMI1_CLK+_R HDMI1_CLK+_CON TDMS_Clock_Shield GND2
7 7 @ 0_0402_5% 0_0402_5% @ 0_0402_5% 0_0402_5% RG13 1 2 1/16W_6.8_5%_0402 10
HDMI1_TX0-_R RG8 1 2 1/16W_6.8_5%_0402 HDMI1_TX0-_CON 9 TDMS_Clock+ 22
HDMI1_CLK+_R 5 5 HDMI1_CLK+_R TDMS_Data0- GND3
6 6 8
1
1
HDMI1_TX0+_R RG7 1 2 1/16W_6.8_5%_0402 HDMI1_TX0+_CON 7 TDMS_Data0_Shield 23

3 3 AUX V1 0 V1 0 HDMI1_TX1-_R RG10 1 2 1/16W_6.8_5%_0402 HDMI1_TX1-_CON 6
5
TDMS_Data0+
TDMS_Data1-
GND4
8 HDMI1_TX1+_R RG9 1 2 1/16W_6.8_5%_0402 HDMI1_TX1+_CON 4 TDMS_Data1_Shield

TDMS_Data1+
1
NV suggestion HDMI1_TX2-_R RG12 1 2 1/16W_6.8_5%_0402 HDMI1_TX2-_CON 3

RG56 RG55 2 TDMS_Data2-
HDMI1_TX2+_R 1 2 1/16W_6.8_5%_0402 HDMI1_TX2+_CON 1 TDMS_Data2_Shield
AZ1045-04F_DFN2510P10E-10-9 For EMC 10K_0402_5% 10K_0402_5% RG11
TDMS_Data2+
2
EMC_NS@
ALLTO_C128AU-K1939-L
G1
ME@
HDMI1_DAT_CON 6 1
D1 S1 HDMI1_DAT 26
A DG3 A
HDMI1_TX1-_R 1 1 10 9 HDMI1_TX1-_R PJT7838_SOT363-6
QG3A
HDMI1_TX1+_R 2 2 9 8 HDMI1_TX1+_R
5
HDMI1_TX2-_R 4 4 7 7 HDMI1_TX2-_R
G2
HDMI1_TX2+_R 5 5 6 6 HDMI1_TX2+_R HDMI1_CLK_CON 3 4

D2 S2 HDMI1_CLK 26
3 3
Vgs(th)≤1V PJT7838_SOT363-6
8 QG3B
For EMC Security Classification LC Future Center Secret Data Title
AZ1045-04F_DFN2510P10E-10-9 Issued Date 2018/08/02 Deciphered Date 2018/08/02 HDMI_CONN

EMC_NS@
Custom
Y550 1.0
Date: Friday, January 17, 2020 Sheet 42 of 83

5 4 3 2 1
4 3 2 1
+3VALW
+VBUS_P0 +5VALW +LDO_3V3
2
RT11
0_0402_5%
1
RA RT
1
RT45 RT41 RT42@
@
200K_0402_1% 590K_0402_1% 0_0402_5%
2
D D
2
G
VMON LOC_PWR_MON
1 6 SM_CK
S
52,53,54,60,72 EC_SMB_CK0
D
1
5
@
RB RT 7
G
VM N: RT40 RT46 QT1A
Used to monitor VBUS voltage RT47
Divide the VBUS voltage down to ADC full-scale in ut of 1 V
10K_0402_1% 10K_0402_1%
10K_0402_1% EC 2N7002KDWH_SOT363-6
Then connect the divided voltage to this in 4 3 SM_SDA
S
2
2
52,53,54,60,72 EC_SMB_DA0
D
@ 2N7002KDWH
QT1B Vth= min 1V, max 2.5V
2N7002KDWH_SOT363-6 ESD 2KV
@
RT9 1 2 0_0402_5%
@
RT10 1 2 0_0402_5%
+5VALW
+VCON_IN +VCON_IN
500mA
om
10U_0805_10V6K
.1U_0402_10V6-K
100mA 100mA
1 2
CT102
CT101
@
RT48 2 1 0_0603_5% +5VALW +5V_IN
2 1
@
2 1 0_0603_5%
.c
RT103
+5V_IN
1
CT1
k
lace close to in13 10U_0603_10V6K
C 2 C
oc
1 3
D
4.7U_10V_K_X5R_0402
@ VDS=-20 1 1
QT2
VGS=+-8V
CT2
AO3413_SOT23-3 CT3
G
2
SB93413000J Id=3A 10U_0603_10V6K
nl
2 2
Vth=-1v
@ +LDO_3V3
I2C1_IRQ# RT55 2 1 47K_0402_5% 1 1
u
CT4 CT103 for redriver in control mode used
4.7U_0402_6.3V6M 0.1U_6.3V_K_X5R_0201 This in can be fonfigured as digital GPI via F/W
st
2 2 in some a lications
0 /13 yong @
13
21
15
UT2 RT14 1 2 0_0402_5%
PS8747_FLIP_C1 44
LDO_3V3
VCON_IN
5V_IN
fa
for redriver in control mode used RT16 1 2@ 0_0402_5% 7 11 PS8747_FLIP_C1_R EMC@
44 PS8747_USB_MODE_C1 AUX_N/MGPIO5 BB_DM/MGPIO1 VBUS_DSCHG
RT15 1 2@ 0_0402_5% 6 10 CT5 1 2 220P_0402_50V_X7R_0402
0 /13 yong 44 PS8747_DP_MODE_C1 AUX_P/MGPIO4 BB_DP/MGPIO0 VBUS_DSCHG 45
s-
9 14 USBC_CC2_CONN
SBU2/MGPIO7 CC2 USBC_CC1_CONN USBC_CC2_CONN 45
8 12
SBU1/MGPIO6 CC1 USBC_CC1_CONN 45
EMC@
CT6 1 2 220P_0402_50V_X7R_0402
m
22 1 INT#_TYPEC_R RT58 1 2 0_0402_5% RTS5457_SM_INT
45 VBUS_EN I2C_EN/GPIO10 RTS5457T-GR SM_INT/GPIO4
@ RTS5457_SM_INT 14,52
ru
I2C1_IRQ# 5 24 SM_SDA_R RT215 1 @ 2 0_0402_5% SM_SDA
I2C_INT/GPIO9 SM_SDA/GPIO6
REPETER_SDA_L RT17 1 @ 2 0_0402_5% REPETER_SDA_R
23 3 SM_CK_R RT216 1 @ 2 0_0402_5% SM_CK
I2C_SDA/GPIO8 SM_SCL/GPIO5
REPETER_SCL_L RT18 1 @ 2 0_0402_5% REPETER_SCL_R
4 .fo
I2C_SCL/GPIO7
20 RT59 1 2 1/16W_6.2K_1%_0402
REXT
LOC_PWR_MON 19 16
@ RT 0 for dead battery
RT60 1 2 0_0402_5%
B LOC_PWR_MON DB_CFG Stuff: disable B
18 2 TYPE-C_DP_RE_HPD unStuff: nable

w
45 TYPE_C_OCP# IMON_MGPIO8 HPD/GPIO3 TYPE-C_DP_RE_HPD 44
VMON 17 25
VMON_MGPIO9 E-PAD
+3VALW
w
RTS5457T-GR_QFN24_4X4
w
INT#_TYPEC_R 1 2 RT978 4.7K_0402_5%
follow stone request +3VS_RE1

08/ 1
SM_CK 1 @ 2 RT977 4.7K_0402_5%
2
RT984 SM_SDA 1 @ 2 RT979 4.7K_0402_5%

0_0402_5%
1
@ +LDO_3V3
2
G
I2C1_IRQ# 1 2 RT980 4.7K_0402_5%
REPETER_SDA_L 1 @ 2 RT981 4.7K_0402_5%

1 6 REPETER_SDA_L Modify by Yong@08/ 1
S
44 REPETER_SDA
D
REPETER_SCL_L 1 @ 2 RT982 4.7K_0402_5%

5
@
G
QT4A RTS5457_SM_INT 1 @ 2 RT983 4.7K_0402_5%

2N7002KDWH_SOT363-6
4 3 REPETER_SCL_L
S
44 REPETER_SCL
D
@
QT4B
A 2N7002KDWH_SOT363-6 A
Security
Issued Date 2018/08/02 Deciphered Date 2018/08/02 USB TYPE-C Controller

Custom
Y550 1.0
Date: Monday, January 20, 2020 Sheet 43 of 83

4 3 2 1
5 4 3 2 1
+3VS +3VALW
@ +3VS_RE1
RR20 1 2 0_0603_5%
RR1 1 2 0_0603_5%
@
1 1 1 1
CR3 CR4 CR2 CR1
D D
10U 6.3V M X5R 0402
10U 6.3V M X5R 0402
4.7U_0402_6.3V6M
0.1U_6.3V_K_X5R_0201
@
2 2 2 2
20
28
17
6
UR1
CR43 1 2 0.1U_6.3V_K_X5R_0201 TYPE-C_DP_RE_TXP0 9
VDD33_1
VDD33_2
VDD33_3
VDD_DCI
26 GPU_SNK0_DP0P TYPE-C_DP_RE_TXN0 ML0P
CR44 1 2 0.1U_6.3V_K_X5R_0201 10
26 GPU_SNK0_DP0N TYPE-C_DP_RE_TXP3 ML0N
CR46 1 2 0.1U_6.3V_K_X5R_0201 18
26 GPU_SNK0_DP3P 1 2 TYPE-C_DP_RE_TXN3 19 ML3P
CR45 0.1U_6.3V_K_X5R_0201
26 GPU_SNK0_DP3N ML3N +3VS_RE1
PS8747_SSDE1 11 30
PS8747_CDE1 SSDE/DCI_DATA RX1P TYPEC_RXP1 45
14 31 TYPEC_RXN1 45
CDE/DCI_CLK RX1N 40
USB30_RX_P4_MUX RX2P TYPEC_RXP2 45
CR54 1 2 0.1U_6.3V_K_X5R_0201 5 39
15 TYPE-C_USB3_RX_P4 USB30_RX_N4_MUX SSRXP RX2N TYPEC_RXN2 45 PS8747_DP_MODE_C1
CR53 1 2 0.1U_6.3V_K_X5R_0201 4 RR18 2 1 1/20W_4.7K_5%_0201
15 TYPE-C_USB3_RX_N4 CR51 1 2 USB30_TX_P4_MUX 8 SSRXN
0.1U_6.3V_K_X5R_0201
15 TYPE-C_USB3_TX_P4 CR52 1 2 USB30_TX_N4_MUX 7 SSTXP
0.1U_6.3V_K_X5R_0201
15 TYPE-C_USB3_TX_N4 SSTXN 33 RR19 2 1 1/20W_4.7K_5%_0201 PS8747_FLIP_C1
TX1P 34 TYPEC_TXP1 45
TYPE-C_DP_RE_TXP2 TX1N TYPEC_TXN1 45
CR50 1 2 0.1U_6.3V_K_X5R_0201 15 37
26 GPU_SNK0_DP2P 1 2 TYPE-C_DP_RE_TXN2 16 ML2P TX2P 36 TYPEC_TXP2 45 2 1 PS8747_USB_MODE_C1
CR49 0.1U_6.3V_K_X5R_0201 RR11
26 GPU_SNK0_DP2N TYPEC_TXN2 45
m
CR47 1 2 TYPE-C_DP_RE_TXP1 12 ML2N TX2N 1/20W_4.7K_5%_0201
26 GPU_SNK0_DP1P 0.1U_6.3V_K_X5R_0201
CR48 1 2 TYPE-C_DP_RE_TXN1 13 ML1P
26 GPU_SNK0_DP1N 0.1U_6.3V_K_X5R_0201
ML1N in control mode connect to PDC
CR41 1 2 0.1U_6.3V_K_X5R_0201 GPU_DDI2_M_AUXP 24 follow yoga7 0 change to stuff
AUXP
o
26 GPU_SNK0_AUX_DP CR42 1 2 0.1U_6.3V_K_X5R_0201 GPU_DDI2_M_AUXN 25 1 internally PD 150K 07/01 Y NG
26 GPU_SNK0_AUX_DN AUXN CEXT 23 PS8747_DP_MODE_C1
PS8747_I2C_CTRL1 CE_DP PS8747_USB_MODE_C1 PS8747_DP_MODE_C1 43
29 35
PS8747_USB_MODE_C1 43
.c
PS8747_ADDR1 3 I2C_EN CE_USB 38 PS8747_FLIP_C1
DCICFG/ADDR FLIP USBC_DPAUX1_CONN PS8747_FLIP_C1 43
C 27 USBC_DPAUX1_CONN 45 C
RR4 1 @ 20_0201_5% PS8747_SCL1 21 SBU1 26 USBC_DPAUX2_CONN
43 REPETER_SCL PS8747_SDA1 DPEQ/CSCL SBU2 TYPE-C_DP_RE_HPD USBC_DPAUX2_CONN 45
RR3 1 @ 20_0201_5% 22 32
k
43 REPETER_SDA CEQ/CSDA IN_HPD TYPE-C_DP_RE_HPD 43
EPAD
2
REXT
oc
1
1
41
RR2 PS8747BQFN40GTR-B1_QFN40_6X4
4.99K_0402_1% CR5
2.2U_0402_6.3V6M
2
nl
2
+1.8VS_AON
u
HPD
1
st
RR57
10K_0402_5%
2
fa
IFPA_HPD
28 IFPA_HPD
to NV GPU
QR8
s-
+3VS_RE1 MMBT3904WH_SOT323-3
1
C
2 @ 1 PS8747_SCL1 RR13 1 2 1/20W_4.7K_5%_0201 2 RR56 1 2 100K_0402_5% RR53 1 2 0_0402_5% TYPE-C_DP_RE_HPD
RR5 1/20W_4.7K_5%_0201 B
1
2 1 PS8747_SDA1 RR14 1 2 1/20W_4.7K_5%_0201
1
RR6 1/20W_4.7K_5%_0201 RR55 1
100K_0402_5% CR40 RR54
ru
2 @ 1 PS8747_I2C_CTRL1 RR15 1 2 1/20W_4.7K_5%_0201 220P_0402_50V7K 100K_0402_5%
RR7 1/20W_4.7K_5%_0201
2
2
2
Automatic DCI mode ent 2 1 PS8747_ADDR1 RR12 2 1 1/20W_4.7K_5%_0201
ering enabled @ @
B B
.fo
RR8 1/20W_4.7K_5%_0201
2 @ 1 PS8747_SSDE1
RR9 1/20W_4.7K_5%_0201
to PCH TYPE-C_DP_HPD RR58 1 2 0_0402_5% TYPE-C_DP_RE_HPD
PS8747_CDE1 15 TYPE-C_DP_HPD
2 @ 1
w
RR10 1/20W_4.7K_5%_0201
w
+3VS
RR16
w
Setting: 1 2 100K_0201_5% GPU_DDI2_M_AUXN

1. PS8747_I2C_CTRL=L, I2C disable RR17 1 2 100K_0201_5% GPU_DDI2_M_AUXP
2. PS8747_SCL/DPEQ=L, DP Receiver equalization Compensation for channel loss up to 7dB
3. PS8747_SDA/CEQ=L, USB Type-C connector facing RX channel receiver equalization setting Compensation
4.ADDR/DCICFG=M, Automatic DCI mode entering enabled for channel loss up to 7dB
5. CDE/DCICLK=L,When NO DCI mode-->USB Type-C connector facing TX channel De-emphasis setting -3.5dB Output De-emphasis(default)
6. SSDE/DCIDAT=L,When NO DCI mode-->USB HOST facing TX channel De-emphasis setting -3.5dB Output De-emphasis(default)
100P 25V J NPO 0201
100P 25V J NPO 0201

1 1
@ @
2 2
CR7
CR6
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 DDI Redriver PS8330

C
Y550 1.0

5 4 3 2 1
4 3 2 1
@
RT63 1 2 0_0402_5%
LT6 TYPE-C_USB20_P4_C
TYPE-C_PCH_USB20_N4 4 3 TYPE-C_USB20_N4_C TYPE-C_USB20_N4_C
19 TYPE-C_PCH_USB20_N4 4 3
TYPE-C_PCH_USB20_P4 1 2 TYPE-C_USB20_P4_C
19 TYPE-C_PCH_USB20_P4 1 2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
GND4
GND3
GND2
GND1
EXC24CH900U_4P
2
EMC@ DT18 DT22
JUSBC1
2
RT81 1 @ 2 0_0402_5%
GND8
GND7
GND6
GND5
B12 A1
GND4 GND1
TYPE-C_RX1_P_C B11 A2 TYPE-C_TX1_P_C
SSRXp1 SSTXp1
1
@ TYPE-C_RX1_N_C B10 A3 TYPE-C_TX1_N_C EMC_NS@ EMC_NS@
1
RT84 1 2 0_0402_5% SSRXn1 SSTXn1
B9 A4
+VBUS_P0 Vbus4 Vbus1 +VBUS_P0
LT1 @ USBC_DPAUX2_CONN B8 A5 USBC_CC1_CONN
TYPEC_TXN1 TYPE-C_TX1_N_R CT30 TYPE-C_TX1_N_C 44 USBC_DPAUX2_CONN SBU2 CC1 USBC_CC1_CONN 43
1 2 1 2 0.33U_10V_K_X5R_0402
44 TYPEC_TXN1 1 2 TYPE-C_USB20_N4_C B7 A6 TYPE-C_USB20_P4_C
Dn2 Dp1
TYPEC_TXP1 4 3 TYPE-C_TX1_P_R CT31 1 2 0.33U_10V_K_X5R_0402 TYPE-C_TX1_P_C TYPE-C_USB20_P4_C B6 A7 TYPE-C_USB20_N4_C
44 TYPEC_TXP1 4 3 Dp2 Dn1 USBC_DPAUX1_CONN USBC_DPAUX2_CONN
EXC24CH500U_4P USBC_CC2_CONN B5 A8 USBC_DPAUX1_CONN
43 USBC_CC2_CONN CC2 SBU1 USBC_DPAUX1_CONN 44
1
B4 A9
@ +VBUS_P0 Vbus3 Vbus2 +VBUS_P0 R2 R1
RT86 1 2 0_0402_5% TYPE-C_TX2_N_C B3 A10 TYPE-C_RX2_N_C 2M_0402_5% 2M_0402_5%
SSTXn2 SSRXn2
D D
TYPE-C_TX2_P_C B2 A11 TYPE-C_RX2_P_C
2
SSTXp2 SSRXp2
@ B1 A12
GND10
1 2 0_0402_5% GND3 GND2
GND9
RT89
DT21
USBC_DPAUX1_CONN 9 10 1 USBC_DPAUX1_CONN
1
GND5
GND6
LT22 @ ME@ HIGHSTAR-UB11249-B200W-1H
TYPEC_TXN2 4 3 TYPE-C_TX2_N_R CT32 1 2 0.33U_10V_K_X5R_0402 TYPE-C_TX2_N_C USBC_DPAUX2_CONN 8 2 USBC_DPAUX2_CONN
44 TYPEC_TXN2 9 2
4 3
USBC_CC1_CONN 7 4 USBC_CC1_CONN
7 4
TYPEC_TXP2 1 2 TYPE-C_TX2_P_R CT33 1 2 0.33U_10V_K_X5R_0402 TYPE-C_TX2_P_C
44 TYPEC_TXP2 1 2 USBC_CC2_CONN 6 5 USBC_CC2_CONN
6 5
EXC24CH500U_4P
3 3
@ 8
RT91 1 2 0_0402_5%
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@
@
RT92 1 2 0_0402_5%
DT19
TYPE-C_RX2_P 10 1 TYPE-C_RX2_P
NC1 Line-1
LT13 @ TYPE-C_RX2_N 9 2 TYPE-C_RX2_N
TYPEC_RXP1 4 3 TYPE-C_RX1_P CT26 1 2 0.33U_10V_K_X5R_0402 TYPE-C_RX1_P_C NC2 Line-2
44 TYPEC_RXP1 4 3 TYPE-C_TX2_P_R 7 4 TYPE-C_TX2_P_R
NC3 Line-3
TYPEC_RXN1 1 2 TYPE-C_RX1_N CT27 1 2 0.33U_10V_K_X5R_0402 TYPE-C_RX1_N_C TYPE-C_TX2_N_R 6 5 TYPE-C_TX2_N_R
44 TYPEC_RXN1 1 2 NC4 Line-4
EXC24CH500U_4P 3
GND1
8
220K_0201_5%
GND2
1
@
220K_0201_5%
1
1 2 0_0402_5%
RT5
RT98 AZ1143-04F-R7G_DFN2510P10E10
RT6
EMC_NS@
2
2
@
RT100 1 2 0_0402_5%
DT20
TYPE-C_TX1_N_R 10 1 TYPE-C_TX1_N_R
NC1 Line-1
LT21 @ TYPE-C_TX1_P_R 9 2 TYPE-C_TX1_P_R
TYPEC_RXP2 1 2 TYPE-C_RX2_P CT28 1 2 0.33U_10V_K_X5R_0402 TYPE-C_RX2_P_C NC2 Line-2
44 TYPEC_RXP2 1 2 TYPE-C_RX1_N 7 4 TYPE-C_RX1_N
NC3 Line-3
TYPEC_RXN2 4 3 TYPE-C_RX2_N CT29 1 2 0.33U_10V_K_X5R_0402 TYPE-C_RX2_N_C TYPE-C_RX1_P 6 5 TYPE-C_RX1_P
44 TYPEC_RXN2 4 3 NC4 Line-4
EXC24CH500U_4P 3
GND1
@ 8
220K_0201_5%
GND2
1
1 2 0_0402_5%
220K_0201_5%
RT101
1
RT8
AZ1143-04F-R7G_DFN2510P10E10
RT7
EMC_NS@
2
modify by Jeffrey 081 V0
C C
+VBUS_P0 +VBUS_P0
1
AZ5725-01F.R7GR_DFN1006P2X2
RT171
0.47U_0402_25V6K
0.47U_0402_25V6K
0.47U_0402_25V6K
0.47U_0402_25V6K
10U_0805_25V6K
High enable discharge 470_0603_5%
1
Low disable discharge 1 1 1 1 1
CT11
CT10
CT9
CT8
CT7
@
1
2
EMC_NS@
DT1
RT2
1
0_0402_5% QT3 D 2 2 2 2 2
VBUS_DSCHG 1 2 2
43 VBUS_DSCHG
2
G @
@ u date by bing 05 3
2
2
S 2N7002KW_SOT323-3
3
RT3
100K_0402_5%
@
1
+LDO_3V3
3A
+5VALW +VBUS_P0
2
UT1
B RT12 B
5 1 10K_0402_5%
IN OUT
2
1
GND
VBUS_EN 4 3 TYPE_C_OCP#
43 VBUS_EN EN FLAG TYPE_C_OCP# 43
2
Active high RT13 G517G1TO1U_TSOT-23-5

100K_0402_5%
1
+5VALW
om
Place close to UT1 5
yong 07/01
22U_0603_6.3V6-M
22U_0603_6.3V6-M
CT12 1
1 1
150U_B2_6.3VM_R35M
2 2
2 @
CT14
CT13
.c
ck
lo
un
st
fa
s-
m
A A
ru
.fo
w
w
w
Issued Date 2018/08/02 Deciphered Date 2018/08/02 USB TYPE-C Port

Custom
Y550 1.0
Date: Friday, January 17, 2020 Sheet 45 of 83

4 3 2 1
A B C D E
M.2 SSD(SATA/PCIE)
+3VS +3.3V_NGFF
@ 2A
RF9 1 2 0_0805_5%
CF37
22U_0603_6.3V6-M
1 1 1
CF38
4.7U_0402_6.3V6M
@ CF39
.1U_0402_10V6-K
@
2 2 2
JSSD1
NGFF1 +3.3V_NGFF
1 2
3 GND_1 3.3V_1 4
1 PCIE_PRX_DTX_N9 5 GND_2 3.3V_2 6 1
14 PCIE_PRX_DTX_N9 PCIE_PRX_DTX_P9 PERN3 N/C_2 2
7 8 CF40
14 PCIE_PRX_DTX_P9 PERP3 N/C_3
9 10 .1U_0402_10V6-K
PCIE_PTX_DRX_N9 CF12 2 1 0.22U_0201_6.3V6-K PCIE_PTX_DRX_N9_C 11 GND_3 DAS/DSS# 12
14 PCIE_PTX_DRX_N9 PCIE_PTX_DRX_P9 PCIE_PTX_DRX_P9_C PETN3 3.3V_3 1
CF13 2 1 0.22U_0201_6.3V6-K 13 14
14 PCIE_PTX_DRX_P9 PETP3 3.3V_4 +3.3V_NGFF
15 16
PCIE_PRX_DTX_N10 17 GND_4 3.3V_5 18
14 PCIE_PRX_DTX_N10 PCIE_PRX_DTX_P10 PERN2 3.3V_6
19 20
21 22
PCIE_PTX_DRX_N10 CF10 2 1 0.22U_0201_6.3V6-K PCIE_PTX_DRX_N10_C 23 GND_5 N/C_5 24
14 PCIE_PTX_DRX_N10 PETN2 N/C_6
1
PCIE_PTX_DRX_P10 CF11 2 1 0.22U_0201_6.3V6-K PCIE_PTX_DRX_P10_C 25 26
14 PCIE_PTX_DRX_P10 PETP2 N/C_7
27 28 RF10
PCIE_PRX_DTX_N11 29 GND_6 N/C_8 30 10K_0201_5%
14 PCIE_PRX_DTX_N11 PCIE_PRX_DTX_P11 PERN1 N/C_9
31 32 @
33 34
2
PCIE_PTX_DRX_N11 CF8 2 1 0.22U_0201_6.3V6-K PCIE_PTX_DRX_N11_C 35 GND_7 N/C_11 36
14 PCIE_PTX_DRX_N11 PCIE_PTX_DRX_P11 PCIE_PTX_DRX_P11_C PETN1 N/C_12 DEVSLP_R
CF9 2 1 0.22U_0201_6.3V6-K 37 38 RF11 1 @ 2 0_0201_5% DEVSLP
14 PCIE_PTX_DRX_P11 PETP1 DEVSLP DEVSLP 15
39 40
PCIE_SATA_PRX_DTX_P12 41 GND_8 N/C_13 42
14 PCIE_SATA_PRX_DTX_P12 PCIE_SATA_PRX_DTX_N12 PERN0/SATA-B+ N/C_14
43 44
14 PCIE_SATA_PRX_DTX_N12 PERP0/SATA-B- N/C_15
1
45 46
PCIE_SATA_PTX_DRX_N12 CF1 2 1 0.22U_0201_6.3V6-K PCIE_SATA_PTX_DRX_N12_C 47 GND_9 N/C_16 48 RF12
14 PCIE_SATA_PTX_DRX_N12 PCIE_SATA_PTX_DRX_P12 PCIE_SATA_PTX_DRX_P12_C PETN0/SATA-A- N/C_17 PLT_RST#
CF7 2 1 0.22U_0201_6.3V6-K 49 50 10K_0201_5%
14 PCIE_SATA_PTX_DRX_P12 PETP0/SATA-A+ PERST# SSD_CLKREQ# PLT_RST# 18,28,47,52,55,56
51 52
CLK_PCIE_SSD# GND_10 CLKREQ# SSD_CLKREQ# 17
53 54 1 1
17 CLK_PCIE_SSD#
2
CLK_PCIE_SSD 55 REFCLKN PEWAKE# 56 @ CF41
17 CLK_PCIE_SSD REFCLKP N/C_18
57 58 TPF2 1000P_0402_50V7K
+3.3V_NGFF GND_11 N/C_19
1
59 NC NC 0 2
RF13 1 NC NC
10K_0201_5% 3 NC NC
5 NC NC
67 68 +3.3V_NGFF
2
PEDET 69 N/C_1 SUSCLK 70
71 PEDET 3.3V_7 72
73 GND_12 3.3V_8 74
GND_13 3.3V_9
0.1u_0201_10V6K
CF143
22U_0603_6.3V6-M
75 1 1 1
1
GND_14
0.01U_0201_10V6K
CF42
PEDET (PE_DTCT) RF14 77 76
CF36
PEG1 PEG2
@
10K_0201_5%
SATA Device GND @ 2 2 2
PCIe Device Open ARGOS_NASM0-S6701-TS40
2
ME@
SSD_DET#
0 - SATA
1 - PCIE
+3VALW_PCH
2
RF18
10K_0402_5%
+3.3V_NGFF @
1
2
RF19
2 SSD_DET# 14 2
10K_0402_5%
@
3
1
D2 QF49B
5 PJT7838_SOT363-6
G2
@
S2
4
6
QF49A
D1
PEDET 2 PJT7838_SOT363-6
m
G1
@
S1
1
o
Vgs(th)≤1.0V
RF15 1 2@ 0_0402_5%
.c
ck
lo
M.2 SSD(SATA/PCIE)
un
+3VS +3.3V_NGFF1
@ 2A
RF1 1 2 0_0805_5%
CF24
22U_0603_6.3V6-M
1 1 1
CF25
4.7U_0402_6.3V6M
@ CF26
.1U_0402_10V6-K
@
st
2 2 2
JSSD0
NGFF
76 +3.3V_NGFF1
GND15
fa
1 2
3 3 GND1 3.3V_1 4 3
PCIE_PRX_DTX_N20 5 GND2 3.3V_2 6
14 PCIE_PRX_DTX_N20 PCIE_PRX_DTX_P20 PERn3 N/C_2 2
7 8 CF23
14 PCIE_PRX_DTX_P20 PERp3 N/C_3
9 10 .1U_0402_10V6-K
PCIE_PTX_DRX_N20 CF17 2 1 0.22U_0201_6.3V6-K PCIE_PTX_DRX_N20_C 11 GND3 DAS/DSS#(I/O)/LED1#(I)(0/3.3V) 12
14 PCIE_PTX_DRX_N20 PCIE_PTX_DRX_P20 PCIE_PTX_DRX_P20_C PETn3 3.3V_3 1
CF18 2 1 0.22U_0201_6.3V6-K 13 14
s-
14 PCIE_PTX_DRX_P20 PETp3 3.3V_4 +3.3V_NGFF1
15 16
PCIE_PRX_DTX_N19 17 GND4 3.3V_5 18
14 PCIE_PRX_DTX_N19 PCIE_PRX_DTX_P19 PERn2 3.3V_6
19 20
21 22
PCIE_PTX_DRX_N19 CF20 2 1 0.22U_0201_6.3V6-K PCIE_PTX_DRX_N19_C 23 GND5 N/C_5 24
14 PCIE_PTX_DRX_N19
1
PCIE_PTX_DRX_P19 CF14 2 1 0.22U_0201_6.3V6-K PCIE_PTX_DRX_P19_C 25 PETn2 N/C_6 26
14 PCIE_PTX_DRX_P19 PETp2 N/C_7
27 28 RF2
14 PCIE_PRX_DTX_N18
PCIE_PRX_DTX_N18
PCIE_PRX_DTX_P18
29
31
GND6
PERn1
N/C_8
N/C_9
30
32
m 10K_0201_5%
@
33 34
2
PCIE_PTX_DRX_N18 CF19 2 1 0.22U_0201_6.3V6-K PCIE_PTX_DRX_N18_C 35 GND7 N/C_11 36
14 PCIE_PTX_DRX_N18 PCIE_PTX_DRX_P18 PCIE_PTX_DRX_P18_C PETn1 N/C_12 DEVSLP1_R
CF21 2 1 0.22U_0201_6.3V6-K 37 38 RF3 1 @ 2 0_0201_5% DEVSLP1
14 PCIE_PTX_DRX_P18 PETp1 DEVSLP(O) DEVSLP1 15
39 40
PCIE_SATA_PRX_DTX_P17 41 GND8 N/C_13 42
ru
14 PCIE_SATA_PRX_DTX_P17 PCIE_SATA_PRX_DTX_N17 PERn0/SATA-B+ N/C_14
43 44
14 PCIE_SATA_PRX_DTX_N17 PERp0/SATA-B- N/C_15
1
45 46
PCIE_SATA_PTX_DRX_N17 CF15 2 1 0.22U_0201_6.3V6-K PCIE_SATA_PTX_DRX_N17_C 47 GND9 N/C_16 48 RF4
14 PCIE_SATA_PTX_DRX_N17 PCIE_SATA_PTX_DRX_P17 PCIE_SATA_PTX_DRX_P17_C PETn0/SATA-A- N/C_17 PLT_RST#
CF16 2 1 0.22U_0201_6.3V6-K 49 50 10K_0201_5%
14 PCIE_SATA_PTX_DRX_P17 PETp0/SATA-A+ PERST#(O)(0/3.3V) or N/C SSD_CLKREQ1#
51 52
CLK_PCIE_SSD1# GND10 CLKREQ#(I/O)(0/3.3V) or N/C SSD_CLKREQ1# 17
53 54 1 1
17 CLK_PCIE_SSD1#
2
CLK_PCIE_SSD1 55 REFCLKn PEWAKE#(I/O)(0/3.3V) or N/C 56 @ CF29

17 CLK_PCIE_SSD1
.fo
+3.3V_NGFF1 57 REFCLKp N/C_18 58 TPF1 1000P_0402_50V7K

GND11 N/C_19
1
2
RF6
10K_0201_5%
67 68 +3.3V_NGFF1
PEDET1 69 N/C_1 SUSCLK(32kHz)(O)(0/3.3) 70
2
71 PEDET(NC-PCIe/GND-SATA) 3.3V_7 72
73 GND12 3.3V_8 74
GND13 3.3V_9
w
0.1u_0201_10V6K
CF27
22U_0603_6.3V6-M
75 1 1 1
GND14
0.01U_0201_10V6K
77
GND16
1
CF28
CF22
@
PEDET (PE_DTCT) RF7

10K_0201_5% ARGOS_NASM0-S6705-TSH4 2 2 2
SATA Device GND @
w
PCIe Device Open

2
SSD_DET#
0 - SATA
1 - PCIE
w
+3VALW_PCH
2
RF16
10K_0402_5%
+3.3V_NGFF1 @
1
2
4 RF17 4
SSD_DET1# 14
10K_0402_5%
@
3
1
QF48B
D2
5 PJT7838_SOT363-6
G2
@
S2
4
6
QF48A
D1
PEDET1 2 PJT7838_SOT363-6
G1
@
S1
1
Vgs(th)≤1.0V
RF5 1 2@ 0_0402_5%
Issued Date 2018/08/02 Deciphered Date 2018/08/02 NGFF WLAN
Custom
Y550 1.0

A B C D E
5 4 3 2 1
+3VS_WLAN
Mini-Express Card(WLAN/WiMAX)
0.1u_0201_10V6K
10U_0603_6.3V6M
4.7U_0603_6.3V6K
1 1 2 1
1U_0402_10V6K
CN1
CN2
CN3
CN4
@ @
2@ 2@ 1 2
JWLAN1 +3VS
1 2
USB20_P14 3 GND1 3.3VAUX1 4
D 19 USB20_P14 USB20_N14 USB_D+ 3.3VAUX2 D
5 6 1 @ TN13
19 USB20_N14 USB_D- LED1#
49.9K_0402_1%
7 8
GND2 PCM_CLK/I2S_SCK
1
CNVI_WR_D1_N 9 10 RN1 1 2 0_0402_5%
19 CNVI_WR_D1_N CNVI_WR_D1_P 11 SDIO_CLK PCM_SYNC/I2S_WS 12 CNVI_RF_RESET# 16
RN11
19 CNVI_WR_D1_P 13 SDIO_CMD PCM_IN/I2S_SD_IN 14 1 2 0_0402_5%
RN2
CNVI_WR_D0_N SDIO_DATA0 PCM_OUT/I2S_SD_OUT CNVI_MODEM_CLKREQ 16
15 16 1 @ TN14
19 CNVI_WR_D0_N CNVI_WR_D0_P 17 SDIO_DATA1 LED#2 18
19 CNVI_WR_D0_P
2
19 SDIO_DATA2 GND11 20
CNVI_WR_CLK_N 21 SDIO_DATA3 UART_WAKE# 22 RN31 CNVI@ 2 22_0402_5%
19 CNVI_WR_CLK_N CNVI_WR_CLK_P 23 SDIO_WAKE# UART_RXD CNVI_BRI_RSP 19 PCH_UART2_RXD 20
19 CNVI_WR_CLK_P SDIO_RESET# +1.8VALW +3VS
49.9K_0402_1%
K Y close to M PU PWR rail: 1 8VALW
1
5 PIN ~PIN31 NC PIN
need confirm B M structure 7 RN23 RN24
RN12
9 8 4.7K_0402_5% 100K_0402_5%
yong 0 / 5
m
31 30
2
33 32
GND3 UART_TXD CNVI_RGI_DT 19 PCH_UART2_TXD 20
35 34 RN4 1 CNVI@ 2 22_0402_5%
+3VS +3VS_WLAN 14 PCIE_PTX_C_DRX_P14 37 PETP0 UART_CTS 36 CNVI_RGI_RSP 19
14 PCIE_PTX_C_DRX_N14 PETN0 UART_RTS EC_TX_RSVD EC_TX CNVI_BRI_DT 19
39 38 RN5 1 @ 2 0_0402_5%
co
GND4 VENDOR_DEFINED1 EC_RX_RSVD EC_RX
WLAN 14 PCIE_PRX_DTX_P14
41
PERP0 VENDOR_DEFINED2
40 RN6 1 @ 2 0_0402_5%
2
43 42
14 PCIE_PRX_DTX_N14 PERN0 VENDOR_DEFINED3
2
QN2 RN13 45 44
G
47 GND5 COEX3 46 CRB: 33ohm EC_TX 50,52
10K_0402_5%
17 CLK_PCIE_WLAN REFCLKP0 COEX2 EC_RX 50,52
49 48
17 CLK_PCIE_WLAN# 51 REFCLKN0 COEX1 50 SUSCLK_R 1 2 0_0402_5%
RN7
1
3 1 WLAN_CLKREQ_Q# 53 GND6 SUSCLK 52 PLT_RST# SUSCLK 16 +3VS_WLAN
k.
17 WLAN_CLKREQ# CLKREQ0# PERST0# BT_OFF# PCH_BT_OFF# PLT_RST# 18,28,46,52,55,56
D
RN21 1 @ 2 0_0402_5% 55 54 RN8 1 2 1K_0402_5%
16,52,56 PCIE_WAKE# PEWAKE0# W_DISABLE2# WLAN_OFF# PCH_WLAN_OFF# PCH_BT_OFF# 20
L2N7002KWT1G_SOT323-3 RN22 1 @ 2 0_0402_5% 57 56 RN9 1 2 0_0402_5%
52,56 LAN_WAKE# GND7 W_DISABLE1# PCH_WLAN_OFF# 20
@
10K_0201_5% RN25
RN26
1
@ CNVI_WT_D1_N 59 58 EC_RX
c
19 CNVI_WT_D1_N RSRVD/PETP1 I2C_DATA
1
RN14 1 2 0_0402_5% CNVI_WT_D1_P 61 60 EC_TX
19 CNVI_WT_D1_P 63 RSRVD/PETN1 I2C_CLK 62
10K_0201_5%
CNVI_WT_D0_N 65 GND8 ALERT# 64 RN27 1 @ 2 0_0402_5%
19 CNVI_WT_D0_N CNVI_WT_D0_P RSRVD/PERP1 RSRVD CLKIN_XTAL_LCP 17
lo
If su ort A AC stuff RN1 RN1 67 66
2
19 CNVI_WT_D0_P 69 RERVD/PERN1 UIM_SWP/PERST1# 68 +3VS_WLAN
if not su ort A AC NC RN1 RN1
2
GND9 UIM_POWER_SNK/CLKREQ1#
1
CNVI_WT_CLK_N 71 70
19 CNVI_WT_CLK_N CNVI_WT_CLK_P 73 UIM_POWER_SRC/GPIO1/PEWAKE1#
RSRVD/REFCLKP1 72 PCH_BT_OFF#
RN10
19 CNVI_WT_CLK_P RSRVD/REFCLKN1 3.3VAUX3 PLT_RST# PCH_WLAN_OFF#
75 74 100K_0402_5%
GND10 3.3VAUX4
un
77 76 1
2
GND15 GND14 CN7
1000P_0402_50V7K
ARGOS_NASE0-S6701-TS40 2
ME@
C C
st
1 1
1U_0402_10V6K
0.1u_0201_10V6K
CN5
CN6
fa
2@ 2@
+3VS +3VS_WLAN
JN9 Don't short
s-
1 2
1 2 JUMP_43X79
@
+3VALW
JN10Need short
m
1 2
+3VALW 1 2 JUMP_43X79
@
+3VALW
ru
1
RN17 UN1
RN19
75K_0402_5% 5 1 1 2
@ IN OUT
0.01_0603_1%
2
2
GND @
.fo
1
WLAN_PWR_EN
CN20
0.01U_0402_25V7K
4 3
EN OCB
1
1
D RN18 SY6288C20AAC_SOT23-5 2@
2 QN1 200K_0402_5% @
15 CNVI_EN# G 2N7002KW_SOT323-3 @
1
@
2
w
RN20 S
3
75K_0402_5%
@
2
RN15 1 @ 2 0_0402_5%
w
16 PM_SLP_WLAN#
w
RN16 1 @ 2 0_0402_5%
52,55,69,71 SUSP#
1
B @ B
CN21
0.033U_25V_K_X7R_0402
2
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 CNVi

D 1.0
5 4 3 2 1
A B C D E F G H
1 1
SATA HDD Conn.
JHDD1
@
RF8 1 2 0_0805_5% 1
m
+5VS 1
2
3 2
3
co
4
SATA_PRX_DTX_P13 CF5 1 2 0.01U_0201_10V6K SATA_PRX_C_DTX_P13 5 4
14 SATA_PRX_DTX_P13 SATA_PRX_DTX_N13 CF4 1 2 0.01U_0201_10V6K SATA_PRX_C_DTX_N13 6 5
14 SATA_PRX_DTX_N13 7 6
k.
SATA_PTX_DRX_N13 CF3 1 2 0.01U_0201_10V6K SATA_PTX_C_DRX_N13 8 7 12
14 SATA_PTX_DRX_N13 8 GND2
SATA_PTX_DRX_P13 CF2 1 2 0.01U_0201_10V6K SATA_PTX_C_DRX_P13 9
14 SATA_PTX_DRX_P13 9
oc
10 11
10 GND1
nl
HIGHS_FC5AF101-2931H
ME@
u
2 2
st
fa
s-
+5VS
m
22U_10V_M_X5R_0603
22U_10V_M_X5R_0603
33P_50V_J_NPO_0201
33P_50V_J_NPO_0201
0.1U_6.3V_K_X5R_0201
10U_0805_10V6K
10U_0805_10V6K
1 1 1 1 1 1 1
CF30
CF31
CF32
CF33
CF34
CF35
ru
CF6
@ @ @
2 2 2 2 2 2 2
.fo
RF@ RF@
w
w
w
3 3
4 4

Issued Date 2018/08/02 Deciphered Date 2018/08/02 HDD/XBOX CONN
B
Y550 1.0

A B C D E F G H
A B C D E
+USB_VCCA
CI5 1 2 220U_B2_6.3VM_R35M
+
CI6 1 2
@ 1U_0603_25V6M
CI7 1 2
@ 470P_0402_50V7K
1 1
JUSB2
1
USB20_N1_B RI7 1 @ 2 0_0402_5% USB20_N1_R 2 VBUS
USB20_P1_B RI6 1 @ 2 0_0402_5% USB20_P1_R 3 D-
4 D+
USB30_RX_N3 RI8 1 2@ 0_0402_5% USB30_RX_R_N3 5 GND1
15 USB30_RX_N3 USB30_RX_P3 USB30_RX_R_P3 SSRX-
RI9 1 2@ 0_0402_5% 6 10
15 USB30_RX_P3 7 SSRX+ GND3 11
USB30_TX_N3 CI9 1 2 .1U_0402_10V6-K USB30_TX_C_N3 RI5 1 2@ 0_0402_5% USB30_TX_R_N3 8 GND2 GND4 12
15 USB30_TX_N3 USB30_TX_P3 USB30_TX_C_P3 USB30_TX_R_P3 SSTX- GND5
CI8 1 2 .1U_0402_10V6-K RI4 1 2@ 0_0402_5% 9 13
15 USB30_TX_P3 SSTX+ GND6
ALLTO_C107MJ-10939-L
ME@
om
USB20_P1_R
+USB_VCCA
USB charger
USB20_N1_R
2.5A
.c
3
+5VALW
1
2 DI63 2
AZC199-02S.R7G_SOT23-3 DI11 UI3
1
EMC@ AZ5725-01F.R7GR_DFN1006P2X2
ck
EMC@ CI12 2 1 .1U_0402_16V7K 1 16 ILIM_HI RI31 1 2 20K_0402_1%
@ IN ILIM_HI
USB20_N1 2 15 ILIM_LO RI32 1 @ 2 20K_0402_1%
19 USB20_N1 DM_OUT ILIM_LO
2
USB20_P1 3 14
lo
19 USB20_P1
2
DP_OUT GND
ILIM_SEL 4 13
ILIM_SEL FAULT USB_OC2# 19
1
5 12
un
52 USB_CHG_EN EN OUT +USB_VCCA
CHG_MOD1 6 11 USB20_N1_B
52 CHG_MOD1 CLT1 DM_IN
CHG_MOD2 7 10 USB20_P1_B
CLT2 DP_IN
E_PAD
CHG_MOD3 8 9
st
STATUS#
52 CHG_MOD3 CLT3 STATUS STATUS# 52
SN1702001RTER_WQFN16_3X3
17
fa
DI12
USB30_RX_R_N3 10 1 USB30_RX_R_N3
NC1 Line-1
USB30_RX_R_P3 9 2 USB30_RX_R_P3
s-
NC2 Line-2
USB30_TX_R_N3 7 4 USB30_TX_R_N3 +5VALW
NC3 Line-3
USB30_TX_R_P3 6 5 USB30_TX_R_P3
m
NC4 Line-4 +5VALW
3
GND1 RPI3
8 ILIM_SEL 2 3 STATUS# RI36 2 1 10K_0402_5%
ru
GND2 CHG_MOD2 1 4
AZ1143-04F-R7G_DFN2510P10E10 for placement optimization
10K_0404_4P2R_5% [close to EC side]
EMC@
3 3
.fo
ILIM_SEL 2 1 10K_0402_5%
For EMC RI34 @
CHG_MOD2 RI35 2 @ 1 10K_0402_5%
USB_CHG_EN RI33 2 1 10K_0402_5%

w
LI9
EXC24CH900U_4P
USB30_RX_P3 4 3 USB30_RX_R_P3
w
4 3
USB30_RX_N3 1 2 USB30_RX_R_N3
1 2
w
@
CLT1 CLT2 CLT3 ILIM_SEL MOD
LI10
EXC24CH900U_4P
USB30_TX_C_P3 4 3 USB30_TX_R_P3 0 0 0 X DCH OUT held low
4 3
USB30_TX_C_N3 1
1 2
2 USB30_TX_R_N3
* 1 1 1 1 CDP Data Connected and Port Power Mgt. Function Active
@ * 1 1 1 0 SDP2 Data Connected

LI11
USB20_P1_B 4
EXC24CH900U_4P
3 USB20_P1_R
* 1 1 0 X SDP1 Data Connected
4 3
USB20_N1_B 1 2 USB20_N1_R
* 0 1 0 X SDP1 Data Connected
1 2
EMC@
1 0 0 X DCP_Short Device Forced to stay in DCP BC 1.2 charging mode
For EMC
1 0 1 X DCP_Divider Device Forced to stay in DCP Divider 1 Charging Mode
4 4
* 0 1 1 X DCP_Auto Data Disconnected and Port Power Mgt. Function Active
0 0 1 X DCP_Auto Data Disconnected and Power Wake Function Active
Issued Date 2018/08/02 Deciphered Date 2018/08/02 USB2.0/USB3.0 PORT (LEFT)

C
Y550 1.0

A B C D E
5 4 3 2 1
+USB_VCCD
CI2 1 2 220U_6.3V_M
+
USB3.1 PORT x2
CI3 1 2
@ 1U_0603_25V6M
+5VALW +USB_VCCD
CI4 1 2
Low Active 2.2A
@ 470P_0402_50V7K UI125
5 1
IN OUT
D D
JUSB1 2 2
USB30_TX_P1 CI10 1 2 .1U_0402_10V6-K USB30_TX_C_P1 RI10 1 2@ 0_0402_5% USB30_TX_R_P1 9 CI32 GND
15 USB30_TX_P1 StdA_SSTX+ USB_OC3#
1 1U_0402_16V6K 4 3
USB30_TX_N1 CI11 1 2 .1U_0402_10V6-K USB30_TX_C_N1 RI11 1 2@ 0_0402_5% USB30_TX_R_N1 8 VBUS ENB OCB USB_OC3# 19
15 USB30_TX_N1 USBP2+_S USBP2+_S_R StdA_SSTX- 1
RI2 1 @ 2 0_0402_5% 3 SY6288D20AAC_SOT23-5 1
UARTA_P80_EN 7 D+ CI31
USBP2-_S RI3 1 @ 2 0_0402_5% USBP2-_S_R 2 GND_DRAIN 10 1000P_0402_50V7K
USB30_RX_P1 RI13 1 2@ 0_0402_5% USB30_RX_R_P1 6 D- GND_2 11 @
15 USB30_RX_P1 4 StdA_SSRX+ GND_3 12 2
USB30_RX_N1 RI12 1 2@ 0_0402_5% USB30_RX_R_N1 5 GND_1 GND_4 13 USB_ON#
15 USB30_RX_N1 StdA_SSRX- GND_5 52,55 USB_ON#
ALLTO_C190DU-10939-L
ME@
1
RI26 RI27
NPI@
100K_0402_5%
MP@
0_0402_5%
2
1
For USB Debug Function
om
.c
2 NPI@ 1 USB_UART_SEL
20 USBDEBUG
C RI23 0_0402_5% C
ck
DI24
USB30_RX_R_N1 10 1 USB30_RX_R_N1 USBP2+_S_R +USB_VCCD
NC1 Line-1
USB30_RX_R_P1 9 2 USB30_RX_R_P1 USBP2-_S_R
NC2 Line-2
lo
UI129
3
USB30_TX_R_N1 7 4 USB30_TX_R_N1
1
NC3 Line-3
1
NC4 Line-4 DI62 DI65 RI24 2 NPI@ 1 0_0402_5% EC_TX_C 1 10 RI37 2 NPI@ 1 0_0402_5%
un
47,52 EC_TX 1D+ VCC +3VALW
3 AZC199-02S.R7G_SOT23-3 AZ5725-01F.R7GR_DFN1006P2X2
GND1 EMC@ EMC@ RI25 2 NPI@ 1 0_0402_5% EC_RX_C 2 9 USB_UART_SEL
8 47,52 EC_RX 1D- S
GND2
2
3 8 USBP2+_S
19 USB20_P0 2D+ D+
AZ1143-04F-R7G_DFN2510P10E10 NCY3958Y
2
4 7 USBP2-_S
st
EMC@ 19 USB20_N0 2D- D-
5 6
1
GND1 OE#
fa
11
GND2
for EMC
s-
LI15 NCT3958Y_DFN10_3X3
EXC24CH900U_4P NPI@
4 3
m
1 2
@
ru
USB20_P0 2 MP@ 1 USBP2+_S
LI16 RI28 0_0402_5%
EXC24CH900U_4P
USB30_TX_C_N1 4 3 USB30_TX_R_N1 USB20_N0 2 MP@ 1 USBP2-_S
B 4 3 B
.fo
RI29 0_0402_5%
USBDEBUG Kernel debug
USB30_TX_C_P1 1 2 USB30_TX_R_P1
1 2 Set in ut Set in ut
@
Set out ut Low NABL
w
LI8
EXC24CH900U_4P
USBP2-_S 4 3 USBP2-_S_R +3VALW
4 3
w
USBP2+_S 1 2 USBP2+_S_R
1 2 UARTA_P80_EN POST 80
1
w
for EMC EMC@

Set in ut DISABL RI30
NPI@ 10K_0402_5%
Set out ut Low NABL
2
USB_UART_SEL
1
D
UARTA_P80_EN 2
OE# S FUNCTION G L2N7002KWT1G_SOT323-3
QI13
H X DISABL S NPI@
3
L L D +/- to 1D +/-
L H D +/- to D +/-
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 USB2.0

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
+USB_VCCD
D D
CI341 2
@ 1U_0603_25V6M +USB_VCCD
CI351 2
@ 470P_0402_50V7K
1
JUSB3
1
USB30_TX_P5 CI36 1 2 .1U_0402_10V6-K USB30_TX_C_P5 RI43 1 2@ 0_0402_5% USB30_TX_R_P5 9 DI106
15 USB30_TX_P5 StdA_SSTX+
1 AZ5725-01F.R7GR_DFN1006P2X2
USB30_TX_N5 CI37 1 2 .1U_0402_10V6-K USB30_TX_C_N5 RI45 1 2@ 0_0402_5% USB30_TX_R_N5 8 VBUS EMC_NS@
15 USB30_TX_N5 USB20_P10 1 2 0_0402_5% USB20_P10_R 3 StdA_SSTX-
RI46 @
19 USB20_P10 D+
2
7
USB20_N10 RI47 1 @ 2 0_0402_5% USB20_N10_R 2 GND_DRAIN 10
19 USB20_N10
2
USB30_RX_P5 RI48 1 2@ 0_0402_5% USB30_RX_R_P5 6 D- GND_2 11
15 USB30_RX_P5 StdA_SSRX+ GND_3
4 12
USB30_RX_N5 RI49 1 2@ 0_0402_5% USB30_RX_R_N5 5 GND_1 GND_4 13
15 USB30_RX_N5 StdA_SSRX- GND_5
ALLTO_C190DU-10939-L
ME@
m
co
C C
k.
oc
DI4
USB30_RX_R_N5 10 1 USB30_RX_R_N5 USB20_P10_R
NC1 Line-1
l
USB30_RX_R_P5 9 2 USB30_RX_R_P5 USB20_N10_R
un
NC2 Line-2
2
USB30_TX_R_N5 7 4 USB30_TX_R_N5
NC3 Line-3
NC4 Line-4 DI3
3
st
AZC199-02S.R7G_SOT23-3
GND1 EMC@
8
GND2
fa
AZ1143-04F-R7G_DFN2510P10E10
EMC@
1
s-
for EMC
m
B
ru B
.fo
LI93
EXC24CH900U_4P
4 3
w
1 2
@
w
LI94
EXC24CH900U_4P
USB30_TX_C_N5 4 3 USB30_TX_R_N5
4 3
w
USB30_TX_C_P5 1 2 USB30_TX_R_P5
1 2
@
LI95
EXC24CH900U_4P
USB20_P10 1 2 USB20_P10_R
1 2
USB20_N10 4 3 USB20_N10_R
4 3
for EMC EMC@
A A

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
@
+3VALW_R 1 2 0_0603_5%
For EMI +VFSPI RE1 +3VL 0.5A
@
+3VALW RE75 1 @ 2 0_0402_5% RE3 1 2 0_0603_5%
+3VALW
RE2 2 1 33_0402_5% CLK_PCI_EC
+3VALW_R +3VALW_R +3VALW_EC
RE97 2 @1 0_0402_5%
1 @
For SPI ROM Mirror RE4 1 2 0_0603_5%
CE2 +3VALW_R All capacitors close to EC
22P_50V_J_NPO_0402 1 1
2 CE4
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
+VFSPI .1U_0402_10V6-K CE5
EMC_NS@ 220P_0402_50V7K 2 1 CE24 LPC_FRAME# Close EC +3VS
1
CE6
1
CE7
1
CE8
1
CE9
1
CE10
1
CE11 1000P_0402_50V7K
+3VALW_EC RE6 1 2 0_0603_5% 2 EC_AGND 2 +3VS
D LPC_AD3 D
EMC_NS@ 220P_0402_50V7K 2 1 CE25 CE3 CD@ @ @
PLT_RST# 1 2 VCOREVCC 2 2 2 2 2 2
EMC_NS@ 220P_0402_50V7K 2 1 CE26 LPC_AD2
1 .1U_0402_10V6-K EC_AGND
CE1 EMC_NS@ 220P_0402_50V7K 2 1 CE27 LPC_AD1
1000P_0402_50V7K RPE1
EMC_NS@ 220P_0402_50V7K 2 1 CE28 LPC_AD0 EC_FAN2_SPEED 1 4
minimum trace width 12 mil
114
121
127
106
2 EC_FAN1_SPEED 2 3
12
11
26
50
92
74
UE1
10K_0404_4P2R_5%
Reserved Cap HLZ SDV 0616
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
VCC
VFSPI
AVCC
VCORE
EC_FAN2_PWM RE65 1 @ 2 10K_0402_5%
EC_FAN1_PWM RE11 1 @ 2 10K_0402_5%

25 WRST# PWR_LED_PWM_B
KBRST# 4 24
+3VALW_R 15 KBRST# 5 KBRST#/GPB6 PWM0/GPA0 25 YLOGO_LED_PWM PWR_LED_PWM_B 55 LPC_FRAME# 1 2 10K_0402_5%
SERIRQ RE7 @
15 SERIRQ LPC_FRAME# ALERT#/SERIRQ/GPM6 PWM1/GPA1 PWR_LED_PWM_R YLOGO_LED_PWM 41
6 28
15 LPC_FRAME# LPC_AD3 7 ECS#/LFRAME#/GPM5 PWM2/GPA2 29 PWR_LED_PWM_G PWR_LED_PWM_R 55 1 2 100K_0402_5%
ENBKL RE9 @
15 LPC_AD3 LPC_AD2 EIO3/LAD3/GPM3 PWM3/GPA3 EC_FAN2_PWM PWR_LED_PWM_G 55
DE1 1 2 @ 8 30 @
15 LPC_AD2 LPC_AD1 EIO2/LAD2/GPM2 SMCLK5/PWM4/GPA4 EC_FAN1_PWM EC_FAN2_PWM 60
9 31 RE872 2 1 0_0402_5%
15 LPC_AD1 LPC_AD0 10 EIO1/LAD1/GPM1 SMDAT5/PWM5/GPA5 32 EC_FAN1_PWM 60 LOGO_LED1_PWM 41 B P remove to PCH control
RE871 2 @ 1 0_0402_5%
RB751V-40_SOD323-2 15 LPC_AD0 CLK_PCI_EC EIO0/LAD0/GPM0 PWM6/SSCK/GPA6 for DDS BEEP# 58 yong 07/08 +3VALW
13 34
1 2 100K_0402_5% 15 CLK_PCI_EC 14 ESCK/LPCCLK/GPM4 PWM7/RIG1#/GPA7 120 CHG_MOD3 EC_EDP_PWM 40 08/0
RE8 WRST#
EC_SMI# WRST# GPC4 CHG_MOD3 49
15 124 SUSP# @
15,18 EC_SMI# EC_RX PLTRST#/ECSMI#/GPD4 GPC6 SUSP# 47,55,62,69,71
1 16 RE106 2 1 0_0402_5% AGKB_INT 53
47,50 EC_RX EC_TX 17 RXD/SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7 66 NTC_V1_GPU new add for RGB_KB EC_ON_1.8V 1 2
NTC_V1_GPU 60 RE98 @ 10K_0402_5%
CE12 47,50 EC_TX PLT_RST# TXD/SOUT0/LPCPD#/GPE6 ADC0/GPI0 NTC_V2_CPU yong 07/1
22 67 NTC_V2_CPU 60 @
1U_0402_6.3V6K 18,28,46,47,55,56 PLT_RST# EC_SCI# 23 ERST#/LPCRST#/GPD2 ADC1/GPI1 68 2 1@ 0_0402_5% 2 1 0_0402_5%
RE29 RE868 RGB_KB_INT 14,54
14,20 EC_SCI# PCIE_WAKE# 16,47,56
om
2 EC_RTCRST#_ON 126 ECSCI#/GPD3 ADC2/GPI2 69 BATT_I
GA20/GPB5 ADC3/GPI3 BATT_I 67 NTC_V3_DIMM_R RE870
70 2 @ 1 0_0402_5%
ITE-IT8227E-192/CX_ ADC4/GPI4
ADC5/DCD1#/GPI5
71
72
ADP_I
SYS_PWROK ADP_I 67
ADAPTER_ID_R RE869 2 1 0_0402_5% ADAPTER_ID
NTC_V3_DIMM
ADAPTER_ID
60
66,67
@
58
KSI0/STB#
LQFP128 ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7
73 PSYS
SYS_PWROK
PSYS 67,72
16
39,40 MUX_EDP_ENBKL
RE12 2 1 0_0402_5% ENBKL
59 78 EC_TP_ON
EC_TP_ON 55
.c
60 KSI1/AFD# DAC2/TACH0B/GPJ2 79 ME_FLASH RE10 2 1 100K_0402_5%
KSI2/INIT# DAC3/TACH1B/GPJ3 H_PROCHOT#_EC ME_FLASH 16
C 61 80 @ C
62 KSI3/SLIN# DAC4/DCD0#/GPJ4 81 RE92 1 2 0_0402_5%
KSI4 DAC5/RIG0#/GPJ5 EC_ON 60,68,71
63
ck
+3VALW_R EC_KSI6 64 KSI5 85 AGKB_PWR_EN#_R 0_0402_5% 2 @1 RE102 +5VALW
EC_KSI7 65 KSI6 PS2CLK0/TMB0/CEC/GPF0 86 PBTN_OUT# AGKB_PWR_EN# 53,54
KSI7 PS2DAT0/TMB1/GPF1 EC_SMB_CK0 PBTN_OUT# 16,61
RPE2 36 87
1 4EC_SMB_CK1 37 KSO0/PD0 SMCLK0/GPF2 88 EC_SMB_DA0 EC_SMB_CK0 43,53,54,60,72 USB_ON# RE15 1 2 100K_0402_5%
KSO1/PD1 SMDAT0/GPF3 EC_SMB_DA0 43,53,54,60,72
15P_0402_50V8J
15P_0402_50V8J
2 3EC_SMB_DA1 1 1 38 89 RE100 1 @ 2 0_0402_5% RTS5457_SM_INT 14,43

SYSON_VDDQ RE64 1 @ 2 100K_0402_5%
lo
39 KSO2/PD2 PS2CLK2/GPF4 90 EC_ON_1.8V
KSO3/PD3 PS2DAT2/GPF5 EC_ON_1.8V 78
CE113
CE112
2.2K_0404_4P2R_5% @ @ 40
41 KSO4/PD4 96 +3VALW_R
2 2 42 KSO5/PD5 GPH3/ID3 97 BATT_CHG_LED# STATUS# 49
un
KSO6/PD6 GPH4/ID4 BATT_LOW_LED# BATT_CHG_LED# 55
43 98
16 TOP_SWAP_EN
68 EC_3V/5V_USM
44 KSO7/PD7
KSO8/ACK#
SA00009CZ 0 GPH5/ID5
GPH6/ID6
99 PCH_PWROK BATT_LOW_LED#
PCH_PWROK
55
16
RE874 1 2@ 0_0402_5% PWM_OUT_EN_R 45 SUSP# RE18 1 @ 2 100K_0402_5%
+3VS 20,40 PWM_OUT_EN
20,40 EC_EDP_ENVDD
RE875 1 2@ 0_0402_5%EC_EDP_ENVDD_R 46
51
KSO9/BUSY
KSO10/PE
su ort CC function FSCE#
101
102
EC_SPI_CS0#
EC_SPI_SI SUSP# RE19 1 2 100K_0402_5%
55 SYS_LED EC_ON 0_0402_5% 1 KSO11/ERR# FMOSI EC_SPI_SO
52 103
st
RPE3 @ 2 RE96
1 4EC_SMB_CK2 53 KSO12/SLCT FMISO 105 EC_SPI_CLK SYSON RE21 1 2 100K_0402_5%
3EC_SMB_DA2 55 PWR_LED_SEL GSENSE_INT KSO13 FSCK
15P_0402_50V8J
15P_0402_50V8J
2 1 1 54
59 GSENSE_INT BoardID_ADP_LIM KSO14 CPUCORE_ON
55 RE14 1 @ 2 100K_0402_5%
FN_KEY_R KSO15
CE117
CE30
fa
2.2K_0404_4P2R_5% @ @ RE103 1 2@ 0_0402_5% 56 108 ACIN#
53 FN_KEY SMB1_ALERT#_R KSO16/SMOSI/GPC3 GPB0
16,60 SMB1_ALERT# RE101 1 @ 2 0_0402_5% 57 109 NOVO# NOVO# 55
2 2 KSO17/SMISO/GPC5 GPB1
@
ON/OFF 110 82 RE30 1 2 0_0402_5% VGA_AC_DET
s-
55 ON/OFF CHG_MOD1 PWRSW/GPB3 EGAD/GPE1 VCCIO_PG VGA_AC_DET 28
111 83 VCCIO_PG 71
49 CHG_MOD1 EC_SMB_CK1 115 GPB4 EGCS#/GPE2 SYSON_VDDQ
+3VALW 84
66,67,79 EC_SMB_CK1 EC_SMB_DA1 116 SMCLK1/GPC1 EGCLK/GPE3 SYSON_VDDQ 69
66,67,79 EC_SMB_DA1 PECI_EC 117 SMDAT1/GPC2 77 EC_MUTE#
RPE4 RE24 1 2 33_0402_5%
m
EC_SMB_CK0 6,14 EC_PECI USB_CHG_EN SMCLK2/PECI/GPF6 TACH2B/GPJ1 EC_MUTE# 58
2 3 118 100 GPG2
1 4 EC_SMB_DA0 49 USB_CHG_EN EC_SMB_CK2 94 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2 125 ENBKL
16,28,59,60 EC_SMB_CK2 EC_SMB_DA2 95 CRX1/SIN1/SMCLK3/GPH1/ID1 SSCE1#/GPG0 119 SYSON
16,28,59,60 EC_SMB_DA2 CTX1/SOUT1/SMDAT3/GPH2/ID2 DSR0#/GPG6 122 LAN_WAKE# SYSON 62
2.2K_0404_4P2R_5%
ru
DTR1#/SBUSY/GPG1/ID7 113 BKOFF#
CRX0/GPC0 LID_SW# BKOFF# 41 Change R 30 to 0ohm jum
123 LID_SW# 55
EC_ON_5V 112 CTX0/TMA0/GPB2 18 PM_SLP_S3#
68 EC_ON_5V CPUCORE_ON 107 RING#/CK32KOUT/LPCRET#/GPB7 RI1#/GPD0 21 USB_ON# PM_SLP_S3# 16
@
B 6,72 CPUCORE_ON GPE4 RI2#/GPD1 EC_FAN2_SPEED USB_ON# 50,55 ADAPTER_ID B
.fo
76 EC_FAN2_SPEED 60 RE105 1 2 0_0402_5% CE31 1 2 .1U_0402_10V6-K
+3VL TACH2A/GPJ0 48 PM_SLP_S4# SYSTEM_STATUS1 53
TACH1A/TMA1/GPD7 PM_SLP_S4# 16
47 EC_FAN1_SPEED SYSON CE13 1 2 .1U_0402_10V6-K EMC_NS@
TACH0A/GPD6 EC_FAN1_SPEED 60
EC_ON_1V 33 19 1 RE76@ 2 0_0402_5%
70 EC_ON_1V GINT/CTS0#/GPD5 SMCLK4/L80HLAT/BAO/GPE0 CAPS_LED# 53,55
1
CPU_PWRGD 35 20 1 RE77@ 2 0_0402_5%

72 CPU_PWRGD 1 2 1K_0201_5% EC_RSMRST#_R 93 RTS1#/GPE5 SMDAT4/L80LLAT/GPE7 3 NUM_LED# 53,55
RE108 RE848 RE873 2 @ 10_0402_5%
w
16,61 EC_RSMRST# CLKRUN#/GPH0/ID0 GPH7 PCH_FNLK 20,55

@ 100K_0201_5% @
RE104 1 2 0_0402_5%
BATT_TEMP 2 SYSTEM_STATUS2 53
66,67 BATT_TEMP
2
BoardID_ADP_LIM GPJ7
w
AC_PRESENT 128
16 AC_PRESENT GPJ6
1
RE109
w
100K_0201_5%
RE34 1 2 0_0402_5% H_PROCHOT# 6,72
67 VR_HOT#
AVSS
VSS3
VSS4
VSS5
VSS1
VSS2
BoardID_ADP_LIM:
2
1: N18 < 135W ada ter not su ort
1
0: N18P < 90W ada ter not su ort EC_SMB_CK1 PAD 1 @ QE1 D 1
C request 11/1 EC_SMB_DA1 1 ITE1 H_PROCHOT#_EC 2
PAD @ CE14
ITE2
49
91
104
PCH_RTCRST# 16
1
27
75
PAD 1 @ G 47P_0402_50V8J
ITE3
PAD 1 @ @
ITE4
1
PAD 1 @ 2N7002KW_SOT323-3 S 2 QE3 D
ITE5
3
EC_RTCRST#_ON 2
+3VL G
RE95 1 2 100K_0402_5% EC_ON EC_KSI7 PAD 1 @ IT8227E-192CX_LQFP128_14X14 EC_AGND S 2N7002KW_SOT323-3

ITE6
3
1
MIRROR@ EC_KSI6 PAD 1 @
ITE7 PECI_EC
WRST# PAD 1 @ CE15 1 2 47P_0402_50V8J EMC_NS@ RE50
ITE8
RE36 1 @ 2 10K_0402_5% BKOFF# 10K_0402_5%
BATT_TEMP CE16 1 2 100P_0402_50V8J EMC_NS@
RE38 2 1 100K_0402_5% LID_SW# For factory C flash +3VL
2
ACIN# CE17 1 2 100P_0402_50V8J EMC_NS@
same net name with PCH ON/OFF CE18 1 2 1U_0402_6.3V6K EMC_NS@ +3VS
1
EC_SPI_CS0# RE45 1 @ 2 0_0402_5%
RE40 1 2 100K_0402_5% BKOFF# SPI_CS0#_R 18 RE42
EC_SPI_SI RE47 2 @1 0_0402_5% 100K_0402_5% +3VALW_R
SPI_SI_C 18,55 1
A CE19 A
EC_SPI_SO RE48 2 @1 0_0402_5% NOVO# CE48 1 2 .01U_0402_16V7-K @ .1U_0402_10V6-K @
SPI_SO_C 18,55
1
ACIN# RE94 1 2 0_0402_5%
EC_SPI_CLK RE49 2 PM_SLP_S3# 1 2 .01U_0402_16V7-K 2 ACIN 67
+3VALW_R @1 0_0402_5% CE29 @ RE5
SPI_CLK_PCH_C 18,55 10K_0402_5%
PM_SLP_S4# CE135 1 2 .01U_0402_16V7-K @
GPG2 RE44 2 1 10K_0402_5%
2
MIRROR@ LAN_WAKE#
LAN_WAKE# 47,56
GPG2 RE46 2 1 10K_0402_5%
NOMIRROR@ EC_SPI_CS0# CE20 1 2 .01U_0402_16V7-K @
when mirror, GPG2 pull high EC_SPI_SI Security Classification LC Future Center Secret Data Title
CE21 1 2 .01U_0402_16V7-K @
when no mirror, GPG2 pull low EC_SPI_SO CE22 1 2 .01U_0402_16V7-K @
Issued Date 2018/08/02 Deciphered Date 2018/08/02 ITE8371LQFP
EC_SPI_CLK THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
CE23 1 2 .01U_0402_16V7-K @ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
+3VALW_AG AVCC3.3V_AG
KSI[0..7] +3VALW_AG AVCC3.3V_AG
55 KSI[0..7]
KSO[0..17] +3VALW_AG LI24 1 2 HCB1608KF-181T20
55 KSO[0..17]
1 1 AG@
0.1U_0402_10V7K
0.1U_0402_10V7K
CI13
CI14
1000P_0402_50V7K
1 1
0.1U_0402_10V7K
1
CI15
CI17
RI14
1.5K_0402_5% AG@ 2 AG@ 2
@ AG@ 2 AG@ 2 +3VALW_AG
m
2
@
USB20_P9_AGKB UI22 RI42 1 2 0_0603_5%
D D
co
IT8176FN-56A-BX_QFN48_6X6 RI40 1 2 AG_SMCLK
17
18
32
7
8
1 5K Reserve for USB 2.2K_0402_5%
+3VALW_AG slave mode use
VCOREB2
VCOREB
VSTBY33_1
VSTBY33_2
AVCC33
DI44 AG_AGND RI41 1 2 AG_SMDAT
1 2 2.2K_0402_5%
k.
RB751V-40_SOD323-2 RI39 1 2 AGKB_INT
AG@ 1 2.2K_0402_5%
oc
SMCLK0/PWM0/GPA0 2 CAPS_LED# 52,55 +3VALW_AG
2 1 10K_0402_5% AG_WRST# SMDAT0/PWM1/GPA1 3 AG_SMCLK NUM_LED# 52,55
RI15
AG@ SMCLK1/PWM2/GPA2 4 AG_SMDAT
SMDAT1/PWM3/GPA3
1
nl
CI18 PAD 1 @ 1 1
0.1U_0402_10V7K
0.1U_0402_10V7K
TI8
CI19
CI20
1U_0402_6.3V6K
AG@
2
u
48 AG@ 2 AG@ 2
WRST#
st
5
PWM5/GPA5 47 SYSTEM_STATUS2 52
LI23
19 USB20_N9
USB20_N9 1 2 USB20_N9_AGKB
IT8176FN-56A/BX PWM4/GPA4 LED_KB_PWM 55
fa
1 2 +3VALW_AG
QFN48
USB20_P9 4 3 USB20_P9_AGKB
19 USB20_P9 4 3 19
s-
EXC24CH900U_4P 20 DM
DP
AG@
m
RI16 1 @ 2 0_0402_5%
2
G
RI17 1 @ 2 0_0402_5% 45
C FN_KEY 52 C
TXD/GPA7 46
ru
KSI0 37 RXD/GPA6 SYSTEM_STATUS1 52
KSI1 38 KSI0/ADC16/STB#/GPD0 AG_SMCLK 1 6 EC_SMB_CK0
S
KSI1/ADC17/AFD#/GPD1 EC_SMB_CK0 43,52,54,60,72
D
KSI2 39
5
KSI2/ADC18/INIT#/GPD2
.fo
KSI3 40
G
KSI4 41 KSI3/ADC19/SLIN#/GPD3 QI20A
KSI5 42 KSI4/ADC20/GPD4 2N7002KDWH_SOT363-6
KSI6 43 KSI5/ADC21/GPD5
KSI7 44 KSI6/ADC22/GPD6 AG_SMDAT 4 3 EC_SMB_DA0
S
w
KSI7/ADC23/GPD7 EC_SMB_DA0 43,52,54,60,72
D
KSO0 9 34 KB_BL_CONFIG
KSO1 10 KSO0/PD0/GPE0 ADC0/GPC0 35 RI38 1 2 0_0402_5% QI20B 2N7002KDWH
w
KSO1/PD1/GPE1 ADC1/GPC1 F2_KEY 20
KSO2 11 36 2N7002KDWH_SOT363-6 Vth= min 1V, max 2.5V
KSO2/PD2/GPE2 ADC2/GPC2 AGKB_INT 52
KSO3 12 ESD 2KV
KSO4 13 KSO3/PD3/GPE3
SYST M_STATUS1 SYST M_STATUS
w
KSO7/PD7/GPE7 L L S5
KSO8 22
KSO9 23 KSO8/ACK#/GPF0
KSO10 24 KSO9/BUSY/GPF1
KSO10/PE/GPF2 L H S3
KSI7 PAD 1 @ KSO11 25 FW u date change art number SA000081L 0
KSI6 1 ITI8 KSO12 26 KSO11/ERR#/GPF3
PAD @
ITI7 KSO13 27 KSO12/SLCT/GPF4
KSO13/GPF5 H L S0
KSO17 1 @ TI12 KSO14 28
KSO15 29 KSO14/GPF6
KSO16 30 KSO15/GPF7
KSO17 31 KSO16/SMCLK2/GPG0
KSO17/SMDAT2/GPG1
AVSS
VSS1
VSS2
PAD
B B
6
21
33
49
AG@ +3VALW
2
RI18
AG_AGND 0_0603_5%
KSI0
1
KSI1 +3VALW_AG +3VALW_AG
KSI2 RI19
KSI3 +3VALW_IN 1 2
2
KSI4 @
KSI5 RI21 0_0603_5%
10U_0603_25V6-M
KSI6 10K_0402_5% 1
2
KSI7 KB_BL_C NFIG KB Backlight RGB@ CI21
RI20
1
KB_BL_CONFIG UI23 AG@ 100K_0402_5%

33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
1 1 1 1 1 1 1 1
5 1 2
L non-RGB
CI24
CI26
CI28
CI29
CI30
CI23
CI25
CI27
@
2
IN OUT
1
RI22 2
AG@ 2 AG@ 2 AG@ 2 AG@ 2 AG@ 2 AG@ 2 AG@ 2 AG@ 2 GND
H RGB 10K_0402_5%
4 3 AGKB_PWR_OCB
52,54 AGKB_PWR_EN# ENB OCB
BL@
1
0.1U_0402_10V7K
CI22
SY6288D20AAC_SOT23-5
AG@
AG@ 2
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 Anti-ghost KB

Custom 1.0
Date: Monday, February 17, 2020 Sheet 53 of 83
5 4 3 2 1
5 4 3 2 1
+3VALW_RGB
2
G
+3VALW_RGB
D RGB_SMCLK 6 1 EC_SMB_CK0 D
EC_SMB_CK0 43,52,53,60,72
S
@
D
5
G
+5VS +5VS_KLED QI21A
2N7002KDWH_SOT363-6
RI96 1 RGB@ 2 4.7K_0402_5% RGB_KB_INT @ RGB@
RI72 1 2 0_0805_5% CI70 1 2 22U_10V_M_X5R_0603 RGB_SMDAT 3 4 EC_SMB_DA0
EC_SMB_DA0 43,52,53,60,72
S
RI286 1 @ 2 2.2K_0402_5% RGB_SMCLK
D
@
CI601 2 QI21B 2N7002KDWH
RI287 1 @ 2 2.2K_0402_5% RGB_SMDAT @ 1U_0603_25V6M 2N7002KDWH_SOT363-6 Vth= min 1V, max 2.5V
ESD 2KV
150P_25V_J_COG_0201
150P_25V_J_COG_0201
CI611 2 @
2 2 @ 470P_0402_50V7K RI326 1 2 0_0402_5%
@
RI327 1 2 0_0402_5%
om
1 1
CI76
CI77
08/ 1
@ @
.c
k
+3VALW +3VALW_RGB
oc
2
@
+5VS_KLED RI283
0_0603_5%
l
JRGB1
un
@
1
22 RI284 1 2 0_0603_5%
GND2 21
GND1 20
10U_0603_25V6-M
20 19 1
2
19 18 CI74
18 17 RI285
C 17 16 LI96 UI130 @ 100K_0402_5% C
st
16 15 USB20_N7 1 2 USB20_N7_RGB +3VALW_IN_R 5 1 2 @
15 19 USB20_N7 1 2 IN OUT
14
1
14 13 2
13 12 RGB_SMCLK USB20_P7 4 3 USB20_P7_RGB GND
12 RGB_SMDAT 19 USB20_P7 4 3 RGBKB_PWR_OCB
11 4 3
11 52,53 AGKB_PWR_EN# ENB OCB
fa
10 RGB_KB_INT EXC24CH900U_4P
10 CODEC_I2C_SCL RGB_KB_INT 14,52
9 EMC_NS@ 1
0.1U_0402_10V7K
9 8 CODEC_I2C_SDA CODEC_I2C_SCL 58
@ SY6288D20AAC_SOT23-5
CI75
8 7 CODEC_I2C_SDA 58 1 2 0_0402_5%
RI79 @
7 6 USB20_N7_RGB @
6 5 USB20_P7_RGB RI80 1 2 0_0402_5% @ 2
s-
5 4
4 3 +3VALW_RGB
3 2
2 1
1 need confirm if another GPI
yong 07/
m
ME@
HIGHS_FC5AF201-1151H
ru
.fo
w
w
w
B B
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 RGB KB

D 1.0
Date: Monday, January 20, 2020 Sheet 54 of 83
5 4 3 2 1
5 4 3 2 1
ON/OFF switch +3VL K/B Connector

HIGHSTAR_FC8AF341-3201H LED_KB_C
No function field
2
35 34
RI282 36 GND1 34 33 KSI[0..7]
+3VALW GND2 33 32 FNlock_R_LED# 1 2 0_0402_5% FNlock_LED# KSI[0..7] 53 1
100K_0402_5% RI54
RI95 1 2 0_0402_5% 32 31 PWR_FnLK_LED# KSO[0..17] D
Charger LED 31 30
+3VS KSO[0..17] 53
53 LED_KB_PWM
2 QI14
1
DI15 30 29 NUM_R_LED# RI291 1 2 0_0402_5% KSO16 1 @ TI11 G PJA138K_SOT23-3
@ LED301 NUM_LED# 52,53
NOVO# 2 29 28 KSO17 BL@
52 NOVO# S
2
28 27 KSO16
1 NOVO_BTN# BATT_LOW_LED# 4 3 RI97 1 21/16W_82_1%_0402 27 26 KSI1 RI55 3
52 BATT_LOW_LED# 26 25 KSI7 MC request 100K_0402_5%
ON/OFF 1 2 RI85 3 25 24 KSI6 08/ BL@
24 23 KSO9 DI23 AZ5725-01F.R7GR_DFN1006P2X2
0_0402_5%
1
BAT54CW_SOT323-3 BATT_CHG_LED# 1 2 RI325 1 21/16W_82_1%_0402 23 22 KSI4
@ 52 BATT_CHG_LED# 22 21 KSI5 1 2 EMC@ CAPS_R_LED#
@ 1 1 1 21 1 2
CI73 20 KSO0
J2 1 2 @ +3VL CI71 CI72 B2972UDBS05P-000114_AMBER-WHITE .1U_0402_10V6-K 20 19 KSI2
220P_0402_50V7K @ 19 18 KSI3 CI107 1 2 0.1U_25V_K_X5R_0402
220P_0402_50V7K 18
SHORT PADS EMC_NS@ 2 2 EMC_NS@ 2 17 KSO5 EMC_NS@
17
2
16 KSO1 DI35 AZ5725-01F.R7GR_DFN1006P2X2
D J3 1 2 @ RI111 16 15 KSI0 D
100K_0402_5% 15 14 KSO2 1 2 EMC@ NUM_R_LED#
SHORT PADS 14 13 KSO4 1 2
13 12 KSO7
1
12 11 KSO8 CI108 1 2 0.1U_25V_K_X5R_0402 +5VS
ON/OFFBTN# RI119 1 2 0_0402_5% ON/OFF 11 10 KSO6 EMC_NS@
0.5A JKBL1
ON/OFF 52 10 9 1
KSO3 DI102 AZ5725-01F.R7GR_DFN1006P2X2
9 8 KSO12 @ LED_KB_C 2 1
@
8 7 KSO13 1 2 EMC@ FNlock_R_LED# RI57 1 2 0_0603_5% LED_Power_C1 3 2
7 6 KSO14 1 2 4 3
6 5 KSO11 4
0.1U_0402_10V6K
5 4 KSO10 CI109 1 2 0.1U_25V_K_X5R_0402 5
CI55
4 2 GND1
3 KSO15 08/1 add EMC_NS@ 6
BATT_LOW_LED# 3 2 CAPS_R_LED# RI290 1 2 0_0402_5% +3VS GND2
2 1 PWR_CAPS_LED CAPS_LED# 52,53 @ HIGHS_FC1AF040-1201H
BATT_CHG_LED# 1 +3VS 1
ME@
MC request JKB1
1
om
ON/OFFBTN# 08/ ME@ @
RI323
need confirm in 1 470_0603_5%
1
yong 07/
1
SW5
1
2
DI1 DI13 DI14 FNlock_LED#
1
1
1
0.1U_25V_K_X5R_0402 AZ5725-01F.R7GR_DFN1006P2X2 EMC_NS@
1
CI110 EMC_NS@ QI23 D 1
15@ EMC_NS@ PCH_FNLK 2 EMC_NS@
2 20,52 PCH_FNLK
2
.c
G CI106
2
1000P_0402_50V_X7R_0402
2
2
EMC_NS@ 2
S 2N7002KW_SOT323-3
3
2
2
RI324
100K_0402_5%
2
ck
1
T4BJB16BQR_4P
change PN
P00 L
only for 15 17--SB
yong 07/31
o
+5VALW
+5VALW
nl
+3VS TP_PWR PWR LED
1
1 15@
LED2 RI318
RI56 1 2 0_0402_5% CI57 15@ 470_0603_5%
u
1U_0402_10V6K PWR_LED_PWM_B_OUT RI292 1 2 1.8K_0402_1% 3 -
2 B @
.1U_0402_10V6-K
2
15@ PWR_LED_PWM_R_OUT
1
C UI1 PWR_LED_PWM_G_OUT RI293 1 2 2.2K_0402_5% 2 - + 4 C
+5VALW
st
1
16 G QI3 D 1
Vcc 4 PWR_LED_PWM_B_MUX 15@ PWR_LED_PWM_R_MUX 2 EMC_NS@
RI62 1 2 1K_0201_5% PCH_TP_CLK 2 2 1A 7 PWR_LED_PWM_G_MUX PWR_LED_PWM_R_OUT RI294 1 2 1K_0402_1% 1 - G CI103
CI52
+3VS PCH_TP_DATA 52 PWR_LED_PWM_B 1B1 2A PWR_LED_PWM_R_MUX

RI63 1 2 1K_0201_5% 3 9 R 1000P_0402_50V_X7R_0402
1B2 3A
2
5 12 2
S 2N7002KW_SOT323-3
52 PWR_LED_PWM_G
3
2B1 4A
fa
6 LED LTST-C19HEGBW-KN RED/GREEN/BLUE RI319
11 2B2 15 100K_0402_5%
52 PWR_LED_PWM_R 3B1 OE
10 1
3B2 S PWR_LED_SEL 52
14
1
4B1
2
13 8
4B2 GND 17 RI295
s-
T-PAD 100K_0402_5%
CBT3257ABQ_DHVQFN16_2P5X3P5
1
m
Status S
150P_25V_J_COG_0201
150P_25V_J_COG_0201
PCH_TP_CLK
Blue L L
CI53
CI54
PCH_TP_DATA
1 1
TP/B Connector White L H
1
TP_PWR +5VALW
ru
JTP1 FF H +5VALW
1
2 2 10 USB3.1 PORT x1
DI36 DI37 9 GND2
1
GND1
1
8 RI314 Low Active 1.8A
PCH_TP_CLK 8
2
7 470_0603_5% RI316 +5VALW +USB_VCCB
.fo
20 PCH_TP_CLK PCH_TP_DATA 6 7 PWR_LED_PWM_B_OUT PWR_LED_PWM_G_OUT PWR_LED_PWM_R_OUT 470_0603_5%
2
20 PCH_TP_DATA 6
5 @ UI2
2
EMC_NS@ EMC_NS@ 1 @ 2 0_0402_5% 4 5 PWR_LED_PWM_B_OUT 5 1
+3VL RI77 @
2
LID_SW# 4 PWR_LED_PWM_G_OUT IN OUT
For EMC RI78 1 @ 2 0_0402_5% 3
1
RI61 1 2@ 0_0201_5% 2 3 QI1 D 2
20 PCH_TP_INT 2 GND
1
1 PWR_LED_PWM_B_MUX 2 QI2 D
52 EC_TP_ON 1 1 1 2
G EMC_NS@ PWR_LED_PWM_G_MUX 2 EMC_NS@ CI50 4 3 USB_OC1#
1
2
1
ENB OCB USB_OC1# 19
w
ME@ CI104 G CI105 1U_0402_16V6K
10K_0201_5%
2
HIGHS_FC5AF081-2931H 1000P_0402_50V_X7R_0402
S 2N7002KW_SOT323-3 1000P_0402_50V_X7R_0402 G517E2T11U_SOT23-5
RI51
1
1
2
@ RI50 DI103 DI104 DI105 RI315 2 2
S 2N7002KW_SOT323-3 1 CI51
3
10K_0201_5% AZ5725-01F.R7GR_DFN1006P2X2 AZ5725-01F.R7GR_DFN1006P2X2 AZ5725-01F.R7GR_DFN1006P2X2 100K_0402_5% RI317 1000P_0402_50V7K
EMC_NS@ EMC_NS@ EMC_NS@ 100K_0402_5% @
1
w 2
1
USB_ON#
2
2
50,52 USB_ON#
1
2
2
2
+3VS +3VS
w
B B
+3VALW +3VALW_TPM
system LED +3VALW
RM1 for 17" USB board

1 2 for 15" USB board +USB_VCCB +USB_VCCB
1
0.01_0603_1% CI56
1U_0402_10V6K +3VALW
TPM@
0.1U_6.3V_K_X5R_0201
10U_0603_6.3V6M
0.1U_6.3V_K_X5R_0201
0.1U_6.3V_K_X5R_0201
2 2 2 2 JIO1 modify by david 0 / JIO2

2
CM3 TPM@
CM2
CM1 TPM@
CM4
UI4 1 1
1 5 2 1 2 1
52 SYS_LED Y1 Vcc 2
1
PWR_LED_PWM_B 3 3 3 2
1 1 1 1@ Y0 4 SYS_LED_MUX RI321 4 3 4 3
@ Z 470_0603_5% 5 4 5 4
2 6 USB20_P2 6 5 USB20_P2 6 5
GND S SUSP# 47,52,62,69,71 USB20_N2 6 19 USB20_P2 USB20_N2 6
7 7
2
SYS_LED_MUX_CONN 7 19 USB20_N2 7
8 8
74LVC1G3157GW_SOT363-6 USB30_RX_N2 9 8 USB30_RX_N2 9 8
15,55 USB30_RX_N2 9 15,55 USB30_RX_N2 9
1
QI22 D USB30_RX_P2 10 USB30_RX_P2 10
SYS_LED_MUX 2 15,55 USB30_RX_P2 11 10 15,55 USB30_RX_P2 11 10
+3VALW_TPM G USB30_TX_N2 12 11 USB30_TX_N2 12 11
15,55 USB30_TX_N2 USB30_TX_P2 12 15,55 USB30_TX_N2 USB30_TX_P2 12
13 13
15,55 USB30_TX_P2 15,55 USB30_TX_P2
2
S 2N7002KW_SOT323-3 14 13 14 13
3
RI322 SYS_LED_MUX_CONN 15 14 SYS_LED_MUX_CONN 15 14
S z 100K_0402_5% 16 15 16 15
+3VALW 16 +3VALW 16
H Y1 17 17
+3VALW_TPM LID_SW# 18 17 LID_SW# 18 17
52,55 LID_SW# 52,55 LID_SW#
1
NOVO_BTN# 19 18 NOVO_BTN# 19 18
L Y0 19 19
2
20 20
+3VL +3VL
2
RM3 RM4 21 20 21 20
RM2 10K_0402_5% RM12 10K_0402_5% NT_REMOTE1+ 22 21 NT_REMOTE1+ 22 21
22
UM1 60 NT_REMOTE1+ 22
8
10K_0402_5% TPM@ 0_0402_5% @ NT_REMOTE1- 23 NT_REMOTE1- 23 22

60 NT_REMOTE1- 24 23 for Card 24 23
TPM@ @
VHIO2
VHIO1
VSB
1
24 PCIE_PTX_DRX_N16 1
RW1 17@ PCIE_PTX_C_DRX_N16
20.1U_6.3V_K_X5R_0201 25 24
1
2 1 0_0402_5% TPM_IRQ# 18 2 25 14 PCIE_PTX_DRX_N16 PCIE_PTX_DRX_P16 1 PCIE_PTX_C_DRX_P16 26

20.1U_6.3V_K_X5R_0201 25
RM9 TPM@ RW2 17@
15 TPM_SPI_IRQ# PIRQ#/GPIO2 NC1 3 GND1 14 PCIE_PTX_DRX_P16 27 26
NC2 4 26 PCIE_PRX_DTX_P16 28 27
2 1 49.9_0402_1% TPM_MOSI 21 PP/GPIO6 5 GND2 14 PCIE_PRX_DTX_P16 PCIE_PRX_DTX_N16 29 28
RM5 TPM@
18,52 SPI_SI_C TPM_MISOI 24 MOSI/GPIO7 NC3 9 14 PCIE_PRX_DTX_N16 29
RM6 2 1 49.9_0402_1% TPM@ 30
18,52 SPI_SO_C MISO NC5 10 CLK_PCIE_CARD 31 30
ELCO_046809624210846+
NC6 11 17 CLK_PCIE_CARD CLK_PCIE_CARD# 32 31
NC7 ME@ 17 CLK_PCIE_CARD# 32
12 33
RM7 2 1 0_0402_5% TPM@ TPM_CS2# 20 NC8 13 PLT_RST# 34 33
18 SPI_CS2# SCS#/GPIO5 GPIO4 14 18,28,46,47,52,55,56 PLT_RST# CARD_CLKREQ# 34
35
18,52 SPI_CLK_PCH_C
RM8 2 1 49.9_0402_1% TPM@ TPM_CLK 19
SCLK NPCT750LABYX_QFN32_5X5
NC9
NC10
15
16
MIC board +5VALW 08 17 CARD_CLKREQ# 36
37
35
36
A PLT_RST# 17 GND1 25 38 37 A
PLTRST# NC11 26 39 38 41
6
GPIO3
NC12
NC13
27
28
17" Power DB +3VS
+3VS_SD 40 39 GND1
40 GND2
42
TPM_PP 7
NC4
NC14
NC15
31 Conn
1
32 +3VS JMIC1 ELCO_046809640410846+

NC16
29 RM10 1 @ 2 0_0402_5% GND1
5
del LID RI76
0_0402_5%
ME@
PLT_RST# 18,28,46,47,52,55,56
1
SDA/GPIo0
SCL/GPIO1
30 1
1 yong 0619
GND2
GND3
RM11 DMIC_DATA_R 2
2
58 DMIC_DATA_R DMIC_CLK_R 2
0_0402_5% 3
58 DMIC_CLK_R 4 3
@ JPWR1
DMIC_DATA_R 4 1
23
33
2
TPM@ 6 ON/OFFBTN# RI74 2 1 0_0402_5% 2 1

DMIC_CLK_R GND2 PWR_LED_PWM_B_OUT RI75 2 1 0_0402_5% 3 2
PWR_LED_PWM_G_OUT RI296 3
100P 25V J NPO 0201
100P 25V J NPO 0201
HIGHS_FC5AF041-2931H 2 1 0_0402_5% 4
PWR_LED_PWM_R_OUT RI297 4
EMC_NS@
EMC_NS@
1 1 ME@ 2 1 0_0402_5% 5 7 Title

5 GND1 Security Classification LC Future Center Secret Data
CA51
CA52
6 8
6 GND2
Issued Date 2018/08/02 Deciphered Date 2018/08/02 KBD/PWR/IO/LED/TP Conn.
2 2 ELCO_04-6811-606-090-846+
MC request ME@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
08/ 1 D 1.0
Date: Tuesday, March 03, 2020 Sheet 55 of 83
5 4 3 2 1
5 4 3 2 1
+3VALW TO +3VALW_LAN
+3VALW_LAN rising time (10%~90%):
+3VALW +3VALW_LAN
0.5ms＜spec＜100ms +3VALW_LAN +LAN_VDDREG
Need short
@
JL1 1 2 @ width : 40 mils RL1 1 2 0_0603_5%
D 1 2 D
JUMP_43X79
4.7U_0402_6.3V6M
0.1U_6.3V_K_X5R_0201
CL1
CL2
1 1
+3VALW
0.01U_6.3V_K_X7R_0201
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
0.1U_6.3V_K_X5R_0201
0.1U_6.3V_K_X5R_0201
LP2301ALT1G_SOT23-3
CL4
CL5
1 1 1 1
8111GUL@
8111GUL@
S
D
QL2 3 1 @
1
2 2
0.1U_6.3V_K_X5R_0201
CL6
CL7
CL9
RL2 1 1 @ @
100K_0402_5% 2 2 2 2
G
2
CL8
@ @
@
2
2 2
RL3 1 @ 2 47K_0402_5%
20 LAN_PWR_ON#
Close to Pin11 Close to Pin32 Close to Pin11 Close to Pin32
+3VALW_LAN
+3VALW_LAN +3VS
2 RL5
10K_0402_5% manual change the PN to RTL8111GUL-CG
2
@
2
RL4
G
UL1
10K_0402_5%
1
om
RL7 1 @ 2 0_0402_5% PCIE_WAKE#_R @ QL1
16,47,52 PCIE_WAKE#
RL6 1 2@ 0_0402_5% L2N7002KWT1G_SOT323-3
47,52 LAN_WAKE#
1
LAN_CLKREQ#_R 1 3
LAN_CLKREQ# 17
S
@
33
+3VALW_LAN 32 GND 16 CLK_PCIE_LAN# @
CLK_PCIE_LAN# 17
.c
RL8 1 2 RSET 31 AVDD33_2 REFCLK_N 15 CLK_PCIE_LAN RL18 1 2 0_0402_5%
+LAN_VDD10 RSET REFCLK_P PCIE_PTX_C_DRX_N15 CLK_PCIE_LAN 17
C 2.49K_0402_1% 30 14 C
LAN_XTALO 29 AVDD10 HSIN 13 PCIE_PTX_C_DRX_P15 PCIE_PTX_C_DRX_N15 14
LAN_XTALI CKXTAL2 HSIP LAN_CLKREQ#_R PCIE_PTX_C_DRX_P15 14
28 12
k
+3VS RL12 TPL1 @ 1 Test_Point_12MIL 27 CKXTAL1 CLKREQB 11 +3VALW_LAN
LAN_PWR_ON# 1 2 LAN_DISABLE# 26 LED0 AVDD33_1 10 LAN_MDI3-
LED1/GPO MDIN3 LAN_MDI3+ LAN_MDI3- 57
oc
0_0402_5% TPL2 @ 1 Test_Point_12MIL 25 9
LAN_MDI3+ 57
1
@ +LAN_REGOUT 24 LED2 MDIP3 8 +LAN_VDD10

RL9 +LAN_VDDREG 23 REGOUT AVDD10_2 7 LAN_MDI2-
+LAN_VDD10 VDDREG MDIN2 LAN_MDI2+ LAN_MDI2- 57
1K_0402_1% 22 6
PCIE_WAKE#_R 21 DVDD10 MDIP2 5 LAN_MDI1- LAN_MDI2+ 57
LANWAKEB MDIN1 LAN_MDI1+ LAN_MDI1- 57
ISOLATE# 20 4
nl
2
PLT_RST# 19 ISOLATEB MDIP1 3 +LAN_VDD10 LAN_MDI1+ 57

18,28,46,47,52,55 PLT_RST# PCIE_PRX_C_DTX_N15 18 PERSTB AVDD10_1 LAN_MDI0-
14 PCIE_PRX_DTX_N15 CL10 1 2 0.1U_6.3V_K_X5R_0201 2 2018/01/24: add AZ5815-01F.R7GR for
LAN_PWR_ON# PCIE_PRX_C_DTX_P15 17 HSON MDIN0 LAN_MDI0+ LAN_MDI0- 57
ISOLATE# RL10 1 @ 2 CL11 1 2 0.1U_6.3V_K_X5R_0201 1
14 PCIE_PRX_DTX_P15 HSOP MDIP0 LAN_MDI0+ 57 RTL8111H Lan Surge issue (Default reserve)
u
0_0402_5%
1
lace close to M +LAN_VDD10
st
RL11
15K_0402_5%
@
1
2
fa
DL4
1
RTL8111H-CG_QFN32_4X4
AZ5815-01FPR7GR_DFN1006P2E-2
@
2
s-
2
For RTL8111GUL(SWR mode)
m
For RTL8111H (LDO mode)
+LAN_VDD10
ru
LL1 1 2 8111GUL@
2.2UH_NLC252018T-2R2J-N_5%
LAN_XTALI
+LAN_REGOUT RL13 1 2 8111H@
B B
.fo
@ 0_0805_5%
LAN_XTALO_R RL19 1 2 0_0402_5% LAN_XTALO 1 1
0.1U_6.3V_K_X5R_0201
1U_6.3V_M_X5R_0201
0.1U_6.3V_K_X5R_0201
0.1U_6.3V_K_X5R_0201
0.1U_6.3V_K_X5R_0201
0.1U_6.3V_K_X5R_0201
1
YL1 CL3 CL15 CL16 1 1 1 1 1 1
0.1U_6.3V_K_X5R_0201 4.7U_0402_6.3V6M 0.1U_6.3V_K_X5R_0201
2 2 8111GUL@
CL19
CL21
CL17
CL18
CL20
CL22
1 4 8111H@ 8111GUL@
w
OSC1 GND2 2
2 3 2 2 2 2 2 2
GND1 OSC2 @ @
w
1 1
25MHZ_10PF_7V25000014 Layout Note: LL1 must be
CL12 CL13
10P_0402_50V8J 12P_0402_50V8-J within 200mil to Pin24,
2 2
w
CL15,CL16 must be within

200mil to LL1 Close to Pin3, 8, 22, 30 Close to Pin22(Reserved)
+LAN_REGOUT: Width =60mil
A A
Issued Date 2019/02/13 Deciphered Date 2019/02/13 LAN_RTL8111GUL_H

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
TL1
DL1/DL2 1:1 24 LAN_MDO3-
1'S PN:SC300005900 56 LAN_MDI3-
LAN_MDI3- 1
TD1+
T1/B MX1+
Place Close to TL1 LAN_MDO3+

23
MX1-
LAN_MDI3+ 2
56 LAN_MDI3+ TD1-
TDCT 3 22
TCT1 T1/A MCT1
D D
4 21
TCT2 1:1 MCT2 20 LAN_MDO2-
DL1 T1/B
LAN_MDI3- 4 3 LAN_MDI2- LAN_MDI2- 5 MX2+
I/O3 I/O2 56 LAN_MDI2- TD2+
5 2 19 LAN_MDO2+
VDD GND LAN_MDI2+ 6 MX2-
56 LAN_MDI2+ TD2-
LAN_MDI3+ 6 1 LAN_MDI2+ T1/A

I/O4 I/O1
AZ1215-04S.R7G_SOT23-6L-6 1:1 18 LAN_MDO1-
LAN_MDI1- 7 T1/B MX3+
EMC_8111H@ 56 LAN_MDI1- TD3+
17 LAN_MDO1+
MX3-
LAN_MDI1+ 8
56 LAN_MDI1+ TD3-
9 16
TCT3 T1/A MCT3
DL2
LAN_MDI1- 4 3 LAN_MDI0- 10 15
I/O3 I/O2 TCT4 1:1 MCT4 LAN_MDO0-
T1/B 14
LAN_MDI0- 11 MX4+
56 LAN_MDI0- TD4+
5 2 2
VDD GND
m
CL24 13 LAN_MDO0+
LAN_MDI0+ 12 MX4-
0.01U_0201_25V6-K 56 LAN_MDI0+ TD4-
LAN_MDI1+ 6 1 LAN_MDI0+ 1
I/O4 I/O1 EMC@
o
AZ1215-04S.R7G_SOT23-6L-6 T1/A
EMC_8111H@
.c
BOTH_NA0069R-LF
C C
1
ck
RL17
20_0603_5%
1
DL3
1
2
BS4200N-C-LV_SMB-F2
lo
EMC@
2
2
un
1 1
st
CL32 CL25
68P_0402_50V8J 1000P_1206_2KV7-K
EMC@ EMC_NS@
2 2
fa
s-
CHASSIS1_GND
m
JRJ45
B
ru LAN_MDO3-
LAN_MDO3+
8
BI_DD-
B
.fo
7
BI_DD+
LAN_MDO1- 6
RL14 1 2@ 0_0402_5% RX_DB-
LAN_MDO2- 5
RL15 1 2@ 0_0402_5% BI_DC-
w
LAN_MDO2+ 4
RL16 1 2@ 0_0402_5% BI_DC+
LAN_MDO1+ 3
RL24 1 2@ 0_0402_5% RX_DB+
w
LAN_MDO0- 2
TX_DA-
LAN_MDO0+ 1 9
TX_DA+ GND_1
w
Reserve for MI go rural solution

CHASSIS1_GND 10
GND_2
ALLTOP_C10261-10839-L
ME@
CHASSIS1_GND
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 LAN_Transformer

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
+1.8VS
+1.8VALW
RA232 1 @ 2 0_0402_5%
PCH_HDA_BIT_CLK
16 PCH_HDA_BIT_CLK
LP2301ALT1G_SOT23-3
PCH_HDA_SYNC QA1
16 PCH_HDA_SYNC
PCH_HDA_SDOUT
D
3 1
16 PCH_HDA_SDOUT
PCH_HDA_SDIN0
1 1
16 PCH_HDA_SDIN0
CA46
0.1u_0201_10V6K
CA47
0.1u_0201_10V6K
G
2
DMIC_CLK_R 2 2
41,55 DMIC_CLK_R RA233
DMIC_DATA_R
CA7
4.7U_0402_6.3V6M
SUSP 1 2 0_0402_5% 1 1 1
41,55 DMIC_DATA_R 42,62 SUSP
CA48
0.1u_0201_10V6K
CA49
0.1u_0201_10V6K
D D
1
EC_MUTE#
52 EC_MUTE# 1 2 2 2
CA50
0.1u_0201_10V6K
RA5
BEEP# @ 470K_0402_5%
52 BEEP#
PCH_BEEP 2
16 PCH_BEEP
2
+1.8V_AUDIO
DVDD DVDD_IO +5VD +5VA
Analog power for DACs, ADCs
+5VD
Note: DVDD-I must be equal to or smaller than DVDD
0.1U_6.3V_K_X5R_0201
2.2U_0402_6.3V6M
+5VA
2 2
CA2
DVDD_IO +3VS DVDD +1.8V_AUDIO
CA1
+3VALW
+1.8VS
@ @ @ 1 1
RA3 1 2 0_0402_5% RA1 1 2 0_0402_5% RA2 1 2 0_0402_5%
18
46
41
40
20
3
UA1
0.1U_6.3V_K_X5R_0201
DVDD
DVDD-IO
PVDD2
PVDD1
AVDD1
CPVDD/AVDD2
+1.8VALW
2.2U_0402_6.3V6M
0.1U_6.3V_K_X5R_0201
10U 6.3V M X5R 0402

2 1
CA4
CA5
1 2
SPKR_MUTE#
CA3
RA6 1 @ 2 0_0402_5% 2
PDB
CA6
1 2 PCH_HDA_BIT_CLK
CD@
Rev1 1 change 14
2 1 HPOUT_L 27 BCLK
HPOUT-L 15 PCH_HDA_SYNC
HPOUT_R 26 SYNC
HPOUT-R 47 RA7 2 @ 1 100K_0402_1%
MIC2_VREFOL JD2 +3VS
28 Rev1 1 change
MIC2-VREFO-L 48 JSENSE RA8 1 2@ 0_0402_5% PLUG_IN
Close to Pin7 MIC2_VREFOR 29 JD1
MIC2-VREFO-R
Note: need to configuration 1 JD mode by verb table
1
SPDIF-OUT/GPIO2/DMIC-DATA34/DMIC-CLK-IN
4 DMIC_DATA_C RA9 1 2@ 0_0402_5% DMIC_DATA_R
RING2_CONN 30 GPIO0/DMIC-DATA12
MIC2-L/RING2 5 DMIC_CLK RA10 1 2@ 0_0402_5% DMIC_CLK_R
RING3_CONN 31 GPIO1/DMIC-CLK
+5VS +5VA MIC2-R/SLEEVE 6 CODEC_I2C_SDA_R RA234 1 2@ 0_0402_5% CODEC_I2C_SDA
+5VD PC_BEEP 34 I2C-DATA CODEC_I2C_SDA 54
@ +5VS PCBEEP 7 CODEC_I2C_SCL_R RA235 1 2@ 0_0402_5% CODEC_I2C_SCL
I2C-CLK CODEC_I2C_SCL 54
RA11 1 2 0_0402_5%
LA1 1 2 +5VA
0.1U_6.3V_K_X5R_0201
1U_0402_6.3V6K
BLM15PD600SN1D_2P EMC_NS@ 8
1 2 10K_0402_5% VDD_STB 33 NC1 DVDD
m
2 2 RA12
5VSTB
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_6.3V_K_X5R_0201
CA9
@ 0.1U_6.3V_K_X5R_0201 9
1 1 2 2 NC2
CA10
CA11
CA13
CA8
CA12
RA13 1 2 0_0603_5% LINE2-R 35

C
LINE2-R 10 C
1 1@ LINE2-L 36 NC3 CODEC_I2C_SDA_R RA236 1 2 2.2K_0402_5%
2 2 1 1 LINE2-L 11
co
NC4 CODEC_I2C_SCL_R RA237 1 2 2.2K_0402_5%
12
NC5
CA14 1 2 1U_0402_6.3V6K CBP 23 45 SPK_R+

CBP SPK-OUT-R+
CBN 24 44 SPK_R-
k.
CBN SPK-OUT-R-
43 SPK_L-
SPK-OUT-L-
42 SPK_L+
2.2U_0402_6.3V6M 2 1 CA15 MIC2-CAP 32 SPK-OUT-L+
MIC2-CAP
oc
13
2.2U_0402_6.3V6M 2 1 CA16 VREF 38 DC DET/EAPD
EC_MUTE# RA16 1 2 0_0402_5% @ SPKR_MUTE# VREF
2.2U_0402_6.3V6M 1 2 CA17 LDO3-CAP19 16 SDATA_IN RA14 2 1 33_0402_5% PCH_HDA_SDIN0
LDO3-CAP SDATA-IN
Rev1 1 change 2.2U_0402_6.3V6M 1 2 CA18 LDO2-CAP21 17 PCH_HDA_SDOUT
LDO2-CAP SDATA-OUT
nl
2.2U_0402_6.3V6M 1 2 CA19 LDO1-CAP39
LDO1-CAP 25 CPVEE
CPVEE
Thermal Pad
2
CA20
1U_0402_6.3V6K
AVSS1
AVSS2
u
1
ALC3287-CG_MQFN48_6X6
st
37
22
49
Note: ower bee function is removed from BI S s ec
@
BEEP# RA17 1 @ 2 EC_BEEP_R CA211 2
4.7K_0402_5%
fa
Rev1 1 change 0.1U_6.3V_K_X5R_0201
CA22
PCH_BEEP RA18 1 2 PC_BEEP1_R 1 2 PC_BEEP
4.7K_0402_5%
1
0.1U_6.3V_K_X5R_0201
s-
RA19
10K_0402_5%
Speaker
JSPK1
@
2
SPK_R+ RA23 1 2 HCB1608KF-121T30_0603 EMC@ SPK_R+_CONN 1
m
RA21 1 2 0_0402_5% SPK_R- RA22 1 2 HCB1608KF-121T30_0603 EMC@ SPK_R-_CONN 2 1
EMC_NS@ SPK_L+ RA24 1 2 HCB1608KF-121T30_0603 EMC@ SPK_L+_CONN 3 2 5
SPK_L- RA25 1 2 HCB1608KF-121T30_0603 EMC@ SPK_L-_CONN 4 3 GND1 6
B
RA26 1 2 0_0402_5% @ 4 GND2 B
220P_25V_K_X7R_0201
220P_25V_K_X7R_0201
220P_25V_K_X7R_0201
1500P_25V_K_X7R_0201
1500P_25V_K_X7R_0201
1500P_25V_K_X7R_0201
220P_25V_K_X7R_0201
1500P_25V_K_X7R_0201
PCH_HDA_SYNC HIGHS_WS33041-S0191-HF
ru
CA29
CA27
CA30
CA28
CA26
CA23
CA24
CA25
RA27 1 2 0_0402_5% @ ME@
PCH_HDA_SDOUT DMIC_CLK_R 2 2 2 2
1 1 1 1
EMC_NS@
HDA_BITCLK_AUDIO_R 1 2 PCH_HDA_BIT_CLK DMIC_DATA_R RA29 1 2 0_0402_5%
For EMC Near CODEC
EMC@
CD@
EMC@
EMC@
CD@
EMC@
CD@
RA28 1/16W_27_5%_0402 EMC_NS@ 1 1 1 1
CD@
PCH_HDA_SDIN0 2 2 2 2
100P 25V J NPO 0201
100P 25V J NPO 0201
.fo
22P_0201_258J
EMC@
EMC_NS@
1 1
22P_0201_258J
33P_50V_J_NPO_0201
EMC_NS@
33P_50V_J_NPO_0201
CA31
CA32
1 GND GNDA
EMC_NS@
EMC_NS@
CA34
EMC_NS@
1 1 1
CA33
CA35
CA36
2 2
2 For EMC Near Conn.
2 2 2
w
Rev1 1 change
w
RING3_CONN
w
RING2_CONN
A_HP_OUTL_R
Audio Jack
A_HP_OUTR_R
PLUG_IN JHP1
RA30 0_0402_5% CA37 470P_50V_K_X7R_0201 MIC2_VREFOL RA31 2 1 2.2K_0402_5% RING2_CONN 3

2A_HP_OUTL_R_C A_HP_OUTL_R HPOUT_L A_HP_OUTL_R G/M
1 @ 1 2 @ RA32 1 2 56_0402_5% 1
L
1
1
1
1
PLUG_IN
47P_25V_J_NPO_0201
LINE2-L CA38 1 @ 2 1U_0402_6.3V6K 5

5
EMC_NS@
1 DA7 DA3 DA4 DA5 DA6

1
1
1
1
1
CA39
LINE2-R CA40 1 @ 2 1U_0402_6.3V6K 6

6
EMC@
EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
CA41 HPOUT_R RA34 1 2 56_0402_5% A_HP_OUTR_R 2

2 RA35 0_0402_5% 470P_50V_K_X7R_0201 R
2A_HP_OUTR_R_C A_HP_OUTR_R MIC2_VREFOR RING3_CONN
2
2
2
2
1 @ 1 2 @ RA36 2 1 2.2K_0402_5% 4
M/G
2
2
2
2
100P 25V J NPO 0201

100P 25V J NPO 0201
100P 25V J NPO 0201
100P 25V J NPO 0201

7
CA44
CA43
CA42
CA45
MS
1 2 1 1
RIYUE-3F137-01J02
ME@
For EMI
EMC@
EMC@
2@ 1@ 2 2
Rev1 1 change
A A
Issued Date 2018/03/15 Deciphered Date 2019/03/14 Codec ALC3287

Custom 1.0
5 4 3 2 1
5 4 3 2 1
D D
+3VS +3VS_GS
@
RS1 1 2 0_0402_5%
APS G-Sensor
+3VS_GS
TABLE
TABLE of G-Sersor (UGSEN1)
RS2 1 GS@ 2 10K_0402_5% GSENSE_INT P/N ADDR_SEL Address
Vendor P/N LCFC P/N
ST LIS2DWLTR SA00009AQ00
H 32h (W) & 33h (R)
Kionix KX022-1020 SA000081E00 LIS2DWLTR
+3VS_GS L 30h (W) & 31h (R)
om
H 3Eh (W) & 3Fh (R)
2
RS3
KX022-1020
L 3Ch (W) & 3Dh (R)
10K_0402_5%
@
1
.c
C ADDR_SEL C
k
2
RS4
GS@
oc
0_0402_5%
1
+3VS_GS
nl 1
tu
@ RS5
0_0402_5%
s
2
US2
ADDR_SEL 1 12 EC_SMB_CK2_G RS6 1 @ 2 0_0402_5% EC_SMB_CK2
EC_SMB_DA2 EC_SMB_DA2_G SDO/SA0 SCL/SPC EC_SMB_CK2 16,28,52,60
fa
RS7 1 @ 2 0_0402_5% 2 11
16,28,52,60 EC_SMB_DA2 +3VS_GS SDA/SDI/SDO NC
3 10
4 VDD_IO CS 9
GSENSE_INT RS8 1 @ 2 0_0402_5% GSENSE_INT_R 5 RES GND_2 8
52 GSENSE_INT INT1 GND_1
1 Test_Point_12MIL 6 7
s-
TPS1 @ INT2 VDD
1 1
US D C KSI F R INT need confirm LIS2DWLTR_LGA12_2X2
1 1 SA00009AQ00 GS@ CS3 CS2
GS@ 0.1U_0402_10V7K @ 100P 25V J NPO 0201
m
CS1 CS4 GS@ 2 2
100P 25V J NPO 0201 0.1U_0402_10V7K
2 2 CLOSE VDD
@
CLOSE VDDIO
B
ru B
.fo
w
w
w
A A

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
Fintek(1 Local+2 Remote) thermal sensor +3VS +3VS
placed near DIMM

REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-:
Trace width/space:10/10 mil
Trace length:<8"
2
+3VS Near CPU FAN RS17 RS18
US1 4.7K_0402_5% 4.7K_0402_5% REMOTE1+
Near GPU&VRAM REMOTE2+
Near CPU core
@ @ 1 1
1
C C
1
1 10 EC_SMB_CK2 CS5 2 QS15 CS6 2 QS16
D VCC SCL EC_SMB_CK2 16,28,52,59 B B D
3300P_0402_50V7-K MMBT3904WH_SOT323-3 3300P_0402_50V7-K MMBT3904WH_SOT323-3
1 REMOTE1+ 2 9 EC_SMB_DA2 @2 @ 2
EC_SMB_DA2 16,28,52,59
3
DP1 SDA REMOTE1- REMOTE2-
CS7 REMOTE1- 3 8 THEM_ALERT# RS13 1 2 0_0402_5%
.1U_0402_10V6-K DN1 ALERT# SMB1_ALERT# 16,52
2 THERM_L @
REMOTE2+ 4 7
@ DP2 THERM#
REMOTE2- 5 6
DN2 GND
F75303M_MSOP10
Near GPU&VRAM
Near CPU
+5VLP +5VLP +3VALW

+5VLP +3VALW
HW thermal sensor
1
2
CS12 RS29 RS36 RS19
1
0.1U_0603_25V7-M 21.5K_0402_1% 21.5K_0402_1% 13.7K_0402_1%
@ @ @ @ RS21
1
m
13.7K_0402_1%
2
@
US18 NTC_V1_GPU
52 NTC_V1_GPU
2
1 8 TMSNS1 RS88 1 @ 2 0_0402_5% NTC_V1_GPU
1
VCC TMSNS1
co
NTC_V2_CPU
52 NTC_V2_CPU
2 7 PHYST1 RS9 1 @ 2 10K_0402_5% RTS2
GND RHYST1 @ 100K_0402_1%_TSM0B104F4251RZ
3 6 TMSNS2 RS10 1 @ 2 0_0402_5% NTC_V2_CPU
OT1 TMSNS2
C C
1
4 5 PHYST2 RS11 1 @ 2 10K_0402_5%
k.
52,68,71 EC_ON OT2 RHYST2 +3VS +3VS RTS3
G718TM1U_SOT23-8 @ 100K_0402_1%_TSM0B104F4251RZ
2
@
c
RS20
2
0_0402_5%
over temperature threshold:
lo
RSET=3*RTMH RS93 RS92
1
2.2K_0402_5% 2.2K_0402_5%
92+/-30C @
2
Hysteresis temperature threshold.
un
1
1
RHYST=(RSET*RTML)/(3*RTML-RSET)
56+/-30C THM_SMCLK 1 6 EC_SMB_CK0
S
EC_SMB_CK0 43,52,53,54,72
D
5
st
G
QS22A for layout optimized, change the EC_AGND to GND
2N7002KDWH_SOT363-6
THM_SMDAT EC_SMB_DA0
fa
4 3
S
EC_SMB_DA0 43,52,53,54,72
D
QS22B Near DIMM
2N7002KDWH_SOT363-6
Near VRAM high Temp side
s-
+3VALW
Nuvoton(1 Local+2 Remote) thermal sensor +3VS
NT1_REMOTE1+
m
1side placed VRAM backside
1
1
1
C RS22
+3VS CS14 2 QS17 13.7K_0402_1%
3300P_0402_50V7-K B MMBT3904WH_SOT323-3 @
ru
@ 2
2
NT1_REMOTE1-
2
2
NTC_V3_DIMM
+3VS 52 NTC_V3_DIMM
RS91 RS14
B Near PCH B
.fo
US134 4.7K_0402_5% 4.7K_0402_5%
@ @
1
1
1
1 10 THM_SMCLK RTS4
VCC SCL @ 100K_0402_1%_TSM0B104F4251RZ
1 NT_REMOTE1+ 2 9 THM_SMDAT
w
DP1 SDA
2
CS13 NT_REMOTE1- 3 8 RS15 1 2 0_0402_5% SMB1_ALERT#
.1U_0402_10V6-K DN1 ALERT#
2 NT1_REMOTE1+ @
@ 4 7
w
DP2 THERM#
2
NT1_REMOTE1- 5 6
DN2 GND RS23 RS12
w
0_0402_5% 0_0402_5%
F75303M_MSOP10 @
1
@
EC_AGND
Address 1001_101xb FAN Conn Right

FAN Conn LEFT
+5VS
+5VS JFAN2
NT_REMOTE1+ JFAN1
NT_REMOTE1- NT_REMOTE1+ 55 +5VS_FAN1 +5VS_FAN2
RS52 1 2 0_0603_5% 1 RS75 1 2 0_0603_5% 1
NT_REMOTE1- 55 2 1 2 1
@ 52 EC_FAN1_SPEED 52 EC_FAN2_SPEED
3 2 3 2 5
Thermal Diode Near GPU FAN(DB) 1 52 EC_FAN1_PWM
4 3 1 @
CS10
1 52 EC_FAN2_PWM
4 3 GND1 6
1 4 4 GND2
CS8 CS9 CS11 .1U_0402_10V6-K
A
NT_REMOTE1+/-: 10U_0805_10V6K .1U_0402_10V6-K 5 10U_0805_10V6K @ A
Trace width/space:10/10 mil 2 @
2
6 GND1
GND2
2 2 HIGHS_WS32041-S0471-HF
Trace length:<8" ME@
HIGHS_WS33040-S0351-HF
ME@
Issued Date 2018/08/02 Deciphered Date 2018/08/02 Thermal sensor/FAN CONN

C
Y550 1.0

5 4 3 2 1
5 4 3 2 1
18 SPI_WP#
1
TABLE : CPU ITP DEBUG REPORT RH597
1K_0402_1%
Individual DCI 2.0 VCCSTG
@
No use
2
Port w/o connector
R591 NO ASM NO ASM ASM

D D
2
R593 NO ASM NO ASM ASM RH93 RH55 RH910
51_0402_1% 51_0402_1% 51_0402_1%
R594 NO ASM NO ASM ASM NPI@ @ @
R595 NO ASM NO ASM ASM
1
PCH_TDO RH5961 NPI@ 2 0_0201_5% XDP_TDO PAD 1 @
R596 NO ASM NO ASM ASM 16 PCH_TDO IT9
PCH_TDI RH5941 NPI@ 2 0_0201_5% XDP_TDI PAD 1 @
R657 NO ASM NO ASM ASM 16 PCH_TDI IT10
PCH_TMS RH5931 NPI@ 2 0_0201_5% XDP_TMS PAD 1 @
R658 NO ASM NO ASM ASM 16 PCH_TMS IT11
PCH_TCK RH99 1 @ 2 0_0201_5% PCH_TCK1 PAD 1 @
16 PCH_TCK IT12
R102 NO ASM ASM NO ASM JTAGX RH5911 NPI@ 2 0_0201_5% XDP_TCK0 PAD 1 @
16 JTAGX IT13
R597 NO ASM ASM NO ASM
R9907 NO ASM ASM ASM
2
RH911
JXDP1 NO ASM ASM NO ASM 51_0402_1%
@
C70 NO ASM ASM NO ASM
1
R9909 NO ASM ASM ASM RH9061 NPI@ 2 0_0201_5% XDP_TDO
6 PROC_TDO
R9910 NO ASM ASM ASM RH9041 NPI@ 2 0_0201_5% XDP_TDI
6 PROC_TDI
R9916 NO ASM ASM ASM RH9031 NPI@ 2 0_0201_5% XDP_TMS
6 PROC_TMS
R99 NO ASM ASM ASM RH9021 NPI@ 2 0_0201_5% XDP_TCK0
6 PROC_TCK
C C
m
2
NPI@
RH900
R9930 NO ASM ASM ASM 51_0402_1%
R9931 NO ASM ASM ASM Mount RC17 to enable
co
DCI function
1
+3VALW +3VALW_PCH
R9932 NO ASM ASM ASM +3V_SPI +1.05VALW
k.
1
2
RH915 RH916 RH228 RH229
oc
LOGIC 2.2K_0402_5% 2.2K_0402_5% 1K_0402_5% 1K_0402_5%
@ @ @ @
TABLE : PCH ITP DEBUG REPORT
1
@ 1
RH2331 2 1K_0402_5% PAD @
16,52 EC_RSMRST# IT14
nl
PAD 1 @
No use Individual DCI 2.0 18 SPI_SI_XDP
PAD 1 @
IT15
16 ITP_PMODE IT16
Port w/o connector 16,52 PBTN_OUT#
PAD 1 @
IT17
PAD 1 @
16 SYS_RESET# IT18
tu
RH9071 NPI@ 2 0_0402_5% PAD 1 @
R93 NO ASM ASM NO ASM 6 CFG3 IT19
need change to 1 5K refer CRB
JXDP1 NO ASM ASM NO ASM lace within 500mil of T-connection
s
fa
s-
B R9913 NO ASM ASM NO ASM B

m 22
22 CPU_TRST#
PCH_PRDY#
RH1221 NPI@
PCH_PRDY#
2 0_0402_5% RH5951
RH6571
@
@
2 0_0402_5%
2 0_0402_5%
XDP_TRST#
XDP_PRDY#
PAD 1
PAD 1
@
@
IT20
IT21
ru
PCH_PREQ# RH6581 @ 2 0_0402_5% XDP_PREQ# PAD 1 @
G
P
P
_
BDE

8
_

O
_
R¨ g
E¨ 
B  I
O
O
T
22 PCH_PREQ# IT22
LOGIC +3VS
R
 
 D
 fP
 



 
 
 
(

(C h
DH 
 
w
f
 
 
 c
) 
〃
*
T
O

 
 
 
R 
 /
 
 
P T
 f

 
 
 

 
 
 
h 
 
PROC_TRST#
.fo
〃 6 PROC_TRST#
Ch
Tw


y


T
P


f


TABLE : Functional Strap RH9051 NPI@ 2 0_0402_5%

6 PROC_PRDY#





X

1
GPP_B18/GSPI0_MOSI (No Reboot) R563 RH9011 NPI@ 2 0_0402_5%

6 PROC_PREQ#
RH563
w
HIGH Enable "No Reboot" Mode ASM 1K_0402_5% Place near PCH
@
LOW Disable "No Reboot" Mode (Default ) NO ASM LOGIC
2
GPP_B18_NO_REBOOT
GPP_B18_NO_REBOOT 20
w
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 XDP

Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Y550 1.0

5 4 3 2 1
A B C D E
+3VALW +3/5VALW to +3/5VS

+5VLP +5VALW
1
5VS_CT2 +0.6VS
1000P_0402_50V7K
CX2
1
1U_0402_10V6K +3VS 1
1
2 UX2
CX5
RX10 RX8
1 14 100K_0402_5% @ 100K_0402_5% RX9
2 IN1_1 OUT1_2 13 @ 47_0603_5%
Change net to SUSP# for PWR sequence IN1_2 OUT1_1 1 2
@ CX9
2
SUSP# RX13 1 2 0_0402_5% 3 12 3VS_CT1 @ .1U_0402_10V6-K
2
EN1 CT1 SUSP
2 42,58 SUSP
4 11
1
@ VBIAS GND D
RX14 1 2 0_0402_5% 5 10 5VS_CT2 +5VS 2 SUSP
EN2 CT2 3VS_CT1 @ G QX18
1
2200P_0402_25V7-K
1 6 9 1 D 2N7002KW_SOT323-3
1 7 IN2_1 OUT2_2 8 CX10 SUSP# 2 S 1
2
3
CX3 IN2_2 OUT2_1
CX4
@ +5VALW @ .1U_0402_10V6-K G QX6
0.01U_50V_K_X7R_0402 15 2N7002KW_SOT323-3
2 Thermal Pad 2 S
3
1
1 G2898KD1U_TDFN14P_2X3
CX1
1U_0402_16V6K
2
om
k .c
oc
+1.8VALW +1.8VS_AON
+1.8VALW to +1.8VS_AON
nl
QX4
AON7380_DFN8-5
1
V20B+
tu
+5VALW 2
5 3
0.1U_0402_25V6
1
2 2
1
1
RX16 CX17
4
1
1
100K_0402_1% OPT@ @ 0.01U_50V_K_X7R_0402 RX18 1
s
CX18
RX15 OPT@ @ 1/10W_47_5%_0603 CX13
47K_0402_5% 2 @ @ 10U_0603_6.3V6M
2
OPT@ RX20
2
fa
1 2 2
2
1K_0402_5%
OPT@
0.047U_0402_25V7K
3
QX25B D
+1.8VS_AON_EN#
L2N7002KDW1T1G_SOT363-6
5 1
CX16
OPT@
G
s-
1
6
QX25A D OPT@ S RX21
4
2
L2N7002KDW1T1G_SOT363-6
RX17 1 @ 2 0_0402_5% 2 430K_0402_1%
19,28 PXS_PWREN G OPT@ OPT@
1
D
DX12
2
1
+1.8VS_AON_EN#
m
S 2 QX23
1
1
3 RX22 1 2@ 0_0402_5% CX15 RX19 G L2N7002KWT1G_SOT323-3
0.1U_0402_25V6 100K_0402_5% @
1 OPT@ @ S
3
RX23 59K_0402_1%
2
2 1 2
ru
LBAT54SWT1G_SOT323-3 OPT@
OPT@
.fo
w
w
w
3 3
+1.05VALW
1U_0402_16V6K
VCCSTG_CT2
1
1000P_0402_50V7K
CX23
VCCST 1
UX3
CX20
2
10mA
1 14
2 IN1_1 OUT1_2 13
IN1_2 OUT1_1 1 2
CX21
SYSON RX24 1 2@ 0_0402_5% 3 12 VCCST_CT1 @ .1U_0402_10V6-K
EN1 CT1
4 11 2
+5VALW VBIAS GND
RX25 1 2@ 0_0402_5% 5 10 VCCSTG_CT2 VCCSTG
52,55,69,71 SUSP# EN2 CT2 VCCST_CT1
+1.05VALW
1000P_0402_50V7K
@ 6 9 0mA
RX26 1 2 7 IN2_1 OUT2_2 8
52,69 SYSON IN2_2 OUT2_1 1 1
CX25
100K_0402_5% 1 CX19
1U_0402_10V6K
.1U_0402_10V6-K
CX24
15 @
Thermal Pad
2 2
1 2 G2898KD1U_TDFN14P_2X3
CX22 @
0.01U_50V_K_X7R_0402
2
4 4
Issued Date 2018/08/02 Deciphered Date 2018/08/02 DC V TO VS INTERFACE

D 1.0
A B C D E
5 4 3 2 1
HDMI Logo PCB MB

ZZZ1 HDMI@ ZZZ2 15@ ZZZ2 17@
GPU
UV1 UV1
N18PG62@
N18PG61@
HDMI Logo PCB GY552 NM-C921 NS-C921/C922/C923/C924 PCB GY752 NM-C922 NS-C921/C922/C923/C924
RO00000040J DAZ1HW00100 DAZ1J100100 S IC N18P-G61-MP2-A1 BGA 960P GPU 12 ! S IC N18P-G62-A1 BGA 960P GPU QS
SA0000AQ800 SA0000AE700
D D
CPU UC1 i5@ UC1 i7@

PCH UH1
S IC CL8070104399510 SRH84 R1 2.5G 12 ! S IC CL8070104399315 SRH8Q R1 2.6G 12 ! S IC FH82HM470 SRJAU A0 FCBGA PCH 12 !
SA0000ANZ10 SA0000ANY10 SA0000AP010
UV4 UV6 RV192 RV194

Samsung 4GB VRAM
X76S4GX4@ X76S4GX4@ X76S4GX4@ X76S4GX4@
ZZZ4 S4GX4@
S !IC D6 8G/1750 K4Z80325BC-HC14 FBGA 180P 11GBPS@1.2V 12 !

S IC D6 8G/1750 K4Z80325BC-HC14 FBGA 180P 11GBPS@1.2V 12 100K_0402_5% 100K_0402_5%
SA00009L430 SA00009L430 SD02810038J SD02810038J
om
UV5 UV7 RV193
SAMSUNG_4GB_VRAM
X7648U12002
X76S4GX4@ X76S4GX4@ X76S4GX4@
S !IC D6 8G/1750 K4Z80325BC-HC14 FBGA 180P 11GBPS@1.2V 12 !

S IC D6 8G/1750 K4Z80325BC-HC14 FBGA 180P 11GBPS@1.2V 12 100K_0402_5%
.c
SA00009L430 SA00009L430 SD02810038J
C C
ck
UV4 UV6 RV187 RV194
Micron 4GB VRAM
lo
X76M4GX4@ X76M4GX4@ X76M4GX4@ X76M4GX4@
ZZZ5 M4GX4@
! D6 256M32 MT61K256M32JE-14:A FBGA 180P 11GBPS@1.2V 12100K_0402_5%
S IC
S IC D6 256M32 MT61K256M32JE-14:A FBGA 180P 11GBPS@1.2V 12 ! 100K_0402_5%
un
SA00009L530 SA00009L530 SD02810038J SD02810038J
RV193
UV5 UV7
MICRON_4GB_VRAM
st
X7648U12001 X76M4GX4@
X76M4GX4@ X76M4GX4@
100K_0402_5%
fa
S IC
S IC D6 256M32 MT61K256M32JE-14:A FBGA 180P 11GBPS@1.2V 12 ! D6 256M32 MT61K256M32JE-14:A FBGA 180P 11GBPS@1.2V 12SD02810038J
!
SA00009L530 SA00009L530
s-
m
ru
SKU ID
PCH_GPA18 PCH_GPA19 PCH_GPA 0 PCH_GPA 1
B B
.fo
RH157 N18PG61@ RH158 15@ RH153 N18PG61@ RH195 N18PG61@
w
10K_0201_5% 10K_0201_5% 10K_0201_5% 10K_0201_5%

SD04310028J SD04310028J SD04310028J SD04310028J
w
RH157
N18PG62@ RH155 17@ RH153 N18PG62@ RH163 N18PG62@
w
10K_0201_5% 10K_0201_5% 10K_0201_5% 10K_0201_5%

SD04310028J SD04310028J SD04310028J SD04310028J
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 Virtual symbol

C
Y550 0.1
Date: Friday, February 21, 2020 Sheet 63 of 83

5 4 3 2 1
5 4 3 2 1
H1 H2 H3 H4 H5 H6 H7
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
@ @ @ @ @ @ @
1
1
D D
PAD_C7P0D2P5 PAD_D2P5 PAD_D2P5 PAD_D2P5 PAD_D2P5 PAD_D2P5 PAD_D2P5
SH9 ME@ SH13 ME@ SH16 ME@

H8 H9 H10 H11
HOLEA HOLEA HOLEA HOLEA 1 1 1
om
@ @ @ @ 1 1 1
1
1
SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P
.c
PAD_CT6P4B7P0D3P4 PAD_C7P0D3P3 PAD_D3P3 PAD_CT6P5D2P5 SH10 ME@ SH14 ME@
ck
1 1 SH17 ME@
1 1
1
lo
1
SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P
un
H12 H13 H14 H15 H16 H17
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA SHIELDING_SUL-35A2M_9P2X3P3_1P
@ @ @ @ @ @ SH11 ME@
C SH15 SH18 C
ME@ ME@
st
1
1
1
1 1 1
1 1
fa
PAD_C8P0D3P0 PAD_C8P0D3P0 PAD_C8P0D3P0 PAD_C8P0D3P0 PAD_C8P0D3P0 PAD_C8P0D3P0
SHIELDING_SUL-35A2M_9P2X3P3_1P
s-
SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P
m
SH12 ME@
H18
1
ru
HOLEA
@ 1
.fo
1
SHIELDING_SUL-35A2M_9P2X3P3_1P
PAD_C7P0D2P5
w SO-DIMM Shielding
w
H22 H23 H25 H26 NH26
w
B HOLEA HOLEA HOLEA HOLEA HOLEA B
@ @ @ @ @
1
CHASSIS1_GND PAD_CB6P5D2P5 PAD_CT6P2B7P0D3P2 PAD_CT6P0D2P8 PAD_O2P2x2P5D2P2x2P5N

PAD_C8P0D2P5
HICT1 HICT2 HICT3

HOLEA HOLEA HOLEA
@ @ @ FD1 FD2 FD3 FD4 FD5 FD6
1
1
PAD_C2P5D2P5N PAD_C2P5D2P5N PAD_C2P5D2P5N
A A

Issued Date 2018/08/02 Deciphered Date 2018/08/02 Hole
B
Y550 1.0
Date: Monday, February 10, 2020 Sheet 64 of 83

5 4 3 2 1
5 4 3 2 1
B+ +5VLP/ 100mA
Richtek Silergy
Adaptor RT6585B +5VALW/14A SY8032 +1.0VGS/2A
D
C_ N_5V N1 Switch Mode Converter
D
FOR SYS ALW_PWRGD 1V0_MAIN_ N N

230W/20V PG D FOR GPU PG D
Page 8
Page 78
C_ N N +3VLP/ 100mA
+3VALW/ 8A GMT
G9661 +2.5V/600mA
SYS N N LDO
FOR DDR PG D
Richtek Page 9
+1.2V/10A
m
RT8231
Switch Mode +0.6VS/1A
co
SYS N S5 FOR DDR Silergy
SM_PG_CTRL S3 Page 9 PG D +1.8VALW/3.4A
SY8033
C_ N_1 8V N Converter
k.
FOR GPU PG D
Silergy Page 79
oc
TI SY8286 +1.05VALW/ 6A
C
BQ24780SRUYR Converter C
FOR PCH
nl
C_ N_1V N PG D
Battery Charger Page 71
u
Switch Mode
Page 59
st
Richtek
RT8816 FBVDDQ/ 35A
fa
Switch Mode
VRAM_VDDQ_ADJ N PG D VDDQPWR K
FOR GPU
Page 77
s-
SMBus
Silergy
um
SY8286 VCCIO/ 6A
Converter
SUSP# N FOR CPU PG D VCCI _PG
r
Page 7
.foMPS VCC_CORE/86A/140A
w
B
MP2979 VCCGT/25A/32A B
Switch Mode
w
FOR CPU Core VCCSA/10A
w
CPUC R _ N N
Page 73-7 PG D
CPU_PWRGD
Battery ON
Li-ion NCP81611 NVVDD/90A/225A
3S1P/57WH Switch Mode
NVVDD_ N N FOR GPU NVVDD PG D NVVDD_PWRGD
Page 71
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 Power Diagram

Custom
Y550 1.0
Date: Wednesday, February 19, 2020 Sheet 65 of 83

5 4 3 2 1
5 4 3 2 1
+3VL
PL201 EMC@
1
HCB2012KF-121T50_0805
1 2
VIN PR201 @
0_0603_5%
VCCRTC
JDCIN1
PL202 EMC@
PF201 RTC_VCC
2
1 HCB2012KF-121T50_0805 PR203
GND_1 2 1 2 1 2 PR202 PD201
APDIN 47K_0402_1%
POWER_1 VCCRTC_D_R 0_0603_5% VCCRTC_D
3 2 1 2 1 3
DETECT(ID) 4 12A_24V_F1206HB12V024T/M
POWER_2 @
5 @ 1
0.1U_0402_25V6
GND_2
0.1U_0402_25V6
D D
6
1000P_0402_50V7K
1000P_0402_50V7K
EMC_NS@
GND_3
EMC_NS@
RTC_VCC_R
PC201 EMC@
PC204 EMC@
7 1 2 2
GND_4 For 15"
PC203
1
1
PC202
PR204
HIGHS_PJSSS56-B4000-1H ADAPTER_ID 52,67 JRTC1 BAT54CW_SOT323-3
1K_0603_5%
2
ME@ 1
1 2
2 3
1
GND1 4
GND2 PC205
1U_0402_10V6K
@
2
HIGHS_WS33020-S0351-HF
ME@
m
ME@
co
ALLTO_C51126-112Z9-C
JBATT1
1
VMB BATT+
1 2 PL204 EMC@
2 3 HCB2012KF-121T50_0805
C C
3 4 1 2
k.
4 5 EC_SMCA
5 6 EC_SMDA
6 7 PL205 EMC@
7 8
c
HCB2012KF-121T50_0805
3
1
8 9 PC206 1 2 PC207
9 10 1000P_0402_50V7K 0.01U_0402_25V7K
lo
10 11 PL206 EMC@
EMC@ EMC@
2
2
11 12 HCB2012KF-121T50_0805
12 13 1 2
1
GND1 14
100_0402_1%
un
GND2 15
PR205
1
GND3 16
100_0402_1%
GND4
PR206
st
2
PD203 EC_SMB_CK1 52,67,79

AZC199-02S.R7G_SOT23-3
EMC_NS@
fa
EC_SMB_DA1 52,67,79
s-
PR207 1 2 100K_0402_1%
+3VALW
m
BATT_TEMP_IN 1 2
BATT_TEMP 52,67 A/D
PR208
ru
10K_0402_5%
B B
.fo
w
w
w
A A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 PWR-DCIN/BATT/RTC

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C
Y550 Rev
1.0
5 4 3 2 1
5 4 3 2 1
PQ101 PQ102
AONS32304_DFN8-5 AONS32314_DFN8-5
P2 V20B+
VIN 1 1 P3
PR101
2 2
5 3 3 5 1 4
2 3
EMC_NS@
EMC_NS@
0.01U_0402_25V7K
0.01U_0402_25V7K
4
4
1
1
D 0.01_1206_1% D
PC103
PC104
1
1
PC102
PC101 0.022U_0402_25V7K
2
470P_0402_50V7K PR102
2
4.7_0603_5% PQ103
5
AONS32314_DFN8-5
2
1 2
PC105 780s_BATDRV 4
1
PC106 0.1U_0402_25V6 PC107
0.1U_0402_25V6 0.1U_0402_25V6
BQ24780_ACN
BQ24780_ACP
2
2
3
2
1
1
PR103
499K_0402_1% PC108
VIN BATT+ 0.01U_0402_25V7K
2
2
780s_ACDRV_R
3
PD101
V20B+
om
BAT54CW_SOT323-3
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
1780s_VCC_R
1
2
EMC@
PC110
PC111
VIN
1
1
PC109
4.02K_0603_1%
4.02K_0603_1%
.c
1
PR105
PR104
ACD T Threshold:min:17 878V BQ24780S_VDD

BAT Ma V 17 V
5
1
1/16W_43.2K_1%_0402 PR107
ck
2
2
1
PR108 PR106 PC112 10_1206_5% PQ104
6.49K_0402_1% 1U_0603_25V6K AON7380_DFN8-5
ACN
ACP
C 1 2 C
2
1 2 780s_VCC 28 24 1 2
2
VCC REGN 2.2U_0603_10V6-K PC113 4
lo
1 2 780s_ACDET 6 PC115
PC114 ACDET 0.047U_0603_16V7K
0.01U_0402_25V7K 25 780s_BS
1 2780s_BS_R
2 1
BTST PR109 PR110
un
BATT+
3
2
1
2.2_0603_5% 2.2UH_PCMB063T-2R2MS_8A_20% 0.01_1206_1%
780s_CMSRC 3 26 780s_HG PL101
CMSRC HIDRV 1 2 1 4
780s_ACDRV 4
ACDRV 2 3
0.1U_0402_25V6
780s_LX
st
27
10U_0805_25V6K
PR111 @
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PHASE
EMC@
0_0402_5% PR112
2
2
2
PC118
1 2 780s_ACOK 5 PQ105 4.7_0805_5%
PC140
PC116
PC117
PC139
52 ACIN ACOK PU101 AONR32340C_DFN8-5 EMC_NS@
fa
780s_SDA 11
1
1
2
1
52,66 EC_SMB_DA1 SDA 23 780s_LG 4
780s_SN
LODRV G
780s_SCL 12 22
S3
S2
S1
SCL GND
1
52,66 EC_SMB_CK1
s-
PC119
3
2
1
7 29 1000P_0402_50V9-J
0.1U_0402_25V6
0.1U_0402_25V6
52 ADP_I
2
IADP PAD
EMC_NS@
1
8 18 780s_BATDRV
PC120
PC121
m
52 BATT_I IDCHG BATDRV
9
52,72 PSYS
2
PMON 17 780s_BATSRC 1 2 780s_BATSRC_R
BATSRC PR118 10_0603_5%
ru
20 780s_SRP 1 2 780s_SRP_R
10 SRP PR119 10_0603_5%
52 VR_HOT#
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
1
PROCHOT#
1
PR120 13 PC123
10K_0402_1% .fo CMPIN
0.1U_0402_25V6
V charge MAX :17 V
BATPRES#
2
I charge MAX :7 A
TB_STAT#
14
PC122
PC124
PC125
2
CMPOUT 19 780s_SRN 1 2 780s_SRN_R

FSW:800K
2
21 SRN PR121 10_0603_5%

ILIM
2
B B
w
PR122
780s_TB# 16
15
0_0402_5% BQ24780SRUYR_QFN28_4X4
@
+3VALW
w
1
1 2 780s_ILIM_R 1 2
+3VALW BATT_TEMP 52,66
w
PR123 PR124
1
105K_0402_1% 32.4K_0402_1%
1
PR125
PC126 100K_0402_1%
0.1U_0402_25V6
V20B+
2
IchargeLIM 8 05A
1
IDischargeLIM 3 A
PR126
1000P_0402_25V7-K
1000P_0402_25V7-K
1000P_0402_25V7-K
1000P_0402_25V7-K
1000P_0402_25V7-K
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
750_0603_1%
2
1
1
1
1
1
1
PC129
PC127
PC128
PC131
PC134
PC135
PC136
PC132
PC133
PC130
2
2
2
2
2
2
ADAPTER_ID 52,66
680P_0402_50V7K
EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
EMC_NS@
1
0.1U_0402_25V6
@
1
1
1
PC137
PC138
PD102
@
A A
2
2
2
Issued Date 2018/08/02 Deciphered Date 2018/08/02 PWR-charger

Size
Custom
Document Number
Y550 Rev
1.0
5 4 3 2 1
5 4 3 2 1
D D
om
.c
+3VALW_VIN
PJ2001
ck
+5VLP 2 1
+3VLP 2 1 +3VL 1A
0.1U_0402_25V7-K
JUMP_43X39
62K_0402_1%
4.7U_0603_6.3V6K
@
lo
+3VALW_VIN
1
PC2001
4.7U_0603_6.3V6K
2
10K_0402_1%
0_0603_5%
V20B+ V20B+
1
PC2002
@PR2003
PC2003
2
PR2002
un
PJ2002
PJ2003
2
1 2
+3VALW Vout 5V+-5%
1
1 2 +5VALW_VIN 2 1
+3V5V_CS2
+3V5V_CS1
2
2
2 1
Vset 5 0 V+-1 5%
PR2001
JUMP_43X79
+5V_LDO
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
JUMP_43X118 FSW 500KHz RT 585: 00K
2
1
0.1U_0402_25V6
EMC_NS@
PC2004
@
10U_0805_25V6K
10U_0805_25V6K
st
PC2005
PC2006
+3VLP
1
1
@
PC2009
PC2008
PC2007
PR2004
TDC 1 A CP 0A
EMC_NS@
C 100K_0402_1% C
2
Vout 3 3V+-5% VP Vout 113%
2
2
PU2001
fa
12
13
UVP Vout 5 %
5
Vset 3 3V+-1 8 % RT6585CGQW_WQFN20_3X3
AON6380_DFN8-5
AONR32340C_DFN8-5
FSW 00KHz RT 585: 75K
VIN
CS2
CS1
LDO5
LDO3
PQ2001
21
D
GND
PQ2002
ALW_PWRGD
s-
7
TDC 8A CP 1 A 16,69 ALW_PWRGD PGOOD PJ2006 @
+3VALW VP Vout 113% 4 +3V_UG 10 UGATE1

16 +5V_UG
PR2006 PC2011
4 2
2 1
1
UVP Vout 5 % G PC2010 PR2005 UGATE2 2.2_0603_5% 0.1U_0603_25V7K +5VALW
m
0.1U_0603_25V7K 2.2_0603_5% 17 +5V_BST1 2 1 2 1.5UH_CMMB104T-1R5MS_16A_20% JUMP_43X118
S1
S2
S3
1.5UH_PCMB063T-1R5MS_10A_20% 1 2 1 2 +3V_BST9 BOOT1
PL2002 PJ2005 @
3
2
1
BOOT2
PJ2004 PL2001
1
2
3
18 +5V_LX 1 2 +5VALWP 2 1
ru
2 1 +3VALWP 1 2 +3V_LX 8 PHASE1 2 1
2 1 PHASE2
JUMP_43X118
5
330P_0402_50V7K
15 +5V_LG
5
AONR32340C_DFN8-5
JUMP_43X118 LGATE1
14A
2
680K_0402_1%
+3V_LG 11
AON6324_DFN8-5
D
SKIPSEL
LGATE2
2
@
.fo PQ2003
14 PR2009
BYP1
220U_B2_6.3VM_R25M
1
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
PQ2004
PC2012
PR2007
PR2011
PR2008 2.2_0805_5%
EN2
EN1
FB2
FB1
22U_0603_6.3V6-M
1 4.7_0805_5% EMC@
1
1
1
0.1U_0402_25V6
0.1U_0402_25V6
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
PC2014
PC2018
PC2021
PC2015
PC2019
PC2020
4 4
PC2016
PC2017
PC2023 @
1
2
1
EMC_NS@ G
2
13K_0402_1%
220U_B2_6.3VM_R25M
PC2013
+
@
20
19
2
2
1
2
1
PC2022
PC2024
PC2025
PC2026
PC2027
PC2028
+
S1
S2
S3
w
2
2
2
PR2010
+5V_FB
2
EC_ON_3V_R
EC_ON_5V_R
RT8249_USM
@ @
1
3
2
1
2
1
2
3
2
1
2
1
1
30K_0402_1%
PC2030
PC2029
w @
1
1000P_0402_50V_X7R_0402 @
1000P_0402_50V9-J
2
1
PC2031
EMC@
EMC_NS@
2
w
0.01U_0402_25V7K
2
@
+3V_FB
2
PR2014 @
0_0402_5% @
B PR2013 2 1 2 1 B
52,60 EC_ON EC_ON_5V 52
20K_0402_1%
1M_0402_5%
1M_0402_5%
0.1U_0402_10V7K
PR2015
1
0.1U_0402_10V7K
1
1
PR2016
PR2017
@ PC2032
1
@ PC2033
@
Vout=2V*(1+PR610/PR613) 0_0402_5%
2
PR2018 Vout=2V*(1+PR612/PR616)
2
19.6K_0402_1%
2
+3VL
2
PR2020
100K_0402_1% @
PR2012 @
1
0_0402_5%
2 1 RT8249_USM
52 EC_3V/5V_USM
1 2
PR2019
200_0402_1%
@
C_3V/5V_USM H D M L ASM defualt H

A PR 01 for RT8 9C PR 019 for RT 585 A
Issued Date 2018/08/02 Deciphered Date 2018/08/02 PWR-3/5VALW

Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Y550 1.0
5 4 3 2 1
A B C D

Lenovo Legion 5-15IMH05H - LCFC NM-C921 Rev 1.0

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A B C D E

Comet Lake H-Processor with DDR4 + NV N18P-G61/G62 GPU

Comet Lake H 45W 1.2V DDR4 2933MT/s TBD

int. DMIC conn ITE IT8227-LQFP128 SLB9670VQ2.0

for RGB SKU

Security Classification LC Future Center Secret Data Title

Issued Date 2018/08/02 Deciphered Date 2018/08/02 Block Diagram

Date: Tuesday, January 14, 2020 Sheet 2 of 83

Voltage Rails ( O --> Means ON , X --> Means OFF )

N18PG62@ N18PG62 PART ME@ ME part(connector)

Port Function Port Function Port Function Port Function

1 Back USB3.0 1 Back USB3.0 0A NA 1:8 NA

Issued Date 2018/08/02 Deciphered Date 2018/08/02 Notes List

SMBUS Control Table

Security Classification LC Future Center Secret Data Title

Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (1/7) DMI,PEG

+3VALW COMETLAKE-H-CPU_BGA1440 PCI ress Bifurcation

C BN35 @  1 default P G Train immediately

+3VS +3VALW VCCST BH30 RSVD18 RSVD8 B2

QC3 D QC2 D CFG2

CC33 1K_0201_5% 1K_0201_5% RC56 RC53 RC54 RC52 RC51 RC55

Security Classification LC Future Center Secret Data Title

Date: Tuesday, January 14, 2020 Sheet 6 of 83

DDR4 COMPENSATION SIGNALS

SM_RCOMP0 RC5 1 2 121_0402_1%

SM_RCOMP1 RC6 1 2 75_0402_1%

SM_RCOMP2 RC8 1 2 100_0402_1%

RC147 1 @ 2 0_0402_5% +V_DDR_REFA_R

Security Classification LC Future Center Secret Data Title

Issued Date 2018/08/02 Deciphered Date 2018/08/02 CPU (3/7) DDRVI

Date: Tuesday, January 14, 2020 Sheet 7 of 83

K36 D29 CPU_EDP_TX0+

Security Classification LC Future Center Secret Data Title

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1uF 12pcs CD 2pcs

CD@ CD@ CD@ CD@ CD@ CD@ CD@

1uF 45pcs CD 2pcs

Security Classification LC Future Center Secret Data Title

CRB lace to CPU CRB lace to CPU

VCCSA_SENSE_R RC154 1 2 VCCIO_SENSE_R

Modify request by PWR 1 /

Security Classification LC Future Center Secret Data Title

Date: Tuesday, January 14, 2020 Sheet 10 of 83

Security Classification LC Future Center Secret Data Title

Date: Tuesday, January 14, 2020 Sheet 11 of 83

+1.2V+1.2V +1.2V+1.2V JDDRL1B

B 0_0402_5% 0_0402_5% 0_0402_5% B

2 2 2 DDRA_SA0 DDRA_SA1 DDRA_SA2

RD23 RD25 RD27

0_0402_5% 0_0402_5% 0_0402_5%

Change RD to 0ohm jum

RD2 CD7 1 CD8 1 CD9 1 CD10 CD11 CD12 CD13 CD14

2_0402_5% CD81 CD82

CD1 RF_NS@ RF_NS@

For EMC Security Classification LC Future Center Secret Data Title

Issued Date 2018/08/02 Deciphered Date 2018/08/02 DDRVI SO-DIMM A

Date: Tuesday, January 14, 2020 Sheet 12 of 83

DDRB_SA0 DDRB_SA1 DDRB_SA2

CD35 1 CD36 1 CD37 1 CD38 1 CD39 1 CD40 1 CD41 1 CD42 1 1 1 1 1 1 1 1 1 1 1

Security Classification LC Future Center Secret Data Title

Issued Date 2018/08/02 Deciphered Date 2018/08/02 DDRVI SO-DIMM B