NOTICE

Copyrighl /995.

All Right Reserved

Manual Version Rev 0.1

All information documcntalion, and specifications contained in lhis manual are subject
to change without prior notification by the manufacturer.

The emthor assumes no rejponsibility for any errors or ommissions which may appear in
lhis document nor does it make a commitmellf lo update the information coutained herein

TRADEMARKS
UAt/C is a registered trademark of l.J}Iited Microelectronics Corporation

PC/AT is a registered trademark of lllfemational Business Machine Corporation.

OS/2 is a registered trademark of IBM Corporation.

Net Ware is a registered trademark of NoveJJ Corporation.

All Olher brand and product names refered 10 in this mamral are lrademarks or registered
trademarks of their respective holders.

User's Manual 1 •

J
 TABLE OF CONTENTS

PREFACE ................................................................................................. 3

CHAPTER 1 INTRODUCTION ..................................................................... 4

Specification. .......... .. . ................. ................. .. .. ... ...... ....... 4
Block Diagram ......................... ...................... . 6
433 Mainboard Description .. ......... 7
433 Mainboard Placement ............ 9

CHAPTER 2 JUMPER SETTING ................................................................. II

System Clock Selection .. . ...................... II
CPU Type Selection ................................ .......................................... 12
CPU Voltage Selection. . .. ....... .. ........ .. ....... 19
Cache Size Selection . ........................... 20
Flash EEPROM Vpp Selection ........................ 22
Connectors.... ........................ 24

CHAPTER 3 MEMORY CONFIGURATION .................................................. 23

CHAPTER 4 POWER MANAGEMENT ........................................................ 25

Power Management Modes Description ... ...................... . ... ..................... 25
Power Management Modes Indicator.......... . .......................... 26
EPMI Connector-- GR-S(JP35) ................................ . .......................... 26
Power Supply Power Down Connector -JP6 .......................................... 26

CHAPTER 6 BIOS SETUP ..................................................................... 27

BIOS Setup Feature.. ... .. .. ......... ... ........................... ............. 28
Using the Keyboard with WinBIOS Setup ................ .. ..... ................... ......... 30
Standard Setup........ . . .... 31
Advanced Setup ........................ ..................... 33
Advanced Setup Defaults ............................................ .. .................. .......................... 36
Chipset Setup ........................... .. ......... 37
Chipset Setup Defaults .... ........ . ......... ... 40
Power Management Setup ............ . .. ............... ................... 41
Power Management Setup Defaults . ................... 44
Peripheral Setup .. 46
Peripheral Setup Defaults .................. . ................. 49
WinBIOS Password Support ... ... .. 50

APPENDIX A ......................................................................................... 52
Memory Map ...................... .. 52
I/O Map .......................... .................. 53
Timer Map...... .... .... .. .. .. ... .. ........ .. .. 54
DMA Channel Map .................. ... 54
Interrupt Map .......... 55

APPENDIX B ......................................................................................... 56
Error Beeps and Message .... 56
AMffiiOS POST checkpoint Codes .......... . 57

• 2 User's Manual
 Preface

HOT-433 mainboard is a highly integrated IBM PC/AT compat­

ible system board designed to accommodate 25MHz to 1 OOMHz
486 processors, and features h igh-performance secondary cache
memory architecture from 1 28KB up to 1024KB.

HOT-433 mainboard features four PCI (Pherpherial Component

Interconnect) local bus and four ISA (Industry Standard Architec­
ture) bus expansion slots.

HOT-43 3 mainboard also integrate one 2-channel PCI enhanced

IDE controller, one floppy controller, one parallel port, two serial
ports, and one optional PS/2 mouse port.

User's Manual3 •
 Specification

CPU Function

0 CPU clock: 2 5/33/40/50/66/80/ 1 00 MHz

0 Supports Intel 486SX/DX/2DX2/DX4, AMD

Am486DX/DX2/DX4, Cyrix Cx486S/DX/DX2,
and UMC US CPU

0 Supports S-Series CPU

Chipset

0 UMC 888 1 F/8886AF and 8663AF

0 Supports internal and external write back cache

0 Supports PC! master and slave up to 3 3 M Hz

0 Supports PC! burst mode access to local memory

Memory

0 Supports four banks of local DRAM system ranging from

I MB to 256MB of host memory

0 Supports 256K x 36/32 ( 1 MB), 5 1 2 K x 3 6/32 (2MB), 1 M

X 36/32 (4MB), 2M X 36/32 (8MB), 4 M X 36/32 ( 1 6MB),
8M x 36/32 (32MB), and 1 6M x 36/32 (64MB), 72-pins
SIMM

Cache Memory

0 Supports 1 2 8KB, 256KB, 5 1 2KB, and 1 MB write­

through or write-back external cache.

• 4 User's Manual
 Power Management Function

0 Provides four power management modes : On, Doze,

Sleep, and Suspend

0 Supports M icrosoft APM

0 Provides EPMI (External Power Management Interrupt)
pin

Expansions

0 32-bit PCI bus x 4

0 16-bit ISA bus x 4

0 2-channel PCI enhanced I DE port

Supports up to 4 IDE drives

Supports 32 and 1 6-bit data transfers

Supports buffers that operate read prefresh and write

port transactions

Fully ANSI A TA spec. 3 .X compatible

0 One floppy port

0 One parallel port
Supports SPP (Standard Parallel Port), EPP (Enhanced
Parallel Port), and ECP (Extended Capabil ities Port)
h igh performance parallel modes.

0 Two serial ports

Supports 1 6C550 compatible UARTS.

0 One PS/2 mouse port (optional)

Board Design

0 D imension 22cm x 26cm

------• User's Manual 5 •

 Block Di agram

CPU

I
I I
Bnw 1 L2 Cache

I
I UM8881 F

.,!.�,.&.�
DRAM

PCI Bus PCI Bus Master Slots

r----,
ISA
Floppy
....--

PCI
IDE 1-.....j UM8886AF D - ...._-

T
ISA Bus Slots
I •
I ISA Bus
ISA
Parallel & 8002
Serial

XD Bus

CMOS
Keyboard and
BIOS
RTC

•6 User's Manual
433 Mainboard Description

The major components of

433 maniboard are illus­
trated and described to
t h e right a n d b e l o w .
Please take a m inute to
become fami liar with the
board design. 6

1. Chipset ASIC
4 3 3 m a i nb oard is de­
signed around a set of
? 12 II

D�-
highly integrated U M C
ASIC, which offers opti­ ..
:: ...
m u m perform anc e on
PCI and ISA base system
with a cache control ler, a
local DRAM controller,
and an integrated Periph­
erals controller.

2. System Microprocessor
433 mainboard accept any member of the 486 fami ly of high perfor­
mance 32-bit m icroprocessors in PGA package. The mainboard is
designed to run at a clock speed from 25 to 50MHz on CPU bus clock,
and 25 to 1 OOMHz on CPU core clock.

3. External Cache
433 maniboard features a external cache memory, which complements
the 8KB or 1 6KB internal cache of the 486 fam ily. It support second­
ary cache with size of 1 28KB, 256KB, 5 1 2KB, and 1 MB .

--------• User's Manual 7 •

 4. Main Memory
433 mainboard features four 72-pin SIMM (Single In-line Memory
Module) sockets organized into four banks, which allow flexible
memory configuration and expansion. It may use I MB, 2MB, 4MB,
8 MB, 1 6MB, 32MB, and 64M B SIMM to expand memory from 1 MB
to 256MB.

5. PCI Expansion Slots

433 mainboard provides four 3 2-bit PCI expansion slots, which may
accommodate many third-party expansion cards and increase flex­
ibility in designing custom platforms.

6. ISA Expansion Slots

433 mainboard provides four 1 6-bit ISA expansion slots, which may
accommodate many third-party expansion cards and enormous flex­
ibility in designing custom platforms.

7. 5V- 3.3/3.45/3.6/4.0V Voltage Selection

For Intel 486DX4 (P24C), AMD Am486DX2-80/DX4-J 00, and Cyrix
486DX2-66/DX2-80 CPU, 433 mainbaord provides a wide selection
of voltages support of 3 .3/3.45/3 .6/4.0V.

8. On-board PCI IDE Controller

433 mainboard provides a on-board 2-channel IDE controller with
high speed data transfer rate . It support up to four IDE devices.

9. On-board Floppy Controller

433 mainboard provides a on-board floppy controller that supports
360KB, 1 .2MB, 720KB, 1 .44MB, and 2 . 8 8M B type floppy disk drives.

10. On-board Serial/Parallel Port

433 mainboard provides two serial (COM) ports and one parallel port.

11. On-board optional PS/2 mouse Port

433 main board provides an optional PS/2 mouse port for future
expans ton.

• 8 User's Manual
12. System BIOS
433 mainboard is equipped with AMI system WinBIOS. The NCR
5 3 C 8 1 0 and Adaptec AHA-7850 SCSI B IOS is bu ilt- in with a
particulary designed to offer optimum performance of the mainboard.

13. Attached Accessories

one 40-pin hard disk drive flat cable

one 34-pin floppy disk drive flat cable

one 9-pin and 25-pin serial connectors with cables

one 25-pin parallel port connector with cable

optional PS/2 5-pin DIN connector with cable

on-board enhanced IDE drivers on a 3 . 5" floppy diskette

User's Manual 9 •
 433 Mainboard Placement

Memory Bank

3 2 I 0

-c
r.

0
" "'

2 I 1 � !�v
= = ! � II
nnn
System BIOS

��::
Cache Bank 0

lJl.51 � -� ��� uuu

0
"'"'"'"'" ""'' 1!1�0
JP;7·
JPJ6 ::::-···········:::: --
· -

JP20 [
m� �m D
• • •

,��:!'J;!���
CIIIDCIIIDCIXIUIIID
[ !!1L..............
.......!111
.....
. :::::::::::::::::::
Cache Bank I

D
mP·�&
SOCKET 3

• 1 0 Us er's Manual -------

 Jumper Setting

System Clock Selecti on

433 mainboard features a

JPI
clock generator to pro­ I•
6
••I
vide adjustab le system v External
JP2 1•••1 Keyboard BIOS
clock frequency. JP l,
JP3 I•
6
••I
JP2, and JP3 are all 3-pin
jumper which determine
the clock frequency.

Proper jum per settings

for generating 25 MHz to
50MHz clock frequency
for 486 system are shown
!SA Slot I !SA Slot 2 !SA Slot 3
bellow.

25MHz System Clok 33MHz System C/ok

1•1-11
1
11-1• 1
JPl 1 JPl

��-�-� JP2
1 1

I• I-IIJP2
11-I•IJPJ 11-I•IJPJ

140MHz System Clok 50MHz System Clok I

11•1-11 11-1•1
1 JPI 1 JPI
1

I•I-IIJP2
1

II-I•IJP2
11-I•IJPJ 1•11-11 JP3

------- User's Man ua/ 1 1 •

 CPU Type Selecti on

433 mainboard accepts any member of the 486 series m icropro­

cessors. If you try to install or upgrade the CPU, you must set the
CPU type jumpers accordingly.

Note : It is highly recommen ded that a CPU coolin g fan is

attached to the CPU to ensure s ys tem s tability.

••

ooooooooooooooooooo
ooooooooooooooooooo
ooooooooooooooooooo
ooooooooooooooooooo
0000 0000
0000 0000
0000 0000
0000 0000

l1TIJc·•• • l[i"i"ilii]
I JPI7 2 6 I JP20
0000 0000
i�fil� ... 0000 0000

I JPI9 5
l!! !j I JP21 JP23
0000
0000
0000
0000
0000
0000
00000 0000
ooooooooooooooooooo
I JP26 I JP28 I JP30 oooooooooooooooooo
[1TI)I • •
• • II •• • • I 0
000000000000000000
0000000000000000
: • • •II:TI:!J�[!::!:JI:�:::!J
I JP25 I JP27 I JP29 JP31 JP32 1£ .L3�:JOS i

Intel 486DXIDX2

[ll
- N

I
1 JP 1 7 2 6 1 JP20

r•-·--•l • • 1r•-··-·-•-1!• 1 ::a

• • il•••l!••l ��
F 1 JP 19 5 1 JP21 JP23
Vo'<Jo-
, ; 1 JP26 1 JP28 1 JP30
0
L�-�JCi!!!!'f�l f_iii_i _l!i!i!!!1_1
• >

� �....-..-i-1[_�-�--�-�_ll• • '�
1 JP25 1 JP27 I JP29 JP3 I JP32

•12 Us er's Man ual

lntei486SX

fF
IJPI7 2 6 I JP20 - N

I•• •I • • l••••• l fil�

, � l•••ll••ll!J"-'
• )( I JPI95 I JP21 JP23

. ... fii..-.=JI • � • II•• • • I

,. I I JP26 I JP28 I JP30

1•�11•• • w-.-. • • I� [IT]

I JP25 I JP27 I JP29 JP31 JP32

Intel 486SX S-Series

1JPl7 2 6 l JP20
11!!!!!1 •J rer.rel
t
• l•l!!!l!
!!l l!!!!l fil�
l�l•-••11••ll!J>->
, ' 1 JP19 5 1 JP21 JP23

V>=ti"'
1 JP26 I JP28 1 JP30
0
I•• •il• l!!!!!l • H • • • •I
..11..., • • • !I• • • • I� [IT]
lr:·=-�
--
-
I JP25 1 JP27 1 JP29 JP31 JP32

User's Man ual 13 •

 lntei486DXIDX21DX4 S-Series
AMD Enhanced Am486

[.• I ]•-••If•
- N

]!!!!1 fil ;:§

IJP 1 7 2 6 I JP20

D
ll!!il• I •1!!!1!
!!1
J I!J
• •
• • _ rv
!' :-, IJPI95 lJP2l JP23

t.n!:t;O'\
I J I JP26 I JP28 I JP30
0
� • iii!!!!!JI&!fl!'ll-el!!!!l-1
1.--•�1!!!1!!1=-=l�ill • • • • I��
I JP25 I JP27 l JP29 JP31 J P32

Intel 486DX4 (P24C) & AMD Enhanced

Am486 Clock Multiplier- JP18

For 3 . 3 V I n t e l 4 8 6DX4
(P24C) and AMD Enhanced
Am486 CPU, 433 mainboard
offers a jumper JP 1 8 to adjust
CPU internal clock multiplier
to 2 or 3 t imes of external
clock frequency.

Co re/Bus
Internal External
CPU Type Clock JPIS
Core Clock Bus Clock
Ra tio

DX4-100 3 : 1 1•••1 lOOMHz 33MHz

DX4-l 00 2: 1
I•• ,, lOOMHz 50MHz

DX4-75 3: 1
1•••1 75MHz 25M Hz

Other CPU
1•••1

• 1 4 User's Man ual

 Intel P24D

I JP17 2 6 l JP20 -tv

• • l•-••1•-111!1
��·:c·m·i ·�liiiil ,;§ tv
I JP19 5 l JP21 JP23
',

• iiill
I JP24 I JP26 I JP28 I JP30
I ••II •••111!!!!!1 1!!!!!1 II • • 1!!!!!1 I
i•liii
l
I JP25
••• 1[!1 ••--�--JI!-• 11•-•J
1 JP27
_

I
_

JP29 JP31 JP32

Intel P24D Internal Cache Line - JP24

Intel P24D CPU Cache Line

Cache Scheme JP24

Write - B ack
1••-•1
Write - Thru
11-1•1
Other CPU
1•••1

Intel P24T

C IIJIIJi l•&�&�lfil;g
I JP 17 2 6 l JP20
l&i•
i! I •
• ·-••ll ••ll!Jtv
1 JP19 5 1 JP21 JP23

l ' 0

------- User's Manual 1 5 •

J
 AMD 486DXIDX2/DX4

F
- IV

I
I• • •I • • llj •••••l f• l �
I JPI7 2 6 I JP20

' if'
� 1•••1: • •IL!Jov
I JPI9 5 IJP21 JP23

'" I
I • • • lll!ii!ii!l l!ii!ii!lH • • l!ii!ii!lI
JP26 I JP28 I JP30

l,-•---.l!ii!ii!l=-=1 1 • • •II • • • • I��

I JP25 I JP27 I JP29 JP31 JP32

AMD Am486DX4-100/DX2-80 Clock Multiplier

- JP24

For AMD 3 . 3 V Am486DX4-

I 00 and Am486DX-80 CPU,
4 3 3 m a i nboard o ffers a I JP24 !" f
1•••1•..
•

jumper JP�4 to adjust CPU • •• ••••

•• •• •• •• ••
internal clock multiplier to 2 p;-
or 3 times of external clock
frequency.

AMD 486DX2-80/DX4-100 Clock Multiplier

External
CPU Type
Bus Clock
Ratio

DX4-IOO 3: I 33MHz

DX4-IOO 2: I IOOMHz SOMHz

DX2-80 3: I 75MHz 25MHz

DX2-80 2: I 80MHz 40MHz

Other CPU

•16 User's Manual

 Cyrix Cx486S (M6)

[· �•· � 1-•liii•iiiil 11-l ;g

1 JP17 2 6 1 JP20
I • liiiiiiil l
I!]
I
-·
1 JP19 5
·-••11••1�10
1 JP21 JP23 �
Vl�"'
1 JP26 1 JP28 1 JP30
I • liiiliiiil l • liiiiiiil • II • • • • I
0

,--1•--,lii!!!!l=-=111!!!!!1 • l[e_�]� �
1 JP25 1 JP27 I JP29 JP31 JP32

Cyrix Cx486DXIDX2 (M7)

I JP17
r •ml!!!!!ll • [ li]•• j •-••II•••IL!J
2 6 1
11-l ;§
•-11!!!1
JP20

m:J
L ,
-•
I JP I 9 5
...,
1 JP21 JP23
�
' .Y' l 1 JP26 I JP28 1 JP30
.---=I
--'= • l!!!!i!!llr l!!!!i!!II!!!!!IJ c-=• 1!!!!!1 I
I • �!!iii!!�II�!!!!!!� • II • �!!!!!!!� • I� �
1 JP25 1 JP27 I JP29 JP31 JP32

Cyrix Cx486DX4-100

c· [I) •II •li!illi!ill 1-1 ;:g

1 JP17 2 6 1 JP20
lli!il•J
•4t •· 18
l!l
• • 1-l•ll••l�tv
l.il'ii\ 1 JP195 1 JP21 JP23
Vl�"'
l .IP21 1 JP26 1 JP28 1 JP30
• • I • ellli!il liiiiiiil II • • liiiiiiil I
0

I • lii!ii!IHI!!iiiil • II • • • • I� �
,

1 JP25 1 JP27 1 JP29 JP31 JP32

------- User's Manua/ 1 7 •

 UMC 486S U5

1 JP17 2 6 1 JP20

r-.-.--.-�[1_:-:]��l;] �
,' 1 JP19 5 I JP21 JP23
v.:=t;o-
1 JP26 I JP28 l JP30
��· !!1 �11 • l!iiiiil • lll!iiil!i
iil iiiil I
0
�=�� I 1!!!
! • l!i!i!l II • l!iii[ iil • • l!iiiiil I CITJ �
I JP25 I JP27 I JP29 JP31 JP32

• 18 User's Manual
CPU Voltage Selection
For Intel 486DX4, AMD Am486DX2-80/DX4- l 00, and Cyrix
Cx486DX2-66/DX2-80 CPU, 433 mainboard features single volt­
age regulator to generate the voltage for CPU (Vee) from 5V to
3.3/3.45/3.6/4.0¥. JP9, JP 1 5, and JPI6 are provided for voltage

[UJ
setting between 5V and 3.3/3.45/3.6/4 .0¥.

3.3V •
3.45V ee
3.6V ee
ee
4.0V
� 1 JPIS
1•••1
·1 JP16 0000000000000000000
1•••1 0000000000000000000
0000000000000000000
0000000000000000000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
• • • 0 • • • • • • 0000 0000
• • • • • 0000 0000
.�.
0000 0000
0000 0000
00000 0000

CPU Voltage Selection

CPU Voltage JPIS JPI6 JP9

5V
1•-••1 11-1•1 Don't Care

3.3 v 'I - 2
3.45 v '3- 4

3.6V [iu- I! [il...i] '5-6

4.0V '7- 8

User's Manual 19 •
 Cache Si ze Selection

433 mainboard supports exter­

.
nal cache m e mory s izes of
1 28KB, 2 56KB, 5 1 2KB, and
IMB Cache memory is popu­
lated by eight Data SRAM and
one Tag S R A M . C ac h e
memory is organized into two
banks, w ith four S RAM as­
signed to each bank. The Data
S R A M su pported i n 4 3 3
mainboard is 32Kx8, 64Kx8,
and 1 28Kx8, the Tag SRAM
c an b e 8 K x 8 , 3 2K x 8 , and
64Kx8.

I I I I 2

��[i][;;]
••

1128
"-' ....
••

KB Cache Memory •
!:0 :::0 ::; �

BankO Bank1 Cacheable Range

1
Cache Tag RAM
Data RAM Data RAM
Size U26
U15,16, 17,18 U27,28,29, 30 Write-Through Write-Back

128KB 32 Kx8 Empty 8Kx8 32MB

I 16MB

, ��!(;;)
I I I I 2

I··
1256
• • •
• • • • !••
KB Cache Memory ' '
:=tl :=tl :=tl :=tl
:::::: N \.;..) :i:

BankO Bank1 Cacheable Range

I
Cache Tag RAM
Data RAM Data RAM
Size U26
U15, 16, 17, 18 U27, 28, 29, 30 Write-Through Write-Back

256KB 32K x8 32Kx8 32Kx 8 64MB

I 32MB

• 20 User's Manual
1256
•
•
KB Cache Memory

BankO Bank 1 Cacheable Range

I
Cache Tag RAM
Data RAM Data RAM
Size U26
U15, 16, 17, 18 U27, 28, 29, 30 Write-Through Write-Back

256KB 64Kx8 Empty 32K x8 64 MB

I 32MB

I 2

1512 !!I!
•

•
KB Cache Memory
•
� � ......

""C -o ""'0 �
...., _...

BankO Bank1 Cacheable Range

1
Cache Tag RAM
Data RAM Data RAM
Size U26
U15,16,17,18 U27, 28, 29, 30 Write-Through Write-Back

512 KB 128Kx8 Einpty 32Kx8 128MB

I 64MB

I 2

1512 KB Cache Memory •

•
�I!!
::;;; ::;;;
....,
::;;; ::;;;
_...

BankO Bank1 Cacheable Range

Cache Tag RAM
Data RAM Data RAM

I
Size U26
U15,16,17,18 U27,28,29, 30 Write-Through Write-Back

512KB 64Kx8 64Kx8 32Kx8 128MB

I 64MB

I 2

I 1024 ��!!
•
•
KB Cache Memory •

BankO Bank1 Cacheable Range

1
Cache Tag RAM
Data RAM Data RAM
Size U26
U15, 16, 17, 18 U27, 28, 29, 30 Write-Through Write-Back

1024 KB 128K x 8 128K x8 64Kx8 256MB

I 128MB

User's Manual 21 •
 Flash EEPROM Vpp Selection

433 mainboard supports both 1 2 V

and 5 V programm ing voltage flash
EEPROM for system BIOS. JP8 is
provided to accommodate these two
types of flash EEPROM.

OPEN, or Pin 2 - 3 Close for 5V

Pin 1 - 2 Close for 1 2V

Connectors

Connectors

ITEM FUNCTION

CN7 On-board PCI P1imary IDE Connector

CN6 On-board PCI Secondary IDE Connector

CN5 On-board Floppy Controller Connector

CN4 On-board Parallel Port Connector

CN3 On-board Serial port- I Connector

CN2 On-board Serial Port-2 Connector

CNI External Battery Connector

CN9 Power LED and Keylock Connector

CN8 PC Speaker Connector

MS I PS/2 Mouse Connector

JP33(RESET) Hardware Reset Switch Connector

JP34(TB-S) Hardware Turbo Switch Connector

Turbo LED connector,

LEDI(TB-L)
Power Management Indicator

JP35(GR-S) EPMI Connector

L ED2(1DE-L) On-board Enhanced IDE R/W LED Connector

JP6 Power Supply Power Down Control Connector

. 22 User's Manual
 Memory Configuration

433 mainboard provides great flexibi l ity to support a number of

different on-board memory configurations.

Memory SlMM sockets are organized into four banks, with one
S l MM socket assigned to each memory banks. 433 mainboard
supports 1 MB, 2MB, 4MB, 8MB, 1 6MB, 32MB, and 64MB 72-
pin SlMM modules.

The fol lowing table shows the supported memory configuration

of 433 mainboard.

433 Memory Configuration Reference Table

BANK 0 BANK 1 BANK 2 BANK 3 TOTAL

1MB NONE NONE NONE 1MB

1MB 1MB NONE NONE 2MB

1MB 1MB 1MB NONE 3MB

1MB 1MB 1MB 1MB 4MB

2MB NONE NONE NONE 2MB

2MB 2MB NONE NONE 4MB

2MB 2MB 2MB NONE 6MB

2MB 2MB 2MB 2MB 8MB

4MB NONE NONE NONE 4MB

4MB 4MB NONE NONE 8MB

4MB 4MB 4MB NONE 12MB

4MB 4MB 4MB 4MB 16MB

8MB NONE NONE NONE 8MB

8MB 8MB NONE NONE 16MB

8MB 8MB 8MB NONE 24MB

8MB 8MB 8MB 8MB 32MB

16MB NONE NONE NONE 16MB

16MB 16MB NONE NONE 32MB

16MB 16MB 16MB NONE 48MB

16MB 16MB 16MB 16MB 64MB

User's Manual 23 •
 433 Memory Configuration Reference Table (Cont'd)

BANK 0 BANK 1 BANK 2 BANK 3 TOTAL

32MB NONE NONE NONE 32MB

32MB 32MB NONE NONE 64MB

32MB 32MB 32MB NONE 96MB

32MB 32MB 32MB 32MB 128MB

64MB NONE NONE NONE 64MB

64MB 64MB NONE NONE 128MB

64MB 64MB 64MB NONE 192MB

64MB 64MB 64MB 64MB 2 56MB

1MB 1MB 2MB 2MB 6MB

1MB 1MB 4MB 4MB lOMB

1MB 1MB 8MB 8MB 18MB

1MB 1MB 16MB 16MB 34MB

1MB 1MB 32MB 32MB 66MB

2MB 2MB 4MB 4MB 12MB

2MB 2MB 8MB 8MB 20MB

2MB 2MB 16MB 16MB 36MB

2MB 2MB 32MB 32MB 68MB

4MB 4MB 8MB 8MB 24MB

4MB 4MB 16MB 16MB 40MB

4MB 4MB 32MB 32MB 72MB

8MB 8MB 16MB 16MB 48MB

8MB 8MB 32MB 32MB 80MB

16MB 16MB 32MB 32MB 96MB

16MB 16MB 64MB 64MB 160MB

32MB 32MB 64MB 64MB 192MB

• 24 User's Manual
 Power Management

433 mainboard provides four power management modes for re­

ducing power consumption : On, Doze, S leep, and Suspend. When
entering each power management mode, 433 mainboard gener­
ate a distinguishable flashes via the turbo-LED.

433 mainboard also provide EPMI and power supply power down
connector to enchanced power management.

Power Management Modes Descripti on

ON mode. The ON mode is the normal operating mode of the

PC system. In this mode, the doze timer ( 1 5 sec to 5 1 2 m in)
starts counting when there is no activity. When the timer expire,
the system will enter into DOZE mode. The type of activities
monitored include Keyboard, VGA, IDE, COM port, LPT port,
Floppy, PCI master, ISA master, DMA, one programmable
memory region, and one programable 110 region.

DOZE mode. In this mode, CPU frequency is reduce to l/2 of

.10rmal frequency and the SLEEP timer (2 m in to 5 1 2 m in) starts
counting when there is no activity. When the timer expire, the
system will enter into SLEEP mode. The activities monitored
are the same as in ON mode.

SLEEP mode. In this mode, CPU frequency is reduce to 8 MHz.

The SUSPEND timer (2 min to 5 1 2 m in) starts counting if there
is no activity, and the CPU is a S- Series CPU. When the timer
expire, the system will enter into SUSPEND mode. The activi­
ties monitored are the same as in ON mode.

SUSPEND mode. In this mode, the CPU frequency is stop at

OM Hz, external cache is power down. The CPU will Auto-Wake­
Up by keyboard, mouse, modem, EPM I button, etc . . . The type of
activities for Auto-Wake-Up are programmable.

User's Manual 25 •
 Power M anagement Modes Indicator

Normally the "LED 1" (Turbo-LED) act as the turbo LED. But
when system goes into power management mode, the LED will
flashes to indicate the status of the power management modes.

a. In ON (Normal) mode, turbo-LED act as a turbo/normal

indicator.

b. In DOZE mode, turbo-LED flashes every second.

c. In SLEEP mode, turbo-LED flashes every two seconds.

d. In SUSPEND mode, turbo-LED is tum off.

EPM I Connector --- GR-S (JP35)

EPMI (External Power Management I nterrupt) pin is provided

for special platform, which offer a sleep(suspend)/resume but­
ton . Push ing the button will force 433 mainboard to go into
SLEEP or SUSPEND mode, depending on the type of the CPU.
The mainboard will restart when the button is push again.

Power Supply Power Down Connector-JP6

433 mainboard also provides a power supply power down con­

nector to control the external A.C. output on the system power
supply. If the power supply has signal connection to control the
A .C. output, then connect it to JP6. When 433 goes into SLEEP
or SUSPEND mode, the A.C. output will be tum off. By this
way, you can tum off other devices' power such as monitor.

• 26 User's Manual
BIOS Setup configures system information that is stored in CMOS
RAM . WinBIOS Setup offers an easy to use graphical user inter­
face that is similar to Microsoft Windows GUI . WinBIOS Setup
sets a new standard in BIOS user interfaces.

Starting WinBIOS Setup

As POST executes, the following message appears :

Hit <DEL> if you want to run SETUP

Press <Del> to run WinBIOS Setup.

Mouse Supports in WinBIOS Setup :

The following types of mouse devices are supported:

* PS/2- type mouse.

* Bus mouse that use I RQs 3, 4, or 5 (IRQ2 is not supported).

* M icrosoft-compatible mouse.

* Logitech C-series-compatible mouse using the MM protocol.

WinBIOS Setup can be accessed via keyboard, mouse, or pen.

The mouse c lick functions are :

single click to change or select both global and current field,

double click to perform an operation in the selected field.

User's Manual 27 •
 BIOS Setup Feature

The WinBIOS Setup main menu, shown below, is organized into

four w indows. Each window corresponds to a section in this
chapter.

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Each section contains several icons. Clicking on each icon acti­

vates a specific function. The WinBIOS Setup icons and func­
tions are described in this chapter. The sections are :

Setup

This section has five icons that permit you to set system configu­
ration options such as date, time, hard disk type, floppy type,
chipset parameter, power management, and peripherall/0 setup.

Utilities

This section has two icons that perform system functions.

Security

This section has one icon that control WinBlOS security fea­
tures.

• 28 User's Manual
 Default

This section has three icons that permit you to select a group of
settings for all WinBIOS Setup options.

Each WinBIOS Setup option has two default settings. These

settings can be applied to all WinBIOS Setup options when you
select the Default section on the WinBIOS Setup main menu.
The types of default are:

D
Original
Original This option restore the original setting that was
recorded in the CMOS RAM.

Q
OptiMal
Optimal This option will set the mainboard with the best
performance parameters.

[;J
Fai 1-safe
Fail-Safe This option set the mainboard w ith m in imum
startup parameters. If you cannot boot the com­
puter successfully, select the Fail-Safe WinBIOS
Setup options and try to diagnose the problem after
the computer boots. These settings do not pro­
vide optimal performance.

----- User's Manual 29 •

 Using the Keyboard with Win BIOS Setup

WinBIOS Setup has a built-in keyboard driver that uses simple

keystroke combinations :

Keystroke Function

<Tab> Move to the next window or field.

¢¢:>if{} Move to the next field to the right, left, above, or below.

<Enter> Select in the current field.

+ Increments a value.

-
Decrements a value.

<Esc> Closes the current operation and return to previous level.

<PgUp> Returns to the previous page.

<PgDn> Advances to the next page.

<Home> Returns to the beginning of the text

<End> Advances to the end of the text.

<Alt><H> Access a help window.

<Alt><Spacebar> Exit WinBIOS Setup.

Alphabetic keys A to Z are used in the Virtual Keyboard, and are not
casesensitive.

Numeric Keys 0 to 9 are used in the Virtual Keyboard and Numeric Keypad.

•3 0 User's Manual
 Standard Setup
Stancla:rcl

The WinBIOS Standard Setup option described in this section

are selected by choosing the approprite high-level icon from the
WinBIOS Setup main menu selection screen. The selection win­
dow follows.

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utu 1 tv

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nm•• I
Date and Time Configuration
: au. [!] l
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Dillt. Fri, 199!5

' liM ' '"'"" Select the Standard option. Select the Date and Time
I
icon. The current values for each category are dis­
'---·-- ·-···.!
played. Enter new values through the keyboard.

Floppy Drive A:, Floppy Drive 8:

0 Not Installed
ISJ 3G9 KB 5'4 •• Move the cursor to these fields and select the floppy
CJ 1.2 MB 5'4" � type. The settings are 360KB 5114 inch, 1.2MB 5114
CJ 7211 KB�·
CJ 1.44 MB�· inch, 720KB 3112 inch, 1.44MB inch, or 2.88MB 311
CJ 2.88 MB �·
2 inch.

Master Disk Type, Slave Disk Type

1!111!!1
Master Disk Select one of these hard disk drive icons to configure
the drive named in the option. A scrollable screen

User's Manual3 1 •
 that lists all valid disk drive types is displayed. Se­
lect the correct type and press <Enter>. If the hard
Slave Disk disk drive is an IDE drive, select Detect Master and
Detect Slave from the Utility section of the WinBIOS
Setup main menu to allow WinBIOS to automati­
cally detect the IDE drive parameters and report them
on this screen.

Using Auto Detect Hard Disk (Only for IDE

drives)
DetectMastel'
If you select Detect Master and Detect Slave from
the Utility section of the WinBIOS Setup main menu,
WinBIOS automatically fmds the IDE hard disk drive
parameters. WinBIOS places the hard disk drive pa­
DetectS! ave
rameters that it finds in the Drive Type fields in Stan­
dard Setup.

•3 2 User's Manual
Advanced Setup
Advanced
The WinBIOS Advanced Setup options described in this section
are selected by choosing the appropriate high-level icon from the
WinBIOS Setup main menu. The selection window is shown
below.

AMIBIOS SeiuF
<Cll!J94., AM�rican .-gat:rends Inc.

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System Keyboard

This option does not specify if a keyboard is attached to the com­

puter. Rather, it specifies if error messages are displayed if a
keyboard is not attached. This option permits you to configure
workstations with no keyboard. The settings are Present or Ab­
sent

Primary Display

Select this icon to configure the type of monitor attached to the

computer. The settings are Monochrome, Color 40 x 25, Color
80 x 25, VGAIPGAIEGA, or Not Installed.

Note: Current version of 433 mainboard does not support mono­

chrome display adapter.

User's Manual33 •
 Mouse Support

When this option is enabled, WinBIOS supports a PS/2-type

mouse. The settings are Enabled or Disabled.

Above 1MB Memory Test

When this option is enabled, the WinBIOS memory test is per­

formed on all system memory. When this option is disabled, the
memory test is done only on the first I MB of system memory.
The settings are Enabled or Disabled.

Memory Test Tick Sound

This option enables or disables the ticking sound during the

memory test. The settings are Enabled or Disabled.

Extended BIOS RAM Area

Specify in this option if the top 1 KB of the system programm ing

area beginning at 639K or 0:300 in the system BIOS area in low
memory will be used to store hard disk information. The set­
tings are Top DOS IK or 0:3 00.

System Boot Up Num Lock

When Off, this option turns off Num Lockfunction at startup. So

the numeric keypad can be use as the arrow keys. The settings
are On or Off

Floppy Drive Seek At Boot

When this option enabled, WinBIOS performs a Seek command

on floppy drive A: before booting the system. The settings are
Enabled or Disabled.

System Boot Up Sequence

This option sets the sequence of boot drive (either floppy drive
A; or hard disk drive C:) that WinBIOS attempts to boot from,
after POST completes. The settings are C: , A: or A:, C:.

•3 4 User's Manual
 System Boot Up CPU Speed

This option sets the speed of the CPU at system boot up time.
The settings are High or Low.

External Cache

This option enables or disables the external cache (L2) memory.

The settings are Enable or Disable.

Internal Cache

This option enables or disables the internal cache memory in the

486 processor. The settings are Enable or Disable.

Password Checking

This option enables the password checking option during the sys­
tem boot up. If Always is chosen, the password prompt appears
every time the computer is tum on. If Setup is chosen, the pass­
word prompt appears when WinBIOS is executed. The settings
are Always or Setup.

Video ROM Shadow COOO, 32K

When these options are set to Shadow, the video ROM area from
COOOOh - C7FFFh is copied (shadowed) to the RAM for faster
execution. The settings are Absent, NoShadow, or Shadow.

Shadow xxxx, 16K,

These options enable shadowing of the contents of the ROM area

named in the option title. The ROM area that is not used by I SA
adapter cards will be allocated to PCI adapter cards. The settings
are Absent, NoShadow, or Shadow.

....... User�Aianual35 •
 Advanced Setup Defaults

BIOS Default
[;J
OptiMal
[;J
Fai !-safe

System Keyboard Present Present

Primary Display YGA/EGA VGA!EGA

Mouse Support Disabled Disabled

Above I MB Memory Test Disabled Disabled

Memory Test Tick Sound Enabled Enabled

Extended BIOS RAM Area 0:300 0:300

System Boot Up Num Lock On On

Floppy Drive Seek At Boot Enabled Disabled

System Boot Up Sequence A : , C: C:, A :

System Boot U p CPU Speed High H igh

External Cache Enabled Disabled

Internal Cache Enabled Enabled

Password Checking Setup Setup

Video Shadow COOO, 32K Enabled Disabled

Shadow C800, 1 6K Disabled Disabled

Shadow CCOO, 1 6K Disabled Disabled

Shadow DOOO, 1 6K Disabled Disabled

Shadow D400, 1 6K Disabled Disabled

Shadow D800, 1 6K Disabled Disabled

Shadow DCOO, 1 6K Disabled Disabled

36 User's Manual
•
Chipset Setup
Chipset

The WinB IOS Chipset Setup options described in this section

are selected by choosing the appropriate h igh-level icon from the
WinB IOS Setup main menu. The selection w indow is shown
below.

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Auto Configuration Function

When this option is Enabled, B IOS automatically configures listed

features based on detection of the CPU clock frequency. when
this option is Disabled, B IOS leave these features to be manu­
ally adjusted by the user.

Note : Listed features on the table are ftxed under auto con­
figuration, generally, you should not change the settings. Oth­
erwise the mainboard may not work properly.

Recommend Chip Setup for Different System Clock

25MI-lz 33MI-lz 40MHz SOMI-lz

Cache Speed Options '2-1-2 . 2-2-2 '3- I-3 . 3-2-3

DRAM Read Wait States IWS. IWS. 2WS 3W S.

DRAM Write Wait States IWS. IWS 2WS. 3W S

PC!CLK-to-!SA SYSCLK Divsor PC!CLK/3 PC!CLK/4 PC!CLK/4 PCICLK/3

Keyboard Clock Divsor 7.16MI-lz 7.16MHz 7.16MI-lz 716MI-lz

User's Manual3 7 •
 Cache Speed Options

This option sets the cache burst read/write cycle. The optimal
setting depends on system clock speed. The settings are2-l-2, 2-
·

2-2, 3-1-3, or 3-2-3.

DRAM Read Wait State

This option sets the memory read wait state. The optimal set­
ting depends on system clock speed. The settings are I, 2, or 3
w.s.

DRAM Write Wait State

This option sets the memory write wait state. The optimal set­
ting depends on system clock speed. The settings are 0, I, 2, or
3 w.s.

PCICLK-to-ISA SYSCLK Divsor

This option sets the !SA clock that divide from PC! Clock. The
settings are PCICLKU2, PCICLKU3, or PCICLKU4.

Keyboard Clock Divsor

This option sets the keyboard clock frequency, derive from PCI
Clock. The settings are PCICLKU2, PCICLKU3, PCICLKU4,
or 7. 16MHz.

L2 Cache mode

This option sets the external cache scheme. The settings are
Write-Through or Write-Back.

L1Cache mode

This option sets the internal cache scheme of the processor. The
settings are Write- Through or Write-Back.

Main BIOS Cacheable

This feature sets the main BIOS in the FOOO-FFFF area to be

cacheable or non-cacheable. The settings are En abled or Dis­
abled.

• 38 Us er's Man ual

 Video BIOS Cacheable

This options sets the video BIOS in the COOO-C7FF area to be

cacheable or non-cacheable. The settings are En abled or Dis­
abled.

Host-to-PCI Post Write W /S

This option sets the Host to PCI post write (CPU bus) wait state
of the main board. The settings are 0 and I W. S.

Host-to-PCI Burst Write

This option sets the Host to PCI Burst write (CPU bus) enabled
or disabled. The settings are Enabled or Disabled.

Host-to-DRAM Burst Write

This option sets the Host to DRAM Burst write (CPU bus) to
enabled or disabled. The settings are En abled or Dis abled.

Post Write Buffer

This option sets the Post Memory Write Buffer enabled or dis­
abled. Enabling this option will enhance system performance.
The settings are En abled or Disabled.

Bus Park

This option sets the Bus Park enabled or disabled. Enabling this
option will enhance PCI performance. The settings are En abled
or Disabled.

------- User's Man ual 39 •

 Chipset Setup Defaults

BIOS Default
[;J
OptiMal
[;J
Fai l -safe

Auto Configuration Function Enabled Disabled

Cache Speed Options Not adjustable 2-2-2

DRAM Read Wait State Not adjustable 2 W. S.

DRAM Write Wait State Not adjustable 2 W. S.

PC ICLK-to- ISA SYSCLK Divsor Not adjustable PCICLK/4

Keyboard CLOCK Divsor 7 . 1 6 M Hz 7 . 1 6Mhz

L2 Cache mode Wr-Back Wr-Thru

L I Cache mode Wr-Thru Wr-Thru

Main BIOS Cacheable Disabled Disabled

Video B IOS Cacheable Enabled Disabled

Host-to-PCI Post Write W/S I W. S. I W . S.

Host-to-PCI Burst Write Disabled Disabled

Host-to-DRAM Burst Write Disabled Disabled

Post Write Buffer Enabled Disabled

Bus Park Enabled Disabled

• 40 User's Manual
Power M anagement Setup
Power Mg,..t

The WinBIOS Power Management Setup options described in

this section are selected by choosing the appropriate high-level
icon from the WinBIOS Setup main menu . The selection win­
dow is shown below.

Cl
AMIBJOS Setup
<C>19c94.. f\toWric�n M•md:r-ttnc\s Inc .

U t l l t t,»

: ITr I· ."'
APM Fu.nc t i on
Doze Mod• T i Meout
Sleep Mode TiM•out
Sus�nd. Mode T i -out
UCA PoloHr Down
HDD Po-r Down : D i sabled
Mon i to r PCI Mas t e r Cit : Disabled
: D i sa:blltd
____,
: D i sal> l e d []

Power Management

This option sets the mainboard power management function. The

settings are Enabled or Disabled.

APM Function

This option sets the main board APM (Advanced Power Manage­
ment) function. The settings are Enabled or Disabled.

Doze Mode Timeout

This option sets the timeout length of when the mainboard enters
the Doze mode. The settings range from 15 sec to 512 min.

Sleep Mode Timeout

This option sets the timeout length when the mainboard enters
the Sleep mode. The settings range from 2 min to 512 min or
disabled.

User 's Manual 41 •

 Suspend Mode Timeout

This option sets the timeout length when the mainboard enters
the SUSPEND mode. The settings range from 2 min to 512 min
or Disabled.

VGA Power Down

This option sets the blanking of the display screen when the
mainboard enters the Sleep or Suspend mode. The settings are
En abled or Disabled.

HOD Power Down

This option sets the timeout length of hard disk inactivity. When
the timer expire, the hard disk is placed in power down mode.
HDD Power Down is a stand along option, it does not affect or be
affected by the standard power management function. The set­
tings are from I min to 14 min or Disabled.

Monitor PCI Master x

This option calls for monitoring of the activity of the PCI Mas­
ter x . The timer will start counting, if Enabled, when there is no

activity detected. This option works in conjunction with the other

monitoring functions belows. The settings are Enabled or Dis­
abled.

Monitor LPT Port Activity

This option calls for monitoring of the activity of the LPT port.
The settings are En abled or Disabled.

Monitor COM Port Activity

This option calls for monitoring of the activity of the COM port.
The settings are Enabled or Disabled.

Monitor ISA Master&DMA Actvity

This option calls for monitoring of the activity of the ISA Mas­
terand DMAs. The settings are En abled or Disabled.

• 42 User's Man ual

Monitor IDE Activity

This option cal ls for monitoring of the activity of the IDE. The
timer will start counting, if Enabled, when there is no activity.
The settings are En abled or Dis abled.

Monitor FLP Activity

This option calls for monitoring of the activity of the FLP (Floppy
controller). The settings are Enabled or Dis abled.

Monitor VGA Activity

This option calls for monitoring of the activity of the VGA. The
settings are En abled or Disabled.

Monitor KBD Activity

Th is option calls for monitoring of the activity of the KBD (Key­

board). The settings are En abled or Dis abled.

Monitor 1/0 Region Activity

This option calls for monitoring of the activity of the program­

mable 110 port region. The settings are En abled or Disabled.

Monitor 1/0 Address

This option calls for monitoring of the activity of the 1/0 port
address. The settings range from I OOh to 3FFh .

Monitor IRQXX

This option calls for monitoring of the activity of the IRQxx (xx:
1 , 3, 4, 5, 6, 7, 9, 1 0, 1 1 , 1 2, 1 4, and 1 5). The settings are
En abled or Disabled.

Note: All the monitoring functions work in conjunc­

tion with each others. All the specified options have to
be met before the power management mode is activated.
Then these monitoring function act as the Wakeup ac­
tivities. If activity found on any of the specified option,
then the mainboard will exit the power management
mode.

User's Man ual 43 •

 Power Management Setup Defaults

BIOS Default
[;J
OptiMal
[;J
r a i l -safe

Power Management Disabled Disabled

APM Function Enabled Disabled

Doze Mode Timeout 2M in 1 5sec
Sleep Mode Timeout 4 M in Disabled
Suspend Mode Timeout 8Min Disabled
VGA Power Down Disabled Disabled
HOD Power Down D isabled Disabled
Monitor PC! Master x Disabled Disabled
Monitor LPT Port Activity Disabled Disabled
Monitor COM Port Activity Disabled Disabled

Monitor ! SA Master&DMA Activity Enabled Disabled

Monitor IDE Activity Enabled Disabled

Monitor FLP Activity Enabled Disabled
Monitor YGA Activity Disabled Disabled
Monitor KBD Activity Enabled Disabled

Monitored I/0 Region Activity Disabled Disabled

Monitor l/0 Addres.s 0 0

Monitor I RQ 1 5 Disabled Disabled
Monitor I RQ 1 4 Disabled Disabled
Monitor I RQ 1 2 Disabled Disabled

Monitor I RQ ! ! Disabled Disabled

• 44 User's Manual
BIOS Default
[;J
OptiMal
[;J
rai l - s afe

Monitor I RQ \ 0 Disabled Disabled

Monitor IRQ9 Disabled Disabled

Monitor IRQ8 Disabled Disabled

Monitor I RQ7 Disabled Disabled

Monitor IRQ6 Disabled Disabled

Monitor IRQ5 Disabled Disabled

Monitor IRQ4 Disabled Disabled

Monitor IRQ3 Enabled Disabled

Monitor I RQ ! Enabled Disabled

User 's Man ual 45 •

 Peripheral Setup IE!�
Per iphera l

The WinBIOS Peripheral Setup options described in this section

are selected by choosing the appropriate high-level icon from the
WinBIOS Setup main menu. The selection window is shown
below.

Cl
A"fBIOS S�tup
(C)1974,. IIIM«r-i.G&n Mega.t.,..n a. Inc,

PCI OnBoard IDE

This option sets the PCI on-board 2-channel IDE controller to be

enabled or disabled. The settings are Enabled or Disabled.

PCI Onboard Secondary IDE

This option sets the PCI on-board secondary IDE controller to be

enabled or disabled. The settings are Enabled or Disabled.

PCI OnBoard IDE Speed Mode

This option sets PCI on-board I DE controller's PIO speed mode.

The options are Mode I, Mode 2, Mode 3, and Disabled.

PCI IDE Card Present on

This option sets the PCI IDE Add-on card location on the PCI
slot. The settings are Slot I, Slot 2, Slot 3, Slot 4, or BIOS Auto
detecte. (If this feature is assigned, please Disable PC/ OnBoard
If)E)

• 46 User's Manual
 PCI IDE IRQ

This option sets the PCI IDE I RQ triggered mode. The settings
are Edge or Level. (This feature only affect PCI I DE add-on card)

PCI Primary IDE IRQ

This option sets the PCI Primary IDE IRQ. The settings are
INTA, INTB, INTC, or INTD. (This feature only affect PCI
IDE add-on card)

PCI Secondary IDE IRQ

This option sets the PCI Secondary IDE I RQ. The settings are
INTA, INTB, INTC, and INTD. (This feature only affect PCI
IDE add-on card)

IDE Block Mode

This option sets the IDE B lock mode. Enabling this option only
if the IDE hard disk installed supports block transfer mode. This
option will enhance the data transfer rate. The settings are 2, 4,
8, 16, 3 2, 64, Auto, or Disabled.

IDE 32 Bit Transfers Mode

This option set the IDE 32-bit transfers mode. Enabling will
enhance data transfer rate. But only 32 bit PCI IDE controller is
supported on this mainboard. The settings are Enabled or Dis­
abled.

Primary Master LBA Mode

This option sets the LBA mode for primary master IDE hard
disk over 528MB. If the installed hard disk is over 528MB, this
option must be enabled. The settings are Enabled or Disabled.

Primary Slave LBA Mode

This option sets the LBA mode for primary slave IDE h ard disk
over 528MB. The settings are Enabled or Disabled.

--------• User's Manual 47 •

 Second ary Ctrl Drives Present

This option sets the number of the IDE hard disk that is con­
nected to secondary channel port. If the IDE device c·onnected
to this port is other than the hard disk, please do not enter the
number in this option. The options are 1 , 2, and Disabled.

Secondary Master LBA Mode

This option sets the LBA mode for secondary master IDE hard
disk over 528MB. The settings are Enabled or Dis abled.

I
Secondary Slave LBA Mode

This option sets the LBA mode for secondary slave IDE hard
disk over 528MB. The settings are Enabled or Disabled.

I FDC Controller

I
This option sets the use and address of the on-board floppy drive
control ler. The settings are 3FJH, 3 7/H, or Disabled.

Primary Serial Port

This option sets the use and address of the on-board primary
serial port. The settings are 3F8H, 3£8H, or Dis abled.

Second ary Serial Port

This option sets the use and address of the on-board secondary
serial port. The settings are 2F8H, 2£8H, or Disabled.

Parallel Port

This option sets the use and address of the on-board parallel port.
The settings are 3 78H, 2 78H, or Disabled.

Parallel Mode

This option sets the on-board parallel port mode. The settings
are SPP (Standard Parallel Port), EPP (Enhanced Parallel Port),
or ECP (Extended Capabilities Port).

• 48 Us er's Manual
 Peripheral Setup Defaul ts

BIOS Default
[;J
OptiMal
[;J
Fai l -safe

PCI OnBoard I DE Enabled Disabled

PCI Onboard Secondary IDE Enabled Disabled

PCI OnBoard IDE Speed Mode Disabled Disabled

PCI IDE Card Present on Auto Auto

PCI I DE I RQ Edge Level

PCI Primary IDE IRQ INT A INT A

PCI Secondary IDE IRQ INT B INT B

IDE Block Mode Disabled D isabled

IDE 32 Bit Transfers Mode Disabled Disabled

Primary Master LBA Mode Disabled Disabled

Primary Slave LBA Mode Disabled Disabled

Secondary Ctrl Drives Present None None

Secondary Master LBA Mode Disabled Disabled

Secondary S lave LBA Mode Disabled Disabled

FDC Controller 3FI H Disabled

Primary Serial Port 3F8H Disabled

Secondary Serial Port 2F8H Disabled

Parallel Port 378H Disabled

Parallel Mode Disabled Disabled

------ User's Manua/ 49 •

 Win BIOS Password Support
Passwo:rd

WinBIOS Setup has an optional password feature. The system

can be configured so that the users must enter a password every
time the system boots or when WinBIOS Setup is executed. The
following screen appears when you select the password icon.

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II I I I I I

You can enter a password by:

0 typing the password on the keyboard,

0 selecting each letter via the mouse, or
0 selecting each letter via the pen stylus.

Pen access must be customized for each specific hardware plat­

form.

The password check option is enabled in Advanced Setu p by

choosing either Always or Setup . The password is stored in
CMOS RAM.

The password can be from I to 6 alphanumeric word. Please

make sure the password is noted down. If password is forgotten,
the CMOS RAM must be drain and system must be reconfigure.
WinBIOS will then display the following :

50 User's Manual
•
 .:.. A...•.io.n AMlBJOS Set.u.p
� "'!'!�•-nels

U t.l ll-ty

=
II

II 1!.1

D I!I II II:I EI I'I IJ

Set U s e 'r Pou;'!>word.

Select the Password icon from the Security section of Win B I OS

main menu. Enter the password and press <Enter>. The screen
will not display the characters entered. After the new password
is entered, you will be ask to retype the new password again for
confirmation.

If the password confirmation is incorrect, an error message ap­

pears. Then please repeat the step above. If the new password is
entered w ithout error, press <Esc> to return to the WinBIOS
Setup Main Menu. The password is now stored in CMOS RAM
after WinBIOS Setup completes. The next time the system boots,
you will be prompted for the password then.

Remember the Password

Keep a record of the new password when the password is changed.

If the password is forgotten, you must drain CMOS RAM and
reconfigure the system again in order to regain access to the sys­
tem . .

User's Manual 51 •
 Appendix

MEMORY MAP

The fol lowing table shows the use of the fiirst megabyte of
memory.

Codes Length Description

000000 - 0002 FFh 768 bytes BIOS lntenupt Vector Table

000300 - 0003FFh 256 bytes BIOS Stack Area

000400 - 0004FFh 256 bytes BIOS Data Area

000500 - 09FFFFh 640 KB Applications Memory, used by the operating system,

device drivers, TSRs, and all DOS applications.

OAOOOO - OBFFFFh 1 28 KB Video Buffer (EGA and VGA)

OBOOOO - OB7FFFFh 32 KB Video Buffer (for Monochrome, CGA color, and

VGA monochrome).

OB8000 - OBFFFFh 32 KB Video Buffer (for CGA, EGA color, and VGA color).

OCOOOO - OC7FFFh 32 KB Video ROM (EGA and VGA)

OC8000 - OCFFFFh 32 KB Unused. Reserved for Adaptor ROMs (other devices

requiring ROMs).

ODOOOO - ODFFFFh 64 KB Used by Adaptor ROMs, such as Network

Controllers, Hard Disk Controllers, and SCSI Host
Adaptors.

OEOOOO - OEFFFFh 64 KB Used by System ROM, which can include Network

Controllers with boot-up capabilities, and other
devices. lfthe system BIOS is 1 28KB in length (an
EISA BIOS), the first 64KB ofROM is here.

OFOOOO - OFFFFFh 64 KB System BIOS , which includes the BIOS Setup

utility and hard disk utilities.

• 52 User's Manual
 I/O MAP

[000-0 I F] DMA controller (Master)

[020-02 1 ] INTERRUPT control ler (Master)

[022-02 3 ) CHIPSET control registers 1/0 Ports

[040-0SF] TIMER control registers

[060-06F] KEYBOARD interface controller (8042)

[070-07F] RTC ports ·and C MOS I/0 ports

[080-09F] DMA register

[OAO-OBF] INTERRUPT controller (Slave)

[OCO-ODF] DMA controller (Slave)

[OFO-OFF] MATH CORPROCESSOR

[ I FO- I F8] HARD DISK control ler

[278-27F) PARALLEL port-2

[2B0-2DF] GRAPHICS adapter controller

[2F8-2FF] SERIAL ports-2

[378-37F] PARALLEL port- !

[3B0-3BF] MONOCHROME and PRINTER adapter

[3C0-3CF] EGA adapter

[3D0-3DF] CGA adapter

[3F0-3F7] FLOPPY DISK controller

[3F8-3FF] SERIAL port- !

------- User's Manual 53 •

 TIMER MAP

TIMER Channel - 0 System timer interrupt

TIMER Channel - 1 DRAM REFRESH request

TIMER Channel - 2 SPEAKER tone generator

DMA CHANNEL MAP

DMA Channel - 0 Available

DMA Channel - I IBM SDLC

DMA Channel - 2 FLOPPY DISK adapter

DMA Channel - 3 Available

DMA Channel - 4 Cascade for DMA controller 1

DMA Channel - 5 Available

DMA Channel - 6 Available

DMA Channel - 7 Available

54 User 's Manual

•
INTERRUPT MAP

NMI Parity check

IRQ 0 System TIMER interrupt from TIMER-0

KEYBOARD controller

2 Cascade for I RQ 8- 1 5

3 SERIAL port 2

4 SERIAL port I

5 PARALLEL port 2

6 FLOPPY DISK adapter

7 PARALLEL port I

8 RTC clock

9 Available

10 Available

II Available

12 Available

13 MATH coprocessor

14 HARD DISK adpater

15 Available

------- User's Manual55 •

 Error Beeps and Message

Error can occur during POST (Power On Self Test), which is

performed every time the system is powered on. Fatal errors are
communicated through a series of audible beeps. All errors ex­
cept Beep Code 8 are fatal errors. Fatal errors do not allow the
system to continue the boot process. Most displayed errors allow
the system to continue the boot process.

Beeps Error message Des cription

Refresh Failure The memory refresh circuitry on the mainboard is

faulty.

2 Parity Error Parity error in the first 64KB of memory.

3 Base 64KB Memory Memory failure in first 64KB.

Failure

4 Timer Not Operational Memory fai lure in the first 64KB of memory, or
Timer I on the main board is not functioning.

5 Processor error The CPU on the main board generated an error.

6 8042 - Gate A20 Failure The keyboard controller (8042) may be bad. The
BIOS cannot switch to protected mode.

7 Processor Exception The CPU generated an exception interrupt.

interrupt Error

8 Display Memory Read/ The system video adapter is either missing or its
Write Error memory is fault error.

9 ROM Checksum Error The ROM checksum value does not match the value
encoded in the BIOS

10 CMOS Shutdown The shutdown register for CMOS RAM failed.

Register Read/Write
Error

11 Cache Error/External The external cache is faulty.

Cache Bad

• 56 User's Manual
AM/BIOS POS T Checkpoint Codes

POST is performed by the BIOS when the system is reset or

rebooted. POST performs diagnostics tests on system parts and
initialized key system components. When a POST routine com­
pletes, a code is written to 1/0 port address SOh. Display this
code by attach ing diagnostic equipment to port SOh.

The fo l l o w i n g POST checkpoint codes are v a l i d for 4 3 3

mainboard's WinBIOS.

Codes Description

0Ih Processor register test starting and NMI will be disabled.

02h NMI is Disabled. Power on delay starting.

03h Power on delay complete. Checking soft reset and power-on next.

05h Soft reset and power determined. Enabling ROM next and disabling
shadow RAM and cache memory, if any.

06h ROM is enabled. Calculating ROM BIOS checksum.

07h ROM BIOS checksum passed. CMOS shutdown register test to be done
next.

08h CMOS shutdown register test done. CMOS checksum calculation to be

done next.

09h The CMOS checksum calculation is done and the CMOS RAM
Diagnostic byte has been written. CMOS RAM initial ization is next if the
Initialized CMOS At Every Boot option is set.

OAh CMOS RAM is initialized. The CMOS RAM status register will be
initial ized for Date and Time next.

OBh The CMOS RAM status register has been initialized. Any initial ization
before the keyboard BAT test will be done next.

OCh The keyboard controller VB is free. Issuing the BAT command to the
keyboard controller next.

ODh The BAT command wa� issued to the keyboard controller. VerifYing the
BAT command next.

OEh The keyboard controller BAT result has been verified. Any initial ization
after the keybaord controller BAT command will be done next.

User 's Manual 57 •

 Codes Description

OFh Initial ization after the keyboard controller BAT command is done. The
keyboard command byte will be written next.

I Oh The keyboard con toller command byte has been written. Issuing the
keyboard controller pin 23 and 24 blocking the unblocking command
next.

I Ih Keyboard controller pins 23 and 24 have been blocked and unblocked.

1 2h Checked if<lns> key was pressed during power-on. Disabling the DMA
and Interrupt controllers.

1 3h DMA controllers I and 2 and interrupt controllers I and 2 have been

disabled. The video display is disabled and port B is initialized.
Initializing the chipset and doing automatic memory detection next.

1 4h Chipset initialization and automatic memory detection has completed.

Next, uncompressing the POST code if the BIOS has been compressed.

I Sh The POST code has been umcompressed. The 8254 timer test is next.

1 9h The 8254 timer test has completed. Starting the memory refresh test.

! Ah The memory refresh l ine has been toggled. Checking the 1 5u second ON/
OFF time next.

20h The memory refresh period 30u second test has completed. Starting the
base 64KB memory and address line test next.

2lh The address line test passed. Toggl ing parity next.

22h Parity has been toggled. The sequential data Read/Write test on the base
64KB of system memory is next.

23h The base 64KB sequential data Read/Write test passed. Next, setting the
BIOS stack and doing any required configuration before the interrupt
vector initialization.

24h The configuration required before vector initial ization has been completed.
Interrupt vector initial ization is next.

25h Interrupt vector initial ization is done. Reading the input port ofthe 8042
for turbo switch (if any) and clearing the password if the POST Diagnostic
switch is on.

26h The input port of the 8042 has been read. Initial izing global data for the
turbo switch.

27h The global data initialization for the turbo switch is done . Any required
initial ization before setting the video more will be done next.

28h Initial ization before setting the video mode has completed. Setting the
monochrome mode and color mode.

58 User '.\" Manual

•
Codes Description

2Ah The monochrome and color modes have been set. Toggling parity before
the optional video ROM test.

2Bh Finished toggling parity. Passing control for required configuration before
optional video ROM check.

2Ch Processing before video ROM control is done. Searching for optional
video ROM and passing control to this ROM, if present.

2Dh Optional video ROM control is done. Passing control to do any processing
after video ROM returns control to POST.

2Eh Return from processing after the video ROM control. IfEGA or VGA
video is not found, will do the display memory Read/Write test.

2Fh EGANGA not found. Next, displaying the memory Read/Write test.

30h The memory Read/Write test passed. Searching forretrace checking next.

31h Display memory R!W test or retrace checking failed. Performing the
alternate display memory Read/Write test next.

32h The alternate display memory Read/Write test passed. Searching for
alternate display retrace checking next.

34h Video display checking over. The display mode will be set next.

37h Display mode set. Display the power on message.

39h New cursor position read and saved. Displaying the Hit <DEL> message
next.

3Bh The Hit <DEL> message has been displayed. The virtual mode memory
test is next.

40h Preparing the descriptor tables next.

42h The descriptor tables have been prepared. Entering virtual mode for the
memory test next.

43h Entered virtual mode. Enabling interrupts for diagnostics mode next.

44h Interrupts enabled (if the diagnostics switch is no). Initial izing data to
check memory wrap at O:Oh.

45h Data initialized. Checking for memory wraparound at O:Oh and finding
the total system memory size.

46h Memory wraparound test done. Memory size calculation over. Writing
patterns in memory to test memory next.

47h Pattern to be tested written in extended memory. Write patterns in base

640K.B memory.

User's Manual59 •
 Codes Description

48h Pattern written in base memory. Determining the amount of memory

below I MB memory.

49h Amount of memory below 1 MB found and verified. Determi ning the
amound of memory above I MB next.

4Bh Amount of memory above I MB found and verfied. Checking for soft reset
and clearing the memory below I MB for a soft reset. (I fat power on, go to
checkpoint 4Eh).

4Ch Memory below I MB cleared. Next, doing a soft reset to clear memory
above 1 MB .

4Dh Memory above I MB cleared via a soft reset. Saved the memory size.
Going to checkpoint 52h next.

4Eh Memory test started. A soft reset was not done. Displaying the first 64KB
memory size next.

4Fh The memory size display has started and will be updated during the
memory test. The sequential and random memory tests will be performed
next.

SOh Memory testing the initial ization of the memory below I MB is complete.
Adjust the displayed memory size for memory relocation and shadowing
next.

5 lh The memory size display was adjusted because of memory relocation and
shadowing. The test of the memory above I MB will be done next.

52h The testing and initialization of the memory above I MB has complete.
Next, saving the memory size information.

53h The memory size information has been saved. The CPU registers have
been saved. Entering real mode next.

54h The shutdown was successful and the CPU is in real mode. Disabling the
Gate A20 line next.

57h The Gate A20 address line is disabled. Adjusting the memory size
depending on the memory relocation and/or shadowing parameters.

58h The memory size has been adjusted for memory relocation and/or
shadowing. Clearing the Hit <DEL> message next.

59h The Hit <DEL> message has been cleared. The Wail. . . message is being
displayed. Starting the DMA and interrupt controller tests next.

60h DMA page register test passed . The DMA controller I base register test is
next.

62h The DMA controller I base register test passed. Starting the DMA
controller 2 base register test next.

60 User's Manual
•
Codes Description

65h The DMA controller 2 base register test passed. Programming DMA
controllers I and 2 next.

66h DMA controllers I and 2 have been programmed. Initializing the 8259
interrupt controllers next.

67h 8259 initial ization has completed. Starting the keyboard test next.

80h The keyboard test has started. Clearing the output buffer and checking for
stuck keys. The keyboard reset command will be issued next.

81h A keyboard reset error or stuck key was found. Issuing the keyboard
controller interface test command next.

82h The keyboard controller interface test completed. Writing the command
byte and initializing the circular buffer next.

83h The keyboard command byte was written and global data initialization has
completed. Checking for a locked keyboard next.

84h Keyboard locked key checking has completed. Checking for a memory
size mismatch with the data in CMOS RAM.

85h The memory size check has completed. Displaying soft errors, checking
for a password, or bypassing WINBIOS and AMIBIOS Setup next.

86h The password as been checked. Doing programming before WINBIOS

and AM !BIOS Setup runs next.

87h Programming before WIN BIOS and AMIBIOS Setup has completed.
Uncompressing the WINBIOS and AMIBIOS Setup code and executing
WINBIOS and AMIBIOS Setup next.

88h Returned from WINBIOS and AMIBIOS Setup and screen is cleared.
Doing programming after WIN BIOS and AMIBIOS Setup next.

89h Programming after WINBIOS and AMIBIOS Setup has completed.

Display the power-on screen message next.

8Bh First power-on screen message displayed. The Wait . . . message is also
displayed. Shadowing ofthe system BIOS and Video BIOS will be done
next.

8Ch The system and Video BIOS have been shadowed successfully. Program­
ming system configuration options after WINBIOS and AMIBIOS Setup
about to start.

8Dh The WINBIOS and AMIBIOS Setup options have been programmed. The
mouse check and initialization will be done next.

8Eh The mouse check and initialization have completed. Resetting the hard
disk controller next.

J
User's Man ual61 •
 Codes Description

8Fh The hard disk controller has been reset. The floppy drive will be
configured next.

91h Floppy configuration is complete. Hard disk configuration will be done

next.

94h Hard disk configuration has complete. Setting the base and extended
memory sizes next.

96h The memory size was adjusted because ofPS/2 mouse support and hard
disk type 47. Next performing any initialization required before passing
control to the adaptor ROM at C8000h.

97h Initialization before C8000h adaptor ROM control has completed.

Checking the C8000h adaptor ROM, then passing control to it next.

98h C8000h adaptor ROM has passed control back to WIN BIOS and
AMIBIOS POST. Doing any required processing after C8000h adaptor
ROM returns control next.

99h The initialization required after the adaptor ROM test has completed.
Configuring the timer data area and printer base address.

9Ah The timer and printer base addresses have been configured. Configuring
the RS-232 base 1/0 port address next.

9Bh The RS-232 base UO port address has been configured. Performing any
initialization required before the coprocessor test next.

9Ch The required initial ization before the coprocessor test has completed.
Initializing the coprocessor next.

9Dh The coprocessor has been initial ized. Doing any required initialization
after the coprocessor test next.

9Eh The required initialization after the coprocessor test has completed.
Checking the extended keyboard, keyboard 10, and Num Lock key next.

9Fh The exteded keyboard check is done and the keyboard ID flag is set. The
Num Lock key has been turned On or Off as specified in WINBIOS and
AMIBIOS Setup. The keyboard 1D command will be issued next.

AOh The keyboard ID command was issued. The keyboard ID flag will be
reset next.

Alh The keyboard I D flag has been reset. The cache memory test will b e done
next

A2h The cache memory test has completed. Displaying any soft errors next.

A3h The soft errors have been displayed. Setting the keyboard typematic rate
next.

62 User's Manual
•
Codes Description

A4h The keyboard typematic rate has been set. Programming the memory wait
states next.

A5h The memory wait states have been programmed. Clearing the screen and
enabling parity and the NMI next.

A7h The NMI and parity have been enabled. Performing any required
initial ization before passing control to the adaptor ROM at EOOOOh next.

ASh Any required initialization before the EOOOOh adaptor ROM gains control
has been completed. The EOOOOh adaptor ROM gets control next.

A9h Control returned to WINBIOS and AMIBIOS POST from the EOOOOh
adaptor ROM. Performing any required initial ization after EOOOOh
adaptor ROM control next.

AAh Any required initialization after the EOOOOh adaptor ROM had control has
completed. Displaying the WINBIOS and AMIBIOS system configura­
tion screen next.

BOh The WINBIOS and AMIBIOS system configuration is displayed.

Uncompressing the WINBIOS and AMIBIOS Setup code for hotkey setup
next, if required.

BIh The WINBIOS and AM !BIOS Setup code for hotkey setup has been
uncompressed. Copying any required code to a specific area.

OOh The code has been copied to a specific area done. Passing control to the
INT 19h boot loader.

User's Manua/63 •
 FCC Notice:
This equipment has been tested and found to comply with the limits for a
Class B digital device, pursuant to Part 1 5 of FCC Rules. These l im its
are designed to provide reasonable protection against harmfu l interfer­
ence in a residential installation. This equipment generates, uses and can
radiate radio frequency energy and, if not installed and used properly. In
strict accordance with the manufacturer's instructions, may cause harm­
ful interference to radio communications. However, there is no guaran­
tee that interference will not occur in a particular installation. If this
equipment does cause interference to radio or television reception, which
can be determ ined by turning the equipment off and on, the user is en­
couraged to try to correct the interference by one or more of the following
measures :

Reorient or relocate the receiving antenna.

Increase the separation between the equipment and receiver.

Connect the equipment into an outlet on a circuit different from that to

which the receiver is connected.

Consult the dealer or an experienced radio/television techn ician

for help and for additional suggestions.

The user may find the following booklet prepared by the Federal Commu­
nications Commission helpful "How to Identify and Resolve Radio-TV
Interference Problems." This booklet is available from the U.S. Govern­
ment Printing Office. Washington, DC 20402, Stock o. 004-000-00345-4

FCC Warning

The user is cautioned that changes or modifications not expressly ap­

proved by the manufacturer could void the user's authority to repair this
equipment.

Note : In order for an installation of this product to maintain compli­

ance with the limits for a Class B device, shielded cables and power cord
must be used.

• 64 User's Manual