Module 1-CMEE
Module 1-CMEE
Module 1-CMEE
We put an arrow on each edge to indicate the positive direction for currents running through
the graph.
Incidence matrices
The incidence matrix of this directed graph has one column for each node of the graph and
one row for each edge of the graph:
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
If an edge runs from node a to node b, the row corresponding to that edge has −1 in column a
and 1 in column b; all other entries in that row are 0. If we were studying a larger graph we
would get a larger matrix but it would be sparse; most of the entries in that matrix would be
0. This is one of the ways matrices arising from applications might have extra structure.
Note that nodes 1, 2 and 3 and edges 1, 2 and 3(which are represented by circled numbers)
form a loop. The matrix describing just those nodes and edges looks like:
Note that the third row is the sum of the first two rows; loops in the graph correspond to
linearly dependent rows of the matrix.
To find the nullspace of A, we solve Ax = 0:
If the components xi of the vector x describe the electrical potential at the nodes i of the
graph, then Ax is a vector describing the difference in potential across each edge of the graph.
We see Ax = 0 when x1 = x2 = x3 = x4, so the null space has dimension 1. In terms of an
electrical network, the potential difference is zero on each edge if each node has the same
potential. We can’t tell what that potential is by observing the flow of electricity through the
network, but if one node of the network is grounded then its potential is zero. From that we
can determine the potential of all other nodes of the graph.
The matrix has 4 columns and a 1 dimensional null space, so its rank is 3. The first,
second and fourth columns are its pivot columns; these edges connect all the nodes of the
graph without forming a loop – a graph with no loops is called a tree.
The left null space of A consists of the solutions y to the equation: ATy = 0. Since AT has 5
columns and rank 3 we know that the dimension of N(AT) is m-r = 2. Note that 2 is the
number of loops in the graph and m is the number of edges. The rank r is n -1, one less than
the number of nodes. This gives us # loops = # edges- (# nodes-1), or:
Kirchhoff’s law
In our example of an electrical network, we started with the potentials xi of the nodes. The
matrix A then told us something about potential differences. An engineer could create a
matrix C using Ohm’s law and information about the conductance of the edges and use that
matrix to determine the current yi on each edge. Kirchhoff’s Current Law then says that ATy =
0, where y is the vector with components y1, y2, y3, y4, y5. Vectors in the null space of AT
correspond to collections of currents that satisfy Kirchhoff’s law.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
x = x1, x2, x3, x4 AT y = 0
potentials at nodes Kirchhoff’s Current Law
e = Ax ↓ ↑ AT y
x2 − x1, etc. potential y = Ce
differences −→ y1, y2, y3, y4, y5 currents on
Ohm’s edges
Law
Written out, ATy = 0 looks like:
Multiplying the first row by the column vector y we get −y1 − y3 − y4 = 0. This tells us that the
total current flowing out of node 1 is zero – it’s a balance equation, or a conservation law.
Multiplying the second row by y tells us y1 − y2 = 0; the current coming into node 2 is
balanced with the current going out. Multiplying the bottom rows, we get y2 + y3 − y5 = 0 and
y4 + y5 = 0.
We could use the method of elimination on AT to find its column space, but we already
know the rank. To get a basis for N(AT) we just need to find two independent vectors in this
space. Looking at the equations y1 − y2 = 0 we might guess y1 = y2 = 1. Then we could use
the conservation laws for node 3 to guess y3 = -1and y5=0. We satisfy the conservation
condition on node 4.
the conductance of the edges and use that matrix to determine the current yi on each edge.
Kirchhoff’s Current Law then says that ATy = 0, where y is the vector with components y1,
y2, y3, y4, y5. Vectors in the nullspace of AT correspond to collections of currents that satisfy
Kirchhoff’s law.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
This vector represents one unit of current flowing around the loop joining nodes 1, 2 and 3; a
multiple of this vector represents a different amount of current around the same loop.
We find a second basis vector for N(AT) by looking at the loop formed by nodes 1, 3 and 4:
The vector
that represents a current around the outer loop is also in the nullspace, but it is the sum of the
first two vectors we found.
We’ve almost completely covered the mathematics of simple circuits. More complex circuits
might have batteries in the edges, or current sources between nodes. Adding current sources
changes the ATy = 0 in Kirchhoff’s current law to ATy = f. Combining the equations e = Ax, y
= Ce and ATy = f gives us:
ATCAx = f.
Network Matrices
We know that a power system network can be converted into an equivalent impedance
diagram. This diagram forms the basis of power flow (or load flow) studies and short circuit
analysis. In this chapter we shall discuss the formation of bus admittance matrix (also known
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
as Ybus matrix) and bus impedance matrix also known as Zbus matrix. These two matrices are
related by.
Zbus= Ybus-1 (1)
We shall discuss the formation of the Ybus matrix first. This will be followed by the discussion
of the formation of the Zbus matrix.
(2)
We shall use this Norton’s theorem for the formulation of the Ybus matrix.
Fig. 3.1 (a) Voltage source with a source impedance and (b) its Norton equivalent.
For the time being we shall assume the short line approximation for the formulation of
the bus admittance matrix. We shall thereafter relax this assumption and use the -
representation of the network for power flow studies. Consider the 4-bus power system
shown in Fig. 3.2. This contains two generators G1 and G2 that are connected through
transformers T1 and T2 to buses 1 and 2. Let us denote the synchronous reactances of G1 and
G2 by XG1 and XG2 respectively and the leakage reactances of T1 and T2 by XT1 and XT2
respectively. Let Zij, i = 1, , 4 and j = 1, , 4 denote the line impedance between buses i
and j.
Then the system impedance diagram is as shown in Fig. 3.3 where Z11 = j(XG1 + XT1)
and Z22 = j(XG2 + XT2). In this figure the nodes with the node voltages of V1 to V4 indicate the
buses 1 to 4 respectively. Bus 0 indicates the reference node that is usually the neutral of the
Y-connected system. The impedance diagram is converted into an equivalent admittance
diagram shown in Fig. 3.4. In this diagram Yij = 1/Zij, i = 1, , 4 and j = 1, , 4. The voltage
sources EG1 and EG2 are converted into the equivalent current sources I1 and I2 respectively
using the Norton’s theorem discussed before.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Fig. 3.2 Single-line diagram of a simple power network.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
(3)
or
(4)
It can be easily seen that we get (1) from (3.3) and (4).
Consider node (bus) 1 that is connected to the nodes 2 and 3. Then applying KCL at
this node we get
(5)
In a similar way application of KCL at nodes 2, 3 and 4 results in the following equations
(6)
(7)
(8)
(9)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
(10)
In general the format of the Ybus matrix for an n-bus power system is as follows
(11)
where
(12)
It is to be noted that Ybus is a symmetric matrix in which the sum of all the elements of the kth
column is Ykk.
Z11 = Z22 = j0.25, Z12 = j0.2, Z13 = j0.25, Z23 = Z34 = j0.4 and Z24 = j0.5
Y11 = Y22 = j4, Y12 = j5, Y13 = j4, Y23 = Y34 = j2.5 and Y24 = j2
per unit
per unit
It can be seen that like the Ybus matrix the Zbus matrix is also symmetric.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Let us now assume that the voltages EG1 and EG2 are given by
per unit
Sometimes it is desirable to reduce the network by eliminating the nodes in which the
current do not enter or leave. Let (3.3) be written as
(13)
In the above equation IA is a vector containing the currents that are injected, Ix is a null vector
and the Ybus matrix is portioned with the matrices K, L and M. Note that the Ybus matrix
contains both L and LT due to its symmetric nature.
(14)
(15)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Substituting (3.15) in (3.14) we get
(16)
(17)
We then have
per unit
Substituting I1 = 460 per unit and I2 = 490 per unit we shall get the same values of V1
and V2 as given in Example 1.
Inspecting the reduced Ybus matrix we can state that the admittance between buses 1
and 2 is j6.8978. Therefore the self admittance (the admittance that is connected in shunt) of
the buses 1 and 2 is j4 per unit (= j10.8978 + j6.8978). The reduced admittance diagram
obtained by eliminating nodes 3 and 4 is shown in Fig. 5. It is to be noted that the impedance
between buses 1 and 2 is the Thevenin impedance between these two buses. The value of this
impedance is 1/(j6.8978) = j0.145 per unit.
(18)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
where A is an (nn) real or complex valued matrix, x and b are vectors in either Rn or Cn.
assume that the b vector has a zero element in the nth row such that (18) is given as
(19)
We can then eliminate the kth row and kth column to obtain a reduced (n 1) number of
equations of the form
(20)
(21)
In a similar way we can calculate the other elements. Finally eliminating the last row and last
column, as all these elements are zero, we get the new Ybus matrix as
Further reducing the last row and the last column of the above matrix using (21), we obtain
the reduced Ybus matrix given in Example 2.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
So far we have assumed that the transmission lines are modeled with lumped series
impedances without the shunt capacitances. However in practice, the Ybus matrix contains the
shunt admittances for load flow analysis in which the transmission lines are represented by its
-equivalent. Note that whether the line is assumed to be of medium length or long length is
irrelevant as we have seen in Chapter 2 how both of them can be represented in a -
equivalent.
Consider now the power system of Fig. 2. Let us assume that all the lines are
represented in an equivalent- with the shunt admittance between the line i and j being
denoted by Ychij. Then the equivalent admittance at the two end of this line will be Ychij/2. For
example the shunt capacitance at the two ends of the line joining buses 1 and 3 will be Ych13/2.
We can then modify the admittance diagram Fig. 4 as shown in Fig. 6. The Ybus matrix of (10)
is then modified as
(3.22)
where
(23)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Fig. 6 Admittance diagram of the power system Fig.2 with line charging capacitors.
Equation (3.1) indicates that the bus impedance and admittance matrices are inverses
of each other. Also since Ybus is a symmetric matrix, Zbus is also a symmetric matrix. Consider
a 4-bus system for which the voltage-current relations are given in terms of the Ybus matrix as
(24)
(25)
This implies that Y11 is the admittance measured at bus-1 when buses 2, 3 and 4 are short
circuited. The admittance Y11 is defined as the self admittance at bus-1. In a similar way the
self admittances of buses 2, 3 and 4 can also be defined that are the diagonal elements of the
Ybus matrix. The off diagonal elements are denoted as the mutual admittances. For example
the mutual admittance between buses 1 and 2 is defined as
(26)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
The mutual admittance Y12 is obtained as the ratio of the current injected in bus-1 to the
voltage of bus-2 when buses 1, 3 and 4 are short circuited. This is obtained by applying a
voltage at bus-2 while shorting the other three buses.
(27)
(28)
i.e., the driving point impedance is obtained by injecting a current at bus-1 while keeping
buses 2, 3 and 4 open-circuited. Comparing (26) and (28) we can conclude that Z11 is not the
reciprocal of Y11. The transfer impedance between buses 1 and 2 can be obtained by injecting
a current at bus-2 while open-circuiting buses 1, 3 and 4 as
(29)
Equation (1) gives the relation between the bus impedance and admittance matrices.
However it may be possible that the topology of the power system changes by the inclusion
of a new bus or line. In that case it is not necessary to recompute the Ybus matrix again for the
formation of Zbus matrix. We shall discuss four possible cases by which an existing bus
impedance matrix can be modified.
Let us assume that an n-bus power system exists in which the voltage-current
relations are given in terms of the bus impedance matrix as
(30)
The aim is to modify the matrix Zorig when a new bus or line is connected to the power
system.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
It is assumed that a new bus p (p > n) is added to the reference bus through an
impedance Zp. The schematic diagram for this case is shown in Fig. 7. Since this bus is only
connected to the reference bus, the voltage-current relations the new system are
(31)
This is the case when a bus, which has not been a part of the original network, is
added to an existing bus through a transmission line with an impedance of Zb. Let us assume
that p (p > n) is the new bus that is connected to bus k (k < n) through Zb. Then the schematic
diagram of the circuit is as shown in Fig. 3.8. Note from this figure that the current Ip flowing
from bus p will alter the voltage of the bus k. We shall then have
(32)
In a similar way the current Ip will also alter the voltages of all the other buses as
(33)
(34)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
(35)
To accomplish this we first assume that an impedance Zb is added from a new bus p to
an existing bus k. This can be accomplished using the method discussed in Section 3.2. Then
to add this bus k to the reference bus through Zb, we set the voltage Vp of the new bus to zero.
However now we have an (n + 1) (n + 1) Zbus matrix instead of an n n matrix. We can
then remove the last row and last column of the new Zbus matrix using the Kron’s reduction
given in (21).
Let us assume that we add an impedance Zb between two existing buses k and j as
shown in Fig. 9. Therefore the current injected into the network from the bus k side will be Ik
Ib instead of Ik. Similarly the current injected into the network from the bus j side will be Ij
+ Ib instead of Ij. Consequently the voltage of the ith bus will be
(36)
Similarly we have
(37)
and
(38)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Fig. 9 An impedance is added between two existing buses.
We shall now have to eliminate Ib from the above equations. To do that we note from
Fig. 3.9 that
(39)
(40)
(41)
where
(42)
We can now eliminate the last row and last column using the Kron’s reduction given in (21).
We shall now use the methods given in Sections 3.1 to 3.4 for the direct determination
of the Zbus matrix without forming the Ybus matrix first. To accomplish this we shall consider
the system of Fig. 2 and shall use the system data given in Example 1. Note that for the
construction of the Zbus matrix we first eliminate all the voltage sources from the system.
Step-1: Start with bus-1. Assume that no other buses or lines exist in the system. We
add this bus to the reference bus with the impedance of j0.25 per unit. Then the Zbus matrix is
(43)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Step-2: We now add bus-2 to the reference bus using (31). The system impedance
diagram is shown in Fig. 3.10. We then can modify (43) as
(44)
Step-3: We now add an impedance of j0.2 per unit between buses 1 and 2 as shown in
Fig. 11. The interim Zbus matrix is then obtained by applying (41) on (44) as
Eliminating the last row and last column using the Kron’s reduction of (31) we get
(45)
Step-4: We now add bus-3 to bus-1 through an impedance of j0.25 per unit as shown
in Fig. 12. The application of (35) on (45) will then result in the following matrix
(46)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Fig. 12 Network of step-4.
Step-5: Connect buses 2 and 3 through an impedance of j0.4 per unit as shown in Fig.
13. The interim Zbus matrix is then formed from (41) and (46) as
(47)
Step-6: We now add a new bus-4 to bus-2 through an impedance of j0.5 as shown in
Fig. 14. Then the application of (35) on (47) results in the following matrix
(48)
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Fig. 14 Network of step-6.
Step-7: Finally we add buses 3 and 4 through an impedance of j0.4 to obtain the
network of Fig. 3 minus the voltage sources. The application of (41) on (48) results in the
interim Zbus matrix of
Eliminating the 5th row and column through Kron’s reduction we get the final Zbus as
(49)
The Zbus matrix given in (49) is the as that given in Example 1 which is obtained by inverting
the Ybus matrix.
To establish relationships between the elements of the Zbus matrix and Thevenin
equivalent, let us consider the following example.
Example 4: Consider the two bus power system shown in Fig. 15. It can be seen that
the open-circuit voltages of buses a and b are Va and Vb respectively. From (11) we can write
the Ybus matrix of the system as
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Fig. 3.15 Two-bus power system of Example 3.4.
(50)
Now consider the system of Fig. 15. The Thevenin impedance of looking into the
system at bus-a is the parallel combination of Zaa and Zab + Zbb, i.e.,
(51)
Similarly the Thevenin impedance obtained by looking into the system at bus-b is the parallel
combination of Zbb and Zaa + Zab, i.e.,
(52)
Hence the driving point impedances of the two buses are their Thevenin impedances.
Let us now consider the Thevenin impedance while looking at the system between the
buses a and b. From Fig. 15 it is evident that this Thevenin impedance is the parallel
combination of Zab and Zaa + Zbb, i.e.,
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
With the values given in (3.50) we can write
(53)
As we have seen in the above example in the relation V = ZbusI, the node or bus
voltages Vi, i = 1, , n are the open circuit voltages. Let us assume that the currents injected
in buses 1, , k 1 and k + 1, , n are zero when a short circuit occurs at bus k. Then
Thevenin impedance at bus k is
(54)
From (51), (52) and (54) we can surmise that the driving point impedance at each bus is the
Thevenin impedance.
Let us now find the Thevenin impedance between two buses j and k of a power
system. Let the open circuit voltages be defined by the voltage vector V and corresponding
currents be defined by I such that
(55)
Now suppose the currents are changed by I such that the voltages are changed by V. Then
(56)
(57)
Let us now assume that additional currents Ik and Ij are injected at the buses k and j
respectively while the currents injected at the other buses remain the same. Then from (57)
we can write
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
(58)
(59)
(60)
Since Zjk = Zkj, the network can be drawn as shown in Fig. 16. By inspection we can
see that the open circuit voltage between the buses k and j is
(61)
(62)
Also during the short circuit Vk Vj = 0. Therefore combining (59) and (60) we get
(63)
Combining (61) to (63) we find the Thevenin impedance between the buses k and j as
(64)
The above equation agrees with our earlier derivation of the two bus network given in (53).
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
Fig. 16 Thevenin equivalent between buses k and j.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.
M.Ebraheem
Asst. Professor
Dept. of EEE, GIT, GU.