4-Digital and Analog

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DIGITAL AND ANALOG

INSTRUMENTATION PROCESSES
ANALOG & DIGITAL SIGNALS
 Continuous-time signals
 It is 'continuous' in that it is
present at all times
 continuous does not mean that
it goes on for ever
 Discrete-time signals
 are defined at particular or
discrete instants only-
 they are usually sampled
signals.
 Digital signals
 a discrete-time signal where
the sampled, analogue values
have been converted to their
equivalent digital values.
BINARY SYSTEM
Decimal Code Binary Code
 Based on two symbols or states 0 0 0000
and 1(binary digits or bits). 1 0001
 When a number is represented 2 0010
by this system, the digit position 3 0011
in the number indicates the 4 0100
weight attached to each digit 5 0101
increases by a factor of 2 as we 6 0110
proceed from right to left. 7 0111
8 1000
 Bit 0- Least significant bit(LSB)
9 1001
 The highest bit- the Most
10 1010
Significant Bit (MSB)
11 1011
 Word:-combination of bits to 12 1100
represent a number 13 1101
 Byte-a group of 8 bits 14 1110
15 1111
ANALOGUE TO DIGITAL CONVERSION

 Converting analogue signals to binary words.


 Fig below shows the basic elements of AD conversion
CONT…
 A clock supplies regular time signal pulses to the ADC
and every time it receives a pulse it samples the analog
signal.
 A sample and hold unit is used to hold each sampled
value until the next pulse occurs.
 It is used b/se the ADC requires a finite amount of time,
termed conversion time, to convert the analog signal into
a digital one.
CONT…
 The electronic switch, S,
is closed, causing the
capacitor to charge to the
current value of the input
voltage.
 After a brief time interval
the switch is reopened, so
keeping the sampled
voltage across the
capacitor constant while
the ADC carries out its
conversion...
ADC
 ADC is a two step process: Quantization and coding
 Quantizing : discretization of the sampled signal amplitude.
 In practice, because the quantization process takes a finite amount of time, the
sampled signal amplitude has to be held constant during this time.
 Coding: the assignment of a digital code word or number to
each output state.

 With 3 bits there are 8


possible output levels.
 There is a range of inputs
for which the output does
not change(Output can be
only one of these 8 possible
levels).
CONT….

 Quantization level: eight posible output levels


 Quantization interval: the difference in analogue
between voltage between two adjacent levels……1V
 Resolution: the smallest change in input which will
result in a change in the digital output.

 Example: A sensor gives a maximum analog output of


10V. What word length is required for an analog-to-
digital converter if there is to be a resolution of 9.8mV.
SAMPLING THEOREM
 How often should an analog signal
be sampled in order to give an
output which is representative of
the analog signal?
 Nyquist criterion: the sampling
rate must be at least twice that of
the highest frequency in the
analog signal.
 Too slow sampling rate (low
frequency) leads to an error called
Aliasing.
 Too fast sampling rate(high
frequency) may create error due to
high level noises.
ALIASING
 A signal will not usually have a single frequency but will
consist of a very wide range of frequencies.
 A low pass filter has the job of removing signal frequencies
greater than fs/2, where fs is the sampling frequency. This
is the role of the anti-aliasing filter.
 An anti-aliasing filter is a low pass filter with a cut-off
frequency of fs/2. The important frequency of fs/2 is
usually called the Nyquist frequency.
DIGITAL TO ANALOGUE CONVERSION
 This converts the processed digital value back to an equivalent
analogue voltage.
 Output is an analogue signal that represents the weighted sum of the
non-zero bits represented by the word.
 Input: Binary word
 Output: Analogue signal
DIGITAL TO ANALOGUE CONVERTERS
 Weighted-resistor Network
 Uses a summing amplifier

 Electronic switches respond to binary 1

 Resistor from LSB being halved

 Sum of the voltages is a weighted sum of the non zero


bits in the input word.
 Accurate resistances have to be used(very difficult)
CONT…
 R-2R ladder Network
 It is a resistor ladder network connected to an
inverting summer op-amp circuit
 It requires only two precision resistance values (R and
2R) and resolves the problems of the binary-weighted
resistor network
 Output voltage is generated by switching sections of
the ladder to either Vs or 0V according to whether
there is a 1 or 0 in the digital input.
CONT…
 8bit latched input-ZN558D DAC(detail description on page 77…..)
W. Bolton, Mechatronics, 2nd ed.,
ANALOGUE TO DIGITAL CONVERTERS
 Successive approximation
 A regular sequence of pulses is generated by a clock and is
registered in binary manner
 Voltage rises in steps and will be converted to analogue
signal using DAC
 Will be compared with analogue input signal from sensor
 If voltage from clock passes voltage from input, gate closes
 The output from the counter at that time is then a digital
representation of the analogue voltage.
Clock Controls the admission of pulses to
Comparator the storage register
Analogue
input Gate 1 0 0 0 4Bit storage
register

DAC

Digital output
EXAMPLE
 A 4-bit Successive-approximation ADC is shown in Fig.
below. If the input voltage is 5.1 V and the DAC has Vout =
8 V for 2 bit (MSB) and Vout = 1 V for 2 bit (LSB)
Solution:
 Step #1: The MSB is set to 1 then the output of DAC is 8 V
which is greater than the input of 5.1 V. The output of the
comparator is LOW causing the MSB in the SAR to be reset
to 0 as shown in Fig.
CONT…
 Step #2: The 2 bit is set to 1 then the output of DAC is 4
V which is less than the input of 5.1 V. The output of the
comparator is HIGH causing this bit to be retained in the
SAR as shown in Fig. (b).
CONT…
 Step #3: The 2 bit is set to 1 then the total output of DAC
is 6 V which is greater than the input of 5.1 V. The output
of the comparator is LOW causing the this bit in the SAR
to be reset to 0 as shown in Fig. (c).
CONT…
 Step #4: The 2 bit is set to 1 then the output of DAC is 5 V
which is less than the input of 5.1 V. The output of the
comparator is HIGH causing this bit to be retained in the
SAR as shown in Fig. (d).
 The four bits have been tried, thus completing the
conversion cycle. At this point the binary code in the
register is 0101, which is approximately the binary value of
the input 5.1 V. Additional bits will produce more accurate
results. The SAR is cleared at the beginning of each cycle.
CONT…
 ZN439-8bit ADC(see page 79 for detail…)
W. Bolton, Mechatronics, 2nd ed.,
MULTIPLEXERS
 Have inputs from a number of sources and then, by selecting
an input channel, give an output from just one of them.
 Is an electronic switching device which enables each of the
inputs to be sampled in turn.
 Has inputs from number of sources
 Give an output from one input
DIGITAL MULTIPLEXERS

 Used to select digital


data inputs.
DATA ACQUISITION
 The process of taking data from sensors and inputting
that data into a computer for processing.
 The DAQ board is a printed circuit board that for analog
inputs provides a multiplexer, amplification, ADC,
registers and control circuitry so that the sampled digital
signals are applied to the computer system.
CONT…
 Control software is used to control the acquisition of data via the DAQ
board.
 When the program requires an input from a particular sensor, it
activates the board by sending a control word to (type of operation the
board has to carry out) the control and status register.
 The board switches the multiplexer to the appropriate channel.
 Input from sensor passed via amplifier to ADC then to data register.
 Word in the control & status register changes to show that signal has
arrived.
 The computer then issues a signal for the data to be read and taken
into the computer for processing.
 DAQ board PC-LMP-16 for IBM computer (see page 86 for detail… )
~END~

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