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ECD-213 Digital Electronics and Logic Design

End Scwester Examination
29 Nov, 2019(Morning) [Time Duration: 3.0 Hours] Roll No.:

Max. Marks [50 Marks]

Note: Attempt all ten questions. Take suitable assumptions wherever required.

1. (a.) Convert decimal number 1000 into its hexadecimal equivalent. [1 Marks]
(b) Convert binary number 10010110 into its octal number equivalent, [I Marks]
(c) Simplify the boolean expression Z = (X + Y)(X + Y)+ (X + Y) + X. [1 Marks]
(d) How do you detect If two 4-bit signals are same,? [1 Marks]
(e) Implement XOR. Gate using XNOR gate. [1 Marks]
2. (a) Latch is also a flip flop.Justify the statement.. [1 Marks]
(1.)) What is Race-around Problem? How can you rectify it'? [1 Marks]
(c) 7 Bit Ring Counter's initial state is 0100010. After how many clock cycles Will it
return to the initial state? [1 Marks]
(d) Design AND gate using 2:1 Multiplex [1 Marks]
(e) Differentiate PLA and PAL?. [1 Marks]
3. Design the circuit of a Full Subtractor from A Full Adder ? [5 Marks]

4. Figure shows a BCD counter that. produces four bit output, representing the BCD code for
the number . of pulses that have been applied to the counter input. For example ,after four
pulses have occurred, the counter output. arc DCI3A=0100=4. The counter resets to 0000
on the tenth pulse and start counting over again. In other words. the DCBA outputs will
never represent a. number grater than 1001=9. Design the logic circuit that produces a
HIGH output whenever the count is 2.3 or 9. Use K mapping and take advantage of the
don't-care conditions. [5 Marks]

HIGH only when

DCBA = 210 , 310, pi 9,

5. For the given function F(w. x. y, >1; in (0. 3, 4, 5, 8. 11, 12, 13, 14, 15).List all the prime
implicants and find the minimum sum of product form. [5 Marks]

1
 level sensors are oeing usea to oetect wnenever level in me tam: A ana ii rises aoove a
predetermined level. Temperature
801180D4 in
tanks C and D detect when the tempera( urp
in either of these tanks drops below a prescribed temperature limit. Assume that the liquid
- level sensor outputs A and B are LOW when the level is satisfactory and HIGH when the
level is too high. Also the temperature sensor C and D are LOW w
too low. Design a logic circuit that Will detect whenever the level hen in the
tanktemperature o
A and is tois
high at the same time that the temperature in either tank C and D is too low. [5B
.40 Marks]
7. In the Figure below, where an analog to digital converter is monitoring the de voltage
of a 12V storage battery on an orbiting spaceship
binary number, The converter's output. is a four bit
ABCD,corresponding
MSB.The converter's binary outputs are fed back to a to in steps of 1 V,with A as the
to the battery voltage
high output as long as the binary gic circuit that is to produce a
values is greater than 01102 -.=.- 610
voltage is greater than 6V.Design this logic circuit ; that, is ,the batteiy
.
[5 Marks]

1 Analog- A
-48.4
----1,--1 to• B
. r.-
tI Itgital C
tcnnverte. D • .,:lreolt
i

8.
Design the circuit of a NAND Gate using CMOS logic family as well as TTL Logic fain-
ily?Also compare both the circuits on the basis of digital system parameters? [5 Marks]
9. A newXY
inputs XYareflip00,01,10,11
flop has four operations:Complementreset to 0,hold and set to 1.when
reapectivelyTabulat
c
and show how the XY flip flop call be converted to the
a.,characteristic
T flip flop. table,excitation table
15 Marks]
10. The figure shown below has a clock signal of 204,18-MHz square wave.

a
• :

(a)
What will be the frequency at the C and D output ?
(b)
What will be duty cycle of the signal at outputs C and D?
(c)
What is the mod number of this counter?

[5 Marks]