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    TD Micro Chap2

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    Eliana Ibrahim
    The document contains a chapter from a textbook on microprocessors. It lists 12 exercises related to MIPS assembly language instructions. The exercises ask the reader to translate between C code and MIPS assembly, manipulate values in memory, optimize MIPS code, and write MIPS code for procedures like swapping array elements.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    TD Micro Chap2

    Uploaded by

    Eliana Ibrahim
    16 views2 pages
    The document contains a chapter from a textbook on microprocessors. It lists 12 exercises related to MIPS assembly language instructions. The exercises ask the reader to translate between C code and MIPS assembly, manipulate values in memory, optimize MIPS code, and write MIPS code for procedures like swapping array elements.

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    TD_micro_Chap2

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    The document contains a chapter from a textbook on microprocessors. It lists 12 exercises related to MIPS assembly language instructions. The exercises ask the reader to translate between C code and MIPS assembly, manipulate values in memory, optimize MIPS code, and write MIPS code for procedures like swapping array elements.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    16 views2 pages

    TD Micro Chap2

    Uploaded by

    Eliana Ibrahim
    The document contains a chapter from a textbook on microprocessors. It lists 12 exercises related to MIPS assembly language instructions. The exercises ask the reader to translate between C code and MIPS assembly, manipulate values in memory, optimize MIPS code, and write MIPS code for procedures like swapping array elements.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    Microprocessor - Chapter 2 – Exercises

    1. For the MIPS assembly instructions below, what is the corresponding C statement? Assume
    that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4,
    respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7,
    respectively.

    sll $t0, $s0, 2 # $t0 = f * 4


    add $t0, $s6, $t0 # $t0 = &A[f]
    sll $t1, $s1, 2 # $t1 = g * 4
    add $t1, $s7, $t1 # $t1 = &B[g]
    lw $t3, 0($t0) # $t3 = A[f]
    addi $t2, $t0, 4
    lw $t0, 0($t2)
    add $t0, $t0, $t3
    sw $t0, 0($t1)

    2. For the MIPS assembly instructions in the previous Exercise, rewrite the assembly code to
    minimize the number if MIPS instructions (if possible) needed to carry out the same function.

    3. Show how the value 0xabcdef12 would be arranged in memory of a little-endian and a big-
    endian machine. Assume the data is stored starting at address 0.

    4. Provide the type and assembly language instruction for the following binary value: 0000 0010
    0001 0000 1000 0000 0010 0000 2

    5. Provide the type and hexadecimal representation of following instruction: sw $t1, 32($t2).

    6. Assume $t0 holds the value 0x00101000. What is the value of $t2 after the following
    instructions?
    slt $t2, $0, $t0
    bne $t2, $0, ELSE
    j DONE
    ELSE: addi $t2, $t2, 2
    DONE:

    7. Translate the following C code to MIPS assembly code. Use a minimum number of
    instructions. Assume that the values of a, b, i, and j are in registers $s0, $s1, $t0, and $t1,
    respectively. Also, assume that register $s2 holds the base address of the array D.
    for(i=0; i<a; i++)
    for(j=0; j<b; j++)
    D[4*j] = i + j;

    8. How many MIPS instructions does it take to implement the C code from Exercise 7? If the
    variables a and b are initialized to 10 and 1 and all elements of D are initially 0, what is the
    total number of MIPS instructions that is executed to complete the loop.

    Dr. Rosy Aoun Microprocessor - Chapter 2- Exercises 1


    9. Consider the following code:
    lbu $t0, 0($t1)
    sw $t0, 0($t2)

    Assume that the register $t1 contains the address 0x1000 0000 and the register $t2 contains
    the address 0x1000 0010. Note the MIPS architecture utilizes big-endian addressing. Assume
    that the data (in hexadecimal) at address 0x1000 0000 is: 0x11223344. What value is stored
    at the address pointed to by register $t2?

    10. Write the MIPS assembly code that creates the 32-bit constant 0010 0000 0000 0001 0100
    1001 0010 0100two and stores that value to register $t1.

    11. Write the instructions for the pseudo-instructions:


    a. bge $t0, $t1, TEST
    b. blt $t0, $t1, TEST
    c. ble $t0, $t1, TEST
    d. bgt $t0, $t1, TEST

    12. Write the MIPS assembly code that executes the following procedure.
    void swap(int v[ ], int k)
    {
    int temp;
    temp = v[k];
    v[k] = v[k+1];
    v[k+1] = temp;
    }

    Dr. Rosy Aoun Microprocessor - Chapter 2- Exercises 2

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