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    HSADC

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    demosteness
    1. The document shows a circuit diagram with multiple integrated circuits and passive components connected. 2. Power is provided to the circuit from a +3V0 source and ground connections are made through GNDA nodes. 3. The diagram includes voltage regulators, digital potentiometers, and other ICs used to interface with external components through an 8-pin pinpad connector.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    HSADC

    Uploaded by

    demosteness
    48 views1 page
    1. The document shows a circuit diagram with multiple integrated circuits and passive components connected. 2. Power is provided to the circuit from a +3V0 source and ground connections are made through GNDA nodes. 3. The diagram includes voltage regulators, digital potentiometers, and other ICs used to interface with external components through an 8-pin pinpad connector.

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    © © All Rights Reserved

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    1. The document shows a circuit diagram with multiple integrated circuits and passive components connected. 2. Power is provided to the circuit from a +3V0 source and ground connections are made through GNDA nodes. 3. The diagram includes voltage regulators, digital potentiometers, and other ICs used to interface with external components through an 8-pin pinpad connector.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    48 views1 page

    HSADC

    Uploaded by

    demosteness
    1. The document shows a circuit diagram with multiple integrated circuits and passive components connected. 2. Power is provided to the circuit from a +3V0 source and ground connections are made through GNDA nodes. 3. The diagram includes voltage regulators, digital potentiometers, and other ICs used to interface with external components through an 8-pin pinpad connector.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    You are on page 1of 1

    1 2 3 4 5 6

    A A

    U3
    +3V0 VCC
    TPL740-3.0
    5 1
    VOUT VIN

    C14

    GND
    C13 3
    EN
    0.1uF 0.1uF

    2
    R1 0 C12 1uF
    GNDA

    U2 3PA1030
    GND
    C9 C10 28 2
    AVDD DVDD
    +3V0 1uF 0.1uF
    +3V0
    B 23 17 B
    C1 1uF MODE STBY
    GNDA
    R4 20
    CLAMPIN GND
    GNDA U1 19 16
    6

    18k CLAMP OE
    5

    3 TPH2501 J1
    V+

    + PinPad2x8
    DISABLE

    1 R3 27 ADC_IN 27 13 D10
    AIN OVR D0 1 16
    R10 100K 4 12 D9
    R2 - D9
    V-

    D1 2 15 GNDA
    3.3k C7 21 11 D8
    REFTS D8 D2 3 14 Vin
    2

    270pF 10 D7
    D7 D3 4 13
    25 9 D6
    GNDA REFBS D6 D4 5 12 CLK
    GNDA GNDA 8 D5
    GNDA D5 D5 6 11 D10
    26 7 D4
    VREF D4 D6 7 10 D9
    R5 10k 6 D3
    D3 D7 8 9 D8
    18 5 D2
    C11 1p REFSENSE D2
    C4 0.1uF 4 D1
    C2 C6 D1
    1uF 0.1uF 22 3 D0
    C8 REFTF D0
    0.1uF
    24 15 CLK
    REFBF CLK
    C5 0.1uF
    1 14
    C AGND DGND C
    GNDA
    R9 0

    GNDA GND

    Using ADC from 3Peak


    Designed by Gongyu Su
    For national competition use
    EETREE
    Sheet: /
    D File: HSADC.sch D

    Title: 10bit/50Msps High Speed ADC Module


    Size: A4 Date: 2020-09-12 Rev: V0.9
    KiCad E.D.A. kicad (5.1.6)-1 Id: 1/1
    1 2 3 4 5 6

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