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    SOC - Apr 26

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    Jagan V
    This document outlines a training schedule that includes topics on VLSI design, Verilog HDL, and lab sessions on ModelSim and Quartus Prime. The training will take place over 4 weeks, with sessions from Monday to Friday between 5-8 PM. Sessions will include live Q&As, self-paced learning on the eLearn portal, and hands-on labs. Topics will cover VLSI introduction, Verilog data types, operators, advanced concepts, finite state machines, and system-on-chip design. Participants will complete quizzes to check their knowledge and work on 6 labs.

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    © All Rights Reserved
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    SOC - Apr 26

    Uploaded by

    Jagan V
    7 views2 pages
    This document outlines a training schedule that includes topics on VLSI design, Verilog HDL, and lab sessions on ModelSim and Quartus Prime. The training will take place over 4 weeks, with sessions from Monday to Friday between 5-8 PM. Sessions will include live Q&As, self-paced learning on the eLearn portal, and hands-on labs. Topics will cover VLSI introduction, Verilog data types, operators, advanced concepts, finite state machines, and system-on-chip design. Participants will complete quizzes to check their knowledge and work on 6 labs.

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    SOC_ Apr 26

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    This document outlines a training schedule that includes topics on VLSI design, Verilog HDL, and lab sessions on ModelSim and Quartus Prime. The training will take place over 4 weeks, with sessions from Monday to Friday between 5-8 PM. Sessions will include live Q&As, self-paced learning on the eLearn portal, and hands-on labs. Topics will cover VLSI introduction, Verilog data types, operators, advanced concepts, finite state machines, and system-on-chip design. Participants will complete quizzes to check their knowledge and work on 6 labs.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    7 views2 pages

    SOC - Apr 26

    Uploaded by

    Jagan V
    This document outlines a training schedule that includes topics on VLSI design, Verilog HDL, and lab sessions on ModelSim and Quartus Prime. The training will take place over 4 weeks, with sessions from Monday to Friday between 5-8 PM. Sessions will include live Q&As, self-paced learning on the eLearn portal, and hands-on labs. Topics will cover VLSI introduction, Verilog data types, operators, advanced concepts, finite state machines, and system-on-chip design. Participants will complete quizzes to check their knowledge and work on 6 labs.

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    Link for Live Session (Microsoft

    Days of week Timing Topic Mode of Learning Presenter


    Teams)
    Vimala &
    06.00 PM to 7:00 PM Induction and Elearn Demo Live Q & A https://bit.ly/3UpC3CW
    Mega
    Wednesday
    VLSI Introduction, SOC design & ASIC v/s
    6:00 PM to 7:00 PM Elearn portal
    FPGA
    Thursday 6:00 PM to 7:00 PM Week 1: Live Q & A Live Q & A Click here to join the session Mega

    Friday 6:00 PM to 7:00 PM VLSI design flow & Knowledge check Quiz Elearn portal

    Monday 5:00 PM to 7:00 PM Verilog HDL & Knowledge check quiz Elearn portal
    Tuesday 5:00 PM to 7:00 PM Datat types & Knowledge check quiz Elearn portal

    Elearn portal & Using Tools-Model sim &


    Wednesday 5:00 PM to 7:00 PM Lab1
    Quartis prime

    6:00 PM to 7:00 PM Week 2: Live Q & A Live Q & A Click here to join the session Mega
    Thursday Verilog Operators & Knowledge check
    7:00 PM to 8:00 PM Elearn portal
    quiz

    Elearn portal & Using Tools-Model sim &


    Friday 5:00 PM to 7:00 PM Lab2
    Quartis prime

    Monday 5:00 PM to 7:00 PM Advanced verilog for verification Elearn portal

    Advanced verilog for verification & Elearn portal & Using Tools-Model sim &
    Tuesday 5:00 PM to 7:00 PM
    Knowledge check quiz Quartis prime

    Elearn portal & Using Tools-Model sim &


    Wednesday 5:00 PM to 7:00 PM Lab3
    Quartis prime
    6:00 PM to 7:00 PM Week 3 :Live Q & A Live Q & A Click here to join the session Mega
    Thursday
    7:00 PM to 8:00 PM Assignments & Knowledge check quiz Elearn portal
    Elearn portal & Using Tools-Model sim &
    Friday 5:00 PM to 7:00 PM Lab4
    Quartis prime
    Link for Live Session (Microsoft
    Days of week Timing Topic Mode of Learning Presenter
    Teams)

    Structural procedures & Knowledge check


    Monday 5:00 PM to 7:00 PM Elearn portal
    quiz

    Synthesis coding style & Knowledge check Elearn portal & Using Tools-Model sim &
    Tuesday 5:00 PM to 7:00 PM
    quiz Quartis prime

    Elearn portal & Using Tools-Model sim &


    Wednesday 5:00 PM to 7:00 PM Lab5
    Quartis prime
    6:00 PM to 7:00 PM Week 4: Live Q & A Live Q & A Click here to join the session Mega
    Thursday Finite State machine & Knowledge check
    7:00 PM to 8:00 PM Elearn portal
    quiz

    Elearn portal & Using Tools-Model sim &


    Friday 5:00 PM to 7:00 PM Lab6 & Summary
    Quartis prime
    Monday 5:00 PM to 7:00 PM Revison on SOC design Elearn portal
    Tuesday 5:00 PM to 7:00 PM Revison on Lab1 & Lab2 Elearn portal
    Wednesday 5:00 PM to 7:00 PM Revison on Lab3 & Lab4 Elearn portal
    Thursday 5:00 PM to 7:00 PM Revison on Lab5 & Lab6 Elearn portal
    Friday 5:00 PM to 7:00 PM Generate Certificate - Reminder Elearn portal

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