An 991

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MOTOROLA, APPLICATION NOTE Order this document by ANSSI/D ta SEMICONDUCTOR cE ANS91 Using the Serial Peripheral Interface to Communicate Between Multiple Microcomputers As the complexity of user applications increases, many de- ‘signers find themselves needing multiple microprocessors to Provide necessary functionality in a circuit. Communication between multiple processors can often be dificult, especially ‘when differing processors are used. A possible solution to this, problem is usage of the serial peripheral interface (SPI), an interface intended for communication between integrated cir- ‘cuits on the same printed wire board. The MCBBHCO5CA is ‘one of the frst single-chip microcomputers to incorporate SPI into hardware. One advantage of the SPI is that it can be provided in software, allowing communication between two ‘microcomputers where one has SP! hardware and one does ‘not. Special interfacing is necessary when using the hardware ‘SPI to communicate with a microcomputer that does not in- clude SPI hardware. This interface can be illustrated with @ Circuit used to displ either tempereture or time, that incor- pporates both a MCESHCO5C4 and a MCSS70ER3. The |MCE8HCOSC4 monitors inputs from a keypad and controts the ‘SPI data exchange, while the MCB8705R3 determines tem- perature by performing an analog-to-digital conversion on in- _buts from a temperature sensor and controls the LED display. Communication between the microcomputers is handled via ‘SPI, with the MCS8HCO5C4 handling exchanges in hardware, ‘and the MC8S706R3 handling them in software. Usage of software SPI can be expanded to include circuits where the single-chip implementing the SPI in software con- trols the data exchange, and those in which neither single cchip has hardware SPI capability. Minor modifications to the ‘SPI code are necessary when data exchanges are controlled by the software. Debugging designs including multiple processors can often bbe confusing. Some of the confusion can be alleviated by ‘careful planning of both the physical debugging environment ‘and the order in which software is checked. ‘SERIAL PERIPHERAL INTERFACE Communication between the two processors is handled via the serial peripheral interface (SPD. Every SPI system consists ‘of one master and one or more slaves, where a master is defined as the microcomputer that provides the SPI clock, and a slave is any integrated circuit that receives the SPI clock from the master. Its possible to have @ system where more than one IC can be master, but there can only be one master {at any given time. In this design, the MCSBHCOSCA is the master and the MCBS705R3 is the slave. Four basic signals, master-out/slave-in (MOSI), master-in/stave-out (MISO), se- Fal clock (SCK), and slave select (SS), are needed for an SPI. ‘These four signals are provided on the MCEBHCO5CA on port D, pins 2-5. @MOTOROLA INC, 187 SIGNALS ‘The MOS! pin is configured as a data output on the master and a data input on the slave. This pn is used to transfer data ‘serially from the master to a slave, in this case the MCEBHCISC4 to the MCSE705R3. Data is transforred most significant bit frst. ‘Data transfer from slave to master is carried out across the MISO, masterin/siave-out, ine. The MISO pin is configured {38 an input on the master device and an output on the slave device. As with data transfers across the MOSI line, data is ‘transmitted most significant bit frst. ‘All data transfers are synchronized by the serial clock. One bit of data is transferred every clock pulse, and one byte can be exchanged in eight clock cycles. Since the serial clock is (generated by the master, itis an input on the slave. The serial clock is derived ftom the master’s internal processor clock, and clock rate is selected by setting bits 0 and 1 of the serial Peripheral control register to choose one of four dlvide-by values. Values for the MCUs crystal oscilstors and the SPI divide-by must be chosen so that the SPI clock is no faster than the internal processor clock on the slave. The last of the four SPI signals is the slave select (SS). Slave select is an active low signal, and the SS pin isa fixed input which is used to enable a slave to receive data. A master will become a slave when it detects a low level on its SS line. In this design, the MCESHCOSC4 is always the master, £0 fts SS line is ted to Vp through @ pull-up resistor. REGISTERS. ‘Three registers unique to the sorial peripheral interface pro- Vide control, status, and data storage. ‘The Serial Peripheral Contro! Register (SPCR), shown be- low, provides control for the SPI. son [Sve [see | — Justa] cro [orm] semt [sono] seon mst o 0 0 0 0 f UU ‘SPIE~ Serial Peripheral Interrupt Enable ‘O=SPIF interupts disabled 1=SPI interrupt if SPIF=1 ‘SPE—Serial Peripneral System Enable ‘O=SPI system off 1=SPI system on TWTERUAL STROBE FOR DATA CAPTURE ALL MODES) Figure 1. Data Clock Timing Diagram (CPOL—Clock Polarity ‘When the clock polarity bts cleared and data isnot being ‘tansferred, @ steady state low value is produced at the SCK pin of the master device. Conversely, if this bit is set, the SCK pin wil idle high. This bit is also used in Conjunction with the clock phase control bit to produce the desired clock-data relationship between master and slave. See Figure 1. (CPHA—Clock Phase “The clock phase bit, in conjunction with the CPOL bit, ‘controls the clock-data relationship between master and slave. The CPOL bit can be thought of as simply inserting an inverter in series with the SCK line. The CPHA bit selects one of two fundamentally different clocking pro- tocols. When CPHA=0, the shift clock is the OR of SCK with SS. As soon as SS goes low the transaction begins and the first edge on SCK involves the first data sample. ‘When CPHA-=1, the SS pin may be thought of asa simple ‘output enable control. Refer to Figure 1. ‘SPR1 and SPRO—SPI Clock Rate Selects “These two serial peripheral rate bits select one of four baud rates (Table 1) to be used as SCK if the device is 2 master; however, they have no effect in the slave mode ‘Table 1. Serial Peripheral Rate Selection semt | sero | "Soot wide Sy elo 2 0 1 ¢ 1 ° 16 1 1 2 MOTOROLA Data for the SPI is transmitted and received via the Serial Peripheral Data Register (SPDR). A data transfer is initiated by the master writing to its SPDR. If the master is sending data to 8 slave, it frst loads the data into the SPDR and then ‘transfers it to the slave. When reading data, the data bits are gathered in the SPDR and then the complete byte can be ‘accessed by reading the SPDR. DEMONSTRATION BOARD DESCRIPTION ‘A keypad input from the user is used to choose the output display function, The MCEBHCD5C4 monitors the Keypad, de- ‘codes any valid inputs, and sends the data to the MCSS705R3. Wf the user has requested a temperature displey, the IMCSE70GR3 sends a binary value of temperature in degrees fareneit to the MC68HCD5C4, where the value is converted ‘to 2 celelus binary coded decimal value and retumed to the [MCBE705R3 to be displayed. The LEDs are common anode cisplays and are driven directiy off of port B on the MC8B705R3. If the user desires the circuit to function as a real-time clock, 2 starting time must be entered and transmitted from the MCSBHCOSCA to the MCEB705R3. Once the clock has been initialaed, the MICBS705R3 updates the clock every minute. Clock values are stored in memory, and when the circuit is, ‘functioning as a thermometer, the values in memory are up- dated as required to meintain clock accuracy. USING THE A/D CONVERTOR TO MONITOR TEMPERATURE ‘Temperature monitoring is performed by the Motorole MTS102 silicon temperature sensor and the LMGSE Dual Low- Power Operational Amplifier, as shown in the schematic in ae Nast Figure2. Variations in the base-emitter voltage of the Motorola MTS102 siicon temperature sensor are monitored by the MC8S705R3, which converts these analog inputs to equivalent digital values in degrees farenhet. The sensor voltage is butf- fered, inverted, and amplified by @ dual differential amplifier before entering the A/D converter. An amplifier gain of 18 is ‘used, resuting in 20-milvot steps per degree farenheit. Using Vcc of 5 volts, the maximum differential amplifier output is 3.8 volts, resulting in a temperature sensing range from —40 degrees to + 140 degrees farenheit. ‘The output from the differential amplifier is connected to the A/D converter on the MCE8705R3. A block diagram of the successive approximation A/D converter is shown in Fig ture 3. Provision is made for four separate external inputs and ‘our internal analog channels. ‘Two different registers associated with the converter control channel selection, initiate a conversion, and store the resutt ‘of a competed conversion. Both the external and the intemal input channels are chosen by setting the lower 3 bits of the ‘A/D Control Register (ACR). The internal input channels are ‘connected to the VRH/VaL fesistor chain and may be used {or calibration purposes. ‘The converter operates continuously, requiring 30 machine ‘eycles per conversion. Upon completion of a conversion, the digital value of the analog input i placed in the A/D resuft register (ARR) and the conversion complete flag, bit 7 of the ‘ACR, is set. Another sample of the selected input is taken, ‘and a new conversion is started. Conversions are performed internally in hardware by esimple bisection algorithm. The D/A converter (DAC) is intially set to $80, the midpoint of the available conversion range. This value is compared with the input value and, if the input value js larger, $80 becomes the new minimum conversion value and the DACis once again set to the midpoint of the conversion range, which is now $CO. If the input value is less than $80, {$80 becomes the maximum conversion value and the DAC is. set to the midpoint of the new conversion range, in this case $40. This process is repeated until all eight bits of the con- Version are determined. ‘Quantizing errors are reduced to +1/2 LSB, rather than +0, -1 LSB, through usage of 2 buittin 1/2 LSB offset Ignoring errors, the transition between 00 and 01 will occur 11/2 LSB above the voltage reference low, and the transition between SFE and SFF will occur 1-1/2 LSBs below voltage reference high. ‘The A/D convertor retums a value of $30 when given an input of zero degrees farenhit, so $30 must be subtracted ‘from the result before converting to celcius. This offset must ‘also be considered when calibrating the sensor. Calibration of the temperature sensor can be performed by adjusting the variable resistor to produce a display of $00 after @ piece of ice has been placed on the temperature sensor for approxi- mately one minute. A 00 display results from a value of $50, jn the ARR, so the variable resistor should be adjusted until this value is reached. COMMUNICATION CONSIDERATIONS In this application, an SPI read or write is initiated via an interrupt from the MCU desiring to write data. When any of ‘ANgo ‘the three function keys, cisplay temperature, set time, or dis- play time, are pressed, the MCE8HCO5CA, as master, sends the MCES705R3 an interrupt on the MCSS705R3's INT pin. ‘The MCSSHCO5C4 writes the key value to its serial peripheral data register, thereby initiating the SPI. it then waits for the ‘SPIF bit to go high and returns to scanning the keypad. ‘At the same time the MCSBHC0SC4 is writing to is SPOR, the MCBE705RS sets a bit counter to eight and waits for the first SCK from the MC6BHCD5CA. After each clock pulse, the (MCBB705R3 checks the status of the data bit, sets the cary bit equal to the data bit, and rotates the carry bit left into a result register. The bit counter is decremented, compared to zero, and if not zero, the MCSB705R3 waits forthe next clock pulse and repeats the cycle. To ensure proper data transfers, the intemal processor clock ‘of the MCBE705R3 must be sufficiently faster than the SPI ‘lock of the MCB8HCO5CA to allow the MCBS70SR3 time to ‘complete this routine before the MCS3HCOSC4 can send an- ‘other bit. This requires the user to frst write the code to handle the software SPI, count machine cycles, and then choose MCU ‘scilator values that allow the additional machine cycles re- Quired in a software SPI to be completed before the master ‘can send another clock pulse to the slave. For example, consider the following piece of code for the [MCSB705R3, a slave receiving data from the master. DATAIN. —PORTC pin sek PORTC pin 4 Cycles Instruction 2 LDA #08 5 STA BITcT ‘Set bit counter 10 NXT BRSET 4,PORTC,* Wilt for cock transition 0 BRSET S\PORTC,STR Chock data sutus 6 STR ROL RESULT Store in rut. 6 Dec sire Check for end of byte 4 BNE NXT Got nox bt B Execution ofthis code requires 48 machine cycles. The max- imum oscilator speed for an MCBS705R3 is 1 Miz, requiring ‘an SPI clock no greater than 1/43 MHz. One way of obtaining this rate for the SPI clock is to run the MCSBHCOSC4 at 0.5 MHz and choose a divide-by 22 to generate the SPI clock. Hf the user has selected @ temperature display, itis necessary for the MCS8705R3, as a slave, to send data to the [MOS8HCO5C4 master. When the MC5S705R3 is ready to send dota, it interrupts the MCSBHCOSCA via the MCBBHCOSC4's IRQ fine. The MCB8HCD5C4 then writes to its serial peripheral data register to initiate the transfer and shifts in data bts sent ‘from the MC88705R3 until the SPIF bit goes high. While the ‘MC88HCO5C4 is wring oits SPOR, the MC8E705R3 program is setting @ bit counter to 8. When it detects a clock pulse on the SCK pin, the data register is rotated left one bit, placing ‘the MSB in the carry. The MOSI pin is then set equel to the carry bit, the bit counter is decremented and, if it is greater than zero, the process is repeated. MOTOROLA. Yaa va ooo Pout ozs Poauans nosh s Figure 3. A/D Block Diagram ADDITIONAL USES OF SPI Many variations of this usage of the SPI are possible. The thee possibilities are hardware SPI at both master and save, software SPI at the master and hardware atthe slave, and software SPI at both master and slave. Table 1 shows the various MCUs that have SPI implemented in hardware. ‘SP! is fay straightforward in a circuit where bath master and slave have hardware SPI capability. In this case, the MCUs ‘are connected as shown in Figure 4. Figure 4 iustates 2 Single master system, and Fgure 4b showe a system where either MCU can be system master. When both master and slave have SPI capability in hardware, data transfers can be handled full duplex. For a single master system, both master and siave write the data to be vancferred to their respective serial peripheral data registers. A deta transfers initiated when the master writes tots serial peripheral data register. A slave device can shift data at @ maximum rate equal to the CPU clock, 50 clock values must be chosen that allow the slave to transier data ata rate equal to the master’s transfer rate. In 2 multiple master system, the master must pull the slave's SS line low prior to wating to its serial peripheral date register and inating the transfer. PROGRAMMING A MASTER FOR SOFTWARE SPI When the master in an SPI system does not have hardware ‘SPI capabilities, the resulting system is quite different. An SPI ‘system with a master providing the SPI in software is shown in Figure 5. This system only requires two lines between the microcomputers; data and clock. A slave select line can be ‘added for use with multiple staves. If operated with one data line, the SPI wil function hatf-duplex only. Data is stored ‘a register, rotated left one bit ata time, and a port pin is sot ‘equal to the data bit. The master then provides the serial clock by toggling a different port pin. A bit counter must algo be used to count the eight bits in the byte. Bit manipulation instructions are very useful for implementing SPI in software. ANSe1 ‘One possible software implementation for a write from the ‘master to the slave is shown below. DATAOUT PORTE pin 0 scK PORTE pin t LOX #808 Bit counter LDA DATA Put data in register A RPT ROLA Shift 9 data bit into cary acs ser (Cheek for 1 BCLR O,PORTC Set dato out line to 0 CLK BSET 1,PORTC BCLA 1,PORTC Toggle clock pin DEX Check for end of byte BNE RPT H nor, repeat SET BSETO,PORTC Set deta out fne to 1 BRA CLK Go to clock Full duplex operation requires a second data line. One port pinis then devoted to data-outand one to date-n. Data transfer ‘rom slave to master is accomplished immediately before the SSCK pin is toggled. The state of the data-in pin is tested, and ‘the cary is then set equal to the data-n pin. This value is then rotated in to @ resut register. The modified code is shown below. DATA OUT —PORTC pin 0 sek PORTC pin t DATAIN. PORTC pin 2 Lx #908 Bit counter LDA DATA, Pur data in register A BCIR 1,PORTC Clear clock pin RPT ROLA Shift a data bit into cary cs ser (Check for 37 CLR O,PORTC Set data out fine 100 BSET 1,PORTC Set lock pin DIN BRCLR3,PORTC.CLK Check state of data CLK ROL DATAIN Rotate input data one bt ecx Chock for end of byte BNE RPT If not, repest SET BSETO,PORTC Set data outline 01 BRA DIN Go to data input MOTOROLA, 5 MOTOROLA SLAVE PERIPHERAL PROCESSOR MAY BE ANOTHER MCESHCDECE, OR PERUAPS ‘GBD FAMILY SMGLECMP MCU Figure 4e. Single Master SPI » nomen ‘DATA | PERIPHERAL IC wesc + 7 wa suve sar ‘uve sur 4 vo sum [A sweats] t ee cs Lo} ones wos Lae }— cox ATA -)s ov [Tow _ | cesncosca SUAVE SEL Suave set] uceancoscs J sree vasteRSUAE vo “he von smc. f kK >| Le Suve se | mossHcosce Pa pera ven rcessns MAY Be ‘seo, owe FomCoMNS a eo, ens, A sane Fat SONS Hav SCRE. Figure 4b. Multiple Master SPI wasreR wou cugex oar sre Figure 5. Software SPI ‘Anes PROGRAMMING A SLAVE FOR SOFTWARE SPI If the slave in the system is a MCU with hardware SPI ‘capability, the data transfer will happen automatically, one bit per clock pulse. Ifthe slave is a MCU that does not have SPI implemented in hardware, @ read requires the following tions. A bit counter is set to eight, the slave polls its SCK pin waiting fora clock transition, once ft perceives a clock t checks its data-in pin, sets the carry equal to the data and rotates the Carry into a results register. One possible code implementation Js shown in the previous timing example. Converting this to full duplex operation requires the addition cof a write from slave to master. The slave rolls a data register +o place the data bit to be sent into the carry, and the data- ‘out pin is set equal to the carry. These actions occur prior to the read of data from the master. With these modifications, the code looks as shown below. DATA OUT PORTC pin 6 DATAIN. —PORTC pin 5 ‘sek PORTE pin 4 La” #808 STA BITCT ‘Set bit counter AGN BRSET 4,PORTC,* Wilt for clock ROL REST ‘Shift data to send Bcs Seri Check data status BCLR G,PORTC 0, claar data out BRCLR 4,PORTC,* Wait for clock tansion BRSET 5,PORTC|STR Check Input data status STR ROL RESULT —— Store in recut Dec sircT (Check for end of byte BNE AGN DEBUGGING TIPS Debugging a circuit containing two microcomputers pre- ‘sents various problems not evident when working with a single ‘microcomputer circuit. The frst problem is simultaneously pro- viding emulation for both microcomputers. Once emulation ‘capability is arranged, the designer needs to keep track of the progress of each single-chip, and monitor how the actions of fone affects the actions of the other. ANS (One ofthe easiest methods to debug a ccc ofthis type isto use two emuletor stations, complete with separate tor rinals. Any emulators ean be used, But user confusion #8 ‘educed ifthe emulators have smar commands and syntax. Physical separation also alps reduce confusion fis some- what easier to keep track of the concurrent operations Hf one ‘side of the prototype board is devoted to each single-chip and ‘the majorty of peripherals they each must interface with, and ‘the emulator for that microcomputer i placed to that side of the printed circuit board. Before staring simultaneous debugging tis best to ind vidually debug the code for each microcomputer wherever possible. Once it becomes necessary forthe microcomputers to communicate with one another, hat one of the microcom puters anytime they are not actual talking and work withthe remeining microcomputer. Aste debuoging progresses, keep in mind that an err in the function of one single-chip does ‘not necessarily indicate an error in the corresponding code for that single-chip, but rather, the eror may have been caused by an incorect or unintended transmission fom the other single-chip. Although the aforementioned suggestions reduce debug- cing problems, some wil remain. Long perods of debug can ‘esultin an obscuring of the separation ofthe functions ofthe ‘wo programs. it helps to take periodic breaks to get away ‘rom the system and clear the thought processes. Expect °0 occasionally be confused, be witing to retrace section of code multiple numbers of times, and the debuaping wil procoed fairly smoothy. CONCLUSION ‘The Serial Peripheral Interface can be used as 2 tool to innerconnect to MCU with various other MCUs or peripherals, ‘and can be used with any microcomputer. A special case ‘occurs when one, or more, of the MCUs in a circuit do not have SPI capability in hardware. In this case, a simple software routine can be written to perform the SPI. Usedin this manner, the SPI eliminates the need for costly, inconvenient parallel ‘expansion buses and Universal Asynchronous Receiver/Trans- rmitters (UARTS) and simplifies the design effort. MOTOROLA oot oon2 nam spicnt 003 04 sweeeeedee REGISTER ADDRESS DEFINITION soc HE ooos ooo4 oooo porta equ 0 0007 op02 porte equ = 2 ‘goos 0003 portd equ = 3 ‘009 coos ddra equ & o010 oo06 ddre equ & 0011 cooa spcr equ $a 0012 oooB spsr equ Sb 0013 oooc spdr equ SOc 0014 oo12 ter equ S12. 01s D016 0017 ooBO org $b0 0018 0019 ooB0 uno pmb 1 9020 GoB1 tmpaormb 1 0021 00B2 detr rmbt 0022 0083 ctl rmbt 0023 oOB4 base rab & 0024 cOBe Isb 1 0025 0087 msb 0 rmb 1 0026 0027 oozo ers $20 0028 0029 seeeeeee KEYPAD LOOKUP TABLE seinen 0030 0031 0020 kypd equ 0032 9033 0020 07 feb $07 0036 o0z1 O64 feb $04. 0035 0022 01 feb $01 0036 0023 00 feb S00 0037 0024 OB feb $08 0038 0025 05 feb $05, 0039 0026 o2 feb $02 o040 0027 DA feb S0a disp. temp. 0041 0028 oF feb $09 0042 0029 06 feb $08 bo63 oozA O03 feb $03 0044 0028 OE feb Se set tine 0045 o02C oD feb $Od an 0046 0020 oc feb 80 pa 0047 GOZE OF feb SOF dise. tine D048 oozF OB feb SOB blank 0049 oso o100 org $100 prosram start os. O02 o100 9 start rsp DOSS o101 SF 12 clr ter mask timer interrupts D0S4 0103 AE 7B Idx #8 7b DOSS 0105 BF OZ Stx porte initialize port ¢ 0086 0107 AE 7F Idx #874 00S? 0109 BF OA Stx sper set spi cont. res. D0S8 0108 BF O06 stx ddre set cO as autput 0059 O10D 3F oo cir porta clear keypad inputs 0060 O10F A FO Ida #840 set up port a bei 0111 87 04 sta ddra a7-aé cut.» a0-a3 in Doz 0113 9B sei MOTOROLA Anse 3 3063 nee Wt check keypad #% 3065 0066 O114 cD O1 67 key dsr 0067 0117 at oA emp check for disp. temp Doe8 0119 27 OF bea 0069 0118 Al OE emp check for set time 0070 0110 27 28 beg D071 O11F Al OF emp check for disp. tine 0072 0121 27 08 bea 0073 0123 Al OB cmp check for disp. sec on74 0125 27 02 bes 0075 0127 20 EB bra wait for next input 0078 0077 *e display temp ## oo7s 0079 0129 11 oz dtmp belr Osporte send interrust tor sp oge0 0128 cD 01 59 dsr spiur send byte 0081 012E Ai oa Emp #808 check tor disp. temp. ogez o130 27 O02 beq cir Does 0132 20 ED bra key ose 0085 0134 9A cle cl 0086 0235 20 0D bra key one? 2088 wt set time we 9089 0137 cD 1 67 nudig jst keypad 5090 0134 At oA Emp #808 9091 013C 27 FF bea nudis 9092 O13E Al OB emp #$0b 0093 0140 27 FS beg nudig —ingk for valid digit 0094 0142 a1 OF emp #502 0095 0144 27 FL beq nudis 007% 0144 Al OF emp #80 0097 9148 27 £D beq nudis 0096 O14a 11 02 sttm belr Osporte send int. tor sp 0099 O14c CO O1 89 sr spiur send value 0100 O14F ai oc emp #50¢ check for pm 101 0151 27 ci bea key yess wait for next input 0102 0153 a1 oD emp 80d check for am 0103 0155 27 BD bea key yess wait for next input 0104 0187 20 DE bra nudig get next time digit 5105 108 #* spi write subroutine #* 5107 3108 0159 spiur equ * 0109 0159 87 oc sta spdr put data in data res 0110 0158 OF OB FO breir 7sspsrs* wait for end of byte 0114 DIS 10 02 bset Osporte 0112 oi6c 81 spiflg rts done 9113 3114 we spi read subroutine i c1i5 D116 o161 spird equ 0417 Giei BF oc stx spdr initiate transter 5118 0163 OF OB FD breir 7sspsro# wait tor end af byte S119 0166 62 rdend rts 5120 Nee MOTOROLA 121 0422 0123 ize 0125 0126 0127 0128 0129 0130 O13 0132 9133 0134 0135 0436 0137 0138 0139 140 oid 0142 0143 Oiea 14s oie 0147 0148 0149 910 151 152 Dis3 D154 Diss D1s6 2187 Bis8 0159 0140 oie2 0142 143 D164 ies 0166 0167 D168 9149 0170 gi71 0172 3173 9174 9275 D176 0477 0178 D179 2180 3181 3182 0167 0167 o1e9 0148 0140 D16E 0170 0172 174 0175 0177 0179 0178 9179 O17F ies tes Dies Dies Dies 18a oiec o18E 0190 191 0193 0195 0197 0199 0198 0390 OL9F tat D1A3 g1a5 o1Ae aia? o1a9 otAaa Biac iad 37 BF ag 4A Be Aa 8: 28 Be at 26 LAF OiaL o1e2 o1a4 C136 MOTOROLA 20 B3 32 FO 83 F7 ao oo oo OF oo 09 oo 03 FL 2D Bt 80 FF FO 09 OF BL cc Q OF oo Fe BL ** keypad scanning rout ne x* keypad equ * we 32 msec delay utip ida #820 sta ctl otip ida #832 inlp deca dec. bre inip dec cti bre ot lp elrx Ida #s80 sta porta pxtr Ida porta and #s0¢ cmp #500 bne debne asr porta cex #803 bis nxtr inval bra wtip set up outer loop counter Set up inner loop inner loop uhen O> decrement auter loop set up row counter check first row check for key mask upper nibble Tock for zero branch if have a key try next row decrement raw counter check for zero test next row no key pressed we debounce key input %# debne sta tmea stx rung Ida #et¢ loop deca, bne loop ida porte and #30¢ cmp tmea bre utip save value save row number set up delay wait check row again mask upper nibble check for same key return if invalid we wait for key release ## wer ida porta and #80f emp #500 bre utr check value mask upper nibble Took for zero wait for release # decode key value ##* Ida tmp clex axte | Isra, bes col bra nxte col Isix xa add rune tax Ida kyedsx sta tmea restore value Set up column ctr. shitt columns branch if have column try next column Meal. no. place x in a key value piace a in x convert to decimal Heol + row ‘ANSSI 0183 o1e4 o1as tee 01a? nies 0189 0190 oi9t 0192 0193 D194 0195 90196 0197 0198 0199 0200 ozo1 0202 0203 204 ozos o206 0207 0208 9209 0210 0211 9212 0213 0214 0215 0216 0217 D218 0219 0220 0224 0222 9223 02za 022s 0226 9227 0228 0229 9230 0231 0232 9 0233 0234 0235 0236 0237 0238 0239 240 241 242 0243 ozee ‘Anes 0187 0187 O1BA D1Bc D1BE nico ica o1c3 o1cs oic? o1c9 Dice oace Dice DLcr ipa 0103 015 917 919 01DB 1c O1DE o1e0 Diez 1E4 DiS O1e8 OiEA DiC OLEE ad OiF2 oiFe o1Fe ire o1FA oiFc co BS 3F 3F 87 48 39 48 39 88 24 3c 3 87 98 3c 87 Be az 87 Be ag 26 30 26 4B aL 22 3A ae ee 1 62 ac 20 os oa Be 09 oe 02 B2 82 OB weer temperature conversion routine JHE * farenheit value led rBint % is converted to celcius and the * is blanked. equ * dsr seird Ida sede sub #520 Bhs conv nesa Idx #$08 stx base+Z is -eceived trom 705¢3 in the @ resister. the value ead vaiue letemost transter value to register subtract 32 if pos. convert negate pattern wu temperature conversion #HE xX a 16-bit mitipiy by 5 is performed on #* valve received from the r3. this number we is then divided by 7. pxt? eee pos #HEK convert clr msb ele Isb ste ise Isla rol msb Ista rol msb bee div ine msb ir detr sta [sb ine dete sta [sb Ida msb sbe #800 sta nsb Ida Isb sub #809 bee nxt? ist msb bre nxt? add #09 emp #504 bhi done dee detr Ida detr Idx #80b six baset3 clear counters nultiply by 2 the pad overfigw inte msb nultiviy by 2 cad averfiaw into msb 2 contains value x5 # avertiows ine msb subtract borrow from count factors of 9 if no borrows repeat if borrow, check for repeat if not end find remainder if greater than 4» round up blank pattern blank most sis. digi msb end of divide, add last 9 back in and check remainder tor rounding binary value ta bed value weKE * the x registers begins with the binary value Mand exits with zero, each digit: unite MOTOROLA 0245 % and hundreds» is stored separately and checked 0246 * for a value equal to 10. 0247 9248 O1FE 97 tax piace a into x 3249 DIFF 4F clra 3250 0200 3F BS clr b clear values 3251 0202 3F Be clr baset2 1252 0204 5D st tstx check for end 3253 0208 27 17 beq send if completes send to r3 1256 0207 5 deex decrement hex number 1255 0208 6c inca increment decimal number 1256 0209 ai oA cap #808 equal to 107 1257 O20B 26 F7 bre st no» keep soins 3258 0200 3¢ BS ine baset+i increment tens 3259 O20F 84 BS Ida base+i test for 10 3260 0211 a1 oA cmp #303 3261 0213 27 03 bea hund if equals set hundreds 3262 0215 4F zero clea clear ones 1263 0216 20 EC bra st count next 10 1264 0216 SF BS hund clr baseti clear tens 1245 021A 3c Be ine base+2 increment hundreds 126 O21C 20 F7 bea zero 1267 1268 * send all digits to 705r3 via sp 1269 * start by interrupting r3 and then 1270 * sequentially sending tour values 1271 1272 O21E B7 Be send sta base store ones 1273 0220 Be B6 Ida baset2 1276 0222 27 OB beg bik 1275 0224 £6 Ba nxtds Ida basesx start at base 1276 0226 CD o1 59 Jsr spiur send te r3 1277 0229 Sc inex 1278 O22 a3 03 cpx #803 look ter end 1279 022C 26 Fe bre nxtdg if no» next digit !2e0 022€ 6O rei 1281 022F A& OB bik Ida #s0b 1262 0231 87 Be sta baset2 1263 0233 20 EF bra nxtds 1286 1285 1266 we initialize interrupt vectors *#* 1287 1288 1FF4 org Sifts 1289 1290 1FF4 04 oo spivec fdb start 1291 4FF6 01 oo scivec fdb start 1292 1FF8 01 00 tarvec fdb start '293 1FFA 01 87 irqvee fdb r3int 1294 4FFC 01 00 swivec fdb start 1295 1FFE 01 O09 reset db start MOTOROLA “ANS 2 soot ooaz nam r3disp anos ona senueHHEOD: REGISTER DEFINITION #Ks060« aos ogos ooo. porth equ i 0007 oooz porte equ 2 ooo8 coos ddrb equ 5 poo? coos dére equ & 0010 coos tér equ B ogi1 ooo9 ter equ 0012 DO0E acer equ 14 0013 coor arr 15 0014 01s 0016 oo4o ors $40 0017 0018 0019 oo4o wrdat rab 1 ozo oo41 timtmp rmb 1 0021 oo4z et cmb 1 0022 0043 etl orm 1 0023 0044 result rmb 1 0024 oo4s rest orm 1 o0zs 0046 bitet cmb 1 0026 0047 sec ormb 1 0027 0048 segmnt rmb 1 poze 0049 pm emb i 0029 048 base rab & D030 0031 oo8o ors $80 0032 0033 wee display look-up table iH 0034 003s oso sestab equ * 0036 o080 O12 feb “00000001 0 0037 0081 4F feb 401001111 1 0038 0082 12 feb “00010010 2 0039 0083 08 feb “OD000110 3 0040 0084 4c feb 401001100 4 0041 oOBS 24 feb 200100100 5 0g42 o086 20 feb “00100000 & 0043 0087 OF feb 200001111 7 0044 oO88 00 feb xo0000000 8 p45 o089 oc feb 00001100 9 0046 oo8A 7E feb “01111110 - 0047 0088 7F feb 201111111 blank 0048 GOSC 7F feb 401111111 pe 0049 O08 18 feb %00011000 p ooso 0s1 00970 ore $70 program start ons2 0053 wee initialize variables wx o0s4 00s 0090 start equ ® 0056 0090 A& 07 Ida #807 0057 0092 C7 OF 38 sta #38 set MOR 0058 0095 Ae FF Ida #st# 00S9 0097 87 OS sta ddrb set up port b as output Opeo 0099 87 OB sta tdr set timer for prescale of 128 0061 O09B 87 4a sta base p62 0090 87 4B sta base+i blank time display ‘ANSe1 MOTOROLA a 0063 D066 noes 1066 3067 1028 1069 1070 3071 1072 1073 3074 1078 1076 1077 1078 1079 1080 1081 1082 1083 1084 108s 1oB6 1087 loge 1089 io90 1o94 1092 1093 1096. 1095, 1096 1097 1098, 1099 i100 ion 1102 1103 i104 1405 1108 1107 108 1109 110 aaa 112 113 184 115 116 147 118 119 120 121 122 123 126 o09F oat oga3 gas 0a? g0a9 ‘OOAB ‘OAD OOF OOBs 0083 ooss 08? ‘DOB9 pes ‘D080 oogF ooco oncz ack oncs bac? o0cs ooca gocc oOcE ooo ooD2 poe oops oops opa ooc goDo OOF DoE2 DoE4 DOES o0e8 DEA 00es ‘ODED o0Fo MOTOROLA 87 87 87 87 va 87 Aa B7 x 87 Aa B87 9A 4A 2 5A 26 3F Be 2A Be az 87 ry 2 7B iF co rc B7 Ae 4A 26 co Be 4c 40 EF o2 48 cr 6 oF 09 44 42 ag 3B 42 08 43 FF FD FS OE OE FC oF 30 4s 44 07 E oz 1 cr 0B st DE FD on 46 18 on diay ae tine axtds sta Ida sta porte set porte to choose msd sta sesmnt Ida Sct sta ddre set up cO-3ebse7 as cuteuts Ida #so¢ sta ter unaask timer interrupt ele timtme Start with time disp. clr sec set seconds to zero clr pm Start with am Ida #$3b sta ct set up timing loops Ida #808 sta ctl eli delay tor Idx #s+4 Ida ese¢ deca bne dlayt4 deex bne dlay#2 temperature measurement # clr acr clear conv. complete flag Ida acr bp! *-2 Ida arr set result sbe #830 adjust so 0 des =$30 sta resi store in spi data register Ida timtmp emp #807 check for temp. update bne diay send temperature value to heOSe4 for conversion into celcius. start by interrupting the heOSe4 and then transmit data via the sp sei belr 7sporte interrupt heOSe4 sr spiwe urite data to heOSeé idx #806 wait for return data ~ 140 cycles * Ida #$0b sta baset7 Ida *80e deca bne timlp get decimal values in celcius tram heOSc4 Js spied Ida result get value 0125 9126 0127 0128 0129 0130 0134 0132 0133 0134 0135 0136 0137 0138 0139 0140 ese 0142 0143 0144 0145 0146 0147 0148 D149 iso 0151 o1s2 0153 D1s4 0155 0158 0157 0158 9159 160 pier Diez 01463 164 145 D166 0167 0148 169 170 171 0172 0173 0174 0175 0176 0177 0178 0179 oieo niet 0182 0183 o1e4 ies 0186 Anse oor2 ors ooFs oor? oor? ooFA orc OOFE 100 pint 101 0103 0105 0108 0108 o100 o10F 0110 112 0113 0115 0117 o118 0118 D1iA otic OLE 0120 0122 0124 D126 0127 9128 E7 5c as 26 oA 20 ae 87 80 ae 87 08 oa, 39 06 4A 9D 3A 26 at Ag 87 39 4D 1E 19 90 9D 08 4a 07 Fo ca 907 4a 08 4g 02 FD 02 00 02 FO 4a oe 4a 4s 12 02 02 02 02 FO a temp RR eee Tees spied pxt Be stall spiur tst sta basesx epx #807 bne nxtds eli bra diay select tempera Ida #807 sta timtme eI etl spi routine the three pins sek the r3 waits fo transition of tI store check for end ture display ** hoose temp. display eer used for the spi bit 6) parte bit Ss porte bit 6) porte oa high-to-low he spi_clocks which is provided by the heDScé and sent on porte pin 4. transferred on transition of ¢! spi read * equ * Ida #308 sta bitct breet 4:portcs* wait for clack trans a bit of data each high-to-low he clock. set bit counter brset Siportesstr check data status note: the brse. sets the carry bit under test rol result sto Ida #802 deca bne stall nop dec bitet bne nxt. rts spi write * data to be sent start of write equ * Ida #08 sta bitct rol rest bes setl belr Ssparte bset 7sporte belr 4sporte nor t command autor bit to be equal re in result delay loop t0 check for end of byte get next bit is in result at set bit counter shift data check data status if Oy clear miso clear interrupt timing delay. brset 4,portes# wait for clock trans. MOTOROLA 5 0187 0128 3A 46 dee biter check for end of byte 0188 0120 26 ED bne asn 0189 O12F 1£ Oz bset 7oporte clear interrupt 0190 0131 82 rts o191 0192 0132 1c oz sett bset dsportc it 1) set miso 0193 0134 1£ 02 bset 7yporte c ear interrupt 019% 0136 18 O2 bset 4sporte 0495 0138 20 EE bra tst 0198 0197 wee initialization of data read via spi ¥x 0198 * 0199 * a data read is initiated via an interrupt 200 * from the heOSe4. the value received is ozo1 * tested ta determine which function is 202 * requested and the processor jumps to the 0203 * proper routine. 0204 * 0205 0204 013A cD O14 ot chint jsr spird get value 0207 0130 Aé O03 ida #803, 0208 O13F B7 41 sta timtmp choose tine D209 0141 Be 44 Ida result 0210 0143 ai oa cap #$0e check for disp temp D211 0145 27 BS beg temp 0212 0147 a1 OF emp #S0¢ check for display tine 0213 0149 27 3c beg rtry 0214 0148 Al OE emp #80e check tor set time 9215 0140 27 39 beq cirtm O216 O14F a1 OD cap #800 check for am g217 0151 27 oc beq a: a218 0153 a1 OB emp #S0b check for secs 9219 0155 27 6a bes dsec 9220 0157 a1 oc cmp #80c check for pm 0221 0159 26 39 bre dis nos set digit 0222 0158 Ae FF Ida #st¢ set pm address 3223 0150 87 49 sta pm 0224 9225 ae check for valid input x 0226 0227 O1SF Bé 4D an Ida baset3 check tens of hours 3228 0161 27 08 beq blhr if zero, blank digit 0229 0163 Al O14 cmp #801 0230 0145 27 46 bea twoc 0231 0167 Al OB cmp #806 look for blank 0232 0147 26 48 bre blank it mots blank display 0233 0168 Aé OB bihr Ida #$0b 0234 0160 B7 4D sta baset3 blank tens of hours 0235 O16F Bé 4B mtn Ida base+1 check tens of minutes 0236 0171 a1 05 emp #$05 check against 5 0237 0173 22 3E bhi blank if sreaters blank display 0238 0239 * valid input» set timer counter * ozo 0261 0175 Ab OF Ida #so¢ 0242 0177 B7 09 sta ter unmask timer interrupt, 0243 0179 Ab 43 Ida #843 3244 0178 B7 42 sta ct load inner loop counter 3245 0170 Ab 08 Ida #806 3246 Di7F B7 43 sta ctl load outer loop counter 3247 D181 3F 47 clr sec 3248 0163 3F Sz clr baset8 MOTOROLA, ANs81 6 0249 o2so 0251 0252 0253 0254 0255 0256 0257 0258 0289 0260 0261 0262 0263 0264 0265 0266 0267 02468 0269 0270 oz71 0272 0273 0274 0275 0276 0277 0278 0279 ozeo oze1 ozez 0283 0264 0285 0286 0287 0288 0289 0290 0291 0292 0293 0274 0295 0298 0297 0298 0299 0300 0304 0302 0303 0304 0305 0306 0307 0308 0309 0310 ANoe1 o1es aie? 188 o1ea 1c ote 0190 0192 019% 0195 0197 0199 0198 0190 O19F o1at 0103 o1as 0147 0109 Dias o1AaD LaF O11 0183 0185 0187 189 0188 0180 o1BF ict o1c3 nics 1c? va B7 B87 87 87 20 cy Be 87 Be 87 Be 87 87 aL 22 87 20 Be aL 23 3F 87 87 20 87 87 B7 ao 83 oB oa 4B 4c 40 F3 4c 40 “a 4c 46 48 46 4A 07 DE 4a DA 4c 02 Bc 40 4c oo 48 os 4a ce aa 5S 5a rery clrem twoc blank clr rei baset? clear displays * ida #s0b sta sta sta sta bra input time time is inputted base baset baset2 base+3 rtry ‘ * ting routine see left to right and the end cf input is indicated be pressing either the am or pa button. display by Pi cli Ida sta Ida sta Ida sta Ida sta emp bhi sta bra check if t pm is denoted an the lighting the decima nt. counters are set to zero out after each second. baset2 baset+3 baseti baset2 base baset1 result base #309 rtry base rtry digit enter digit 1 ft data left one check for valid digit get next number blank display if not Ida cme bis clr clr Ida Ida sta bra baset2 #802 tn base+3 baset+2 #800 baset1 #305 base etry check hours units less than 12 o’clock ckays check tens of min. send error message HHH seconds display KH * blank first tuo leds * dsec sta sta sta rei me basetsb basetsa set timtmp to S0b blank 1st tuo leds MOTOROLA 0314 0312 0313 314 0315 0316 0317 0318 0319 0320 0321 0322 0323 0324 0325 0326 0327 9328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3361 3342 3343 3344 3345, 3346, 3347 3348, 3349 3350 3351 3382 3353 3354 3355 3358 3387 3358 3359 3340 3364 1342 1363 1364 1345 1366 1367 1348 1369 1370 1371 1372 ice o1cs nice o1ce o1co oicr oxo 0403 0105 0107 0109 o1DA 10D O10F o1e0 O1E3 O1eS o1ee O1E9 O1eB O1ED OLE o1FO O12 one o1Fe ire OIA otc OIE oz00 ozo2 0204 0208 0208 20a MOTOROLA 9 BE rvs 87 36 25 ae 87 va 87 3A 26 ae 387 3A 27 80 4a FF on 48 oe F7 48 48 4a 48 4a 48 4a oF 80 o1 48 oz 10 08 OF 09 42 08 38 42 43 a4 az oz oz nee KKK tarint mind best hrs2 disp so eK KH display routine xeKe displays are refreshed every msec when a timer interrupt occurs. the most significant digit is displayed first. at the conclusion of each minutes the time is updated Idx timtme choose time or temp Ida ttt blank displays sta parte send to leds ror segant select display bes minZ look for restart Ida #847 restart with msd sta segmnt Ida basesx load a with minutes decx paint to next digit brset issegmntshrsi check hours units Ida basesx load a with tens of min decx point to next digit brset Zssesmntshrs? check tens of hrs. Ida basesx load a with hours units decx point to next digit brset 3ssesantsdise display value Ida baserx load a with tens of hrs and #$0¢ mask upper nibble tax set x equal to a Idx sestabsx display value table stx porth enable display drivers Ida segmnt sta porte enable display count display refreshes. 402 retreshes esuals one second. atter 402 retreshes; update clock Ida #810 set timer to interrupt sta tdr atter 2048 cycles Ida #804 sta ter reset timer interrupt flas dec ct decrement inner loop bne ret Ida #$3b reset inner loop sta ct dec cti jecrement outer loop bea tmchs fone sec.» to time change etl time change routine #xxKK when 60 seconds are counted: increase minutes ty oney necessary; blank minutes and increase hours. change an/pm if needed 0373 0374 0375 0376 0377 0378 0379 0380 0381 0362 0383 03684 03s 0386 0387 0368 0389 0390 0391 0392 0393 0394 0395 0396 0397 0398 0399 oso aot n4oz 403 gag gas o406 0407 408 0409 0410 pea 0412 0413 nae 0415 0416 0417 0418 0419 D420 bazi 0422 0423 Daze D425 0426 0427 0428 0629 0430 D631 0432 0433 0436 0208 0208 ozo ozoF ozit 0213 0215 0217 0219 0218 21D o2iF 0224 0223 0225 0227 0229 0228 0220 022F 0231 0233 0235 0237 0239 9238 0230 023F 0241 0243 0245 02467 0249 0268 0240 024F 0251 0283 0255 0257 0259 0258 0250 O2sF 0261 0263 0265 0267 0269 0268 0240 O26F oz71 0273 0275 0277 Be at 26 3F 3F 20 3c 20 3c BE at 26 33 ae 87 ab 87 80 47 52 52 oa 38 3c 47 34 “7 53 4A 09 20 4A 4B 05 1c 48 40 0B 1E 4c o2 28 08 40 4c 2A 4a 26 4B 52 53 cz 4c oF 08 4c 40 40 oF 4c oA 4c 4c 02 30 4g 38 42 08 43 tmchs minck inmt inm2, tens hrek inkrt. inkrta rett eau Ida emp bes Ida emp bre cle ele Ida emp bne clr Ida emp bne clr Ida cmp bes Ida bre Ida sta Ida sta bra bra bra clr bra increase hours Ida emp bre cle cle bra bra Ida emp bne Ida sta Ida sta rei * baset8 baset8 #808 zens #83c ret sec baset? base #509 inmt base basett #805 inn? baseti baset3 #80b hrek basetZ #802 inbria #80b baset3 #501 base+2 reti base rett baset1 reel baset8 baset9 nek baset2 #809 increase seconds Ine. secs. units look for ten if yes» inc. tens jock for a minute wait for next second zero display check min, units less than 97 increase nin. units = 0 check tens of min. less than 5? increase tens of min =O check tens of hrs. look for blank Jess then 10:00 check hrs. units less than 27 set tine to 1:00 done increase min. unit done increase tens of min. zero sec. units ine sec. tens * check hours units less than 97 hours units =0 tens of hours dane increase hours uni dane increase hours uni check value for 12:00 no» done ts ts switch pm indicator reset inner loop counter reset outer loop counter MOTOROLA 0435 0438 nH initialize interrupt vectars ¥#* 37 :38 OFFS ors S448 39 40 OFFS 01 CB rmrvec #db tmrint S41 OFFA 01 34 intveg fdd chint +42 OFFC 00 90 suivea fdb sta 443 OFFE OO 90 reset fdb start gare: a caine, costs, carages, and ocones, and reasonable torey fos arg Seeses git mon vn char ast cuueien minueg omeranch cea. sor ans @) are retro wasomare tora, nto anges Oporto Aion -ltorature Distributlon Centers: ‘ISA: Motorola Literature Distibution; P.O. Box 20912; Phoenix, Arizona 85006, EUROPE: Motorola Lt; European Literature Centre; 88 Tanners Drive, Blakelands, Miton Keynes, MK1é SBP, England JAPAN: Nippon Motorola Lic; 4-32-1, Nisi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. SIA PACIFIC: Motorola Semiconductors H.K. Lid: Slicon Harbour Center, No, 2 Dai King Steet, Tai Po industial Estat, Tal Po, NT, Hong Kong. a ® MOTOROLA 2257 PRNTED MUSAB MPEPOD_YONCAA ‘ANg81/D 0 00 A A

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