EXP 9 - Pulse Code Modulation & Demodulation
EXP 9 - Pulse Code Modulation & Demodulation
EXP 9 - Pulse Code Modulation & Demodulation
LAB: 09
Pulse Code Modulation & Demodulation
OBJECTIVE(S):
1. Study of Analog to Digital Conversion (ADC).
2. Understand the frame synchronization and clock timing logic.
3. Study of three-link communication.
4. Study of single-link communication.
MATERIALS / COMPONENTS & EQUIPMENT: PCM Training kits, DSO and patch chords.
INTRODCTION:
Pulse Code Modulation is a method of converting an analog into coded digital signal (binary). Information in an
analog form cannot be processed by digital processors so it's necessary to convert them into digital form. PCM is a
term which was formed during the development of digital audio transmission standards.
Digital data can be transported robustly over long distances unlike the analog interleaved with other digital data
so various combinations of transmission channels can be used. In the text which follows this term will apply to
encoding technique which means digitalization of analog information in general.
Sampling: Sampling is a process of converting the amplitude of a continuous-time signal at discrete
instants or converts the continuous signal into a discrete signal. Sample and hold circuit converts the
natural sampling process into flat- top /Pulse Amplitude Modulated (PAM) sampling signal.
Quantization: In quantization, an analog sample with an amplitude that converted into a digital sample
with an amplitude that takes one of a specific defined set of quantization values. Quantization is done by
dividing the range of possible values of the analog samples into some different levels, and assigning the
center value of each level to any sample in quantization interval. Quantization approximates the analog
sample values with the nearest quantization values in the range of ‘S’. So almost all the quantized
samples will differ from the original samples by a small amount ‘S/2’. That amount is called as
quantization error. As a result of quantization error a hissing noise is observed, when play a random
signal. Converting analog samples into binary numbers that is 0 and 1.
Encoding: The encoder encodes the quantized samples. Each quantized sample is encoded into an 8-bit
code word by using A-law in the encoding process.
Bit 1 is the most significant bit (MSB), it represents the polarity of the sample. “1” represents positive
polarity (high level) and “0” represents negative polarity (low level).
Bit 2, 3 and 4 will defines the location of sample value. These three bits together form linear curve for
low level negative or positive samples.
Time-division multiplexing (TDM): The method of combining several sampled signals in a definite
time sequence is called time-division multiplexing (TDM).
TDM is a technique used for transmitting several message signals over a communication channel by
dividing the time frame into slots, one slot for each message signal.
PROCEDURE:
Analog to Digital Conversion
4) Adjust the DC signal (I) amplitude control clockwise to increase the amplitude & anticlockwise to
decrease it. Try varying the D.C. input from + 5V to – 5V in steps of 1V and observe & record LED’s
pattern.
5) Disconnect the DC signal (I) & DC signal (II) supply from CH I & CH II input. Connect ~2 KHz signal to
CH I & ~4 KHz signal to CH II input.
6) Observe the signal at Unity gain buffer amplifier’s output with reference to the SC signal output of
PCM Timing Logic Block on the second trace. Give special attention to the phase relation between the two
signals.
7) Connect oscilloscope CH1(Y) input to SC signal output & oscilloscope CH2(X) input to EC signal output
of PCM Timing Logic Block of Transmitter (2153).
8) Observe the phase relation between the two SC & EC Pulses. Notice that EC goes HIGH at the end of
conversion & remains latched until next SC Pulse.
PCM Communication:
On Transmitter kit (2153), the sequence of operation is synchronized to the transmitter clock TX. Clock. The time
occupied by each clock pulse is called a Bit. The sequence of operation is repeated after every 15 bits. The
complete cycle of 15 bits is called as timing frame.
Bit 0: This bit is reserved for the synchronization information generated by the Pseudo random sync code
generator block more about its operation in the later section. When the Pseudo Random Sync Code is switched
OFF a '0' is transmitted.
Bit 1 to 7: These carry a 7-bit data word corresponding to the last sample taken from the analog channel CH I
Remember that the transmitter transmits lowest significant bit (LSB) first. This time interval during which the
coded information regarding the analog information is transmitted is called as the timeslot. Since the present
timeslot corresponds to channel 0 it is known as timeslot 0.
Bit 8 to 14: This timeslot termed as timeslot 1 contains the 7-bit word corresponding to the last sample taken of
analog channel1. As with channel 0 the least significant bit is transmitted first. The receiver requires two signals
for its correct operation & reliable communication, namely.
a. Receiver clock operating at the same frequency as that of the transmitter clock.
b. Synchronization signal which allows the receiver to synchronies its clock/operation with the transmitter’s clock
operation. All these requirements can be achieved by transmitting two essential information signals:
Procedure:
4. Connect CH1(Y) of DSO to CH I unity gain buffer amplifier’s output, CH2(X) of DSO to PCM Output.
Observe the two waveforms. Vary the amplitudes of 2 KHZ and 4 KHz controls and note how the
transmitter data changes.
5. Set the amplitude of each sine wave to 8 Vpp.
6. Observe the receiver channel output with the corresponding transmitter channel input. The output
may get flattened at peaks if the input sinusoidal signal voltage exceeds 10Vpp. This is because the input
exceeds the dynamic range of the A/D Converter. Vary the amplitude of the input signal observe that
the same changes are reflected at the receiver.
7. Observe & compare the following graphs:
a) Message 1 & LPF 1 O/P.
b) Message 2 & LPF 2 O/P.
c) Ch1 & CH2 sampling signal,
d) o/p of sample & hold.
e) o/p A/D converter
f) TDM PCM o/p
g) o/p D/A converter
S.No Sync Tx. CH1 Sampling CH2 Sampling Analog Signal-1 Analog Signal-2
Code Clock
CONCLUSION: