Digital and Logic Design-Logic Gates

DCIT 203
DIGITAL AND LOGIC SYSTEM DESIGN

Session 2 – Logic Gates
Lecturer: Dwumfour Abdullai Aziz

Email: adwumfour@ug.edu.gh
Mobile: 0260541219
UNIVERSITY OF GHANA
College
College of of Basic and Applied
Education
School
School of Physical
of Continuing and Mathematical
and Distance Education Sciences
2022/2023– 2016/2017
2014/2015
BOOLEAN ALGEBRA AND
LOGIC GATES
Dwumfour Abdullai Aziz Slide 2

OVERVIEW
This session covers the laws, rules and theorems

of Boolean algebra and their application to digital
circuits.
You will learn how to define a given circuit with a
Boolean expression and then evaluate its
operation. The session also highlights on the basic
logic gates and their operations.

LEARNING OUTCOME
At the end of the session, the student should be able

to:
1. Understand the basic operations and laws of Boolean
Algebra
2. Relate these operations and laws to networks made up
of logic gates
3. Prove any of these laws using truth tables
4. Apply these laws to the manipulation of algebraic
expressions
KEY TOPICS
The key topics to be covered in the session include:
• Introduction to boolean algebra and its

basic logical operations
• Basic Identities of Boolean Algebra.
• Introduction to Logic Gate.
• Truth table derivation

READING LIST
S. Salivahanan & S. Arivazhagan (2018), Digital Circuits and Design.

BOOLEAN AND LOGIC GATES

BINARY LOGIC/BOOLEAN ALGERA
• The design and behavior of circuitry in digital

systems is analyzed, with the use of a
mathematical discipline called Boolean algebra.
• Boolean algebra makes use of logical variables
and logical operations.
• Variable may take on the value 1 (TRUE) or 0
(FALSE).

BINARY LOGIC/BOOLEAN ALGERA
• Variable may take on the value 1 (TRUE) or 0

(FALSE).
• The basic logical operations are AND, OR, XOR
and NOT
• AND is represented by dot (.)
• OR is represented by plus sign(+)
• NOT is represented by overbar (bar on top of
the variable)
• XOR is represented by ( )
BOOLEAN LOGIC
Given the Boolean variables A and B with Logical

operators AND, OR XOR and NOT we have

RULES OF BOOLEAN LOGIC
X Y X.Y X+Y NOT X NOT Y X Y
0 0 0 0 1 1 0
0 1 0 1 1 0 1
1 0 0 1 0 1 1
1 1 1 1 0 0 0
EXAMPLE OF BOOLEAN OPERATIONS

BOOLEAN OPERATORS
AND: Given two inputs x, y the expression x.y or simply xy
represents "x AND y" and equals to 1 if both x and y are 1,
otherwise 0.
OR: Given two inputs x, y the expression x+y represents "x
OR y" and equals to 1 if at least one of x and y is 1,
otherwise 0.
XOR: Given two inputs x, y the expression x y represents
"x XOR y" and equals to 1 if only one of x and y is 1 (not
both).
NOT: Given x, the expression x' represents NOT(x) equals
to 1 if x is 0, otherwise 0. NOT(x) is x complement.
BOOLEAN OPERATORS
The AND and OR operators can be extended using the NOT
operator to produce other operators including
• NAND
• NOR
• XNOR
NAND
This is a negation of AND Operator : NOT (AND)=>NAND
NOR
This is a negation of OR operator: NOT (OR)=>NOR
XNOR
This is a negation of XOR operator: NOT (XOR)=>XNOR
BOOLEAN LOGIC
Example
• In the absence of parenthesis, the AND Operator

takes precedence over the OR operator.
• Logical operators play key role is creating digital
circuit
BASIC IDENTITIES OF BOOLEAN ALGEBRA
AND OR IDENTITY
A.B=B.A A+B=B+A Commutative
A.(B+C)=(A.B)+(A.C) A+(B.C)=(A+B). (A+C) Distributive
A.(B.C)=(A.B).C A+(B+C)=(A+B)+C Associative

A.1=A A+0=A Identity Element
A. A’=0 A+A’=1 Inverse Element
A.0=0 A+0=A
A.A=A A+A=A
A+AB=A A(A+B)=A Absorption
A . B= A + B A+B= A . B De Morgan’s Theorem
INTRODUCTION TO LOGIC GATE
• A gate is an electronic circuit that produces an

output signal, which is a simple Boolean
operation on its input signals.
• Logic gates are the elementary building blocks
for digital systems
• Logic gates are connected to form logic circuit
which is found in all digital systems

INTRODUCTTION TO LOGIC GATE
• The basic gates used in digital logic are AND,

OR, NOT
• We could also have NAND, NOR, and XOR.
• Each gate is defined in three ways:
q Graphic symbol,
q Algebraic notation,
q truth table.

LOGIC GATE
• The symbology used here is the IEEE standard,

IEEE Std 91.
• Each gate shown has one or two inputs and one
output.
• However, as indicated in all of the gates except
NOT can have more than two inputs.
• Thus, (X + Y + Z) can be implemented with a
single OR gate with three inputs.

AND GATE
A basic AND gate has two inputs and one output.

Let’s call the two inputs A and B, and the output Y.
Then Y = 1 if and only if A = 1 and B = 1, hence the name
“AND.”
The AND operation is represented in Boolean equation
settings by multiplication, i.e. we write
algebraic equation Y=A . B

AND GATE
The standard Graphical Notation of the AND gate is

represented as
Truth Table representation is

OR GATE
A basic OR gate will have two inputs, but in this case

Y = 1 if and only if A = 1 or B = 1 (which includes the
case in which both A and B are 1).
The OR operation is represented in Boolean
equation settings by plus, i.e. we write
algebraic equation Y=A+B :

OR GATE
Graphical Notation of the OR gate is represented as
Truth Table representation is

NOT GATE
A NOT gate has one input A and one output Y, with the
output being the logical negation of the input.
In other words, an input of 1 produces an output of 0,
and vice versa.
In boolean equations, a NOT operation is indicated by
an over bar or complement operator ( ‘ ) :
algebraic equation Y= A’

NOT GATE
• Graphical Notation of the NOT gate is represented as

Y
• Note that the inversion (NOT) operation is indicated

by a circle.
• Truth Table representation is

NAND GATE
There are two inputs A and B, and one output Y.

The term “NAND” stands for “not-and,” meaning
that Y = 1 if the statement “A = 1 and B = 1” is not
true.
algebraic equation
Y=

NAND GATE
• Graphical Notation of the NAND gate is represented

as
Y
• Note that the little circle here means “not.”

Y

SYNTHESIZING NAND GATE
• If we run out of NAND gates, we could synthesize a NAND

Gate by using an AND together with a NOT:
• This would not be so desirable as using a real NAND.

• The synthesized version would probably have more
transistors than the real one
• would be slower and take up more space on a chip,
NOR GATE
Again, inputs A and B, output Y, with Y being
equal to 1 if the statement “A = 1 or B = 1” is not
true.
The boolean equation is
algebraic equation

NOR GATE
• Graphical Notation of the NOR gate is represented as
Y Y=
• Note that the little circle here means “not.”


SYNTHESIZING NOR GATE
• If we run out NOR gates, we could synthesize a NOR

Gate by using an OR together with a NOT:
• This would not be so desirable as using a real NOR.

• The synthesized version would probably have more
transistors than the real one
• would be slower and take up more space on a chip,
XOR GATE
• Here we have inputs A and B, output Y, with Y

being equal to 1 if the statement “A = 1 or B = 1
but not both” is true.
• The term used for this is “exclusive-or,”
abbreviated to XOR.
• The boolean equation is

XOR GATE
• Graphical Notation of the XOR gate is represented as
Y

XNOR GATE
• The XNOR (exclusive-NOR) gate is a combination XOR

gate followed by an inverter.
• Its output is "true" if the inputs are the same, and
"false" if the inputs are different.
• Graphical Notation of the XNOR gate is represented
as


Digital and Logic Design-Logic Gates

Uploaded by

Copyright:

Available Formats

Digital and Logic Design-Logic Gates

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Digital and Logic Design-Logic Gates

Uploaded by

Copyright:

Available Formats

DCIT 203

DIGITAL AND LOGIC SYSTEM DESIGN

Lecturer: Dwumfour Abdullai Aziz

Dwumfour Abdullai Aziz Slide 2

This session covers the laws, rules and theorems

Dwumfour Abdullai Aziz Slide 3

At the end of the session, the student should be able

The key topics to be covered in the session include:

• Introduction to boolean algebra and its

Dwumfour Abdullai Aziz Slide 5

S. Salivahanan & S. Arivazhagan (2018), Digital Circuits and Design.

Dwumfour Abdullai Aziz Slide 6

Dwumfour Abdullai Aziz Slide 7

• The design and behavior of circuitry in digital

Dwumfour Abdullai Aziz Slide 8

• Variable may take on the value 1 (TRUE) or 0

Given the Boolean variables A and B with Logical

Dwumfour Abdullai Aziz Slide 10

X Y X.Y X+Y NOT X NOT Y X Y

EXAMPLE OF BOOLEAN OPERATIONS

• In the absence of parenthesis, the AND Operator

A.(B+C)=(A.B)+(A.C) A+(B.C)=(A+B). (A+C) Distributive

A.(B.C)=(A.B).C A+(B+C)=(A+B)+C Associative

• A gate is an electronic circuit that produces an

Dwumfour Abdullai Aziz Slide 16

• The basic gates used in digital logic are AND,

Dwumfour Abdullai Aziz Slide 17

• The symbology used here is the IEEE standard,

Dwumfour Abdullai Aziz Slide 18

A basic AND gate has two inputs and one output.

algebraic equation Y=A . B

Dwumfour Abdullai Aziz Slide 19

The standard Graphical Notation of the AND gate is

Truth Table representation is

Dwumfour Abdullai Aziz Slide 20

A basic OR gate will have two inputs, but in this case

algebraic equation Y=A+B :

Dwumfour Abdullai Aziz Slide 21

Graphical Notation of the OR gate is represented as

Truth Table representation is

Dwumfour Abdullai Aziz Slide 22

Dwumfour Abdullai Aziz Slide 23

• Graphical Notation of the NOT gate is represented as

• Note that the inversion (NOT) operation is indicated

Dwumfour Abdullai Aziz Slide 24

There are two inputs A and B, and one output Y.

Dwumfour Abdullai Aziz Slide 25

• Graphical Notation of the NAND gate is represented

• Note that the little circle here means “not.”

Dwumfour Abdullai Aziz Slide 26

• If we run out of NAND gates, we could synthesize a NAND

• This would not be so desirable as using a real NAND.

Dwumfour Abdullai Aziz Slide 28

• Graphical Notation of the NOR gate is represented as

• Note that the little circle here means “not.”

Dwumfour Abdullai Aziz Slide 29

• If we run out NOR gates, we could synthesize a NOR

• This would not be so desirable as using a real NOR.

• Here we have inputs A and B, output Y, with Y