AC6901A Datasheet
AC6901A Datasheet
AC6901A Datasheet
AC6901A 芯片规格书
珠海市杰理科技有限公司
版本:V1.2
日期:2016.12.22
版权所有,未经许可,禁止外传
http://www.yunthinker.com QQ:371116160 AC6901A Datasheet
AC6901A Features
High performance 32-bit RISC CPU
RISC 32bit CPU
DC-160MHz operation
Support DSP instructions
64Vectored interrupts
4 Levels interrupt priority
Flexible I/O
30 GPIO pins
All GPIO pins can be programmable as input or output individually
All GPIO pins are internal pull-up/pull-down selectable individually
CMOS/TTL level Schmitt triggered input
External wake up/interrupt on all GPIOs
Peripheral Feature
One full speed USB 2.0 OTG controller
One audio interface supports IIS, left adjusted, right adjusted and DSP mode
Four multi-function 16-bit timers, support capture and PWM mode
Two 16-bit PWM generator for motor driving
One 16-bit active parallel port
One full-duplex basic UART
Two full-duplex advanced UART
Two SPI interface supports host and device mode
Two SD Card Host controller
One IIC interface supports host and device mode
Watchdog
2 Crystal Oscillator
16-bit Stereo DAC, SNR > 92dB
3 channels Stereo ADC, SNR > 92dB
1 channel MIC amplifier
Embedded headphone amplifier
3 channels Stereo analog MUX
channels 10-bit ADC
2 channels 4 levels Low Voltage Detector
Built in Cap Sense Key controller
Power-on reset
Embedded PMU
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Bluetooth Feature
CMOS single-chip fully-integrated radio and baseband
Compliant with Bluetooth V4.2+BR+EDR+BLE specification
Bluetooth Piconet and Scatternet support
Meet class2 and class3 transmitting power requirement
Provides +2dbm transmitting power
receiver with -85dBm sensitivity
Support a2dp\avctp\avdtp\avrcp\hfp\spp\smp\att\gap\gatt\rfcomm\sdp\l2cap profile
FM Tuner
Support worldwide frequency band 76-108MHz
Fully integrated digital low-IF tuner & frequency synthesizer
Autonomous search tuning
Digital auto gain control (AGC)
Digital adaptive noise cancellation
Programmable de-emphasis (50/75 uS)
Receive signal strength indicator (RSSI)
Digital volume control
Power Supply
LDOIN is 3.3V to 5.5V
VDDIO is 3.0V to 3.6V
Packages
LQFP48
Temperature
Operating temperature: -40℃ to +85℃
Storage temperature: -65℃ to +150℃
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一、引脚定义
1.1 引脚分配
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1.2 引脚描述
1 VSS P / Ground
2 LDO_IN P / LDO Power
3 VDDIO P / IO Power 3.3v
4 RTCVDD P / RTC Power 3.3v
5 PR1 I/O 16 RTCIO1 ADC12:ADC Input Channel 12;
6 PR2 I/O 16 RTCIO2 ADC13:ADC Input Channel 13;
7 PR3 I/O 16 RTCIO3 OSC12MO
8 OSC32KI I / OSC32KI
9 PR0 I/O 16 RTCIO0 OSC32KO
10 BT_AVDD P / Power 1.5v
11 BT_RF P /
12 AVSS P / Ground
13 BT_OSCI I / OSC In
14 BT_OSCO O / OSC Out
COM0:LCD COM Output 0;
SEG21:LCD SEG Output21;
SD1CLKA:SD1 Clk(A);
15 PC5 I/O 16 GPIO PAPWR:PAP Write;
SPI1DOB:SPI1 Data Out(B);
UART2RXD:Uart2 Data In(D)
IIC_SDA_B:IIC SDA(B);
COM1:LCD COM Output 1;
SEG20:LCD SEG Output20;
SD1CMDA:SD1 Command(A);
16 PC4 I/O 16 GPIO PAPRD:PAP Read;
SPI1CLKB:SPI1 Clk(B);
UART2TXD:Uart2 Data Out(D);
IIC_SCL_B:IIC SCL(B);
COM2:LCD COM Output 2;
SEG19:LCD SEG Output19;
SD1DAT0A:SD1 Data0(A);
17 PC3 I/O 16 GPIO
PAPD7:PAP Data 7;
SPI1DIB:SPI1 Data In(B);
UART0RXC:Uart0 Data In(C)
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SD1DAT1B:SD1 Data1(B);
ALNK_DAT1B : Audio Link
Data1(B);
Touch3:Touch Input Channel 3;
SFC _DOB(0):SFC Data Out0(B);
SPI0_DOB(0):SPI0 Data Out0(B);
UART0RXB:Uart0 Data In(B);
PB7 I/O 24 GPIO
ADC6:ADC Input Channel 6;
TMR3:Timer3 Clock Input;
SD0DAT3B:SD0 Data3(B);
46 SPI2DIA:SPI2 Data In(A);
SD1CLKB:SD1 Clk(B);
ALNK_DAT0B:Audio Link
PB2 I/O 24 GPIO Data0(B);
Touch2:Touch Input Channel 2;
Wakeup11:Port Interrupt /Wakeup
11;
SFC _CSB:SFC Chip Select(B);
SPI0_CSB:SPI0 Chip Select(B);
PB6 I/O 24 GPIO UART0TXB:Uart0 Data Out(B);
ALNK_MCLKB:Audio Link
Master Clk(B);
TMR2:Timer2 Clock Input;
47
UART1RXA:Uart1 Data In(A);
SPI2DOA:SPI2 Data Out(A);
PB1 I/O 24 GPIO SD1CMDB:SD1 Command(B);
ALNK_LRCKB : Audio Link
Clk(B);
Touch1:Touch Input Channel 1;
SFC _DIB(1):SFC Data In1(B);
SPI0_DIB(1):SPI0 Data In1(B);
PB5 I/O 24 GPIO SD1DAT3B:SD1 Data3(B);
ALNK_DAT3B:Audio Link
Data3(B);
CLKOUT1:Clk Out1;
UART1TXA:Uart1 Data Out(A);
48
SPI2CLKA:SPI2 Clk(A);
SD1DAT0B:SD1 Data0(B);
PB0 I/O 24 GPIO ALNK_SCLKB:Audio Link
Clk(B);
Touch0:Touch Input Channel 0;
Wakeup10:Port Interrupt /Wakeup
10;
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二、电气特性
表 2-1
符号 参数 最小 典型 最大 单位 测试条件
LDOIN Voltage Input 3 3.7 5.5 V
V3.3 _ 3.3 _ V LDO5V = 5V, 100mA loading
Voltage output
V1.2 _ 1.2 _ V LDO5V = 5V, 50mA loading
V1.5 Voltage output 1.5 V LDO5V=5V, 100mA loading
VDACVDD DAC Voltage _ 3.1 _ V LDO5V = 5V, 10mA loading
IL3.3 Loading current _ _ 150 mA LDO5V = 5V
2.2 IO 输入、输出高低逻辑特性
表 2-2
IO 输入特性
符号 参数 最小 典型 最大 单位 测试条件
Low-Level Input
VIL -0.3 _ 0.3* VDDIO V VDDIO = 3.3V
Voltaget
High-Level Input 0.7*
VIH _ VDDIO+0.3 V VDDIO = 3.3V
Voltage VDDIO
IO 输出特性
Low-Level Output
VOL _ _ 0.33 V VDDIO = 3.3V
Voltaget
High-Level Output
VOH 2.7 _ _ V VDDIO = 3.3V
Voltaget
2.3 IO 输出能力、上下拉电阻特性
表 2-3
Port 口 普通输出 强输出 上拉电阻 下拉电阻 备注
PA0~PA15
串接 200 欧
PB13 1、PA3 default pulldown
电阻(寄存 16mA 10K 60K
PC0~PC5 2、PB6 default pullup
器可控制)
PR0-PR3 3、PR0 output 0
PB0~PB12 8mA 24mA 10K 60K 4、内部上下拉阻抗因工艺波动差
USBDM 异,可能存在±20%的偏差
4mA _ 1.5K 15K
USBDP
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2.4 DAC 特性
参数 最小 典型 最大 单位 测试条件
Frequency Response 20 _ 200000 Hz
THD+N _ -71 _ dB 1KHz/0dB
S/N _ 93 _ dB 10Kohm loading
Crosstalk _ -90 _ dB With A-Weighted Filter
Output Swing 1.08 Vrms
1KHz/-60dB
Dynamic Range 93 dB 10Kohm loading
With A-Weighted Filter
DAC Output Power _ >11 _ mW 32ohm loading
2.5 ADC 特性
参数 最小 典型 最大 单位 测试条件
1KHz/-60dB
Dynamic Range 93 dB 10Kohm loading
With A-Weighted Filter
S/N _ 92 _ dB 1KHz/-60dB
THD+N _ -75 _ dB 10Kohm loading
Crosstalk _ -80 _ dB With A-Weighted Filter
2.6 BT 特性
表 2-4
参数 最小 典型 最大 单位 测试条件
Maximum Output Power _ 2 _ dBm _
RMS DEVM _ 5.3 _ %
PEAK DEVM _ 12 _ %
Maximum output power
99% DEVM _ 8 _ %
EDR Relative Power _ -1.4 _ dB
BDR Sensitivity _ -84 _ dBm BER=0.001
EDR Sensitivity _ -86 _ dBm BER=0.0001
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三、封装
3.1 LQFP48_7*7
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四、版本信息
日期 版本号 描述
2016.09.12 V1.0 原始版本
2016.12.14 V1.1 升级蓝牙版本为 4.2,增加可支持的蓝牙协议
2016.12.22 V1.2 规范统一蓝牙 4.2 版本格式
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