VIETNAM NATIONAL UNIVERSITY, HO CHI MINH CITY

UNIVERSITY OF TECHNOLOGY
FACULTY OF ELECTRICAL ENGINEERING
--------------o0o---------------

FINAL PROJECT

Microprocessor Lab

Trần Bá Thành 1951096

Đoàn Vũ Thanh Hải 1941045
Đặng Hoàng Việt 1951023

HO CHI MINH CITY, MARCH 2022

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Contents
I. Specification ......................................................................................................................................3
II. 32-bit floating point: ..........................................................................................................................3
1. 32-bit floating point architecture: ..................................................................................................3
2. Exception: ......................................................................................................................................4
3. Example: ........................................................................................................................................4
III. Addition/Subtraction of 32-bit floating point: ...............................................................................4
1. Algorithm ...................................................................................................................................... 4
2. Flow chart ......................................................................................................................................6
IV. Multiplication of 32-bit floating point: ......................................................................................... 7
1. Algorithm: ..................................................................................................................................... 7
V. Experimental Result ........................................................................................................................ 10
1. Test case ...................................................................................................................................... 10
2. Test bench ....................................................................................................................................11

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 I. Specification

In this final project, we design a hardware to calculate cos(x) using MacLaurin series (the
formula below) with n = 8. The input value is in radian and represented in 32-bit floating
point number.

�2 �4 �6 �8 �10 �12 �14

cos � = 1 − + − + − + −
2! 4! 6! 8! 10! 12! 14!
The output value is also in 32-bit floating point numbers and in the range of [-1;1].

II. 32-bit floating point:

1. 32-bit floating point architecture:

Floating point numbers is one way of representing real numbers in binary format. In
this project, our group used it to represent real numbers, all calculations are conducted
based on it. Floating point numbers consist of 3 parts: a one-bit sign (S), 8 bits of
exponent (E) and 23 bits of fraction (F or M), which is so called Mantissa. Figure 1
shows the structure of a 32-bit floating point number.

32-bit floating number can be represented by following formula:

� = −1 � 2�−���� . (1. �)
+ 1-bit sign:

This bit determines the sign of a number:

- If S=1, number is negative

- If S=0, number is positive

+ 8-bit exponent

Bit 30 to 23 represent exponent. Those 8 bits determine the value of e in above

equation. For eg if exponent bits are 00001111 then value of e is 15.

+ 23-bit fraction
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 Bit 22 to 0 denote the fractional part.

2. Exception:

- If E=255 and Fraction is nonzero, then number is known as "Not a Number"(NaN)

- If E=255 and Fraction is zero and S is 1, then number is -Infinity (-∞)
- If E=255 and F Significand is zero and S is 1, then number is Infinity (∞)
- If E = 0 and Fraction is nonzero, then the number is denormalized.

3. Example:

We want to convert number 24.25 into 32-bit floating point number.

- Step 1: It is a positive number, then one-bit sign is turn into 0.
- Step 2: We convert the integer part into binary. Which is 24 = 0001 10002
- Step 3: We convert decimal part into binary, which is 0.25 = 0.012. Then, we
obtain the result of 24.25 = 1 1000.012
- Step 4: Normalized: We change the number to the form of 1.000. Then,
11000.01 = 1.100001 x 2^4.
+ Sign: 0 (a positive number)
+ Exponent (unadjusted): 4
+ Mantissa (not-normalized): 1.1000 0100 0000 0000 0000
- Step 5: Calculate exponent for floating number.
Exponent (adjusted) = Exponent (unadjusted) + 127 = 131 = 1000 00112
- Step 6: Calculate fraction for floating number.
We remove the bit 1 of the leftmost bit of Mantissa to get the final result
Mantissa (normalized) = 1000 0100 0000 0000 0000

Finally, the 32-bit floating point number of 24.25 is:

0 10000011 10000100000000000000000

III. Addition/Subtraction of 32-bit floating point:

1. Algorithm

The addition of two floating point numbers has two different cases.
- Case1: When both the numbers have same sign i.e when both numbers are either
positive or negative. In this case, the MSB of both number are either 1 or 0.

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- Case2: When both the numbers have different sign i.e when one number is positive and
other number is negative. In this case, the MSB iff one number is 1 and other is 0.
Enter two numbers A and B in 32 bit floating point (IEE 754 Floating point). Let man_a,
exp_a, man_b, exp_b represent mantissa and exponent of A and B, respectively.
Case1: When both numbers are of same sign
Step 1: Check exp_B > exp_A or not. If yes, swap A and B
Step 2: Check exp_A and exp_B are larger than 255 or not. If yes, set Exception = 1
=> End the process.
Step 3: Check exp_A or exp_B equal to ‘0’ or not. if yes, set the hidden bit of
mantissa to ‘0’.
Step 4: Calculate the different between the exponents of number A and B: diff =
exp_a - exp_2. If diff = 0 then there is no need to shifting the mantissa. If diff is more
then 0 then shift exp_b to the right by an amount of diff
Step 5: Amount of shifting is added to exp_b. New exponent value of exp_b = exp_b
+ diff. Now result is in normalize form because exp_a = exp_b;
Step 6: Check if both number have same sign or not. If ‘yes’, move to step 7. If not,
move to step 11
Step 7: Add the mantissa of 24 bits each including hidden bit new_man = man_a +
man_b
Step 8: Check if there is carry out in mantissa addition. If yes, then add ‘1’ to the
exponent value of either exp_a or new exp_b. After addition, shift the overall result of
mantissa addition to the right one by making MSB of new_man as ‘1 ‘ and dropping LSB
of mantissa
Step 9: If there is no carry out in step 7, then let exp_a in step 5 is the final exponent
and sign is neither a[31] or b[31]. Then move step
Case2: When both numbers are of same sign
Step 10: Take 2’s complement of man_b then add it to man_a to obtain new_man =
m1 + (2’s complement of man_b)
Step 11: Check if there is carry out of the mantissa addition. If yes, then discard the
carry and shift the result to the left until there is ‘1’ in MSB and also count the amount of
shifting.
Step 12: Subtract the amount of shifting from exponent either from exp_a and exp_b.

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 Step 13: if there is no carry out from the mantissa addition then MSB must be ‘1’ and
in this case simply replace new_man by 2’s complement
Step 14: Sign of the result is equal to the sign of the larger number.
Step 15: Concatenate sign, exponent and mantissa after calculating to obtain the final
result

2. Flow chart

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 IV. Multiplication of 32-bit floating point:

1. Algorithm:

The algorithm for floating point multiplication is explained through the flow chart in
Figure 2. Initially, we start with N1 and N2 which are represented in 32-bit floating point
number and assigned S1, F1, E1 and S2, F2, E2 as sign bit, mantissa and exponent
respectively.

- Step 1: Determine sign:

This is the multiplication, so the sign of result depends on the sign of two operands.
We get the following truth table.
Truth table:
S1 S2 S
0 0 0
0 1 1
1 0 1
1 1 0

Based on the truth table, we can obtain the equation of S is:

S = S1 XOR S2

- Step 2: Find total exponent

E = E1+E2-Bias

- Step 3: Check if the result whether overflow or underflow:

Those case indicate the result’s exponent is too large or too small to be represented
(does it exceed the range of 1 – 254).
Overflow occur when adding two exponent and the final exponent will be greater than
255. In that case, the result return to Infinity. The sign of infinity depends on the sign of
the result.
Otherwise, underflow occur when subtracting two exponents. It indicates that the
result’s exponent is too small to be represented. The return value of this case is 0 and the
sign determined according to the sign of the floating-point multiplier inputs.

- Step 4: Calculate F = F1*F2

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 - Step 5: Check for zero case:
If the result turn into zero (either one operand or both are zero), the final result turn
into zero (E = 0 and F = 0), if not, move to step 6

- Step 6: If the Mantissa F (Shift left or right by 1) and update exponent E.

The final result of F must be normalized to have a leading “1” just to the left of the
decimal point. Because the inputs are normalized numbers then the intermediate product
has the leading one at bit 46 or 47.
If the leading one is at bit 46 (to the left of the decimal point) then the intermediate
product is already a normalized number and no shift is needed.
If the leading one is at bit 47 then the intermediate product is shifted to the right and
the exponent is incremented by 1.

- Step 7: We get the final result from S, F, and E.

2. Flow chart:

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V. Architecture
The calculation of cosine using the MacLaurin series is a 15-state Finite State
Machine (FSM), using two multiplier and one adder/subtractor arranged:

The three D-type Flip Flops are for passing the multiplication factors to the
corresponding multiplier.
All constant values within the MacLaurin series are pre-encoded in 32-bit floating
point.
Assuming the to-be-given radian be x, when the enable flag asserts, the following
sequence occurs:
 State 0: Calculates x^2, MacLaurin 2nd term and the MacLaurin sum up to 2nd
term by letting x as both factors of the 1st multiplier and one factor of the 2nd
1
multiplier be the constant of MacLaurin 2nd term (− );
2!
 State 1: Stores the product of the 1st multiplier (x^2) and the MacLaurin sum
before updating the cosine value;
 State 2: Updates the cosine value to be the MacLaurin sum up to 2nd term and
calculates x^4, MacLaurin 3rd term and the sum, by letting both factors of 1st as
the previously stored x^2 and replacing one factor of 2nd multiplier the
corresponding constant of the current term;
 State 3: Similar to state 1;
 State 4: Updates the cosine value to the stored sum in state 3 and calculates
MacLaurin 4th term, this time only change one factor of the 1st multiplier to the
stored product (x^4), keeping the other as x^2 and change the 2nd multiplier
one factor accordingly;
 For state 5, 7, 9 and 11: repeats state 1;
 For state 6, 8, 10, 12: repeats state 4;
 State 13: Stores only the resultant sum up to MacLaurin 8th term;

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  State 14: Updates the cosine value and responds with an asserted ‘Done’ flag.
During the calculation, if NaN occurred in the answer, the designed FSM would:
return the cosine value as NaN, accompanied by the asserted ‘Done’ flag and’Except’
flag.

To communicate with Nios II Processor, the FSM is coupled within an Avalon

Memory-Mapped slave module:

The module exposes four 32-bit registers: radian input at address 0, enable flag
assertion and reading of ‘Done’ and ‘Except’ flags at address 1 (known as control
register), and MacLaurin’s cosine value returned at address 2, while address 3 is
reserved.

VI. Experimental Result

1. Test case

Radian Result Expected

Case 32-bit Note

32-bit floating 32-bit floating
Decimal floating point Decimal Decimal
point (Hexa) point (Hexa)
(Hexa)

1 0.523 3f05e354 0.8661 3f5db8bb 0.866 3f5db22d 

2 1.047 3f860419 0.50017 3f000b35 0.5 3f000000 
3 0 00000000 1.0000 3f800000 1 3f800000 
4 3.14 4048f5c3 -1.0000 bf800017 -1 bf800000 

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2. Test bench

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