End Sem Exam

Timer pic18f
Timer0:
- Can be configured as an 8-bit or 16-bit timer or counter.
- Clock source options: internal instruction cycle clock or T0CKI signal.
- Clock signal can be divided by a prescaler before connecting to Timer0's clock input.
- T0CON register controls Timer0's operation.
- Operates as a timer when the clock source is the instruction cycle clock.
- Operates as a counter when the clock source is the T0CKI pin.
Timer1:
- 16-bit timer/counter depending on the clock source.
- Interrupt request possible when Timer1 rolls over from 0xFFFF to 0x0000.
- Timer1 can be reset when the CCP module is configured to compare mode.
- Timer1 can use the oscillator connected to the T1OSO and T1OSI pins.
- Intended for a 32 KHz crystal.
- Can be used for time delays and measuring unknown signal frequencies.
Timer2:
- Consists of 8-bit timer TMR2 and 8-bit period register PR2.
- TMR2 counts up and compares with PR2 in every clock cycle.
- EQ signal resets TMR2 when TMR2 equals PR2.
- Postscaler generates the TMR2 interrupt.
- TMR2 output is fed to the synchronous serial port module.
Timer3:
- Consists of two 8-bit registers, TMR2H and TMR2L.
- Clock source options: internal (instruction cycle clock) or external signal.
- Reading TMR3L loads the high byte of Timer3 into the TMR3H register.
CCP (Capture/Compare/PWM):
- CCP module is a peripheral used for timing and controlling events.
- It has three modes of operation: Capture, Compare, and PWM.
- Capture mode: Captures the time of an event by measuring the
arrival time of a signal at the CCP pin.
- Compare mode: Generates an output when Timer 1 reaches a
specified value set in CCPR1 register.
- PWM (Pulse Width Modulation) mode: Provides a PWM output
with 10-bit resolution for controlling the duty cycle.
- Capture Mode:
- Used for pulse time measurement.
- Captures the value of Timer 1 when a signal at the CCP pin goes
high or low.
- Compare Mode:
- Generates an output when Timer 1 matches a value set in the
CCPR1 register.
- Special event trigger mode can be used to start the ADC (Analog-
to-Digital Converter).
- PWM Mode:
- Provides a PWM output with 10-bit resolution.
- No software overhead once started, operates automatically.
- Uses Timer 2 to define its operation.
- Timer 2 period register sets the frequency of the PWM signal
Interrupts Handling:
- Each interrupt source has related bits for control:
- Enable Bit (IE): Used to enable/disable the interrupt. Set to '1' to enable the interrupt.
- Flag Bit (IF): Automatically set by the related hardware when the interrupt condition occurs.
Indicates that the interrupt has occurred.
- Priority Bit: Determines the priority of the interrupt source (not used in this explanation).
- Global interrupt control bits:
- GIE (Global Interrupt Enable): Enables/disables interrupts globally.
- PEIE (Peripheral Interrupt Enable): Enables/disables all peripheral interrupts.
- Interrupt Vector:
- Address where the CPU jumps when an interrupt occurs. In PIC18, this address is 0008 (hex).
- The Interrupt Service Routine (ISR) is placed at this address.
- The ISR determines the source of the interrupt based on the flag bit.
- Registers used for interrupt control on PIC18F2455:
1. RCON (Reset Control register):
- Contains the IPEN (Interrupt Priority Enable) bit and other bits related to device reset.
2. INTCON, INTCON2, INTCON3 (Interrupt control registers):
- Contains GIEH (Global Interrupt Enable High) and GEIL (Global Interrupt Enable Low) bits.
- Enables interrupts and stores enable, priority, and flag bits for various interrupt sources.
3. PIR1, PIR2 (Peripheral Interrupt Request registers):
- Contains interrupt flags for peripheral interrupt sources such as ADC, UART, CCP, USB, and timers.
4. PIE1, PIE2 (Peripheral Interrupt Enable registers):
- Contains enable bits for peripheral interrupt sources. Setting a bit enables the associated
interrupt source.
5. IPR1, IPR2 (Interrupt Priority Registers):
- Used to set the priority of individual interrupt sources if IPEN bit is set.
- Setting the IPR bit makes the source high priority, while clearing it makes it low priority.
- Each interrupt source has three bits in the above registers:
- Priority bits: Set interrupt source priority to high or low.
- Enable bits: Enable or disable interrupts for the source.
- Flag bits: Set or clear the interrupt flag for the source. It is important to clear the flag before
enabling interrupts for that source
Write an ARM assembly/ C program to use on-chip UART for receiving
data with a baud rate of 9600 and store in character array or memory.
#include<LPC214X.H>
int i=0;
void main()
{char a[];
PINSEL0=0X00000005 ; //Configuring p0.0 and p0.1 for serial
communication
U0LCR = 0X83;// make DLAB 1 for setting baud rate
U0DLM=0X00;
U0DLL=0X61; //setting for making baud rate 9600
U0LCR=0X03; //making DLAB 0 for serial communication
while(1)
{ while(!(U0LSR &0X01)); //checking whether receiver buffer is
for(i=0;i<100;i++) {
a[i]=U0RBR;
i=i+1; }}}
Write a PIC18F assembly language program to read data from ROM location address 500H to RAM
location 0x40 of an access bank
.
Thumb mode improves code density by using 16-bit instructions instead of 32-bit instructions in
the ARM mode. This allows more instructions to fit in a given memory space, resulting in reduced
code size and potentially better overall system performance.
To switch between ARM and Thumb modes, the LPC2148 microcontroller provides two instructions:
`BX` and `BLX`
1. `BX` (Branch and Exchange) Instruction:
The `BX` instruction is used to branch to a new address and simultaneously switch between ARM
and Thumb modes. Here's how it work
- To switch from ARM mode to Thumb mode:
assembly
BX ThumbAddress
Replace `ThumbAddress` with the address of the desired Thumb instruction. The address must
have the least significant bit set to 1 to indicate Thumb mode.
- To switch from Thumb mode to ARM mode:
assembly
BX ARMAddress
Replace `ARMAddress` with the address of the desired ARM instruction. The address does not
need to have any specific bit set since it indicates ARM mode by default.
2. `BLX` (Branch with Link and Exchange) Instruction:
The `BLX` instruction is similar to `BX`, but it also saves the return address in the link register (`LR`)
for later use. It can be used for interworking between ARM and Thumb modes as well. Here's how to
use it:
- To switch from ARM mode to Thumb mode:
assembly
BLX ThumbAddress
Replace `ThumbAddress` with the address of the desired Thumb instruction (with the least
significant bit set to 1)
- To switch from Thumb mode to ARM mode:

c
1. IRQ (Interrupt Request)  An IRQ is a standard interrupt request that can be generated by various
sources, including timers, external hardware, or peripherals.  The processor sets the IRQ flag when
an interrupt occurs, and it then suspends the current execution of the program.  The processor
saves the current state of the program, including the program counter (PC) and processor status
register (PSR), on the stack.  The processor then loads the PC with the address of the interrupt
service routine (ISR) and begins executing the ISR.  After the ISR is complete, the processor restores
the saved state from the stack and resumes the previous execution of the program.  Example: If a
timer interrupt is generated in an ARM-based microcontroller, the processor sets the IRQ flag, saves
the current state of the program, and jumps to the ISR to handle the interrupt. After the ISR is
complete, the processor restores the saved state and continues executing the program. 2. FIQ (Fast
Interrupt Request)  An FIQ is a high-priority interrupt request that can only be generated by external
hardware.  The processor sets the FIQ flag when an interrupt occurs, and it then suspends the
current execution of the program.  The processor saves the current state of the program, including
the PC and PSR, on the stack.  The processor then loads the PC with the address of the FIQ handler
and begins executing the FIQ handler.  Unlike IRQ, the FIQ handler has access to its own set of
registers, including the banked registers R8-R14. This allows the FIQ handler to perform critical
operations quickly and efficiently.  After the FIQ handler is complete, the processor restores the
saved state from the stack and resumes the previous execution of the program.  Example: In a
mobile phone, when the power button is pressed, it generates an FIQ that suspends the current
execution of the program and jumps to the FIQ handler. The FIQ handler quickly checks if the power

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Timer pic18f

- Each interrupt source has related bits for control:

- Global interrupt control bits:

- GIE (Global Interrupt Enable): Enables/disables interrupts globally.

- PEIE (Peripheral Interrupt Enable): Enables/disables all peripheral interrupts.

- The Interrupt Service Routine (ISR) is placed at this address.

- Registers used for interrupt control on PIC18F2455:

1. RCON (Reset Control register):

2. INTCON, INTCON2, INTCON3 (Interrupt control registers):

3. PIR1, PIR2 (Peripheral Interrupt Request registers):

4. PIE1, PIE2 (Peripheral Interrupt Enable registers):

5. IPR1, IPR2 (Interrupt Priority Registers):

- Each interrupt source has three bits in the above registers:

- Priority bits: Set interrupt source priority to high or low.

- Enable bits: Enable or disable interrupts for the source.

PINSEL0=0X00000005 ; //Configuring p0.0 and p0.1 for serial

U0LCR = 0X83;// make DLAB 1 for setting baud rate

U0DLL=0X61; //setting for making baud rate 9600

U0LCR=0X03; //making DLAB 0 for serial communication

{ while(!(U0LSR &0X01)); //checking whether receiver buffer is

1. `BX` (Branch and Exchange) Instruction:

- To switch from ARM mode to Thumb mode:

- To switch from Thumb mode to ARM mode:

2. `BLX` (Branch with Link and Exchange) Instruction:

- To switch from ARM mode to Thumb mode:

- To switch from Thumb mode to ARM mode:

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