DigitalSignalProcessing Book
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Adithya ReddyDigitalSignalProcessing Book
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Adithya ReddyDIGITAL SIGNAL
PROCESSING
|| Techniques and Applications ||
Dr. P. GOPINATH
Dr. M. MANOJ PRABU
Dr. G. KALAIARASI
Mr. P. SUSEENDHAR
ISBN:978-81-963100-7-3
DoI: https://doi.org/10.5281/zenodo.8238480
Digital Signal Processing 2
Digital Signal Processing
|| Techniques and Applications ||
Authored by
Dr.P.GOPINATH
Dr.M.MANOJ PRABU
Dr.G.KALAIARASI
Mr.P.SUSEENDHAR
Digital Signal Processing 3
Digital Signal Processing 4
Digital Signal Processing – Techniques and Applications
© Dr.P.GOPINATH, Dr.M.MANOJ PRABU, Dr.G.KALAIARASI, Mr.P.SUSEENDHAR
First Edition: 2023
ISBN: 978-81-963100-7-3
DOI: https://doi.org/10.5281/zenodo.8238480
Price: Rs.950/-
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Digital Signal Processing 5
Digital Signal Processing 6
With deep gratitude, this book is dedicated to the Almighty God, whose
divine guidance, along with the unwavering support of my family and friends,
has brought this creation to life.
Digital Signal Processing 7
Digital Signal Processing 8
Acknowledgments
We would like to express our deepest gratitude to all the individuals and organizations that have
contributed to the creation of this textbook.
We wish to express our deep sense of gratitude and thanks to our Chairman’s, our Principals for
motivating us to undertake this book.
We are also grateful to our colleagues who have provided feedback on early drafts of this book, and
whose constructive criticism and encouragement have helped to shape the final product.
We also want to extend our thanks to the publishers, RAALTECH Publications, for their assistance
and support throughout the publication process. Their dedication to producing high-quality
educational materials has been evident at every stage, and we are honoured to have worked with
such a professional team.
Finally, we would like to thank our families and loved ones for their unwavering support and
encouragement. Their patience and understanding during the long hours spent writing this book has
been truly appreciated.
Dr.P.GOPINATH
Dr.M.MANOJ PRABU
Dr.G.KALAIARASI
Mr.P.SUSEENDHAR
Digital Signal Processing 9
Digital Signal Processing 10
Preface
Our aim in writing this book is to provide readers with a comprehensive and up-to-date
understanding of Digital Signal Processing, and to offer practical guidance for those working
in the field.
We have structured this book to be accessible to a wide range of readers, from students and
educators to practitioners and researchers. The book is organized into 7 chapters, each of
which covers a specific aspect of Digital Signal Processing. We have also included many
tutorial problems and examples throughout the book to illustrate key concepts and
applications.
We believe that this book offers a unique perspective on Digital Signal Processing that is
grounded in both theory and practice. Our hope is that readers will find the content
engaging and informative, and that it will inspire them to further explore the field and apply
the concepts and techniques presented in the book.
We hope that this book will prove to be a valuable resource for anyone interested in Digital
Signal Processing, and that it will contribute to the on-going development and advancement
of the field.
Dr.P.GOPINATH
Dr.M.MANOJ PRABU
Dr.G.KALAIARASI
Mr.P.SUSEENDHAR
Digital Signal Processing 11
Digital Signal Processing 12
TABLE OF CONTENT
CHAPTER TITLE PAGE NO.
NO.
ABSTRACT
LIST OF FIGURES & TABLES
1 INTRODUCTION 20
2 DISCRETE FOURIER TRANSFORM 22
2.1 Introduction to Discrete Fourier Transform 22
2.2 Deriving DFT from DTFT 32
2.3 Properties of DFT 34
2.4 Circular Convolution 38
2.4.1 Graphical Method 38
2.4.2. Matrix Method 40
2.4.3 DFT-IDFT Method 41
2.4.4 Linear Filtering Using DFT 42
2.4.5 Filtering Long Data Sequences 44
2.4.6 Fast Computation of DFT 49
2.4.7 Classification of FFT algorithms 51
2.4.8 RADIX-2 Decimation in Time (DIT) FFT Algorithm 52
2.4.9 RADIX-2 Decimation in Frequency (DIF) FFT 60
Algorithm
2.4.10 Linear Filtering using FFT 66
Question Bank 70
3 INFINITE IMPULSE RESPONSE FILTERS 120
3.1 Characteristics of Practical Frequency Selective Filters 121
Digital Signal Processing 13
3.2 Characteristics of commonly used Analog filters 123
3.3 Analog Frequency Transformations 135
3.4 IIR Filter design by solution of differential equations 136
3.5 IIR Filter design by impulse response 141
3.6 IIR Filter design by bilinear transformation 152
3.7 Design of IIR Filters using Butterworth and Chebyshev 158
Approximations
3.8 Structures of IIR Filters 178
Question Bank 184
4 FINITE IMPULSE RESPONSE FILTERS 238
4.1 Introduction to Digital Filters 238
4.2 Symmetric And Anti Symmetric Fir Filters 239
4.3 Design of Linear Phase FIR Filters 243
4.4 FIR Filter Design using Windows 246
4.4.1 Fourier Series Method 246
4.4.2. The window method 252
4.4.3 Types of Windows 254
4.5 Frequency Sampling Method 282
4.6 FIR Filter Structures 287
Problems 289
Question Bank 292
5 FINITE WORD LENGTH EFFECTS 346
5.1 Introduction to Finite Word Length Effects 346
5.2 Types of Errors 346
5.3 Number Representation 347
Digital Signal Processing 14
5.4 Quantization Noise 348
5.5 Rounding is preferred Over Truncation in Realizing a 367
Digital Filter
5.6 Limit Cycle Oscillation 367
5.7 Dead band 369
5.8 Various factors which Degrade the performance of Digital 381
Filter
5.9 Methods used to prevent Overflow 381
Question Bank 382
6 DSP APPLICATIONS AND INTRODUCTION TO 422
DIGITAL SIGNAL PROCESSORS
6.1 Multirate Signal Processing 422
6.2 Decimation 422
6.3 Anti-aliasing filter 426
6.4 Interpolation 426
6.5 Sampling rate conversion by a rational factor 428
6.6 Adaptive Filters- Introduction 431
6.7 Applications of Adaptive Filtering to Equalization 433
6.8 DSP Architecture - Introduction 437
6.9 Fixed Point Architecture 460
6.10 Floating Point Architecture 462
6.11 Multirate Signal Processing for Biomedical Signal 464
Analysis
Question Bank 476
7 CONCLUSION 500
REFERENCES
Digital Signal Processing 15
Digital Signal Processing 16
LIST OF FIGURES
PAGE No.
FIGURE No. TITLE
2.1 Linear convolution 44
2.2 Flowchart of FFT Algorithm 51
3.1 Frequency response of low pass filter 121
3.2 Frequency response of high pass filters 122
3.3 Frequency response of band pass filters 122
3.4 Frequency response of band reject filters 123
3.5 Mapping from s-plane to z-plane 140
6.1 Spectrum of signals when x(n) is decimated by D 425
6.2 Spectrum of x(n) and W(ωy) 427
6.3 Functional diagram of sampling rate conversion by 429
a factor I/D.
6.4 Multistage Implementation of Interpolation by a 430
factor I
6.5 Multistage Implementation of decimation by a 431
factor D
6.6 Block Diagram of Adaptive filter. 432
6.7 Application of Adaptive Filter to Adaptive Channel 433
Equalization
6.8 Pulse Shape for Digital Transmission of Symbols at 434
a Rate of 1/Ts Symbols per second
6.9 Channel Equalization using Training Sequence 435
6.10 Von-Neumann architecture 436
Digital Signal Processing 17
Digital Signal Processing 18
6.11 Harvard architecture 437
6.12 Modified Harvard architecture 438
6.13 Functional diagram for TMS320C50 439
6.14 Address generation units 448
6.15 Fixed point architecture 461
6.16 Floating point architecture 463
LIST OF TABLES
PAGE No.
TABLE No. TITLE
4.1 Comparison of FIR and IIR filters 239
4.2 Comparison of Rectangular and Hamming Window 257
5.1 Comparision of the trunation and rounding errors 348
using fixed and floating point number
representation
Digital Signal Processing 19
Digital Signal Processing 20
CHAPTER 1
INTRODUCTION
Digital Signal Processing (DSP) is a field of study and practice that focuses on the
processing, analysis, and manipulation of digital signals. It involves the use of algorithms and
techniques to transform, filter, and extract information from digital signals, which are
typically represented as discrete sequences of numbers. DSP has found widespread
applications in various fields, including telecommunications, audio and video processing,
biomedical engineering, radar systems, and more.
Chapter 1 will explore the five units that form the foundation of Digital Signal Processing:
Unit I: Discrete Fourier Transform (DFT)
The first unit of DSP deals with the Discrete Fourier Transform (DFT). The DFT is a
mathematical technique that converts a discrete-time signal from its original time domain
representation into its frequency domain representation. It allows us to analyze the frequency
content of a signal and perform operations such as filtering, spectrum analysis, and
modulation. The Fast Fourier Transform (FFT), an efficient algorithm for computing the
DFT, is also covered in this unit.
Unit II: Infinite Impulse Response (IIR) Filters
Unit II focuses on Infinite Impulse Response (IIR) filters. IIR filters are a class of
digital filters characterized by feedback, where the output depends not only on the current
input but also on past inputs and outputs. This unit covers the design, analysis, and
implementation of IIR filters, including Butterworth, Chebyshev, and Elliptic filters. Topics
such as poles and zeros, frequency response, and stability are explored.
Unit III: Finite Impulse Response (FIR) Filters
The third unit deals with Finite Impulse Response (FIR) filters. Unlike IIR filters, FIR
filters only depend on the current and past inputs and do not have feedback. This unit covers
the design, analysis, and implementation of FIR filters using various techniques such as
windowing, frequency-sampling, and Parks-McClellan algorithm. Properties like linear
phase, magnitude response, and filter length are discussed.
Unit IV: Finite Word Length Effects
Digital Signal Processing 21
Unit IV focuses on the impact of finite word length on digital signal processing
systems. In practical DSP applications, signals are represented with finite precision due to the
limitations of digital hardware. This unit explores quantization, quantization error, round-off
noise, and their effects on filter design, system performance, and signal quality. Topics such
as fixed-point and floating-point arithmetic, quantization schemes, and error analysis are
covered.
Unit V: DSP Applications & Introduction to Digital Signal Processors
The final unit explores various applications of DSP. In the world of digital signal
processing (DSP), the efficient manipulation and processing of signals play a pivotal role in
various applications, ranging from communications and audio processing to biomedical and
image processing. This chapter delves into two fundamental aspects of DSP: Multirate Signal
Processing and Adaptive Filters. Additionally, we will explore the principles of DSP
architecture, specifically focusing on Fixed and Floating-Point architectures, which are
essential for implementing signal processing algorithms.
Overall, this detailed introduction to Digital Signal Processing provides a
comprehensive understanding of the fundamental concepts, techniques, and applications in
the field. It equips individuals with the knowledge to analyze, process, and manipulate digital
signals effectively, enabling them to tackle a wide range of signal processing challenges
across various industries.
Digital Signal Processing 22
CHAPTER 2
DISCRETE FOURIER TRANSFORM
2.1. INTRODUCTION TO DISCRETE FOURIER TRANSFORM:
In the field of Digital Signal Processing (DSP), we can compute the spectrum only at
specific discrete values of ω.
In DSP, signals are typically represented in a discrete form, such as discrete-time signals
or sampled signals. When analysing these signals in the frequency domain, we use the
Discrete Fourier Transform (DFT) or other similar techniques to compute their spectrum.
However, due to the discrete nature of these signals, the spectrum can only be computed at
specific discrete values of ω. These discrete values are determined by the sampling rate and
the length of the signal being analysed.
The time domain sequence x(n) is converted into frequency domain sequence X(k) is
called DFT.
The time domain sequence x(n) is converted into frequency domain sequence X(k) is
called DFT.
DFT as a Linear Transformation:
Digital Signal Processing 23
Matrix Equation of DFT and IDFT:
N-Point DFT of equation is,
N-Point IDFT of equation is,
Periodicity property of WN:
Evaluation of Matrix [W8]:
Digital Signal Processing 24
Evaluation of Matrix[W4]:
1. DFT of the sequence x(n)={1,-1,1,-1}. Using matrix
1 1 1 1 1 1(1) 1( 1) 1(1) 1(1)
1 j 1 j 1 1(1) j ( 1) 1(1) j ( 1)
X (K )
1 1 1 1 1 1(1) 1( 1) 1(1) 1( 1)
1 j 1 j 1 1(1) j ( 1) 1(1) j ( 1)
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0
0
4
0
2. Compute the 2-point DFT of the following sequences, x(n)={1,1} and x(n)={1,2}.
Digital Signal Processing 26
Digital Signal Processing 27
3. Compute the 4-point DFT of the following sequences x(n)={1,2,3,4}.
Digital Signal Processing 28
4. Determine the IDFT of 4-point sequence, X(k)= {10, -2+2j,-2,-2-2j}
5. Obtain 4-point DFT of the following sequence, x(n)=2n
Digital Signal Processing 29
6. Obtain 4-point DFT of the following sequence, x(n)={0,1,0,-1}
7. Calculate the DFT of a sequence x(n)={1,1,0,0,} and check the validity of your answer
by calculating its IDFT.
8.
Digital Signal Processing 30
Digital Signal Processing 31
Digital Signal Processing 32
2.2 DERIVING DFT FROM DTFT:
Digital Signal Processing 33
Comparison between DTFT and DFT:
Digital Signal Processing 34
2.3 PROPERTIES OF DFT:
1. Periodicity:
2. Symmetry:
Statement: The DFT of an even sequence is purely real and even. DFT of an
odd sequence is purely imaginary and odd.
Proof:
For even sequences:
For odd sequences:
X(k) = x(n)Cos(2πnk/N)
X(k) = x(n)Sin(2πnk/N)
Digital Signal Processing 35
3. Circular Convolution:
Digital Signal Processing 36
1.
Digital Signal Processing 37
Digital Signal Processing 38
2.4 CIRCULAR CONVOLUTION:
2.4.1 Graphical Method:
The two sequences x1(n) and x2(n) are given as follows:
x1(n)={2,1,2,1} and x2(n)={1,2,3,4} Find out the sequence x3(m) which is equal to
circular convolution of above two sequences.
Digital Signal Processing 39
Digital Signal Processing 40
2.4.2. Matrix Method:
Compute the 8-point circular convolution x1(n)={1,1,1,1,0,0,0,0},x2(n)=sin3Пn/8,0≤n≤7
using matrix method.
Digital Signal Processing 41
2.4.3. DFT-IDFT Method:
In an LTI system the input x(n)={1,1,2,1} and the impulse response h(n)={1,2,3,4}.Perform
the circular convolution using DFT and IDFT.
Digital Signal Processing 42
2.4.4. LINEAR FILTERING USING DFT:
Linear filtering operation is implemented with the help of linear convolution. The
output y(n) is obtained by convolving impulse response h(n) with input x(n).Now let
us see how DFT can be used to implement linear convolution.
Let the unit sample response of the LTI system be h(n) of length M,h(0),h(1),….h(M-
1).Let the input to this LTI system be x(n) of length L,x(0),x(1),….x(L-1).
The output of the LTI system is y(n).This output y(n) is the linear convolution of
input x(n) and unit sample response h(n).
Digital Signal Processing 43
Digital Signal Processing 44
Fig.2.1 Linear convolution
2.4.5. FILTERING LONG DATA SEQUENCES:
Consider the FIR filter system for linear filtering. The input sequence is x(n) and unit
sample response of the filter is h(n).The output y(n) of the filter is obtained by linear
convolution can be implemented using DFT.
Sometimes the input data sequence x(n) is a real time signal such as speech, ECG etc.
Such signals are very long in duration. Linear filtering of such long duration
sequences can be implemented using DFT.
The long duration sequence is segmented in the short duration blocks. Since the
filtering is linear, the successive input sequence blocks are filtered one at a time using
DFT. The corresponding output blocks are fitted together to generate combined output
sequence.
Advantages in using DFT:
1. Complicated calculations are involved in linear convolution. Hence DFT provides
simpler approach.
2. Linear filtering using DFT is computationally efficient because of FFT algorithms.
Digital Signal Processing 45
It consists of two methods
i.Overlap save method
ii.Overlap add method
i.Overlap save method:
i.Overlap add method:
Digital Signal Processing 46
Difference between overlap save and overlap add method:
Find linear convolution using overlap-add and overlap-save method of the following
sequences:
x(n)={1,2,-1,2,3,-2,-3,-1,1,1,2,-1}
h(n)={1,2,3}.
Compare the results and state the usage of each method.
Digital Signal Processing 47
ii.Overlap add method:
Here N=5,L=3 and M=3
Digital Signal Processing 48
Digital Signal Processing 49
2.4.6. FAST COMPUTATION OF DFT:
Digital Signal Processing 50
ii) Symmetry Property of WN:
2.4.7 Classification of FFT algorithms:
Digital Signal Processing 51
Fig.2.2 Flowchart of FFT Algorithm
Digital Signal Processing 52
2.4.8 RADIX-2 DECIMATION IN TIME (DIT) FFT ALGORITHM:
Digital Signal Processing 53
Digital Signal Processing 54
1. Find the 8 point of the sequence x (n) = { 2, 2, 2, 2, 1, 1, 1, 1 } using Decimation in
Time FFT algorithm.
[N/D 17]
Digital Signal Processing 55
SOLUTION:
𝑊80 = 1; 𝑊81 = 0.707 − 𝑗0.707; 𝑊82 = −𝑗; 𝑊83 = −0.707 − 𝑗0.707
X (K) = {12, 1-2.414j,0, 1-0.414j, 0,1+0.414j,0, 1+2.414j }
2. Compute an 8 point DFT using DIT FFT radix 2 algorithm. [M/J 17] [N/D
14,16]
X (n) = { 1, 2 , 3 , 4 , 4 , 3 , 2 , 1 }
SOLUTION:
Digital Signal Processing 56
𝑊80 = 1; 𝑊81 = 0.707 − 𝑗0.707; 𝑊82 = −𝑗; 𝑊83 = −0.707 − 𝑗0.707
X (K) = {20, - 5.828 – j 2.414, 0, - 0.172 – j 0.414, 0, - 0.172 + j 0.414, 0, - 5.828 + j 2.414}
3. Given x(n) = { 2n; 0 ≤ n ≤ 7} find X(K) using DIT FFT algorithm.
SOLUTION:
x(0) = 1 for n=0, x(1) = 2 for n=1, x(2) = 4 for n=2, x(3) = 8 for n = 3,
x(4) = 16 for n=4, x(5) = 32 for n=5, x(6) = 64 for n=6, x(7) = 128 for n = 7,
Therefore x(n) = {1, 2, 4, 8, 16, 32, 64, 128} and N =8
Twiddle factor
𝑊80 = 1; 𝑊81 = 0.707 − 𝑗0.707; 𝑊82 = −𝑗; 𝑊83 = −0.707 − 𝑗0.707
Digital Signal Processing 57
X(K)={255, 48.63+j166.05, -51+j102, -78.63+j46.05, -85,-78.63-j46.05,-51-j102,48.63-
j166.06}
4. Determine the DFT of the following sequence.
X(n)={1,1,1,1,0,0,0,0} using the signal flow graph. Show all the intermediate results on
the signal flow graph.
Digital Signal Processing 58
5. For the given sequence x(n)={0,1,2,3,4,5,6,7} find X(k) using decimation-in-time FFT
algorithm.
Digital Signal Processing 59
6. Find 8-point DFT of the sequence using radix-2 DIT algorithm
X(n)={1,-1,1,-1,0,0,0,0}
2.4.9 RADIX-2 DECIMATION IN FREQUENCY (DIF) FFT ALGORITHM:
Digital Signal Processing 60
Digital Signal Processing 61
Digital Signal Processing 62
1. Compute 8 point DFT of a sequence x(n)={0,1,2,3,4,5,6,7} using DIF and DIT algorithms.
Twiddle factors are 𝑊80 = 1; 𝑊81 = 0.707 𝑗0.707; 𝑊82 = 𝑗; 𝑊83 = −0.707 𝑗0.707
FT USING DIF FFT ALGORITHM
Digital Signal Processing 63
2. Compute the eight-point DFT of the sequence
X(n)={1; 0≤n≤7
0; otherwise by using DIF algorithm.
Digital Signal Processing 64
3. Compute 4 point DFT of a sequence x(n)={0,1,2,3} using DIF and DIT
algorithms.
Twiddle factors are 𝑊40 = 1; 𝑊41 = 𝑗
DFT USING DIT FFT ALGORITHM
DFT USING DIF FFT ALGORITHM
X(K)={6, -2+2j, -2, -2-2j}
Digital Signal Processing 65
4. Find the IDFT of the following sequence using DIT algorithm
X (K) = {20, - 5.828 – j 2.414, 0, - 0.172 – j 0.414, 0, - 0.172 + j 0.414, 0, - 5.828 + j
2.414}
Solution
Twiddle factors are 𝑊80 = 1; 𝑊8−1 = 0.707 𝑗0.707; 𝑊8−2 = 𝑗; 𝑊8−3 = −0.707
𝑗0.707
Method I
Digital Signal Processing 66
Method II
x(n)={ 1,2,3,4,4,3,2,1}
5. Compute IDFT of the sequence X(K) = { 7, -0.707-j0.707, -j, 0.707-j0.707, 1,
0.707+j0.707, j, -0.707+j0.707 } using DIT Algorithm.
Solution :
Twiddle factors are 𝑊80 = 1; 𝑊8−1 = 0.707 𝑗0.707; 𝑊8−2 = 𝑗; 𝑊8−3 = −0.707
𝑗0.707
Digital Signal Processing 67
x(n)={1, 1, 1, 1, 1, 1, 1, 0}
2.4.10 LINEAR FILTERING USING FFT:
An important application of the FFT algorithm is in FIR linear filtering of long data
sequences. Already we described two methods, the overlap-add and the overlap-save methods
for filtering a long data sequence with an FIR filter, based on the use of the DFT.
Let h(n),0 ≤n ≤M -1, be the unit sample response of the FIR filter and let x(n) denote
the input data sequence. The block size of the FFT algorithm is N. where N = L + M — 1 and
L is the number of new data samples being processed by the filter. We assume that for any
given value of M, the number L of data samples is selected so that N is a power of 2. For
purposes of this discussion, we consider only radix-2 FFT algorithms.
The N-point DFT of h(n), which is padded by L-1 zeros, is denoted as H(k). This
computation is performed once via the FFT and the resulting N complex numbers are stored.
To be specific we assume that the decimation-in-frequency FFT algorithm is used to compute
H(k). This yields H(k) in bit-reversed order, which is the way it is stored in memory.
Digital Signal Processing 68
In the overlap-save method, the first M - 1 data points of each data block are the last
M -1 data points of the previous data block. Each data block contains L new data points, such
that N = L + M - 1. The N-point DFT of each data block is performed by the FFT algorithm.
If the decimation-in-frequency algorithm is employed, the input data block requires no
shuffling and the values of the DFT occur in bit-reversed order. Since this is exactly the order
of H(k). we can multiply the DFT of the data, say Xm(k), with H(k) and thus the result
Ym(k) =H (k)Xm(k)
is also in bit-reversed order. The inverse DFT(IDFT) can be computed by use of an FFT
algorithm that takes the input in bit-reversed order and produces an output in normal order.
Thus there is no need to shuffle any block of data either in computing the DFT or the IDFT.
If the overlap-add method is used to perform the linear filtering, the computational
method using the FFT algorithm is basically the same. The only difference is that the N-point
data blocks consist of L new data points and M - 1 additional zeros. After the IDFT is
computed for each data block, the N-point filtered blocks are overlapped, and the M - 1
overlapping data points between successive output records are added together.
Let us assess the computational complexity of the FFT method for linear filtering. For
this purpose the one-time computation of H(k) is insignificant and can be ignored. Each FFT
requires (N/2) log2 N complex multiplications and N log2 N additions. Since the FFT is
performed twice, once for the DFT and once for the IDFT, the computational burden is N log2
N complex multiplications and 2N log2 N additions. There are also N complex
multiplications and N —1 additions required to compute ym(k). Therefore, we have (N log2
2N)/ L complex multiplications per output data point and approximately (2N log2 2N)/ L
additions per output data point. The overlap-add method requires an incremental increase of
(M — 1)/L in the number of additions.
It is interesting to compare the efficiency of the FFT algorithm with the direct form
realization of the FIR filter. Let us focus on the number of multiplications, which are more
time consuming than additions. Suppose that M = 128 = 27 and N = 2v. Then the number of
complex multiplications per output point for an FFT size of N = 2v is
Digital Signal Processing 69
The values of c(v) for different values of v are given in Table 1. We observe that there
is an optimum value of v which minimizes c(v). For the FIR filter of size M = 128, the
optimum occurs at v = 10.
We should emphasize that c(v) represents the number of complex multiplications for
the FFT-based method. The number of real multiplications is four times this number.
However, even if the FIR filter has linear phase, the number of computations per output point
is still less with the FFT-based method. Furthermore, the efficiency of the FFT method can be
improved by computing the DFT of two successive data blocks simultaneously, according to
the method just described. Consequently, the FFT-based method is indeed superior from a
computational point of view when the filter length is relatively large.
The computation of the cross correlation between two sequences by means of the FFT
algorithm is similar to the linear FIR filtering problem just described In practical applications
involving cross correlation, at least one of the sequences has finite duration and is akin to the
impulse response of the FIR filter. The second sequence may be a long sequence which
contains the desired sequence corrupted by additive noise. Hence the second sequence is akin
to the input to the FIR filter. By time reversing the first sequence and computing its DFT, we
have reduced the cross correlation to an equivalent convolution problem (i.e., a linear FIR
filtering problem). Therefore, the methodology we developed for linear FIR filtering by use
of the FFT applies directly.
Digital Signal Processing 70
Question Bank
PART A (2 MARKS)
1. Calculate the 4-point DFT of the sequence x(n)={1,0,-1,0}. [A/M 18,19]
2. What is the relation between DTFT and DFT? [A/M 17]
or
What is the relationship between Fourier Transform and DFT? [A/M 18]
3. What are the differences and similarities between DIT and DIF FFT algorithms?
or [A/M 16, 18]
Compare Radix 2 DIT, DIF FFT algorithm. [N/D 16]
4. Compute the DFT of the sequence x(n)={1,-1,1,-1}. [A/M 17]
5. Define twiddle factor. [N/D 12,
17]
6. State and prove periodicity property of DFT. [N/D 17]
7. Test causality and stability of y(n)=sin x(n) [N/D 16]
8. Define discrete time system. [M/J 14] [N/D 15]
9. Define DFT & IDFT.(Or) Write the DFT and IDFT for an N-point sequence
[M/J19][N/D10]
10. Distinguish between DFT and DTFT. [N/D 11][A/M 10,14]
11. What is zero padding? What is the purpose of it? [N/D 11,13]
12. What is mean by in place in DIT and DIF algorithm. [N/D 14,18][M/J 13]
13. What are the advantages of FFT algorithm over direct computation of DFT? [A/M 11]
14. What do you mean by the term ―bit reversal‖ as applied to FFT? [A/M 11][M/J 14]
15. Compare the number of multiplications needed to compute DFT of 64-point sequence using
direct method and FFT algorithm. [N/D 10,14]
16. How many multiplications and additions are required to compute N-point DFT using radix-2
FFT? [N/D 10,13,18]
17. State the difference between overlap-save method and overlap-add method. [M/J 16]
18. How do you obtain a digital signal for DT signal? [N/D 15]
1 1 1
19. Is h(n) (n 1) (n) (n 1) is stable and casual? Justify. [M/J 16]
4 2 4
Digital Signal Processing 71
20. What is the smallest no of DFTs and IDFTs needed to compute the linear convolution of length
50 sequence with a length of 800 sequence is to be computed using 64 point DFT and IDFT?
[M/J 16]
21. What is static & dynamic system? [M/J 12], [A/M 11]
22. Draw the basic butterfly structure for 2 point DIT – FFT structure?
23. Define digital signal processing.
24. Define signals and system.
25. List any four properties of DFT.
26. What are the applications of FFT algorithms?
27. Define circular convolution?
28. What is meant by radix -2 FFT?
29. Distinguish between linear and circular convolution of two sequences.
PART B QUESTIONS
1. Discuss in detail about the properties of DFT. [M/J 13, 18, 19]
2. Using the equation for circular convolution , for the 8 point DFT of the sequence
x(n)=1, 0≤n≤3
0, 4≤n≤7, Compute DFT of x1(n) given by
x1(n)=1, n=0
0, 1≤n≤4,
1, 5≤n≤7 [M/J 16]
3. Find IDFT Of The Sequence X(k)={5,0,1-j,0,1,0,1+j,0}
4. Explain in detail the steps in the computation of FFT using DIF algorithm. [M/J 13,15]
5. Find the 8 point of the sequence x (n) = { 2, 2, 2, 2, 1, 1, 1, 1 } using Decimation in Time FFT
algorithm. [N/D 17]
6. Compute an 8 point DFT using DIT & DIF FFT radix 2 Algorithm. [M/J 17] [N/D 14,16]
x (n) = { 1, 2 , 3 , 4 , 4 , 3 , 2 , 1 }
7. Compute the eight point DFT of the following sequences using DIF and DIT algorithm
x ( n) 1 , 0 n 7;
0 otherwise
8. Given x(n) = { 2n ; 0 ≤ n ≤ 7} find X(K) using DIT FFT algorithm.
9. Find the IDFT of the following sequence using DIT algorithm
X (K) = {20, - 5.828 – j 2.414, 0, - 0.172 – j 0.414, 0, - 0.172 + j 0.414, 0, - 5.828 + j 2.414}
10. Compute 4 point DFT of a sequence x(n)={0,1,2,3} using DIF and DIT algorithms.
[A/M 18]
11. Compute 8 point DFT of a sequence x(n)={0,1,2,3,4,5,6,7} using DIF and DIT algorithms.
[A/M 19]
12. Compute IDFT of the sequence X (K) = { 7, -0.707-j0.707, -j, 0.707-j0.707, 1,
0.707+j0.707, j, -0.707+j0.707 } using DIF Algorithm. [N/D
16]
13. Explain in detail about overlap save method and overlap-add method for filtering long
duration sequences using DFT. [A/M 14,15][N/D
13]
14. Find the output y(n) of a filter whose impulse response is h(n) = {1,1,1) and input signal x(n)
= {3, -1, 0, 1, 3, 2 , 0 , 1 , 2 , 1 } using
a. Overlap-save method
b. Overlap-add method
15. Perform the linear convolution of finite duration sequences h(n)={1, 2} and x(n)={ 1, 2, -1,
2, 3, -2, -3, -1, 1, 2, -1} by overlap save method. [N/D 16]
16. Discuss about the Applications of FFT in linear filtering.
17. Compute the 8 point circular convolution x1(n)= { 1, 1, 1, 1, 0, 0, 0, 0}
x2(n)=sin(3πn/8), 0≤n≤7 using matrix method. [A/M 16]
18. Check whether the following systems are linear: [N/D 15]
N 1
1
1. y(n)=[x(n)]2 2. y(n) =
N
x ( n m)
M 0
N 1
19. State and prove if x3(k)=x1(k) x2(k) then x3(n)= m 0
x1 (m) x2 ((n m)) N [M/J 16]
20. Perform circular convolution of the following sequences x1(n)={1,1,2,1}; x2(n)={1,2,3,4}
[A/M 18]
21. In an LTI system the input x(n) = {1,1, 2,1} and the impulse response h(n)= {1, 2, 3, 4}.
Perform the circular convolution using DFT and IDFT. [A/M 17]
22. Determine the circular convolution of the sequences x1(n) = {1, 2, 3, 1, 1, 2, 3, 1} and
x2(n)={4, 3, 2, 2, 2, 2, 3, 4} using DFT and IDFT. [N/D
17]
72
23. Let Xp(n) be a periodic sequence with fundamental period N. consider the following DFTs:
Xp(n) ----> X1(k) Xp(n) ---->X3(k)
i. What is the relationship between X1(k) & X3(k)
ii. Verify the result in part (i) using the sequence xp(n)={…1,2,1,2,1,2,1,2} [N/D
18]
24. consider the length-8 sequence defined for 0≤n≤8
x(n)={1,2,-3,0,1,-1,4,2} with a 8 point DFT. Evaluate the following functions of X(K) without
calculating DFT
i. X(0)
ii. X(4)
7
iii. k 0
X (K )
e j 3 / 4 X ( K )
7
iv. k 0
7 2
v. k 0
X (K ) [N/D
18]
25. Find the circular convolution of the following sequences x1(n)={1,2,2,1};
x2(n)={1,2,3,1} using circular or matrix method.
[A/M 19]
PART A Questions and Answers
1. Calculate the 4-point DFT of the sequence x(n)={1,0,-1,0}. [A/M 18,19]
N 1
We know that X ( K ) x ( n)e
j 2kn / N
k=0,1,…,N-1
n o
For N=4
3
X ( K ) x( n)e jkn / 2 k=0,1,…,3 & n=0,1,2,3
no
X ( K ) x(0) x(1) * e jk / 2 x(2) * e j 2k / 2 x(3) * e j 3k / 2
X ( K ) 1 0 * e jk / 2 (1) * e j 2k / 2 0 * e j 3k / 2
1 1 * e jk
For K=0
X (0) 1 1* e 0 =0
For K=1
X (1) 1 1* e j 1 1(1) 2
For K=2
X (2) 1 1* e j 2 1 1(1) 0
For K=3
X (3) 1 1* e j 3 1 1(1) 2
X(K)={0,2,0,2}
2. What is the relation between DTFT and DFT? [A/M 17]
OR
What is the relationship between Fourier Transform and DFT? [A/M 18]
The discrete Fourier transform (DFT) can be seen as the sampled version (in frequency-domain) of
the DTFT output.
X (e ) j
2
k x ( n )e
n
jn
N k
2
N
N 1 j 2kn
x ( n )e N
n 0
X (k )
3. What are the differences and similarities between DIT and DIF FFT algorithms?
(OR) [A/M 16, 18]
Compare Radix 2 DIT, DIF FFT algorithm. [N/D 16]
Differences:
S. No DIT DIF
The input is bit reversal while The input is in natural order while the
1
the output is in natural order. output is bit reversed
There is no complex The complex multiplication takes place
2
multiplication takes place. after add- subtract operation.
Similarities
a. Requires the same number of operations to compute DFT.
b. Can be done in-place.
c. Need to perform bit reversal at some place during the computation.
4. Compute the DFT of the sequence x(n)={1,-1,1,-1}. [M/J 17]
N 1
We know that X ( K ) x ( n)e
j 2kn / N
k=0,1,…,N-1
n o
For N=4
3
X ( K ) x( n)e jkn / 2 k=0,1,…,3 &
no
jk / 2
n=0,1,2,3 X ( K ) x(0) x(1) * e x(2) * e j 2k / 2 x(3) * e j 3k / 2
X ( K ) 1 (1) * e jk / 2 (1) * e j 2k / 2 (1) * e j 3k / 2
1 e jk / 2 e j 2k / 2 e j 3k / 2
For K=0
X (0) 1 e j 0 / 2 e j 2 0 / 2 e j 3 0 / 2 =1-1+1-1=0
For K=1
X (1) 1 e j *1/ 2 e j 2 *1/ 2 e j 3 *1/ 2
1 e j / 2 e j e j 3 / 2
1 ( j ) 1 ( j )
0
For K=2
X (2) 1 e j *2 / 2 e j 2 *2 / 2 e j 3 *2 / 2
1 e j e j 2 e j 3
1 (1) 1 (1)
4
For K=3
X (3) 1 e j *3 / 2 e j 2 *3 / 2 e j 3 *3 / 2
1 e j 3 / 2 e j 3 e j 9 / 2
1 ( j ) (1) ( j )
0
X(K)={0,0,4,0}
Using matrix
1 1 1 1 1 1(1) 1( 1) 1(1) 1(1)
1 j 1 j 1 1(1) j ( 1) 1(1) j ( 1)
X (K )
1 1 1 1 1 1(1) 1( 1) 1(1) 1( 1)
1 j 1 j 1 1(1) j ( 1) 1(1) j ( 1)
0
0
4
0
5. Define twiddle factor? [N/D 12]
"Twiddle factors" are the coefficients used to combine results from a previous stage to form
inputs to the next stage in FFT.
Twiddle factor: WN= e-j2π/N
6. State and prove periodicity property of DFT. [N/D 17]
If X(k) is an N-point DFT of x(n), then
x(n + N)= x(n) for all X(k + N)= X(k) for all k
N 1
X ( K ) x( n)e j 2kn / N k=0,1,…,N-1
n o
N 1
X ( K N ) x ( n ) e j 2 ( k N ) n / N
n o
N 1
x( n)e j 2kn / N * e j 2 * Nn / N
n o
N 1
. x ( n )e
n o
j 2kn / N
*1 X ( K )
X (K N ) X (K )
7. Define Discrete Time System. [M/J 14] [N/D 15]
It is a device or algorithm that operates on a discrete time signal called input or excitation
according to some predefined value, to produce another discrete time signal called the output or
the response of the system. y(n)=T[x(n)]
8. Define DFT & IDFT.(Or) Write the DFT and IDFT for an N-point sequence.
[M/J 19] [N/D 10]
It is a finite duration discrete frequency sequence which is obtained by sampling one period of
Fourier transform. Sampling is done ‗N‘ equally spaced points over the period extending
from . The DFT of discrete sequence x(n) is denoted by X(K) and it is given by.
N 1
X (k ) x(n)e j 2kn / N
n 0 k 0,1,2,....N 1.
The N-point IDFT of a sequence X(k) is
N 1
1
x ( n)
N
X ( k )e
k 0
j 2kn / N
n=0, 1, 2…N-1.
9. Distinguish between DFT and DTFT. [N/D 11][A/M 10,14]
Sl. No DFT DTFT
Obtained by performing sampling
Sampling is performed only in time
1. operation in both the time and
domain
frequency domains.
2. Discrete frequency spectrum Continuous function of ω
10. Test causality and stability of y(n)=sin x(n) [N/D 16]
The given signal is stable, because the value of sine function for any value of x(n) varies
between -1 and 1. Hence the output is stable.
Also it is causal for any n value since it has no term representing future values.
11. What is zero padding? What is the purpose of it? [N/D 11,13]
In evaluating the DFT, it is assumed that the length of the DFT which is N is equal to the
length L of the sequence x[n]. If N < L, time domain aliasing occurs due to under sampling and in
the process we could miss out some important details and get misleading information. To avoid
this N, the number of samples of x[n] is increased by adding some dummy sample of 0 values.
This addition of dummy samples is known as zero padding. The zero padding not only increases
the number of samples but also helps in getting a better idea of the frequency spectrum of X(Ω).
12. What is mean by in place in DIT and DIF algorithm. [N/D 14,18][M/J 13]
The basic butterfly diagrams used in DIT and DIF algorithms are shown in Fig. 1 and Fig. 2
respectively.
Fig. 1 Fig. 2
In Fig.1 two lines emerging from two nodes cross each other and connected to the two nodes
on the right hand side. This node represents memory locations. At the input nodes Xm(p) and
Xm(q), the inputs are stored. After the outputs Xm+1(p) and Xm+1(p) are calculated, the same
memory location is used to store the new values in place of the input values. An algorithm that
uses the, same location to store both the input and output sequences is called an in-place'
algorithm.
13. What are the advantages of FFT algorithm over direct computation of DFT? [A/M 11]
i. The complex multiplication in the FFT algorithm is reduced by (N/2) log2N times.
ii. Processing speed is very high compared to the direct computation of DFT.
14. What do you mean by the term ―bit reversal‖ as applied to FFT? [A/M 11][M/J 14]
"Bit reversal" is reversing the bits in a binary word from left to right. Therefore the MSBs
become LSBs and the LSBs become MSBs.
Input Binary Bit reversed Output
0 000 000 0
1 001 100 4
2 010 010 2
3 011 110 6
4 100 001 1
5 101 101 5
6 110 011 3
7 111 111 7
15. Compare the number of multiplications needed to compute DFT of 64-point sequence using direct
method and FFT algorithm. [N/D 10,14]
The number of complex multiplications required using direct computation is
N2 = 642=4096.
The number of complex multiplications required using FFT is
N 64
log 2 N = log 2 64 192.
2 2
4096
Speed improved factor = 21.33 .
192
16. State the difference between overlap-save method and overlap-add method. [A/M 16]
S. No Overlap-save method Overlap-add method
1. In this method, the size of the input data In this method the size of the input data
block is N=L+M-1 block is L.
Each data block consists of the last M-1
2. data points of the previous data block Each data block is L points and we append
followed by L new data points. M-1 zeros to compute N-point DFT.
In each output block M-1 points are In this no corruption due to aliasing, as
3. corrupted due to aliasing, as circular linear convolution is performed using
convolution is employed. circular convolution.
To form the output sequence the first M-1 To form the output sequence, the last M-1
4. data points are discarded in each output points from each output block is added to
block and the remaining data are fitted the first (m-1) points of the succeeding
together. block,
17. How many multiplications and additions are required to compute N-point DFT using radix-2
FFT? [N/D 10,13,18]
The number of multiplications and additions required to compute N-point DFT using radix-2
FFT are Multiplications = N log2 N Additions = N/2 log2 N.
18. How do you obtain a digital signal for DT signal? [N/D 15]
Digital signal is obtained by quantization (truncation and rounding) of discrete time signal.
1 1 1
19. Is h(n) (n 1) (n) (n 1) is stable and casual? Justify. [M/J 15]
4 2 4
h(n) is Stable and Non-Casual.
Stable
(n) is exist only at one instant ie., (0) 1
Therefore the value is 1 at any instant. h(n)= -1/4+1/2-1/4. Hence it is stable.
Non-Casual
For casual system, the system depends only on present and past not on future inputs.
The given system contains future input (n 1) . Hence the system is Non-Casual.
20. What is the smallest no of DFTs and IDFTs needed to compute the linear convolution of length 50
sequence with a length of 800 sequence is to be computed using 64 pt DFT and IDFT?
[M/J 16]
Overlap add method Overlap-save method
M=50; Wkt, N=L+M-1 No of data points lost =49
64=L+50-1L= 15 Total length of the sequence M=849;
No of blocks=800/15=54 No of DFTs required =(849/15)+1
No of DFTs required = 54+1=55 =58
No of IDFTs required = 54 No of IDFTs required = 57
21. Draw the basic butterfly structure for 2 point DIT – FFT structure? [N/D 10]
Digital Signal Processing 81
22. Define digital signal processing.
Digital Signal Processing refers to the processing of signals by digital systems like personal
computers and systems designed using digital Integrated Circuits, Microprocessors and
microcontrollers.
23. Define signals and system.
Any physical phenomenon that conveys or carries some information can be called as signals.
Any process that exhibits cause and effect relation can be called as system.
24. List any four properties of DFT.
i. Periodicity.
If X (k) is N-point DFT of a finite duration sequence x (n), then
X(n+N) = x(n) for all n and X(k+N) = X(k) for all k
ii. Linearity
If X1 (k) = DFT[x1(n)] andX2 (k) = DFT[x2 (n)],
Then DFT [a1x1 (n) + a2 x2 (n)] =a1X1(k)+a2 X2(k)
iii. Time reversal of a sequence
If DFT[x(n)] = X(k), then
DFT [x (-n) N] = DFT [x (N-n)] =X (-k) N=X (N-k)
iv. Circular time shifting of a sequence
If DFT[x(n)]=X(k),
Then, DFT[x (n-l) N] = X (k) e-j2πkl/N
25. What are the applications of FFT algorithms?
The applications of FFT algorithm includes
1. Linear filtering 2. Correlation 3. Spectrum analysis
26. What is static & dynamic system? [A/M 11] [M/J 12]
A discrete time system is called static or memory less system if its output at any instant n
depends almost on the input sample at the same time but not on the past or future samples of the
input. In any other case, the system is said to be dynamic or to have memory.
Digital Signal Processing 82
27. Define circular convolution?
Let x1 (n) and x2 (n) are finite duration sequences both of the length N with DFTs X1 (k) and X2
(k).
If X3(k) =X1 (k) X2 (k), then the sequence x3 (n) can be obtained by circular convolution,
N 1
defined as x3 ( n) x (m)x
m 0
1 2 ( n m) N
28. Distinguish between linear and circular convolution of two sequences.
S. No Linear convolution Circular convolution
If x(n) is a sequence if L Number of samples If x(n) is a sequence of L Number of
and h(n) with M number of samples, after samples and h(n) with M samples, after
1
convolution y(n) will contain N=L+M-1 convolution y(n) will contain N=Max(L,M)
samples. samples.
Linear convolution can be used to find the Circular convolution cannot be used to find
2
response of a linear filter the response of a linear filter.
Zero padding is not necessary to find the Zero padding is necessary to find the
3
response of a linear filter. response of a filter.
29. What is meant by radix -2 FFT?
The FFT algorithm is most efficient in calculation N-point DFT. If the number of output
points N can be expressed as a power of 2, that is N=2M, Where M is an integer, then this
algorithm is known as radix-2 FFT algorithm.
Digital Signal Processing 83
PART B
1. Discuss in detail about the properties of DFT. [M/J 13,18]
The properties of the DFT are useful in the practical techniques for processing signals. The various
properties are given below.
b. Periodicity
If X(k) is an N-point DFT of x(n), then
x(n + N)= x(n) for all
X(k + N)= X(k) for all k
c. Linearity
If X1(k) and X2(k) are the N-point DFTs of x1(n) and x2(n) respectively, and A and B are
arbitrary constants either real or complex-valued, then
Ax1(n)+Bx2(n) DFT , N AX1(k)+BX2(k)
d. Shifting Property
Let xp(n) is a periodic sequence with period N, which is obtained by extending x(n)
periodically, i.e.
x p ( n) x(n lN )
l
Now, shift the sequence xp(n) by k units to the right. Let the resultant signal be expressed as
xp(n) which is given by
x p ( n) x p ( n k )
'
x(n k lN )
l
The finite duration sequence x(n),
x' (n),0 n N 1
x ' (n) p ,
0, otherwise
can be obtained from x(n) by a circular shift.
The circular shift of a sequence can be represented by the index modulo N,
x‘(n)=x(n-k, (mod N))
j2km
-
N
DFT[x((n- m))N ] = e X (K )
e. Time Reversal of a Sequence
Digital Signal Processing 84
If
Hence, when the N-point sequence in time is reversed, it is equivalent to reversing the
DFT values.
f. Circular Time Shift
If
Shitting of the sequence by l units in the time-domain is equivalent to multiplication of
e-j2πkl/N in the frequency-domain.
g. Circular Frequency Shift
If
Hence, when the sequence x(n) is multiplied by the complex exponential sequencee-
j2πkl/N
, it is equivalent to circular shift of the DFT by l units in the frequency domain.
h. Complex conjugate property
If then
i. Circular convolution
Digital Signal Processing 85
j. Circular Correlation
For complex-valued sequences x(n) and y(n),
If
Where rxy(l) is the (unnormalised) circular cross-correlation sequence, given as
k. Multiplication of Two Sequences
If
l. Parseval's Theorem
For complex-valued sequences x(n) and y(n), If
then
If y(n)=x(n), then the above equation reduces to
2. Using the equation for circular convolution , for the 8 point DFT of the sequence
x(n)=1, 0≤n≤3
0, 4≤n≤7, compute DFT of
x1(n)=1, n=0
Digital Signal Processing 86
0, 1≤n≤4,
1,5≤n≤7 [M/J 16]
Solution :
x(n)={1,1, 1,1, 0, 0, 0, 0}
x1(n)={1, 0, 0, 0, 0, 1, 1, 1}
X1(n) Is obtained by shifting x(n) by three times.
DFT of x(n)
N 1
X(k)= n 0
x(n)e j 2kn / N
Where k and n varies from 0 to (N-1=8-1=) 7
x(n)e j 2kn/ 8
7
X(k)= n0
j 2 .0.n / 8
7
X(0)= n0
x ( n)e x(0) x(1) x(2) x(3)
X(0)=4
x(n)e j 2 .1.n / 8 n0 x(n)e jn / 4
7 7
X(1)= n 0
x(0)e 0 x(1)e j 2 / 4 x(2)e j 3 / 4 x(3)e j 4 / 4
1 e j / 2 e j 3 / 4 e j
= 1-j+(-0.707-0.707j)-1
X(1) =1-j2.414
Digital Signal Processing 87
x(n)e j 2 .2.n / 8 n0 x(n)e jn / 2
7 7
X(2)= n 0
x(0)e 0 x(1)e j / 2 x(2)e j 2 / 2 x(3)e j 3 / 2
= 1+1(-j)+1(-1)+1(j)=1-j-1+j=0
X(2) =0
x(n)e j 2 .3.n / 8 n0 x(n)e j 3n / 4
7 7
X(3)= n 0
x(0)e0 x(1)e j 3 / 4 x(2)e j 6 / 4 x(3)e j 9 / 4
x(0)e0 x(1)e j 3 / 4 x(2)e j 3 / 2 x(3)e j 9 / 4
=1+1(-0.707-0.707j)+1(j)+1(0.707-0.707j)
=1-0.707-0.707j+j+0.707-0.707j
X(3)= 1- j0.414
j 2 .4.n / 8
jn
7 7
X(4)= n 0
x ( n)e n 0
x ( n)e
=1+1(e-jπ)+ 1(e-j2π)+ 1(e-j3π)=1-1+1-1
X(4)= 0
j 2 .5.n / 8
7
X(5)= n 0
x ( n )e
x(0)e 0 x(1)e j 5 / 4 x(2)e j10 / 4 x(3)e j15 / 4
x(0)e 0 x(1)e j 5 / 4 x(2)e j 5 / 2 x(3)e j15 / 4
=1+1(-0.707+0.707j)+1(-j)+1(0.707+0.707j)
=1-0.707+0.707j-j+0.707+0.707j
X(5)= 1+j0.414
x(n)e j 2 .6.n / 8 n0 x(n)e j 3n / 2
7 7
X(6)= n 0
Digital Signal Processing 88
x(0)e0 x(1)e j 3 / 2 x(2)e j 6 / 2 x(3)e j 9 / 2
=1+j-1-j
X(6)= 0
j 2 .7.n / 8
7
X(7)= n 0
x ( n )e
x(0)e 0 x(1)e j 7 / 4 x(2)e j 14 / 4 x(3)e j 21 / 4
1 e j / 2 e j 3 / 4 e j = 1-j+-1
X(7)= 1+j2.414
X(k)={4, 1+j2.414, 0,1-j0.414, 0,1+j0.414, 0, 1+j2.414}
Then
x1(n)=(x(n+3))N
X1(k)=DFT(x(n+3))N
j 3 .km / N
DFT(x1(n-m))N=x(k) e
j 3 *0 / 8
X1(0)=x(0) e
=4
j 3 *1 / 8
X1(1)=x(1) e
=1-j2.413
j 3 *2 / 8
X1(2)=x(2) e
=0
j 3 *3 / 8
X1(3)=x(3) e
= 1+j0.414
Digital Signal Processing 89
j 3 *4 / 8
X1(4)=x(4) e
=0
j 3 *5 / 8
X1(5)=x(5) e
=1-j 0.414
j 3 *6 / 8
X1(6)=x(6) e
=0
j 3 *7 / 8
X1(7)=x(7) e
=1-j2.413
X1(k)={4,1+j2.413, 0, 1+j0.414, 0, 1-j0.414, 0, 1-j2.413 }
3. Find IDFT Of The Sequence X(k)={5,0,1-j,0,1,0,1+j,0}
Solution
N 1
1
We know that x ( n)
N
X ( k )e
k o
j 2kn / N
n=0,1,…,N-1
For N=8
N 1
1
x(n)=
8
X ( k )e
k 0
jkn? 4
n=0,1,….,7
1 7
x(0)= X (k ) 5 0 1 j 0 1 0 1 j 0 1
1
8 k o 8
1 7
1
x(1)= X (k )e 8 5 1 j j 1 1 1 j j
jk / 4
8 k o
=
1
6 0.75
8
1 7 1
x(2)= X (k )e jk / 2 5 (1 j )(1) 1(1) (1 j )(1)
8 k o 8
Digital Signal Processing 90
=
1
4 0.5
8
1 7 j 3k / 4
5 (1 j )( j ) 1(1) (1 j )( j )
1
x(3)= X (k )e
8 k o 8
=
1
2 0.25
8
1 7 jk
x(4)= X (k )e 5 (1 j )(1) 1(1) (1 j )(1)
1
=1
8 k o 8
1 7 j 5k / 4
8 5 (1 j )( j ) (1)(1) (1 j )(1) = 8 6 0.75
1
x(5)= X (k )e 1
8 k o
1 7 j 3k / 2
5 (1 j )(1) 1(1) (1 j )(1) = 1 4 0.5
1
x(6)= X (k )e
8 k o 8 8
x(7)= 1 7
1
X (k )e j 7k / 4 5 (1 j )( j ) 1(1) (1 j )( j ) = 1 2 0.25
8
k o 8 8
x(n) = 1,0.75,0.5,0.25,1,0.75,0.5,0.25
4. Explain in detail the steps in the computation of FFT using DIF algorithm. [M,J 13,15]
The decimation-in-time FFT algorithm decomposes the DFT by sequentially splitting input
samples x(n) in the time domain into sets of smaller and smaller subsequences and then forms a
weighted combination of the DFTs of these subsequences.
Digital Signal Processing 91
Another algorithm called decimation-in-frequency FFT decomposes the DFT by recursively
splitting the sequence elements X(k) in the frequency domain into sets of smaller and smaller
subsequences. To derive the decimation-in-frequency FFT algorithm for N, a power of 2, the input
sequence x (n) is divided into the first half and the last half of the points as discussed below.
Two different forms of equations are obtained, depending on whether k is even or odd.
Decomposing the sequence in the frequency domain, X(k), into an even numbered subsequence X
(2r) and an odd numbered subsequence X(2r + 1) where r = 0, 1, 2, ..., (N/2 -1), yields
Above equations represent the N/2-point DFTs. This Equation gives the sum of the first half
and the last half of the input sequence. The second equation gives the product of WN with the
difference of the first half and the last half of the input sequence.
For an 8-point DFT, i.e., N = 8
g(0) = x(0) + x(4) h(0) = x(0) - x(4)
g(1) = x(1) +x(5) h(1) = x(1) - x(5)
Digital Signal Processing 92
g(2) = x(2) + x(6) h(2) = x(2) - x(6)
g(3) = x(3) + x(7) h(3) = x(3) - x(7)
Here, the computation of the DFT is done by first forming the sequences g (n) and h (n), then
calculating h (n) and finally evaluating the N/2-point DFTs of these two sequences to obtain the even
numbered output points and the odd numbered output points, respectively.
Digital Signal Processing 93
Fig. 3 Flow
graph of
the first stage of DIF FFT for N=8
Digital Signal Processing 94
Fig. 4 shows the flow-graph of the second stage of decimation-in-frequency decomposition of an 8-
point DFT into four 2-point DFT computations. The above decomposition process can be continued
through decimation of the N/2-point DFTs X(2r) and X(2r + 1). The complete process consists of L =
log2N stages of decimation, where each stage involves N/2 butterflies of the type shown in Fig.5.
These butterflies are different from those in the decimation-in-time algorithm.
As a result, for computing the N-point DFT down to 2-point transforms, the DIF FFT algorithm
requires (N/2) log2 N complex multiplications and N log2 N complex additions, just as in the case of
radix-2 DIT FFT algorithm. The complete flow-graph of an 8-point DIF FFT algorithm is shown in
Fig. 6.
Fig. 4Flow graph of the second stage of DIT FFT for N=8
Digital Signal Processing 95
Fig. 5 Basic butterfly for DIF FFT
Fig.6 Reduced flow graph of final stage DIF FFT for N=8
It is observed from above Fig.6 that in the DIF FFT algorithm the input sequence x (n) appears in
natural order while the output X(k) appears in the bit-reversed order. The algorithm has in place
calculations given below with the butterfly structure Fig. 6.
A=a+b
B=(a-b)
Digital Signal Processing 96
5. Find the 8 point of the sequence x (n) = { 2, 2, 2, 2, 1, 1, 1, 1 } using Decimation in Time FFT
algorithm. [N/D 17]
SOLUTION:
X (K) = {12, 1-2.414j, 0, 1-0.414j, 0, 1+0.414j, 0, 1+2.414j }
6. Compute an 8 point DFT using DIT FFT radix 2 algorithm. [M/J 17] [N/D 14,16]
X (n) = { 1, 2 , 3 , 4 , 4 , 3 , 2 , 1 }
SOLUTION:
Digital Signal Processing 97
X (K) = {20, - 5.828 – j 2.414, 0, - 0.172 – j 0.414, 0, - 0.172 + j 0.414, 0, - 5.828 + j 2.414}
7. Compute the eight point DFT of the following sequences using DIF and DIT algorithm
x( n) 1 , 0 n 7;
0 otherwise
DIF Algorithm
X(K)={8, 0, 0, 0, 0, 0, 0, 0, 0}
DIT Algorithm
Digital Signal Processing 98
X(K)={8, 0, 0, 0, 0, 0, 0, 0, 0}
8. Given x(n) = { 2n; 0 ≤ n ≤ 7} find X(K) using DIT FFT algorithm.
SOLUTION:
x(0) = 1 for n=0, x(1) = 2 for n=1, x(2) = 4 for n=2, x(3) = 8 for n = 3,
x(4) = 16 for n=4, x(5) = 32 for n=5, x(6) = 64 for n=6, x(7) = 128 for n = 7,
Therefore x(n) = {1, 2, 4, 8, 16, 32, 64, 128} and N =8
Twiddle factor
Digital Signal Processing 99
X(K)={255, 48.63+j166.05, -51+j102, -78.63+j46.05, -85, -78.63-j46.05,
-51-j102, 48.63-j166.06}
9. Find the IDFT of the following sequence using DIT algorithm
X (K) = {20, - 5.828 – j 2.414, 0, - 0.172 – j 0.414, 0, - 0.172 + j 0.414, 0, - 5.828 + j 2.414}
Solution
Twiddle factors are
Method I
Digital Signal Processing 100
Method II
x(n)={ 1,2,3,4,4,3,2,1}
Digital Signal Processing 101
10. Compute 4 point DFT of a sequence x(n)={0,1,2,3} using DIF and DIT algorithms. [A/M 18]
Twiddle factors are
DFT USING DIF FFT ALGORITHM
DFT USING DIT FFT ALGORITHM
X(K)={6, -2+2j, -2, -2-2j}
Digital Signal Processing 102
11. Compute 8 point DFT of a sequence x(n)={0,1,2,3,4,5,6,7} using DIF and DIT algorithms.
Twiddle factors are [A/M 19]
DFT USING DIF FFT ALGORITHM
DFT USING DIT FFT ALGORITHM
X(K)={28, -4+9.656j, -4+4j, -4+1.656j, -4, -4-1.656j, -4-4j, -4-9.656j}
Digital Signal Processing 103
12. Compute IDFT of the sequence X(K) = { 7, -0.707-j0.707, -j, 0.707-j0.707, 1, 0.707+j0.707, j, -
0.707+j0.707 } using DIF Algorithm. [N/D 16]
Solution
Twiddle factors are
x(n)={1, 1, 1, 1, 1, 1, 1, 0}
13. Explain in detail about overlap save method and overlap add method for filtering long duration
sequences using DFT. [A/M 14,15][N/D 13]
While implementing linear convolution in FIR filters, the input signal sequence x(n) is much
longer than the impulse response sequence h(n) of a DSP system. Circular convolution can also be
used to implement linear convolution by padding zeros. The output cannot be obtained until the
entire input signal is received and hence there will be characteristic delays. Also, as the signal N 1 +
N2 - 1 gets longer; FFT implementation and the size of the memory needed become impractical. In
order to eliminate these problems while performing filtering operation (i.e. convolution) in the
frequency-domain, two signal segmentation methods, namely the overlap-add and the overlap-save
techniques, can be used to perform fast convolution by sectioning or grouping the long input
Digital Signal Processing 104
sequence into blocks or batches of samples and the final convolution output sequence can be
obtained by combining the partial convolution results generated from each block.
Overlap - Add Method
Following Fig. 7 shows the overlap-add fast convolution method.
Fig. 7 Overlap-add fast convolution method.
Steps Needed to Perform Overlap — Add Fast Convolution Method
a) (N -1) zeros are padded (added) at the end of the impulse response sequence h(n) which is
of length Al and a sequence of length M + N - 1 = L is obtained. Then, this L- point FFT is
performed and the output values are stored.
b) An L-point FFT on the selected data block is performed. Here each data block has N input
data values and (M -1) zeros.
c) The stored frequency response of the filter, i.e. the FFT output sequence obtained in step
(a) is multiplied by the HT output sequence of the selected data block obtained in step (b).
d) An L-point inverse FFT is performed on the product sequence obtained in step (c).
Digital Signal Processing 105
e) The first (M - 1) IFFT values obtained in step (d) is overlapped with the last (M— I) IFFT
values for the previous block. Then addition is done to produce the final convolution output
sequence y(n).
f) (f)For the next data block, go to step (b).
Overlap-Save Method
It has already been shown that multiplication of two DFTs yields a circular convolution of
time-domain sequences, i.e. y(n) = x(n)* h(n) = IFFT [X(f) H(f)]. But a linear convolution is
required for the implementation of a FIR filter. The overlap-save method is useful for convening
a circular convolution into a linear convolution.
Steps to Perform Overlap-Save Fast Convolution Method
a) (N - 1) zeros are padded (added) at the end of the impulse response sequence h(n) which is of
length M and a sequence of length (M+ N - 1) = L is obtained. Then, this L - point FFT is
performed and the output values are stored.
b) An L-point FFT on the selected data block is performed. Here each data block begins with the
last (M - 1) values in the previous data block, except the first data block which begins with (M
- 1) zeros.
c) The stored frequency response of the filter, i.e. the FFT output sequence obtained in step (a) is
multiplied by the FFT output sequence of the selected data block obtained in step (b).
d) An L-point inverse FFT is performed on the product sequence obtained in step (c).
e) The first (M - 1) values from successive output of step (d) are discarded and the last N values
of the IFFT obtained in step (d) is saved to produce the output y(n).
f) For the next data block, go to step (b).
Following Fig.8 shows the overlap-save convolution method.
Digital Signal Processing 106
Fig. 8 The overlap-save convolution method
14. Find the output y(n) of a filter whose impulse response is h(n) = {1,1,1) and input signal x(n) =
{3, -1, 0, 1, 3, 2 , 0 , 1 , 2 , 1 } using
a. Overlap-save method
b. Overlap-add method
Solution
a. Overlap-save method
The input sequence can be divided into blocks of data as follows.
x1 (n) {
0,0 3,1,0}
M 12 Zeros L3 data
points
x2 ( n ) 1,0
{ 1,3,2}
2 datas from provious block
3 new datapo int s
x3(n) = {3,2,0,1,2} and x4(n) = {1,2,1,0,0}
Digital Signal Processing 107
Given h(n)={1,1,1}
Increase the length of the sequence to L+M-1=5 by adding two zeros.
i.e. h(n) = {1,1,1,0,0}
y1 (n) = x1(n) N h (n) = {-1, 0, 3, 2, 2}
y2 (n) = x2(n) N h (n) = {4, 1, 0, 4, 6}
y3 (n) = x3(n) N h n) = {6, 7, 5, 3, 3}
y4 (n) = x4(n) h (n) = {1, 3, 4, 3, 1}
N
-1, 0, 3, 2, 2
discard 4, 2, 0, 4, 6
discard
6, 7, 5, 3, 3
1, 3, 4, 3, 1
discard
discard
y (n)= {3, 2, 2, 0, 4, 6, 5, 3, 3, 4, 3, 1}
b. Overlap-add method
Let the length of data block be 3. Two zeros are added to bring the length to five (L+M+-
1=5). Therefore,
x1 (n) = {3, -1, 0, 0, 0}
x2(n) = {0, 1, 2, 0, 0}
x3(n) = {0, 1, 2, 0, 0}
x4(n) = {1, 0, 0, 0, 0}
y1 (n) = x1 (n) N h (n) = {3, 2, 2, -1, 0}
y2 (n) = x2(n) N h (n) = {1, 4, 6, 5, 2}
y3 (n) = x3(n) N h (n) = {0, 1, 3, 3, 2}
3, 2, 2, -1, 0
y4 (n) = x4(n) N h (n) = {1, 1, 1, 0, 0}
add
1, 4, 6, 5, 2
y (n)= {3, 2, 2, 0, 4, 6, 5, 3, 3, 4, 3, 1}
add
0, 1, 3, 3, 2
add
Digital Signal Processing 108
15. Perform the linear convolution of finite duration sequences h(n)={1, 2} and x(n)={ 1, 2, -1, 2, 3,
-2, -3, -1, 1, 2, -1} by overlap save method. [N/D 16]
Solution
Given
h(n)={1, 2}
x(n)={ 1, 2, -1, 2, 3, -2, -3, -1, 1, 2, -1}
Overlap-save method
The input sequence can be divided into blocks of data as follows.
x1 (n) {
0 1,2,1,2}
M 11Zeros L 4 data
points
x2 (n) {2 3,2,3,1}
1 datas from provious block
4 new datapo int s
x3(n) = {-1,1,2,-1,0}
Given h(n)={1,2,0,0,0}
Increase the length of the sequence to L+M-1=5 by adding three zeros.
i.e. h(n) = {1,2,0,0,0}
y1 (n) = x1(n) N h (n) = {4, 1, 4, 3, 0}
y2 (n) = x2(n) h (n) = {0, 7, 4, -7, -7}
y3 (n) = x3(n) h n) = {1, -1, 4, 3, 2}
Discard first value in y1, y2 and y3 to get final output
Y(n)= {1, 4, 3, 0, 7, 4, -7, -7, -1, 4, 3, 2}
16. Discuss about the Applications of FFT in linear filtering.
An important application of the FFT algorithm is in FIR linear filtering of long data sequences.
Already we described two methods, the overlap-add and the overlap-save methods for filtering a long
data sequence with an FIR filter, based on the use of the DFT.
Let h(n),0 ≤n ≤M -1, be the unit sample response of the FIR filter and let x(n) denote the input
data sequence. The block size of the FFT algorithm is N. where N = L + M — 1 and L is the number
of new data samples being processed by the filter. We assume that for any given value of M, the
Digital Signal Processing 109
number L of data samples is selected so that N is a power of 2. For purposes of this discussion, we
consider only radix-2 FFT algorithms.
The N-point DFT of h(n), which is padded by L-1 zeros, is denoted as H(k). This computation
is performed once via the FFT and the resulting N complex numbers are stored. To be specific we
assume that the decimation-in-frequency FFT algorithm is used to compute H(k). This yields H(k) in
bit-reversed order, which is the way it is stored in memory.
In the overlap-save method, the first M - 1 data points of each data block are the last M -1 data
points of the previous data block. Each data block contains L new data points, such that N = L + M - 1.
The N-point DFT of each data block is performed by the FFT algorithm. If the decimation-in-
frequency algorithm is employed, the input data block requires no shuffling and the values of the DFT
occur in bit-reversed order. Since this is exactly the order of H(k). we can multiply the DFT of the
data, say Xm(k), with H(k) and thus the result
Ym(k) =H (k)Xm(k)
is also in bit-reversed order. The inverse DFT (IDFT) can be computed by use of an FFT algorithm
that takes the input in bit-reversed order and produces an output in normal order. Thus there is no need
to shuffle any block of data either in computing the DFT or the IDFT.
If the overlap-add method is used to perform the linear filtering, the computational method
using the FFT algorithm is basically the same. The only difference is that the N-point data blocks
consist of L new data points and M - 1 additional zeros. After the IDFT is computed for each data
block, the N-point filtered blocks are overlapped, and the M - 1 overlapping data points between
successive output records are added together.
Let us assess the computational complexity of the FFT method for linear filtering. For this
purpose the one-time computation of H(k) is insignificant and can be ignored. Each FFT requires
(N/2) log2 N complex multiplications and N log2 N additions. Since the FFT is performed twice, once
for the DFT and once for the IDFT, the computational burden is N log2 N complex multiplications and
2N log2 N additions. There are also N complex multiplications and N —1 additions required to
compute ym(k). Therefore, we have (N log2 2N)/ L complex multiplications per output data point and
approximately (2N log2 2N)/ L additions per output data point. The overlap-add method requires an
incremental increase of (M — 1)/L in the number of additions.
It is interesting to compare the efficiency of the FFT algorithm with the direct form realization
of the FIR filter. Let us focus on the number of multiplications, which are more time consuming than
Digital Signal Processing 110
additions. Suppose that M = 128 = 27 and N = 2v. Then the number of complex multiplications per
output point for an FFT size of N = 2v is
Table 1 Computational complexity
The values of c(v) for different values of v are given in Table 1. We observe that there is an
optimum value of v which minimizes c(v). For the FIR filter of size M = 128, the optimum occurs at v
= 10.
We should emphasize that c(v) represents the number of complex multiplications for the FFT-
based method. The number of real multiplications is four times this number. However, even if the FIR
filter has linear phase, the number of computations per output point is still less with the FFT-based
method. Furthermore, the efficiency of the FFT method can be improved by computing the DFT of
two successive data blocks simultaneously, according to the method just described. Consequently, the
FFT-based method is indeed superior from a computational point of view when the filter length is
relatively large.
The computation of the cross correlation between two sequences by means of the FFT
algorithm is similar to the linear FIR filtering problem just described In practical applications
involving cross correlation, at least one of the sequences has finite duration and is akin to the impulse
response of the FIR filter. The second sequence may be a long sequence which contains the desired
sequence corrupted by additive noise. Hence the second sequence is akin to the input to the FIR filter.
By time reversing the first sequence and computing its DFT, we have reduced the cross correlation to
an equivalent convolution problem (i.e., a linear FIR filtering problem). Therefore, the methodology
we developed for linear FIR filtering by use of the FFT applies directly.
17. Compute the 8 point circular convolution
x1(n)= { 1, 1, 1, 1, 0, 0, 0, 0}
x2(n)=sin(3πn/8), 0≤n≤7 using matrix method. [M/J 16]
Digital Signal Processing 111
Solution
Given: x1(n)= { 1, 1, 1, 1, 0, 0, 0, 0}
x2(n)=sin(3πn/8), 0≤n≤7
={ 0, sin(3π/8), sin(3π/4), sin(9π/8), sin(3π/2), sin(15π/8), sin(9π/2) sin(21π/8)}
={0, 0.9238, 0.707, -0.3827, -1, -0.3827,0.707,0.9238}
1 0 0 0 0 1 1 1 0
1 1 0 0 0 0 1 1 0.9238
1 1 1 0 0 0 0 1 0.707
1 1 1 1 0 0 0 0 -0.3827
0 1 1 1 1 0 0 0 -1
0 0 1 1 1 1 0 0 -0.3827
0 0 0 1 1 1 1 0 0.707
0 0 0 0 1 1 1 1 0.9238
y(n) = x1(n) x2 (n) ={1.2481, 2.5546, 2.5546, 1.2481, 0.2481, -1.0584, -1.0584,0.2481}
18. Check whether the following systems are linear: [N/D 15]
N 1
1
a.
y(n)=[x(n)]2 2. y(n) =
N
x ( n m)
M 0
1. y(n)=[x(n)]2
For linearity a1y1(n) + a2 y2(n) = T [ a1 x1(n) + a2 x2(n) ]
a1 x1(n)]2 + a2 x2(n)]2≠ [ a1 x1(n) + a2 x2(n) ]2
The linearity principle is not satisfied.
Therefore the system is not a linear system.
N 1
1
2. y(n) =
N
x ( n m)
M 0
For linearity a1y1(n) + a2 y2(n) = T [ a1 x1(n) + a2 x2(n) ]
N 1 N 1
1 1
a1
N
x1 (n m) + a2
M 0 N
x
M 0
2 (n m) = T [ a1 x1(n) + a2 x2(n) ]
N 1
1
=
N
a
M 0
1 x 1 (n - m) + a 2 x 2 (n - m)
Digital Signal Processing 112
N 1 N 1
1
= a1
N
x
M 0
1 (n - m) + a 2
M 0
x 2 (n - m)
N 1 N 1 N 1 N 1
1 1 1
a1
N
x1 (n m) + a2
M 0 N
x 2 ( n m) = a 1
M 0 N
M 0
x 1 (n - m) + a 2
M 0
x 2 (n - m)
The linearity principle is satisfied.
Therefore the system is a linear system.
19. State and prove if x3(k)=x1(k) x2(k) then x3(n)= m0 x1 (m) x2 ((n m)) N
N 1
[M/J 16]
Solution:
N 1 j 2kl / N
We know that X1(k)= m 0 x1 (m)e
N 1
j 2km / N
X2(k)= l 0
x 2 (l ) e
Given X3(k)=X1(k) X2(k)
N 1
X3(k)= m0 x1 (m)e x2 (l )e j 2kl / N
N 1 j 2km / N
l 0
1
N 1 j 2kn / N
x3(n)= k 0
X 3 ( k ) e
N
=
1 N 1 N 1
N
k 0 m 0 1
x ( m) e j 2km / N
N 1
l 0 2
x (l )e j 2kl / N e j 2kn/ N
1 N 1
x (m)l 0 x2 (l )k 0 e j 2k ( nml ) / N
N 1 N 1
= m0 1
N
The summation over k equals N for l=n-m where n-m is modulo N. For l≠n-m the sum is equal to
zero.
Therefore
1 N 1
X3(n) = x1 (m) x2 ((n m))N ( N )
N m0
N 1
X3(n) = m0 1
x (m) x2 ((n m))N
Digital Signal Processing 113
20. Perform circular convolution of the following sequences x1(n)={1,1,2,1}; x2(n)={1,2,3,4}
[A/M 18]
21. In an LTI system the input x(n) = {1,1, 2,1} and the impulse response
h(n)= {1, 2, 3, 4}. Perform the circular convolution using DFT and IDFT. [A/M 17]
DFT of x(n)
1 1 1 1 1 1(1) 1(1) 1( 2) 1(1) 5
1 j 1 j 1 1(1) j (1) 1( 2) j (1) 1
X (K )
1 1 1 1 2 1(1) 1(1) 1( 2) 1(1) 1
1 j 1 j 1 1(1) j (1) 1( 2) j (1) 1
DFT of h(n)
1 1 1 1 1 1(1) 1( 2) 1(3) 1(4) 10
1 j 1 j 2 1(1) j (2) 1(3) j ( 4) 2 2 j
H (K )
1 1 1 1 3 1(1) 1( 2) 1(3) 1( 4) 2
1 j 1 j 4 1(1) j ( 2) 1(3) j ( 4) 2 2 j
5 50
1 2 2 j
Y(k) = X(K) H(K) = 10 22 j 2 2 2 j =
1 2
1 2 2 j
IDFT of Y(K)
1 1 1 1 50
j 1 j 2 2 j
1 1
y ( n)
4 1 1 1 1 2
1 j 1 j 2 2 j
1(50) 1(2 2 j ) 1(2) 1(2 2 j ) 52 13
1 1(50) j (2 2 j ) 1(2) j (2 2 j ) 1 56 14
4 1(50) 1(2 2 j ) 1(2) 1(2 2 j ) 4 44 11
1(50) j (2 2 j ) 1(2) j (2 2 j ) 48 12
Digital Signal Processing 114
Circular convolution by matrix method
1 1 2 1 1 1(1) 1(2) 2(3) 1(4) 13
1 1 1 2 2 1(1) 1(2) 1(3) 2(4) 14
y (n)
2 1 1
1 3 2(1) 1(2) 1(3) 1(4) 11
1 2 1 1 4 1(1) 2(2) 1(3) 1(4) 12
22. Determine the circular convolution of the sequences x1(n) = {1, 2, 3, 1, 1, 2, 3, 1} and x2(n)={4,
3, 2, 2, 2, 2, 3, 4} using DFT and IDFT. [N/D 17]
Circular convolution of = IDFT (Product of DFT of the sequences)
the sequences
x1(n) N x2(n) = IDFT (X1( K) X2(K)
Digital Signal Processing 115
1 K
y(n) W8 Y ( K )
8
Circular convolution by matrix method
23. Let Xp(n) be a periodic sequence with fundamental period N. consider the following DFTs:
Xp(n) X1(k) Xp(n) X3(k)
i. What is the relationship between X1(k) & X3(k)
ii. Verify the result in part (i) using the sequence xp(n)={…1,2,1,2,1,2,1,2} [N/D 18]
i. What is the relationship between X1(k) & X3(k)
N- point DFT of xp(n) is given by
N 1
X 1 ( k ) x p ( n ) wN
kn
n o
Digital Signal Processing 116
3N- point DFT of xp(n) is given by
3 N 1
X 3 (k ) x
kn
p ( n) w3 N
n o
N 1 2 N 1 3 N 1
X 3 ( k ) x p ( n) w3 N x p ( n) w3 N x
kn kn kn
p ( n) w3 N
n o n N n2 N
N 1 N 1 N 1
X 3 (k ) x p ( n) w3 N x p ( n N ) w3 N x p ( n 2 N ) w3 N
kn ( n N ) k ( n2 N ) k
n o n 0 n 0
Xp(n) is periodic. Xp(n)= Xp(n+N)= Xp(n+2N)
N 1 N 1 N 1
X 3 (k ) x p (n) w3 N x p (n) w3 N w3 N x p ( n) w3 N
kn nk Nk nk 2 Nk
w3 N
n o n 0 n 0
N 1 N 1 N 1
X 3 ( k ) x p ( n) w3 N w3 N x w3 N x
kn Nk nk 2 Nk nk
p ( n) w3 N p ( n) w3 N
n o n 0 n 0
wmN wN w3N wN wm
kn kn / m kn kn / 3 kN k
and wmN
N 1 N 1 N 1
X 3 ( k ) x p ( n) wN w3 x p (n) wN w3 x
kn / 3 k nk / 3 2k nk / 3
p ( n) wN
n o n 0 n 0
N 1
X 3 ( k ) x p ( n) wN (1 w3 w3
kn / 3 k 2k
)
n o
X 3 (k ) (1 w3 w3 ) X1 (k / 3)
k 2k
ii. Verify the result in part (i) using the sequence xp(n)={…1,2,1,2,1,2,1,2}
Solution:
xp(n)={2,1} N=2
X1(k)=DFT(xp(n))={3,1}
For X3(k)=DFT(xp((n))3N)
xp((n))3N= xp((n))6 ={2,1,2,1,2,1}
X3(k)=DFT(xp((n))6 ={2,1,2,1,2,1})
X3(k)={9,0,0,3,0,0}
X3(k)=3X1(k/3)
X 3 (k ) (1 w3 w3 ) X1 (k / 3)
k 2k
X 3 (0) (1 w3 w3 ) X1 (0 / 3)
0 20
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3 * X 1 (0) 3 * 3 9
X 3 (1) (1 w3 w3 ) X1 (1/ 3) (1 w3 w3 ) * 0 0
1 2 1 2
X 3 (2) (1 w3 w3 ) X1 (2 / 3) (1 w3 w3 ) * 0 0
2 4 2 4
X 3 (3) (1 w3 w3 ) X 1 (3 / 3) (1 w3 w3 ) * X 1 (1)
3 6 3 6
(1 1 1) *1 3
X 3 (4) (1 w3 w3 ) X1 (4 / 3) (1 w3 w3 ) * 0 0
4 8 4 8
X 3 (5) (1 w3 w3 ) X1 (5 / 3) (1 w3 w3 ) * 0 0
5 10 5 10
X3(k)={9,0,0,3,0,0}
24. consider the length-8 sequence defined for 0≤n≤8
x(n)={1,2,-3,0,1,-1,4,2}
with a 8 point DFT. Evaluate the following functions of X(K) without calculating DFT
i. X(0)
ii. X(4)
7
iii. k 0
X (K )
e j 3 / 4 X ( K )
7
iv. k 0
7 2
v. k 0
X (K ) [N/D 18]
Solution:
i. X(0)=?
X(0)= sum of all x(n) = 1+2-3+0+1-1+4+2=6
X(0)=6
ii. X(4)=?
X(4)= sum of even x(n) values - sum of odd x(n) values
= (x(0)+x(2)+x(4)+x(6))- (x(1)+x(3)+x(5)+x(7))
= (1-3+1+4)-(2+0-1+2)=3-3
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X(4)=0
7
iii. k 0
X ( K ) =?
N 1
1
We know that x ( n)
N
X ( k )e
k o
j 2kn / N
1 7
If n=0 and N=8 then x (0)
8 k o
X ( k )e j 2k .0 / 8
1 7
x ( 0) X ( k )
8 k o
7
8 x(0) X ( k )
k o
X (k ) 8 x(0) 8 *1 8
k o
7
k 0
X ( K ) =8
e j 3 / 4 X ( K ) ?
7
iv. k 0
DFT(x(n-m))N= e j 2km / N X (k )
DFT(x(n-3))8= e j 2k *3 / 8 X (k ) = e j 3 / 4 X (k )
N 1
1
We know that x ( n m)
N
e
k o
j 2k *m / N
X ( k )e j 2kn / N
1 7 j 3k / 4
If n=0, m=3 and N=8 then x (0 3) e X ( k )e j 2k *0 / 8
8 k o
1 7 j 3k / 4
x ( 3) x(8 3) e
8 k o
X (k )
7
8 x (5) e j 3k / 4 X ( k )
k o
e
k o
j 3k / 4
X (k ) 8 * 1 8
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7 2
v. k 0
X (K ) ?
1 N 1
n0
2 N 1 2
X ( K ) x ( n )
N k 0
If N=8 then
X ( K ) 8 n 0 x(n)
7 2 7 2
k 0
8( x(0) x(1) x(2) x(3) x(4) x(5) x(6) x(7) )
2 2 2 2 2 2 2 2
8(1 4 9 0 1 1 16 4)
8 * 36 288
7 2
k 0
X ( K ) 288
25. Find the circular convolution of the following sequences x1(n)={1,2,2,1}; x2(n)={1,2,3,1} using
circular or matrix method. [A/M 19]
Circular Convolution matrix method
1 1 2 2 1 1 2 6 8 17
2 1 1 2 2 2 2 3 8 15
y (n)
2 2 1 1 3 2 4 3 4 13
1 2 2 1 4 1 4 6 4 15
For N=4
1 3
x ( n)
8 k o
X ( K )e j kn / 2
1
x ( n) ( X (0)e j 0 n / 2 X (1)e j 1n / 2 X (2)e j 2 n / 2 X (3)e j 3n / 2 )
8
1
x ( n) (0e j 0 n / 2 2e j 1n / 2 0e j 2 n / 2 2e j 3n / 2 )
8
1
x ( n) (2e j n / 2 2e j 3 n / 2 )
8
sub. n 0,1, 2, 3 and find x(0), x(1), x (2), x (3)
Digital Signal Processing 120
CHAPTER 3
INFINITE IMPULSE RESPONSE FILTERS
Frequency selective filters are crucial in signal processing and communication
systems. Analog filters like Butterworth and Chebyshev have specific characteristics, with
Butterworth having a smooth frequency response and Chebyshev having a steeper roll-off
with ripples. These analog filters can be designed as IIR filters for practical use. Converting
analog designs to digital can be done through the impulse invariance method or the bilinear
transformation. Proper approximation of derivatives is vital to prevent numerical issues.
Various IIR filter structures like direct form I, direct form II, cascade, and parallel
realizations offer different advantages in implementation. The following topics will be
covered in this chapter.
Characteristics of practical frequency selective filters
Characteristics of commonly used analog filters
Butterworth filters
Chebyshev filters
Design of IIR filters from analog filters (LPF, HPF, BPF, BRF)
Approximation of derivatives
Impulse invariance method
Bilinear transformation
Frequency transformation in the analog domain
Structure of IIR filter – direct form I, direct form II, Cascade, parallel
realizations
Digital Signal Processing 121
3.1 CHARACTERISTICS OF PRACTICAL FREQUENCY SELECTIVE
FILTERS:
Fig.3.1 Frequency response of low pass filter
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Fig.3.2 Frequency response of high pass filters
Digital Signal Processing 123
3.2 CHARACTERISTICS OF COMMONLY USED ANALOG FILTERS:
Analog Filter Design Using Butterworth Approximation: 3
The ideal low pass filter response is not physically realizable. Hence the response is
approximated with the help of standard functions such as Butterworth, Chebyshev,
elliptic etc.
The magnitude squared frequency response of Butterworth filter is,
Digital Signal Processing 124
Monotonically reducing magnitude response:
i. Characteristic is close to ideal response when order is increased.
ii. Response is monotonically reducing.
Order of Butterworth Filters:
The different attenuations and frequencies represented in Butterworth filter
approximation. The filter specifications are mentioned.
Digital Signal Processing 125
Here Ap is passband attenuation,
As is stopband attenuation
Ωp is passband edge frequency
Ωs is stopband edge frequency
Cutoff frequency of Butterworth filter:
Digital Signal Processing 126
Problems:
1. Obtain the poles and system function of normalized Butterworth filter for the order N=1,2
and 3.
Solution:
The magnitude response of the analog Butterworth LPF is,
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2. Design Butterworth filter for the following specifications:
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Analog Filter Design Using Chebyshev Approximation:
There are two types of Chebyshev approximation: Type-I and Type-II
Type-I Chebyshev filters: These are all pole filters. They have equiripple
characteristic in pass band and monotonic characteristic in stop band.
Type-II Chebyshev filters: These filters have poles as well as zeros. They have
monotonic characteristic in pass band and equiripple characteristic in stop band.
Digital Signal Processing 131
Chebyshev Polynomials:
The Chebyshev approximation is implemented with the help of Chebyshev
polynomials.
The higher order Chebyshev polynomials are obtained by,
Digital Signal Processing 132
Problems:
1.Design the Chebyshev filter with following specification:
Ap=2.5 dB, Ωp=20 rad/sec
As=30 dB, Ωs=50 rad/sec
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Digital Signal Processing 134
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3.3 ANALOG FREQUENCY TRANSFORMATIONS:
Here Ωp is the pass band edge frequency of the low pass filter from which frequency
transformation is executed to the desired filter.
Digital Signal Processing 136
3.4 Digital Frequency Transformations:
Digital Signal Processing 137
Problems:
1.The system function of the first order normalized lowpass filter is given as,
H(s)=1/s+1.Obtain the system function of second order bandpass filter having passband from
1 kHz to 2 kHz.
Digital Signal Processing 138
2. The digital low pass filter has following system, H(z)=1+2z-1/4-z-1,with ωp=1.12 rad.
Obtain a high pass filter with cut off frequency of 2 rad.
Digital Signal Processing 139
3.4 IIR FILTER DESIGN BY SOLUTION OF DIFFERENTIAL
EQUATIONS: (APPROXIMATION OF DERIVATIVES)
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Digital Signal Processing 141
1. An Analog filter has the following system function. Convert this filter into a digital filter
1
using backward difference for the derivative H ( s ) .
s 0.12 9
Solution:
Analog filter converted into a digital filter by replacing s=(1-z-1)/T in
backward difference method.
H(z) = H(s) at s=(1-z-1)/T
1
H ( z) 2
1 z 1
0.1 9
T
T2
H ( z)
(1 0.2T 0.01T 2 ) 2(1 0.1T ) z 1 z 2
T 2 /(1 0.2T 0.01T 2 )
H ( z)
2(1 0.1T ) 1
1 z 1 z 2
(1 0.2T 0.01T ) 2
(1 0.2T 0.01T )
2
3.5 IIR FILTER DESIGN BY IMPULSE RESPONSE:
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Digital Signal Processing 143
Digital Signal Processing 144
1. Design a third order butter worth digital filter using IIM technique. Assume sampling
period T=1second.
SOLUTION:
Digital Signal Processing 145
Digital Signal Processing 146
Digital Signal Processing 147
2. Using Impulse invariant method, convert the analog transfer function into digital function
2
Assume T = 0.1 Sec H (s)
s 1s 2
Solution:
Express given H(s) into sum of single pole system
For given H(s) take partial fraction
2 A B
H ( s)
s 1s 2 s 1 s 2
2 As 2 Bs 1
for S=-1
2=A(1)
A=2
for S=-2
2=A.0+B(-1)
B=-2
2 2
H (s)
s 1 s 2
Digital Signal Processing 148
3. Convert the analog filter into a digital IIR filter whose system function
sa
H (s) . Use Impulse invariance transformation. Assume a=0.2, b=3 and
s a 2 b 2
T=1sec.
The analog filter has a zero at s=-0.2 and poles at s= -0.2-j3 and s=-0.2+j3
s 0.2
H (s)
s 0.2 j3s 0.2 j3
Apply partial fraction
A B
H(s)=
s 0.2 j3 s 0.2 j3
s+0.2 = A(s+0.2-j3)+B(s+0.2+j3)
At s=-0.2+j3 j3=B(j6) B=1/2
At s=-0.2-j3 -j3=A(-j6) A=1/2
1/ 2 1/ 2 N
ck
H(s)= H (s)
s 0.2 j3 s 0.2 j3 k 1 s p k
Wkt, H(s) general form and can be replaced as H(z) by N
ck
H ( z) pk T 1
Then k 1 1 e z
1/ 2 1/ 2
H ( z) 0.2Tj 3T 1
0.2T j 3T 1
1 e e z 1 e e z
Digital Signal Processing 149
1 (e 0.2T cos 3T ) z 1
H ( z) or
1 (2e 0.2T cos 3T ) z 1 e 0.4T z 2
1 (e aT cosbT ) z 1
H ( z)
1 (2e aT cosbT ) z 1 e 2 aT z 2
For T=1
1 (e 0.2 cos 3) z 1 1 (0.817 ) z 1
H ( z)
1 ( 2e 0.2 cos 3) z 1 e 0.4 z 2 1 (1.635 ) z 1 0.67 z 2
1
4. Convert the given analog transfer function H ( s ) into digital transfer function
s a
by Impulse invariance transformation.
Solution:
In Impulse invariance transformation H(s) transferred as below
ck ck
H (s) H ( z)
s pk 1 e pkT z 1
For given problem solution is
1 1
H (s) H ( z)
s a 1 e aT z 1
5. The system function of the analog filter is given as,
Obtain the system function of the IIR digital filter by using
impulse invariance method.
Digital Signal Processing 150
6. Determine H(z) using impulse invariance technique for the analog system function,
Digital Signal Processing 151
Digital Signal Processing 152
3.6 IIR FILTER DESIGN BY BILINEAR TRANSFORMATION:
The bilinear transformation is a mapping that transforms the left half of s plane into the
unit circle in the z-plane only once, thus avoiding aliasing of frequency components. The
2 1 z 1
mapping from the s-plane to the z-plane in bilinear transformation is s .
T 1 z 1
Advantages
The bilinear transformation provides one-to-one mapping.
Stable continuous systems can be mapped into realizable, stable digital systems.
There is no aliasing.
Disadvantages
The mapping is highly non-linear producing frequency compression at high
frequencies.
Neither the impulse response nor the phase response of the analog filter is preserved
in a digital filter and obtained by bilinear transformation.
The bilinear transformation is a conformal mapping that transforms the jω axis into
the unit circle in the z-plane only once, thus avoiding aliasing using of frequency
components. Furthermore, all points in the LHP-of 's' are mapped inside the unit circle in
the z-plane and all points in the RHP of 's' are mapped into corresponding points outside
the unit circle in the Z-plane.
Let us consider an analog linear filter with system function
H(s) = b/(s +a)
which can be written as
This can be characterized by the differential equation
Digital Signal Processing 153
Where y’(t) denotes the derivative of y(t).
The approximation of the integral in Equation by the trapezoidal formula at
t= nT and to = nT-T yields y(nT) = (T/2) [y '(nT) -1-. yi(nT-T)] + y(nT-T)
From the differential Equation we obtain y (nT) =-ay(nT) + bx(nT)
Then y(nT) becomes
This relationship between s and z is known as bilinear transformation.
Let z=rejω and s=σ+jΩ then
Digital Signal Processing 154
Digital Signal Processing 155
The warping effect
Let Ω and ω represent the frequency variables in the analog filter and the derived '
digital filter respectively.
For small value of ω .
For low frequencies the relationship between Ω and ω are linear, as a result, the
digital filter have the same amplitude response as the analog filter. For high frequencies,
however, the relationship between Ω and ω becomes non-linear and distortion is introduced
in the frequency scale of the digital filter to that of the analog filter. This is known as the
warping effect.
The influence of the warping effect on the amplitude response is shown in Figure by
considering an analog filter with a number of pass bands centered at regular intervals. The
derived digital filter will have same number of pass bands. But the center frequencies and
bandwidth of higher frequency pass band will tend to reduce disproportionately.
Relation between Ω and ω
Prewarping:
The effect of the non-linear compression at high frequencies can be compensated. When
the desired magnitude response is piece-wise constant over frequency, this compression can
be compensated by introducing a suitable pre-scaling, or pre-warping the critical frequencies
by using the formula.
2
tan
T 2
Digital Signal Processing 156
s 0 .1
1. Convert the analog filter with system function H ( s ) into a digital IIR
s 0.12 9
filter using bilinear transformation. The digital filter should have a resonant frequency of
ωr=π/4.
The analog filter has a resonance at r 3 and ωr=π/4.
Then T is found by
2 2 2
r tan r T tan r tan and
T 2 r 2 3 8
2 1 z 1
s
T 1 z 1
2 1 z 1
0.1
T 1 z 1
H ( z) 2
2 1 z 1
0 . 1 9
T 1 z 1
2. A digital filter with a 3dB bandwidth of 0.25π is to be designed from the analog filter
c
whose system response is H ( s ) . Use bilinear transformation and obtain H(z).
s c
Given:
2 0.25 2 0.83
Gain = 3dB band wc =0.25π Then c tan tan 0.125
T 2 T T
0.83 / T
H (s)
s 0.83 / T
2 1 z 1
s
Relation between s and z is given by T 1 z 1
0.83 / T
H (s)
s 0.83 / T 2 1 z 1
s
T 1 z 1
Digital Signal Processing 157
0.83 / T
H (s)
2 1 z 1
0.83 / T
T 1 z 1
0.83(1 z 1 )
2 2 z 1 0.83 0.83 z 1
0.83(1 z 1 )
2.83 1.17 z 1
0.293 (1 z 1 )
H ( z)
1 0.413 z 1
2
3. Apply bilinear transformation to H ( s) with T = 1 Sec and find H(z).
s 1s 2
Using bilinear transformation H(Z) obtained by
H ( z ) H ( s ) s 2 1 z 1
T 1 z 1
2
H ( z)
2 1 z 1
2 1 z 1
1
1 1
2
T 1 z T 1 z
T = 1 Sec
2
H ( z)
1 z 1 1 z 1
2 1
1 2
1 z 1 2
1 z
2(1 z 1 ) 2
H ( z)
2(1 z 1 ) (1 z 1 2(1 z 1 ) 2(1 z 1
2(1 2 z 1 z 2 )
H ( z)
3 z 1 4
Digital Signal Processing 158
0.166(1 2 z 1 z 2 )
H ( z)
1 0.33z 1
3.7 DESIGN OF IIR FILTERS USING BUTTERWORTH AND
CHEBYSHEV APPROXIMATIONS:
1. Design digital Butterworth transformation filter using bilinear transformation
ωp=0.23П, ωs=0.43П,Ap=2dB,As=11dB,T=1 sec.
Digital Signal Processing 159
Digital Signal Processing 160
2. Design a digital Butterworth filter with the following specifications,
Determine system function H(z) for a Butterworth filter using Bilinear transformation.
Digital Signal Processing 161
Digital Signal Processing 162
3. Design a digital Butterworth filter satisfying the following constraints using Bilinear
method (T = 0.1sec)
0.8 H (e jw ) 1 for 0 0.2
H (e jw ) 0.2 for 0.6
Digital Signal Processing 163
Digital Signal Processing 164
4. Convert the single pole LPF with system functionH (Z) =0.5(1+Z-1)/1-0.302Z-2 into BPF
with upper and lower cut off frequencies WU & WL respectively. The LPF has 3 db BW of
WP=π/6 & WU=3π/4, WL=π/4
SOLUTION:
Digital Signal Processing 165
5. Design a digital chebychev LPF WITH the following specifications: αP = 1 db ripple
in the pass band 0 0.2 , αs = 15 db ripple in the stop band 0.3 using
(a) bilinear transformation (b) Impulse invariance transformation
Digital Signal Processing 166
Digital Signal Processing 167
Digital Signal Processing 168
Digital Signal Processing 169
6. Design a digital Butterworth filter satisfying the following constraints using bilinear
transformation (T = 1Sec)
1 H (e jw ) 1 for 0 0.2
2
H (e jw ) 0.08 for 0.4
Solution:
Given
The transformation to be used is bilinear transformation.
For bilinear transformation
Digital Signal Processing 170
Digital Signal Processing 171
Digital Signal Processing 172
7. Write down the steps to design digital filter using bilinear transform technique and
using this design a HPF with a pass band cutoff frequency of 1000Hz and down
10dB at 350Hz sampling frequency is 5000 Hz.
Solution
Digital Signal Processing 173
The transfer function of high pass filter
Digital Signal Processing 174
8. Design a digital Butterworth filter satisfying the following constraints using bilinear
transformation (T = 1sec) [A/M 17,
N/D 17]
1 H (e jw ) 1 for 0 0.2
2
H (e jw ) 0.2 for 0.4
Solution:
Digital Signal Processing 175
Digital Signal Processing 176
9. Design an analog Butterworth filter for a given specification
0.9 H ( j) 1 for 0 0.2
H ( j) 0.2 for 0.4
1
0 .2
1 2
1
1
0 .2 2
4.899
1
0 .9
1 2
1
1
0 .9 2
0.4843
Digital Signal Processing 177
log
N
s
log
p
4.899
log
N 0.4843
0.4
log
0.2
N 3.34
N 4
2
p 10 log(1 )
p 10 log(1 0.2345 )
0.9151
p
c 0.1
(10 p 1)1 / 2 N
0.2
0.75
(10 0.1*0.9151
1)1 / 8
For N=4
1
H ( s)
( s 2 0.76537s 1)(s 2 1.8477s 1)
H a ( s) H ( s) s s / c
1
H a ( s)
(( s / 0.75 ) 2 0.76537 ( s / 0.75 ) 1)(( s / 0.75 ) 2 1.8477 ( s / 0.75 ) 1)
Digital Signal Processing 178
Analog filter transfer function for the given specification
0.3164
H a ( s)
( s 0.574 s 0.5625 )( s 2 1.3858 s 0.5625 )
2
3.8 STRUCTURES OF IIR FILTERS:
b z
k 0
k
k
The IIR filters are represented by system function H(Z) = N and
1 ak z k
k 1
corresponding difference equation given by,
N N
y (n) a k y (n k ) bk x(n k )
k 1 k 0
Different realizations for IIR filters are,
1. Direct form-I
2. Direct form-II
3. Cascade form
4. Parallel form
1. Direct form - I
This is a straight forward implementation of difference equation which is very simple.
Typical Direct form – I realization is shown below. The upper branch is forward path and
lower branch is feedback path. The number of delays depends on presence of most previous
input and output samples in the difference equation.
Digital Signal Processing 179
2. Direct form - II
The given transfer function H(z) can be expressed as,
Y ( z) V ( z) Y ( z)
H ( z) .
X ( z) X ( z) V ( z)
where V(z) is an intermediate term. We identify,
V ( z) 1
N
-------------------all poles
1 ak z
X ( z) k
k 1
Y ( z) M
1 bk z k -------------------all zeros
V ( z ) k 1
The corresponding difference equations are,
N
v ( n) x ( n) a k v ( n k )
k 1
M
y (n) v(n) bk v( n 1)
k 1
Digital Signal Processing 180
This realization requires M+N+! multiplications, M+N addition and the maximum of
{M, N} memory location.
3. Cascade Form
The transfer function of a system can be expressed as,
H ( z ) H 1 ( z ) H 2 ( z ).... H k ( z )
Where H k (Z ) could be first order or second order section realized in Direct form – II form
i.e.,
bk 0 bk1 Z 1 bk 2 Z 2
H k (Z )
1 ak1 Z 1 ak 2 Z 2
Where K is the integer part of (N+1)/2
X(n)= x1(n) x2(n) x3(n) xk(n) y(n)
H1(z) H2(z) H3(z) Hk(z)
4. Parallel form structure
In the expression of transfer function, if N M we can express system function
Digital Signal Processing 181
N N
Ak
H (Z ) C 1
C H k (Z )
k 1 1 p k Z k 1
Where {pk} are the poles, {Ak} are the coefficients in the partial fraction expansion, and the
constant C is defined as C bN a N , The system realization of above form is shown below.
bk 0 bk1 Z 1
Where H k (Z )
1 ak1 Z 1 ak 2 Z 2
Once again choice of using first- order or second-order sections depends on poles of
the denominator polynomial. If there are complex set of poles which are conjugative in nature
then a second order section is a must to have real coefficients.
1.Obtain the direct form I, direct form II, cascade and parallel form realization for the
system y(n) = −0.1 y(n −1) + 0.2 y(n − 2) + 3x(n) + 3.6x(n −1) + 0.6 x(n − 2).[N/D 11,17]
Direct form I
Let 3x(n) + 3.6x(n - 1) + 0.6x(n - 2) = w(n)
y(n) = -0.1y(n - 1) + 0.2y(n - 2) + w(n) By inspection, The direct form I realization is
shown in Fig.
Digital Signal Processing 182
Direct form I realization
Direct form II
From the equation
Then direct II form realization is drawn as
Direct form II realization
Cascade Form
Digital Signal Processing 183
Now we realize H1(z) and H2(z) and cascade both to get realization of H(z)
Cascade Form realization
Parallel form
Parallel form realization
Digital Signal Processing 184
Question Bank
PART A (2 MARKS)
1. What is Prewarping? Why it is needed? [A/M-17][N/D-16][M/J 16] [N/D 10,12]
2. What is bilinear transformation? What is the main advantages and disadvantages of this
techniques? [A/M 15][M/J 14]
3. Give any two properties of butterworth filter and chebychev filter? [A/M 11][M/J-16 11]
4. What is the main disadvantage of direct-form realization? [N/D 13]
5. Draw the direct-form structure of IIR filter. [A/M 15] [N/D 11]
6. IIR filter does not have linear phase.justify. [N/D 15]
7. An IIR casual filter has the system function
Y (n) =x (n)-0.75y (n)
X (n) =0.875 δ (n) [N/D 15]
8. How digital IIR filters are designed? [N/D 13]
9. Sketch the mapping of s-plane and z-plane in Approximation of derivatives. [N/D 14]
10. What is the advantage of direct form II realization when compared to direct form I realization?
[N/D 10][A/M-17]
11. What is warping effect? What is its effect on magnitude and phase response? [M/J, 09]
12. Find the digital transfer function H(z) by using impulse invariant method for the analog
1
transfer function H(s) = . Assume T = 0.5 sec.
S+2
13. What are the desirable characteristics of bilinear transformation?[N/D-16]
14. Give the steps in the design of a digital filter from analog filters.[A/M-17]
Digital Signal Processing 185
PART B QUESTIONS
1. Explain in detail Butterworth filter approximation. [A/M 11]
2. Design a digital Butterworth & Chebyshev filter satisfying the following constraints using
impulse invariance method (T = 1sec) [M/J 16][M/J 13][N/D 12]
0.8 H (e jw ) 1 for 0 0.2
H (e jw ) 0.2 for 0.6
3. Using BLT design a high pass filter monotonic in the passband with a cutoff frequency of 1000
Hz and down 10 dB at 350 Hz. The sampling frequency is 5000 Hz.[N/D-16] [M/J- 16]
4. Design a digital chebychev LPF WITH the following specifications: αP = 1 db ripple in the
pass band 0 0.2 , αs = 15 db ripple in the stop band 0.3 using
(a)bilinear transformation (b) Impulse invariance transformation [N/D, 13]
5. Using Impulse invariant method, convert the analog transfer function into digital function
2
Assume T = 0.1 Sec H (s) [N/D 14][M/J 14]
s 1s 2
6. Obtain the direct form I, direct form II, cascade and parallel form realization for the system
y(n) = −0.1 y(n −1) + 0.2 y(n − 2) + 3x(n) + 3.6x(n −1) + 0.6 x(n − 2) [A/M 15]
Digital Signal Processing 186
PART A Questions and Answers (2 MARKS)
1.What is Prewarping? Why it is needed? [A/M 17, 18] [N/D 16]
The effect of the non-linear compression at high frequencies can be compensated. When the
desired magnitude response is piece-wise constant over frequency, this compression can be
compensated by introducing a suitable pre-scaling, or pre-warping the critical frequencies by using the
formula.
2.What are the methods used for digitizing the analog filter into a digital filter? [A/M 18]
The four most, widely used methods for digitizing the analog filter into a digital filter include
Approximation of derivatives.
The impulse invariant transformation.
The bilinear transformation.
The matched z-transformation technique
3. What are the requirements for the digital filter to be stable and casual? [A/M 17]
There are several methods that can be used to design digital filters having an infinite duration
unit sample response. The techniques described are all based on converting an analog filter into a
digital. Hence the conversion technique is to be effective.
4. List the different types of filters based on frequency response. [N/D 17]
Low Pass Filter
High Pass Filter
Band Pass Filter
Band Stop Filter
5.What is bilinear transformation? What are the main advantages and disadvantages of this technique?
[M/J 14]
The bilinear transformation is a mapping that transforms the left half of s plane into the unit
circle in the z-plane only once, thus avoiding aliasing of frequency components. The mapping from
the s-plane to the z-plane in bilinear transformation is .
Advantages
•The bilinear transformation provides one-to-one mapping.
Digital Signal Processing 187
•Stable continuous systems can be mapped into realizable, stable digital systems.
•There is no aliasing.
Disadvantages
•The mapping is highly non-linear producing frequency compression at high frequencies.
•Neither the impulse response nor the phase response of the analog filter is preserved in a
digital filter and obtained by bilinear transformation.
6. Give any two properties of butterworth filter and chebychev filter? [A/M 11][N/D 11]
Butterworth filter
i.The magnitude response of the butter worth filter decreases monotonically as the frequency
increases from 0 to ∞.
ii.The magnitude response of the butter worth filter closely approximates the ideal response as
the order N increases.
iii.The poles of the butter worth filter lies on a circle.
Chebychev filter
i.The magnitude response of the chebyshev filter exhibit ripple either in pass band or in stop
band according to type
ii.The poles of the chebyshev filter lies on an ellipse.
7. Draw the direct-form structure of IIR filter. [N/D 11][A/M 19]
Digital Signal Processing 188
8.What is the main disadvantage of direct-form realization? [N/D 13]
The direct form realization is extremely sensitive to parameter quantization. When the order of
the system N is large, a small change in a filter coefficient due to parameter quantization, results in a
large change in the location of the pole and zeros of the system.
9.How digital IIR filters are designed? [N/D 13]
There are several methods that can be used to design digital filters having an infinite duration
unit sample response. The techniques described are all based on converting an analog filter into a
digital Hence the conversion technique is to be effective; it should possess the following desirable
properties.
i.The jΩ-axis in the s-plane should map into the unit circle in the z-plane. Thus there will be a
direct relationship between the two frequency variables in the two domains.
ii.The left-half plane of the s-plane should map into the inside of the unit circle in the z-plane.
Thus a stable analog filter will be converted to a stable digital filter.
The four most, widely used methods for digitizing the analog filter into a digital • filter include
1. Approximation of derivatives.
2. The impulse invariant transformation.
3. The bilinear transformation.
4. The matched z-transformation technique
10.What is the advantage of direct form II realization when compared to direct form I realization?
[N/D 10]
In direct-form II realization, the number of memory locations required is less than that of
direct-form I realization.
11.What is warping effect? What is its effect on magnitude and phase response?
[M/J 09,16]
The relation between the analog and digital frequencies in bilinear transformation is given by .
For smaller values of ω there exist linear relationship between ω and Ω. But for large values of ω the
relationship is non-linear. This non-linearity introduces distortion in the frequency axis. This is known
as warping effect. This effect compresses the magnitude and phase response at high frequencies.
Digital Signal Processing 189
12.Find the digital transfer function H(z) by using impulse invariant method for the analog transfer
1
function H(s) = . Assume T = 0.5 sec.
S+2
In impulse invariant transformation,
Here pk = -2 and T=0.5 sec. Hence we can write,
13.Distinguish between recursive realization and non-realization.
S. No Recursive Realization Non-Recursive Realization
The present output y (n) is a
The current output y(n) is a function
1. function of past outputs, past and
of only past and present inputs.
present inputs.
Corresponds to an Infinite Corresponds to a Finite Impulse
2.
Impulse Response digital filter. Response digital filter.
14.Define pass band. [N/D 15]
Pass band is defined as the range of frequencies which are allowed to pass without any
distortion.
15.Use backward difference for the derivative to convert analog LPF with system function
1
H(s) = [N/D 15]
S+2
Solution
For this method s is replaced by s=(1-z-1)/T
then 1
H(z) =
(1 - z ) /T 2
-1
T
1 - z 2T
-1
Digital Signal Processing 190
16.Why impulse invariant method is not preferred in the design of IIR filter other than LPF?
[M/J 16]
In impulse invariance method the mapping from s-plane to z plane is many to one i.e., all the
poles in the s-plane map in to entire z-plane. Thus there is an infinite number of poles that map same
location in the z-plane, producing aliasing effect. Due to the spectrum aliasing the impulse invariant
method is in appropriate for designing high pass filter. That is why the impulse invariant method is no
preferred in ythe design of IIR filter other than LPF.
17.What are the different types of structure for realization of IIR systems?
The different types of structures for realization of IIR system are
i.Direct-form-I structure
ii.Direct-form-II structure
iii.Transposed direct-form II structure
iv.Cascade form structure
v.Parallel form structure
vi.Lattice-Ladder structure
15. What are the properties of the bilinear transformation? [N/D 17, 18]
The mapping for the bilinear transformation is a one-to-one mapping; that is for every point
z, there is exactly one corresponding point s, and vice versa.
The jΩ-axis maps on to the unit circle |z|=1, the left half of the s-plane maps to the interior
of the unit circle |z|=1 and the right half of the s-plane maps on to the exterior of the unit
circle |z|=1.
16. State the structure of IIR filter. [N/D 18]
IIR filters are recursive type whereby the present output sample depends on present input, past
input samples and output samples. The design of IIR filter is realizable and stable.
The impulse response h(n) for a realizable filter is h(n)=0 for n<0.
PART B QUESTIONS AND ANSWERS
8. Explain in detail butterworth filter approximation. [A/M 11]
Digital Signal Processing 191
The magnitude function of the Butterworth filter is given by
------- (1)
Fig. 2 low pass Butterworth magnitude response
Where N is the order of the filter and Ωc, is the cutoff frequency. As shown in Fig. 2, the
function is monotonically decreasing, where the maximum response is unity at Ω = 0. The ideal
response is shown by the dashed line. It can be seen that the magnitude response approaches the
ideal low pass characteristics as the order N increases. For values Ω < Ωc; H ( j) 1 , for values
Ω > Ωc, the value of H ( j) decreases rapidly. At Ω = Ωc, , the curves pass through 0.707,
which corresponds to - 3 dB point. From Equation, magnitude square function of a normalized
Butterworth filter as
-----(1)
Now, let us derive the transfer function of a stable filter. For this purpose, substituting Ω=s/j we
can write Eq.(5.5) as
|H(jΩ2)|= H(Ω2)
= H(-s2)
= H(s) H(-s)
Digital Signal Processing 192
= H(jΩ) H(-jΩ)
---- (2)
-----(3)
The above relations tell us that this function has poles in the Left half of s-plane(LHP) as well
as in the Right half of s-plane (RHP), because of the presence of two factors H(s) and H(-s). If
H(s) has roots in the LHP then H(-s) has the corresponding roots in the RHP. We can obtain these
roots by equating the denominator to zero.
That is, 1 + (-s2)N = 0.
For N odd, the above Equation reduces to s2N = 1 = ej2irk.
Now the roots of above Equation can be found as sk = eirkIN k = 1,2, ... 2N
For N even, above Equation reduces to S2N = -1 = ej(2k-1)π which gives sk = ej(2k-1)/2N
For N = 3 Equation becomes s6 = 1.
Digital Signal Processing 193
Fig.3 Pole locations in the s-plane for magnitude square function of butterworth filter
Digital Signal Processing 194
Table 1. List of Butterworth polynomials
Digital Signal Processing 195
Digital Signal Processing 196
Fig. 4 Butterworth approximation of magnitude response
Digital Signal Processing 197
Digital Signal Processing 198
9. Design a digital Butterworth filter satisfying the following constraints using impulse
invariance method (T = 1sec) [M/J 13] [N/D 12]
0.8 H (e jw ) 1 for 0 0.2
H (e jw ) 0.2 for 0.6
Digital Signal Processing 199
10. Design a third order butterworth digital filter using IIM technique. Assume sampling period
T=1second [N/D 16, 17]
SOLUTION:
Digital Signal Processing 200
Digital Signal Processing 201
Digital Signal Processing 202
11. Convert the single pole LPF with system functionH (Z) =0.5(1+Z-1)/1-0.302Z-2 into BPF with
upper and lower cut off frequencies WU & WL respectively. The LPF has 3 db BW of WP=π/6
& WU=3π/4, WL=π/4 [N/D 16]
SOLUTION:
Digital Signal Processing 203
12. Design a digital chebychev LPF WITH the following specifications: αP = 1 db ripple in the
pass band 0 0.2 , αs = 15 db ripple in the stop band 0.3 using
(a)bilinear transformation (b) Impulse invariance transformation
[A/M 17] [N/D 13, 18]
Digital Signal Processing 204
Digital Signal Processing 205
Digital Signal Processing 206
Digital Signal Processing 207
13. Using Impulse invariant method, convert the analog transfer function into digital function
2
H (s)
s 1s 2
Assume T = 0.1 Sec [N/D 14][M/J 13]
Solution:
Express given H(s) into sum of single pole system
For given H(s) take partial fraction
2 A B
H ( s)
s 1s 2 s 1 s 2
2 As 2 Bs 1
FOR S=-1
Digital Signal Processing 208
2=A(1)
A=2
FOR S=-2
2=A.0+B(-1)
B=-2
2 2
H (s)
s 1 s 2
2
14. Apply bilinear transformation to H ( s) with T = 1 Sec and find H(z).
s 1s 2
[A/M 18]
Using bilinear transformation H(Z) obtained by
H ( z ) H ( s ) s 2 1 z 1
T 1 z 1
2
H ( z)
2 1 z 1 2 1 z 1
1
1 1
2
T 1 z T 1 z
T = 1 Sec
Digital Signal Processing 209
2
H ( z)
1 z 1
1 z 1
2 1
1 2
1 z 1 2
1 z
2(1 z 1 ) 2
H ( z)
2(1 z 1 ) (1 z 1 2(1 z 1 ) 2(1 z 1
2(1 2 z 1 z 2 )
H ( z)
3 z 1 4
0.166(1 2 z 1 z 2 )
H ( z)
1 0.33z 1
15. Obtain the direct form I, direct form II, cascade and parallel form realization for the system
y(n) = −0.1 y(n −1) + 0.2 y(n − 2) + 3x(n) + 3.6x(n −1) + 0.6 x(n − 2).[N/D 11,17]
Direct form I
Let 3x(n) + 3.6x(n - 1) + 0.6x(n - 2) = w(n)
y(n) = -0.1y(n - 1) + 0.2y(n - 2) + w(n) By inspection, The direct form I realization is shown in
Fig.
Fig 5. Direct form I realization
Direct form II
From the equation
Digital Signal Processing 210
Then direct II form realization is drawn as
Fig 6. Direct form II realization
Cascade Form
Now we realize H1(z) and H2(z) and cascade both to get realization of H(z)
Fig 7. Cascade Form realization
Digital Signal Processing 211
Parallel form
Fig 8. Parallel form realization
16. Explain the bilinear transform method of IIR filter design. What is warping effect? Explain
the poles and zeros mapping procedure clearly.
The bilinear transformation is a conformal mapping that transforms the jω axis into the unit
circle in the z-plane only once, thus avoiding aliasing using of frequency components.
Furthermore, all points in the LHP-of 's' are mapped inside the unit circle in the z-plane and all
points in the RHP of 's' are mapped into corresponding points outside the unit circle in the Z-plane.
Let us consider an analog linear filter with system function
H(s) = b/(s +a)
which can be written as
Digital Signal Processing 212
This can be characterized by the differential equation
Where y’(t) denotes the derivative of y(t).
The approximation of the integral in Equation by the trapezoidal formula at
t= nT and to = nT-T yields y(nT) = (T/2) [y '(nT) -1-. yi(nT-T)] + y(nT-T)
From the differential Equation we obtain y (nT) =-ay(nT) + bx(nT)
Then y(nT) becomes
Digital Signal Processing 213
This relationship between s and z is known as bilinear transformation.
Let z=rejω and s=σ+jΩ then
Digital Signal Processing 214
The warping effect
Let Ω and ω represent the frequency variables in the analog filter and the derived ' digital filter
respectively.
. For small value of ω
For low frequencies the relationship between Ω and ω are linear, as a result, the digital filter
have the same amplitude response as the analog filter. For high frequencies, however, the relationship
between Ω and ω becomes non-linear and distortion is introduced in the frequency scale of the digital
filter to that of the analog filter. This is known as the warping effect.
The influence of the warping effect on the amplitude response is shown in Figure by
considering an analog filter with a number of pass bands centered at regular intervals. The derived
digital filter will have same number of pass bands. But the center frequencies and bandwidth of higher
frequency pass band will tend to reduce disproportionately.
Digital Signal Processing 215
Fig 9. Relation between Ω and ω
Prewarping
The warping effect can be eliminated by prewarping the analog filter. This can be done by
finding prewarping analog frequencies using the formula
Therefore, we have
17. Design a digital Butterworth filter satisfying the following constraints using bilinear
transformation (T = 1Sec)
1 H (e jw ) 1 for 0 0.2
2
H (e jw ) 0.08 for 0.4
Solution:
Given
The transformation to be used is bilinear transformation.
Digital Signal Processing 216
For bilinear transformation
Digital Signal Processing 217
Digital Signal Processing 218
18. Explain the different structures for IIR Filters.
M
b z
k 0
k
k
The IIR filters are represented by system function H(Z) = N and corresponding
1 ak z k
k 1
difference equation given by,
N N
y (n) a k y (n k ) bk x(n k )
k 1 k 0
Different realizations for IIR filters are,
1. Direct form-I
2. Direct form-II
3. Cascade form
4. Parallel form
1. Direct form - I
This is a straight forward implementation of difference equation which is very simple. Typical
Direct form – I realization is shown below. The upper branch is forward path and lower branch is
feedback path. The number of delays depends on presence of most previous input and output samples
in the difference equation.
Digital Signal Processing 219
2. Direct form - II
The given transfer function H(z) can be expressed as,
Y ( z) V ( z) Y ( z)
H ( z) .
X ( z) X ( z) V ( z)
where V(z) is an intermediate term. We identify,
V ( z) 1
N
-------------------all poles
1 ak z
X ( z) k
k 1
Y ( z) M
1 bk z k -------------------all zeros
V ( z ) k 1
The corresponding difference equations are,
N
v ( n) x ( n) a k v ( n k )
k 1
M
y (n) v(n) bk v( n 1)
k 1
Digital Signal Processing 220
This realization requires M+N+! multiplications, M+N addition and the maximum of {M, N}
memory location.
3. Cascade Form
The transfer function of a system can be expressed as,
H ( z ) H 1 ( z ) H 2 ( z ).... H k ( z )
Where H k (Z ) could be first order or second order section realized in Direct form – II form i.e.,
bk 0 bk1 Z 1 bk 2 Z 2
H k (Z )
1 ak1 Z 1 ak 2 Z 2
Where K is the integer part of (N+1)/2
X(n)= x1(n) x2(n) x3(n) xk(n) y(n)
H1(z) H2(z) H3(z) Hk(z)
4. Parallel form structure
In the expression of transfer function, if N M we can express system function
N N
Ak
H (Z ) C 1
C H k (Z )
k 1 1 p k Z k 1
Digital Signal Processing 221
Where {pk} are the poles, {Ak} are the coefficients in the partial fraction expansion, and the constant
C is defined as C bN a N , The system realization of above form is shown below.
bk 0 bk1 Z 1
Where H k (Z )
1 ak1 Z 1 ak 2 Z 2
Once again choice of using first- order or second-order sections depends on poles of the
denominator polynomial. If there are complex set of poles which are conjugative in nature then a
second order section is a must to have real coefficients.
19. Write down the steps to design digital filter using bilinear transform technique and using
this design a HPF with a pass band cutoff frequency of 1000Hz and down 10dB at 350Hz
sampling frequency is 5000hz. [N/D 18] [M/J 16]
Digital Signal Processing 222
Solution
Digital Signal Processing 223
The transfer function of high pass filter
Digital Signal Processing 224
s 0 .1
20. Convert the analog filter with system function H ( s )
s 0.12 9 into a digital IIR
filter using bilinear transformation. The digital filter should have a resonant frequency of
ωr=π/4. [N/D 15]
The analog filter has a resonance at r 3 and ωr=π/4.
Then T is found by
2 r 2 r 2 2 1 z 1
r tan T tan tan and s
T 2 r 2 3 8 T 1 z 1
2 1 z 1
0.1
T 1 z 1
H ( z) 2
2 1 z 1
0 . 1 9
T 1 z 1
21. Convert the analog filter into a digital IIR filter whose system function
sa
H (s)
s a 2 b 2
. Use Impulse invariance transformation. Assume a=0.2, b=3 and
T=1sec. [N/D 15, A/M 18]
The analog filter has a zero at s=-0.2 and poles at s= -0.2-j3 and s=-0.2+j3
s 0.2
H (s)
s 0.2 j3s 0.2 j3
Apply partial fraction
A B
H(s)=
s 0.2 j3 s 0.2 j3
s+0.2 = A(s+0.2-j3)+B(s+0.2+j3)
At s=-0.2+j3 j3=B(j6) B=1/2
At s=-0.2-j3 -j3=A(-j6) A=1/2
1/ 2 1/ 2
H(s)=
s 0.2 j3 s 0.2 j3
N
ck
H (s)
k 1 s p k
N
ck
H ( z) pk T 1
Digital Signal Processing 225
Wkt, H(s) general form
And can be replaced as H(z) by
Then
1/ 2 1/ 2
H ( z) 0.2Tj 3T 1
0.2T j 3T 1
1 e e z 1 e e z
1 (e 0.2T cos 3T ) z 1 1 (e aT cosbT ) z 1
H ( z) or H ( z )
1 (2e 0.2T cos 3T ) z 1 e 0.4T z 2 1 (2e aT cosbT ) z 1 e 2 aT z 2
For T=1
1 (e 0.2 cos 3) z 1 1 (0.817 ) z 1
H ( z)
1 ( 2e 0.2 cos 3) z 1 e 0.4 z 2 1 (1.635 ) z 1 0.67 z 2
22. An Analog filter has the following system function. Convert this filter into a digital filter
1
using backward difference for the derivative H ( s ) . [N/D 15]
s 0.12 9
Solution:
Analog filter converted into a digital filter by replacing s=(1-z-1)/T in backward
difference method.
H(z) = H(s) at s=(1-z-1)/T
1
H ( z) 2
1 z 1
0.1 9
T
T2
H ( z)
(1 0.2T 0.01T 2 ) 2(1 0.1T ) z 1 z 2
T 2 /(1 0.2T 0.01T 2 )
H ( z)
2(1 0.1T ) 1
1 z 1 z 2
(1 0.2T 0.01T ) 2
(1 0.2T 0.01T 2 )
Digital Signal Processing 226
23. A digital filter with a 3dB bandwidth of 0.25π is to be designed from the analog filter whose
c
system response is H ( s )
s c
. Use bilinear transformation and obtain H(z).
[N/D 15]
Given
2 0.25 2 0.83
Gain = 3dB band wc =0.25π Then c tan tan 0.125
T 2 T T
0.83 / T
H (s)
s 0.83 / T
2 1 z 1
s
Relation between s and z is given by T 1 z 1
0.83 / T
H (s)
s 0.83 / T 2 1 z 1
s
T 1 z 1
0.83 / T
H (s)
2 1 z 1
0.83 / T
T 1 z 1
0.83(1 z 1 )
2 2 z 1 0.83 0.83 z 1
0.83(1 z 1 )
2.83 1.17 z 1
0.293 (1 z 1 )
H ( z)
1 0.413 z 1
24. Design a digital Butterworth filter satisfying the following constraints using bilinear
transformation (T = 1sec) [A/M 17, N/D 17]
1 H (e jw ) 1 for 0 0.2
2
H (e jw ) 0.2 for 0.4
Digital Signal Processing 227
Solution:
Digital Signal Processing 228
Digital Signal Processing 229
25. Design an analog Butterworth filter for a given specification [A/M 18]
0.9 H ( j) 1 for 0 0.2
H ( j) 0.2 for 0.4
1
0 .2
1 2
1
1
0 .2 2
4.899
1
0 .9
1 2
1
1
0 .9 2
0.4843
log
N
s
log
p
4.899
log
N 0.4843
0.4
log
0.2
N 3.34
N 4
2
p 10 log(1 )
p 10 log(1 0.2345 )
0.9151
Digital Signal Processing 230
p
c 0.1
(10 p 1)1 / 2 N
0.2
0.75
(10 0.1*0.9151
1)1 / 8
For N=4
1
H ( s)
( s 2 0.76537s 1)(s 2 1.8477s 1)
H a ( s) H ( s) s s / c
1
H a ( s)
(( s / 0.75 ) 2 0.76537 ( s / 0.75 ) 1)(( s / 0.75 ) 2 1.8477 ( s / 0.75 ) 1)
Analog filter transfer function for the given specification
0.3164
H a ( s)
( s 2 0.574 s 0.5625 )( s 2 1.3858 s 0.5625 )
1
26. Convert the given analog transfer function H ( s ) into digital transfer function by
s a
Impulse invariance transformation. [N/D 17]
Solution
In Impulse invariance transformation H(s) transferred as below
ck ck
H (s) H ( z)
s pk 1 e pkT z 1
For given problem solution is
1 1
H (s) H ( z)
s a 1 e aT z 1
27. Explain the Lattice Ladder Structure with neat diagram. [A/M 18]
Lattice-Ladder IIR Structure
For order N=1
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28. Explain IIR filter design by approximation of derivatives.
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29. Explain IIR filter design by Impuse Invariant Technique.
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CHAPTER 4
FINITE IMPULSE RESPONSE FILTERS
4.1 INTRODUCTION TO DIGITAL FILTERS:
Digital FIR filters have many favorable properties, which is why they are extremely
popular in digital signal processing. One of these properties is that they may exhibit
linear phase, which means that signals in the pass band will suffer no dispersion.
Dispersion occurs when different frequency components of a signal have a different delay
through a system.
The simplest design method for FIR filters is impulse response truncation (IRT), but
unfortunately it has undesirable frequency-domain characteristics, owing to the Gibb’s
phenomenon. The second design method for a FIR filter that we shall cover in this
Chapter is the windowing technique. The windowing method can be used to mitigate the
adverse effects of impulse response truncation.
The specifications of the desired filter will be given in terms of ideal frequency response
Hd(ω). The impulse response hd(n) of desired filter can be obtained by inverse Fourier
transform of hd(ω), which consists of infinite samples. The filters designed by selecting
finite number of samples of impulse response are called FIR filters.
Advantages:
FIR filter have exact linear phase
FIR filter are always stable
FIR filter can be realized in both recursive and non-recursive structure.
Filters with any arbitrary magnitude response can be tackled using FIR sequence.
Disadvantages:
For the same filter specifications the order of FIR filter design can be as high as 5 to
10 times that in a IIR design
Large storage requirements needed.
Powerful computational facilities required for the implementation.
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Table 4.1 Comparison of FIR and IIR filters:
S. No FIR filter IIR filter
These filters can be easily designed to These filters do not have linear phase
1.
have perfectly linear phase
FIR filters can be realized recursively IIR filters are easily realized
2.
and non-recursively. recursively.
Greater flexibility to control the shape Less flexibility, usually limited to
3.
of their magnitude response. specific kind of filters.
Errors due to round off noise are less The round off noise in IIR filters are
4. severe in Fir filters, mainly because more.
feedback is not used.
4.2 SYMMETRIC AND ANTI SYMMETRIC FIR FILTERS:
Depending on the value of N (odd or even) and the type of symmetry of the filter impulse
response sequence there are six possible types of linear phase FIR filters.
The following are the six cases of impulse response for linear phase FIR filters:
Case (i): symmetric impulse response and N is odd with centre of symmetry at (N-1)/2.
Case (ii): symmetric impulse response and N is even with centre of symmetry at (N-1)/2
Case (iii): Antisymmetric impulse response and N is odd with centre of antisymmetry at (N-1)/2.
Case (iv): Antisymmetric impulse response and N is even with centre of antisymmetry at(N-1)/2.
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4.3 DESIGN OF LINEAR PHASE FIR FILTERS:
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If the impulse response of the FIR filter is satisfying the following conditions the filter is
said to be a linear phase FIR filter. The conditions are
i. Symmetric condition h (n) = h (N-1-n)
ii. Anti-symmetric condition h (n) = - h (N-1-n).
Properties of FIR filter:
The FIR filters have following important properties, which make them different from IIR
filters.
i. FIR filters are inherently stable.
ii. FIR filters have linear phase.
iii. FIR filters need higher orders for similar magnitude response compared to IIR
filters.
iv. A realizable filter can always be obtained
Characteristics features of FIR filter:
Symmetric: Symmetric FIR filters have desirable phase & delay
Anti-symmetric: It provides constant delay for any frequency.
Useful when filters are included in timing applications,
for example: Filter delay is same, irrespective of signal input.
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Different types of filter based on impulse response:
Based on impulse response the filters are of two types
1. IIR filter
2. FIR filter
The IIR filters are of recursive type, whereby present the output sample depends on the
present input, past input samples and output samples.
The FIR filters are of non-recursive type whereby the present output sample is depended
on the present input sample and previous input samples.
4.4 FIR FILTER DESIGN USING WINDOWS:
There are essentially three well-known methods for FIR filter design namely:
1. Fourier series Method.
2. The window method
3. The frequency sampling technique
4.4.1 FOURIER SERIES METHOD:
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1. Design an ideal Low pass filter with frequency response,
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2.Design a high pass filter with a frequency response,
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4.4.2. The window method:
Design procedure for designing FIR filter using window:
The different windows parameters are compared looking at the parameters for rectangular
and triangular window, it can be noted that the triangular window has a transition width
twice that of rectangular window.
However, the attenuation in stop band for triangular window is less. Therefore, it is not so
popular for FIR filter design. The Hanning and Hamming windows have same transition
width. But the Hamming window is most widely used, because, it generates less ringing in
the side lobes.
The Blackman window reduces the side lobe level at the cost of increase in transition
width. The Kaiser window is superior to other windows, because, for given specifications
its transition width is always small.
By varying the parameter, a desired side lobe level and main lobe peak can be achieved.
Further, the main lobe width can be varied by varying the length N. That is why Kaiser
Window is the favourite window for many digital filter designers.
The window design for FIR filter has certain advantages and disadvantages.
Advantages:
i. The filter coefficients can be obtained with minimum computation effort.
ii. The window functions are readily available in closed-form expression.
iii. The ripples in both passband and in stopband are almost completely removed.
Disadvantages:
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i. It is always not possible to obtain a closed form expression for the Fourier series
coefficients h(n).
ii. Windows provides limited flexibility in the design.
iii. It is somewhat difficult to determine, in advance, the type of window and the
duration N required to meet a given prescribed frequency specification.
The desired frequency response of any digital filter is periodic in Frequency and can be
expanded in a Fourier series, i.e.
where
The Fourier coefficients of the series h (n) are identical to the impulse response of a
digital filter. There are two difficulties with the implementation of above equation for designing a
digital filter. First, the impulse response is of infinite duration and second, the filter is non-causal
and unrealisable. No finite amount of delay can make the impulse response realisable. Hence the
filter resulting from a Fourier series representation of H(ejw) is an unrealisable IIR filter.
The infinite duration impulse response can be converted to a finite duration impulse
response by truncating the infinite series at n = ±N. But, this results in undesirable oscillations in
the pass band and stop band of the digital filter. This is due to the slow convergence of the
Fourier series near the points of discontinuity. These undesirable oscillations can be reduced by
using a set of time-limited weighting functions, w (n), referred to as window functions, to modify
the Fourier coefficients.
The desired frequency response H(ejw) and its Fourier coefficients {h(n)} are shown at
the top of this figure. The finite duration weighting function w (n) and its Fourier transform W
(ejw) are shown in the second row. The Fourier transform of the weighting function consists of a
main lobe, which contains most of the energy of the window function and side lobes which decay
rapidly. The sequence h (n) = h(n). w(n) is obtained to get an FIR approximation of H(ejw). The
sequence h (n) is exactly zero outside the interval —N ≤ n ≤ N. The sequence h (n) and its
Fourier transform H(ejw) are shown in the third row. H(ejw) is nothing but the circular
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convolution of H(ejw) and W (ejw). The realisable causal sequence g(n), which is obtained by
shifting h(n), is shown in the last row and this can be used as the desired filter impulse response.
A major effect of windowing is that the discontinuities in H(ejw) are converted into
transition bands between values on either side of the discontinuity. The width of these transition
bands depends on the width of the main lobe of W(ejw). A secondary effect of windowing is that
the ripples from the side lobes of W(ejw) produces approximation errors for all w. Based on the
above discussion, the desirable characteristics can be listed as follows
1. The Fourier transform of the window function W(ejw) should have a small width of
main lobe containing as much of the total energy as possible.
2. The Fourier transform of the window function W(ejw) should have side lobes that
decrease in energy rapidly as w tends to π. Some of the most frequently used window functions
are described in the following sections.
4.4.3 TYPES OF WINDOWS:
1. RECTANGULAR WINDOW:
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2. HAMMING WINDOW:
The magnitude response of this window. It has reduced sidelobes but slightly increased main
lobe. The sidelobes are higher than blackmann window.
3. HANNING WINDOW:
This window is commonly used for spectrum analysis, speech and music processing. The
magnitude response of hanning window mentioned below. Observe that it has narrow main
lobe, but first few sidelobes are significant. Then sidelobe reduce rapidly.
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Gibb’s Phenomenon:
In the FIR filter design by Fourier series method(or rectangular window method) the infinite
duration impulse response is truncated to finite duration impulse response at n= (N-1/2).
The abrupt truncation of impulse response introduces oscillations in the pass band and stop band.
This effect is known as Gibb’s phenomenon or Gibb’s oscillation.
Table 4.2 Comparison of Rectangular and Hamming Window
Rectangular window Hamming window
1. The width of main lobe in window 1. The width of main lobe in window
spectrum is 4π/N. spectrum is 8π/N.
2.The maximum side lobe magnitude in 2.The maximum side lobe magnitude in
window spectrum is -13db window spectrum is -41db
3. In window spectrum the side lobe 3. In window spectrum the side lobe
magnitude slightly decreases with magnitude remains constant.
increasing 𝜔.
PROBLEMS:
1. Design a digital high pass filter to meet the following specification cut-off
frequency=250 Hz, Sampling rate=1000 samples/sec, Filter length=7.Use Hamming
window.
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2. Design a lowpass filter for the following specification, Cut-off frequency=500 Hz,
Sampling Frequency=2000 Hz Order of the filter N=10.Use Hamming window to get
the impulse response.
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3. A band reject filter of length 7 is required. It is to have lower and upper cut off
frequencies of 3 kHz and 5 kHz respectively. The sampling frequency is 20 kHz.
Determine the filter coefficients using Hanning window. Assume filter to be causal.
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4. The desired frequency response of a low pass filter is given by,
Determine the filter coefficients h(n),if h(n)=hd(n).w(n) using hamming window. Determine
the response H(ω).
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5. Design a filter with
Using a hamming window with N=7.
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6. Design an FIR digital filter to approximate an ideal lowpass filter with passband
gain of unity, cut-off frequency of 850Hz and working at a sampling frequency of
fs=5 kHz. The length of the impulse response should be 5.Use a rectangular window.
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7. The desired response of a low pass filter is,
Determine the frequency response of the filter
for M=7 using a Hamming window.
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8. Design a high pass filter using hamming window with cut-off frequency of 1.2
radians/sec and N=9.
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9. Design an ideal bandpass digital FIR filter with desired frequency response.
By using Hamming window function
of length N=11.
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10. A band pass FIR filter of length 7 is required. It is to have lower and upper cut-off
frequencies of 3 kHz and 6 kHz respectively and is intended to be used with a sampling
frequency of 24 kHz. Determine the filter coefficients using Hanning window. Consider
the filter to be causal.
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11. Design a FIR filter approximating the ideal frequency response:
Determine the filter coefficients for M=13.
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12. Design an ideal differentiator with frequency response,
using Hamming window with N=7.
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13. Design an ideal high pass filter using Hanning window with a frequency response,
Solution:
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14. Design a band pass filter which approximates the ideal filter with cutoff frequencies at
0.2 rad/sec and 0.3 rad/sec. the filter order is N =7. Use hamming window
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Therefore the transfer function of the filter is
H(Z) = 0.03183 Z -3 0.02926 [ Z -2 Z -4 ] 0.0086 [ Z -1 Z -5 ] 0.01856 [1 Z -5 ]
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4.5 FREQUENCY SAMPLING METHOD:
The desired frequency response is provided as in the previous method. Now the given
frequency response is sampled at a set of equally spaced frequencies to obtain N samples. Thus ,
sampling the continuous frequency response Hd(w) at N points essentially gives us the N-point
DFT of Hd(2Пnk/N). Thus by using the IDFT formula, the filter co-efficient can be calculated.
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1. Determine the coefficients of a linear phase FIR filter of length M=15,which has a
symmetric unit sample response.The frequency response satisfies the function,
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2. Determine the coefficients h(n) of a linear phase FIR filter of length M=15 which has a
symmetric unit sample response and a frequency response that satisfies the condition.
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3. Determine the impulse response h(n) of a filter having desired response
N=7, use frequency sampling approach.
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4.6 FIR FILTER STRUCTURES:
Fir filter consists of four types of structures:
i. Direct form or Transversal form
ii. Cascade form
iii. Linear phase structure
iv. Poly phase structure
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i. Direct form or Transversal form:
ii. Cascade form:
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iii. Linear Phase:
1. Obtain the linear phase realization of the system function,
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2. Determine the direct form realization of system function,
3. Draw the direct form implementation of the FIR system having difference equation,
y(n)=x(n)-2x(n-1)+3x(n-2)-10x(n-6).
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Question Bank
PART A (2 MARKS)
1. Draw the frequency response of N - point rectangular Window. [A/M 19]
2. Draw the block diagram representation of FIR system. [N/D 17]
or
Draw the direct form realization of FIR system. [A/M 18]
3. What is the necessary and sufficient condition for linear phase characteristic in FIR filter?
[N/D 18]
4. If H(Z) has zeros at z1=0.707+0.707i, z2=2. Determine the lowest degree H(z) that has linear
phase. [A/M 19]
5. Write the steps involved in FIR filter design. [N/D 17]
6. How the zeros in FIR filter is located? [A/M 18]
7. What is Gibbs phenomenon? [A/M 17]
8. Compare hamming window with blackman window [A/M 17]
9. What are the desirable characteristics of the window function? [N/D 10, 15]
10. What are the merits and demerits of FIR filters? [A/M 08] [N/D 10,15] [M/J 16]
11. What do you understand by linear phase response? [N/D 16]
12. Why we use hamming window instead of rectangular window for designing FIR filters? Write
the window function of hamming window. [N/D 13]
13. Mention some realization methods available to realize FIR Filter. [N/D 10]
14. When a FIR filter is said to be a linear phase FIR filter? [N/D 11]
15. What are the properties of FIR filter? [N/D 09]
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PART- B (16 MARKS)
1. Design an FIR low pass filter satisfying following specifications αp≤0.1dB, αs≥44B, ωp =20
rad/sec and ωs= 30 rad/sec ωsf= 100 rad/sec [N/D 18]
2. Using rectangular window technique, design a LPF with pass band gain of unity, cutoff
frequency of 1000Hz and working at a sampling frequency of 5KHz. The length of the impulse
response should be 7. [N/D 18]
3. Determine filter coefficients h(n) obtained by sampling
j ( N 1) / 2
0 w
e ,
Hd e jw
2 for N=7 [A/M 18]
0 , w
2
4. Design a FIR filter with the following desired specifications using hanning window with N=5
w
0,
H d e jw j 2 w
4 4 [N/D 17]
e , w
4
5. Design an ideal BPF with a frequency response
H a (ejω) = e-j5ω, for π /4 ≤ IωI ≤ 3π/4
= 0, otherwise
Find the value of h(n) for N =11 and plot the frequency response. [N/D 16]
6. Design a linear phase FIR filter with a cut off frequency of π/2 rad/sec. Take N=17 using
frequency sampling techniques. [N/D 16, 17]
OR
Determine the coefficients of the h(n) obtained by frequency sampling
j ( N 1) / 2
0 w
e ,
Hd e jw
2 for N=7. [N/D 12, 18][A/M 17, 19]
0 , w
2
7. Design a HPF with the following frequency response.
H d (ejω) = 1, for π /4 ≤ IωI ≤ π
= 0 for IωI ≤ π/4
of length N=11 using Hanning window. [M/J 17, 19]
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8. Design a band pass filter which approximates the ideal filter with cutoff frequencies at 0.2
rad/sec and 0.3 rad/sec. the filter order is N =7. Use hamming window.
9. The desired response of a low pass filtering
H d e jw e j 3w 3
4
w 3
4
0 3 w
4
Design the filter for M = 7 using hamming window. [N/D 09, 11]
10. Design an ideal LPF with a frequency response
H d e jw 1
2
w
2
.
0 w
2
Find the values of h (n) for N = 11. [M/J 12]
11. Using Hanning window, Design an ideal HPF with a frequency response
H d e jw 1
4
w
. [M/J 13]
0 w
4
12. Determine the coefficients of the linear phase FIR filter of length N = 15 has a symmetric unit
sample response and a frequency response that satisfies the condition
2k
H = 1 for k = 0, 1, 2, 3
15 [N/D 12, 18][A/M 17]
= 0 for k = 4, 5, 6, 7
13. Using frequency sampling method, design a bandpass filter with the following specifications.
Sampling Frequency F= 8000Hz Cut off frequency fc1 = 1000Hz
fc2 = 3000Hz.
Determine the filter co efficient for N = 7. [M/J 12,13]
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PART-A Questions and Answers
1. Draw the frequency response of N - point rectangular Window. [A/M 19]
Frequency response of N - point rectangular window function is
sin( N / 2)
w( ) for
sin( / 2)
2. Draw the block diagram representation of FIR system. [N/D 17]
or
Draw the direct form realization of FIR system. [A/M 18]
3. What is the necessary and sufficient condition for linear phase characteristic in FIR filter?
[N/D 18]
Necessary and sufficient condition for linear phase characteristic in FIR satisfying the condition
h(n) = ±h(N-1-n)
i.e. the impulse response is symmetric / anti-symmetric
4. If H(Z) has zeros at z1=0.707+0.707i, z2=2. Determine the lowest degree H(z) that has linear
phase. [A/M 19]
Zeros are, z1=0.707+0.707i, z2=2
FIR has pair of zeros on both sides of z plane
z1=0.707+0.707i, z2=2, z1=0.707-0.707i, z2=2
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H(z)=(z-z1) (z-z2) (z-z3) (z-4)
H(z)=z4-3z3+4z2-3z+1
5. Write the steps involved in FIR filter design. [N/D 17]
Steps involved in designing FIR filter
Step 1: From the given frequency response calculate required order of the filter
Step 2: From the order and desired frequency response calculate desired unit sample response
hd(n)
Step 3: From the attenuation characteristics select suitable window function w(n)
Step 4: Calculate h(n)=hd(n) * w(n)
Step 5: find H(z) for h(n).
6. How the zeros in FIR filter is located? [A/M 18]
FIR filters can be assigned to four different types regarding symmetry and length of the impulse
response:
Type 1: symmetric, odd Type 2: symmetric, even
Type 3: antisymmetric, odd Type 4: antisymmetric, even
The positions of zeros in the complex plane are as follows:
Type 1: Either an even number or no zeros at z = 1 and z=-1
Type 2: Either an even number or no zeros at z = 1, and an odd number of zeros at z=-1
Type 3: An odd number of zeros at z = 1 and z=-1
Type 4: An odd number of zeros at z = 1, and either an even number or no zeros at z=-1
7. What is Gibbs phenomenon? [A/M 17]
A function, v(t), has a discontinuity of amplitude b at t = a if
Lim e→0 (v(a + e) − v(a − e)) = b 6= 0
Conversely, v(t), is continuous at t = a if the limit, b, equals zero.
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8. Compare hamming window with blackmann window [A/M 17]
S. No Hamming window Blackmann Window
The main lobe width, the peak side
1. The main lobe width is equal to 8π / N and
lobe level can be varied by varying
the peak side lobe level is - 41 dB.
the parameters α and N.
2. The low pass FIR filter designed will have The side lobe peak can be varied by
first side lobe peak if - 53dB. varying the parameter α.
9. What are the desirable characteristics of the window function? [N/D 10, 15]
The central lobe of the frequency response of the window should contain most of the energy
and should be narrow.
The highest side lobe level of the frequency response should be small.
The side lobes of the frequency response should decrease in energy rapidly
as ω tends to π.
10. What are the merits and demerits of FIR filters? [A/M 08] [N/D 10,15] [M/J 16]
Advantages:
FIR filter have exact linear phase
FIR filter are always stable
FIR filter can be realized in both recursive and non-recursive structure.
Filters with any arbitrary magnitude response can be tackled using FIR sequence.
Disadvantages:
For the same filter specifications the order of FIR filter design can be as high as 5 to 10
times that in a IIR design
Large storage requirements needed.
Powerful computational facilities required for the implementation.
11. What do you understand by linear phase response? [N/D 16]
Linear phase refers to the condition where the phase response of the filter is a linear
function of the frequency.
This results in the delay through the filter being the same at all frequencies.
Therefore the filter does not cause phase distortion or delay distortion.
12. Why we use hamming window instead of rectangular window for designing FIR filters? Write
the window function of hamming window. [N/D 13]
Because the hamming window generates lesser oscillation in the side lobes than the
rectangular window for the same main lope width, the hamming window is generally preferred.
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The expression for Hamming window is given by
2n
wHm (n) 0.54 0.46 cos for ( N 1) / 2 n ( N 1) / 2
N 1
0 otherwise
13. Mention some realization methods available to realize FIR Filter. [N/D 10]
i. Transversal structure
ii. Linear phase structure
iii. Lattice structure
iv. Poly phase structure
14. When a FIR filter is said to be a linear phase FIR filter? [N/D 11]
If the impulse response of the FIR filter is satisfying the following conditions the
filter is said to be a linear phase FIR filter. The conditions are
i. Symmetric condition h (n) = h (N-1-n)
ii. Anti symmetric condition h (n) = - h (N-1-n).
15. What are the properties of FIR filter? [N/D 09]
The FIR filters have following important properties, which make them different from IIR filters.
i. FIR filters are inherently stable.
ii. FIR filters have linear phase.
iii. FIR filters need higher orders for similar magnitude response compared to IIR
filters.
iv. A realizable filter can always be obtained
16. Bring out the difference between IIR filter and FIR filter. List out the different realization
methods used for recursive and non-recursive filters. [N/D 10]
S. No FIR filter IIR filter
These filters can be easily designed to
1. These filters do not have linear phase
have perfectly linear phase
FIR filters can be realized recursively IIR filters are easily realized
2.
and non-recursively. recursively.
Greater flexibility to control the shape Less flexibility, usually limited to
3.
of their magnitude response. specific kind of filters.
Errors due to round off noise are less
The round off noise in IIR filters is
4. severe in Fir filters, mainly because
more.
feedback is not used.
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17. Write the expression for Hanning window. [A/M 08]
The expression for Hanning window is given by
2n
wHn (n) 0.5 0.5 cos for ( N 1) / 2 n ( N 1) / 2
N 1
0 otherwise
18. What are the different types of filter based on impulse response?
Based on impulse response the filters are of two types
1. IIR filter
2. FIR filter
The IIR filters are of recursive type, whereby present the output sample depends on the present
input, past input samples and output samples.
The FIR filters are of non recursive type whereby the present output sample is depend on the
present input sample and previous input samples.
19. Under what conditions a finite duration sequence h(n) will yield constant group delay in its
frequency response characteristics
If the impulse response is anti-symmetrical, satisfying the condition
h(n) = -h(N-1-n)
the frequency response of FIR filter will have constant group delay and not the phase delay.
20. What are the properties of FIR filter?
i. FIR filter always stable.
ii. A realizable filter can always be obtained.
iii. FIR filter has a linear phase response.
21. What are the disadvantages of Fourier series method?
In designing FIR filter using Fourier series method the infinite duration impulse response is
N 1
truncated at n . Direct truncation of the series will lead to fixed percentage
2
overshoots and undershoots before and after an approximated discontinuity in the frequency
response.
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22. Write the expression for Hamming window.
The expression for Hamming window is given by
2n
wHm (n) 0.54 0.46 cos for ( N 1) / 2 n ( N 1) / 2
N 1
0 otherwise
23. Compare Hamming and Kaiser Window.
S. No Hamming window Kaiser window
The main lobe width is equal to 8π / The main lobe width, the peak side
1. N and the peak side lobe level is lobe level can be varied by varying
- 41 dB. the parameters α and N.
The low pass FIR filter designed will
2. The side lobe peak can be varied by
have first side lobe peak if -
varying the parameter α.
53dB.
Part B
1. Design an FIR low pass filter satisfying following specifications α p≤0.1dB, αs≥44B, ωp
=20 rad/sec and ωs= 30 rad/sec, ωsF= 100 rad/sec [N/D 18]
αp=0.1dB, αs=44B, ωp =20 rad/sec, ωs= 30 rad/sec and ωsF= 100 rad/sec
Cutoff frequency of the desired filter can be obtained by,
ωC= (ωp + ωs)/2
= (20 + 30)/2
= 25 Rad/Sec
ωC (in Radians)= ωC TS
TS =2π/ FS =2π/100
ωC in Radians= 25*2π /100 =π /2
1,
H d e jw
2 2
0,
2
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/2 /2
1
2
j n j n j n
hd (n) 0*e d 1*e d 0*e d
/2 /2
/2
1
e
jn jn
e d d
2 /2
sin ( n)
2 n0
( n)
and hd (3) 1 (C / ) 1 ( / 4) / 1 0.25 0.75
this gives the desired filter coefficients
δ1=(100.05αp-1)/(100.05αp+1) = (100.005-1)/(100.005+1) =5.756x10-3
δ2=100.05αs=100.05*44 = 0.0063
∆f=(ωs-ωp)/2π =(30-20)/2π = 1.592
Order of the filter can be obtained by,
N=(-10log(δ1 δ2)-15)/(14∆f)
N=(-10log(5.756x10-3 * 0.0063)-15)/(14*1.592)
= 1.319
Let N=3 next odd number. For 44dB attenuation in stop band, Hanning window can be used
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2 n
wHm (n) 0.5 0.5 cos
N 1
sin ( n)
hd (n) 2
( n)
h(n) hd (n) wHm (n)
( n)
hd (0) lim 2 0.5
n 0 ( n)
(1)sin
hd (1) hd (1) 2 0.318
(1)
2 0
wHm (0) 0.5 0.5 cos 1
3 1
2
wHm (1) wHm (1) 0.5 0.5 cos 0
3 1
h(0) hd (0) wHm (0) 0.5
h(1) hd (1) wHm (1) 0
0.5 n 0
h( n)
0 n0
2. Using rectangular window technique, design a LPF with pass band gain of unity, cutoff
frequency of 1000Hz and working at a sampling frequency of 5 KHz. The length of the
impulse response should be 7. [N/D 18]
Solution:
Fc=500Hz Fs=1000Hz N=7
ωc=2πfc/Fs=0.5π = π/2
e j 3 w ,
Hd e 2 2
jw
0,
2
Draw the graph
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/2 /2
1
e *e d 0*e d e j 3 *e j n d
j 3 j n j n
hd (n)
2 /2 /2
/2
1
e
j 3
hd (n) *e j n d
2 /2
/2
1
2
/2
e j ( n 3) d
sin (n 3)
hd (n) 4 n3
(n 3)
and hd (3) 1 (C / ) ( / 4) / 1/ 4 0.25
this gives the desired filter coefficients
sin (0 3)
hd (0) hd (6) 4 0.235
(0 3)
sin (1 3)
hd (1) hd (5) 4 0.5
(1 3)
sin (2 3)
hd (2) hd (4) 4 0.707
(2 3)
The Hanning window function are given by
wHn (n) 1 for 0 n N 1
0 otherwise
Here N = 7, Therefore the window sequences are
wHn (0) 1 wHn (1) 1
wHn (2) 1 wHn (3) 1
wHn (4) 1 wHn (5) 1
wHn (6) 1
The casual filter coefficients are calculated by
h(n)=hd(n) wR(n) where n = 0,1,2,3,4,5,6
h(0) = h (6) = hd(0) wR(0) = 0.235
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h(1) = h (5) = hd(5) wR(5) = 0.5
h(2) = hd(4) wR(4) = 0.707
h(3) = hd(3) wR(3) =0.75
6
H Z h(n).Z n
n 0
=h(0)+ h(1) Z-1 +h(2) Z-2 +(h(3) Z-3 +h(4) Z-4 + h(5) Z-5 + h(6) Z-6
= 0.235+ 0.5Z-1 +0.707Z-2+0.5Z-3+0.707Z-4+ 0.75Z-5+ 0.235Z-6
H(Z)= 0.235(1+Z-6)+0.5(Z-1 + Z-5)+0.707(Z-2+ Z-4)+0.5Z-3
3. Determine filter coefficients h(n) obtained by sampling
j ( N 1) / 2
0 w
e ,
Hd e jw
2 for N=7 [A/M 18]
0 , w
2
Step 1: Draw the graph
Form a unit circle, mark points from k=0 to N-1
k= 0 to 6
360 360k
k *k
N 7
360 360 * 2 360 * 3
1 51.42 2 102.8 3 154.26
7 7 7
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360 * 4 360 * 5 360
4 205.68 5 257.1 6 * 6 308.52
7 7 7
Cutoff frequency 0 to π/2 (90)
Pass band values
K=0, 1, 6
Stop band values
K=2, 3, 4, 5
e j ( N 1) k / N , k 0,1,6
H k
0 , k 2,3,4,5
e j 6 k / 7 , k 0,1,6
H k
0 , k 2,3,4,5
1 ( N 1) / 2
h(n) H (0) 2 Re( H (k ) e j 2kn / N
N k 1
1 ( 71) / 2
h(n) 1 2 Re(e j 6k / 7 e j 2kn / 7
7 k 1
1 3
h(n) 1 2 Re(e j 2 ( n3) k / 7
7 k 1
K –> 1 and 2 only in pass band 3 in stop band
1 2
h(n) 1 2 cos(2 (n 3)k / 7)
7 k 1
h( n)
1
1 2(cos(2 (n 3).1/ 7) cos(2 (n 3).2 / 7))
7
h(0)
1
1 2(cos(2 (0 3).1/ 7) cos(2 (0 3).2 / 7)) 0.11456 h(6)
7
h(1)
1
1 2(cos(2 (1 3).1/ 7) cos(2 (1 3).2 / 7)) 0.07928 h(5)
7
h(2)
1
1 2(cos(2 (2 3).1/ 7) cos(2 (2 3).2 / 7)) 0.321 h(4)
7
h(3)
1
1 2(cos(2 (3 3).1/ 7) cos(2 (3 3).2 / 7)) 0.42857
7
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4. Design a FIR filter with the following desired specifications using hanning window with
N=5
w
0,
H d e jw j 2 w
4
4 [N/D 17]
e ,
4
w
The frequency response is having a term e –j2ω which gives h(n) symmetrical about n = 2 i.e
we get a causal sequence.
/ 4 /4
1
2
j 2 jn jn j 2 jn
hd (n) e *e d 0 *e d e *e d
/ 4 /4
/ 4
1
e
j ( n 2 ) j ( n 2 )
d e d
2 /4
sin((n 2) ) sin (n 2)
4 n2
( n 2)
and hd (2) 1 (C / ) 1 ( / 4) / 1 0.25 0.75
this gives the desired filter coefficients
2
0 sin
hd (0) hd (4) 4 1 0.159
(2 ) 2
0 sin
hd (1) hd (3) 4 1 / 2 0.225
( )
The Hanning window function are given by
2n
wHn (n) 0.5 0.5 cos for ( M 1) / 2 n ( M 1) / 2
M 1
0 otherwise
Here M = 5, Therefore the window sequences are
2n
wHn (n) 0.5 0.5 cos for 2 n 2
M 1
0 otherwise
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2 (n 2)
wHn (n) 0.5 0.5 cos for 0 n 4
4
0 otherwise
2
whn(0) = whn(4) = 0.5 0.5 cos = 0.5 0.5 cos ( ) = 0.5 - 0.5 = 0
2
whn(1)= whn(3) = 0.5 0.5 cos = 0.5 + 0.5*(0) = 0.5 – 0= 0.5
2
whn(2)=1
The casual filter coefficients are calculated by
h(n)=hd(n) whn(n) where n = 0,1,2,3,4,5,6
h(0) = h (4) = hd(0) whm(0) = -0.159 *0 = 0
h(1) = h (3) = hd(1) whm(1) = -0.225 *0.5 =- 0.1125
h(2) = hd(2) whm(2) =0.75*1 = 0.75
5. Design an ideal BPF with a frequency response
H a (ejω) = e j 5 , for π /4 ≤ IωI ≤ 3π/4
= 0, otherwise
Find the value of h(n) for N =11 and plot the frequency response. [N/D 16]
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6. Design a linear phase FIR filter with a cut off frequency of π/2 rad/sec. Take N=17 using
frequency sampling techniques. [N/D 16, 17]
OR
Determine the coefficients of the h(n) obtained by frequency sampling
j ( N 1) / 2
0 w
e ,
Hd e jw
2 for N=17. [N/D 12, 18][A/M 17, 19]
0 , w
2
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7. Design a HPF with the following frequency response.
H d (ejω) = 1, for π /4 ≤ IωI ≤ π
= 0 for IωI ≤ π/4
of length N=11 using Hanning window. [M/J 17]
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8. Design a bandpass filter which approximates the ideal filter with cutoff frequencies at 0.2
rad/sec and 0.3 rad/sec. the filter order is N =7. Use hamming window.
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Therefore the transfer function of the filter is
H(Z) = 0.03183 Z -3 0.02926 [ Z -2 Z -4 ] 0.0086 [ Z -1 Z -5 ] 0.01856 [1 Z -5 ]
9. The desired response of a low pass filtering
H d e jw e j 3w 3
4
w 3
4
.
0 3 w
4
Design the filter for M = 7 using hamming window. [N/D 09, 11]
Solution:
The frequency response is having a term e –jω (M-1)/2 which gives h(n) symmetrical about n =
M-1/2 = 3 i.e we get a causal sequence.
3 / 4
1
e
j 3
hd (n) e j n d
2
3 / 4
3
sin (n 3)
4 n 3 and hd (3) 0.75
(n 3)
this gives the desired filter coefficients
9
sin
hd (0) hd (6) 4 0.707 0.075
(3 ) 3
6
sin
hd (1) hd (5) 4 1 0.1592
(2 ) 2
3
sin
0.707
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The Hamming window function are given by
2n
wHm (n) 0.54 0.46 cos for ( M 1) / 2 n ( M 1) / 2
M 1
0 otherwise
Here M = 7, Therefore the window sequences are
n
wHm (n) 0.54 0.46 cos for 3 n 3
3
0 otherwise
(n 3)
wHm (n) 0.54 0.46 cos for 0 n 6
3
0 otherwise
3
whm(0) = whm(6) = 0.54 0.46 cos = 0.54 0.46 cos ( ) = 0.54 - 0.46 = 0.08
3
2
whm(1)= whm(5) = 0.54 0.46 cos = 0.54 + 0.46*(-0.5) = 0.54 – 0.23= 0.31
3
whm(2)= whm(4) = 0.54 0.46 cos = 0.54 + 0.46*(0.5) = 0.54 + 0.23= 0.77
3
whm(3)=1
The casual filter coefficients are calculated by
h(n)=hd(n) whm(n) where n = 0,1,2,3,4,5,6
h(0) = h (6) = hd(0) whm(0) = 0.075*0.08 = 0.006
h(1) = h (5) = hd(1) whm(1) = -0.1592*0.31 =- 0.0494
h(2) = h (4) = hd(2) whm(2) = 0.2251*0.77 = 0.1733
h(3)= hd(3) whm(3) = 0.75*1 = 0.75
The casual filter coefficients are
h(n)=[0.006 0.0494 0.1733 0.75 0.1733 0.1494 0.006]
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The frequency response is given by
6
H e jw h(n).e jwn
n 0
h(0) h(1)e jw h(2)e j 2 w h(3)e j 3w h(4)e j 4 w h(5)e j 5 w h(6)e j 6 w
h(0)(1 e j 6 w ) h(1)( e jw e j 5 w ) h(2)( e j 2 w e j 4 w ) h(3)e j 3w
e j 3w [h(3) 2h(0) cos 3w 2h(1) cos 2w 2h(3) cos w]
H e jw e j 3w [0.75 0.3466 cos 3w 0.0988 cos 2w 0.012 cos w]
10. Design an ideal LPF with a frequency response
H d e jw 1
2
w
2
.
0 w
2
Find the values of h (n) for N = 11. [M/J 12]
Solution:
The frequency response of low pass filter with wc=π/2 is shown below.
Fig.1 Frequency response of low pass filter with wc=π/2
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Similarly
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Then
11. Using Hanning window, Design an ideal HPF with a frequency response
H d e jw 1
4
w
. [M/J 13]
0 w
4
Solution
The desired frequency response is given by
Digital Signal Processing 325
Fig. 2 Frequency response of high pass filter with wc=π/4
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12. Determine the coefficients of the linear phase FIR filter of length N = 15 has a symmetric unit
sample response and a frequency response that satisfies the condition
2k
H = 1 for k = 0, 1, 2, 3
15 [N/D 12, 18][A/M 17]
= 0 for k = 4, 5, 6, 7
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Fig.3 Ideal magnitude response with samples
13. (i) Using frequency sampling method , design a bandpass filter with the following
specifications.
Sampling Frequency F = 8000 Hz
Cut off frequency fc1 = 1000Hz
fc2 = 3000Hz .
Determine the filter co efficient for N = 7. [M/J 12,13]
Solution
ωc1= 2πfc1T = 2πfc1/F = 2π * 1000/8000 = π/4
ωc2= 2πfc2T = 2πfc2/F = 2π * 3000/8000 = 3π/4
Digital Signal Processing 329
Fig.4 Ideal magnitude response with samples
Digital Signal Processing 330
13. (ii) Design an ideal high-pass filter with a frequency response using a Hanning window with M
= 11 and plot the frequency response. [M/J 12,13]
H d (e j ) 1 for
4
0 | |
4
Solution:
Fig. 5 frequency response of low pass filter with wc=π/4
/ 4
1
e d
jn jn
hd (n) [ e d ]
2 /4
1 n
hd (n) [sin n sin ] for n and n0
n 4
/ 4
1 3
hd (0) [ d d ] 0.75
2 /4 4
hd(1) = hd(-1)=-0.225
hd(2) = hd(-2)= -0.159
hd(3) = hd(-3)= -0.075
hd(4) = hd(-4)= 0
hd(5) = hd(-5) = 0.045
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The hanning window function is given by
2n M 1 M 1
whn (n) 0.5 0.5 cos ( )n( )
M 1 2 2
0 otherwise
for N 11
n
whn (n) 0.5 0.5 cos 5 n 5
5
whn(0) = 1
whn(1) = whn(-1)=0.9045
whn(2)= whn(-2)=0.655
whn(3)= whn(-3)= 0.345
whn(4)= whn(-4)=0.0945
whn(5)= whn(-5)=0
h(n)= whn(n)hd(n)
h(n)=[0 0 -0.026 -0.104 -0.204 0.75 -0.204 -0.104 -0.026 0 0]
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13. (iii) Realize the following system function using minimum number of multiplication
1 1 1 1
H(Z) 1 Z 1 Z 2 Z 3 Z 4 Z 5
3 4 4 3
Solution:
1 1 1 1
We recognize h(n) 1, , , , , 1
3 4 4 3
M is even = 6, and we observe h (n) = h (M-1-n) h (n) = h (5-n)
i.e h (0) = h (5) h (1) = h (4) h (2) = h (3)
Fig. 6 Direct form structure for linear phase FIR
14. Design a filter with H d (e j ) e j 3 / 4 / 4
=0 /4
Using a hamming window with N=7. [M/J 16]
Given
H d (e j ) e j 3
The frequency response is having a term e j ( N 1) / 2 which gives h(n) symmetrical
about n=(N-1)/2=3, i.e., we get a casual sequence.
/4
1
e
j 3
hd (n) e jn d
2
/4
/4
1
e
j ( n 3)
d
2
/4
Digital Signal Processing 333
sin (n 3)
4 n 3 and hd (3) C / ( / 4) / 0.25
(n 3)
this gives the desired filter coefficien ts
3
sin
hd (0) hd (6) 4 0.707 0.075
(3 ) 3
2
sin
hd (1) hd (5) 4 1 0.1592
(2 ) 2
sin
hd (2) hd (4) 4 0.707 0.2251
( )
The Hamming window function are given by
2n
wHm (n) 0.54 0.46 cos for ( N 1) / 2 n ( N 1) / 2
N 1
0 otherwise
Here N = 7, Therefore the window sequences are
n
wHm (n) 0.54 0.46 cos for 3 n 3
3
0 otherwise
(n 3)
wHm (n) 0.54 0.46 cos for 0 n 6
3
0 otherwise
3
whm(0) = whm(6) = 0.54 0.46 cos = 0.54 0.46 cos ( ) = 0.54 - 0.46 = 0.08
3
Digital Signal Processing 334
2
whm(1)= whm(5) = 0.54 0.46 cos = 0.54 + 0.46*(-0.5) = 0.54 – 0.23= 0.31
3
whm(2)= whm(4) = 0.54 0.46 cos = 0.54 + 0.46*(0.5) = 0.54 + 0.23= 0.77
3
whm(3)=1
The casual filter coefficients are calculated by
h(n)=hd(n) whn(n) where n = 0,1,2,3,4,5,6
h(0) = h (6) = hd(0) whn(0) = 0.075*0.08 = 0.006
h(1) = h (5) = hd(1) whn(1) = 0.1592*0.31 = 0.0494
h(2) = h (4) = hd(2) whn(2) = 0.2251*0.77 = 0.1733
h(3)= hd(3) whn(3) = 0.75*1 = 0.75
The casual filter coefficients are
h(n)=[0.006, 0.0494, 0.1733, 0.75, 0.1733, 0.1494, 0.006]
The frequency response is given by
h(n).e
6
jwn
H e jw
n 0
=h(0)+ h(1) e-jw +h(2) e-j2w +(h(3) e-j3w +h(4) e-j4w + h(5) e-j5w + h(6) e-j6w
= e-j3w( h(0) ej3w + h(1) ej2w +h(2) ejw +(h(3)+h(4) e-jw + h(5) e-j2w + h(6) e-j3w)
= e-j3w( h(0) ej3w + h(1) ej2w +h(2) ejw +(h(3)+h(2) e-jw + h(1) e-j2w + h(0) e-j3w)
= e-j3w( h(0) (ej3w + e-j3w ) + h(1) ( ej2w + e-j2w )+ h(2) (ejw + e-jw )+h(3))
e j 3w [h(3) 2h(0) cos3w 2h(1) cos 2w 2h(2) cos w]
e j 3w [0.75 0.3466 cos3w 0.0988 cos 2w 0.012 cos w]
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M 1
15. [I] The transfer function H Z h ( n) . z n
characterizes a FIR filter (M =11). Find
n0
the magnitude response. [N/D 15]
Solution:
Digital Signal Processing 336
15 [ii]List the advantages of FIR filters. [N/D 15]
Advantages:
FIR filter have exact linear phase
FIR filter are always stable
FIR filter can be realized in both recursive and non-recursive structure.
FIR filter are free of limit cycle oscillations, when implemented on a finite word
length digital system.
Filters with any arbitrary magnitude response can be tackled using FIR sequence.
16. Compare the characteristics of different types of windows used in the design of FIR
filter. [N/D 10]
The different windows parameters are compared looking at the parameters for
rectangular and triangular window, it can be noted that the triangular window has a
transition width twice that of rectangular window.
However, the attenuation in stop band for triangular window is less. Therefore, it is
not so popular for FIR filter design. The Hanning and Hamming windows have same
transition width. But the Hamming window is most widely used, because, it generates less
ringing in the side lobes.
The Blackman window reduces the side lobe level at the cost of increase in transition
width. The Kaiser window is superior to other windows, because, for given specifications
its transition width is always small.
By varying the parameter a the desired side lobe level and main lobe peak can be
achieved. Further, the main lobe width can be varied by varying the length N. That is why
Kaiser window is the favorite window for many digital filter designers.
Table 1. Comparison of window function in frequency domain characteristics
Approximate Width Peak Side lobe
Type of Window
of Main lobe Magnitude (dB)
rectangular 4π/N -13
hanning 8π/N -31
hamming 8π/N -41
blackman 12π/N -58
Digital Signal Processing 337
The window design for FIR filter has certain advantages and disadvantages.
Advantages
i. The filter coefficients can be obtained with minimum computation effort.
ii. The window functions are readily available in closed-form expression.
iii. The ripples in both passband and in stopband are almost completely
removed.
Disadvantages:
i. It is always not possible to obtain a closed form expression for the Fourier
series coefficients h(n).
ii. Windows provides limited flexibility in the design.
iii. It is somewhat difficult to determine, in advance, the type of window and the
duration N required to meet a given prescribed frequency specification.
Digital Signal Processing 338
17. Discuss the window method of designing FIR filters in detail.
[A/M 10] [M/J 12] [N/D
12]
The desired frequency response of any digital filter is periodic in Frequency
and can be expanded in a Fourier series, i.e.
where
The Fourier coefficients of the series h (n) are identical to the impulse response of a
digital filter. There are two difficulties with the implementation of Eq. 7.35 for designing a
digital filter. First, the impulse response is of infinite duration and second, the filter is non-
causal and unrealizable. No finite amount of delay can make the impulse response realizable.
Hence the filter resulting from a Fourier series representation of H(ejw) is an unrealizable IIR
filter.
The infinite duration impulse response can be converted to a finite duration impulse
response by truncating the infinite series at n = ±N. But, this results in undesirable
oscillations in the pass band and stop band of the digital filter. This is due to the slow
convergence of the Fourier series near the points of discontinuity. These undesirable
oscillations can be reduced by using a set of time-limited weighting functions, w (n), referred
to as window functions, to modify the Fourier coefficients. The windowing technique is
illustrated
The desired frequency response H(ejw) and its Fourier coefficients {h(n)} are shown at
the top of this figure. The finite duration weighting function w (n) and its Fourier transform
W (ejw) are shown in the second row. The Fourier transform of the weighting function
consists of a main lobe, which contains most of the energy of the window function and side
lobes which decay rapidly. The sequence h (n) = h(n). w(n) is obtained to get an FIR
approximation of H(ejw). The sequence h (n) is exactly zero outside the interval —N ≤ n ≤ N.
The sequence h (n) and its Fourier transform H(ejw) are shown in the third row. H(ejw) is
Digital Signal Processing 339
nothing but the circular convolution of H(ejw) and W (ejw). The realizable causal sequence
g(n), which is obtained by shifting h(n), is shown in the last row and this can be used as the
desired filter impulse response.
A major effect of windowing is that the discontinuities in H(ejw) are converted into
transition bands between values on either side of the discontinuity. The width of these
transition bands depends on the width of the main lobe of W(ejw). A secondary effect of
windowing is that the ripples from the side lobes of W(ejw) produces approximation errors for
all w. Based on the above discussion, the desirable characteristics can be listed as follows
1. The Fourier transform of the window function W(ejw) should have a small width of
main lobe containing as much of the total energy as possible.
2. The Fourier transform of the window function W(ejw) should have side lobes that
decrease in energy rapidly as w tends to π. Some of the most frequently used window
functions are described in the following sections.
The spectrum of wR(n) can be obtained by taking Fourier transform then
Digital Signal Processing 340
Fig. 8 Illustration of the window technique
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Fig.9 Frequency response of a rectangular window
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18. List the steps involved by the general process of designing a digital filter.[N/D 15]
Steps involved in FIR Design:
Decide the required response in frequency domain with zero phase.
Find hd(n) for the frequency response using the formula
Digital Signal Processing 344
/4
1
hd (n)
2 H
/4
d (e j )e jn d
Select method to design of filter (choose Fourier series / Windowing technique /
frequency sampling technique)
find h(n) values.
h(n) =hd(n)
For windowing technique.
h(n) =hd(n) * w(n)
To make it causal delay the time response by ‘k’ samples. Hence the filters
are linear phase.
Find H(z)
Find realizable FIR filter transfer function. H’(z)
Find magnitude of H’(z) and plot its magnitude response curve.
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Digital Signal Processing 346
CHAPTER 5
FINITE WORD LENGTH EFFECTS
5.1 INTRODUCTION TO FINITE WORD LENGTH EFFECTS:
The fundamental operation in digital filters is addition and multiplication. When these
operations are performed in digital system. The input data as well as product and sum have
to represented in finite word length which depends on the size of register used to store the
data.
In digital computation the input and output datas are quantized by rounding or truncation to
convert them to a finite word size. These create error in the output or create oscillation in
the output. These effects due to finite precision representation in digital systems are called
finite word length effects.
5.2 TYPES OF ERRORS:
i. Input Quantization Error
ii. Product Quantization error
iii. Coefficient Quantization error
i. Input Quantization Error:
In digital signal processing, the continuous time input signals are converted into
digital using a b-bit ACD. The representation of continuous signal amplitude by a
fixed digit produce an error, which is known as input quantization error.
ii. Product Quantization error:
In fixed point arithmetic, the multiplication of two b-bit numbers results in a
product of length 2b-bits if the word length of registries to be stored the result is b
bits then it is necessary to quantize the product to b bits. The error due to quantization
of the output of multiplier is referred to as product quantization error.
iii. Coefficient Quantization error:
Location (or the value) of poles and zeros of digital filter directly depends on the
value of the coefficients. The quantization of the filter coefficients will modify the
Digital Signal Processing 347
value of poles and zeros and so the location of poles and zeros will be shifted from
the direct location.
Sensitivity of the filter frequency response characteristics of the filter Coefficient is
minimized by realizing the filter having a large number of poles and zeros as an
interconnection of second order sections. This leads to parallel form and cascade
realization in which the basic building blocks are first order and second order
sections. Coefficient quantization has less effect in cascade quantization when
compared to parallel realization.
5.3 NUMBER REPRESENTATION:
To represent the number in digital computer or digital hardware. This representation has three
types,
1.Fixed Point
2.Floating Point
3.Block floating point
1. Fixed Point:
In fixed point arithmetic the position of the binary point is fixed. The bits to the right
represent the fractional part of the number & those to the left represent the integer part. For
example, the binary number 01.1100 has the value 1.75 in decimal.
The different types of fixed point arithmetic representation:
Depending on the way negative numbers are represented, they are three different forms of
fixed point arithmetic. They are
1) Sign – magnitude
2) 1’s complement
3) 2’s complement.
2. Floating Point:
Floating point representation consists of mantissa and exponent. Floating point number is
written as,
Digital Signal Processing 348
Binary floating point number: Mx2E
Decimal floating point number: Mx10E
Value of mantissa lies between 0.5 and 1. Exponent can be positive or negative number.
0.4382x10-2, 0.3815x106 are examples of decimal floating numbers. 0.1101x2011, 0.11101x2101
are examples of the binary floating point numbers. The advantage of floating point numbers is
that, they cover wide range.
FIXED POINT ARITHMATIC FLOATING POINT ARITHMATIC
Fast operation Slow operation
Relatively economical More expensive because of costlier hardware
Small dynamic range Increased dynamic range
Roundoff errors occur with both addition and
Roundoff errors occur only for addition
multiplication
Overflow occurs in addition Overflow does not arise
Used in small computers Used in larger, general purpose computers
Table 5.1 Comparision of the trunation and rounding errors using fixed and floating point
number representation
5.4 QUANTIZATION NOISE:
In the engineering applications the input signal is continuous in time or analog waveform.
It will be converted into digital by using ADC.
The signal x(t) is sampled at regular interval=nT, where n=0,1,…. To create a sequence
x(n).this is done by sampler then numeric equivalent of each sample x(n) is represented
by finite number of bit giving the sequence xq(n).The different signal is called
quantization noise.
Digital Signal Processing 349
Types of Quantization Noise:
1. Truncation
2. Rounding
1. Quantize the number (0.675)10 by truncation for 2 bits and calculate the quantization error.
Digital Signal Processing 350
1. Quantize the number (0.675)10 by rounding for 2 bits and calculate the quantization error.
For most of the engineering applications the input signal is continuous in time or analog
wave form. This signal is to be converted into digital by using ADC.
Digital Signal Processing 351
Digital Signal Processing 352
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Steady state input noise power
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Digital Signal Processing 355
Steady state output noise power:
Fig. Representation of A/D conversion noise
Digital Signal Processing 356
Quantization Step Size:
1. Let us assume a sinusoidal signal varying between +1 and -1 having a dynamic range
2. If the ADC used to convert the sinusoidal signal employs b+1 bits including sign bit, the
number of levels available for quantizing x(n) is 2b+1. Thus the interval between successive
levels
2
q= b +1
= 2 -b
2
Where q is known as quantization step size.
1.The output of an ADC is applied to a digital filter with system function
Find the output noise power from digital filter when the input signal is quantized to have 8
bits.
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Digital Signal Processing 358
2.Two first order filters are connected in cascaded whose system functions of the individual
1 1
sections are H 1 ( Z ) and H 2 ( Z ) . Determine the overall output
1 0.5 Z 1
1 0.6 Z 1
noise power.
Given:
1 1
H 1 (Z ) H 2 (Z )
1 0.5 Z 1 1 0.6 Z 1
1
H (Z )
(1 0.5 Z )(1 0.6 Z 1 )
1
1
H 2 (Z )
1 0.6 Z 1
Overall output noise power is given by
02 01 02
22
𝟏
σ01 2 = ∮ 𝑯(𝒁)𝑯(𝒁−𝟏 )𝒁−𝟏 𝒅𝒛
𝟐𝝅𝒋 𝑪
σ01 2 = σe 2 [∑ 𝑶𝑭 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝑯(𝒁)𝑯(𝒁−𝟏 ) 𝒁−𝟏 𝑨𝑻 𝑷𝑶𝑳𝑬𝑺 𝒁 = 𝟎. 𝟓, 𝒁 = 𝟎. 𝟔,
𝟏 𝟏
𝒁= 𝑨𝑵𝑫 𝒁 = ]
𝟎. 𝟓 𝟎. 𝟔
𝟏 𝟏
𝐇𝐄𝐑𝐄 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝒁 = 𝑨𝑵𝑫 𝒁 = 𝑷𝑶𝑳𝑬𝑺 𝑨𝑹𝑬 𝒁𝑬𝑹𝑶 𝐛𝐞𝐜𝐚𝐮𝐬𝐞 𝐭𝐡𝐞 𝐩𝐨𝐥𝐞𝐬
𝟎. 𝟓 𝟎. 𝟔
Digital Signal Processing 359
𝐥𝐢𝐞𝐬 𝐨𝐮𝐭𝐬𝐢𝐝𝐞 𝐮𝐧𝐢𝐭 𝐜𝐢𝐫𝐜𝐥𝐞
σ01 2 = σe 2 0∑ 𝑶𝑭 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝑯(𝒁)𝑯(𝒁−𝟏 ) 𝒁−𝟏 𝑨𝑻 𝑷𝑶𝑳𝑬𝑺 𝒁 = 𝟎. 𝟓, 𝒁 = 𝟎. 𝟔1
𝒁 − 𝟎. 𝟓
= σe 2 86 𝒁−𝟏 7
(𝟏 − 𝟎. 𝟓𝒁−𝟏 )(𝟏 − 𝟎. 𝟔𝒁−𝟏 )(𝟏 − 𝟎. 𝟓𝒁 )(𝟏 − 𝟎. 𝟔𝒁 ) 𝒁=𝟎.𝟓
𝒁 − 𝟎. 𝟔
+6 𝒁−𝟏 7 9
(𝟏 − 𝟎. 𝟓𝒁 )(𝟏 − 𝟎. 𝟔𝒁−𝟏 )(𝟏 − 𝟎. 𝟓𝒁 )(𝟏 − 𝟎. 𝟔𝒁 )
−𝟏
𝒁=𝟎.𝟔
𝟏
= σe 2 {
(𝟏 − 𝟎. 𝟔/𝟎. 𝟓)(𝟏 − 𝟎. 𝟓𝟐 )(𝟏 − 𝟎. 𝟔 ∗ 𝟎. 𝟓)
𝟏
+ }
(𝟏 − 𝟎. 𝟓/𝟎. 𝟔)(𝟏 − 𝟎. 𝟓 ∗ 𝟎. 𝟔)(𝟏 − 𝟎. 𝟔𝟐 )
𝟏 𝟏
= σe 2 8 + 9
(𝟏 − 𝟏. 𝟐)(𝟏 − 𝟎. 𝟐𝟓 )(𝟏 − 𝟎. 𝟑) (𝟏 − 𝟎. 𝟖𝟑𝟑)(𝟏 − 𝟎. 𝟑)(𝟏 − 𝟎. 𝟑𝟔 )
= σe 2 *−𝟗. 𝟓𝟐𝟑 + 𝟏𝟑. 𝟑𝟗𝟑+
2−2b
σ01 2 = *𝟑. 𝟖𝟕+
12
𝟏 𝟏 𝟏
σ02 2 = σe 2 ∮ 𝒁−𝟏 𝒅𝒛
𝟐𝝅𝒋 𝑪 (𝟏 − 𝟎. 𝟔𝒁−𝟏 ) (𝟏 − 𝟎. 𝟔𝒁 )
𝟏
σ01 2 = σe 2 [∑ 𝑶𝑭 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝑯(𝒁)𝑯(𝒁−𝟏 ) 𝒁−𝟏 𝑨𝑻 𝑷𝑶𝑳𝑬𝑺 𝒁 = 𝟎. 𝟔 𝑨𝑵𝑫 𝒁 = ]
𝟎. 𝟔
𝟏
𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝒁 = 𝑷𝑶𝑳𝑬 𝑰𝑺 𝒁𝑬𝑹𝑶
𝟎. 𝟔
σ02 2 = σe 2 0∑ 𝑶𝑭 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝑯𝟏 (𝒁)𝑯𝟏 (𝒁−𝟏 ) 𝒁−𝟏 𝑨𝑻 𝑷𝑶𝑳𝑬 𝒁 = 𝟎. 𝟔1
𝒁 − 𝟎. 𝟔
= σe 2 6 𝒁−𝟏 7
(𝟏 − 𝟎. 𝟔𝒁−𝟏 )(𝟏 − 𝟎. 𝟔𝒁 ) 𝒁=𝟎.𝟔
𝟏
= σe 2 { }
(𝟏 − 𝟎. 𝟔𝟐 )
𝟏
= σe 2 { }
(𝟏 − 𝟎. 𝟑𝟔)
= σe 2 *𝟏. 𝟓𝟔𝟐𝟓+
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2
2−2b
σ02 = *𝟏. 𝟓𝟔𝟐𝟓+
12
2
σ0 2 = σ01 2 + σ02
2
2−2b 2−2b
σ0 = *𝟑. 𝟖𝟕+ + *𝟏. 𝟓𝟔𝟐𝟓+
12 12
2−2b 2−2b
σ0 2 = *𝟑. 𝟖𝟕+ + *𝟏. 𝟓𝟔𝟐𝟓+
12 12
2−2b
σ0 2 = *𝟓. 𝟒𝟑𝟐𝟓+
12
3. The input to the system y(n) = 0.999y(n-1) + x(n) is applied to an ADC. a What is the
power produced by the quantization noise at the output of the filter if the input is
quantized to a 1) 8 bits 2) 16 bits.
y(n) = 0.999y(n-1) + x(n)
Applying Z Transform
Y(Z) = 0.999 Z-1 Y(Z) + X(Z)
H(Z)= Y(Z)/X(Z) = 1/(1-0.999 Z-1) =Z/(Z-0.999)
Output noise power is given by
𝟏
σ0 2 = ∮ 𝑯(𝒁)𝑯(𝒁−𝟏 )𝒁−𝟏 𝒅𝒛
𝟐𝝅𝒋 𝑪
𝟏 𝒁 𝒁−𝟏
σ0 2 = σe 2 ∮ 𝒁−𝟏 𝒅𝒛
𝟐𝝅𝒋 𝑪 (𝒁 − 𝟎. 𝟗𝟗𝟗) (𝒁−𝟏 − 𝟎. 𝟗𝟗𝟗)
𝟏
σ0 2 = σe 2 [∑ 𝑶𝑭 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝑯(𝒁)𝑯(𝒁−𝟏 ) 𝒁−𝟏 𝑨𝑻 𝑷𝑶𝑳𝑬𝑺 𝒁 = 𝟎. 𝟗𝟗𝟗 𝑨𝑵𝑫 𝒁 = ]
𝟎. 𝟗𝟗𝟗
𝟏
𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝒁 = 𝑷𝑶𝑳𝑬 𝑰𝑺 𝒁𝑬𝑹𝑶
𝟎. 𝟗𝟗𝟗
σ0 2 = σe 2 0∑ 𝑶𝑭 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝑯𝟏 (𝒁)𝑯𝟏 (𝒁−𝟏 ) 𝒁−𝟏 𝑨𝑻 𝑷𝑶𝑳𝑬 𝒁 = 𝟎. 𝟗𝟗𝟗1
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2
(𝒁 − 𝟎. 𝟗𝟗𝟗)𝒁 𝒁−𝟏
= σe 6 𝒁−𝟏 7
(𝒁 − 𝟎. 𝟗𝟗𝟗) (𝒁−𝟏 − 𝟎. 𝟗𝟗𝟗) 𝒁=𝟎.𝟗𝟗𝟗
𝟏
= σe 2 { }
(𝟏 − 𝟎. 𝟗𝟗𝟗−𝟐 )
= σe 2 *𝟓𝟎𝟎. 𝟐𝟒𝟗+
FOR 8 BITS
2
2−2∗7
σ0 = *𝟓𝟎𝟎. 𝟐𝟒𝟗+
12
σ0 2 = 2.544 ∗ 10−3
FOR 16 BITS
2−2∗15
σ0 2 = *𝟓𝟎𝟎. 𝟐𝟒𝟗+
12
σ0 2 = 3.882 ∗ 10−8
4. Consider the recursive filter y(n)=0.8y(n-1)+x(n). The input x(n) has a range of values of
100V represented by 8 bits. Compute the variance of output due to A/D conversion process.
y(n) = 0.8y(n-1) + x(n)
Applying Z Transform
Y(Z) = 0.8 Z-1 Y(Z) + X(Z)
H(Z)= Y(Z)/X(Z) = 1/(1-0.8 Z-1) =Z/(Z-0.8)
Output noise power is given by
σ 2
σ0 2 = 2𝜋𝑗
e
∮𝐶 𝐻(𝑍)𝐻(𝑍 −1 )𝑍 −1 𝑑𝑧
R=100V
𝛿2 𝑅 100
σe 2 = 12 AND 𝛿 = 2𝑏 = 28
1002
16 ) (
σe 2 = 2 = 0.2034
12
Digital Signal Processing 362
σe 2 𝑍 𝑍 −1
σ0 2 = ∮ 𝑍 −1 𝑑𝑧
2𝜋𝑗 𝐶 (𝑍 − 0.8 (𝑍 −1 − 0.8)
1
σ0 2 = σe 2 [∑ 𝑂𝐹 𝑅𝐸𝑆𝐼𝐷𝑈𝐸 𝑂𝐹 𝐻(𝑍)𝐻(𝑍 −1 ) 𝑍 −1 𝐴𝑇 𝑃𝑂𝐿𝐸𝑆 𝑍 = 0.8 𝐴𝑁𝐷 𝑍 = ]
0.8
1
𝑅𝐸𝑆𝐼𝐷𝑈𝐸 𝑂𝐹 𝑍 = 𝑃𝑂𝐿𝐸 𝐼𝑆 𝑍𝐸𝑅𝑂
0.8
σ0 2 = σe 2 0∑ 𝑂𝐹 𝑅𝐸𝑆𝐼𝐷𝑈𝐸 𝑂𝐹 𝐻1 (𝑍)𝐻1 (𝑍 −1 ) 𝑍 −1 𝐴𝑇 𝑃𝑂𝐿𝐸 𝑍 = 0.81
(𝑍 − 0.8)𝑍 𝑍 −1
= σe 2 6 𝑍 −1 7
(𝑍 − 0.8) (𝑍 −1 − 0.8) 𝑍=08
1
= σe 2 { }
(1 − 0.8−2 )
= 0.2034*2.778+
σ0 2 = 0.565
1
5. Realize the first order transfer function H ( Z ) and draw its quantization
1 a Z 1
model. Find the steady state noise power due to product round off.
Solution:
Digital Signal Processing 363
Digital Signal Processing 364
0.5
6. The output of an ADC is applied to a digital filter with system function ( ) = . Find
−0.5
the output noise power from digital filter when input signal is quantized to have 8 bits.
Given:
Assume a=0.5
(1 - a)z 0 .5 Z
H1 ( Z )
(z - a ) Z 0.5
Output noise power is given by
𝟏
σ0 2 = 𝟐𝝅𝒋 ∮𝑪 𝑯(𝒁)𝑯(𝒁−𝟏 )𝒁−𝟏 𝒅𝒛
𝟏 𝟎. 𝟓𝒁 𝟎. 𝟓𝒁−𝟏
σ0 2 = σe 2 ∮ 𝒁−𝟏 𝒅𝒛
𝟐𝝅𝒋 𝑪 (𝒁 − 𝟎. 𝟓) (𝒁−𝟏 − 𝟎. 𝟓)
𝟏
σ0 2 = σe 2 [∑ 𝑶𝑭 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝑯(𝒁)𝑯(𝒁−𝟏 ) 𝒁−𝟏 𝑨𝑻 𝑷𝑶𝑳𝑬𝑺 𝒁 = 𝟎. 𝟓 𝑨𝑵𝑫 𝒁 = ]
𝟎. 𝟓
𝟏
𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝒁 = 𝑷𝑶𝑳𝑬 𝑰𝑺 𝒁𝑬𝑹𝑶
𝟎. 𝟓
σ0 2 = σe 2 0∑ 𝑶𝑭 𝑹𝑬𝑺𝑰𝑫𝑼𝑬 𝑶𝑭 𝑯𝟏 (𝒁)𝑯𝟏 (𝒁−𝟏 ) 𝒁−𝟏 𝑨𝑻 𝑷𝑶𝑳𝑬 𝒁 = 𝟎. 𝟓1
(𝒁 − 𝟎. 𝟓)𝟎. 𝟓𝒁 𝟎. 𝟓𝒁−𝟏
= σe 2 6 𝒁−𝟏 7
(𝒁 − 𝟎. 𝟓) (𝒁−𝟏 − 𝟎. 𝟓) 𝒁=𝟎.𝟓
𝟎. 𝟐𝟓
= σe 2 { }
(𝟏 − 𝟎. 𝟓𝟐 )
𝟎. 𝟐𝟓
= σe 2 { }
(𝟏 − 𝟎. 𝟐𝟓)
𝟎.𝟐𝟓
= σe 2 2𝟎.𝟕𝟓3
2−2∗8
σ0 2 = *𝟏/𝟑+
12
Digital Signal Processing 365
σ0 2 = 4.23 ∗ 10−7
1.0
7. Consider a second order IIR filter with H ( Z ) . Find the effect
1 0.5Z 1 0.45Z 1
1
of quantization on pole locations of the given system in direct form and cascade form.
Assume b = 3 bits.
Given:
𝟏
𝑯(𝒛) =
(𝟏 − 𝟎. 𝟓𝒛−𝟏 )(𝟏 − 𝟎. 𝟒𝟓𝒛−𝟏 )
𝟏
𝑯(𝒛) =
(𝟏 − 𝟎. 𝟗𝟓𝒛−𝟏 + 𝟎. 𝟐𝟐𝟓𝒛−𝟐 )
(0.95)10 =(0.1111001…)2
(-0.95)10 =(1.1111001…)2
After truncation
(-0.95)10 =(1.111)2=-0.875
(0.225)10 =(0.001110…)2
After truncation
(0.001)2= (0.125)10
𝟏
𝑯(𝒛) =
(𝟏 − 𝟎. 𝟖𝟕𝟓𝒛−𝟏 + 𝟎. 𝟏𝟐𝟓𝒛−𝟐 )
Cascade form
𝟏
𝑯(𝒛) =
(𝟏 − 𝟎. 𝟓𝒛−𝟏 )(𝟏 − 𝟎. 𝟒𝟓𝒛−𝟏 )
(-0.5)10 =(.100…)2
(-0.45)10 =(1.01110…)2
After truncation
(1.011)2 =(-0.375)10
Digital Signal Processing 366
𝟏
𝑯(𝒛) =
(𝟏 − 𝟎. 𝟓𝒛−𝟏 )(𝟏 − 𝟎. 𝟑𝟕𝟓𝒛−𝟏 )
8. Consider the recursive filter y(n)=0.8y(n-1)+x(n). The input x(n) has a range of values
+or-100V represented by 8 bits. Compute the variance of output due to A/D conversion
process.
Digital Signal Processing 367
5.5 ROUNDING IS PREFERRED OVER TRUNCATION IN REALIZING A DIGITAL
FILTER:
The quantization error due to rounding is independent of type arithmetic
The mean of rounding error is zero
The variance of rounding error is low
(i)Rounding a number to b bits is accomplished by choosing the rounded result as the b bit
number closest to the original number unrounded. For fixed point arithmetic, the error made by
rounding a number to b bits satisfy the inequality
2b 2b
xt x
2 2
For all three types of number systems, i.e., 2's complement 1's complement & sign
magnitude.
For floating point number the error made by rounding a number to b bits satisfy the inequality -
xt - x
2-b≤E≤2-b where E=
x
(ii)Truncation is a process of discarding all bits less significant than least significant bit that
is retained.
5.6 LIMIT CYCLE OSCILLATION:
For an IIR filter, implemented with infinite /precision arithmetic, the output should approach
zero in the steady state if the input is zero,- and it should approach a constant value if the input is
a constant. However, with an implementation using finite length register an output can occur
even with zero input-if there is a non-zero initial condition on one of the registers. The output
may be a fixed value or it may oscillate between finite positive and negative values. This effect is
referred to as (zero-input) limit cycle oscillations and is due to the nonlinear nature of the
arithmetic quantization.
The two kinds of limit cycle behaviour in DSP:
1. Zero input limit cycle oscillations
2. Overflow limit cycle oscillations
Digital Signal Processing 368
1. Zero input limit cycle oscillations:
In recursive system the product quantization may create periodic oscillation in the
output. These oscillations are called limit cycle. If he system output enters a limit cycle, it
will continue to remain in limit cycle even when the input is zero. Hence the limit cycles
are also called as zero input limit cycle.
2. Overflow limit cycle oscillations
The addition of two fixed-point arithmetic numbers cause over flow the sum exceeds the
word size available to store the sum. This overflow caused by adder make the filter output to
oscillate between maximum amplitude limits. Such limit cycles have been referred to as over
flow oscillations.
In addition to limit cycle oscillations causing by rounding the result of multiplication,
there are several types of limit cycle oscillations caused by addition, which make the filter output
oscillate between maximum and minimum amplitudes. Such limit cycles have been referred to as
overflow oscillations.
An overflow in addition of two or more binary numbers occurs when the sum exceeds the
word size available in the digital implementation of the system.
Digital Signal Processing 369
5.7 Dead band:
The limit cycles occur as a result of the quantization effects in multiplications. The
amplitudes of the output during a limit cycle are confined to a range of values called the dead
band of the filter.
Let us consider a single pole IIR system whose difference equation is gives y(n)=x(n)+α
y(n-1), n > 0
Digital Signal Processing 370
When a stable IIR digital filter is excited by a finite input sequence, that is constant, the output
will ideally decay to zero. However, the nonlinearities due to the finite-precision arithmetic
operations often cause periodic oscillations to occur in the output. Such oscillations in recursive
systems are called zero input limit cycle oscillations.
Consider a first order IIR filter with difference equation
Y(n)=x(n)+α y(n-1)
Let us assume a = 1/2 and the data register length is 3 bits plus a sign bit. If the input is
0.875 for n = 0
x(n) = 2
0 otherwise
rounding applied after the arithmetic operation then the table illustrates the limit cycle behaviour.
Here Q[.] represents the rounded operation. From table we can find that for n ≥ 3 the output
remains constant and gives 1/8 as steady output causing limit cycle behaviour. When a = -1/2 we
can see from table 7.4 that the output oscillates between 0.125 and -0.125.
n x(n) y(n-1) αy(n-1) q[αy(n-1)] y(n)= Q[αy(n-1)] +x(n)
0 0.875 0 0 0.000 7/8
1 0 7/8 7/16 0.100 1/2
2 0 1/2 ¼ 0.010 1/4
3 0 1/4 1/8 0.001 1/8
4 0 1/8 1/16 0.001 1/8
5 0 1/8 1/16 0.001 1/8
Digital Signal Processing 371
n x(n) y(n-1) αy(n-1) q[αy(n-1)] y(n)= Q[αy(n-1)] +x(n)
0 0.875 0 0 0.000 7/8
1 0 7/8 -7/16 0.100 -1/2
2 0 -1/2 1/4 0.010 1/4
3 0 1/4 -1/8 0.001 -1/8
4 0 -1/8 1/16 0.001 1/8
5 0 1/8 -1/16 0.001 -1/8
6 0 -1/8 1/16 0.001 1/8
Digital Signal Processing 372
Problems:
1. Explain the characteristics of a limit cycle oscillation with respect to the system
described by the difference equation y(n) = 0.95y(n-1) + x(n). Calculate the dead and of
the filter.
Solution:
Let x(n) = 0.875 for n = 0
=0 otherwise
Given Y(n)= Q[0.95y(n-1)]+x(n)
4 bit sign magnitude a = 0.95
n x(n) y(n-1) 0.95y(n-1) q[0.95y(n-1)] y(n)= Q[0.95y(n-1)] +x(n)
0 0.875 0 0 0 0.875
1 0 0.875 0.83125 0.1011 0. 8125
2 0 0. 8125 0.771875 0.1100 0.75
3 0 0.75 0. 7125 0.1011 0.6875
4 0 0.6875 0.653125 0.1010 0.625
5 0 0.625 0.59375 0.1010 0.625
For n≥4 the output remains constant at 0.625 causing limit cycle behavior.
(0.83125)10=0.110101)2
Q(0.83125)10=(0.1101)2=(0.8125)10
(0.771875)10 =(0.110001..)2
Q(0.771875)10 =(0.1100)2=(0.75)10
(0. 7125)10 =(0.1011011)2
Digital Signal Processing 373
Q(0.7125)10 =(0.1011)2=(0.6875)10
(0.653125)10 = (0.101001…)2
Q(0.653125)10 = (0.1010)2=(0.625)10
(0.59375)10=(0.10011)2
Q(0.59375)10=(0.1010)2=(0.625)10
Dead band
𝟐−𝒃 /𝟐 𝟐−𝟒 /𝟐
= = 𝟏−𝟎.𝟗𝟓
𝟏−|𝒂|
= 0.625
2. Explain the characteristics of a limit cycle oscillation with respect to the system
described by the difference equation y(n) = 0.95y(n-1) + x(n). Calculate the dead and of
the filter. X(n)=0, y(-1)=13.
Solution:
Given Y(n)= Q[0.95y(n-1)]+x(n)
x(n) = 0 for all n
y(-1)=13
4 bit sign magnitude a = 0.95
n x(n) y(n-1) 0.95y(n-1) q[0.95y(n-1)] y(n)= Q[0.95y(n-1)] +x(n)
0 0 13 12.35 12 12
1 0 12 11.4 11 11
2 0 11 10.45 10 10
3 0 10 9.5 9 9
4 0 9 8.55 8 8
5 0 8 7.6 7 7
6 0 7 6.65 6 6
7 0 6 5.7 5 5
8 0 5 4.75 5 5
Digital Signal Processing 374
For n≥8 the output remains constant at 5 causing limit cycle behavior.
Dead band = ± 5
3. Study the limit cycle behavior of the system described by
Y(n)= Q[ay(n-1)]+x(n), where y(n) is the output of the filter and Q[.] is quantization.
Assume a = 7/8, x(0) = ¾ & x = 0 , for n > 0 choose 4 bit sign magnitude.
Solution:
Given Y(n)= Q[ay(n-1)]+x(n)
4 bit sign magnitude a = 7/8=0.875, x(0) = ¾=0.75 x = 0, for n > 0
Y(n)= Q[0.875 y(n-1)]+x(n)
n x(n) y(n-1) ay(n-1) q[ay(n-1)] y(n)= Q[ay(n-1)] +x(n)
0 0.75 0 0 0 0.75
1 0 0.75 0.65625 0.1011 0.6875
2 0 0.6875 0.6015625 0.1010 0.675
3 0 0.675 0.546875 0.1001 0.5625
4 0 0.5625 0.4921875 0.1000 0.5
5 0 0.5 0.4375 0.0111 0.4375
6 0 0.4375 0.3828125 0.0110 0.375
7 0 0.375 0.328125 0.0101 0.3125
8 0 0.3125 0.2734375 0.0100 0.25
9 0 0.25 0.21875 0.0100 0.25
For n≥5 the output remains constant at 0.25 causing limit cycle behavior.
(0.65625)10=0.10101)2
Digital Signal Processing 375
Q(0.65625)10=(0.1011)2=(0.6875)10
(0.6015625)10 =(0.1001101)2
Q(0.6015625)10 =(0.1010)2=(0.675)10
(0.546875)10 =(0.100011)2
Q(0.546875)10 =(0.1001)2=(0.5625)10
(0.492185)10 = (0.0111111)2
Q(0.492185)10 = (0.1000)2=(0.5)10
(0.4375)10=(0.0111)2=(0.4375)10
(0.3828125)10=(0.0110001)2
Q(0.3828125)10=(0.0110)2=(0.375)10
(0.328125)10=(0.010101)2
Q(0.328125)10=(0.0101)2=(0.3125)10
(0.2734375)10=(0.0100011)2
Q(0.2734375)10=(0.0100)2=(0.25)10
(0.21875)10=(0.00111)2
Q(0.21875)10=(0.0100)2=(0.25)10
Dead band
𝟐−𝒃 /𝟐 𝟐−𝟒 /𝟐
= = 𝟏−𝟎.𝟖𝟕𝟓
𝟏−|𝒂|
= 0.25
Digital Signal Processing 376
1
4. For a second order digital filter H ( Z ) ; r 1.0 . Draw the
1 2r cos Z 1 r 2 Z 2
direct form II realization and find the scale factor S0 to avoid
overflow.
Solution:
1
H (Z )
1 2r cos Z 1 r 2 Z 2
The quantization noise model is shown below
Both noise sources see the same transfer function
1
H (Z )
1 2r cos Z 1 r 2 Z 2
Impulse response is
sin(n 1))
h( n) r n u ( n)
sin
1 𝟏
S0 2 = I= ∮ 𝑯(𝒁)𝑯(𝒁−𝟏 )𝒁−𝟏 𝒅𝒛
√I 𝟐𝝅𝒋 𝑪
I = ∑,h(n)-2
n=0
∞
sin(n + 1)θ 2
I = ∑ [r n ]
sinθ
n=0
∞
1
I= ∑ r 2n sin2 (n + 1)θ
sin2 θ
n=0
∞
1
I= ∑ r 2n (1 − cos(n + 1)2θ)
2 sin2 θ
n=0
Digital Signal Processing 377
∞
1
= ∑ r 2n (1 − cos(n + 1)2θ)
2sin2 θ
n=0
∞ ∞
1
= [∑ r 2n − ∑ r 2n cos(n + 1)2θ]
2sin2 θ
n=0 n=0
∞
1 1 2n
ej(n+1)2θ + e−j(n+1)2θ
= [ −∑r 4 5]
2sin2 θ 1 − r 2 2
n=0
∞
1 1 1
= 2
[ 2
− ∑ r 2n ej(n+1)2θ + r 2n e−j(n+1)2θ ]
2sin θ 1 − r 2
n=0
∞
1 1 1
= 2
[ 2
− ∑ ej2θ r 2n ej2θn + e−j2θ r 2n e−j2θn ]
2sin θ 1 − r 2
n=0
∞
1 1 1 n n
= 2
[ 2
− ∑(r 2 ej2θ ) ej2θ + e−j2θ (r 2 e−j2θ ) ]
2sin θ 1 − r 2
n=0
1 1 1 ej2θ e−j2θ
= 6 − 4 + 57
2sin2 θ 1 − r 2 2 1 − r 2 ej2θ 1 − r 2 e−j2θ
1 1 1 cos2θ − r 2
= 6 − 7
2sin2 θ 1 − r 2 2 (1 − 2r 2 cos 2θ + r 4 )
1 (1 + r 2 )(1 − cos2θ)
= 6 7
2sin2 θ (1 − r 2 )(1 − 2r 2 cos 2θ + r 4 )
(1 + r 2 )
I=6 7
(1 − r 2 )(1 − 2r 2 cos 2θ + r 4 )
Digital Signal Processing 378
5. For the digital network shown in figure find H(z) and scale factor. So to avoid over flow
register A1.
𝒘(𝒏) = 𝟎. 𝟓𝟎𝟗𝒘(𝒏 − 𝟏) + 𝑺𝟎 𝒙(𝒏)
𝑾(𝒁) = 𝟎. 𝟓𝟎𝟗𝒁−𝟏 𝑾(𝒁) + 𝑺𝟎 𝑿(𝒁)
𝑾(𝒁) 𝑺𝟎
=
𝑿(𝒁) 𝟏 − 𝟎. 𝟓𝟎𝟗𝒁−𝟏
𝑾(𝒁)
𝑺(𝒁) = 𝑾𝑰𝑻𝑯 𝑶𝑼𝑻 𝑺𝑪𝑨𝑳𝑬 𝑭𝑨𝑪𝑻𝑶𝑹
𝑿(𝒁)
𝑾(𝒁) 𝟏 𝒁
𝑺(𝒁) = = −𝟏
=
𝑿(𝒁) 𝟏 − 𝟎. 𝟓𝟎𝟗𝒁 𝒁 − 𝟎. 𝟓𝟎𝟗
𝒀(𝒁) 𝒀(𝒁) 𝑾(𝒁)
𝑯(𝒁) = = .
𝑿(𝒁) 𝑾(𝒁) 𝑿(𝒁)
𝒚(𝒏) = 𝟎. 𝟐𝟒𝟓𝒘(𝒏 − 𝟏) + 𝒘(𝒏)
𝒀(𝒁) = 𝟎. 𝟐𝟒𝟓𝒁−𝟏 𝑾(𝒁) + 𝒀(𝒁)
𝒀(𝒁)
= 𝟏 + 𝟎. 𝟐𝟒𝟓𝒁−𝟏
𝑾(𝒁)
𝟏
𝑺𝟐𝟎 =
𝟏 −𝟏 )𝒁−𝟏 𝒅𝒛
𝟐𝝅𝒋 ∮𝑪 𝑺(𝒁)𝑺(𝒁
𝟏 𝟏 𝒁 𝒁−𝟏
∮ 𝑺(𝒁)𝑺(𝒁−𝟏 )𝒁−𝟏 𝒅𝒛 = 𝟐𝝅𝒋 ∮𝑪
𝟐𝝅𝒋 𝑪
.
𝒁−𝟎.𝟓𝟎𝟗 𝒁−𝟏 −𝟎.𝟓𝟎𝟗
𝒁−𝟏 𝒅𝒛
𝒁 𝒁−𝟏
= 6(𝒁 − 𝟎. 𝟓𝟎𝟗) ( ) 4 −𝟏 5 𝒁−𝟏 7
𝒁 − 𝟎. 𝟓𝟎𝟗 𝒁 − 𝟎. 𝟓𝟎𝟗 𝒁=𝟎.𝟓𝟎𝟗
𝒁−𝟏
= 0𝒁 .𝒁−𝟏 −𝟎.𝟓𝟎𝟗/ 𝒁−𝟏 1
𝒁=𝟎.𝟓𝟎𝟗
Digital Signal Processing 379
𝟎. 𝟓𝟎𝟗−𝟏 𝟏
=4 5 = ( ) = 𝟏. 𝟑𝟒𝟗
𝟎. 𝟓𝟎𝟗−𝟏 − 𝟎. 𝟓𝟎𝟗 𝟏 − 𝟎. 𝟓𝟎𝟗𝟐
Then
𝟏
𝑺𝟐𝟎 =
𝟏. 𝟑𝟒𝟗
𝑺𝟎 = 𝟎. 𝟖𝟔𝟎𝟕
6. Draw the quantization noise model for a second order system
1
H (Z ) . And find the steady state output noise
1 2r cos Z 1 r 2 Z 2
variance.
Solution:
1
H (Z )
1 2r cos Z 1 r 2 Z 2
The quantization noise model is shown below
0 01 02
2
We know that 2 2
Both noise sources see the same transfer function
1
H (Z )
1 2r cos Z 1 r 2 Z 2
Impulse response is
sin(n 1))
h( n) r n u ( n)
sin
Overall output noise power is given by
02 02
2 2
01
∞
2 2 2
σ01 = σ02 = σe ∑ h2 (n)
n=−∞
∞
2 2
sin(n + 1)θ 2
n
σ0 = 2. σe ∑ [r ]
sinθ
n=0
Digital Signal Processing 380
∞
2
2−2b 1
σ0 = 2. ∑ r 2n sin2 (n + 1)θ
12 sin2 θ
n=0
∞
2−2b 1
σ0 2 = 2. ∑ r 2n (1 − cos(n + 1)2θ)
12 2 sin2 θ
n=0
∞
2−2b 1
= ∑ r 2n (1 − cos(n + 1)2θ)
12 sin2 θ
n=0
∞ ∞
2−2b 1
= [∑ r 2n − ∑ r 2n cos(n + 1)2θ]
12 sin2 θ
n=0 n=0
∞
2−2b 1 1 2n
ej(n+1)2θ + e−j(n+1)2θ
= [ − ∑r 4 5]
12 sin2 θ 1 − r 2 2
n=0
∞
2−2b 1 1 1
= [ − ∑ r 2n ej(n+1)2θ + r 2n e−j(n+1)2θ ]
12 sin2 θ 1 − r 2 2
n=0
∞
2−2b 1 1 1
= 2
[ 2
− ∑ ej2θ r 2n ej2θn + e−j2θ r 2n e−j2θn ]
12 sin θ 1 − r 2
n=0
∞
2−2b 1 1 1 n n
= 2
[ 2
− ∑(r 2 ej2θ ) ej2θ + e−j2θ (r 2 e−j2θ ) ]
12 sin θ 1 − r 2
n=0
2−2b 1 1 1 ej2θ e−j2θ
= 6 − 4 + 57
12 sin2 θ 1 − r 2 2 1 − r 2 ej2θ 1 − r 2 e−j2θ
2−2b 1 1 1 cos2θ − r 2
= 6 − 7
12 sin2 θ 1 − r 2 2 (1 − 2r 2 cos 2θ + r 4 )
2−2b 1 (1 + r 2 )(1 − cos2θ)
= 6 7
12 sin2 θ (1 − r 2 )(1 − 2r 2 cos 2θ + r 4 )
2−2b (1 + r 2 )
σ0 2 = 6 7
6 (1 − r 2 )(1 − 2r 2 cos 2θ + r 4 )
Digital Signal Processing 381
5.8 VARIOUS FACTORS WHICH DEGRADE THE PERFORMANCE OF DIGITAL
FILTER
i. Errors due to quantization of input data.
ii. Errors due to quantization of filter coefficients.
iii. Errors due to rounding the product in multiplications.
iv. Limit cycles due to product quantization and overflow in addition.
5.9 METHODS USED TO PREVENT OVERFLOW:
There are two methods used to prevent overflow
1. Saturation arithmetic
2. Scaling
Digital Signal Processing 382
Question Bank
PART A Questions and Answers (2 MARKS)
1. Why is rounding is preferred over truncation in realizing a digital filter? [A/M 18,19]
2. Draw quantization noise model for the first order system. [A/M 19]
3. What is product quantization error? [N/D 18]
4. What is meant by floating point representation? [N/D 18]
5. Compare the fixed point and floating point arithmetic? [A/M 18][M/J 09][N/D 17]
6. What is meant by finite word length effects in digital system? [N/D 17]
7. What is called dead band? [A/M 17], [N/D 09, 10,13] [M/J 16]
8. What are the various factors which degrade the performance of digital filter implementation
when finite word length is used? [N/D 17]
9. What are the methods used to prevent overflow? [A/M 17], [M/J 16]
10. What are the three quantization errors due to finite word length registers in digital filters?
[A/M 08][N/D 06, 10] [M/J 12]
(Or) Name the three quantization error due to finite word length registers in digital filters.
[N/D 16]
11. What does the truncation of data result in? [N/D 15]
12. List the representations for which truncation error is analysed. [N/D 15]
(Or) What are the different types of fixed point representation? [N/D 16]
13. What is limit cycle oscillation? [N/D 09,13][M/J 08,13,14]
14. What is overflow oscillation? [N/D 12]
15. What is the effect of quantization on pole location? [A/M 10], [M/J 12]
16. Discuss the truncation error in quantization process. [N/D 11]
Digital Signal Processing 383
PART B (16 MARK QUESTIONS)
1. Two first order filters are connected in cascaded whose system functions of the individual
sections are H1(z) =1/(1-0.5z-1 ) and H2(z) =1/(1-0.6z-1 ). Determine the overall output noise
power. [A/M 17]
or
For the given transfer function H(z) = H1(z) H2(z) where H1(z) =1/(1-0.5z-1 ) and H2(z)
=1/(1-0.4z-1 ), Find the roundoff output noise power. Calculate the value if b=3 (excluding
sign bit) [A/M 19]
2. Explain the characteristics of a limit cycle oscillation with respect to the system described by
the difference equation y(n) = 0.95y(n-1) + x(n). Calculate the dead and of the filter.
[M/J 16] [A/M 17] [N/D 18]
3. (i) The input to the system y(n) = 0.999y(n-1) + x(n) is applied to an ADC. What is the
power produced by the quantization noise at the output of the filter if the input is quantized to
a 1) 8 bits 2) 16 bits. [N/D 18]
4. Consider the recursive filter y(n)=0.8y(n-1)+x(n). The input x(n)has a range of values of
100V represented by 8 bits. Compute the variance of output due to A/D conversion process.
[N/D 18]
5. Briefly explain the following: [A/M 18, 19]
Product Quantization error
Coefficient Quantization error
Truncation and Rounding
6. Explain the characteristics of a limit cycle oscillation with respect to the system described by
the difference equation y(n) = 0.95y(n-1) + x(n). Calculate the dead and of the filter. X(n)=0,
y(-1)=13 [N/D 17]
7. Study the limit cycle behavior of the system described by Y(n)= Q[ay(n-
1)]+x(n), where y(n) is the output of the filter and Q[.] is quantization. Assume a = 7/8, x(0)
= ¾ & x(n) = 0 , for n > 0 choose 4 bit sign magnitude.
[N/D 16]
8. Derive the signal to quantization ratio of the A/D converter. [M/J 14] [A/M 11]
(OR) Explain the quantization process and errors introduced due to quantization.
[N/D 17]
9. Explain the limit cycle oscillations due to product round off and overflow errors.
[N/D 10]
(or)
Digital Signal Processing 384
Explain in detail about zero input limit cycle oscillations due to finite word length registers
and overflow limit cycle oscillations. [N/D 11, 17]
10. Draw the quantization noise model for a second order system
1
H (Z ) . And find the steady state output noise
1 2r cos Z 1 r 2 Z 2
variance. [N/D 09][M/J 16]
11. (i) The output of an ADC is applied to a digital filter with system function . Find
the output noise power from digital filter when input signal is quantized to have 8 bits.
[N/D 15]
Or
The output signal of an ADC is passed through a first order LPF, with system function given
by for 0≤a≤1. Find the steady state output noise power due to quantization at
the output of the digital filter. [A/M 18] [N/D 17]
(ii) Prove that [N/D 15]
12. For the digital network shown in figure find H(z) and scale factor. So to avoid over flow
register A1. [N/D 16]
Digital Signal Processing 385
PART A – TWO MARKS
1. Why is rounding is preferred over truncation in realizing a digital filter? [A/M 18,19]
The quantization error due to rounding is independent of type arithmetic
The mean of rounding error is zero
The variance of rounding error is low
2. Draw quantization noise model for the first order system. [A/M 19]
Quantization Noise Model for the First Order System
3. What is product quantization error? [N/D 18]
When the digital filters are implemented using fixed point arithmetic, the results of
product or multiplication operations are quantized to fit into finite word length. This
quantization uses rounding operation. Hence errors generated in such operation are called as
product round off errors.
4. What is meant by floating point representation? [N/D 18]
Floating point representation consists of mantissa and exponent. Floating point number is
written as,
Binary floating point number: Mx2E
Decimal floating point number: Mx10E
Value of mantissa lies between 0.5 and 1. Exponent can be positive or negative number.
0.4382x10-2, 0.3815x106 are examples of decimal floating numbers. 0.1101x2011, 0.11101x2101
are examples of the binary floating point numbers. The advantage of floating point numbers is
that, they cover wide range.
Digital Signal Processing 386
5. Compare the fixed point and floating point arithmetic? [A/M 18] [M/J 09][N/D 17]
FIXED POINT ARITHMATIC FLOATING POINT ARITHMATIC
Fast operation Slow operation
Relatively economical More expensive because of costlier hardware
Small dynamic range Increased dynamic range
Roundoff errors occur with both addition and
Roundoff errors occur only for addition
multiplication
Overflow occurs in addition Overflow does not arise
Used in small computers Used in larger, general purpose computers
6. What is meant by finite word length effects in digital system? [N/D 17]
Finite word length effects in digital system is nothing but effects occurs in digit al system
when the number stored in registers of system is quantized to finite bit size.
7. What is called dead band? [N/D 09, 10,13] [M/J 16] [A/M 17]
The limit cycle occur as a result of quantization effect in multiplication. The amplitudes
of the output during a limit cycle are confined to a range of values called the dead band of the
filter.
8. What are the various factors which degrade the performance of digital filter implementation
when finite word length is used? [N/D 17]
i. Errors due to quantization of input data.
ii. Errors due to quantization of filter coefficients.
iii. Errors due to rounding the product in multiplications.
iv. Limit cycles due to product quantization and overflow in addition.
9. What are the methods used to prevent overflow? [A/M 17], [M/J 16]
There are two methods used to prevent overflow.
1. Saturation arithmetic
2. Scaling
Digital Signal Processing 387
10. What are the three quantization errors due to finite word length registers in digital filters?
[A/M 08] [N/D 06, 10][M/J 12]
(Or) Name the three quantization error due to finite word length registers in digital filters.
[N/D 16]
They are
i. Input Quantization Error
ii. Product Quantization error
iii. Coefficient Quantization error
11. What does the truncation of data result in? [N/D 15]
When the data are truncated, then its value approximated by highest quantization level
that is no greater than data.
12. List the representations for which truncation error is analyzed. [N/D 15]
(Or) What are the different types of fixed point representation? [N/D 16]
Sign magnitude representation
One’s complement representation
Two’s complement representation
13. What is limit cycle oscillation? [N/D 09,13],[M/J 08,13,14]
For an IIR filter, implemented with infinite /precision arithmetic, the output should
approach zero in the steady state if the input is zero,- and it should approach a constant
value if the input is a constant. However, with an implementation using finite length
register an output can occur even with zero input-if there is a non-zero initial condition on
one of the registers. The output may be a fixed value or it may oscillate between finite
positive and negative values. This effect is referred to as (zero-input) limit cycle
oscillations and is due to the nonlinear nature of the arithmetic quantization.
14. What is overflow oscillation? [N/D 12]
The addition of two fixed-point arithmetic numbers cause over flow the sum exceeds
the word size available to store the sum. This overflow caused by adder make the filter
output to oscillate between maximum amplitude limits. Such limit cycles have been
referred to as over flow oscillations.
Digital Signal Processing 388
15. What is the effect of quantization on pole location? [A/M 10], [M/J 12]
Quantization of coefficients in digital filters lead to slight changes in their value.
These changes in value of filter coefficients modify the pole-zero locations. Sometimes
the pole locations will be changed in such a way that the system may drive into
instability.
16. Discuss the truncation error in quantization process. [N/D 11]
Truncation is a process of discarding all bits less significant than least significant bit
that is retained.
17. What is the need for signal scaling? (or) why scaling is important in finite word length
effect? [A/M10]
To prevent overflow, the signal level at certain points in the digital filter must be
scaled so that no overflow occurs in the adder.
18. What are the different quantization methods? [N/D 06, 10]
The common methods of quantization are
1. Truncation 2. Rounding
19. What is quantization noise (or) what is meant by A/D conversion noise? [A/M 08]
A DSP contains a device, A/D converter that operates on the analog input x (t) to
produce xq (n) which is binary sequence of 0s and 1s.
At first the signal x (t) is sampled at regular intervals to produce a sequence x (n) is of
infinite precision. Each sample x (n) is expressed in terms of a finite number of bits given
the sequence xq(n). The difference signal e (n) = xq(n) - x (n) is called A/D conversion
noise.
20. What are the two kinds of limit cycle behavior in DSP?
1. Zero input limit cycle oscillations
2. Overflow limit cycle oscillations
Digital Signal Processing 389
21. What are the advantages of floating point arithmetic?
1. Large dynamic range
2. Over flow in floating point representation is unlike.
22. What is meant rounding? Discuss its effect on all types of number representation?
Rounding a number to b bits is accomplished by choosing the rounded result as the b
bit number closest to the original number unrounded. For fixed point arithmetic, the error
made by rounding a number to b bits satisfy the inequality
2b 2b
xt x
2 2
For all three types of number systems, i.e., 2's complement 1's complement & sign
magnitude.
For floating point number the error made by rounding a number to b bits satisfy the
xt - x
inequality -2-b≤E≤2-b where E=
x
23. What is meant by quantization step size?
1. Let us assume a sinusoidal signal varying between +1 and -1 having a dynamic range
2. If the ADC used to convert the sinusoidal signal employs b+1 bits including sign bit,
the number of levels available for quantizing x(n) is 2b+1. Thus the interval between
successive levels
2
q= b +1
= 2 -b
2
Where q is known as quantization step size.
PART - B (QUESTIONS & ANSWERS)
1. Two first order filters are connected in cascaded whose system functions of the individual
1 1
sections are H 1 ( Z ) and H 2 ( Z ) . Determine the overall output
1 0.5 Z 1
1 0.6 Z 1
noise power. [A/M 17]
Digital Signal Processing 390
or
For the given transfer function H(z) = H1(z) H2(z) where H1(z) =1/(1-0.5z-1 ) and H2(z)
=1/(1-0.4z-1 ), Find the roundoff output noise power. Calculate the value if b=3
(excluding sign bit) [A/M 19]
Given:
1 1
H 1 (Z ) H 2 (Z )
1 0.5 Z 1 1 0.6 Z 1
1
H (Z )
(1 0.5 Z )(1 0.6 Z 1 )
1
1
H 2 (Z )
1 0.6 Z 1
Overall output noise power is given by
02 01 02
22
Digital Signal Processing 391
Digital Signal Processing 392
2. Explain the characteristics of a limit cycle oscillation with respect to the system described
by the difference equation y(n) = 0.95y(n-1) + x(n). Calculate the dead and of the filter.
[N/D 09,10,15,18][M/J 16][A/M 17]
Solution:
Let
Given Y(n)= Q[0.95y(n-1)]+x(n)
4 bit sign magnitude a = 0.95
n x(n) y(n-1) 0.95y(n-1) q[0.95y(n-1)] y(n)= Q[0.95y(n-1)] +x(n)
0 0.875 0 0 0 0.875
1 0 0.875 0.83125 0.1011 0. 8125
Digital Signal Processing 393
2 0 0. 8125 0.771875 0.1100 0.75
3 0 0.75 0. 7125 0.1011 0.6875
4 0 0.6875 0.653125 0.1010 0.625
5 0 0.625 0.59375 0.1010 0.625
For n≥4 the output remains constant at 0.625 causing limit cycle behavior.
(0.83125)10=0.110101)2
Q(0.83125)10=(0.1101)2=(0.8125)10
(0.771875)10 =(0.110001..)2
Q(0.771875)10 =(0.1100)2=(0.75)10
(0. 7125)10 =(0.1011011)2
Q(0.7125)10 =(0.1011)2=(0.6875)10
(0.653125)10 = (0.101001…)2
Q(0.653125)10 = (0.1010)2=(0.625)10
(0.59375)10=(0.10011)2
Q(0.59375)10=(0.1010)2=(0.625)10
Dead band
= 0.625
Digital Signal Processing 394
3. The input to the system y(n) = 0.999y(n-1) + x(n) is applied to an ADC. a What is the
power produced by the quantization noise at the output of the filter if the input is
quantized to a 1) 8 bits 2) 16 bits.
[N/D 18]
y(n) = 0.999y(n-1) + x(n)
Applying Z Transform
Y(Z) = 0.999 Z-1 Y(Z) + X(Z)
H(Z)= Y(Z)/X(Z) = 1/(1-0.999 Z-1) =Z/(Z-0.999)
Output noise power is given by
Digital Signal Processing 395
FOR 8 BITS
FOR 16 BITS
4. Consider the recursive filter y(n)=0.8y(n-1)+x(n). The input x(n) has a range of values of
100V represented by 8 bits. Compute the variance of output due to A/D conversion
process.
[N/D 18]
y(n) = 0.8y(n-1) + x(n)
Applying Z Transform
Y(Z) = 0.8 Z-1 Y(Z) + X(Z)
H(Z)= Y(Z)/X(Z) = 1/(1-0.8 Z-1) =Z/(Z-0.8)
Output noise power is given by
R=100V
AND
Digital Signal Processing 396
5. Briefly explain the following: [A/M
18]
Product Quantization error [A/M
19]
Coefficient Quantization error
Truncation and Rounding
Truncation and Rounding:
Truncation:
It is the process of reducing the size of binary number (or reducing number of bits in a
binary number) by discarding all bits less significant than the least significant bit that is
retained. In the truncation of a binary number to b-bits, all the less significant bits beyond bth
bit are discarded.
Rounding:
It is a process of reducing the size of a binary number to finite word size of b-bits
such that the rounded to bit number is closest to the original unquantized number. Rounding
process consists of truncation and addition.
Digital Signal Processing 397
Rounding of a number of b-bits, first the number unquantized is truncated to b-bits by
retaining the most significant bits. Then a zero or one is added to LSB of the truncated
number depending on the bit that is next to the LSB that is retained.
If the bit next to the LSB is zero then 0 is added to the LSB of truncated number.
If the bit next to the LSB is one then one is added to the LSB of the truncated number.
Coefficient Quantization error
Location (or the value) of poles and zeros of digital filter directly depends on the
value of the coefficients. The quantization of the filter coefficients will modify the value of
poles and zeros and so the location of poles and zeros will be shifted from the direct location.
Sensitivity of the filter frequency response characteristics of the filter Coefficient is
minimized by realizing the filter having a large number of poles and zeros as an
interconnection of second order sections. This leads to parallel form and cascade realization
in which the basic building blocks are first order and second order sections. Coefficient
quantization has less effect in cascade quantization when compared to parallel realization.
Product quantization error
In fixed point arithmetic, the multiplication of two b-bit numbers results in a product
of length 2b-bits if the word length of registries to be stored the result is b bits then it is
necessary to quantize the product to b bits. The error due to quantization of the output of
multiplier is referred to as product quantization error.
6. Explain the characteristics of a limit cycle oscillation with respect to the system described
by the difference equation y(n) = 0.95y(n-1) + x(n). Calculate the dead and of the filter.
X(n)=0, y(-1)=13 [N/D 17,10,15][M/J 16] [A/M 17]
Solution:
Given Y(n)= Q[0.95y(n-1)]+x(n)
Digital Signal Processing 398
y(-1)=13
4 bit sign magnitude a = 0.95
n x(n) y(n-1) 0.95y(n-1) q[0.95y(n-1)] y(n)= Q[0.95y(n-1)] +x(n)
0 0 13 12.35 12 12
1 0 12 11.4 11 11
2 0 11 10.45 10 10
3 0 10 9.5 9 9
4 0 9 8.55 8 8
5 0 8 7.6 7 7
6 0 7 6.65 6 6
7 0 6 5.7 5 5
8 0 5 4.75 5 5
For n≥8 the output remains constant at 5 causing limit cycle behavior.
Dead band = ± 5
7. Study the limit cycle behavior of the system described by Y(n)= Q[ay(n-
1)]+x(n), where y(n) is the output of the filter and Q[.] is quantization. Assume a = 7/8,
x(0) = ¾ & x = 0 , for n > 0 choose 4 bit sign magnitude.
[N/D 16]
Solution
Given Y(n)= Q[ay(n-1)]+x(n)
4 bit sign magnitude a = 7/8=0.875, x(0) = ¾=0.75 x = 0, for n > 0
Y(n)= Q[0.875 y(n-1)]+x(n)
Digital Signal Processing 399
n x(n) y(n-1) ay(n-1) q[ay(n-1)] y(n)= Q[ay(n-1)] +x(n)
0 0.75 0 0 0 0.75
1 0 0.75 0.65625 0.1011 0.6875
2 0 0.6875 0.6015625 0.1010 0.675
3 0 0.675 0.546875 0.1001 0.5625
4 0 0.5625 0.4921875 0.1000 0.5
5 0 0.5 0.4375 0.0111 0.4375
6 0 0.4375 0.3828125 0.0110 0.375
7 0 0.375 0.328125 0.0101 0.3125
8 0 0.3125 0.2734375 0.0100 0.25
9 0 0.25 0.21875 0.0100 0.25
For n≥5 the output remains constant at 0.25 causing limit cycle behavior.
(0.65625)10=0.10101)2
Q(0.65625)10=(0.1011)2=(0.6875)10
(0.6015625)10 =(0.1001101)2
Q(0.6015625)10 =(0.1010)2=(0.675)10
(0.546875)10 =(0.100011)2
Q(0.546875)10 =(0.1001)2=(0.5625)10
Digital Signal Processing 400
(0.492185)10 = (0.0111111)2
Q(0.492185)10 = (0.1000)2=(0.5)10
(0.4375)10=(0.0111)2=(0.4375)10
(0.3828125)10=(0.0110001)2
Q(0.3828125)10=(0.0110)2=(0.375)10
(0.328125)10=(0.010101)2
Q(0.328125)10=(0.0101)2=(0.3125)10
(0.2734375)10=(0.0100011)2
Q(0.2734375)10=(0.0100)2=(0.25)10
(0.21875)10=(0.00111)2
Q(0.21875)10=(0.0100)2=(0.25)10
Dead band
= 0.25
8. Derive the signal to quantization ratio of the A/D converter. [M/J 14] [A/M 11]
Digital Signal Processing 401
(OR) Explain the quantization process and errors introduced due to quantization.
[N/D 17]
For most of the engineering applications the input signal is continuous in time or
analog wave form. This signal is to be converted into digital by using ADC. The process
of converting an analog signal to a digital is shown in Fig.1. At first the signal x(t) is
sampled at regular intervals t = nT where n = 0, 1, 2 ... to create a sequence x(n). This is
done by a sampler. Then numeric equivalent of each sample x(n.) is expressed by a finite
number of bits giving the sequence xq(n). The difference signal e(n) = xq(n) — x(n) is
called quantization noise or A/D conversion noise.
Fig.1 Block diagram of A/D converter.
Let us assume a Sinusoidal signal varying between +1 and -1 having a dynamic range 2.
If ADC is used to convert the sinusoidal signal it employs (b + 1) bits including sign bit.
Then the number of levels available for quantizing x(n) is 2b+1. Thus the interval between
successive levels is
Digital Signal Processing 402
The following errors arise due to quantization of numbers.
1. Input quantization error.
2. Product quantization error.
3. Coefficient quantization error.
Input quantization error :
Digital Signal Processing 403
Digital Signal Processing 404
Steady state input noise power
Digital Signal Processing 405
Digital Signal Processing 406
Steady state output noise power
Fig. Representation of A/D conversion noise
Digital Signal Processing 407
9. Explain the limit cycle oscillations due to product round off and overflow errors.
[N/D 10]
(or)
Explain in detail about zero input limit cycle oscillations due to finite word length
registers and overflow limit cycle oscillations. [A/M 19] [N/D 11, 17]
When a stable IIR digital filter is excited by a finite input sequence, that is constant,
the output will ideally decay to zero. However, the nonlinearities due to the finite-
precision arithmetic operations often cause periodic oscillations to occur in the output.
Such oscillations in recursive systems are called zero input limit cycle oscillations.
Consider a first order IIR filter with difference equation
Y(n)=x(n)+α y(n-1)
Digital Signal Processing 408
Let us assume a = 1/2 and the data register length is 3 bits plus a sign bit. If the input
is
and rounding applied after the arithmetic operation then the table illustrates the limit
cycle behaviour. Here Q[.] represents the rounded operation. From table we can find that
for n ≥ 3 the output remains constant and gives 1/8 as steady output causing limit cycle
behaviour. When a = -1/2 we can see from table 7.4 that the output oscillates between
0.125 and -0.125.
n x(n) y(n-1) αy(n-1) q[αy(n-1)] y(n)= Q[αy(n-1)] +x(n)
0 0.875 0 0 0.000 7/8
1 0 7/8 7/16 0.100 1/2
2 0 1/2 ¼ 0.010 1/4
3 0 1/4 1/8 0.001 1/8
4 0 1/8 1/16 0.001 1/8
5 0 1/8 1/16 0.001 1/8
Digital Signal Processing 409
n x(n) y(n-1) αy(n-1) q[αy(n-1)] y(n)= Q[αy(n-1)] +x(n)
0 0.875 0 0 0.000 7/8
1 0 7/8 -7/16 0.100 -1/2
2 0 -1/2 1/4 0.010 1/4
3 0 1/4 -1/8 0.001 -1/8
4 0 -1/8 1/16 0.001 1/8
5 0 1/8 -1/16 0.001 -1/8
6 0 -1/8 1/16 0.001 1/8
Dead band
The limit cycles occur as a result of the quantization effects in multiplications. The
amplitudes of the output during a limit cycle are confined to a range of values called the
dead band of the filter.
Let us consider a single pole IIR system whose difference equation is gives
y(n)=x(n)+α y(n-1), n > 0
Digital Signal Processing 410
Overflow limit cycle oscillations
In addition to limit cycle oscillations causing by rounding the result of multiplication,
there are several types of limit cycle oscillations caused by addition, which make the filter
output oscillate between maximum and minimum amplitudes. Such limit cycles have been
referred to as overflow oscillations.
An overflow in addition of two or more binary numbers occurs when the sum exceeds
the word size available in the digital implementation of the system.
Digital Signal Processing 411
1
10. For a second order digital filter H ( Z ) ; r 1.0 . Draw the
1 2r cos Z 1 r 2 Z 2
direct form II realization and find the scale factor S0 to avoid overflow.
[M/J 09]
Solution:
1
H (Z )
1 2r cos Z 1 r 2 Z 2
The quantization noise model is shown below
Both noise sources see the same transfer function
1
H (Z )
1 2r cos Z 1 r 2 Z 2
Impulse response is
sin(n 1))
h( n) r n u ( n)
sin
Digital Signal Processing 412
Digital Signal Processing 413
1
11. Realize the first order transfer function H ( Z ) and draw its quantization
1 a Z 1
model. Find the steady state noise power due to product round off.
Solution:
Digital Signal Processing 414
12. For the digital network shown in figure find H(z) and scale factor. So to avoid over flow
register A1. [N/D 16]
.
Digital Signal Processing 415
Then
13. Draw the quantization noise model for a second order system
1
H (Z ) . And find the steady state output noise
1 2r cos Z 1 r 2 Z 2
variance. [N/D 09][M/J
16]
Solution:
1
H (Z )
1 2r cos Z 1 r 2 Z 2
The quantization noise model is shown below
0 01 02
2
We know that 2 2
Digital Signal Processing 416
Both noise sources see the same transfer function
1
H (Z )
1 2r cos Z 1 r 2 Z 2
Impulse response is
sin(n 1))
h( n) r n u ( n)
sin
Overall output noise power is given by
02 02
2 2
01
Digital Signal Processing 417
14. (i) The output of an ADC is applied to a digital filter with system function .
Find the output noise power from digital filter when input signal is quantized to have 8
bits. [N/D 15]
Or
The output signal of an ADC is passed through a first order LPF, with system function
given by for 0≤a≤1. Find the steady state output noise power due to
quantization at the output of the digital filter. [N/D 17]
Given:
Assume a=0.5
(1 - a)z 0 .5 Z
H1 ( Z )
(z - a ) Z 0.5
Digital Signal Processing 418
Output noise power is given by
(ii) Prove that [N/D 15]
Proof:
Parseval’s theorem states that
Digital Signal Processing 419
X(z) =
Z transform for x2(n)
X (z)=Z[x2(n)]=
Taking inverse z transform
z-1(X(z))= x(n)=
X(z) =
Multiplying zn on both sides
Digital Signal Processing 420
1.0
15. Consider a second order IIR filter with H ( Z ) . Find the effect
1 0.5Z 1 0.45Z 1
1
of quantization on pole locations of the given system in direct form and cascade form.
Assume b = 3 bits. [N/D 11]
Given
(0.95)10 =(0.1111001…)2
(-0.95)10 =(1.1111001…)2
After truncation
(-0.95)10 =(1.111)2=-0.875
(0.225)10 =(0.001110…)2
After truncation
(0.001)2= (0.125)10
Digital Signal Processing 421
Cascade form
(-0.5)10 =(.100…)2
(-0.45)10 =(1.01110…)2
After truncation
(1.011)2 =(-0.375)10
Digital Signal Processing 422
CHAPTER 6
DSP APPLICATIONS AND INTRODUCTION TO DIGITAL SIGNAL
PROCESSORS
6.1 MULTIRATE SIGNAL PROCESSING:
Multirate frameworks have acquired prominence since the mid-1980s and they are
normally utilized for sound and video processing, Communications systems, and
transform analysis to give some examples. Multirate systems are typically used to
boost computational efficiency or performance in most applications. The two
fundamental tasks in a multirate framework are decreasing (decimation) and
increasing (interpolation) the sampling-rate of a signal. Multirate systems are used for
sampling-rate conversion, which involves both decimation and interpolation.
The systems employ multiple sampling rates in the processing of digital signals are
called as multirate signal processing systems.
Multirate systems are building blocks commonly used in digital signal processing
(DSP). Their function is to alter the rate of the discrete-time signals, by adding or
deleting a portion of the signal samples.
The theory of processing signals at a different sampling rate is called multirate signal
processing.
6.2 DECIMATION
The process of reducing the sampling rate by a factor D is known as decimation or
down sampling.
DECIMATION BY A FACTOR D:
The input signal is x(n).Its spectrum is given as X(ω).It is to be downloaded by integer
factor D.
X(ω) is non-zero in the interval 0≤׀ω≤׀П
If the sampling rate is reduced by selecting every Dth value of x(n), then aliasing problem
occur.
To avoid this aliasing problem, the bandwidth of x(n) is reduced to
Digital Signal Processing 423
In the above figure,x(n) is given to the low pass filter.It is represented as h(n).The frequency
response is H(ω).
Low pass filter is used to eliminate the spectrum of X(ω) in,
Output of LPF is W(n),
It is downloaded by D.
The filtering operation on x(n) will be linear and time variant.
Digital Signal Processing 424
Take Z-transform for y(m), then
Digital Signal Processing 425
If H(ω) is designed properly, aliasing effect will be eliminated.
Fig: 6.1 Spectrum of signals when x(n) is decimated by D
Digital Signal Processing 426
6.3 ANTI-ALIASING FILTER:
The spectra obtained after down sampling a signal by a factor M is the sum of all the
uniformly shifted and stretched version of original spectrum scaled by a factor 1/M. If the
original spectrum is not band limited to π/M, then down sampling will cause aliasing. In
order to avoid aliasing the signal x(n) is to be band limited to ±π/M. This can be done by
filtering the signal x(n) with a low pass filter with a cutoff frequency of π/M. This filter is
known as anti-aliasing filter.
6.4 INTERPOLATION:
The process of increasing the sampling rate by a factor I is known as interpolation.
INTERPOLATION BY A FACTOR I:
It can be done by interpolating I-I new samples between successive values of the signal. The
spectral shape of x(n) will be preserved by the interpolation process.
W(m) is the sequence obtained from x(n) by adding I-I zeros between successive values of
x(n).Its rate is fy=Ifx.
Sampling rate of W(m) is identical to y(m)
Digital Signal Processing 427
Fig:6.2 Spectrum of x(n) and W(ωy)
The increase in sampling rate can be obtained by adding I-I zero samples between successive
of x(n).The resulting spectrum is given as W(ωy).
The remove the images, an anti-imaging filter (LPF) is used.
A=Gain of the filter
A=I in the pass band will be the desired normalization factor.
Output spectrum is given by,
Digital Signal Processing 428
ANTI-IMAGING FILTER:
The frequency spectrum of up sampled signal with a factor l, contains (L-1) additional
images of the input spectrum. since we are not interested in image spectra, a low pass filter
with a cut off frequency = π/L can be used after up sampler. This filter is known as anti-
imaging filter.
6.5 SAMPLING RATE CONVERSION BY A RATIONAL FACTOR:
The process of converting a signal from a given rate to a different rate is known as sampling
rate conversion. In sampling rate conversion process, interpolation operation can be done
first. Then, decimation can be done. Because, the spectral characteristics of x(n) are to be
preserved. Sampling rate conversion by a rational factor I/D can be done by cascading
interpolator with a decimator.
Fig: 6.3 Functional diagram of sampling rate conversion by a factor I/D.
Digital Signal Processing 429
Input x(n) is given to up sampler block. The output of the up-sampler block is given to h1(j)
and h2(j) blocks or low pass filter blocks. The output of the filter is given to down sampler
block. The output y(m) is obtained from this block.h1(j) and h2(j) are operated at the same
rate Ifx. If these two filters are combined into a single LPF with impulse response h(j), then
the frequency response of this filter is,
Relationship of Time domain:
The output of the up sampler is W(j).
The output of LPF is,
The output y(m) is,
Digital Signal Processing 430
Relationship of Frequency domain:
MULTI STAGE IMPLEMENTATION OF SAMPLING RATE CONVERSION:
In this section, the method to perform sampling rate conversion for D>>1 and I>>1 in
multiple stages. First, we consider the interpolation by a factor I>>1.Interpolation by I can be
accomplished by cascading P number of stages of interpolation and filtering.
Fig: 6.4 Multistage Implementation of Interpolation by a factor I
Fig 5.4.2 the filter block is indicated by h1(n),h2(n)…..hp(n).Each stage consists of
interpolation block and filter block. The filter is used to eliminate the images introduced by
the up sampling process.
Similarly, write the expression for decimation by a factor D.
Digital Signal Processing 431
q=number of stages
So, the decimation by a factor D can be accomplished by cascading q number of stages of
filtering and decimation.
Fig: 6.5 Multistage Implementation of decimation by a factor D
The sampling rate at the output of the ith stage is,
Here, the input rate=fx.
Each filter is designed to avoid aliasing within the frequency band of interest.
Applications of multi-rate signal processing.:
i. Sub-band coding of speech signals and image compression.
ii. Over sampling A/D and D/A converters for high quality digital audio systems and digital
storage systems.
iii.Digital filter banks.
iv.Quadrature Mirror Filter(QMF) bank.
The above applications come under the areas given below:
Communication systems
Speech and audio processing systems
Antenna systems
Radar systems
6.6 ADAPTIVE FILTERS: INTRODUCTION
Adaptive filters are digital filters whose coefficients change with an objective to make
the filter converge to an optimal state. The optimization criterion is a cost function,
which is most commonly the mean square of the error signal between the output of
the adaptive filter and the desired signal.
Digital Signal Processing 432
Adaptive filters modify their characteristics to achieve certain objectives by automatically
updating their coefficients. Many adaptive filter structures and adaptation algorithms have
been developed for different applications. This chapter presents the most widely used
adaptive filters based on the FIR filter with the least-mean -square (LMS) algorithm. These
adaptive filters are relatively simple to design and implement. They are well understood
regarding stability, convergence speed, steady-state performance, and finite-precision effects.
An adaptive filter consists of two distinct parts - a digital filter to perform the desired
filtering, and an adaptive algorithm to adjust the coefficients (or weights) of the filter. A
general form of adaptive filter is illustrated in Figure 5.5.1, where d(n) is a desired (or
primary input) signal, y(n) is the output of a digital filter driven by a reference input
signal x(n), and an error signal e(n) is the difference between d(n) and y(n). The adaptive
algorithm adjusts the filter coefficients to minimize the mean-square value of e(n). Therefore,
the filter weights are updated so that the error is progressively minimized on a sample-by
sample basis.
In general, there are two types of digital filters that can be used for adaptive filtering:
FIR and IIR filters. The FIR filter is always stable and can provide a linear-phase response.
On the other hand, the IIR, filter involves both zeros and poles. Unless they are properly
controlled, the poles in the filter may move outside the unit circle and result in an unstable
system during the adaptation of coefficients. Thus, the adaptive FIR filter is widely used for
practical real-time applications. This chapter focuses on the class of adaptive FIR filters.
Fig: 6.6 Block Diagram of Adaptive filter.
Digital Signal Processing 433
6.7 APPLICATIONS OF ADAPTIVE FILTERING TO EQUALIZATION
The classical configurations of adaptive filtering are system identification, prediction,
noise cancellation, and inverse modelling. The differences between the configurations are
given by the way the input, the desired and the output signals are used.
An adaptive equalizer is an equalizer that automatically adapts to time-varying
properties of the communication channel. It is frequently used with coherent modulations
such as phase-shift keying, mitigating the effects of multipath propagation and Doppler
spreading.
ADAPTIVE CHANNEL EQUALIZATION:
Fig: 5.6.1, a block diagram of a digital communication system in which an adaptive equalizer
is used to compensate for the distortion caused by the transmission medium (channel).
Fig: 6.7 Application of Adaptive Filter to Adaptive Channel Equalization
The digital sequence of information symbols a(n) is fed to the transmitting filter whose output
is
where, p(t) is the impulse response of the filter at the transmitter and Ts is the time interval
between information symbols; that is, 1 Ts is the symbol rate. we may assume that a(n) is a
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multilevel sequence that takes on values from the set ±1, ±3,±5,............,±(k −1), where k is
the number of possible values.
Typically, the pulse p(t) is designed to have the characteristics illustrated in fig.5.6.2
Fig: 6.8 Pulse Shape for Digital Transmission of Symbols at a Rate of 1/Ts Symbols per
second
Note that p(0) =1 at t = 0 and p(nTs ) =0 at t =nT , n =±1,±2,.......... s ……… As a
consequence, successive pulses transmitted sequentially every Ts second do not interfere with
one another when sampled at the time instants nTs t = . Thus, ( ) ( ) nTs a n =s . The channel,
which is usually modelled as a linear filter, distorts the pulse and, thus, causes inter symbol
interference. For example, in telephone channels, filters are used throughout the system to
separate signals in different frequency ranges. These filters causes frequency and phase
distortion.
The purpose of adaptive equalizer is to compensate the signal for the channel distortion, so
that the resulting signal can be detected reliably. Let us assume that the equalizer is an FIR
filter with M adjustable coefficients, h(n). Its output may be expressed as,
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where D is some nominal delay in processing the signal through the filter and aˆ(n) represents
an estimate of the nth information symbol. Initially, the equalizer is trained by transmitting a
known data sequence d(n) . Then, the equalizer output, say d ˆ (n) , is compared with d(n)
and an error e(n) is generated that is used to optimize the filter coefficients.
Fig: 6.9 Channel Equalization using Training Sequence
If we again adopt the least squares error criterion, we select the coefficients h(k) to minimize
the quantity.
The result of the optimization is a set of linear equations of the form,
where, rxx(l) is the autocorrelation of the sequence x(n) and rdx(l) is the cross correlation
between the desired sequence d(n) and the received sequence x(n).
we observe that these equations result in values of the coefficient for the initial adjustments of
the equalizer. After the short training period, which usually last less than one second for most
of the channels, the transmitter begins to transmit the information sequence a(n). In order to
track the possible time variations in the channel, the equalizer coefficients must continue to
be adjusted in an adaptive manner while receiving data.
6.8 DSP ARCHITECTURE - INTRODUCTION:
A Digital signal processor is a semiconductor device which will accepts only digital inputs
and process the signal digitally to produce the digital output. A digital signal processor is also
Digital Signal Processing 436
a kind of microprocessor. Digital signal processor also executes instructions by accepting
digital input and processing on them to produce the digital output. Microprocessors and
digital signal processors will differ only with their built-in functionalities for the end
application. In most of the systems digital signal processors will hold the heart of the
operation of the system like modems and cellular devices.
Features of Digital Signal Processors:
1. Multiply-accumulate units
2. It possess on chip registers to store immediate results.
3. It has multiple pointers to support multiple operands, jumps and shifts.
4. It holds specialized execution control for efficient looping.
Types of Architecture:
There are three types of standard architectures for microprocessors. They are,
i. Von-Neumann architecture:
General purpose processors normally have these types of architectures. The architecture
share same memory for program and data. The processor performs instruction fetch, decode
and execute operations sequentially. In such architecture, speed can be increased by
pipelining. This types of architecture contains common interval address and data bus, ALU,
Accumulator, I/O devices and common memory for program and data. This type of
architecture is not suitable for DSP.
Fig: 6.10 Von-Neumann architecture
ii. Harvard architecture:
The term Harvard Architecture originally referred to computer architectures that used
separate data storage for their instructions and data. The term originated from the Harvard
Mark I relay based computer, which stored instructions on punched tape and data in relay
latches.
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The term Harvard Architecture is usually used now to refer to a particular computer
architecture design philosophy where separate data paths exist for the transfer of instructions
and data. All computers consist primary of two pats, the CPU which processes data, and the
memory which holds the data. The memory in turn has two aspects to it, the data itself, and
the location where it is found – known as the address. Both are important to the CPU as many
common instructions boil down to something like ―take the data in this address and add it to
the data in that address‖, without actually knowing what the data itself is. In recent years the
speed of the CPU has grown many times in comparison to the memory it talks to, so care
needs to be taken to reduce the numbers of times you access it in order to keep performance.
If for instance, every instruction run in the CPU requires an access to memory, the computer
gains nothing for increased CPU speed – a problem referred to as being memory bound.
Fig: 6.11 Harvard architecture
Memory can be made much faster, but only at high cost. The solution then is to
provide a small amount of very fast memory known as a cache. As long as the memory the
CPU needs is in the cache, the performance hit is very much less than it is if the cache then
has to turn around and get the data from the main memory. Tuning the cache is an important
aspect of computer design.
The Harvard architecture refers to one solution to this problem. Instructions and data
are stored in separate caches to improve performance. However, this has the disadvantage of
halving the amount of cache available to either one, so it works best only if the CPU reads
instructions and data at about the same frequency.
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The Harvard architecture requires two memory buses. This makes it expensive to
bring off the chip – for example a DSP using 32-bit words and with a 32 bit addresses space
requires at least 64 pins for each memory bus – a total of 128 pins if the Harvard architecture
is brought off the chip. This result is very large chips, which are difficult to design into a
circuit.
iii. Modified Harvard architecture:
The true Harvard Architecture dedicates on bus for fetching instructions, with the
other available to fetch operands. This is inadequate for DSP operations, which usually
involve at least two operands. So DSP Harvard architectures usually permit the ‗program‘ bus
to be used also for access of operands. Note that it is often necessary to fetch three things –
the instructions plus two operands – and the Harvard architecture is inadequate to support
this: so DSP Harvard architectures often also include a cache memory which can be used to
store instructions which will be reused, leaving both Harvard bused free for fetching
operands. This extension – Harvard architecture plus cache – is sometimes called as extended
Harvard architecture or Super Harvard Architecture (SHARC).
Fig: 6.12 Modified Harvard architecture
ARCHITECTURE OF TMS320C5X PROCESSOR:
All general DSP Processors Core is composed of the Data Path, Control Path and
Address Generation Unit (AGU). The Memory Subsystem is located out of the processor
core. These in turn are built up of various modules. A basic DSP processor supports RISC and
CISC instructions. The RISC uses the general registers for operands and writes them back to
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the Register File (RF). The CISC used the memory subsystem to compute vector elements
like in the case of convolution.
Fig: 6.13 Functional diagram for TMS320C50
Bus Structure
Separate program and data buses allow simultaneous access to program instructions
and data, providing a high degree of parallelism. For example, while data is
multiplied, a previous product can be loaded into, added to, or subtracted from the
accumulator and, at the same time, a new address can be generated. Such parallelism
supports a powerful set of arithmetic, logic, and bit-manipulation operations that can
all be performed in a single machine cycle. In addition, the ‘C5x includes the control
mechanisms to manage interrupts, repeated operations, and function calling.
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The ‘C5x architecture is built around four major buses:
i. Program bus (PB)
ii. Program address bus (PAB)
iii. Data read bus (DB)
i. Data read address bus (DAB)
The PAB provides addresses to program memory space for both reads and writes. The PB
also carries the instruction code and immediate operands from program memory space to the
CPU. The DB interconnects various elements of the CPU to data memory space.
The program and data buses can work together to transfer data from on-chip data
memory and internal or external program memory to the multiplier for single-cycle
multiply/accumulate operations.
Central Processing Unit (CPU)
The ‘C5x CPU consists of these elements:
- Central arithmetic logic unit (CALU)
- Parallel logic unit (PLU)
- Auxiliary register arithmetic unit (ARAU)
- Memory-mapped registers
- Program controller
It includes a 32-bit accumulator buffer, additional scaling capabilities, and a host of new
instructions. The instruction set exploits the additional hardware features and is flexible in a
wide range of applications. Data management has been improved through the use of new
block move instructions and memory-mapped register instructions
Central Arithmetic Logic Unit (CALU)
The CPU uses the CALU to perform 2s-complement arithmetic. The CALU consists of these
elements:
- 16-bit X 16-bit multiplier
- 32-bit arithmetic logic unit (ALU)
- 32-bit accumulator (ACC)
- 32-bit accumulator buffer (ACCB)
- Additional shifters at the outputs of both the accumulator and the product register
(PREG)
Parallel Logic Unit (PLU)
The CPU includes an independent PLU, which operates separately from, but in
parallel with, the ALU. The PLU performs Boolean operations or the bit
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manipulations required of high-speed controllers. The PLU can set, clear, test, or
toggle bits in a status register, control register, or any data memory location.
The PLU provides a direct logic operation path to data memory values without
affecting the contents of the ACC or PREG. Results of a PLU function are written
back to the original data memory location.
Auxiliary Register Arithmetic Unit (ARAU)
The CPU includes an unsigned 16-bit arithmetic logic unit that calculates indirect
addresses by using inputs from the auxiliary registers (ARs), index register (INDX), and
auxiliary register compare register (ARCR).
Memory-Mapped Registers
The ‘C5x has 96 registers mapped into page 0 of the data memory space. All‘C5x
DSPs have 28 CPU registers and 16 input/output (I/O) port registers but have different
numbers of peripheral and reserved registers. Since the memory-mapped registers are a
component of the data memory space, they can be written to and read from in the same way
as any other data memory location. The memory-mapped registers are used for indirect data
address pointers, temporary storage, CPU status and control, or integer arithmetic processing
through the ARAU.
Program Controller
The program controller contains logic circuitry that decodes the operational
instructions, manages the CPU pipeline, stores the status of CPU operations, and
decodes the conditional operations.
Parallelism of architecture lets the ‘C5x perform three concurrent memory operations
in any given machine cycle:
Fetch an instruction, read an operand, and write an operand.
Memory
The memories are usually classified as Read Only Memory (ROM) and Random
Access Memory (RAM). RAM can further be classified as static and dynamic. In
general DSP processors there is RAM implemented as Program Memory and Data
Memories.
In general, it is preferred to have synchronous memory modules. However, there
could be asynchronous memory modules which will need handshaking to control
the memory access and harder to implement. The memories are externally located
out of the processor core.
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The memories include the memory bus, physical memories and the address
generation circuit. Design of the memory subsystem includes the address
generation circuit design, memory bus and operand bus.
Program Memory (PM)
The PM in general is a single port synchronous static RAM. The application program
is loaded into the PM during start. The PC counter value determines the address from where
to fetch the instruction. The output of the PM is connected to the Instruction Decoder. Other
inputs to the PM will be the clock and reset.
Data Memory (DM)
The DM in general is a single port synchronous static RAM. There could be more
than one DM in the processor to support convolution instruction coefficients.
The address generators determine the address to where the data has to be written or
read from. The other inputs to the DM could be the operands from RF, clock and reset. The
output of the DM is connected to the MAC, RF and ALU. However the inputs and outputs are
determined by the instruction set under design.
Program Counter (PC)
The PC is a register that keeps the address of the next instruction to be fetched from
the Program Memory. The PC has a Finite State Machine (FSM) that points to the next
address to be loaded in to the PC register for instruction fetch.
Loop Controller (LC)
The Loop Controller (LC) has a register which loads the number of iterations to
perform. The LC keeps decrementing until it reaches a ‗0‘ and generated a loop flag which
will be used to check the iteration completion. The LC can support only one instruction
repeating n times. To perform m instructions n iterations we need to have an advanced LC to
support repeating m instructions n times.
Hardware Stack
A stack is used to support fast interrupts, register push/pop and call/return
instructions. When fast interrupts are used, there is a need to save the register and flag values
to service the interrupt. The stack is a normal stack with Last in First out (LIFO).
Conditional Execution Logic
The conditional execution logic checks if the condition satisfies so that the instruction
can be executed. The logic is just a small module which gets the flags of the processor and
condition as input. It checks for the condition based on the flags and then generates the
condition flag. The condition flag would be given to various modules depending on the
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pipeline and design. In most cases it is use as an enable to the register file, PC FSM for jump
taken and enable for flag register.
Instruction Decoder
The instruction decoder decodes the instruction fetched from Program Memory and
generates control signals to different parts of the core. Every instruction will drive a number
of control signals and every control signal could be driven by many instructions. Since the
control signals towards the bus drives every bit, then fan in and fan out of the control signals
are usually very high. This shows the importance of the instruction encoding which affects
the decoder directly. A general decoder is a logic that converts the instruction to control
signals.
On-chip peripherals
64K parallel I/O ports (16 I/O ports are memory mapped)
Sixteen software-programmable wait-state generators for program, data, and I/O
memory spaces
Interval timer with period, control, and counter registers for software stop, start,
and reset
Phase-locked loop (PLL) clock generator with internal oscillator or external clock
source
Multiple PLL clocking option (x1, x2, x3, x4, x5, x9, depending on the device)
Full-duplex synchronous serial port interface for direct communication between
the ‘C5x and another serial device
Time-division multiplexed (TDM) serial port (‘C50, ‘C51, ‘C53)
Buffered serial port (BSP) (‘LC56, ‘C57S, ‘LC57)
8-bit parallel host port interface (HPI) (‘C57, ‘C57S)
Central processing unit (CPU)
Central arithmetic logic unit (CALU) consisting of the following:
32-bit arithmetic logic unit (ALU), 32-bit accumulator (ACC), and 32-bit
accumulator buffer (ACCB)
16-bit × 16-bit parallel multiplier with a 32-bit product capability
to 16-bit left and right data barrel-shifters and a 64-bit incremental data shifter
16-bit parallel logic unit (PLU)
Dedicated auxiliary register arithmetic unit (ARAU) for indirect addressing
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Eight auxiliary registers
Program control
8-level hardware stack
4-deep pipelined operation for delayed branch, call, and return instructions
Eleven shadow registers for storing strategic CPU-controlled registers during an
interrupt service routine (ISR)
Extended hold operation for concurrent external direct memory access (DMA) of
external memory or on-chip RAM
Two indirectly addressed circular buffers for circular addressing
Index-addressing mode
Bit-reversed index-addressing mode for radix-2 fast Fourier transforms (FFTs)
MEMORY IN TMS320C50:
The memories are usually classified as
Read Only Memory (ROM)
Random Access Memory (RAM)
RAM can further be classified as static and dynamic. In general DSP processors there
is RAM implemented as Program Memory and Data Memories. In general, it is preferred to
have synchronous memory modules. However, there could be asynchronous memory
modules which will need handshaking to control the memory access and harder to implement.
The memories are externally located out of the processor core. The memories include the
memory bus, physical memories and the address generation circuit. Design of the memory
subsystem includes the address generation circuit design, memory bus and operand bus.
i. Program Memory (PM)
The PM in general is a single port synchronous static RAM. The application
program is loaded into the PM during start. The PC counter value determines
the address from where to fetch the instruction. The output of the PM is
connected to the Instruction Decoder. Other inputs to the PM will be the clock
and reset.
ii. Data Memory (DM)
The DM in general is a single port synchronous static RAM. There could be
more than one DM in the processor to support convolution instruction
coefficients. The address generators determine the address to where the data
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has to be written or read from. The other inputs to the DM could be the
operands from RF, clock and reset. The output of the DM is connected to the
MAC, RF and ALU. However the inputs and outputs are determined by the
instruction set under design.
ADDRESSING MODES OF TMS320C50 DSP:
Addressing refers to means to specify location of operands for instructions. Types
of addressing are called addressing modes. Operands may be input operands for the
operation as well as results of the operation.
The addressing modes in TMS32050 are
1. Immediate addressing
2. Indirect addressing
3. Register addressing
4. Memory mapped register addressing
5. Direct addressing
6. Circular addressing mode
1. Immediate addressing
Used to handle constant data
Allows the programmer to operate on an actual value
The data can be either a 16 –bit constant or constant length 7, 9, or 13.
Depending on the length of the data
o Long immediate addressing mode
o Short immediate addressing mode
At the assembly code level, the developer uses a ‗#‘ prefix to specify
immediate addressing
Example
LD #80h, A loads an immediate value 80h into the accumulator.
2. Indirect addressing
Uses the auxiliary registers (ARs) to hold the addresses of operands in
memory
Any 64K memory space can be accessed using a 16-bit address contained in
AR.
Each auxiliary register provide flexible and powerful indirect addressing.
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The auxiliary register pointer (ARP) is loaded with a value from 0 to 7 for
AR0 through AR7 respectively.
There are seven type of indirect addressing
i. Auto increment
ii. Auto decrement
iii. Post indexing by adding the contents of AR0
iv. Post indexing by subtracting the contents of AR0
v. Single indirect addressing with no increment
vi. Single indirect addressing with no decrement
vii. Bit reversed addressing
3. Register Addressing
Uses operands in CPU registers either explicitly
Direct reference to a specific register
Implicitly with instruction that intrinsically refers certain registers.
The address comes from one of two special purpose memory mapped registers
in CPU.
The Block Move Register and the dynamic bit manipulation register (DBMR).
Full 16-bit operand reference is simplified because 16-bit values can be used
without specifying a full 16-bit operand address or immediate value.
4. Memory mapped register addressing
Used to access efficiently the CPU and on-chip peripheral register
It operates like the direct addressing except that the upper 9-bits of the address that is
accessed are assumed to be 0s.
Allows addressing the memory mapped registers of data page 0 directly without the
overhead of changing the DP or auxiliary register.
The seven lower bits of the complete code, including operand and opcode can be
represented using a single 16-bit word.
Example
LAMM -load accumulate with memory mapped
LMMR - load memory mapped register
SAMM - Store Accumulate in Memory mapped register
SMMR - Store Memory mapped Register
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5. Direct addressing
Direct addressing allows the CPU to access operands by specifying an offset from
a base address that is defined in data pointer. DP is a 9-bit field contained in the status
registers. In this mode the address of the operand is obtained by concatenating the 7-bit
data memory address with the 9 bits of the data page pointer. The 16-bit data memory
address is placed on an internal direct data memory address bus. Since data pointer is a 9
bit field. It points to one of 512 possible data memory pages and the 7-bit address in the
instruction points to one of 128 words within that data memory page.
6. Circular addressing mode
Circular addressing is the most sophisticated ‗C5x addressing mode. Many
algorithms such as convolution, correlation and FIR Filtering can use circular buffers in
memory to implement a sliding window, which contains most recent data to be processed.
Five dedicated registers are allocated for implementation of circular addresses. They are
CBSR 1 – Circular Buffer 1 Start Register
CBSR 2 – Circular Buffer 2 Start Register
CBER 1 – Circular Buffer 1 End Register
CBER 2 – Circular Buffer 2 End Register
CBCR – Circular Buffer Control Register
ADDRESS GENERATION UNITS (AGU):
The AGU generated the address required for the DM. The general addressing circuit is
usually of either general address computing or special address computing. Special addressing
computing is like modulo or bit reversed addressing modes. The addressing circuit is the
logic used to implement the addressing modes and the number of addressing units will
depends on the design choice.
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Fig:6.14 Address generation units
The addressing modes specified in the assembly manual will for the basis for the logic
of the AGU. The Figure, shown below, gives a general address logic circuit at the top level.
The RF may contain some special logic outside the general register computations. However
in most DSP processors the AGU is designed as an individual module making the Memory
Path (MP) isolated from the core.
PIPELINING:
To improve the efficiency, advanced microprocessors and digital signal processors use
an approach called pipelining in which different phase of operation and execution of
instructions are carried out parallel.
In modern processors the first step execution is performed on the first instruction, and then
when the instruction passes to the next step, a new instruction is started. The steps in the
pipeline are often called stages.
The basic action of any microprocessor can be broken down into a series of four
simple steps. They are
1. The Fetch (F)
The next instruction is fetched from the address stored in the program counter.
2. The Decode (D)
Instruction in the instruction register is decoded and the address in the program
counter is incremented.
3. Memory Read (R)
Read the data from the data buses and also writes the data to the data buses.
4. The execute phase (X)
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Executes the instruction currently in the instruction register and also completes the
write process.
F1 D1 R1 X1
F2 D2 R2 X2
F3 D3 R3 X3
F4 D4 R4 X4
INSTRUCTIONSETS OF TMS320C50:
The TMS320C5x instruction wires numerically the intensive signal processing
applications and general-purpose applications such as multi-processing and speed control.
The instruction sets can be classified into following types: Arithmetic operations
1. Arithmetic Instructions
2. Logical Instructions
3. Rotate/Shift Instructions
4. Load/Store Instructions
5. Move Instructions
6. Conditional Instructions
7. Push, Pop Instructions
8. Repeat Instructions
The word size of TMS320C5x instructions is either one or two words. When all the
instructions are available in memory, most of the instructions will be executed in one
or two clock cycles. Some data transfer instructions may take 3 to 4 clock cycles.
1. Arithmetic Instructions:
i. Add instructions
ii. Subtract instructions
iii. Multiply instructions
iv. Multiply-accumulate instructions
v. Multiply-subtract instructions
vi. Double (32-bit operand) instructions
vii. Application-specific instructions
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Ex:
ABDST Absolute distance
ABS Absolute value of accumulator
ADD Add to accumulator
ADDC Add to accumulator with carry
ADDM Add long-immediate value to memory
ADDS Add to accumulator with sign-extension
2. Logical Instructions:
Functional groups:
AND instructions
OR instructions
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XOR instructions
Shift instructions
Test instructions
3.Rotate/Shift Instructions:
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4.Load and Store Instructions:
5. Move Instructions:
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6. Conditional Instructions:
7.Push, Pop Instructions:
8. Repeat Instructions:
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Repeating a Single Instruction:
The TMS320C54xE DSP includes repeat instructions that cause the next instruction to
be repeated. The number of times for the instruction to be repeated is obtained from an operand
of the instruction and is equal to this operand + 1. This value is stored in the 16-bit repeat
counter (RC) register. You cannot program the value in the RC register; it is loaded by the
repeat instructions only. The maximum number of executions of a given instruction is 65
536.An absolute program or data address is automatically incremented when the single-repeat
feature is used.
Once a repeat instruction is decoded, all interrupts, including NMI but not RS,are
disabled until the completion of the repeat loop. However, the C54xE DSPdoes respond to the
HOLD signal while executing a repeat loop—the response depends on the value of the HM bit
of status register 1 (ST1).The repeat function can be used with some instructions, such as
multiply/accumulate and block moves, to increase the execution speed of these instructions.
These multicycle instructions effectively become ingle-cycle instructions after the first
iteration of a repeat instruction.
FUNCTIONS OF BUS STRUCTURE:
Separate program and data buses allow simultaneous access to program instructions
and data, providing a high degree of parallelism. For example, while data is multiplied, a
previous product can be loaded into, added to, or subtracted from the accumulator and, at the
same time, a new address can be generated. Such parallelism supports a powerful set of
arithmetic, logic, and bit-manipulation operations that can all be performed in a single machine
cycle. In addition, the ‘C5x includes the control mechanisms to manage interrupts, repeated
operations, and function calling.
The ‘C5x architecture is built around four major buses:
Program bus (PB)
Program address bus (PAB)
Data read bus (DB)
Data read address bus (DAB)
The PAB provides addresses to program memory space for both reads and writes. The
PB also carries the instruction code and immediate operands from program memory space to the
CPU. The DB interconnects various elements of the CPU to data memory space. The program
Digital Signal Processing 455
and data buses can work together to transfer data from on-chip data memory and internal or
external program memory to the multiplier for single-cycle multiply/accumulate operations.
CENTRAL PROCESSING UNIT (CPU):
The ‘C5x CPU consists of these elements:
Central arithmetic logic unit (CALU)
Parallel logic unit (PLU)
Auxiliary register arithmetic unit (ARAU)
Memory-mapped registers
Program controller
The ‘C5x CPU maintains source-code compatibility with the ‘C1x and ‘C2x
generations while achieving high performance and greater versatility. Improvements include
a 32-bit accumulator buffer, additional scaling capabilities, and a host of new instructions.
The instruction set exploits the additional hardware features and is flexible in a wide range of
applications. Data management has been improved through the use of new block move
instructions and memory-mapped register instructions.
1 .Central Arithmetic Logic Unit (CALU)
The CPU uses the CALU to perform 2s-complement arithmetic. The CALU consists of these
elements:
16-bit 16-bit multiplier
32-bit arithmetic logic unit (ALU)
32-bit accumulator (ACC)
32-bit accumulator buffer (ACCB)
Additional shifters at the outputs of both the accumulator and the product
register (PREG).
2. Parallel Logic Unit (PLU)
The CPU includes an independent PLU, which operates separately from, but in
parallel with, the ALU. The PLU performs Boolean operations or the bit manipulations
required of high-speed controllers. The PLU can set, clear, test, or toggle bits in a status
register, control register, or any data memory location. The PLU provides a direct logic
operation path to data memory values without affecting the contents of the ACC or PREG.
Results of a PLU function are written back to the original data memory location.
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3. Auxiliary Register Arithmetic Unit (ARAU)
The CPU includes an unsigned 16-bit arithmetic logic unit that calculates indirect
addresses by using inputs from the auxiliary registers (ARs), index register (INDX), and
auxiliary register compare register (ARCR). The ARAU can auto index the current AR while
the data memory location is being addressed and can index either by 1 or by the contents of
the INDX. As a result, accessing data does not require the CALU for address manipulation;
therefore, the CALU is free for other operations in parallel.
4. Memory-Mapped Registers
The ‘C5x has 96 registers mapped into page 0 of the data memory space. All‘C5x
DSPs have 28 CPU registers and 16 input/output (I/O) port registers but have different
numbers of peripheral and reserved registers. Since the memory-mapped registers are a
component of the data memory space, they can be written to and read from in the same way
as any other data memory location. The memory-mapped registers are used for indirect data
address pointers, temporary storage, CPU status and control, or integer arithmetic processing
through the ARAU.
5 .Program Controller
The program controller contains logic circuitry that decodes the operational
instructions, manages the CPU pipeline, stores the status of CPU operations, and decodes the
conditional operations. Parallelism of architecture lets the‘C5x perform three concurrent
memory operations in any given machine cycle:fetch an instruction, read an operand, and
write an operand. Program Control, and Pipeline. The program controller consists of
these elements:
Program counter
Status and control registers
Hardware stack
Address generation logic
Instruction register
On-Chip Memory
FUNCTIONS OF ON-CHIP PERIPHERALS IN PROCESSOR:
All ‘C5x DSPs have the same CPU structure; however, they have different onchip
peripherals connected to their CPUs. The ‘C5x DSP on-chip peripherals available are:
Clock generator
Hardware timer
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Software-programmable wait-state generators
Parallel I/O ports
Host port interface (HPI)
Serial port
Buffered serial port (BSP)
Time-division multiplexed (TDM) serial port
User-maskable interrupts
1. Clock Generator
The clock generator consists of an internal oscillator and a phase-locked loop(PLL)
circuit. The clock generator can be driven internally by a crystal resonator circuit or driven
externally by a clock source. The PLL circuit can generate an internal CPU clock by
multiplying the clock source by a specific factor, so you can use a clock source with a lower
frequency than that of the CPU.
2 .Hardware Timer
A 16-bit hardware timer with a 4-bit prescaler is available. This programmable timer
clocks at a rate that is between 1/2 and 1/32 of the machine cycle rate(CLKOUT1),
depending upon the timer‘s divide-down ratio. The timer can be stopped, restarted, reset, or
disabled by specific status bits.
3 .Software-Programmable Wait-State Generators
Software-programmable wait-state logic is incorporated in ‘C5x DSPs allowing wait-
state generation without any external hardware for interfacing with slower off-chip memory
and I/O devices. This feature consists of multiple wait state generating circuits. Each circuit is
user-programmable to operate indifferent wait states for off-chip memory accesses.
OPERATION OF THE MAC UNIT :
The operation of the MAC unit is controlled by the DSP-CSR register and the
instructions stored in I-RAM. The MAC unit starts program execution when ‗1‘ is written to
the GoDSP bit, and stops when a HLT command is executed (NOP with HLT=‘1‘). Note that
some of the registers and memory areas of the MAC unit can only be accessed by the CPU
while the MAC unit is stopped (RunDSP = 0).
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MAC Execution
• Stopped: The multiply-and-accumulate macro is stopped. The CPU can access
instruction RAM (IRAM), data RAM (X-RAM, Y-RAM), and all registers of the
MAC unit.
• Running: The multiply-and-accumulate unit is operating. When ‗1‘ is written to the
GoDSP bit while the MAC unit is stopped, it enters this state and starts program
execution from the current DSP-PC (program counter) address. While in this state, not
all registers and memory areas of the MAC unit can be accessed. Trying to read from
a non-accessible area will return indeterminate results, while writing to it has no
effect. A NOP command with set HLT = ‗1‘ and REP = ‗001‘ causes the MAC unit to
halt and return to the ‗stopped‘ state.
The general initialization of the MAC unit consists of the following steps:
1. Check that the MAC unit is halted (DSP_CSR:RunDSP = 0)
2. Transfer coefficients and data to X- and Y-RAM according to application
3. Transfer MAC unit instructions to I-RAM
4. Set the DSP-PC to the first instruction to be executed
5. Start the MAC unit (write ‗1‘ to the GoDSP bit)
The MAC unit starts calculation and continues program execution until one of the following
conditions occurs:
- A NOP command with HLT = ‗1‘ and REP = ‗001‘ is executed
- A reset occurs
Note that the 72-bit accumulator of the MAC unit is not initialized automatically.
Therefore, the first MAC command of the program should clear the accumulator (CLAC = 1),
except when this behavior is explicitly desired.
Since the MAC unit operates independently of the rest of the MCU, the CPU can
process other tasks during calculation. Before accessing the MAC result, either bit0
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(RunDSP) of the DSP-CSR register can be polled to check for MAC program end, or the
MAC interrupt can be used. Both methods have their advantages; the polling loop will have
less latency between the MAC calculation end and the usage of the result, while the ISR
might be better suited if other tasks have to be scheduled. It also is often possible to give the
CPU another task which has at least the same execution time as the MAC program (e.g.
UART communication), and when the CPU completes this task, the MAC unit also has
already completed calculation and the result can be used immediately.
ASSEMBLY LANGUAGE PROGRAMMING:
The TMS320C5X will execute only machine language codes, a compiler or debugger
is required to convert the assembly language codes(.asm) in to machine language
codes(.asc).
The assembly language program statements consist of labels, assembler directives,
operands and comments. The assembler directives play an important role while the
program is being assembled. These assembler directives will give the instructions to
specify the start and end of any program, to attach the value to variables, allocate the
memory location for input and output data, etc.
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1. Write an assembly language program to add two 8 bit numbers in TMS320C5X.
2. Write an assembly language program to 2’s Complement of a given number in
TMS320C5X.
6.9 FIXED POINT ARCHITECTURE:
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Fig:6.15 Fixed point architecture
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Features:
6.10 FLOATING POINT ARCHITECTRURE:
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Fig:6.16 Floating point architecture
Features:
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6.11 MULTIRATE SIGNAL PROCESSING FOR BIOMEDICAL SIGNAL ANALYSIS:
Multirate signal processing is a powerful technique used in biomedical signal analysis
to enhance the efficiency and effectiveness of signal processing algorithms. It involves
manipulating the sampling rate or the number of samples in a signal to achieve specific goals.
Here are a few applications of multirate signal processing in biomedical signal analysis:
1. Signal Compression:
Biomedical signals often have high sampling rates, resulting in a large amount of data
that needs to be stored or transmitted. Multirate signal processing techniques, such as
decimation and interpolation, can be employed to reduce the data size while preserving the
essential information. Decimation reduces the sampling rate by selectively discarding
samples, while interpolation increases the sampling rate by inserting additional samples.
2. Filter Bank Analysis:
Biomedical signals often contain frequency components of interest in different
frequency bands. Filter bank analysis using multirate techniques allows for simultaneous
analysis of multiple frequency bands. The signal is divided into subbands using filters with
different cutoff frequencies, and each subband is processed separately. This approach is
commonly used in applications such as electrocardiography (ECG), electroencephalography
(EEG), and speech analysis.
3. Feature Extraction:
Multirate signal processing can be used to extract specific features from biomedical
signals efficiently. For example, by applying a low-pass filter and decimation, high-frequency
noise can be removed, and the signal can be downsampled to reduce computational
requirements while preserving the relevant features. This approach is often used in ECG
analysis for QRS complex detection or heart rate variability (HRV) calculations.
4. Wavelet Transform:
Wavelet transform, a powerful tool for analyzing non-stationary signals, is frequently
employed in biomedical signal analysis. Multirate techniques, such as dyadic or Mallat's
algorithm, are utilized to efficiently implement the discrete wavelet transform (DWT). The
DWT provides a time-frequency representation of the signal, allowing for detection of
transient events or changes in signal characteristics over time.
5. Resampling:
Biomedical signals may need to be synchronized or aligned with other signals acquired at
different sampling rates. Multirate signal processing techniques enable resampling of signals
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to match the desired sampling rate or align signals for further analysis or comparison. This is
often necessary in applications such as sleep analysis, polysomnography, and event-related
potentials (ERP) analysis.
Multirate signal processing offers numerous benefits in biomedical signal analysis,
including efficient data storage, reduced computational complexity, improved feature
extraction, and alignment of signals. These techniques enable more effective analysis and
interpretation of biomedical signals, leading to enhanced diagnostic capabilities, improved
understanding of physiological processes, and better monitoring of patients' health.
DECIMATION IN MEDICAL DATA ANALYSIS
Decimation is a multirate signal processing technique commonly used in medical data
analysis to reduce the sampling rate of a signal while preserving its essential information. It
involves selectively discarding samples from the original signal to obtain a lower sampling
rate version. Decimation can be beneficial in medical data analysis for various reasons:
1. Data Reduction: Medical data, such as physiological signals, often have high sampling
rates, resulting in a large amount of data that needs to be stored or processed. Decimation
allows for reducing the data size while retaining the important features of the signal. By
discarding samples, the resulting decimated signal requires less storage space and
computational resources.
2. Bandwidth Reduction: In some cases, the frequency content of a medical signal may
extend beyond the information of interest or the processing capabilities. Decimation can help
reduce the bandwidth of the signal by removing high-frequency components that are not
relevant for the analysis. This process is often performed in conjunction with low-pass
filtering to avoid aliasing.
3. Computational Efficiency: Decimation can significantly reduce the computational burden
in medical data analysis. By reducing the sampling rate, subsequent processing steps, such as
filtering or feature extraction, can be performed more efficiently. This is especially useful
when working with real-time applications or resource-constrained systems.
4. Interoperability: Decimation can facilitate interoperability between different devices or
systems with varying sampling rates. When integrating data from different sources or sensors,
decimating the signals to a common sampling rate allows for seamless analysis and
comparison.
When performing decimation, it is essential to consider the impact on the signal of interest.
Care should be taken to avoid loss of critical information or introduction of artifacts. Proper
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low-pass filtering before decimation is typically applied to prevent aliasing, ensuring that the
signal components within the new bandwidth are preserved accurately.
Decimation is commonly used in medical data analysis for various physiological
signals, including electrocardiography (ECG), electroencephalography (EEG), and blood
pressure monitoring, among others. It helps manage large datasets, improve computational
efficiency, and enable compatibility between different systems or devices, contributing to
efficient and effective medical data analysis.
INTERPOLATION IN MEDICAL DATA ANALYSIS
Interpolation is a multirate signal processing technique commonly used in medical
data analysis to increase the sampling rate of a signal or to estimate the values of a signal at
intermediate time points. It involves estimating the values between existing samples based on
the available information. Interpolation plays a significant role in medical data analysis for
various purposes:
1. Increasing Sampling Rate: In certain applications, it may be necessary to increase the
sampling rate of a signal to capture finer details or to align it with other signals acquired at a
higher sampling rate. Interpolation allows for estimating the values between the existing
samples to obtain a higher sampling rate version of the signal. This can be particularly useful
in applications such as high-resolution electrocardiography (ECG) or electroencephalography
(EEG) analysis.
2. Signal Reconstruction: Interpolation can be employed for signal reconstruction when
missing or corrupted samples are present. In medical data analysis, signals may occasionally
contain missing data due to various factors such as sensor failures or signal artifacts.
Interpolation techniques can be applied to estimate the missing values, allowing for a more
complete analysis of the signal.
3. Time Alignment: In multi-channel or multi-sensor data analysis, signals may have
different sampling rates or irregular time intervals. Interpolation can be used to align the
signals in time by estimating values at common time points. This enables meaningful
comparisons and synchronization of signals for further analysis, such as in event-related
potentials (ERP) analysis or fusion of different physiological signals.
4. Artifact Removal: In some cases, medical signals may contain artifacts or noise that affect
certain samples or time segments. Interpolation techniques can be used to replace or smooth
out these affected samples, reducing the impact of artifacts on subsequent processing steps.
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This is commonly done in applications like motion artifact removal in photoplethysmography
(PPG) signals.
When performing interpolation, it is important to consider the characteristics of the
signal and the specific requirements of the analysis. Care should be taken to minimize the
introduction of artifacts or distortions during the interpolation process. Various interpolation
methods can be used, such as linear interpolation, spline interpolation, or wavelet-based
interpolation, depending on the nature of the signal and the desired accuracy.
Interpolation is a versatile tool in medical data analysis that allows for increased
sampling rates, signal reconstruction, time alignment, and artifact removal. It enables more
comprehensive analysis, improves data compatibility, and enhances the accuracy of
subsequent processing steps.
SAMPLING RATE CONVERSION BY A RATIONAL FACTOR FOR MEDICAL
DATA ANALYSIS
Sampling rate conversion by a rational factor is a common requirement in medical
data analysis when there is a need to convert a signal from one sampling rate to another,
where the conversion factor is a rational number (i.e., a ratio of two integers). This process
allows for resampling the signal to a desired sampling rate while preserving its essential
information. Here's an overview of the steps involved in sampling rate conversion by a
rational factor for medical data analysis:
1. Determine the Conversion Factor:
Specify the desired conversion factor, which represents the ratio of the output
sampling rate to the input sampling rate. For example, if the input signal is sampled at 100 Hz
and the desired output sampling rate is 200 Hz, the conversion factor would be 2/1.
2. Decompose the Conversion Factor:
Decompose the conversion factor into its integer and fractional parts. For example, in
the ratio 2/1, the integer part is 2, and the fractional part is 0. The integer part represents the
number of output samples for each input sample, while the fractional part determines any
additional fractional samples needed.
3. Anti-Alias Filtering:
Apply an anti-alias filter to the input signal to remove frequency components above
the Nyquist frequency of the desired output sampling rate. This step is crucial to prevent
aliasing artifacts during the resampling process. The anti-alias filter should have a cutoff
frequency below half of the desired output sampling rate.
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4. Upsampling:
Increase the sampling rate of the filtered signal by inserting zeros between the original
samples. The number of inserted zeros is determined by the integer part of the conversion
factor. For example, if the conversion factor is 2/1, one zero sample is inserted between each
input sample.
5. Interpolation:
Apply an interpolation filter to estimate the values of the inserted zeros. Various
interpolation methods can be used, such as linear interpolation, cubic spline interpolation, or
FIR filters. The interpolation filter calculates the intermediate values based on the
neighboring samples.
6. Downsampling:
Reduce the sampling rate of the interpolated signal by discarding samples. The
number of samples to be discarded is determined by the fractional part of the conversion
factor. For example, if the conversion factor is 2/1, one out of every two interpolated samples
would be retained.
7. Post-Filtering:
Apply a low-pass filter to remove any high-frequency noise or artifacts introduced
during the downsampling process. The low-pass filter should have a cutoff frequency below
half of the desired output sampling rate to avoid aliasing.
By following these steps, the signal can be effectively resampled to the desired output
sampling rate using a rational conversion factor. This process ensures that the resampled
signal retains the essential information while minimizing distortion or aliasing artifacts. It is
important to choose appropriate filter characteristics and consider the specific requirements
and limitations of the medical data analysis application.
DECOMPOSITION OF BIOMEDICAL SIGNAL
The decomposition of biomedical signals involves separating the signal into its
constituent components or subcomponents, often with the aim of analyzing and
understanding specific aspects of the signal. Here are a few commonly used techniques for
decomposing biomedical signals:
1. Fourier Transform:
The Fourier Transform is a widely used technique for signal decomposition that
converts a time-domain signal into its frequency-domain representation. By applying the
Fourier Transform, the signal can be decomposed into its frequency components, revealing
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the amplitude and phase information at different frequencies. This decomposition is useful for
analyzing periodic or stationary components in the signal.
2. Wavelet Transform:
The Wavelet Transform is a versatile technique for decomposing signals into different
time-frequency representations. Unlike the Fourier Transform, the Wavelet Transform
provides a localized representation of frequency content, allowing for the identification of
transient or non-stationary components in biomedical signals. It decomposes the signal into
wavelet coefficients at multiple scales, providing information about both time and frequency
characteristics.
3. Empirical Mode Decomposition (EMD):
EMD is a data-driven technique used for adaptive signal decomposition. It
decomposes a signal into a set of Intrinsic Mode Functions (IMFs), which are time-varying,
oscillatory components with well-defined instantaneous frequencies. The IMFs represent the
different scales or modes present in the signal and can reveal both deterministic and
stochastic components. EMD is particularly useful for analyzing non-stationary or nonlinear
biomedical signals.
4. Independent Component Analysis (ICA):
ICA is a powerful technique for decomposing mixed signals into their statistically
independent source components. It assumes that the observed signal is a linear combination
of several source signals, each having different statistical properties. ICA aims to estimate the
source signals by maximizing their statistical independence. In biomedical signal analysis,
ICA can help separate overlapping or interfering sources, such as separating muscle artifacts
from EEG signals or removing noise sources.
5. Principal Component Analysis (PCA):
PCA is a technique that decomposes a signal into its principal components, which are
orthogonal linear combinations of the original variables. It identifies the directions in which
the signal exhibits the most significant variation. PCA can be used for dimensionality
reduction, noise reduction, and feature extraction from biomedical signals.
These techniques provide various perspectives for decomposing biomedical signals
and analyzing their components. The choice of decomposition technique depends on the
characteristics of the signal and the specific analysis goals. It is often beneficial to combine
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multiple decomposition methods or tailor the decomposition approach to the unique
properties of the biomedical signal under study.
ADAPTIVE FILTERS FOR NOISE REMOVAL IN ECG
Adaptive filters are commonly used for noise removal in electrocardiogram (ECG)
signals. ECG signals are susceptible to various types of noise, including baseline wander,
power line interference, muscle artifacts, and electrode motion artifacts. These noise sources
can degrade the quality of the ECG signal and make accurate interpretation and analysis
challenging. Adaptive filters offer a way to mitigate these noise sources and enhance the
diagnostic value of ECG recordings.
Adaptive filters work by dynamically adjusting their filter coefficients based on the input
signal characteristics. They can adapt to changes in the ECG signal and the noise
characteristics in real-time, making them well-suited for noise cancellation tasks. Here are a
few commonly used adaptive filter techniques for ECG noise removal:
1. Adaptive Noise Cancellation (ANC): ANC is a popular technique used to remove noise
from ECG signals. It involves using a reference signal that contains only the noise to estimate
the noise component in the corrupted ECG signal. The estimated noise is then subtracted
from the corrupted ECG signal to obtain the denoised signal. ANC algorithms such as Least
Mean Square (LMS) and Recursive Least Square (RLS) are commonly employed.
2. Adaptive Filtering with Recursive Least Squares (RLS): RLS algorithm is often used in
ECG noise removal. It estimates the filter coefficients based on the input signal and the
desired output signal (clean ECG). It recursively updates the filter coefficients to minimize
the error between the input and the desired output. RLS algorithms can effectively track and
adapt to changes in the ECG signal and the noise characteristics.
3. Wavelet-based Adaptive Filtering: Wavelet transform can provide a time-frequency
representation of the ECG signal, allowing the identification and separation of noise
components in different frequency bands. By adaptively filtering the noise components in
each frequency band, the ECG signal can be effectively denoised. Techniques like wavelet
thresholding and wavelet shrinkage are commonly used for adaptive filtering based on
wavelet transforms.
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4. Kalman Filtering: Kalman filtering is a recursive filter commonly used for dynamic
systems. It can estimate the true ECG signal by recursively updating the state estimate based
on the measurement (corrupted ECG signal) and the system dynamics. Kalman filters can be
effective in removing noise and estimating the underlying ECG signal.
It's important to note that the choice of adaptive filter technique depends on the specific noise
characteristics and the requirements of the ECG signal analysis. Different techniques may
have varying levels of complexity, computational requirements, and performance trade-offs.
Therefore, it's advisable to evaluate and compare the performance of different adaptive
filtering approaches in the specific context of ECG noise removal.
FIR & IIR FILTER DESIGN FOR BIOLOGICAL SMOOTING AND FILTERING
FIR (Finite Impulse Response) and IIR (Infinite Impulse Response) filters are
commonly used for biosignal smoothing and filtering. Let's explore the design considerations
for both types of filters in the context of biosignal processing.
FIR Filter Design:
FIR filters have a finite impulse response, meaning their output only depends on a
finite number of input samples. They are popular for biosignal processing due to their
desirable characteristics, including linear phase response and stability. Here's an overview of
the FIR filter design process for biosignal smoothing:
1. Determine Filter Specifications:
Specify the desired characteristics of the FIR filter, including the cutoff frequency,
filter order, and filter type (low-pass, high-pass, bandpass, etc.). The cutoff frequency
determines the frequency below which you want to preserve the signal components, while
attenuating frequencies above it.
2. Choose Windowing Function:
Select an appropriate windowing function to shape the frequency response of the
filter. Common window functions include Hamming, Hanning, Blackman, and Kaiser. The
choice of the windowing function affects the trade-off between frequency response
characteristics (such as main lobe width and side lobe attenuation) and the resulting filter
length.
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3. Determine Filter Length:
The length of the FIR filter (number of filter taps) is determined by the desired
frequency resolution and filter characteristics. Higher filter lengths can provide sharper
frequency response but come at the cost of increased computational complexity.
4. Design the Filter:
Utilize filter design software or algorithms (e.g., Parks-McClellan, Windowing
method) to design the FIR filter based on the specified parameters. The design process
optimizes the filter coefficients to achieve the desired frequency response while meeting the
design constraints.
IIR Filter Design:
IIR filters have an infinite impulse response, and their output depends on past and present
input samples. They can offer steeper roll-off and higher selectivity compared to FIR filters
but can be more sensitive to quantization effects and stability issues. Here's an overview of
the IIR filter design process for biosignal smoothing:
1. Determine Filter Specifications:
Specify the desired characteristics of the IIR filter, such as cutoff frequency, filter order, and
filter type. Similar to FIR filters, the cutoff frequency defines the frequency range of interest
for signal preservation.
2. Choose IIR Filter Design Method:
Select an appropriate IIR filter design method, such as Butterworth, Chebyshev (Type I or II),
elliptic, or Bessel. Each method has its trade-offs in terms of frequency response, phase
response, and stopband attenuation.
3. Determine Filter Order and Parameters:
Based on the desired specifications, choose the filter order and other parameters specific to
the chosen design method. Higher filter orders result in greater selectivity but increased
computational complexity and potential stability issues.
4. Design the Filter:
Use filter design tools or software (e.g., MATLAB's `butter`, `cheby1`, `ellip` functions) to
design the IIR filter based on the specified parameters. These tools implement the chosen
design method and generate the filter coefficients for implementation.
It's crucial to note that the selection of the appropriate filter type (FIR or IIR) depends
on the specific requirements of the biosignal processing application. Considerations include
the desired frequency response, phase characteristics, computational complexity, and stability
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constraints. Prototyping and evaluating different filter designs with representative biosignal
data can help determine the most suitable approach for a particular application.
EXTRACTION OF ECG SIGNAL FEATURES
The extraction of ECG (Electrocardiogram) features involves identifying and
quantifying various characteristics and measurements from the ECG signal. These features
provide valuable information about the heart's electrical activity and aid in diagnosing and
monitoring cardiac conditions. Here are some commonly extracted ECG features:
1. R-Peak Detection:
The R-peaks represent the highest amplitude points corresponding to the
depolarization of the ventricles. Detecting the R-peaks is crucial as it serves as a reference
point for many other ECG feature calculations. Various methods can be used for R-peak
detection, such as threshold-based methods, wavelet transforms, and template matching.
2. RR Intervals:
RR intervals represent the time between successive R-peaks and provide information
about heart rate variability (HRV). HRV analysis is useful for assessing autonomic nervous
system function and cardiovascular health. The RR intervals can be used to calculate heart
rate, heart rate variability measures (e.g., standard deviation of RR intervals), and perform
frequency domain or time-domain analysis.
3. P-Q Interval and QRS Duration:
The P-Q interval represents the time between the onset of the P-wave (atrial
depolarization) and the onset of the QRS complex (ventricular depolarization). It indicates
the conduction time from the atria to the ventricles. The QRS duration measures the width of
the QRS complex and provides information about ventricular depolarization. Abnormalities
in these intervals can indicate conduction abnormalities or other cardiac conditions.
4. ST Segment Analysis:
The ST segment represents the period between the QRS complex and the T-wave and
provides information about ventricular repolarization. Deviations in the ST segment can
indicate myocardial ischemia or infarction. ST segment analysis involves measuring the ST
segment deviation from the isoelectric line, which serves as a reference point.
5. T-Wave Analysis:
The T-wave represents ventricular repolarization and can provide insights into cardiac
abnormalities such as ischemia, electrolyte imbalances, and drug-induced effects. T-wave
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analysis involves measuring T-wave amplitude, duration, and morphology, looking for
abnormalities such as T-wave inversion or flattening.
6. QT Interval:
The QT interval represents the time from the start of the QRS complex to the end of
the T-wave and represents the total duration of ventricular depolarization and repolarization.
Prolonged or shortened QT intervals can indicate an increased risk of cardiac arrhythmias or
conditions like Long QT Syndrome.
These are just a few examples of ECG features that can be extracted from the ECG
signal. There are many more advanced features and measurements that can be derived
depending on the specific clinical or research requirements. Automated algorithms and
software tools are available to aid in the extraction and analysis of ECG features, enabling
efficient and accurate interpretation of the ECG signal for diagnostic purposes.
EXTRACTION OF NEUROSIGNAL FEATURES
The extraction of features from neuro signals involves identifying and quantifying
various characteristics and measurements from signals such as EEG (Electroencephalogram),
EMG (Electromyogram), and EOG (Electrooculogram). These features provide valuable
insights into brain activity, muscle activity, and eye movements, respectively. Here are some
commonly extracted features from neuro signals:
1. EEG Features:
Power Spectral Density: EEG signals can be analyzed in the frequency domain to
assess the power distribution across different frequency bands, such as delta (0.5-4
Hz), theta (4-8 Hz), alpha (8-13 Hz), beta (13-30 Hz), and gamma (>30 Hz).
Spectral Entropy: Measures the complexity or irregularity of EEG signals in the
frequency domain.
Event-Related Potentials (ERPs): Represents specific brain responses related to
stimuli or events, such as P300 or N400 components.
Interhemispheric Coherence: Measures the synchronization between different brain
regions or hemispheres.
Burst Suppression Ratio: Quantifies the presence of burst suppression patterns,
often observed in deep anesthesia or coma.
2. EMG Features:
Root Mean Square (RMS): Represents the magnitude of muscle activity.
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Median Frequency: Measures the central frequency of the power spectrum of the
EMG signal.
Integrated EMG: Calculates the area under the EMG curve over a specific time
window, providing a measure of muscle activation.
3. EOG Features:
Blink Detection: Identifies eye blink events based on rapid changes in EOG signals.
Saccade Detection: Detects rapid eye movements associated with visual scanning.
Fixation Duration: Measures the duration of stable eye positions during visual
fixation.
It's important to note that the extraction of neuro signal features can vary depending on
the specific research or clinical context. Advanced signal processing techniques, such as time-
frequency analysis, wavelet analysis, or machine learning algorithms, are often employed to
extract more complex features from neuro signals. These features are then used for various
applications, including brain-computer interfaces, sleep analysis, epilepsy diagnosis, and
cognitive state monitoring.
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Question Bank
PART A Questions and Answers (2 MARKS)
1. What is multirate signal processing? (Nov/Dec-2013)
2. Define down sampling. (Nov/Dec-2011)
3. What is meant by up sampling? (Nov/Dec-2010)
4. What is the need for anti-aliasing filter prior to down sampling?
5. What is the need for anti-imaging filter after up sampling a signal? (Apr/May-2019)
6. What is a multirate DSP system? (Nov/Dec-2013)
7. What are the various basic methods of sampling rate conversion in digital domain?
8. Write any four applications of multi-rate signal processing.(Nov/Dec-2013)(Apr/May-
2019)
9. What is interpolation? (Apr/May-2010)
10. What is decimation? (May/June-2009)
11. Write some advantages of multirate processing.
12. What is an anti-imaging filter? (Nov/Dec-2013)
13. What is polyphase decomposition?
14. Define Sampling rate conversion.
15. What are the different techniques of voice compression and coding?
16. Define Adaptive filter.
17. What are the applications of adaptive filters in DSP? (Apr/May-2011)
18. What is adaptive filter in biomedical signal processing?
19. What is the classification of digital signal processors?
20. List the features of the DSP Processor. (Nov/Dec-2010)
21. What are the basic types of processors?
Digital Signal Processing 477
22. What is pipelining? (Apr/May-2010)
23. What are the different stages in pipelining? (Nov/Dec-2021)
24. What are the components of CPU?
25. What are the components of CALU? (Apr/May-2010)
26. What are the important elements of program controller?
27. List the various registers used with ARAU. (Nov/Dec-2010)
28. Give some examples for fixed point DSPs.
29. Give some examples for floating point DSPs.
30. What is the function of parallel logic unit?
31. What are the applications of PDSPs? (Apr/May-2011)
PART B (16 MARK QUESTIONS)
1. Explain the concept of decimation by a factor D and interpolation by factor I. with
help of equation explains sampling rate conversion by a rational factor I/D.
(Nov/Dec-2011)
2. Explain in detail about down sampling. (Apr/May-2011)
3. consider the discrete time signal, x(n)={2,4,6,8,10,12,14,16} Determine the down
sampled version of the signals for the sampling rate reduction factor, D=2,D=3,D=4.
4. Explain in detail about up sampling with spectral equations.
(Nov/Dec-2010) (Apr/May-2019)
5. Derive the spectrum of the down sampled signal. Explain aliasing effect and how it
can be avoided? (Nov/Dec-2013)
6. Discuss the design steps involved in the implementation of multistage sampling rate
converter. (Nov/Dec-2010)
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7. Explain the operation of adaptive filter with suitable diagrams and equations.
(Nov/Dec-2013)
8. Discuss in detail about any two applications of adaptive filtering with necessary
diagrams.
9. Explain DSP processor TMS320C5O building Blocks in detail with neat diagram.
(Apr/May-2011)
10. Explain in detail about fixed point architecture. (Nov/Dec-2021)
11. Explain in detail about floating point architecture.
12. Explain the Hardware Architecture of TMS320c50 DSP. (Nov/Dec-2011)
Digital Signal Processing 479
PART A – TWO MARKS
1. What is multirate signal processing?
The theory of processing signals at a different sampling rate is called multirate signal
processing.
2. Define down sampling.
Down sampling a sequence x(n) by a factor M is the process of picking every Mth
sample and discarding the rest.
3. What is meant by up sampling?
Up sampling by a factor L is the process of inserting L-1 zeros between two
consecutive samples.
4. What is the need for anti-aliasing filter prior to down sampling?
The spectra obtained after down sampling a signal by a factor M is the sum of all the
uniformly shifted and stretched version of original spectrum scaled by a factor 1/M. If
the original spectrum is not band limited to π/M, then down sampling will cause
aliasing. In order to avoid aliasing the signal x(n) is to be band limited to ±π/M. This
can be done by filtering the signal x(n) with a low pass filter with a cutoff frequency
of π/M. This filter is known as anti-aliasing filter.
5. What is the need for anti-imaging filter after up sampling a signal?
The frequency spectrum of up sampled signal with a factor l, contains (L-1) additional
images of the input spectrum. since we are not interested in image spectra, a low pass
filter with a cut off frequency = π/L can be used after up sampler. This filter is known
as anti-imaging filter.
6. What is a multirate DSP system?
The discrete time system that employs sampling rate conversion while processing the
discrete time signal is called multirate DSP systems.
7. What are the various basic methods of sampling rate conversion in digital domain?
The basic methods of sampling rate conversion are decimation (or down sampling)
and interpolation (or up sampling).
Digital Signal Processing 480
8. Write any four applications of multi-rate signal processing.(Nov/Dec-2013)
a. Sub-band coding of speech signals and image compression.
b. Over sampling A/D and D/A converters for high quality digital audio systems
and digital storage systems.
c. Digital filter banks.
d. Quadrature Mirror Filter(QMF) bank.
The above applications come under the areas given below:
Communication systems
Speech and audio processing systems
Antenna systems
Radar systems
9. What is interpolation? (Apr/May-2010)
Interpolation is the process of increasing the sampling rate by an integer factor I.
10. What is decimation? (May/June-2009)
Decimation is the process of reducing the sampling rate by an integer factor D.
11. Write some advantages of multirate processing.
a. The reduction in number of computations.
b. The reduction in memory requirement.
c. The reduction in finite word length effects.
12. What is an anti-imaging filter?
The low pass filter used at the output of an interpolator is called anti-imaging filter. It
is used to eliminate the multiple images in the output spectrum of the interpolator.
13. What is polyphase decomposition?
The process of dividing a filter into several sub-filters which differ only in phase
characteristics is called polyphase decomposition.
Digital Signal Processing 481
14. Define Sampling rate conversion.
Sampling rate conversion is the process of converting the sequence x(n) which is got
from sampling the continuous time signal x(t) with a period T,to another sequence
y(k) obtained from sampling x(t) with another period „T‟.
15. What are the different techniques of voice compression and coding?
Waveform coding
Transform coding
Frequency band encoding
Parametric methods
16. Define Adaptive filter.
Adaptive filters are digital filters whose coefficients change with an objective to make
the filter converge to an optimal state. The optimization criterion is a cost function,
which is most commonly the mean square of the error signal between the output of
the adaptive filter and the desired signal.
17. What are the applications of adaptive filters in DSP?
Adaptive filters play an important role in modern digital signal processing (DSP)
products in areas such as telephone echo cancellation, noise cancellation, equalization
of communications channels, biomedical signal enhancement, active noise control
(ANC), and adaptive control systems.
18. What is adaptive filter in biomedical signal processing?
The adaptive filter essentially minimizes the mean-squared error between a primary
input, which is the noisy ECG, and a reference input, which is either noise that is
correlated in some way with the noise in the primary input or a signal that is
correlated only with ECG in the primary input.
19. What is the classification of digital signal processors?
i.General purpose digital signal processors.
ii.Special purpose digital signal processors.
Digital Signal Processing 482
20. List the features of the DSP Processor.
It possesses on chip registers to store immediate results.
It has multiple access memory architecture for parallel instruction fetch and
operand access.
It has multiple pointers to support multiple operands, jumps and shifts.
It holds specialized execution control for efficient looping.
21. What are the basic types of processors?
Von -Neumann architecture
Harvard architecture
Modified Harvard architecture
22. What is pipelining?
Pipelining a processor means breaking down its instruction into a series of discrete
pipeline stages which can be completed in sequence by specialized hardware.
23. What are the different stages in pipelining?
Fetch phase
Decode phase
Memory read phase
Execute phase
24. What are the components of CPU?
Central arithmetic logic unit (CALU)
Parallel logic unit (PLU)
Auxiliary register arithmetic unit (ARAU)
Memory-mapped registers
Program controller
Digital Signal Processing 483
25. What are the components of CALU?
16-bit „X‟ sign 16-bit multiplier
32-bit arithmetic logic unit (ALU)
32-bit accumulator (ACC)
32-bit accumulator buffer (ACCB)
Additional shifters
26. What are the important elements of program controller?
Program counter
Status and control registers
Hardware stack
Address generation logic
Instruction registers
27. List the various registers used with ARAU.
Eight auxiliary registers (AR0-AR7)
Auxiliary register pointer (ARP)
Unsigned 16-bit ALU
28. Give some examples for fixed point DSPs.
a. TMS320C50, TMS320C54, TMS320C55, ADSP-219X, ADSP-219xx.
29. Give some examples for floating point DSPs.
a. TMS320C3x, TMS320C67x, ADSP-21xxx.
30. What is the function of parallel logic unit?
a. The parallel logic unit is a second logic unit, that execute logic operations on
data without affecting the contents of accumulator.
Digital Signal Processing 484
31. What are the applications of PDSPs?
Digital cell phones
Automated inspection
Voicemail
Motor control
Video conferencing
Noise cancellation
Medical Imaging
Speech synthesis
PART - B (QUESTIONS & ANSWERS)
1. Explain in detail about down sampling.
The input signal is x(n).Its spectrum is given as X(ω).It is to be downloaded by integer
factor D.
X(ω) is non zero in the interval 0≤׀ω≤׀П
If the sampling rate is reduced by selecting every Dth value of x(n), then aliasing problem
occur.
To avoid this aliasing problem, the bandwidth of x(n) is reduced to
In the above figure,x(n) is given to the low pass filter.It is represented as h(n).The
frequency response is H(ω).
Digital Signal Processing 485
Low pass filter is used to eliminate the spectrum of X(ω) in,
Output of LPF is W(n),
It is downloaded by D.
The filtering operation on x(n) will be linear and time variant.
Take Z-transform for y(m), then
Digital Signal Processing 486
If H(ω) is designed properly, aliasing effect will be eliminated.
Digital Signal Processing 487
2. Considering an example x(n) = {1, 3, 2, 5, 4, –1, –2, 6, –3, 7, 8, 9, ...} show that a
cascade of D down sampler and I up sampler is interchangeable only when D and I
are co-prime
Digital Signal Processing 488
Cascading of D=2 and I=3
Interchanging the cascading as shown in above Figure, we have
Cascading of l = 3 and D = 2
Cascading of D = 2 and l = 4
Interchanging the cascading as shown in above Figure, we have
Digital Signal Processing 489
Cascading of l = 4 and D = 2
This shows that the cascading of up sampler and down sampler is not interchangeable
when D and I are not co-prime, i.e., when D and I have a common factor.
3. Explain in detail about up sampling with spectral equations.
The process of increasing the sampling rate by a factor I is known as interpolation.
It can be done by interpolating I-I new samples between successive values of the signal.
The spectral shape of x(n) will be preserved by the interpolation process.
W(m) is the sequence obtained from x(n) by adding I-I zeros between successive values
of x(n).Its rate is fy=Ifx.
Sampling rate of W(m) is identical to y(m)
Digital Signal Processing 490
Spectrum of x(n) and W(ωy)
The increase in sampling rate can be obtained by adding I-I zero samples between
successive of x(n).The resulting spectrum is given as W(ωy).
The remove the images, an anti-imaging filter (LPF) is used.
A=Gain of the filter
A=I in the pass band will be the desired normalization factor.
Output spectrum is given by,
Digital Signal Processing 491
4. Derive the spectrum of the down sampled signal. Explain aliasing effect and how it
can be avoided?
REFER Q.NO:1
The spectra obtained after down sampling a signal by a factor M is the sum of all the
uniformly shifted and stretched version of original spectrum scaled by a factor 1/M. If the
original spectrum is not band limited to π/M, then down sampling will cause aliasing. In
order to avoid aliasing the signal x(n) is to be band limited to ±π/M. This can be done by
filtering the signal x(n) with a low pass filter with a cutoff frequency of π/M. This filter is
known as anti-aliasing filter.
5. Discuss the design steps involved in the implementation of multistage sampling rate
converter.
In this section, the method to perform sampling rate conversion for D>>1 and I>>1 in
multiple stages. First, we consider the interpolation by a factor I>>1.Interpolation by I
can be accomplished by cascading P number of stages of interpolation and filtering.
Fig: Multistage Implementation of Interpolation by a factor I
Digital Signal Processing 492
the filter block is indicated by h1(n),h2(n)…..hp(n).Each stage consists of interpolation
block and filter block. The filter is used to eliminate the images introduced by the up
sampling process.
Similarly, write the expression for decimation by a factor D.
q=number of stages
So, the decimation by a factor D can be accomplished by cascading q number of stages of
filtering and decimation.
Fig: Multistage Implementation of decimation by a factor D
The sampling rate at the output of the ith stage is,
Here, the input rate=fx.
Each filter is designed to avoid aliasing within the frequency band of interest.
6. Explain the operation of adaptive filter with suitable diagrams and equations.
Adaptive filters are digital filters whose coefficients change with an objective to make the
filter converge to an optimal state. The optimization criterion is a cost function, which is
most commonly the mean square of the error signal between the output of the adaptive
filter and the desired signal.
In general, there are two types of digital filters that can be used for adaptive filtering: FIR
and IIR filters. The FIR filter is always stable and can provide a linear-phase response. On
the other hand, the IIR, filter involves both zeros and poles. Unless they are properly
controlled, the poles in the filter may move outside the unit circle and result in an
Digital Signal Processing 493
unstable system during the adaptation of coefficients. Thus, the adaptive FIR filter is
widely used for practical real-time applications.
Fig: Block Diagram of Adaptive filter.
7. Discuss in detail about any two applications of adaptive filtering with necessary
diagrams.
1.Telephone Echo Canceller:
A telephone echo canceller, as depicted in below Figure, is a typical application of an
adaptive filter. The “hybrid” is an electronic device that should ensure that all signals
from the far telephone are sent to the local telephone without any of the far telephone
signals getting through to be sent back to the far telephone as if it were an echo. In
practice, the hybrid cannot be perfect because it relies on perfect impedance matching,
and the impedance of the phone and line will vary with time. Such echoes are often
noticeable on international phone lines when you hear an echo of yourself substantially
delayed.
Digital Signal Processing 494
Fig: Telephone Echo Cancellation
The echo canceller depicted in the diagram works by removing the echoes from the
mismatch in the hybrid, by making the adaptive filter exactly match the reflection path,
and track the changes to this echo path. The adaptive filter is an FIR filter of length N
with coefficients w(i). Concentrating on the left hand adaptive filter, the following finite
difference equations would eventually achieve an optimal reduction of the echo:
2.Adaptive channel equalization:
Fig:5.6.1, a block diagram of a digital communication system in which an adaptive
equalizer is used to compensate for the distortion caused by the transmission medium
(channel).
Digital Signal Processing 495
Fig:5.6.1 Application of Adaptive Filter to Adaptive Channel Equalization
The digital sequence of information symbols a(n) is fed to the transmitting filter whose
output is
where, p(t) is the impulse response of the filter at the transmitter and Ts is the time
interval between information symbols; that is, 1 Ts is the symbol rate. we may assume
that a(n) is a multilevel sequence that takes on values from the set ±1, ±3,±5,............,±(k
−1), where k is the number of possible values.
8. Explain DSP processor TMS320C5O building Blocks in detail with neat diagram.
All general DSP Processors Core is composed of the Data Path, Control Path and Address
Generation Unit (AGU). The Memory Subsystem is located out of the processor core. These
in turn are built up of various modules. A basic DSP processor supports RISC and CISC
instructions. The RISC uses the general registers for operands and writes them back to the
Digital Signal Processing 496
Register File (RF). The CISC used the memory subsystem to compute vector elements like in
the case of convolution.
9. Explain in detail about fixed point architecture.
Digital Signal Processing 497
10. Explain in detail about floating point architecture.
Digital Signal Processing 498
11. Explain the Hardware Architecture of TMS320c50 DSP.
REFER Q.NO: 8
Digital Signal Processing 499
Digital Signal Processing 500
CHAPTER 7
CONCLUSION
Digital Signal Processing (DSP) is a field of study that deals with the manipulation
and analysis of digital signals using mathematical algorithms and computational techniques.
In this conclusion, we will summarize the key concepts covered in this discussion, including
the Discrete Fourier Transform (DFT), Infinite Impulse Response (IIR) filters, Finite Impulse
Response (FIR) filters, Finite Word Length Effects (FWLE), DSP applications, and an
introduction to Digital Signal Processors (DSPs).
The DFT is a mathematical technique used to transform a discrete-time signal from
the time domain to the frequency domain. It provides information about the frequency
content of a signal and is widely used in various applications, including spectral
analysis, audio processing, and image processing.
IIR filters are digital filters that utilize feedback to achieve a desired frequency
response. They are characterized by recursive equations and have the advantage of
requiring fewer coefficients compared to FIR filters. IIR filters are commonly used in
applications that require low-pass, high-pass, band pass, or band-stop filtering.
FIR filters are digital filters that do not utilize feedback. They are characterized by
non-recursive equations and have a finite impulse response. FIR filters are often
preferred in applications that require linear phase response, stability, and precise
control over the filter characteristics.
FWLE refers to the quantization and round-off errors introduced when representing
real-world signals in digital form with finite precision. These effects can degrade the
performance of DSP systems, leading to issues such as quantization noise, limit
cycles, and coefficient quantization errors. Proper consideration of FWLE is crucial in
designing high-quality DSP systems.
Digital Signal Processing 501
Digital Signal Processors (DSPs) are specialized microprocessors that play a crucial
role in various applications. They are adept at processing digital signals with high
speed and precision, making them indispensable in audio, speech, image, video
processing, communications, radar, medical imaging, control systems, and
instrumentation. Multirate signal processing techniques, such as decimation,
interpolation, and sampling rate conversion, enable efficient manipulation of signals
with varying sampling rates, maintaining signal integrity in real-time applications.
Adaptive filters, another essential aspect of DSP, dynamically adjust filter parameters
based on input signals, finding applications in equalization, echo cancellation, noise
reduction, and adaptive beamforming. Additionally, DSP architectures offer the
choice between fixed-point and floating-point implementations, balancing cost, power
consumption, and precision requirements. These principles collectively contribute to
the effective design and implementation of robust digital signal processing systems
catering to diverse practical challenges across various domains.
In conclusion, Digital Signal Processing is a vast and important field that encompasses
various techniques and algorithms for analysing and manipulating digital signals. The
concepts of Discrete Fourier Transform, Infinite Impulse Response and Finite Impulse
Response filters, Finite Word Length Effects, DSP applications, and Digital Signal Processors
are fundamental to understanding and implementing DSP systems for a wide range of real-
world applications.
REFERENCES
1. John G. Proakis &; Dimitris G. Manolakis, “Digital Signal Processing-
Principles, Algorithms &;Applications”, 4 th Edition, Pearson
Education/Prentice Hall, 2007.
2. Emmanuel C.Ifeachor &; Barrie.W.Jervis, “Digital Signal Processing”,
2nd Edition, Pearson Education/Prentice Hall, 2002.
3. V.Oppenheim, R.W.Schafer and J.R.Buck, “Discrete-Time Signal
Processing”, 8 th IndianReprint,Pearson,2004.
4. Andreas Antoniou, “Digital Signal Processing”, TataMcGrawHill,2006.
5. S. Salivahanan and A. Vallavaraj - "Digital Signal Processing" - McGraw-
Hill Education, 2013.
6. K. R. Rao, D. N. Kim, and J. J. Hwang - "Fast Fourier Transform:
Algorithms and Applications" - Springer, 2010.
7. S. K. Mitra - "Digital Signal Processing: A Computer-Based Approach" -
McGraw-Hill Education, 2014.
8. R. L. Aggarwal and S. Agarwal - "Digital Signal Processing: Concepts and
Applications" - New Age International Publishers, 2011.
9. B. Venkataramani and M. Bhaskar - "Digital Signal Processing: A Modern
Introduction" - Oxford University Press, 2020.
10. S. N. Sivanandam and S. Sumathi - "Introduction to Digital Signal
Processing" - Springer, 2007.
11. Anand Kumar - "Signals and Systems" - PHI Learning Private Limited,
2013.
12. P. Ramesh Babu - "Digital Signal Processing: Theory and Practice" -
Scitech Publications, 2012.
13. K. Radhakrishnan and R. Viswanathan - "Discrete-Time Signals and
Systems" - Pearson Education, 2012.
14. B. Somanathan Nair - "Digital Signal Processing: Principles and
Applications" - McGraw-Hill Education, 2003.
15. Subra Ganesan - "Digital Signal Processing: An Introduction with
MATLAB and Applications" - Wiley-IEEE Press, 2014.
16. T. Veerakumar - "Digital Signal Processing: Principles and Applications" -
S. Chand Publishing, 2013.
17. Ramesh Babu Durai - "Digital Signal Processing" - Scitech Publications,
2014.
18. K. Murali Babu - "Digital Signal Processing" - Sanguine Technical
Publishers, 2014.
19. Monson H. Hayes - "Statistical Digital Signal Processing and Modeling" -
Wiley-Interscience, 1996.
20. https://nptel.ac.in/courses/117/102/117102060/(DigitalSignalProcessing)
21. https://nptel.ac.in/courses/108/106/108106151/(DigitalSignalProcessing)
Authors’ Biography
Dr.P.Gopinath is working as an Assistant Professor in the department of
Electronics and Communication Engineering at Sengunthar Engineering
College, Tiruchengode. He obtained his Ph.D in Digital Image
Processing from Anna University, Chennai in 2023. He obtained his PG
degree - M.E (Applied Electronics) from Anna University, Chennai in
2011and UG degree- B.E (Electronics and Communication Engineering)
from Anna University, Chennai in 2008. He has 13 years of teaching
experience. His research area includes Digital Image processing, Signal processing,
Biometrics, Machine learning, and Artificial Intelligence. He has published more than 12
research articles and 2 patents.
Dr.M.Manoj prabu is working as an Associate Professor in the
department of Biomedical Engineering at Sri Shakthi Institute of
Engineering and Technology, Coimbatore. He obtained his Ph.D in
Wireless EEG Sensor network from Anna University Chennai in 2020. He
obtained his PG degree-M.E (Embedded System Technologies) from Anna
University, Chennai in 2013 and UG-B.E (Electronics and Communication
Engineering) from Anna University Chennai in 2008.He has 13 years of
teaching experience. His research interest includes Speech processing, Wireless Sensor
Networks, Signal processing and Machine learning, Artificial Intelligence, Internet of Things
(IoT).He has published more than 10 research articles and 4 patents.
Dr.G.Kalaiarasi received her Ph.D degree in Information and
Communication Engineering in the year of 2022. She obtained her M.E
Degree in VLSI Design in the year 2011, B.E degree in Electronics and
Communication Engineering in the year 2008 from Anna University,
Chennai. Currently she is working as an Assistant Professor in the
Department of Advanced Computer Science and Engineering, in Vignan’s
Foundation for Science, Technology & Research (Deemed to be
University), Guntur, Andrapradesh. Her area of specialization includes
VLSI Design and Signal &Hyper spectral Image Processing, Machine Learning and IoT.
Mr.P.Suseendhar pursuing his PhD degree in area of wireless sensor
network, His M.E Degree in Embedded Systems in the year 2012, B.E
degree in Electronics and Communication Engineering in the year 2008
from Anna University, Chennai. Currently he is working as an Assistant
Professor in the Department of ECE, in Sri Manakula Vinayagar
Engineering College, Madagadipet, Puducherry. His area of
specialization includes Embedded Systems, Signal Processing and
Microprocessors and Microcontrollers.
The book "Digital Signal Processing – Techniques and Applications" delves into a vast and pivotal realm,
encompassing an array of techniques and algorithms designed for the analysis and manipulation of digital
signals. From unraveling the intricacies of the Discrete Fourier Transform to mastering the nuances of Infinite
Impulse Response and Finite Impulse Response filters, this book unravels the core concepts that underpin
DSP. Delving further, it explores the impact of Finite Word Length Effects and offers insights into a real-
world applications that leverage DSP's power. This book serves as your guiding companion, illuminating the
path from theory to pragmatic implementation and equips with the knowledge and tools to navigate this
dynamic landscape with confidence.
Dr. P. Gopinath is working as an Assistant Professor in the Department of Electronics and
Communication Engineering at Sengunthar Engineering College, Tiruchengode. He obtained
his Ph.D in Digital Image Processing from Anna University, Chennai in 2023. He obtained his
PG degree - M.E (Applied Electronics) from Anna University, Chennai in 2011and UG degree-
B.E (Electronics and Communication Engineering) from Anna University, Chennai in 2008. He
has 13 years of teaching experience. His research area includes Digital Image processing, Signal
processing, Biometrics, Machine learning, and Artificial Intelligence. He has published more
than 12 research articles and 2 patents.
Dr. M. Manoj Prabu is working as an Associate Professor in the department of Biomedical
Engineering at Sri Shakthi Institute of Engineering and Technology, Coimbatore. He
obtained his Ph.D in Wireless EEG Sensor network from Anna University Chennai in 2020. He
obtained his PG degree-M.E (Embedded System Technologies) from Anna University, Chennai
in 2013 and UG-B.E (Electronics and Communication Engineering) from Anna University
Chennai in 2008. He has 13 years of teaching experience. His research interest includes Speech
processing, Wireless Sensor Networks, Signal processing and Machine learning, Artificial
Intelligence, Internet of Things. He has published more than 10 research articles and 4 patents.
Dr. G. Kalaiarasi received her Ph.D degree in Information and Communication Engineering in
the year of 2022. She obtained her M.E Degree in VLSI Design in the year 2011, B.E degree in
Electronics and Communication Engineering in the year 2008 from Anna University, Chennai.
Currently she is working as an Assistant Professor in the Department of Advanced Computer
Science and Engineering, in Vignan’s Foundation for Science, Technology & Research
(Deemed to be University), Guntur, Andrapradesh. Her area of specialization includes VLSI
Design and Signal &Hyper spectral Image Processing, Machine Learning and IoT.
Mr. P. Suseendhar pursuing his PhD degree in area of wireless sensor network, His M.E Degree
in Embedded Systems in the year 2012, B.E degree in Electronics and Communication
Engineering in the year 2008 from Anna University, Chennai. Currently he is working as an
Assistant Professor in the Department of ECE, in Sri Manakula Vinayagar Engineering
College, Madagadipet, Puducherry. His area of specialization includes Embedded Systems,
Signal Processing and Microprocessors and Microcontrollers.
DOI: https://doi.org/10.5281/zenodo.8238480
www.raaltechpublications.com
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