FINAL - DLOG LABORATORY MANUAL v.11

0 1 0 0 0 0 0 0
0 1 0 0 0 0 1 1
0 1 1 0 1 0 0 1
0 1 1 1 0 0 1 0
0 1 1 0 1 0 1 1
0 1 1 0 1 0 0 1
0 1 1 1 0 1 0 0
0 0 1 1 0 0 1 1
INTRODUCTION to 0 1 0 0 0 1 0 1
0 1 0 0 0 1 1 1
DIGITAL LOGIC CIRCUIT AND DESIGN 0 1 0 0 1 1 1 0
0 1 0 1 0 0 1 0
0 0 1 0 1 1 1 0
0 1 0 1 0 0 1 0
Laboratory Manual 0 1 0 0 1 0 0 1
0 1 0 0 0 0 1 1
0 1 0 0 0 0 0 1
0 1 0 1 0 0 1 0
0 1 0 0 0 1 0 0
0 1 0 0 1 1 1 1
0 1 0 0 0 0 1 0
0 0 1 0 1 1 1 0
0 1 0 1 0 0 1 1
0 1 0 0 0 0 0 1
0 1 0 0 1 1 1 0
0 1 0 0 0 0 0 1
0 1 0 0 0 1 1 1
0 1 0 1 0 1 0 1
0 1 0 1 0 0 1 1
0 1 0 1 0 1 0 0
0 1 0 0 1 0 0 1
0 1 0 0 1 1 1 0
2024-2025
0 0 1 0 1 1 1 0
0 0 1 0 1 1 1 0
0 0 1 0 1 1 1 0
0 0 1 0 1 1 1 0
INTRODUCTION to DIGITAL LOGIC CIRCUIT AND DESIGN
TABLE OF CONTENTS
PRELIMINARIES Page
Foreword.............................................................................................................. iv
Preface................................................................................................................. v
Objectives............................................................................................................ vi
Guidelines for carrying out experiments laboratory rules................................... vii
Laboratory safety................................................................................................. viii
Electrical and Electronics Safety Rules............................................................... viii
Electronics Components Precautions.................................................................. ix
Basic electronics components measurement reading.......................................... x
EXAMPLE EXERCISES
1. NOT gate or inverter........................................................................................ 1
2. AND gate......................................................................................................... 4
3. OR gate............................................................................................................ 7
4. NAND gate...................................................................................................... 10
5. NOR gate......................................................................................................... 13
6. Exclusive OR gate (XOR)............................................................................... 16
7. Exclusive NOR gate (XNOR)......................................................................... 19
8. Boolean Algebra- simplification of logic expressions..................................... 22
8.1 Boolean Algebra- simplification of logic circuit design............................ 23
8.2. Boolean Algebra- designing a logic circuit............................................... 27
8.3. Designing a circuit using two-variable k-mapping................................... 31
9. Karnaugh Mapping (K-mapping)..................................................................... 35
9.1 Designing a circuit using two-variable k-mapping.................................... 36
9.2 Designing a circuit using three-variable k-mapping.................................. 39
9.3 Designing a circuit using four-variable k-mapping................................... 44
10. Multivibrator (astable or square-wave oscillator).......................................... 52
11. Flip-flops........................................................................................................ 54
12. Counter........................................................................................................... 56
13. Decoder........................................................................................................... 58
14. Seven-segment display................................................................................... 60
15. Decade counter.............................................................................................. 62
CIRKIT3 TM ELECTRONICS ii
LABORATORY EXERCISES
Laboratory 1. NOT gate implementation............................................................. 65
Laboratory 2. AND gate implementation............................................................. 68
Laboratory 3. OR gate implementation................................................................ 71
Laboratory 4. NAND gate implementation.......................................................... 74
Laboratory 5. NOR gate implementation............................................................. 77
Laboratory 6. Exclusive OR gate (XOR) implementation................................... 80
Laboratory 7. Exclusive NOR gate (XNOR) implementation............................. 83
Laboratory 8. Boolean Algebra simplifies the expression design,
implement, and simulate the logic circuit.................................... 86
Laboratory 9. Boolean Algebra simplification of logic circuit design,
implement, and simulation........................................................... 89
Laboratory 10.Boolean Algebra simplification of logic circuit design,
implement, and simulation........................................................... 93
Laboratory 11.Two-variable k-map (karnaught map) design, implementation,
and simulation of logic circuit...................................................... 96
Laboratory 12.Three-variable k-map (karnaught map) design, implementation,
and simulation of logic circuit....................................................... 99
Laboratory 13.Four-variable k-map (karnaught map) design, implementation,
and simulation of logic circuit...................................................... 102
Laboratory 14.Multivibrator circuit using lm 555 integrated circuits (IC) timer. 106
Laboratory 15.Flip-flop circuit design, implementation, and circuit simulation. 93
110
Laboratory 16.Counter circuit design, implementation, and circuit simulation. 99
114
Laboratory 17.Decoder circuit design, implementation, and circuit simulation. 10
117
Laboratory 18.Seven-segment display design, implementation, and circuit 110
Simulation..................................................................................... 120
Laboratory 19.Decade counter (0-9 digits) design, implementation, and circuit
Simulation..................................................................................... 123
CIRKIT3 TM ELECTRONICS iii

Foreword
Thru the advancement of technology, today digital electronics is very interesting

parts of the topics mostly in designing a digital circuit and application in digital electronics
to build more sophisticated digital project from a simple blinking light, traffics light, or
billboard to a complex one such as computer memory, video card, microchip,
microcontroller, central processing unit (CPU), etc.
This laboratory manual discusses the basics of digital electronics and explains in
an understandable and easy-to-analyze experiment thru designing a circuit,
implementation, and simulation with the help of the online tools available on the internet
two of the very useful site are https://www.tinkercad.com physical simulation and
https://circuitverse.org/simulator logical simulation of all images in this laboratory manual.
This manual helps learners to design, implement, and simulate their actual work
using digital electronics components to enhance their skills and knowledge between theory
and practical implementation of the digital logic circuit.
The author wishes to thank Engr. Ricardo B. San Agustin, MIT made this
possible to produce this laboratory manual to give an informative structure and outline for
the needs of learners, hobbyists, and professionals.
CirKit3™ Electronics
CIRKIT3 TM ELECTRONICS iv
Preface
This laboratory manual teaches the basics of digital electronics focusing on the design,
implementation, and simulation of the design digital logic circuit.
The first part of the experiment introduces the seven basic logic gates' properties,
truth tables, symbols, IC code, PIN configuration, and the logic sequence of each logic gate
such as AND, OR, NOT or Inverter, NAND, NOR, Exclusive-OR (XOR), and Exclusive-
NOR (XNOR).
The second part includes the Boolean Algebra Law demonstrates the simplification
of expression in designing a digital logic circuit and also the implementation and simulation
thru a practical approach, in the same way, covered the simplification of the digital logic
circuit and designing a digital logic using a truth table. In addition, it contains a process of
Karnaugh Map of two, three, and four variables in finding the expression to design a digital
logic circuit
Lastly, it illustrates the implementation of timer IC computation of period in
examining the behavior of the timer circuit and the computation of the period in different
resistance and capacitance value and likewise, the hands-on implementation and simulation
of the flip-flop, counter circuit, decoder circuit and the seven-segment to study the basic
properties, PIN configurations, and applications of each circuit in the digital word.
Finally, the final laboratory project on this manual introduced the design and
implementation of the complete digital circuit design for seven segments that display a
count-up counter from 0-9.
CIRKIT3 TM ELECTRONICS v
Objectives
This laboratory manual has objectives as follows:
1. The learners should familiarize the seven logic gates from the name, symbols, IC
code, pin configurations, and truth table for each logic property.
2. The learners should learn:
a. how to design a circuit using the seven logic gates;
b. To implement their design in a real-world application;
c. Know how to simulate the implemented design in practical applications.
3. The learners should know how to apply the Boolean Algebra in:
a. Simplifying a logic expression;
b. Simplifying a logic circuit;
c. Designing a logic circuit.
4. The learners should know the concept of Karnaught Map in the:
a. Simplifying a logic expression;
b. Simplifying a logic circuit;
c. Designing a logic circuit.
5. The learners should learn how to design multivibrator circuits and compute periods
using an lm555 integrated circuit (ic) timer
6. The learners should analyze the behavior of different flip-flop circuits through the
implementation and simulation.
7. The learners should analyze the behavior of counter circuits thru implementation
and simulation.
8. The learners should analyze the concept of a decoder circuit thru design,
implementation, and circuit simulation
9. The learners should analyze the idea of a seven-segment display thru design,
implementation, and circuit simulation.
CIRKIT3 TM ELECTRONICS vi
GUIDELINES FOR WORKING EXPERIMENTS LABORATORY RULES
 Bring the laboratory manual and a laboratory notebook (not loose-leaf or spiral) to
every scheduled laboratory session.
 Careful notes should be taken during each laboratory lecture. The instructor will
generally provide information underlying the project, as well as advice on the
techniques that you will use. Some of this information should be included in your
laboratory report.
 You may work in the laboratories only during your regularly scheduled laboratory
period and only when class is in session.
 If you miss a laboratory for a legitimate reason (illness, death in the family, etc.)
you must obtain permission from your regular laboratory instructor to make up the
lab at another time. Make-up labs are only allowed when space allows and with the
approval of the host professor. During the make-up laboratory, you must move your
equipment to an unoccupied lab bench.
 Attendance is required at a presentation on laboratory safety that will be shown
during your first scheduled laboratory. Each student must give the instructor a
signed form indicating that the presentation was attended and that any associated
training materials were examined.
CIRKIT3 TM ELECTRONICS vii

LABORATORY SAFETY
Safety Rules
At all times when you are working in the laboratory you should use prudent
practices. Recognize that safety is, ultimately, everyone's responsibility.
 Never work alone in any laboratory. Avoid the most common causes of
accidents:
 Keep the laboratory bench and work area orderly, clean, and free of items not
related to the experiment at all times. Specifically, electronic devices are not
allowed on the bench.
 Food or drink should only be consumed in the lecture area of the room. Do not
chew gum during laboratory sessions.
 Report all accidents, however minor, to the laboratory instructor immediately.
 Know the exact location of all safety equipment and how to use it. Preparation
is important:
 Perform only assigned experiments. Do not attempt to modify the written
procedures unless instructed to do so.
 When conducting experiments ask yourself, "What are the worst possible things
that could go wrong?" and "How will I deal with them?" Don't experiment until
you are certain of your answers.
 Electrical and Electronics Safety Rules
Electrical and Electronics Safety Rules
 Keep your work area dry and clean

 Always work in a well-ventilated space.
 Never work on a circuit while power is applied.
 Do not connect power to a circuit until the circuit is finished and you have
carefully checked your work.
 If you smell anything burning, immediately disconnect the power and examine
your circuit to find out what went wrong.
 Know the polarized and non-polarized devices.
 Do not interchange the positive and negative terminal
 Never put fingers or other objects in an outlet.
 Prevent electrical equipment from contacting wet areas.
 Ensure safe use when unplugging.
 Use proper tools or equipment.
 Ask for help!!!
CIRKIT3 TM ELECTRONICS viii

Electronics Components Precautions
Integrated Circuit Precautions
 Avoid touching pins, leads, or circuitry.
 Always be properly grounded when touching a static-sensitive component or
assembly.
 Always check the integrated circuit pin configuration before starting the
experiment.
 Always should be provided with the appropriate power or voltage supply when
experimenting.
 Do not apply excessive input or output voltage across the Integrated Circuit (IC).
 Before applying a power supply to a circuit be sure all the connections are in the
right place.
Capacitor Precautions
 Always check the connection of the electrolytic capacitor in a circuit if properly connected
to the positive and negative terminals.
 Be careful around large capacitors; they can continue to hold voltage long after they are
disconnected from power.
 Short-circuit the capacitor using any metal with a protective insulator.
 If leaked liquid gets into the eyes, wash them with clean water and consult a physician
immediately.
 Do not use nor leave the capacitors in direct sunlight or high-temperature areas.
 Do not use new and used capacitors together. Do not use different types of capacitors
together.
 If you connect two or more capacitors in series or parallel, please consult us in advance.
 Keep capacitors away from direct sunlight, high temperature, and humidity.
Reminder: Always check the polarity of all polarized components and the connection of the power
supply if properly connected before applying a power source to the circuit. Wrong placement of
polarity and power line can be caused damage to the electronic components.
CIRKIT3 TM ELECTRONICS ix
BASIC ELECTRONICS COMPONENTS MEASUREMENT
How to read the Resistor value?
Retrieved from: https://www.arrow.com/en/research-and-events/articles/resistor-

color-code
How to read Light-emitting Potentiometer values?
Retrieved from: https://buatkreasiaja.com/justelectro/how-to-measure-potentiometer-

multime/, https://www.tubesandmore.com/products/potentiometer-alpha-linear-solid-
shaft
CIRKIT3 TM ELECTRONICS x
How to read Capacitor value?
Retrieved from: https://shop14720.tinerahbek.com/category?name=list%20of%20

capacitor%20values
How to read Light-emitting diode values?
Retrieved from: https://www.pinterest.ph/pin/126100858289724370 /
CIRKIT3 TM ELECTRONICS xi
DISCUSSIONS AND EXAMPLES
CIRKIT3 TM ELECTRONICS i
1. NOT GATE OR INVERTER
It is an electronic circuit that produces an inverted version of the input at its output.
It is also known as an Inverter. An inverter is a logic gate that has only one input, if the
input variable is A, the inverted output is NOT A. This is also shown as A' or Ā with a bar
over the top.
Where: If input A is low (0) the inverted output A' is high (1) and If input A is high
(1) the inverted output A' is low (0).
NOT GATE SCHEMATIC SYMBOL TRUTH TABLE
NOT gate
Input Inverted
output
0 1
1 0
CIRCUIT DIAGRAM PHYSICAL DEVICE
Figure 4: NOT gate symbol, Truth table, Connection diagram, and 74LS04 IC
CIRKIT3 TM ELECTRONICS 1
EXAMPLE
A. Circuit Design B. Truth Table
A X A(INPUT) X (LED)
0 1 (ON)
LED
1 0 (OFF)
C. Circuit diagram
D. Circuit implementation
Input is 0 LED 1 (ON)
Input is 1 LED 0 (OFF)
2. AND GATE
An AND gate is a logic gate having two or more inputs and a single output, if 0 is
called “low” and 1 is called “high”, then the gates will act the same way as the logical
operators. A dot (.) is used to show the AND operation i.e. A.B. (This dot is sometimes
omitted i.e. AB).
Where: If input A is high (1) and input B (1) is also high then the output will be
high (1), meaning the output is high (1) when both inputs are high (1). Otherwise, the output
will be low (0).
AND GATE SCHEMATIC SYMBOL TRUTH TABLE
2 Input AND gate

A (INPUT) B (INPUT) X (Output)
0 0 0 (OFF)
0 1 0 (OFF)
1 0 0 (OFF)
1 1 1 (ON)
Figure 4: AND gate symbol, Truth table, Connection diagram, and 74LS08 IC
EXAMPLE
2 Input AND gate

A B X
(INPUT) (INPUT) (Output)
0 0 0 (OFF)
0 1 0 (OFF)
1 0 0 (OFF)
1 1 1 (ON)
C. Circuit diagram
Input A is 0 and input B is 0, LED1 is OFF.
Input A is 1 and input B is 1 LED1, is ON.
3. OR GATE
An OR gate is a logic gate having two or more inputs and a single output. A logic
gate that gives a high output (1) if one or more inputs is high or 1. A (+) is used to show
the OR operation i.e. A+B
Where: If input A is high (1) and input B is high (1) then the output will be high
(1). If input A is high (1) and input B is low (0) then the output will be high (1) and vice
versa and, if both inputs are low (0) then the output will be low (0), meaning when both
inputs are low (0) that’s the only time the output will be low (0).
2 Input OR gate
0 0 0 (OFF)
0 1 1 (ON)
1 0 1 (ON)
1 1 1 (ON)
Figure 4: OR gate symbol, Truth table, Connection diagram, and 74LS32 IC
EXAMPLE
2 Input OR gate
A B X
0 0 0 (OFF)
0 1 1 (ON)
1 0 1 (ON)
1 1 1 (ON)
C. Circuit diagram
Input A is 0 and input B is 1, LED1 is ON.
Input A is 1 and input B is 1 LED1, is ON.
4. NAND GATE
A NAND gate is a logic gate having two or more inputs and a single output. It
operates as an AND gate followed by a NOT gate. The symbol is an AND gate with a
small circle on the output. The small circle represents inversion.
Where: The output is low (0) if both inputs are high (1). Otherwise, if one of the
inputs A and B is low (0) the output is high (1).
2 Input NAND gate

0 0 1 (ON)
0 1 1 (ON)
1 0 1 (ON)
1 1 0 (OFF)
Figure 4: NAND gate symbol, Truth table, Connection diagram, and 74LS00 IC
EXAMPLE
2 Input NAND gate

A B X
0 0 1 (ON)
0 1 1 (ON)
1 0 1 (ON)
1 1 0 (OFF)
C. Circuit diagram
Input A is 1 and input B is 1 LED1, is OFF.
5. NOR GATE
A NOR gate is a logic gate having two or more inputs and a single output It is equal
to an OR gate followed by a NOT gate. The symbol is an OR gate with a small circle on
the output. The small circle represents inversion.
Where: If input there is a high (1) in both inputs A and B the output is low (0),
otherwise if input A and B is low (0) the output is high (1).
2 Input NOR gate

0 0 1 (ON)
0 1 0 (OFF)
1 0 0 (OFF)
1 1 0 (OFF)
IC CONFIGURATION PHYSICAL DEVICE
Figure 4: NOR gate symbol, Truth table, IC Configuration, and 74LS02 IC
EXAMPLE
2 Input NOR gate

A B X
0 0 1 (ON)
0 1 0 (OFF)
1 0 0 (OFF)
1 1 0 (OFF)
C. Circuit diagram
Figure 1. Input A is 0 and input B is 0, LED1 is ON.
Figure 2. Input A is 0 and input B is 1, LED1 is OFF.
Figure 4. Input A is 1 and input B is 1 LED1, is OFF.
6. EXCLUSIVE OR GATE (XOR)
The XOR (exclusive-OR) gate acts in the same way as the logical "either/or". An
XOR gate can act as a "programmable inverter," where one input controls whether the other
input is inverted or is passed on unchanged. An encircled plus sign ⊕ is used to show the
XOR operation, e.g. A ⊕ B.
Where: If input A and input B are the same, then the output will be low (0). If both
inputs have opposite values, then the output will be high (1). Meaning for every same input
the output is "low (0)" and for every opposite value the output is "high (1)".
2 Input XOR gate

0 0 0 (OFF)
0 1 1 (ON)
1 0 1 (ON)
1 1 0 (OFF)
Figure 4: XOR gate symbol, Truth table, Connection diagram, and 74LS86 IC
EXAMPLE
2 Input XOR gate

A B X
0 0 0 (OFF)
0 1 1 (ON)
1 0 1 (ON)
1 1 0 (OFF)
C. Circuit diagram
Figure 4. Input A is 1 and input B is 1 LED1, is OFF.
7. EXCLUSIVE NOR GATE (XNOR)
A special type of digital logic gate called an XNOR gate takes two inputs and
generates one output. The same logic is applied to both inputs, responding similarly to both
inputs. The gate's output, also known as an "Equivalence Gate," needs both inputs to be the
same in order to create a high output. The symbol is an XNOR gate with a small circle on
the output. The small circle represents inversion, e.g. (A ⊕ B)’.
Where: If input A and B are the same, then the output will be 1 or logic high.
Otherwise, the output will be 0 or logic low if both inputs are different.
2 Input XNOR gate

0 0 1 (ON)
0 1 0 (OFF)
1 0 0 (OFF)
1 1 1 (ON)
IC CONFIGURATION PHYSICAL DEVICE
Figure 4: XNOR gate symbol, Truth table, IC Configuration, and 74LS266
EXAMPLE
2 Input XNOR gate

A B X
0 0 1 (ON)
0 1 0 (OFF)
1 0 0 (OFF)
1 1 1 (ON)
C. Circuit diagram
Figure 4. Input A is 1 and input B is 1 LED1, is ON.
8. LAW OF BOOLEAN ALGEBRA
The Laws of Boolean algebra are a collection of functions or theorems that have
been developed as a set of guidelines to help reduce the number of logic gates required to
carry out a specific logic operation.
Three basic operators of Boolean algebra.
Summary of Uses:
 Simplify the complex logic circuit
 Reduce the number of logic gates
 Minimized the cost of Integrated Circuits (ICs)
 Design a logic circuit
The table shows the Boolean algebra expression showing the algebraic properties in its
“ANDed” and “ORed form”.
Table 1. Summary of Boolean algebra Law
Boolean Properties ANDed form ORed form

Identity A=A
A’ = A’
Commutative AB = BA A+B = B+A
Associative A(BC) = B(AC) = C(AB) A+(B+C) = B+(A+C) =
C+(A+B)
Idempotent AA = A A+A = A
Double Negative A’’ = A
Complementary AA’ = 0 A+A’ = 1
Law of Intersection A1 = A
A0 = 0
Union A+1 = 1
A+0 = A
Distributive A(B+C) = (AB) + (AC) A+(BC) = (A+B)(A+C)
Absorption A(A+B) = A A+(AB) = A
Common Identities A(A’+B) = AB A+(A’B) = A+B
De Morgan's (AB)’ = A’+B’ (A+B)’= A’B’
Theorem
8.1 BOOLEAN ALGEBRA- SIMPLIFICATION OF LOGIC EXPRESSIONS
EXAMPLE. Simplify, design, implement, and simulate the given expressions

using
Sum-of-Product (SOP rule): X =A’BC’+A’BC+ABC
Step 1. Create a truth table.
Step 2. Simplify the expression using Boolean algebra:

X =A’BC’+A’BC+AB
=A’BC’+BC (A’+A)
=A’BC’+BC
=B (A’C+C)
=B (A’+C)
=A’B+BC  simplified expression
Step 3. Design a logic circuit using the simplified expression X= A’B+BC
Step 4. Create a logic circuit diagram.
Step 5. Implement and simulate the circuit.
8.2 BOOLEAN ALGEBRA- SIMPLIFICATION OF LOGIC CIRCUIT DESIGN
EXAMPLE. Simplify the given logic circuit design.
Step 1. Simulate and construct a truth table and find the Boolean expression in the
given logic circuit.
Step 2. Simplify the expression using Boolean algebra.
X = A’B + BC’ + A’
= A’ (B+1) + BC’
= A’ + BC’  simplified expression
Step 3. Design a logic circuit diagram using the simplified expression X=

A’+BC’ and construct a truth table. Note: the truth table of logic circuit design
before and after simplifications are equal.
Step 5. Implement and simulate the logic circuit diagram.
8.3 BOOLEAN ALGEBRA- DESIGNING A LOGIC CIRCUIT
EXAMPLE. Using the truth table design a logic circuit.
Step 1. Create a truth table with design output and expression for the output with
binary 1 using the sum-of-product rule (SOP).
Step 2. Arrange the expression and simplify using Boolean algebra.
X = A’B’C + A’BC’ + A’BC + AB’C + ABC

= A’BC’ + A’BC + AB’C + C
= A’BC’ + A’BC + C
= A’BC’ + C
= A’B + C  simplified expression
Step 3. Design a logic circuit diagram using the simplified expression X= A’B +
C and simulate the circuit using the truth table. (Note: the truth table of the
simulated output of the design logic circuit is equal to the output of the simplified
circuit design truth table).
9. KARNAUGH MAP (K-MAP)
Karnaugh maps are used to simplify real-world logic so that it can be implemented
with the fewest possible physical logic gates. Boolean algebra is used to reduce circuits,
which might be challenging, and simplify equations. Karnaugh maps are another method
for reducing circuits and simplifying equations.
The figure shows the different k-maps for two, three, and four variables, etc.
Two variable K-maps:
Three variable K-maps:
Four variables K-maps:
Rules for K-Maps
1. Each cell with a 1 must be included in at least one group.

2. Try to form the largest possible groups.
3. Try to end up with as few groups as possible.
4. Groups may be in sizes powers of 2: 20 = 1, 21 = 2, 22= 4, 23 = 8, 24 = 16.
5. Groups may be square or rectangular only (including wraparound at the grid
edges). No diagonals or zigzags can be used to form a group.
6. The larger a group is, the more redundant inputs there are:
9.1 DESIGNING A CIRCUIT USING TWO-VARIABLE K-MAPPING
Step 1. Create a truth table with an expression for the output with binary 1 using
the sum-of-product rule (SOP).
A B X
0 0 1
0 1 1
1 0 0
1 1 1
Step 2. Using a two-variable k-mapping table solve the following truth table.
Row A B X
0 0 0 1
1 0 1 1
2 1 0 0
3 1 1 1
Step 3. . Identify all active 1’s output in the truth table since we use the sum-of-
product expression and plot the output corresponding to the row number to the cell
number of K-maps.
Row A B X
0 0 0 1
1 0 1 1
2 1 0 0
3 1 1 1
Step 4. Get the expression by inspecting the coverage of a circle in a row and
column. The first group produced an expression of A’B’B and the second group
A’AB since BB’ and A’A is equal to zero, cancel the resulting expression of A’
and B. Therefore, the Sum-of-Product expression for X=A’+B.
Row A B X
0 0 0 1
1 0 1 1
2 1 0 0
3 1 1 1
Step. 5 Using the simplified expression X=A’+B. design a logic circuit for the
given truth table.
9.2 DESIGNING A CIRCUIT USING THREE-VARIABLE K-MAPPING
binary 1 using the sum-of-product rule (SOP).
A B C X
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
Step 2. Using a three-variable k-mapping table solve the following truth table.
Row A B C X
0 0 0 0 1
1 0 0 1 1
2 0 1 0 0
3 0 1 1 0
4 1 0 0 1
5 1 0 1 1
6 1 1 0 1
7 1 1 1 0
Step 3. . Identify all active 1’s output in the truth table since we use the Sum-of-
Product expression and plot the output corresponding to the row number to the cell
number of K-maps.
Row A B C X
0 0 0 0 1
1 0 0 1 1
2 0 1 0 0
3 0 1 1 0
4 1 0 0 1
5 1 0 1 1
6 1 1 0 1
7 1 1 1 0
column. The first group produced an expression of (A’A) (B’C’) (B’C) since A’A
and C’C are equal to zero we cancel it out and B’B’=B’ the result is B’. In the
second group, we used a wraparound method and it produced the expression of
A (B’C’) (BC’) again B’B=0 and C’C’= C’ the result is AC’. Therefore, the Sum-
of-Product expression for X=AC’+B’.
Row A B C X
0 0 0 0 1
1 0 0 1 1
2 0 1 0 0
3 0 1 1 0
4 1 0 0 1
5 1 0 1 1
6 1 1 0 1
7 1 1 1 0
Step. 5 Using the simplified expression X=AC’+ B’. We can design a logic
circuit for the given truth table.
9.3. DESIGNING A CIRCUIT USING FOUR-VARIABLE K-MAPPING
binary 1 using Sum-of-Product rule (SOP).
A B C D X
0 0 0 0 0
0 0 0 1 1
0 0 1 0 0
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 0
0 1 1 1 1
1 0 0 0 0
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
Step 2. Using a four-variable k-mapping table solve the following truth table.
Row A B C D X
0 0 0 0 0 0
1 0 0 0 1 1
2 0 0 1 0 0
3 0 0 1 1 1
4 0 1 0 0 1
5 0 1 0 1 1
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 0
9 1 0 0 1 1
10 1 0 1 0 1
11 1 0 1 1 1
12 1 1 0 0 1
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1
Step 3. . Identify all active 1’s output in the truth table since we use the sum-of-
product expression and plot the output corresponding to the row number to the cell
number of K-maps.
Row A B C D X
0 0 0 0 0 0
1 0 0 0 1 1
2 0 0 1 0 0
3 0 0 1 1 1
4 0 1 0 0 1
5 0 1 0 1 1
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 0
9 1 0 0 1 1
10 1 0 1 0 1
11 1 0 1 1 1
12 1 1 0 0 1
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1
column. The first group produced an expression of (A’B’) (A’B) (AB) (AB’) (C’D)
(CD) since A’A’AA, B’BBB’, and C’C are equal to zero we cancel it out and the
result is D. On the second group we used an overlapping method and it produced
the expression of (A’B) (AB) (C’D’) (C’D) again AA’ and D’D is equal to zero the
result is BC’, lastly the third group produced an expression of (AB) (AB’) (CD)
(CD’) once more BB’ and DD’ is equal to zero the result is AC. Therefore, the
Sum-of-Product expression for X=AC+BC’+D.
Row A B C D X
0 0 0 0 0 0
1 0 0 0 1 1
2 0 0 1 0 0
3 0 0 1 1 1
4 0 1 0 0 1
5 0 1 0 1 1
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 0
9 1 0 0 1 1
10 1 0 1 0 1
11 1 0 1 1 1
12 1 1 0 0 1
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1
Step. 5 Draw the logic design circuit using the simplified expression.
10. MULTIVIBRATOR (ASTABLE OR SQUARE-WAVE OSCILLATOR)
An electronic circuit known as a multivibrator is used to build several simple two-
state devices, including relaxation oscillators, timers, latches, and flip-flops.
EXAMPLE. Design a multivibrator circuit and compute charge, discharge, total

period, and operating frequency for the given value of resistor and capacitor.
Charge Period:
t1=0.693 (R1 + R2) C
Discharge Period:
t2=0.693 (R2) C
Total Period:
T= t1 + t2 or
0.693 (R1 + 2R2) C
Operating Frequency:
f = 1.44 / (R1 +2R2) C
Where: R = Resistor (𝝮)

C= capacitor (F)
F= Frequency (Hz)
Step 1. Using the value of R1= 1M𝝮 and R2= 1M𝝮 and C= 1𝝻F/50V. Compute
the charge, discharge, Total period, and also operating frequency.
Charge Period:
t1=0.693 (R1 + R2) C  Formula

t1=0.693(1M𝝮 + 1M𝝮) 1𝝻F
t1=0.693 (2M𝝮) 1𝝻F since: M=106 and 𝝻=10-6,
Therefore: (106) (10-6) =1
t1=0.693 (2𝝮) 1F
t1=0.693 (2sec) since: ohms x farad = second
t1=1.386-sec answer
Discharge Period:
t2=0.693 (R2) C  Formula

t2=0.693 (1M𝝮) 1𝝻F since: M=106 and 𝝻=10-6,
Therefore: (106) (10-6) =1
t2=0.693 (1𝝮) 1F
t2=0.693 (1sec) since: ohms x farad = second
t2=0.693-sec answer
Total Period:
Ttotal = t1 +t2  Formula

Ttotal = 1.386 sec +0.693 sec
Ttotal = 2.079-sec answer
Operating Frequency:
f = 1.44 / (R1 +2R2) C  Formula

f = 1.44 / [1M𝝮 + 2(1M𝝮)] 1𝝻F
f = 1.44 / (1M𝝮 + 2M𝝮)) 1𝝻F
f = 1.44 / (3M𝝮) 1𝝻F since: M=106 and 𝝻=10-6,
Therefore: (106) (10-6) =1
f = 1.44 / (3𝝮) 1F
f = 1.44 / 3sec since: ohms x farad = second
f= 0.48-sec answer
Step 2. Implement the design circuit using the value of R1= 1M𝝮 and R2= 1M𝝮
and C= 1𝝻F/50V and simulate the circuit.
11. FLIP-FLOPS
A flip-flop is a circuit with two stable states that can be used to store binary data in
digital electronics. Applying different inputs can change the data that has been saved. The
primary elements of sequential circuits are flip-flops. Flip-flops in particular are incredibly
versatile devices that can be utilized in a variety of applications, including the storage of
binary data, counters, moving binary data between locations, etc.
EXAMPLE. Given the Set-Reset (SR) flip-flop circuit below.

Step 1. Analyze the Set-Reset (SR) flip-flop circuit.
Step 2. Implement and simulate the circuit.
Step 3. Complete the table for Set Reset (SR) flip-flop.
Set (S) Reset (R) Q Q’
0 0 0 1
0 1 0 1
1 0 1 0
1 1 ∞ ∞
12. COUNTER
EXAMPLE 16. Given the design of the counter circuit using 74LS192 IC.
Step 1. Analyze the counter circuit.
Step 2. Implement and simulate the counter circuit.
Step 3. Complete the table for the given counter circuit.
Clock (cycle) D1 Q0 Q1 Q2 Q3
1st 1 0 0 0 0
nd
2 1 0 0 0 1
rd
3 1 0 0 1 0
th
4 1 0 0 1 1
th
5 1 0 1 0 0
th
6 1 0 1 0 1
th
7 1 0 1 1 0
th
8 1 0 1 1 1
th
9 1 1 0 0 0
th
10 1 1 0 0 1
th
11 1 1 0 1 0
th
12 1 1 0 1 1
th
13 1 1 1 0 0
th
14 1 1 1 0 1
th
15 1 1 1 1 0
th
16 1 1 1 1 1
13. DECODER
A decoder is an n-input, 2n-output circuit that outputs a 1 on the line corresponding
to the binary number represented by the input.
Retrieved from: https://www.electronics4u.com
EXAMPLE. Given the design circuit for a seven-segment decoder/display

driver using 74LS47 IC.
Step 1. Analyze the circuit design for seven- segment decoder/display driver.
Step 2. Implement and simulate the seven-segment decoder/display driver circuit.
Step 3. Complete the table for the 7- segment decoder/display driver in simulating
the circuit
INPUTS DECODED OUTPUT

DECIMAL
D C B A a b c d e f g
0 0 0 0 0 0 0 0 0 0 0 1
1 0 0 0 1 1 0 0 1 1 1 1
2 0 0 1 0 0 0 1 0 0 1 0
3 0 0 1 1 0 0 0 0 1 1 0
4 0 1 0 0 1 0 0 1 1 0 0
5 0 1 0 1 0 1 0 0 1 0 0
6 0 1 1 0 1 1 0 0 0 0 0
7 0 1 1 1 0 0 0 1 1 1 1
8 1 0 0 0 0 0 0 0 0 0 0
9 1 0 0 1 0 0 0 1 1 0 0
10 1 0 1 0 1 1 1 0 0 1 0
11 1 0 1 1 1 1 0 0 1 1 0
12 1 1 0 0 1 0 1 1 1 0 0
13 1 1 0 1 0 1 1 0 1 0 0
14 1 1 1 0 1 1 1 0 0 0 0
15 1 1 1 1 1 1 1 1 1 1 1
14. SEVEN-SEGMENT DISPLAY
A seven-segment display consists of different light segments. These are arranged
to form numbers and letters by displaying various combinations of segments. Binary
information is displayed using these seven segments. LEDs are PN junction diodes that
release energy in the form of light, unlike standard PN junction diodes that release in the
form of heat.
Retrieved from: https://electronics-fun.com/7-segment-hex-decoder/
EXAMPLE. Given the design circuit for seven segments displays using
common anode.
Step 1. Analyze the circuit for seven- segment display common anode.
Step 2. Implement and simulate the seven-segment display circuit.
Step 3. Complete the table for seven- segment display in simulating the circuit.
INPUTS
DISPLAY
a b c d e f g
0 0 0 0 0 0 1 0
1 0 0 1 1 1 1 1
0 0 1 0 0 1 0 2
0 0 0 0 1 1 0 3
1 0 0 1 1 0 0 4
0 1 0 0 1 0 0 5
1 1 0 0 0 0 0 6
0 0 0 1 1 1 1 7
0 0 0 0 0 0 0 8
0 0 0 1 1 0 0 9
1 1 1 0 0 1 0 x
1 1 0 0 1 1 0 x
1 0 1 1 1 0 0 x
0 1 1 0 1 0 0 x
1 1 1 0 0 0 0 x
1 1 1 1 1 1 1 x
15. DECADE COUNTER
A counter is a device that stores the number of times a particular event or process
has occurred, often in relationship to a clock. The most common type is a sequential digital
logic circuit with an input line called the clock and multiple output lines.
Retrieved from: https://www.electronicshub.org/asynchronous-counter/
EXAMPLE. Given the design circuit for the decade counter display count up
(0-9 digits) using common anode seven segments.
Step 1. Analyze the given decade counter circuit display count up 0-9 digits.
Step 2. Implement and simulate the seven-segment display circuit.
Step 3. Complete the table for seven- segment display in simulating the circuit.
INPUTS
DISPLAY
a b c d e f g
0 0 0 0 0 0 1 0
1 0 0 1 1 1 1 1
0 0 1 0 0 1 0 2
0 0 0 0 1 1 0 3
1 0 0 1 1 0 0 4
0 1 0 0 1 0 0 5
1 1 0 0 0 0 0 6
0 0 0 1 1 1 1 7
0 0 0 0 0 0 0 8
0 0 0 1 1 0 0 9
1 1 1 0 0 1 0 x
1 1 0 0 1 1 0 x
1 0 1 1 1 0 0 x
0 1 1 0 1 0 0 x
1 1 1 0 0 0 0 x
1 1 1 1 1 1 1 x
LABORATORY EXERCISES
Name: _________________________________________ Date: ______________
Course/Section: _________________________________ Rating: _____________
LABORATORY 1
NOT GATE IMPLEMENTATION
Electronics Devices
7404 Hex Inverter (IC)
Light-Emitting Diode (LED)
3V to 9V DC Power supply (Note: using a 9V DC power supply need a protection
resistor)
Tools and Materials
5cm Jumper wires assorted color

Breadboard or Plugblock
Equipment
Analog or Digital Multitester

Cutter pliers
TASK: Analyze and Implement the logic circuit design.
B. Complete the truth table
INPUT A X1 (LED1) X2 (LED2) X3 (LED3) X4 (LED 4)

0
1
C. Draw the logic circuit diagram
D. Draw the logic circuit implementation
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: ______________
LABORATORY 2
AND GATE IMPLEMENTATION
Electronics Devices
7408 Quad 2-input AND gate (IC)
resistor)
Tools and Materials

Equipment

Cutter pliers
2 Input AND gate

A (INPUT) B (INPUT) X 1(LED1)
0 0
0 1
1 0
1 1
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 3
OR GATE IMPLEMENTATION
Electronics Devices
7432 Quad 2-input OR gate (IC)
resistor)
Tools and Materials

Equipment

Cutter pliers
2 Input OR gate
0 0
0 1
1 0
1 1
. Draw the logic circuit diagram
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 4
NAND GATE IMPLEMENTATION
Electronics Devices
7400 Quad 2-input NAND gate (IC)
resistor)
Tools and Materials

Equipment

Cutter pliers
2 Input NAND gate

0 0
0 1
1 0
1 1
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 5
NOR GATE IMPLEMENTATION
Electronics Devices
7402 Quad 2-input NOR gate (IC)
resistor)
Tools and Materials

Breadboard or Plug block
Equipment
Analog or Digital Multi-tester

Cutter pliers
2 Input NOR gate

0 0
0 1
1 0
1 1
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 6
EXCLUSIVE OR GATE (XOR) IMPLEMENTATION
Electronics Devices
7486 Quad 2-input OR gate (IC)
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK: A. Analyze and Implement the logic circuit design.
2 Input XOR gate

0 0
0 1
1 0
1 1
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 7
EXCLUSIVE NOR GATE (XNOR) IMPLEMENTATION
Electronics Devices
74266 Quad 2-input XNOR gate (IC)
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK: A. Analyze and Implement the logic circuit design.
2 Input XNOR gate

0 0
0 1
1 0
1 1
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 8
BOOLEAN ALGEBRA SIMPLIFIES THE EXPRESSION
DESIGN, IMPLEMENT, AND SIMULATE THE LOGIC CIRCUIT
Electronics Devices
7400, 7402, 7404,7408,7432,7486, and 74266 IC
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK: Simply the given expression: X = A’B’C’ + A’B’C + A’BC’ + A’BC + ABC.
A. Complete the truth table
A B C X B. Simply the given expression

0 0 0
X = A’B’C’ + A’B’C + A’BC’ + A’BC + ABC
0 0 1
0 1 0 =_____________________________________
0 1 1 =_____________________________________
1 0 0
1 0 1 =_____________________________________
1 1 0 =_____________________________________
1 1 1
=_____________________________________
C. Draw the logic circuit diagram.
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________

LABORATORY 9
BOOLEAN ALGEBRA SIMPLIFICATION OF LOGIC CIRCUIT
DESIGN, IMPLEMENT, AND SIMULATION
Electronics Devices
7400, 7402, 7404,7408,7432,7486, and 74266 IC
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK: Simplify the given logic circuit design.
A. Simulate logic design to complete the table and find the Boolean expression.
B. Simply the Boolean expression

X=__________________________________
=__________________________________
=__________________________________
=__________________________________
=__________________________________
=__________________________________
C. Draw the logic circuit diagram.
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 10
BOOLEAN ALGEBRA SIMPLIFICATION OF LOGIC CIRCUIT
DESIGN, IMPLEMENT, AND SIMULATION
Electronics Devices
7400, 7402, 7404,7408,7432,7486, and 74266 IC
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK: Design a logic circuit using the given truth table.
A. Simply the Boolean expression
X=__________________________________
=__________________________________
=__________________________________
=__________________________________
=__________________________________
=__________________________________
B. Draw the logic circuit design using a simplified Boolean expression.
C. Draw, implement, and simulate the logic circuit.
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 11
TWO-VARIABLE K-MAP (KARNAUGHT MAP)
DESIGN, IMPLEMENTATION, AND SIMULATION OF LOGIC CIRCUIT
Electronics Devices
7400, 7402, 7404,7408,7432,7486, and 74266 IC
resistor)
Tools and Materials

Equipment

Cutter pliers
A B X
0 0 0
0 1 1
1 0 1
1 1 0
A. Solve the truth table using a two-variable k-map.
A B X
0 0 0
0 1 1
1 0 1
1 1 0
DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Name: _________________________________________ Date: _____________
LABORATORY 12
THREE-VARIABLE K-MAP (KARNAUGHT MAP)
Electronics Devices
7400, 7402, 7404,7408,7432,7486, and 74266 IC
resistor)
Tools and Materials

Equipment

Cutter pliers
A B C X
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
A. Solve the truth table using a two-variable k-map.


DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

Name: _________________________________________ Date: _____________
LABORATORY 13
FOUR-VARIABLE K-MAP (KARNAUGHT MAP)
Electronics Devices
7400, 7402, 7404,7408,7432,7486, and 74266 IC
resistor)
Tools and Materials

Equipment

Cutter pliers
A B C D X
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
A. Solve the truth table using a four-variable k-map.

DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

Name: _________________________________________ Date: _____________
LABORATORY 14
MULTIVIBRATOR CIRCUIT
USING LM 555 INTEGRATED CIRCUIT (IC) TIMER
Electronics Devices
LM555 IC
Resistor / Variable resistor (Potentiometer)
Electrolytic and ceramic capacitor
resistor)
Tools and Materials

Equipment

Cutter pliers

TASK: Design a multivibrator circuit using LM555 IC.
A. Draw the physical design of the multivibrator circuit using LM555 IC.
B. Complete the table using different resistance values for R1 and C.

R1 R2 C t1 t2 Ttotal f

Solutions:

DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

Name: _________________________________________ Date: _____________
LABORATORY 15
FLIP FLOP CIRCUIT

DESIGN, IMPLEMENTATION, AND CIRCUIT SIMULATION
Electronics Devices
7400, 7402, 7404,7408,7432,7486, and 74266 IC
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK 1. Analyzed the design of the D flip-flop circuit.

A. Draw, implement, and simulate the D flip-flop circuit.
B. Complete the truth table of D flip-flop.
Clock D Q Q’
0 0
1 0
0 1
1 1
TASK 2. Analyzed the design of the JK flip-flop circuit.

A. Draw, implement, and simulate the JK flip-flop circuit.
B. Complete the truth table of JK flip-flop.
J K Q Q’
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1

DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

Name: _________________________________________ Date: _____________
LABORATORY 16
COUNTER CIRCUIT
Electronics Devices
74LS192 IC - Up/ Down counter
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK. Given the Circuit of 74LS192 Up/down counter analyzed, implement, and
simulate output.

A. Draw the physical implementation of the given counter circuit.
B. Complete the truth table of the given counter circuit.
Clock (cycle_ D1 Q0 Q1 Q2 Q3
1st 1
nd
2 1
rd
3 1
th
4 1
th
5 1
th
6 1
th
7 1
th
8 1
th
9 1
th
10 1
th
11 1
th
12 1
th
13 1
th
14 1
th
15 1
th
16 1

DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

Name: _________________________________________ Date: _____________
LABORATORY 17
DECODER CIRCUIT
Electronics Devices
74LS47 IC - 7- segment decoder/display driver
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK. Given the design circuit for a seven-segment decoder/display driver using
74LS47 IC.

A. Draw the physical implementation of the given 7- segment decoder/display driver
circuit.
B. Complete the truth table of the given counter circuit.
INPUTS DECODED OUTPUT

DECIMAL
D C B A a b c d e f g
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1

DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

Name: _________________________________________ Date: _____________
LABORATORY 18
SEVEN-SEGMENT DISPLAY
Electronics Devices
Seven-Segment Display (Common Cathode)
Resistors, DIP switch 4 position
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK: Given the Circuit of a seven-segment display common cathode implements

and analyze the output.

A. Draw the physical Seven-segment display common cathode.
B. Complete the table of the given seven-segment display.
INPUTS
DISPLAY
a b c d e f g
0
1
2
3
4
5
6
7
8
9
1 1 1 0 0 1 0 x
1 1 0 0 1 1 0 x
1 0 1 1 1 0 0 x
0 1 1 0 1 0 0 x
1 1 1 0 0 0 0 x
1 1 1 1 1 1 1 x

DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

Name: _________________________________________ Date: ______________
LABORATORY 19
DECADE COUNTER (0-9 DIGITS)
Electronics Devices
LM555 Timer IC
74LS192 Decade Up/Down Counter
74LS47 BCD to Segment Decoder/Driver
Seven-segment display, Resistors, Capacitors
resistor)
Tools and Materials

Equipment

Cutter pliers
TASK: Given the circuit of a seven-segment display common anode implements and
Analyzed the output.

A. Draw the physical circuit design of the decade counter display count down (9-0
digits) using seven segments of common anode display.
B. Complete the table of the given decade counter seven-segment display.
INPUTS
DISPLAY
a b c d e f g
0
1
2
3
4
5
6
7
8
9
1 1 1 0 0 1 0 x
1 1 0 0 1 1 0 x
1 0 1 1 1 0 0 x
0 1 1 0 1 0 0 x
1 1 1 0 0 0 0 x
1 1 1 1 1 1 1 x

DISCUSSION
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
CONCLUSION(S)
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________

BIBLIOGRAPHY

BOOK REFERENCES
Cruz, M. O., Rodriguez, E. A., Chua, M. G., Apsay, M. B., Albano, G. R., & Mangahas,
R. B. (2015). Information Technology Fundamentals. Jimczyville Publications.
Linder, Jacob; Robinson, Jason W. A. (2 April 2015). "Superconducting spintronics".

Nature Physics
Parsons, J. J. (2012). Computer Concepts: Introduction to Computers. Cengage Learning

Pte ltd.
Sharma, P. (2011). Computer Organization. S.K. Kataria & Sons.
Strukov, Dmitri B.; Snider, Gregory S.; Stewart, Duncan R.; Williams, R. Stanley (2008).
"The missing memristor found"
Tirol, Benjo (2012). Learning Digital Electronics. Electronics Hobbyist Publishing

House. Manila.
Wakerly, J. F. (1999). Digital design: Principles and practices (3rd ed.). Hoboken, NJ:
Pearson Education.
Winston S. Sirug, P. (2012). Fundamentals of Discrete Mathematics. MINDSHAPERS

CO., INC.
WEB REFERENCES
Astable Multivibrator using a 555 Timer IC Working. (2015, July 21). Retrieved from
https://www.elprocus.com/astable-multivibrator-using-555-timer/
Bigwood, R. (2005). Digital Logic Gates. Retrieved from Digital Logic Gates Web Site:
http://www.ee.surrey.ac.uk/Projects/CAL /digital-logic/gatesfunc/index.html
Bistable Multivibrator or Flip-flop Multivibrator. (2018, March 04). Retrieved from

https://www.electronics-tutorials.ws/waveforms/bistable.html
Boolean Algebra Simplification. (n.d.). Retrieved from

https://www.tutorvista.com/content/math/boolean-algebra-simplification/

Boolean Algebra. (n.d.). Retrieved from https://www.electronics-
tutorials.ws/category/boolean
Combinational Logic Circuits using Logic Gates. (2018, January 28). Retrieved from
https://www.electronics-tutorials.ws/combination/comb_1.html
Combinational Logic Circuits. (n.d.). Retrieved from http://electronics-
course.com/combinational-logic
Digital Electronics: Types of Flip-Flop Circuits? (n.d.). Retrieved from

https://www.dummies.com/programming/electronics/diy-projects/digital-electronics-
types-of-flip-flop-circuits/
Dr. S.P.S Saini (n.d.). COMPUTER SYSTEM ARCHITECTURE AND

ORGANISATION
ELE Times. (2017, November 02). Market Research on 2D Electronics Market 2017 and
Analysis to 2027. Retrieved from https://www.eletimes.com/market-research-2d-
electronics-market-2017-analysis-2027
Fawad. (n.d.). Flip Flops. Retrieved from https://www.daenotes.com/electronics/digital-

electronics/flip-flops-types-applications-woking
http://www.newworldencyclopedia.org/entry/Decimal
https://en.wikipedia.org/wiki/
https://math.stackexchange.com/questions/371972/what-would-base-1-be
https://www.factmonster.com/math/numbers/rounding-numbers-rules-examples-
fractions-sum
https://www.khanacademy.org/math/pre-algebra/pre-algebra-exponents-radicals/pre-
algebra-
scientific-notation/v/scientific-notation
https://www.mathsisfun.com/definitions/rounding.html
Karnaugh Map. (2010). Retrieved from

https://www.seas.upenn.edu/~cit595/cit595s10/lectures/kmap.pdf
Karnaugh Maps. (1998, April). Retrieved from

http://www.ee.surrey.ac.uk/Projects/Labview/minimisation/karnaugh.html

Kolodziejczyk, B., & Monash University. (n.d.). The 5 next trends in electronics.
Retrieved from https://www.weforum.org/agenda/2015/08/5-next-trends-in-electronics/
Kuphaldt, T. R., Crunkilton, D. , Papaliakos, G. Z., & Zitzelsberger, D. (2007). Lessons
in Electric Circuits - Digital (4th ed., Vol. 4, Last Series). Retrieved from
https://www.allaboutcircuits.com/textbook/digital/
Learn about electronics. (n.d.). Retrieved from http://www.learnabout-

electronics.org/Digital/dig54.php
Margaret Rouse, I. W. (1999-2018, May). Tech Target. Retrieved from What is Web
Site: http://www.whatis.techtarget.com/definition/logic-gate-AND-OR-XOR-NOT-
NAND-NOR-and-XNOR
Memristor. (2018, September 03). Retrieved from

https://en.wikipedia.org/wiki/Memristor#cite_note-Williams08-3
Multivibrators include Monostable, Astable, and Bistable. (2018, March 04). Retrieved
from https://www.electronics-tutorials.ws/sequential/seq_3.html
Multivibrators: astable, monostable, and bistable with applications. (2017, September

10). Retrieved from https://physicsabout.com/multivibrator/
PickICT. (2013, August 09). Retrieved September 08, 2018, from

https://www.youtube.com/watch?time_continue=45&v=TBADs7knuWM&ab_channel=
PickICT
Properties of Boolean algebra. (n.d.). Retrieved from

https://www.eecs.yorku.ca/course_archive/2008-
09/S/1520/LectureSchedule/secA/Properties of Boolean algebra.htm
Spintronics. (2018, July 15). Retrieved from

https://en.wikipedia.org/wiki/Spintronics#cite_note-11
UTC. (n.d.). 9 Hottest Embedded Electronics Trends in 2016. Retrieved from

https://www.sparkfun.com/news/2006
What is a Multivibrator? (n.d.). Retrieved from http://www.tech-

faq.com/multivibrator.html
What is DeMorgan's Theorem? - DeMorgan's First & Second Theorem. (2017, April 10).
Retrieved from https://circuitglobe.com/demorgans-theorem.html

What is register (processor register, CPU register)? - Definition from WhatIs.com. (n.d.).
Retrieved from https://whatis.techtarget.com/definition/register
Retrieved from: https://www.dummies.com/article/technology/electronics/general-

electronics/electronics-safety-rules-181916/
Retrieved from: https://safetyculture.com/topics/electrical-hazards/10-electrical-safety-
rules/
Retrieved from: https://www.sii.co.jp/en/me/battery/support/caution2/
Retrieved from: https://www.tinkercad.com/dashboard
Retrieved from: https://circuitverse.org/simulator

0 1 0 0 0 0 0 0
0 1 0 0 0 0 1 1
0 1 1 0 1 0 0 1
0 1 1 1 0 0 1 0
0 1 1 0 1 0 1 1
0 1 1 0 1 0 0 1
0 1 1 1 0 1 0 0
0 0 1 1 0 0 1 1
0 1 0 0 0 1 0 1
0 1 0 0 0 1 1 1
0 1 0 0 1 1 1 0
0 1 0 1 0 0 1 0
0 0 1 0 1 1 1 0
0 1 0 1 0 0 1 0
0 1 0 0 1 0 0 1
0 1 0 0 0 0 1 1
0 1 0 0 0 0 0 1
0 1 0 1 0 0 1 0
0 1 0 0 0 1 0 0
0 1 0 0 1 1 1 1
0 1 0 0 0 0 1 0
0 0 1 0 1 1 1 0
0 1 0 1 0 0 1 1
0 1 0 0 0 0 0 1
0 1 0 0 1 1 1 0
0 1 0 0 0 0 0 1
0 1 0 0 0 1 1 1
0 1 0 1 0 1 0 1
0 1 0 1 0 0 1 1
0 1 0 1 0 1 0 0
0 1 0 0 1 0 0 1
0 1 0 0 1 1 1 0 Copyright © 2023
By Cirkit3TM Electronics
0 0 1 0 1 1 1 0
0 0 1 0 1 1 1 0 CIRKIT3 TM ELECTRONICS 131
0 0 1 0 1 1 1 0
0 0 1 0 1 1 1 0

FINAL - DLOG LABORATORY MANUAL v.11

Uploaded by

Copyright:

Available Formats

FINAL - DLOG LABORATORY MANUAL v.11

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

FINAL - DLOG LABORATORY MANUAL v.11

Uploaded by

Copyright:

Available Formats

0 1 0 0 0 0 0 0

CIRKIT3 TM ELECTRONICS iii

Thru the advancement of technology, today digital electronics is very interesting

This laboratory manual has objectives as follows:

CIRKIT3 TM ELECTRONICS vii

Electrical and Electronics Safety Rules

 Keep your work area dry and clean

CIRKIT3 TM ELECTRONICS viii

Retrieved from: https://www.arrow.com/en/research-and-events/articles/resistor-

How to read Light-emitting Potentiometer values?

Retrieved from: https://buatkreasiaja.com/justelectro/how-to-measure-potentiometer-

Retrieved from: https://shop14720.tinerahbek.com/category?name=list%20of%20

How to read Light-emitting diode values?

Retrieved from: https://www.pinterest.ph/pin/126100858289724370 /

DISCUSSIONS AND EXAMPLES

NOT GATE SCHEMATIC SYMBOL TRUTH TABLE

CIRCUIT DIAGRAM PHYSICAL DEVICE

A. Circuit Design B. Truth Table

Input is 0 LED 1 (ON)

Input is 1 LED 0 (OFF)

AND GATE SCHEMATIC SYMBOL TRUTH TABLE

2 Input AND gate

CIRCUIT DIAGRAM PHYSICAL DEVICE

A. Circuit Design B. Truth Table

2 Input AND gate

Input A is 1 and input B is 0, LED1 is OFF.

Input A is 1 and input B is 1 LED1, is ON.

AND GATE SCHEMATIC SYMBOL TRUTH TABLE

CIRCUIT DIAGRAM PHYSICAL DEVICE

Figure 4: OR gate symbol, Truth table, Connection diagram, and 74LS32 IC

A. Circuit Design B. Truth Table

Input A is 1 and input B is 0, LED1 is OFF.

Input A is 1 and input B is 1 LED1, is ON.

AND GATE SCHEMATIC SYMBOL TRUTH TABLE

2 Input NAND gate

CIRCUIT DIAGRAM PHYSICAL DEVICE

A. Circuit Design B. Truth Table

2 Input NAND gate

Input A is 1 and input B is 0, LED1 is ON.

Input A is 1 and input B is 1 LED1, is OFF.

AND GATE SCHEMATIC SYMBOL TRUTH TABLE

2 Input NOR gate

IC CONFIGURATION PHYSICAL DEVICE

Figure 4: NOR gate symbol, Truth table, IC Configuration, and 74LS02 IC

A. Circuit Design B. Truth Table

2 Input NOR gate

Figure 1. Input A is 0 and input B is 0, LED1 is ON.

Figure 2. Input A is 0 and input B is 1, LED1 is OFF.

Figure 3. Input A is 1 and input B is 0, LED1 is OFF.

Figure 4. Input A is 1 and input B is 1 LED1, is OFF.

AND GATE SCHEMATIC SYMBOL TRUTH TABLE

2 Input XOR gate

CIRCUIT DIAGRAM PHYSICAL DEVICE

A. Circuit Design B. Truth Table

2 Input XOR gate

Figure 1. Input A is 0 and input B is 0, LED1 is OFF.

Figure 2. Input A is 0 and input B is 1, LED1 is ON.

Figure 3. Input A is 1 and input B is 0, LED1 is ON.

Figure 4. Input A is 1 and input B is 1 LED1, is OFF.