_...

---··-----------'
YAMAH~i.Si

YMF262
FM 0perator Type L3 (OPL3)
1

•OVERVIEW
The YMF262 (0PL3) was developed as a sound source LSI for computer and game equipment.
The YMF262 contains an FM sound source which may be controlled by software. In addition, five
different rhythm sounds (bass drum, snare drum, tom tom, top cymbal and hi hat cymbal) are avail·
able. The YMF262 is register compatible with the YM3812 (0PL2), with twice the number of signal
sources, four new operator modes, selectable waveform and stereo output.

•FEATURES
• Registers are compatible with YM3812 (0PL2) FM sound source.
• Up to six sounds can b1a used as four-operator melody sounds for variety.
• 18 simultaneous melody sounds, or 15 melody sounds with five rhythm sounds (with two oper·
a tors).
• Six four-operator melody sounds and six two-operator melody sounds, or six four-operator
melody sounds, three two-operator melody S()unds and five rhythm sounds (with four operators).
• Eight selectable waveforms.
• In addition to L and R channels, two auxiliary channels are provided. Interface with YAC512
(stereo DAC).
• LFO for vibrato a11d trE!molo effects.
• Two programmable tim1ars.
• Shorter register access time compared with YM3812.
• 5V single supply sHicon gate CMOS process.
• 24 Pin SOP Package.

'YAlVlAHA CORPORATION--;::::::==vM=F2=52=c=Ar=A==Lo=G====,
CATALOG No. : LSl-4MF2622
1991. 10
 YMF262
• BLOCK DIAGRAM

Data Bus
Contr~

----
J Contr~
· Timm J Timer

MO
Envelope Accumulator
Operator
Genera.tor (OP)
(EG) Accumulator EX TOUT

Phase Vibrato,
DO - D7 Register } Generator Amplitude
Array
(PG)
----- Modulation

------
• PIN OUT DIAGRAM of 'YM:F262-M
24 ¢M
I

2
0 23 ¢SY

3 22 EXT OUT

4 21 MO

5 zo SMPL

6 19 SMPR

7 18 D7

8 17 D6

9 16 05

10 15 D4

II 14 03

12 13 DZ

24PIN SOP Top View

2
YMF262
• PIN CONFIGURATION
No. 1/0 Pin Name Function
1 - VDD .t-5V supply
2 OD /IRQ 1rim er interrupt request
3 I+ /IC ] nitilal clear
-
4 I AO cPl1 interface - Address select input
5 I Al cPlT interface Address select input
6 I /WR cPlr interface Write enable input
7 I /RD cPlT interface Read enable input
8 I+ !CS cPl'f interface Chip select input
-
9 0 TEST L SI test pin (normally NC)
10 110 DO cPU· interface Data bus (LSB)
11 110 DI cPU' interface Data bus
12 Vss Ci round
13 1/0 D2 cPU interface Data bus
14 I!O D3 cPU interface - Data bus
15 l/O D4 c PU interface Data bus
16 1/0 D5 cPU interface Data bus
17 1/0 D6 cPU interface -
Data bus
18 1/0 D7 c PU interface Data bus (MSB)
19 0 SMPR D AC' interface R channel sample/hold
-
20 0 SMPL D AC'interface L channel sample/hold
21 0 MO r •AC'interface ( ~A!.N vii) Sound source serial data output
22 0 EX TOUT D AC: interface ( AV l\ vH) EXT serial data output
23 0 ¢SY D AC' interface oLK Data latch signal
24 I <t>M 1\.fas ter clock input (14.32 MHz)

Note: OD is open drain output pil:l.

I+ is pull up input pin.

3
 YMF262
•FUNCTIONS
1. Master Clock ¢M
All operations in the LSI are controlled by the 14.32 MHz master clock signal applied to the ¢M pin.

2. CPU Interface /CS, /RD, fWR, AO, Al, DO-D7

Sound generation is controllt~d by writing data in these registers. Writing data to a register or
reading the status from a registBr is accomplished through an 8 bit parallel CPU interface signal.
DO-D7 are a bidirectional data bus, and /CS, /RD, /WR, AO, and Al are data bus control signals.
The data bus is controlled as follows:

/CS /RD /WR AO Al CPU Access Mode

H x x x x Inactive mode
l11 A I '' : ;! ,,
L H L L L/H Address write mode
L H L H x Data write mode
L L H L L Status read mode (~ 1) }_ j /)

X: Don't care
Note: Operation in states other than those listed above is not guaranteed.

(a) Inactive mode

When /CS= 'H ', the data bus DO·D7 are in a high impedance state.

(b) Address write mode

This mode is used to specify the write address. For register array 0, Al= 'L '. For register array
l, Al='H'. The address of the data should be output on the data bus. After this cycle, data
may be written in data wirite mode after a minimum of 4 master clock cycles.

(c) Data write mode

Write data at the address specified previously. The data to be written should be output on the
data bus. A wait of at least 4 master clock cycles is required before the next address write or
data write.

(d) Status read mode

Read the status of the LSI. The status is output on the data bus.

4
YMF262
3. DAC Interface MO, EXTOUT, ¢SY, SMPL, SMPR
The generated digital sound data is output from MO serially, LSB first. Connect this signal to
YAC512 to convert to analog output. The signals ¢M, ¢SY, SMPL and SMPR generate interface
timing signals. Data can be output to EXTOUT for future expansion .
•.. . .. ·
__,-·
:~

¢ s ,. JlJU1JUlJlJlJlJ{U

MO II
(LSBl
I II I !·1b::=~~~~::~~-~~~-~~~~-----
Leh

EXTOUT 11,11.1 1 in==~~~:~:~.~~~~~~~~~~~~~

(LSB) EXTOUT-· I
S~t PL _r-----1
S~IPR _ _ _ _ __

.· 11.]JP!t

YMF262 YACS 12

¢SY CLK

EXT OUT DIN

MO SMP2 CH2
·- v EXTOUT-0
SMPL J SMR'I CHI

SMPR Ji EXTOUT-1

YACS 12

CLK
DIN

SMP2 CHZ
'\.) Reh
SMPI CHI
Leh

Note: The same signal is output at the MO terminal and the EXTOUT terminal.

5
 VMF262
• REGISTER MAP

REGISTER ARRAY 0 (A 1 = 'L') REGISTER ARRAY 1(A1 = 'H')

ADDR

D~3~~
<HEX)
D7 D6 D5 Dl DO D3 D2 Dl DO

$ 0 1 LSI TES T LSI TEST

$ 0 2 TIMER 1

$ 0 3 TIMER 2

$ 0 4 RST MTl MT2

$ 0 5
-- --
$ 0 8 lLj NTS
---
!
$ 2 0

$ 3 5
AM VIB EGTKS[ MULT AM VIB EGT KSR MULT

$ 4 0
I
+----+---~------------------~
KSL TL KSL TL
$ 5 5
I l J_
r T
$ 6 0
AR DR AR DR
$ 7 5

s80
l
r
J_
I
J_
r +-f,---,--t--------+-----t
SL RR SL RR
$ 9 5
+-f~----------------~---+----
l J_ J_
l I I
$AO
F NUMBER ( L) F NUMBER(L)
$AB
l
+-+----'
~
$ B 0
KON BLO< FNUM(H) KON BLOCK FNUM(H)
$BB

$BD DAM DVB RYT BD SD ~OM TC HH

$CO
I EXl EXO STL STR. FB CNT EXl EXO STL STR FB CNT
$ c8

~
$EO

$F5

Note: All registers are cleared at reset.

6
 VMF262
• FM SIGNAL SOURCE OUGANIZATION

Channel signal 1 3 4 5 6 7 8 9
(twcroperator) RYT RYT RYT
Channel signal 1 2 3 I ~ .,/'17
r--(f_ou_r_~_p_e_ra_t_or_)______--+--·..---+-·--.·--+---.---1---..-l_ --~2--1--...,..-3-+IL__J---.--~~'--...--~~f---,-~-1J
Slot l signal 1 2 3 7 8 9 13 14 15
Slot 2 signal 4 5 6 10 11 12 16 17 18
Register settings for 20 21 22 28 29 2A 30 31 32
the slot (Al= L ') 23 24 25 2B 2C 2D 33 34 3S
40 41 42 48 49 4A 50 51 S2
43 44 4S 4B 4C 4D 53 54 5S
60 61 62 68 69 6A 70 71 72

I ISEOO :: 81 :: 82 :: 88 :: 89 :: 8A : : 90 :: 91 :: 92 ::
1
El £2 EB E9 EA FO Fl F2
j
I
i Register settings for
/ channel (two-operator,
/ A1 ='L ')
I Au
E3

B0
C0
E4 ES EB

AJ
Bl.
Cl
EC ED

A2
B2
C2
F3 F4

A3
B3
C3
FS

A4
B4
C4
AS
BS
cs
A6
B6
C6
A7
B7
C7
AB
BS
CB
,___~~--------------- ----+-------+-----+-----+-----+------.J.------'------...1
i Register settings for AO Al A2 C3 C4
1
CS !~
channel (four-operator, B0 B1 B2 J
I A 1 = 'L') c0 c1 c2
~~------~------..___ _ _ j _ __,__..______.I_____ ~_____._____..::._______________.;
I

l Channel signal
i (two-operator)
J, 1 ;T
~
11 12 I 13 14 lS 16 17 18
~I_C_h_ann_;._el-s-ign~al~--------,-4- I -S---+-·-6----+------1------+-----+[//7----+[//7----~~-----.1
1---(f_ou_r_·o_p_er_a_to_r_)_______._J__ .--+- 4 5 6
I Slot I signal !I 9 ! J 2~ 2I 25 26 27 3I 32 33

i Slot 2 signal J 22 ~3 24 28 29 30 34 35 36
f Register settings ! 2 OJ 2 1 --i-2-2+--+-2-8-+---+-2-9+--+-2-A-1--+3-0-1---1-3-1-+---1-3-2-4---1
1
for the slot (Al='H') 23 24 2S 28 2C 2D 33 34 35
40 41 42 48 49 4A 50 51 52
43 44 45 4B 4C 4D 53 54 55
60 61 62 68 69 6A 70 71 72
63 64 65 6B 6C 6D 73 74 75
80 81 82 88 89 SA 90 91 92
83 84 85 SB SC SD 93 94 95
EO El E2 EB E9 EA FO Fl F2
E3 E4· E5 EB EC ED F3 F4 F5
Register settings for AO Al A2 A3 A4 A5 A6 A7 AB
channel (two-operator, BO Bl B2 B3 B4 BS B6 B7 BB
Al='H1 co Cl C2 C3 C4 C5 C6 C7 CB
Register settings for
channel (four-operator,
AO
BO
c()
Al
Bl
A2
B2
C3 C4
cs~
I Al='H') Cl C2

7
 VMF262
----------~---------------,------------------------------------------------~

•REGISTERS
(1) Description

TIMER 1: Timer 1 preset v~Llue:

Timer 1 is an 8 bit preset counter. This counter is every BOµS, and /IRQ is generated when the
counter overflows. TIMER 1 is the preset value. When overflow occurs, this value is auto-
matically re-loaded into th1~ c<>unter. The time until /IRQ is generated (tov) is calculated as
follows:
tov[ms]=(255-Nl)*0.08
Nl=D7*27+])6*~i+])5•2s+D4*24+D3*23+D2•22+n1•2+DO

TIMER 2: Timer 2 preset value

Timer 2 is an 8 bit preset co1Jnter. This counter is every 320µ8, and /IRQ is generated when the
counter overflows. TIMER 2 :is the preset value. When overflow occurs, this value is auto-
matically re-loaded into thE~ counter. The time until /IRQ is generated (tov) is calculated as
follows:
tov[ms] = (255· N 1 )*0.32
Nl =D7•21+ D6 1"26+ Ds•2s+ D4*2 4+ D3*23+ D2•22+ Dl *2+ DO

RST URQ RESET): /IRQ reset

Reset the /IRQ signal generatied by timers 1 and 2. RST= 'l' sets /IRQ= 'H '.

MTl (MASK TIMER!): Timer Jl mask

If MTl = '1 ·, /IRQ is not geinerated when timer 1 overflows.

MT2 (MASK TIMER2): Tim er 2 mask1

If MT2= 'l ', /IRQ is not geinerated when timer 2 overflows.

STl (START TIMER!): Tim1er Jl control

When S'Tl =1 ', timer l loads: the preset value and starts counting. If STl ='O ', timer l is stopped.

ST2 (ST ART TIMER2): Tim1er ~~ control

When S'T2= 1 ',timer 2 loads; the preset value and starts counting. If ST2= 'O ',timer 2 is stopped.

NTS (NOTE SEL): Keyboard~lit selection

Selects the keyboard split method to determine the key scale number.

8
YMF262
When NTS=O

BLOCK Data 0 1 2 3 4 5 6 7
F·NUMBER MSB • • • • • • • •
F·NUMBER 2nd 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Key scale No. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

When NTS=l

BLOCK Data 0 1 2 3 4 5 6 7
F·NUMBER MSB 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
F·NUMBER 2nd
Key scale No. 0
±
• • • • • • • • • • • • • • • •
1 2 3 4 5 6 7 8 9 10 11 12 13 14

*: Don't care
15

AM (AMPLITUDE MODULATION): Tremolo on/off

Turns tremolo on for the co:rresponding slot when AM= 'l '. The repetition rate is 3. 7 Hz, and
the depth is controlled by DAM.

VIB (VIBRATO): Vibrato on./off

Tums vibrato on for the corresponding slot when VIB= '1 '.The repetition rate is 6.4 Hz and
the depth is controlled by DVB.

EGT (ENVELOPE TYPE): Select sustain.Idec~

EGT= 'l' selects susta.i.11ed sound, and maintains the SUSTAIN LEVEL while KON is 1.
EGT= 'O, selects decay, m1d the RELEASE RA TE takes effect even if KON is maintained at 1.

SL

I
'
___K_E_Y_O_N_________ _J
I

___J~· KEY OFF

KEY ON

9
 VMF262
KSR (KEY SCALE RATE): Select key scale RATE
With normal musical instrw:nen.ts, the attack/decay rate becomes faster as the pitch increases.
The key scale RA TE contrCJ~ls isimulation of this effect. An offset is added to the individual
ATTACK, DECAY and RE.LEASE rates as follows:
Actual rate=Rate value*4+ Rof
If rate value=O, actual rate =O.
Rof is set as follows depending on the KSR setting:

Key scale No. 0 ]. 2 3 4 5 6 7 8 9 10 11 12 13 14 15

KSR=O 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3
Rof
KSR=l 0 l 2 3 4 5 6 7 8 9 10 11 12 13 14 15

MULT (MULTIPLE): Frequency data multiplier

Sets the multiplier for the frc~quency data specified by BLOCK and F·NUMBER. This multi-
plier is applied to the F'M ciiL?Ticer and modulation frequencies.

MULT 0 1 2 3 6 7 8 9 A B c D E F
Multiplier 112 1 2 3 : I: I 6
I 7
I 8 9 10 10 12 12 15 15

KSL (KEY SCALE LEVEL): JKey scale level selection

With musical instruments, vcllume decreases as pitch increases. LEVEL key scale values are
used to simulate this effect:

~-t-s~_n_u_a-tio-n--l--~--h5d:l_loc_t
1 3
,.... __.__s_dB_ 1_oc_t_-.
___ f 1_oc_t_,
6d_B_

TL (TOT AL LEVEL): Modulation, volume setting

Attenuation is performed according to the envelope generator output. The modulation or
volume is controlled.
Attenuation=24*D5+ 12*D4+6*D3+3*D2+ l.5*Dl +0.75*DO (dB)

AR (ATTACK RATE): Attack rate setting

Attack rate=23*D7+22*D6+2*D5+D4

DR (DECAY RATE): Decay rEtte setting

Decay rate=23*D3+2 2 *D2+2*Dl+DO

10
YMF262
SL (SUSTAIN LEVEL): Sustained level setting
Sustain level=24•D7+12*D6+6*D5+3•D4
When D7=:D6=D5=D4=1, level=93dB

RR (RELEASE RATE): Re~lease rate setting

Release rate=23•Da+22•:02+2•:01+DO

FNUM (F-NUMBER): Scal1e data within the octave

Gives pitch data along with BLOCK data.
F-NUMBER=f*219/fs/2BLOCK·l
(f: frequency; fs: sampling frequency; fs=fM/288)

KON (KEY-ON): /Sound generation ON/OFF

If KON= 'l ',the channel generates sound.

BLOCK: Octave data

Generates octave data with F-NUMBER data.

DAM (AMPLITUDE MODULATION DEPTH): Select amplitude modulation depth

When DAM='l ', 4.SdB. When DAM='O', ldB.

DVB (VIBRATO DEPTH): Select vibrato depth

When DVB= 'l ', 14 perce:nt. When DVB= 'O', 7 percent.

RYT (RHYTHM MODE): SelE?ct rhythm sound mode

Channels 7-9 are used for rhythm soWlds when RYT= 'l '.

BD (BASS DRUM), SD (SNARE DRUM), TOM (TOM TOM), TC (TOP CYMBAL), HH (HI-HAT):
ON/OFF
Sound output on/off switc=h for each sound. When any of these is set to l, the corresponding
sound is generated.

lthytrun Sound Slot Used

BASS DRUM 13. 16

SNARE DRUM 17
TOM T OM 15
TOP- CYMBAL 18

lHI-HA T 14
I
11
 VMF262
FB (FEED BACK): Modulatfon depth for slot 1 FM feed back

__
~1~-B-od_u-la-t-io-n-------1~ ~~~,---I :_1s~~-l~~w_:______~_~_2_____:______2_:_____4_:___
NEW: OPL3/0PL2 Operation selection
If NEW= 'l ', OPL3 operation is selected and data is written when Al= 'H '.To use OPL3 func-
tions, write NEW= 'l' during initialization.

CNT (CONNECTION): Operator connection

Two-operator mode uses thE~ following connection:

C:\T=·o· CNT= '1'

OPI

0 P I
:J-our p 2
0 p 2
.,._ OUT

In four-operator mode, both CNT bits are used to specify the connection:

Channel No. (four-operator) l 2 3 4 5 6

CNT Address CO, C3 Cl, C4 C2, CS co.cs Cl, C4 C2, C5
Al 'L' 'H'

The connection is as follows:

12
YMF262
CI\T(Cn) = '0'. CNT(Cn:+3) = 'O'

OPI
{~ 0 p 3 OP4 OUT

__j P31

C:\T(Cn) = 'O'. CNT(Cn.+3:) = 'l'

,._OUT

p 3
0 p 3

C:\T(Cn) = · 1., C.'.\T(Cn+3) = 'O ·

p 2
0 p 2 OP4 OUT

C:\T ( Cn) = . 1 ', C:'\T ( Cn + 3) = ' 1'

~~.__O_P l_ _ P-----
p 2
0 p 2 1- { OP3 .

_P
4-· I 0 p 4 ~..____,

13
 YMF262
WS (WA VE SELECT): Select waveform
Select the waveform 1tlsed for carrier and modulation.

WS=O
'- WS=4
4:; I

WS=l L • WS=5
{\{\ I

I
!
WS=2 L WS=6
I J

\\'S = 3 L I WS=7
~
C..t-t:l.. 1- ctt1.. p... 0#2 L C\i}:f ~
STL (STEREO L), STR (STEREO R), EXl (EXTOUT 1), EXO (EXTOUT 0): Select output
When any of these bits is siet to l, data is output to the corresponding channel. STL and STR
are output from the MO pJln, and EXl and EXO are output from the EXTOUT pin.

CONNECTION SEL: Four·o~·ator mode

CONNECTION SEL D5 D4 D3 D2 Dl DO
Four-operator channel 6 5 4 3 2 1
Two-operator channels used 12, 15 11, 14 10, 13 3, 6 2, 5 1,4
-

14
VMF262
(2) Status

~ -----t-D_7
B_i_t
~tatus
--------------------
~6 D5 D4} D3 l p2 IDl IDO I
,_...__,________
IRQ FTl FT2

FTl (FLAG TIMERl): Timer 1 overflow flag

This flag is set to 1 when. timer 1 overflow or.curs.
This flag is not reset unfoss RST is written.

FT2 (FLAG TIMER2): Timer 2 overflow flag

This flag is set to 1 when timer 2 overflow occurs.
This flag is not reset unfoss RST is written.

IRQ (INTERRUPT REQUEST): Interrupt request

Set to 1 if FTl or FT2 is set. This flag is not reset unless RST is written.

16
 YMF262
• YMF262 ELECTRICAL CHARACTERISTICS
1. Absolute Maximum RatingH
Item Symbol Rating Unit
Power supply voltage VDD -0.3-7.0 v
Input voltage VI -0.3-VDD+0.5 v
Operating temperature Top 0-70 oc
Storage temperature Tstg -50-125 oc

2. Recommended Operating Conditions

I tern Symbc]l Minimum Typical Maximum Unit
Power supply voltage VDD 4.75 5.00 5.25 v
Operating temperature Top 0 25 70 oc

3. DC Chateristics (Conditions; Ta=O- "'/0°C, Vnn=5.0 ± 0.25V)

Item Symbol Conditions Min. Typ. Max. Unit
-
Power consumption w VDD=5.0V 50 mW
fM=14.32MHz
Input highlevel voltage 1 VIHI
--•1 2.2 v
Input lowlevel voltage 2 VILl •1 0.8 v
·-+· -
Input highlevel voltage 2 VIH2 •2 3.5 v
Input lowlevel voltage 2 VIL2 •2
·--t-·
1.0 v
Input leakage current ILK VI=0-5V, •3 -10 10 µA
·--t-·
Input capacity CI 10 pF
·--+·
Output highlevel voltage VOH loH=-80µA VDD -1.0 v
Output lowlevel voltage VOL IOL=2.0mA 0.4 v
Output capacity Co 10 pF
·--t-·
Leakage current lLOFF Vl=0-5V, •4 -10 10 µA
·--t-·
Pull up registance RPU 80 400 kO
Note) *l: Applied to /WR, /RD, /CS, AO, Al, DO-D7 (when used as input pins)
•2: Applied to ¢M, /IC
*3: Applied to ¢M, /WR, /RD, AO, Al, DO-D7 (When used as input pins)
*4: When DO-D7 are in high impedance

16
VMF262
4. AC Characteristics (Conditions; Ta=O- 70°C, Voo=5.0 ± 0.25V)

Item Syl.nbc>l Figure Min. Typ. Max. Unit

-
Master clock frequency fM Fig A·l 10 14.32 16 MHz
Master clock duty I lM 40 50 60 %
Reset pulse width N:lCW Fig A·2 80 cycle • 1
Address setup time 'I'AS Fig A·3, 4 10 nS
Address hold time T AH Fig A·3, 4 10 nS
Chip select write width T< ~SW Fig A·3 100 nS
Chip select read width T~ ~SR Fig A·4 150 nS
Write pulse width T'WW Fig A·3 100 nS
Write data setup time T\VOS Fig A·3 10 nS
Write data hold time TvVD:H[ Fig A·3 20 nS
Read pulse width T RW Fig A·4 150 nS
Read data access time T, ~cc Fig A·4 150 nS
Read data hold time TlmH Fig A·4 10 nS
*l: Master clock cycle

5. Timing Diagram

(1) Input clock timing

¢M

D+
lfMI
I

l"ig A·l

(2) Reset pulse

/IC

Fig A·2

17
 YMF262
(3) Address/Data \\Tite timing

AO

Tcsv.

/CS

Note: Tcsw, Tww, and

TwDH are based on
either CS or WR
being driven to high
D0---07----- level.

Fig A·3

(4) Status read timing

AO

~
/CS--------1-----~----------..-i Note: TACC is based on
T11v. whichever of CS or
RD goes to the low
level last.

Tcsw, Tww, and

TwDH are based on
either CS or WR
D0-07------- being driven to high
level.
Fig A·4

18
YMF262
• DIMENSIONS
• YMF262-M

......----------·-----------------.
l-4f---- I 6.()TVP

Q. IO

-+-++------ ______....._ ...> -

0
&O 0
\ a) N

-- JLl
j B BB B -
II 12
l
---H--0.4 TVP

DIMENSIONS IN MM

L_

19
 VMF262

The specifications of this product are subject to improvement changes without prior notice.
----------------------
-----AGENCY------- --YAMAHA CORPORATION-
Address inquiries to:
Semi·conductor Sales Department
• Head Office ~03. Matsunokijima, Toyooka·mura,
Iwata·gun, Shizuoka·ken. 438-01
Electronic Equipment business section
Tel. 0539-62·4918 Fax. 0539-62-5054
•Tokyo Office 3·4. Surugadai Kanda. Chiyoda·ku,
Tokyo, 101
Ryumeikan Bldg. 4F
Tel. 03·3255-4481 Fax. 03·3255·4488
•Osaka Office 3·12·9. Minami Senba, Chuo-ku.
Osaka City. Osaka, 542
Shinsaibashi Plaza Bldg. 4F
Tel. 06·252-7980 Fax. 06·252·5615
•U.S.A. Office YAMAHA Systems Technology.
---------------------- 981 Ridder Park Drive San Jose, CA95131
Tel. 408·437·3133 Fax. 408·437-8791

COPYING PROHIBITED t· 1988 YAMAfiA CORPORATION 0. 3K 9110 Printed in Japan@