Mod 1 Chap1
Mod 1 Chap1
Mod 1 Chap1
UNIVERSITY
• DEPARTMENT OF CSE
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Compiler
• The compiler is software that converts a program written in
a high-level language (Source Language) to low-level
language (Object/Target/Machine Language)..
• Some compilers
▪ generate machine language
▪ generate assembly language
▪ more portable code such as C code,
• Some create abstract machine code.
• Some just generate data structures that are used by other
parts of a program.
• That is the type of compiler that you will develop. 6
Why study compilers?
• It is useful for a computer scientist to study compiler
design for several reasons.
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• Program translation can be used to solve other problems,
like Binary translation
Machines have continued to change since they have
been invented.
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The 6 phases of a compiler are:
● Lexical Analysis.
● Syntactic Analysis or Parsing.
● Semantic Analysis.
● Intermediate Code Generation.
● Code Optimization.
● Code Generation.
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Qualities in compiler
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Program Execution
• •Execution of a program written in HLL is
basically a 2-step process
1.The source program is compiled first i.e.
translated into the object program.
2. The resulting object program is loaded into
memory and executed
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System Software:
An Introduction to Systems
Programming
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Book
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Chapter 1
Background
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Outline
• Introduction
• System Software and Machine Architecture
• The Simplified Instructional Computer (SIC)
• SIC Machine Architecture
• SIC/XE Machine Architecture
• SIC Programming Examples
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1.1 Introduction
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1.2 System Software and Machine Architecture
• Text editor
• To create and modify the program
• Compiler and assembler
• You translated these programs into machine language
• Loader or linker
• The resulting machine program was loaded into memory and
prepared for execution
• Debugger
• To help detect errors in the program.
Macro processor
• translate macros instructions into its definition
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Application Software Examples.
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System Software vs Application
Software
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System Software Concept
Users
Application Program
OS
Memory Process Device Information
Management Management Management Management
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Bare Machine (Computer)
System Software and Machine Architecture
• Machine dependent
Instruction Set, Instruction Format, Addressing Mode, Assembly
language …
• Machine independent
General design logic/strategy, literals, symbol-defining statements,
program blocks, control sections and program linking…
Machine independent
Machine Dependent
Computer
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1.3 The Simplified Instructional Computer
• SIC refers to Simplified Instruction Computer which is a
hypothetical computer that has been designed to include the
hardware features most often found on real machines, while
avoiding unusual and irrelevant complexities.
• This allows to clearly separate the central concepts of a system
software from the implementation details associated with a
particular machine.
• Like many other products, SIC comes in two versions
• The standard model
• An XE version “extra equipment's”
• The two versions has been designed to be upward compatible
1.SIC (Simplified Instructional Computer)
2.SIC/XE (Extra Equipment) 27
SIC Machine Architecture
1.Memory
• All addresses are byte addresses with words associated by the
location of their Lowest numbered byte.
• Consist of 8-bit bytes.
• 3 consecutive bytes form a word (24 bits)
• Total size of the memory is 32768(2^15) bytes
2.Registers
There are 5 special purpose registers, each registers of which are 24
bits in length
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SIC Machine Architecture
3.Data Formats
• Integers are stored as 24-bit binary number
• 2’s complement representation for negative values
• Characters are stored using 8-bit ASCII codes
• No floating-point hardware on the standard version of SIC.
4. Instruction format
• 24-bit format
• The flag bit x is used to indicate indexed-addressing mode
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opcode x address 29
SIC Machine Architecture
5.Addressing Modes
• There are two addressing modes available
• Indicated by x bit in the instruction
• (X) represents the contents of reg. X
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SIC Machine Architecture
6. Instruction set
a. Integer arithmetic operations: ADD, SUB, MUL, DIV, etc.
All arithmetic operations involve register A and a word in memory,
with the result being left in the register
b. comparison: COMP
COMP compares the value in register A with a word in memory, this
instruction sets a condition code CC to indicate the result
c. conditional jump instructions: JLT, JEQ, JGT
These instructions test the setting of CC and jump accordingly.
d. subroutine linkage: JSUB, RSUB
• JSUB jumps to the subroutine, placing the return address in
register L
• RSUB returns by jumping to the address contained in register L.
e. Load and store registers 31
Instructions to store and load registers are LDA, LDX, STA, STX.
SIC Machine Architecture
7. I/O operations
• I/O are performed by transferring 1 byte at a time to or from the
rightmost 8 bits of register A.
• Each device is assigned a unique 8-bit code as an operand.
• There are 3 I/O instructions
1.The Test Device (TD) instruction tests whether the addressed
device is ready to send or receive a byte of data.(CC is set to <,if
it is ready and set to =, if its not ready).
2. Read Data (RD), reads the data from an input device, if it is
ready to send the data.
3. Write Data (WD) writes the data onto an output device, if its
ready to receive the data
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SIC/XE Machine Architecture
1.Memory:
Structure is same as that of the SIC standard version.
The maximum memory available is 1MegaByte(2^20) bytes.
2. Registers In addition to the registers of SIC standard version,
the following registers are provided in SIC/XE.
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SIC/XE Machine Architecture
3.Data format
• 24-bit binary number for integer, 2’s complement for negative
values
• 48-bit floating-point data type
• The exponent is between 0 and 2047
• The absolute value of the number is represented by f*2(e-1024)
• The sign of floating number is represented by
• 0: for +ve
• 1 for –ve
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S exponent fraction
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SIC/XE Machine Architecture
4.Instruction formats
• Relative addressing - format 3 (e=0)
• Extend the address to 20 bits - format 4 (e=1)
• Don’t refer memory at all - formats 1 and 2
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SIC/XE Machine Architecture
5.Addressing modes
n i x b p e
1. (n, i) Simple n=0, i=0 or n=1, i=1
2. (i) Immediate n=0, i=1 TA=Value
3. (n) Indirect n=1, i=0 TA=(Operand)
4. Base relative b=1, p=0 TA=(B)+disp
0 <= disp <= 4095
5.PC relative b=0, p=1 TA=(PC)+disp
-2048 <= disp <= 2047
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SIC/XE Machine Architecture
6.Instruction Set
In addition to the instruction set, provided in SIC Standard
version, SIC/XE provides following instructions.
•new registers: LDB, STB, etc.
• floating-point arithmetic: ADDF, SUBF, MULF, DIVF
• register move: RMO
• register-register arithmetic: ADDR, SUBR, MULR, DIVR
•supervisor call: SVC generates an interrupt for OS.
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SIC/XE Machine Architecture
7. Input/Output:
• In addition to the I/O instructions provided in SIC Standard
version, SIC/XE provides I/O channels used to perform input and
output while CPU is executing other instructions.
•SIO, TIO, HIO: start, test, halt the operation of I/O channels
respectively
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SIC/XE Machine Architecture
1.Base relative addressing:
bit b=1and p=0 and disp field is interpreted as a 12 bit unsigned
integer in format 3.
2.Program counter relative addressing:
bit b=0and p=1 and disp field is interpreted as a 12 bit signed
integer, with negative values represented in 2’s complement
notation.
3.Direct addressing : The displacement and address fields will
be taken as the target address respectively in format 3 and
format 4, if the bits b and p are both set to 0.
4.Indexed addressing:
If the bit x is set to 1, the content of register X is also added in
the target address calculation. 39
SIC/XE Machine Architecture
5.Immediate addressing :
if the bits i=1 and n=0, the target address itself is the operand
value and no memory is referenced.
6.Indirect addressing:
if the bits i=0, and n=1, the word at the location given by the
target address contains the address of the operand value.
7. Simple addressing: if the bits i =n=0 or i=n=1, the target
address is taken as the location of the operand.
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Calculate the target address generated for
the following machine instruction:
• I. 032600 h
• II. 03C300 h
• III. 022030 h
• IV. 010030 h
• V. 003600 h
• VI. 0310C303 h
Given
• (B)= 006000, (PC)=003000, (X)=000090
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Calculate the value Loaded into
Register A
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