Compal La-6951p r0.3 Schematics

A B C D E
ZZZ1
PCB
DA2@
1 1
Compal Confidential
2
PLA00 LA6951P Schematics Document 2
Intel Sandy Bridge Processor with DDRIII + Cougar Point

AIO M/B
3 3
2010-11-04
REV:0.3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/07/20 Deciphered Date 2011/07/20 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PLA00 M/B LA-6951P Schematic 0.3
Date: Thursday, November 04, 2010 Sheet 1 of 62
A B C D E
5 4 3 2 1
Compal Confidential
VRAM 1/2 GB
*1* :2D Display
Model Name : PLA00
File Name : LA6951P
GDDR5 x8 *2* :3D Display
P.28~31 DDR3-SO-DIMM X2 DDR3-SO-DIMM X2
Intel CPU BANK 0, 1, 2, 3 BANK 0, 1, 2, 3
P.10 P.11
D
SPI ROM Sandy Bridge D
23 LCD MX25L1005
VGA 1066/1333MHz 1.5V 1066/1333MHz 1.5V
AMG-12G SOP8
P.21
PEGx16 Desktop Channel A Channel B
NVdia N12P-GT
38~43W
HDMI
OUT
95W F B-CAS
LVDS conn SPI ROM
W25X40BVSNIG 29mm x 29mm B LGA1155
RF IN
P.36 SOIC 8P 37.5mm x 37.5mm
P.21~27
P.35 P.4~9
Option
FDIx8 DMIx4 USB2.0 x2 Touch
G Dual DVI 100 MHz 100 MHz
USB
WebCAM Side port A Screen
BT 3D IR
Module
TV Tuner
On Mini Card
DVI P.36 P.46 P.36 P.49 P.49 P.44
C PCH PCIE
HDMI HDMI OUT USB2.0 x11 Port 7
IN
Scalar Cougar Point 3.3V 48MHz Port 5 Port 0,1 Port 2,3,6,9 Port 4 Port 10 Port 7 Port 11
C
AV-IN Realtek DVI HDMI Switch DVI from UMA
H67
C
D RTD2667 P.33
PCIEx4 100MHz 2.5/5.0 GT/S
Port 2 Port 6 Port 5 Port 1
HD_Audio
3.3V 24MHz
FCBGA-942 SATAx3 SATA 1.5/3.0 GT/S
P.35 Port 0 SATA3.0 Port 1 SATA3.0 Port 4 SATA2.0
27mm x 27mm Master1 Master2 Master3 USB
I2S HP conn Port 12
P.12~20
P.43 3.5"
SATA SSD SATA ODD Intel WLAN Card Reader
Conn SATA HDD Conn LAN On Mini Card RT5029
Connector 82579 7 in 1 or better
I2S 2 HP AMP P.37 P.37 P.37 P.41 P.44 P.39
H G1412RC1U
P.43
Audio Codec SPI ROM
MX25L3206 Slim BD support 3D GIGA
ALC662 EM2I-12G LAN
P.41 (4MB) P.13
2 SPI ROM
DAC 5 MX25L1005
LPC
TI PCM1606
5 33MHz AMC-12G
P.46
A E F
B
P.47 IO Board P.38 B
AMP x3 INT EXT KBC

APA_106
P.42
MIC
P.36
MIC
P.43
E PS/2
ENE KB930-A1
P.45
RJ45 USB3.0 x2
NEC uPD720200A HDMI IN Antenna Jack
Conn
P.38 P.38
SPK 3W x5 USB2.0 AV-IN

USB3.0 PS/2
3D Scalar Board Dual USB2.0 x2 USB2.0/3.0 HDMI OUT

CVBS AIN-L AIN-R
Conn x2 Conn P.38
DVI
G
HDMI
Dual DVI IN
4 ch. LVDS C B C D-1 D-2
3D scalar Power ENE Touch D AV
IN
P.35 CVBS
A
D-1 Button SB3534 Button AIN SW AIN
A
TS5A23157
P.50 P.50 H P.47

23.6" LCD THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
120Hz LCD AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom M/B LA-6951P Schematic 0.1
5 4 3 2 1
A B C D E
Voltage Rails
SIGNAL
Power Plane Description S1 S3 S5 STATE SLP_S3# SLP_S4# SLP_S5# +VALW +VSB +VS
+12V1 Adapter power supply (12V)(For V_5V;V_3.3V;1.5V;12VS) N/A N/A N/A
Full ON HIGH HIGH HIGH ON ON ON
Adapter power supply (12V)(For
+12V2 N/A N/A N/A
VGA_CORE;1.05VS;VRAM_1.5VS;CPU_CORE;VGFX_COREP) S1(Power On Suspend) HIGH HIGH HIGH ON ON ON
+CPU_CORE Core voltage for CPU ON OFF OFF
1
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF 1
+VGFX_CORE Graphics voltage for CPU ON OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON ON OFF
+1.05VS 1.05V switched power rail for CPU ON OFF OFF
S5 (Soft OFF) LOW LOW LOW OFF ON OFF
+1.05VS_PCH 1.05V switched power rail for PCH ON OFF OFF
+1.5V 1.5V power rail for DDRIII ON ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8VS 1.8V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail once PS_ON# low ON ON OFF
+3VSB 3.3V power rail befor PS_ON# low ON ON ON
+3.3V_LAN 3.3V power rail for LAN ON ON OFF
+3VS 3.3V switched power rail ON OFF OFF
+V_3.3V 3.3V power rail once Adapter plug-in ON ON OFF
+V_5V 5V power rail once Adapter plug-in ON ON OFF
+5VSB 5V power rail befor PS_ON# low ON ON ON
+5VALW 5V always on power rail once PS_ON# low ON ON OFF
+5VS 5V switched power rail ON OFF OFF
2 2
+RTCVCC RTC power ON ON ON
+3VS_DGPU 3.3V power rail for GPU ON OFF OFF
BOARD ID Table SKU ID(Project) Table
+VGA_CORE Graphics power rail for GPU ON OFF OFF
+1.05VS_DGPU 1.05VS switched power rail for GPU ON OFF OFF Board ID PCB Revision Project_ID2 Project_ID1 Project_ID0
(GPIO38) (GPIO37) (GPIO36) SKU
+VRAM_1.5VS 1.5VS power rail for VRAM ON OFF OFF * 0 0.1
1 0 0 0 UMA@
2 0 0 1 DIS@(VRAM:Hynix)
3 0 1 0 DIS@(VRAM:Samsung)
4 0 1 1 X
5 1 0 0 X
6 1 0 1 X
7 1 1 0 X
1 1 1 X
USB Port Table
EC SM Bus address
6 External BTO Option Table
3 USB 2.0 USB 1.1 Port USB Port 3
Device Address
BTO Item BOM Structure
VGA Thermal Sensor(Internal) 0*9E H 0 USB Conn.
UHCI0 VGA VGA@
VGA Thermal Sensor(External) 0*9A H 1 USB Conn
UMA Only UMA@
2 USB Conn DIS Only DIS@
UHCI1
USB Conn 2D 2D@
3
EHCI1 3D 3D@
4 Touch Screen
PCH SM Bus address UHCI2 VGA_2D VGA_2D@
5 Web Camera
TAS3208 3208@
6 USB 2.0
Device Address PCM1606 1606@
UHCI3
DDR(JDIMM1) 1010 0000 b 7 3D IR Samsung VRAM X76_SAM@
DDR(JDIMM2) 1010 0010 b Hynix VRAM X76_HYN@
8
DDR(JDIMM4) 1010 0100 b UHCI4 CRT CRT@
DDR(JDIMM3) 1010 0110 b
9 USB 2.0
10 Blue Tooth
UHCI5
EHCI2 11 Mini Car(TV Tuner)
12 Mini Car(WLAN)
4 UHCI6 4
13

Notes List
B
A B C D E
5 4 3 2 1
DMI_PTX_HRX_N[0..3] <14> PEG_GTX_C_HRX_P[0..15] <22>

DMI_PTX_HRX_P[0..3] <14> PEG_GTX_C_HRX_N[0..15] <22>
DMI_HTX_PRX_N[0..3] <14> PEG_HTX_C_GRX_P[0..15] <22>

DMI_HTX_PRX_P[0..3] <14> PEG_HTX_C_GRX_N[0..15] <22>
SKT_H2
JCPU1C Note:Use 0.1uF now; If need to support to Gen3, need change C1~C32 to 0.22uF.
<REV>
PEG_GTX_C_HRX_P15 B11 C13 PEG_HTX_GRX_P15 C1 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P15
PEG_GTX_C_HRX_N15 PEG_RX[0] PEG_TX[0] PEG_HTX_GRX_N15 C2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_N15
B12 PEG_RX#[0] PEG_TX#[0] C14 1 2
D PEG_GTX_C_HRX_P14 D12 E14 PEG_HTX_GRX_P14 C3 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P14 D
D11 PEG_RX#[1] PEG_TX#[1] E13 1 2
PEG_GTX_C_HRX_P13 C10 G14 PEG_HTX_GRX_P13 C5 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P13
C9 PEG_RX#[2] PEG_TX#[2] G13 1 2
PEG_GTX_C_HRX_P12 E10 F12 PEG_HTX_GRX_P12 C7 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P12
E9 PEG_RX#[3] PEG_TX#[3] F11 1 2
PEG_GTX_C_HRX_P11 B8 J14 PEG_HTX_GRX_P11 C9 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P11
B7 PEG_RX#[4] PEG_TX#[4] J13 1 2
PEG_GTX_C_HRX_P10 C6 D8 PEG_HTX_GRX_P10 C11 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P10
C5 PEG_RX#[5] PEG_TX#[5] D7 1 2
PEG_GTX_C_HRX_P9 A5 D3 PEG_HTX_GRX_P9 C13 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P9
A6 PEG_RX#[6] PEG_TX#[6] C3 1 2
PEG
PEG_GTX_C_HRX_P8 E2 E6 PEG_HTX_GRX_P8 C15 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P8
E1 PEG_RX#[7] PEG_TX#[7] E5 1 2
PEG_GTX_C_HRX_P7 F4 F8 PEG_HTX_GRX_P7 C17 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P7
F3 PEG_RX#[8] PEG_TX#[8] F7 1 2
PEG_GTX_C_HRX_P6 G2 G10 PEG_HTX_GRX_P6 C19 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P6
G1 PEG_RX#[9] PEG_TX#[9] G9 1 2
PEG_GTX_C_HRX_P5 H3 G5 PEG_HTX_GRX_P5 C21 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P5
H4 PEG_RX#[10] PEG_TX#[10] G6 1 2
PEG_GTX_C_HRX_P4 J1 K7 PEG_HTX_GRX_P4 C23 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P4
J2 PEG_RX#[11] PEG_TX#[11] K8 1 2
PEG_GTX_C_HRX_P3 K3 J5 PEG_HTX_GRX_P3 C25 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P3
K4 PEG_RX#[12] PEG_TX#[12] J6 1 2
PEG_GTX_C_HRX_P2 L1 M8 PEG_HTX_GRX_P2 C27 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P2
L2 PEG_RX#[13] PEG_TX#[13] M7 1 2
PEG_GTX_C_HRX_P1 M3 L6 PEG_HTX_GRX_P1 C29 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P1
M4 PEG_RX#[14] PEG_TX#[14] L5 1 2
PEG_GTX_C_HRX_P0 N1 N5 PEG_HTX_GRX_P0 C31 1 2 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_P0
C PEG_GTX_C_HRX_N0 PEG_RX[15] PEG_TX[15] PEG_HTX_GRX_N0 C32 VGA@ .1U_0402_16V7K PEG_HTX_C_GRX_N0 C
N2 PEG_RX#[15] PEG_TX#[15] N6 1 2
DMI_PTX_HRX_P0 W5 V7 DMI_HTX_PRX_P0
DMI_PTX_HRX_N0 DMI_RX[0] DMI_TX[0] DMI_HTX_PRX_N0
W4 DMI_RX#[0] DMI_TX#[0] V6
DMI_PTX_HRX_P1 V3 W7 DMI_HTX_PRX_P1
V4 DMI_RX#[1] DMI_TX#[1] W8
DMI_PTX_HRX_P2 Y3 Y6 DMI_HTX_PRX_P2
DMI
Y4 DMI_RX#[2] DMI_TX#[2] Y7
DMI_PTX_HRX_P3 AA4 AA7 DMI_HTX_PRX_P3
DMI_PTX_HRX_N3 DMI_RX_3 DMI_TX[3] DMI_HTX_PRX_N3
AA5 DMI_RX#[3] DMI_TX#[3] AA8
P3 PE_RX[0] PE_TX[0] P8
P4 PE_RX#[0] PE_TX#[0] P7
R2 PE_RX[1] PE_TX[1] T7
R1 PE_RX#[1] PE_TX#[1] T8 7/20 PE_TX[0~3]/PE_TX#[0~3] only use on
7/20 PE_RX[0~3]/PE_RX#[0~3] only use on T4 PE_RX[2] PE_TX[2] R6 Workstation.
GEN
Workstation. T3 PE_RX#[2] PE_TX#[2] R5

U2 PE_RX[3] PE_TX[3] U5
U1 PE_RX#[3] PE_TX#[3] U6
+1.05VS
24.9_0402_1% 2 1 R1 PEG_IRCOMP B5 PEG_ICOMPO H_FDI_TXN[0..7] <16>

C4 PEG_RCOMPO H_FDI_TXP[0..7] <16>
B4 PEG_ICOMPI SKT_H2
JCPU1D
LOTES_ACAZIF096P01_SANDYBRIDGE 3 OF 11
PEG_ICOMPI and RCOMPO signals should be shorted and CONN@ AC8 H_FDI_TXP0
FDI_TX[0] H_FDI_TXN0
FDI_TX#[0] AC7
B routed <16> H_FDI_FSYNC0 AC5 AC2 H_FDI_TXP1 B
FDI_FSYNC_0 FDI_TX[1] H_FDI_TXN1
with - max length = 500 mils - ;Width/Space= (4 mils/15mils) <16> H_FDI_LSYNC0 AC4 FDI_LSYNC_0 FDI_TX#[1] AC3
FDI_TX[0] AD2 H_FDI_TXP2
PEG_ICOMPO signals should be routed with - max length = FDI_TX[2] H_FDI_TXN2
FDI_TX#[2] AD1
AD4 H_FDI_TXP3
500 mils FDI_TX[3]
AD3 H_FDI_TXN3
FDI_TX#[3]
- Width/Space (12 mils/15mils)
AD7 H_FDI_TXP4
FDI_TX#[4] AD6
AE5 AE7 H_FDI_TXP5
<16> H_FDI_FSYNC1 FDI_FSYNC_1 FDI_TX[5]
AE4 AE8 H_FDI_TXN5
<16> H_FDI_LSYNC1 FDI_LSYNC_1 FDI_TX#[5]
AF3 H_FDI_TXP6
FDI_TX#[6] AF2
AG2 H_FDI_TXP7
FDI_TX#[7] AG1
1000P_0402_50V7K @ 2 1 C1007 H_FDI_FSYNC0
<16> H_FDI_INT AG3 FDI_INT
1000P_0402_50V7K @ 2 1 C1008 H_FDI_LSYNC0 FDI
+1.05VS 24.9_0402_1% 2 1 R2 FDI_ICOMP AE2 LINK

1000P_0402_50V7K @ FDI_COMPIO
2 1 C1009 H_FDI_FSYNC1 AE1 FDI_ICOMPO
1000P_0402_50V7K @ 2 1 C1010 H_FDI_LSYNC1
4 OF 11
LOTES_ACAZIF096P01_SANDYBRIDGE
1000P_0402_50V7K @ 2 1 C1011 H_FDI_INT CONN@
8/23 Add
A A

PROCESSOR (1/6) DMI,FDI,PEG
B 0.3
PLA00 M/B LA-6951P Schematic
Date: Friday, November 05, 2010 Sheet 4 of 62
5 4 3 2 1
5 4 3 2 1
+1.05VS
SKT_H2
JCPU1E H_CATERR# 1K_0402_5% 2 @ 1 R6
H_PECI 1K_0402_5% 2 @ 1 R7
XDP_TDO_R 51_0402_5% 2 1 R8
XDP_TDI_R 51_0402_5% 2 1 R9
0_0402_5% 1 R656 CLK_CPU_DMI_R XDP_TMS_R 51_0402_5% R10
<17> CLK_CPU_DMI 2 W2 BCLK[0] VCCIO_SELECT P33 2 1
0_0402_5% 1 R657 2 CLK_CPU_DMI#_R W1 P34 VCCSA_VID VCCSA_VID <53> H_VIDALERT# 75_0402_1% 2 1 R11
<17> CLK_CPU_DMI# BCLK#[0] VCCSA_VID_0
D T2 VCCSA_SENSE VCCSA_SENSE <53> H_VIDSCLK 90.9_0402_1% 2 @ 1 R12 D
H_VIDSCLK VCCSA_SENSE H_VIDSOUT 110_0402_1% R13
<57> H_VIDSCLK C37 VIDSCLK 2 1
H_VIDSOUT B37 A36 VCCSENSE H_THERMTRIP#_R 51_0402_5% 2 @ 1 R501
<57> H_VIDSOUT H_VIDALERT# R300 1 VIDSOUT VCC_SENSE VCCSENSE <57>
<57> H_VIDALERT# 2 43_0402_1% H_VIDALERT#_R A37
VIDALERT# VSS_SENSE B36 VSSSENSE
VSSSENSE <57>
H_CPUPW RGD 51_0402_5% 2 @ 1 R520
H_PROCHOT# 51_0402_5% 2 1 R521
AB4 VCCIO_SENSE VCCIO_SENSE <54> H_THERMTRIP# 51_0402_5% 2 @ 1 R715
<13> H_CPUPW RGD VCCIO_SENSE
H_CPUPW RGD J40 AB3 VSSIO_SENSE VSSIO_SENSE <54>
PM_SYS_PW RGD_BUF 2 R644 1 PM_SYS_PW RGD_R AJ19 UNCOREPWRGOOD VSSIO_SENSE
120_0402_5% H_RESET# SM_DRAMPWROK VGFX_VCCSENSE
F36 RESET# VCCAXG_SENSE L32 VGFX_VCCSENSE <57>
M32 VGFX_VSSSENSE VGFX_VSSSENSE <57>
H_PM_SYNC VSSAXG_SENSE XDP_TRST#_R 51_0402_5% 2 R14
<12> H_PM_SYNC E38 PM_SYNC 1
H_PECI J35 L39 XDP_TDO_R XDP_TCLK_R 51_0402_5% 2 1 R15
<12,45> H_PECI H_CATERR# PECI TDO XDP_TDI_R H_CPUPW RGD 1K_0402_5% 2
E37 L40 1 R579
H_PROCHOT# CATERR# TDI XDP_TCLK_R
H34 PROCHOT# TCK M40
0_0402_5% 2 R500 1 <45> H_PROCHOT# H_THERMTRIP#_R G35 L38 XDP_TMS_R
<12> H_THERMTRIP# THERMTRIP# TMS
J39 XDP_TRST#_R
+1.5V TRST#
AJ33 SKTOCC# PRDY# K38
H_SNB_IVB# K32 K40
<15> H_SNB_IVB# PROC_SEL PREQ#
E39 XDP_DBR#_R R5 1 2 0_0402_5% XDP_DBRETSET#
DBR# XDP_DBRETSET# <13>
1
DDR_VREF AJ22 C40 CLK_CPU_ITP_R T80

SM_VREF BCLK_ITP CLK_CPU_ITP#_R
BCLK_ITP# D40 T81
R638 8/13 Add C674 close to JCPU1(EMI request)
100_0402_1% @
T73 CFG0 H36 H40 XDP_DBR#_R C674 1 2 0.1U_0402_16V4Z
2
DDR_VREF CFG1 CFG[0] BPM#[0]

T74 J36 CFG[1] BPM#[1] H38
CFG2 J37 G38 <EMI>
CFG[2] BPM#[2]
1
1 CFG3 K36 G40

CFG4 CFG[3] BPM#[3]
T75 L36 CFG[4] BPM#[4] G39 9/29 Del NET:XDP_BPM#[0..7]_R
R639 C777 CFG5 N35 F38
C 100_0402_1% 0.1U_0402_16V4Z CFG6 CFG[5] BPM#[5] C
L37 CFG[6] BPM#[6] E40
2 CFG7 +1.5V
T62 M36 F40
2
CFG8 CFG[7] BPM#[7]

T63 J38 CFG[8]
T64 CFG9 L35 B39
CFG[9] RSVD
1
T65 CFG10 M38 J33
CFG11 CFG[10] RSVD R643
T66 N36 CFG[11] RSVD L34
T67 CFG12 N38 L33 1K_0402_5%
CFG13 CFG[12] RSVD
T68 N39 CFG[13] RSVD K34
T69 CFG14 N37
2
CFG15 CFG[14]
T70 N40 CFG[15]
9/29 Del R557/R558/R561/R564~R574 T71 CFG16 G37 N33 R641 1 2 0_0402_5% PM_SYS_PW RGD_BUF
CFG[16] RSVD <13> DRAMPW ROK
T72 CFG17 G36 M34
1K_0402_5% R559 CFG2 CFG[17] RSVD
2 1
1
1K_0402_5% 2 @ 1 R560 CFG3
1K_0402_5% 2 @ 1 R562 CFG5 AT14 AV1 R642
1K_0402_5% @ R563 CFG6 RSVD RSVD 39_0402_5%
2 1 RSVD AW2
AY3 @
RSVD
L9
1 2
RSVD
H7 RSVD RSVD J9 D
H8 RSVD RSVD K9
PEG Static x16 Lane Numbering Reversal. <24,49,50,55> SUSP
SUSP 2
G Q17
1: Normal Operation L31 S SSM3K7002FU_SC70-3
3
RSVD
CFG2 @
0:Lane numbers Reversed J31 @
* RSVD
RSVD K31 H_CPUPW RGD C1030 1 2 1000P_0402_50V7K
PEG Static x4 Lane Numbering Reversal. RSVD AD34 @

AD35 PM_SYS_PW RGD_R C997 1 2 1000P_0402_50V7K
B RSVD B
1: Normal Operation
CFG3 * 0:Lane numbers Reversed MISC
PCIE Port Bifurcation Straps

LOTES_ACAZIF096P01_SANDYBRIDGE 5 OF 11
CONN@
11: 1x16 PCI Express (Default)
*10: 2x8 PCI Express
CFG[6:5]
01: Reserved
00: 1 x 8, 2 x 4 : PCI Express
+3VS
0.1U_0402_16V4Z
1
+1.05VS
C748
1
R325
A
U19 1.2K_0402_1% A
5
74AHC1G09GW _TSSOP5 R294

2
1 43_0402_1%
P
B
O 4H_RESET#_R 1 2 H_RESET#
PCH_PLT_RST# 2
<13,40,45> PCH_PLT_RST# A
G
R577
3
0_0402_5%
@ 2010/07/20 2011/07/20 Title
Issued Date Deciphered Date
PROCESSOR (2/6) CLK,JTAG
2
B 0.3
5 4 3 2 1
5 4 3 2 1
<11> DDR_B_D[0..63]
<10> DDR_A_D[0..63] <11> DDR_B_DQS#[0..7]
<10> DDR_A_DQS#[0..7] <11> DDR_B_DQS[0..7]
<10> DDR_A_DQS[0..7] <11> DDR_B_MA[0..15]
<10> DDR_A_MA[0..15]
SKT_H2 SKT_H2
JCPU1A JCPU1B
DDR_A_MA0 AV27 AJ3 DDR_A_D0 <REV>

DDR_A_MA1 SA_MA[0] SA_DQ[0] DDR_A_D1 DDR_B_MA0 <BALLMAP_REV> DDR_B_D0
AY24 SA_MA[1] SA_DQ[1] AJ4 AK24 SB_MA[0] SB_DQ[0] AG7
DDR_A_MA2 AW24 AL3 DDR_A_D2 DDR_B_MA1 AM20 AG8 DDR_B_D1
DDR_A_MA3 AW23 SA_MA[2] SA_DQ[2] DDR_A_D3 DDR_B_MA2 SB_MA[1] SB_DQ[1] DDR_B_D2
SA_MA[3] SA_DQ[3] AL4 AM19 SB_MA[2] SB_DQ[2] AJ9
D DDR_A_MA4 AV23 AJ2 DDR_A_D4 DDR_B_MA3 AK18 AJ8 DDR_B_D3 D
DDR_A_MA5 SA_MA[4] SA_DQ[4] DDR_A_D5 DDR_B_MA4 SB_MA[3] SB_DQ[3] DDR_B_D4
AT24 SA_MA[5] SA_DQ[5] AJ1 AP19 SB_MA[4] SB_DQ[4] AG5
DDR_A_MA6 AT23 AL2 DDR_A_D6 DDR_B_MA5 AP18 AG6 DDR_B_D5
AU22 SA_MA[7] SA_DQ[7] AL1 AM18 SB_MA[6] SB_DQ[6] AJ6
DDR_A_MA8 AV22 AN1 DDR_A_D8 DDR_B_MA7 AL18 AJ7 DDR_B_D7
AT22 SA_MA[9] SA_DQ[9] AN4 AN18 SB_MA[8] SB_DQ[8] AL7
DDR_A_MA10 AV28 AR3 DDR_A_D10 DDR_B_MA9 AY17 AM7 DDR_B_D9
DDR_A_MA11 AU21 SA_MA[10] SA_DQ[10] DDR_A_D11 DDR_B_MA10 SB_MA[9] SB_DQ[9] DDR_B_D10
SA_MA[11] SA_DQ[11] AR4 AN23 SB_MA[10] SB_DQ[10] AM10
DDR_A_MA12 AT21 AN2 DDR_A_D12 DDR_B_MA11 AU17 AL10 DDR_B_D11
DDR_A_MA13 AW32 SA_MA[12] SA_DQ[12] DDR_A_D13 DDR_B_MA12 SB_MA[11] SB_DQ[11] DDR_B_D12
SA_MA[13] SA_DQ[13] AN3 AT18 SB_MA[12] SB_DQ[12] AL6
DDR_A_MA14 AU20 AR2 DDR_A_D14 DDR_B_MA13 AR26 AM6 DDR_B_D13
DDR_A_MA15 AT20 SA_MA[14] SA_DQ[14] DDR_A_D15 DDR_B_MA14 SB_MA[13] SB_DQ[13] DDR_B_D14
SA_MA[15] SA_DQ[15] AR1 AY16 SB_MA[14] SB_DQ[14] AL9
AV2 DDR_A_D16 DDR_B_MA15 AV16 AM9 DDR_B_D15
DDR_A_W E# AW29 SA_DQ[16] DDR_A_D17 SB_MA[15] SB_DQ[15] DDR_B_D16
<10> DDR_A_W E# SA_WE# SA_DQ[17] AW3 SB_DQ[16] AP7
DDR_A_CAS# AV30 AV5 DDR_A_D18 DDR_B_W E# AR25 AR7 DDR_B_D17
<10> DDR_A_CAS# SA_CAS# SA_DQ[18] <11> DDR_B_W E# SB_WE# SB_DQ[17]
DDR_A_RAS# AU28 AW5 DDR_A_D19 DDR_B_CAS# AK25 AP10 DDR_B_D18
<10> DDR_A_RAS# SA_RAS# SA_DQ[19] <11> DDR_B_CAS# SB_CAS# SB_DQ[18]
AU2 DDR_A_D20 DDR_B_RAS# AP24 AR10 DDR_B_D19
SA_DQ[20] <11> DDR_B_RAS# SB_RAS# SB_DQ[19]
AU3 DDR_A_D21 AP6 DDR_B_D20
DDR_A_BS0 SA_DQ[21] DDR_A_D22 DDR_B_BS0 SB_DQ[20] DDR_B_D21
<10> DDR_A_BS0 AY29 SA_BS_0 SA_DQ[22] AU5 <11> DDR_B_BS0 AP23 SB_BS[0] SB_DQ[21] AR6
DDR_A_BS1 AW28 AY5 DDR_A_D23 DDR_B_BS1 AM24 AP9 DDR_B_D22
<10> DDR_A_BS1 SA_BS[1] SA_DQ[23] <11> DDR_B_BS1 SB_BS[1] SB_DQ[22]
DDR_A_BS2 AV20 AY7 DDR_A_D24 DDR_B_BS2 AW17 AR9 DDR_B_D23
<10> DDR_A_BS2 SA_BS[2] SA_DQ[24] <11> DDR_B_BS2 SB_BS[2] SB_DQ[23]
AU7 DDR_A_D25 AM12 DDR_B_D24
SA_DQ[25] DDR_A_D26 SB_DQ[24] DDR_B_D25
SA_DQ[26] AV9 SB_DQ[25] AM13
AU29 AU9 DDR_A_D27 AN25 AR13 DDR_B_D26
<10> DDR_A_CS0# SA_CS#[0] SA_DQ[27] <11> DDR_B_CS0# SB_CS#[0] SB_DQ[26]
AV32 AV7 DDR_A_D28 AN26 AP13 DDR_B_D27
AW30 AW7 DDR_A_D29 AL25 AL12 DDR_B_D28
AU33 AW9 DDR_A_D30 AT26 AL13 DDR_B_D29
AY9 DDR_A_D31 AR12 DDR_B_D30
<10> DDR_A_CKE0 AV19 SA_CKE[0] SA_DQ[32] AU35 <11> DDR_B_CKE0 AU16 SB_CKE[0] SB_DQ[31] AP12
C AT19 AW37 DDR_A_D33 AY15 AR28 DDR_B_D32 C
<10> DDR_A_CKE1 SA_CKE[1] SA_DQ[33] <11> DDR_B_CKE1 SB_CKE[1] SB_DQ[32]
AU18 AU39 DDR_A_D34 AW15 AR29 DDR_B_D33
AV18 AU36 DDR_A_D35 AV15 AL28 DDR_B_D34
AW35 DDR_A_D36 AL29 DDR_B_D35
<10> DDR_A_ODT0 AV31 SA_ODT[0] SA_DQ[37] AY36 <11> DDR_B_ODT0 AL26 SB_ODT[0] SB_DQ[36] AP28
AU32 AU38 DDR_A_D38 AP26 AP29 DDR_B_D37
<10> DDR_A_ODT1 SA_ODT[1] SA_DQ[38] <11> DDR_B_ODT1 SB_ODT[1] SB_DQ[37]
AU30 AU37 DDR_A_D39 AM26 AM28 DDR_B_D38
AW33 AR40 DDR_A_D40 AK26 AM29 DDR_B_D39
AR37 DDR_A_D41 AP32 DDR_B_D40
SA_DQ[42] AN38 SB_DQ[41] AP31
AN37 DDR_A_D43 SB_CK[0] AP35 DDR_B_D42
SA_DQ[44] AR39 SB_DQ[43] AP34
AY25 AR38 DDR_A_D45 AL21 AR32 DDR_B_D44
<10> DDR_A_CLK0 SA_CK[0] SA_DQ[45] <11> DDR_B_CLK0 SB_CK[0] SB_DQ[44]
AW25 AN39 DDR_A_D46 AL22 AR31 DDR_B_D45
<10> DDR_A_CLK0# SA_CK#[0] SA_DQ[46] <11> DDR_B_CLK0# SB_CK#[0] SB_DQ[45]
AU24 AN40 DDR_A_D47 AL20 AR35 DDR_B_D46
AU25 AL40 DDR_A_D48 AK20 AR34 DDR_B_D47
AW27 AL37 DDR_A_D49 AL23 AM32 DDR_B_D48
AY27 AJ38 DDR_A_D50 AM22 AM31 DDR_B_D49
AV26 AJ37 DDR_A_D51 AP21 AL35 DDR_B_D50
AW26 AL39 DDR_A_D52 AN21 AL32 DDR_B_D51
AL38 DDR_A_D53 AM34 DDR_B_D52
R16 SA_DQ[54] AJ39 SB_DQ[53] AL31
<10,11> SM_DRAMRST# 2 1DRAMRST# AW18 SM_DRAMRST# SA_DQ[55] AJ40 DDR_A_D55 +V_DDR_REFB AH1 FC_AH1 SB_DQ[54] AM35 DDR_B_D54
AG40 DDR_A_D56 +V_DDR_REFA AH4 AL34 DDR_B_D55
0_0402_5% SA_DQ[56] FC_AH4 SB_DQ[55]
1 AG37 DDR_A_D57 1 1 AH35 DDR_B_D56
SA_DQ[58] AE38 SB_DQ[57] AH34
C33 AE37 DDR_A_D59 C614 C613 AE34 DDR_B_D58
.1U_0402_16V7K SA_DQ[60] AG39 .1U_0402_16V7K .1U_0402_16V7K SB_DQ[59] AE35
2 DDR_A_D61 2 2 DDR_B_D60
@ SA_DQ[61] AG38 SB_DQ[60] AJ35
B DDR_A_D62 DDR_B_D61 B
SA_DQ[62] AE39 SB_DQ[61] AJ34
AE40 DDR_A_D63 AF33 DDR_B_D62
SA_DQ[63] SB_DQ[62] DDR_B_D63
7/20 Intel-Need to add RC filter SB_DQ[63] AF35
AV13 AK3 DDR_A_DQS0 AN16 AH7 DDR_B_DQS0

SA_DQS[8] SA_DQS[0] DDR_A_DQS1 SB_DQS[8] SB_DQS[0] DDR_B_DQS1
AV12 SA_DQS#[8] SA_DQS[1] AP3 AN15 SB_DQS#[8] SB_DQS[1] AM8
AW4 DDR_A_DQS2 AR8 DDR_B_DQS2
SA_DQS[2] DDR_A_DQS3 SB_DQS[2] DDR_B_DQS3
AU12 SA_ECC_CB[0] SA_DQS[3] AV8 AL16 SB_ECC_CB[0] SB_DQS[3] AN13
AU14 AV37 DDR_A_DQS4 AM16 AN29 DDR_B_DQS4
SA_ECC_CB[1] SA_DQS[4] DDR_A_DQS5 SB_ECC_CB[1] SB_DQS[4] DDR_B_DQS5
AW13 SA_ECC_CB[2] SA_DQS[5] AP38 AP16 SB_ECC_CB[2] SB_DQS[5] AP33
AY13 AK38 DDR_A_DQS6 AR16 AL33 DDR_B_DQS6
SA_ECC_CB[3] SA_DQS[6] DDR_A_DQS7 SB_ECC_CB[3] SB_DQS[6] DDR_B_DQS7
AU13 SA_ECC_CB[4] SA_DQS[7] AF38 AL15 SB_ECC_CB[4] SB_DQS[7] AG35
AU11 SA_ECC_CB[5] AM15 SB_ECC_CB[5]
AY12 AK2 DDR_A_DQS#0 AR15 AH6 DDR_B_DQS#0
SA_ECC_CB[6] SA_DQS#[0] DDR_A_DQS#1 SB_ECC_CB[6] SB_DQS#[0] DDR_B_DQS#1
AW12 SA_ECC_CB[7] SA_DQS#[1] AP2 AP15 SB_ECC_CB[7] SB_DQS#[1] AL8
AV4 DDR_A_DQS#2 AP8 DDR_B_DQS#2
SA_DQS#[2] DDR_A_DQS#3 SB_DQS#[2] DDR_B_DQS#3
SA_DQS#[3] AW8 SB_DQS#[3] AN12
AV36 DDR_A_DQS#4 AN28 DDR_B_DQS#4
DDR_A SA_DQS#[4] DDR_A_DQS#5 SB_DQS#[4] DDR_B_DQS#5
SA_DQS#[5] AP39 DDR_B SB_DQS#[5] AR33
AK39 DDR_A_DQS#6 AM33 DDR_B_DQS#6
SA_DQS#[6] DDR_A_DQS#7 2 OF 11 SB_DQS#[6] DDR_B_DQS#7
SA_DQS#[7] AF39 SB_DQS#7] AG34
LOTES_ACAZIF096P01_SANDYBRIDGE 1 OF 11 LOTES_ACAZIF096P01_SANDYBRIDGE CONN@

CONN@
A A

PROCESSOR (3/6) DDRIII
B 0.3
5 4 3 2 1
5 4 3 2 1
+CPU_CORE:112A
+VGFX_CORE:35A
+CPU_CORE +CPU_CORE
SKT_H2 +VGFX_CORE
JCPU1F
D SKT_H2 D
JCPU1G
A12
VCC VCC
F32 +VGFX_CORE
A13 F33 AB33
A14
VCC
VCC
VCC
VCC
F34
+CPU_CORE
+CPU_CORE AB34
VCCAXG
VCCAXG +VGFX_CORE
A15 G15 AB35
VCC VCC VCCAXG
A16 G16 AB36
VCC VCC VCCAXG
A18 G18 AB37
VCC VCC 22U_0805_6.3V6M 22U_0805_6.3V6M VCCAXG 22U_0805_6.3V6M 22U_0805_6.3V6M
A24 G19 AB38
VCC VCC VCCAXG
A25 G21 AB39
VCC VCC VCCAXG
A27 G22 1 1 1 1 AB40 1 1 1 1
VCC VCC C34 C37 C35 C36 VCCAXG C38 C39 C40 C41
A28 VCC VCC G24 AC33 VCCAXG
B15 G25 AC34 UMA@ UMA@ UMA@ UMA@
VCC VCC VCCAXG
B16 VCC VCC G27 AC35 VCCAXG
B18 G28 2 2 2 2 AC36 2 2 2 2
VCC VCC 22U_0805_6.3V6M 22U_0805_6.3V6M VCCAXG 22U_0805_6.3V6M 22U_0805_6.3V6M
B27 VCC VCC G32 (Place these capacitors inside CPU socket cavity, top layer) AC39 VCCAXG (Place these capacitors inside CPU socket cavity, top layer)
B30 VCC VCC H13 T33 VCCAXG
B33 H15 +CPU_CORE T35 +VGFX_CORE
VCC VCC VCCAXG
C15 VCC VCC H18 T37 VCCAXG
C16 H19 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M T38 22U_0805_6.3V6M
VCC VCC VCCAXG
C18 VCC VCC H21 T39 VCCAXG
C19 VCC VCC H22 1 1 1 1 1 1 1 T40 VCCAXG 1 1
C21 H24 C42 C43 C44 C45 C46 C47 C48 U33 C49 C50
VCC VCC VCCAXG UMA@ UMA@
C22 VCC VCC H25 U34 VCCAXG
C25 H28 2 2 2 2 2 2 2 U36 2 2
VCC VCC 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VCCAXG 22U_0805_6.3V6M
C C
C30 VCC VCC H32 U39 VCCAXG (Place these capacitors under CPU socket, Bottom layer)
C31 J12 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M U40
VCC VCC VCCAXG
C33 VCC VCC J15 W33 VCCAXG
C34 VCC VCC J16 1
C51
1
C52
1
C53
1
C54
1
C55
1
C56
1
C57
W34 VCCAXG E-CAP package
C36 VCC VCC J18 W35 VCCAXG
D13 J19 W36 +VGFX_CORE
VCC VCC VCCAXG
D14 J21 W37
VCC VCC 2 2 2 2 2 2 2 VCCAXG 560U_2.5V_M_R10
D15 J22 W38
VCC VCC 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VCCAXG
D16 J24 Y33 1
VCC VCC VCCAXG
1
D18 J25 Y34
VCC VCC VCCAXG + + +
D19
VCC VCC
J27 (Place these capacitors under CPU socket, Bottom layer) Y35
VCCAXG
D21 J28 Y36 C58 C59 C60
VCC VCC VCCAXG 560U_2.5V_M UMA@ 560U_2.5V_M_R10
D22 J30 Y37
2
VCC VCC +CPU_CORE VCCAXG UMA@ 2 UMA@
D24 K15 Y38
VCC VCC VCCAXG
D25 K16
VCC VCC +CPU_CORE GFX POWER
D27
VCC VCC
K18 E-CAP package Near C64/C67
D28
VCC VCC
K19 1 1 (Place C58 capacitors under CPU socket, Top layer)
D30 K21 560U_2.5V_M 560U_2.5V_M 7 OF 11 (Place C59/C60 capacitors under CPU socket, Bottom layer)
VCC VCC C807 C808 LOTES_ACAZIF096P01_SANDYBRIDGE
D31 K22 1 1 1 1
VCC VCC @ @ CONN@
D33
VCC VCC
K24 8/24Change symbol of C58 from SF000001P00 to SF000001K00
D34 K25 + + + + 0.1U_0402_16V4Z 2 20.1U_0402_16V4Z
10/23 Change symbol of C59/C60 from SGA20331E10 to SF000002M00
VCC VCC C62 C63 C64 C67
D35
VCC VCC
K27 11/2 Change PN of C59/C60 from SF000002M00 to SF000001K00
D36 K28 560U_2.5V_M
VCC VCC 2 2 2 2
E15
VCC VCC
K30 10/27 Add C807/C808(ESD request)
E16 L13
VCC VCC 560U_2.5V_M
E18 L14
VCC VCC +VGFX_CORE
E19 L15
VCC VCC
E21
VCC VCC
L16 8/24Change symbol of C62~C63 from SF000001P00 to SF000001K00
E22
VCC VCC
L18 Near C58
E24
VCC VCC
L19 (Place C62~C64 capacitors under CPU socket, Top layer) 1
E25 L21
B VCC VCC C809 B
E27 L22
VCC VCC +CPU_CORE @
E28
VCC VCC
L24 Polymer package
E30 L25 10/8 Change symbol of C69 from SGA20331E10 to 0.1U_0402_16V4Z 2
VCC VCC
E31 L27
E33
VCC VCC
L28 SGA00005R00
VCC VCC 330U_2.5V_M_R15
E34
VCC VCC
L30 10/27 Add C809(ESD request)
E35 M14 1
VCC VCC
1
F15 M15
VCC VCC + + + +
F16 M16
VCC VCC C65 C66 C68 C69
F18 M18
VCC VCC 330U_2.5V_M_R15 @ 330U_D2_2VM_R6M
F19 M19
2
VCC VCC @ 2 3
F21 M21
VCC VCC
F22 M22
VCC VCC 560U_2.5V_M_R10
F24 M24
VCC VCC
F25 M25
VCC VCC
F27 M27
VCC VCC
F28
VCC VCC
M28 10/23 Change symbol of C65/C66/C68 from SGA20331E10 to SF000002M00
F30
VCC VCC
M30 (Place C65~C69 capacitors under CPU socket, Bottom layer)
F31
VCC
11/2 Change PN of C68 from SF000002M00 to SF000001K00
CPU POWER
6 OF 11
CONN@
A A

PROCESSOR (4/6) PWR,Bypass
Custom
5 4 3 2 1
5 4 3 2 1
+1.05VS SKT_H2
JCPU1H
8.5A
D 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M M13 +1.5V D
VCCIO
1 1 1 1 1 1 1 1 1 A11 AJ13
4.5A22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
VCCIO VDDQ
A7 AJ14 1 1
560U_2.5V_M_R10
560U_2.5V_M_R10
C70 C71 C72 C73 C74 C75 C76 C77 C78 VCCIO VDDQ
AA3 VCCIO VDDQ AJ23 1 1 1 1 1 1 1
+ +
C984
C985
AB8 AJ24 C79 C80 C81 C82 C83 C84 C85
2 2 2 2 2 2 2 2 2 VCCIO VDDQ
AF8 VCCIO VDDQ AR20
AG33 AR21 @
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VCCIO VDDQ 2 2 2 2 2 2 2 2 2
AJ16 VCCIO VDDQ AR22
(Place these capacitors inside CPU socket cavity, top layer) AJ17 AR23 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
VCCIO VDDQ
AJ26 VCCIO VDDQ AR24
AJ28 VCCIO VDDQ AU19
AJ32 VCCIO VDDQ AU23
+1.05VS AK15 AU27
VCCIO VDDQ
AK17 VCCIO VDDQ AU31 11/2 Change PN of C984/C985 from SF000002000 to SF000001K00
560U_2.5V_M_R10 AK19 AV21
VCCIO VDDQ
1 1 1 AK21 VCCIO VDDQ AV24
AK23 VCCIO VDDQ AV25
+ + + AK27 AV29
C86 C87 C88 VCCIO VDDQ
AK29 VCCIO VDDQ AV33
@ AK30 AW31
560U 2.5V M 2 2 2 VCCIO VDDQ
B9 VCCIO VDDQ AY23
D10 VCCIO VDDQ AY26
560U_2.5V_M_R10 D6 AY28
VCCIO VDDQ
E3 VCCIO
E4 VCCIO
G3 VCCIO
11/2 Change PN of C87/C88 from SF000001P00 to SF000001K00 G4 VCCIO VDDQ AJ20
J3 VCCIO
C J4 C
VCCIO
J7 VCCIO
J8 VCCIO
L3 VCCIO
L4 VCCIO
L7 VCCIO
N3 VCCIO
N4 VCCIO
N7 VCCIO
R3 VCCIO
R4 VCCIO
R7 VCCIO
U3 VCCIO
U4 VCCIO
11/4 Change PN of C91 from SF000001P00 to SF000001K00 U7 VCCIO
V8 VCCIO
W3 VCCIO
+VCCSA
10U_0805_6.3V6M 8.8A H10 VCCSA

1 H11 VCCSA
1 1 560U_2.5V_M_R10 H12
+ VCCSA
J10 VCCSA
C89 C90 C91 K10
10U_0805_6.3V6M VCCSA
K11 VCCSA
2 2 2
(Place these capacitors inside CPU socket cavity, top layer) L11 VCCSA
L12 VCCSA
M10 VCCSA
M11 VCCSA
B +1.8VS B
M12 VCCSA
1A AK11
VCCPLL
AK12 VCCPLL
1
1
+ C93 IO/SA/PLL
C92 330U_6.3V_M_R14 POWER
10U_0805_6.3V6M
2
2
8 OF 11
10/23 Change symbol of C93 from SGA00000Y80 to SF000002N00 CONN@
11/4 Change PN of C93 from SF000002N00 to SF000001G00
A A

PROCESSOR (5/6) PWR
Custom 0.3
5 4 3 2 1
5 4 3 2 1
JCPU1K
SKT_H2
JCPU1I AV11 G8
VSS VSS
A17 VSS VSS AM27 AV14 VSS VSS H1
AA33 VSS VSS AM38 AV6 VSS VSS H26
D AA34 VSS VSS AM39 AW10 VSS VSS H29 D
AA35 VSS VSS AM4 AW11 VSS VSS H33
AA38 VSS VSS AN10 AW36 VSS VSS H39
AA6 VSS VSS AN11 AW6 VSS VSS H5
AB5 VSS VSS AN14 AY11 VSS VSS H6
AC1 VSS VSS AN17 AY14 VSS VSS H9
AC6 VSS VSS AN19 AY18 VSS VSS J11
SKT_H2
AD33 AN22 AY35 J17 JCPU1J
VSS VSS VSS VSS
AD36 VSS VSS AN24 AY4 VSS VSS J20
AD40 VSS VSS AN31 B10 VSS VSS J29 AB7 RSVD
AD5 VSS VSS AN32 B13 VSS VSS J32 AD37 RSVD
AD8 VSS VSS AN33 B14 VSS VSS K1 AG4 RSVD
AE3 VSS VSS AN34 B17 VSS VSS K12 AJ29 RSVD RSVD AT11
AE33 VSS VSS AN35 B23 VSS VSS K13 AJ30 RSVD RSVD AP20
AE36 VSS VSS AN36 B26 VSS VSS K14 AJ31 RSVD RSVD AN20
AF1 VSS VSS AN5 B29 VSS VSS K17 AV34 RSVD RSVD AU10
AF34 VSS VSS AN6 B32 VSS VSS K2 AW34 RSVD RSVD AY10
AF36 VSS VSS AN7 B35 VSS VSS K20
AF37 VSS VSS AN8 B38 VSS VSS K23 P35 RSVD
AF40 VSS VSS AN9 B6 VSS VSS K26 P37 RSVD
AF5 VSS VSS AP1 C11 VSS VSS K29 P39 RSVD
AF6 VSS VSS AP11 C12 VSS VSS K33 R34 RSVD
AF7 VSS VSS AP14 C17 VSS VSS K35 R36 RSVD
AG36 VSS VSS AP17 C20 VSS VSS K37 R38 RSVD RSVD AF4
AH2 VSS VSS AP22 C23 VSS VSS K39 R40 RSVD RSVD AB6
C AH3 AP25 C26 K5 AE6 C
VSS VSS VSS VSS RSVD
AH33 VSS VSS AP27 C29 VSS VSS K6 RSVD AJ11
AH36 VSS VSS AP30 C32 VSS VSS L10
AH37 VSS VSS AP36 C35 VSS VSS L17
AH38 VSS VSS AP37 C7 VSS VSS L20 A38 NCTF RSVD D38
AH39 VSS VSS AP4 C8 VSS VSS L23 AU40 NCTF RSVD C39
AH40 VSS VSS AP40 D17 VSS VSS L26 AW38 NCTF RSVD C38
AH5 VSS VSS AP5 D2 VSS VSS L29 C2 NCTF RSVD J34
AH8 VSS VSS AR11 D20 VSS VSS L8 D1 NCTF RSVD N34
AJ12 VSS VSS AR14 D23 VSS VSS M1
AJ15 AR17 D26 M17 SPARES
VSS VSS VSS VSS
AJ21 AR19 D32 M20 10 OF 11
VSS VSS VSS VSS LOTES_ACAZIF096P01_SANDYBRIDGE
AJ27 AR30 D39 M26 CONN@
VSS VSS VSS VSS
AK1 VSS VSS AT1 D9 VSS VSS M35
AK10 VSS_AK10 VSS AT10 E11 VSS VSS M37
AK13 VSS VSS AT12 E12 VSS VSS M39
AK28 VSS VSS AT17 E26 VSS VSS N8
AK31 VSS VSS AT2 E29 VSS VSS P1
B B
AK36 VSS VSS AT3 F1 VSS VSS P5
AK37 VSS VSS AT30 F10 VSS VSS P6
AK4 VSS VSS AT31 F13 VSS VSS R33
AK8 VSS VSS AT36 F23 VSS VSS T1
AK9 VSS VSS AT37 F26 VSS VSS T5
AL11 VSS VSS AT38 F29 VSS VSS T6
AL14 VSS VSS AT39 F35 VSS VSS U8
AL17 VSS VSS AT4 F37 VSS VSS V1
AL36 VSS VSS AT8 G11 VSS VSS V36
AL5 VSS VSS AT9 G12 VSS VSS V37
AM1 VSS VSS AU1 G17 VSS VSS V38
AM2 VSS VSS AU4 G29 VSS VSS W6
AM21 VSS VSS AU6 G34 VSS VSS Y5
AM23 VSS VSS AU8 G7 VSS VSS Y8
AM25 VSS VSS AV10 AY37 VSS_NCTF
A4 VSS_NCTF B3 VSS_NCTF
AV39 VSS_NCTF
A A
9 OF 11 CONN@
CONN@

PROCESSOR (6/6) VSS
Custom 0.3
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
Layout Note:Place C94 on Bottom Layer at DIMM JDIMM2
close to CPU +DIMM0_VREF 1 VREF_DQ VSS1 2
R17 +1.5V +1.5V Layout Note: 3 4 DDR_A_D4
0_0402_5% JDIMM1 DDR_A_D0 VSS2 DQ4 DDR_A_D5
Place near JDIMMA 5 DQ0 DQ5 6
1 2 +DIMM0_VREF 1 2 +1.5V DDR_A_D1 7 8
+V_DDR_REFA VREF_DQ VSS1 DQ1 VSS3
3 4 DDR_A_D4 9 10 DDR_A_DQS#0
VSS2 DQ4 VSS4 DQS#0
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D0 5 6 DDR_A_D5 DDR_A_DM0 11 12 DDR_A_DQS0
DQ0 DQ5 DM0 DQS0
C94
C96
1U_0402_6.3V6K
C95
1U_0402_6.3V6K
C97
1U_0402_6.3V6K
C98
1U_0402_6.3V6K
C99
All VREF traces should DDR_A_D1 7 8 13 14
DQ1 VSS3 DDR_A_DQS#0 DDR_A_D2 VSS5 VSS6 DDR_A_D6
have 10 mil trace width 1 1 9 VSS4 DQS#0 10 1 1 1 1 15 DQ2 DQ6 16
DDR_A_DM0 11 12 DDR_A_DQS0 DDR_A_D3 17 18 DDR_A_D7
DM0 DQS0 DQ3 DQ7
13 VSS5 VSS6 14 19 VSS7 VSS8 20
DDR_A_D2 15 16 DDR_A_D6 DDR_A_D8 21 22 DDR_A_D12
2 2 DDR_A_D3 DQ2 DQ6 DDR_A_D7 2 2 2 2 DDR_A_D9 DQ8 DQ12 DDR_A_D13
17 18 23 24
DQ3 DQ7 DQ9 DQ13
19 20 25 26
D DDR_A_D8 VSS7 VSS8 DDR_A_D12 DDR_A_DQS#1 VSS9 VSS10 DDR_A_DM1 D
21 22 27 28
DDR_A_D9 DQ8 DQ12 DDR_A_D13 DDR_A_DQS1 DQS#1 DM1 SM_DRAMRST#
23 24 29 30
DQ9 DQ13 DQS1 RESET#
25 26 31 32
DDR_A_DQS#1 VSS9 VSS10 DDR_A_DM1 DDR_A_D10 VSS11 VSS12 DDR_A_D14
27 28 33 34
DDR_A_DQS1 DQS#1 DM1 SM_DRAMRST# DDR_A_D11 DQ10 DQ14 DDR_A_D15
29 30 SM_DRAMRST# <6,11> 35 36
DQS1 RESET# DQ11 DQ15
0.1U_0402_16V4Z
31 32 37 38
+1.5V DDR_A_D10 VSS11 VSS12 DDR_A_D14 DDR_A_D16 VSS13 VSS14 DDR_A_D20
33 34 39 40
DDR_A_D11 DQ10 DQ14 DDR_A_D15 DDR_A_D17 DQ16 DQ20 DDR_A_D21
35 36 41 42
DQ11 DQ15 DQ17 DQ21
37
VSS13 VSS14
38
+1.5V
Layout Note: Place near JDIMMA 43
VSS15 VSS16
44
DDR_A_D16 39 40 DDR_A_D20 DDR_A_DQS#2 45 46 DDR_A_DM2
DQ16 DQ20 DQS#2 DM2
1
DDR_A_D17 41 42 DDR_A_D21 DDR_A_DQS2 47 48

R18 DQ17 DQ21 DQS2 VSS17 DDR_A_D22
1 43 VSS15 VSS16 44 49 VSS18 DQ22 50
+DIMM0_VREF 1K_0402_1% DDR_A_DQS#2 45 46 DDR_A_DM2 DDR_A_D18 51 52 DDR_A_D23
DQS#2 DM2 DQ18 DQ23
10U_0603_6.3V6M
C100
10U_0603_6.3V6M
C101
10U_0603_6.3V6M
C102
10U_0603_6.3V6M
C103
10U_0603_6.3V6M
C104
10U_0603_6.3V6M
C105
10U_0603_6.3V6M
C294 DDR_A_DQS2 47 48 DDR_A_D19 53 54
DQS2 VSS17 DQ19 VSS19
1
49 50 DDR_A_D22 1 1 1 1 1 1 1 55 56 DDR_A_D28
2
2 VSS18 DQ22 VSS20 DQ28
C106
DDR_A_D18 51 52 DDR_A_D23 + DDR_A_D24 57 58 DDR_A_D29
+DIMM0_VREF DDR_A_D19 DQ18 DQ23 C107 DDR_A_D25 DQ24 DQ29
53 DQ19 VSS19 54 59 DQ25 VSS21 60
55 56 DDR_A_D28 330U_2.5V_M_R15 61 62 DDR_A_DQS#3
2
DDR_A_D24 VSS20 DQ28 DDR_A_D29 2 2 2 2 2 2 2 @ DDR_A_DM3 VSS22 DQS#3 DDR_A_DQS3
57 DQ24 DQ29 58 63 DM3 DQS3 64
1
DDR_A_D25 59 60 65 66
R19 DQ25 VSS21 DDR_A_DQS#3 DDR_A_D26 VSS23 VSS24 DDR_A_D30
61 VSS22 DQS#3 62 67 DQ26 DQ30 68
1K_0402_1% DDR_A_DM3 63 64 DDR_A_DQS3 DDR_A_D27 69 70 DDR_A_D31
DM3 DQS3 DQ27 DQ31
65 VSS23 VSS24 66 71 VSS25 VSS26 72
DDR_A_D26 67 68 DDR_A_D30 10/23 Change symbol of C107 from SGA20331E10 to
2
DDR_A_D27 DQ26 DQ30 DDR_A_D31

69 70
71
DQ27 DQ31
72
SF000002M00
VSS25 VSS26 DDR_A_CKE2 DDR_A_CKE3
<6> DDR_A_CKE2 73 CKE0 CKE1 74 DDR_A_CKE3 <6>
75 VDD1 VDD2 76
77 78 DDR_A_MA15
DDR_A_CKE0 DDR_A_CKE1 DDR_A_BS2 NC1 A15 DDR_A_MA14
<6> DDR_A_CKE0 73 CKE0 CKE1 74 DDR_A_CKE1 <6> <6> DDR_A_BS2 79 BA2 A14 80
75 VDD1 VDD2 76 81 VDD3 VDD4 82
77 78 DDR_A_MA15 DDR_A_MA12 83 84 DDR_A_MA11
C DDR_A_BS2 NC1 A15 DDR_A_MA14 DDR_A_MA9 A12/BC# A11 DDR_A_MA7 C
<6> DDR_A_BS2 79 BA2 A14 80 85 A9 A7 86
81 VDD3 VDD4 82 87 VDD5 VDD6 88
DDR_A_MA12 DDR_A_MA11 DDR_A_DQS#[0..7] <6> DDR_A_MA8 DDR_A_MA6
83 A12/BC# A11 84 89 A8 A6 90
DDR_A_MA9 85 86 DDR_A_MA7 DDR_A_MA5 91 92 DDR_A_MA4
A9 A7 DDR_A_DQS[0..7] <6> A5 A4
87 VDD5 VDD6 88 93 VDD7 VDD8 94
DDR_A_MA8 89 90 DDR_A_MA6 DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA5 A8 A6 DDR_A_MA4 DDR_A_D[0..63] <6> DDR_A_MA1 A3 A2 DDR_A_MA0
91 A5 A4 92 97 A1 A0 98
93 94 99 100
DDR_A_MA3 VDD7 VDD8 DDR_A_MA2 DDR_A_MA[0..15] <6> DDR_A_CLK2 VDD9 VDD10 DDR_A_CLK3
95 96 <6> DDR_A_CLK2 101 102 DDR_A_CLK3 <6>
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_A_CLK2# CK0 CK1 DDR_A_CLK3#
97 98 103 104 DDR_A_CLK3# <6>
A1 A0 <6> DDR_A_CLK2# CK0# CK1#
99 100 105 106
DDR_A_CLK0 VDD9 VDD10 DDR_A_CLK1 DDR_A_MA10 VDD11 VDD12 DDR_A_BS1
<6> DDR_A_CLK0 101 102 DDR_A_CLK1 <6> 107 108 DDR_A_BS1 <6>
DDR_A_CLK0# CK0 CK1 DDR_A_CLK1# DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
103 104 DDR_A_CLK1# <6> <6> DDR_A_BS0 109 110 DDR_A_RAS# <6>
<6> DDR_A_CLK0# CK0# CK1# +1.5V BA0 RAS#
105 106 111 112
DDR_A_MA10 VDD11 VDD12 DDR_A_BS1 DDR_A_WE# VDD13 VDD14 DDR_A_CS2#
107 108 DDR_A_BS1 <6> <6> DDR_A_WE# 113 114 DDR_A_CS2# <6>
DDR_A_BS0 A10/AP BA1 DDR_A_RAS# DDR_A_CAS# WE# S0# DDR_A_ODT2
<6> DDR_A_BS0 109 110 DDR_A_RAS# <6> <6> DDR_A_CAS# 115 116 DDR_A_ODT2 <6>
BA0 RAS# CAS# ODT0
111 112 117 118
VDD13 VDD14 VDD15 VDD16
1
DDR_A_WE# 113 114 DDR_A_CS0# DDR_A_MA13 119 120 DDR_A_ODT3 +VREF_CA
<6> DDR_A_WE# WE# S0# DDR_A_CS0# <6> A13 ODT1 DDR_A_ODT3 <6>
DDR_A_CAS# 115 116 DDR_A_ODT0 R20 DDR_A_CS3# 121 122
<6> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <6> <6> DDR_A_CS3# S1# NC2
117 118 1K_0402_1% 123 124
DDR_A_MA13 VDD15 VDD16 DDR_A_ODT1 VDD17 VDD18 +VREF_CA
119 120 DDR_A_ODT1 <6> 125 126
A13 ODT1 NCTEST VREF_CA
2.2U_0603_6.3V6K
DDR_A_CS1# 121 122 127 128
<6> DDR_A_CS1#
2
S1# NC2 VSS27 VSS28
C108
0.1U_0402_16V4Z
C109
123 124 DDR_A_D32 129 130 DDR_A_D36
VDD17 VDD18 +VREF_CA DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 126 131 132 1 1
NCTEST VREF_CA DQ33 DQ37
2.2U_0603_6.3V6K
127 128 133 134
VSS27 VSS28 VSS29 VSS30
C110
0.1U_0402_16V4Z
C111
DDR_A_D32 129 130 DDR_A_D36 DDR_A_DQS#4 135 136 DDR_A_DM4
DQ32 DQ36 DQS#4 DM4
1
DDR_A_D33 131 132 DDR_A_D37 1 1 DDR_A_DQS4 137 138
DQ33 DQ37 R21 DQS4 VSS31 DDR_A_D38 2 2
133 134 139 140
DDR_A_DQS#4 VSS29 VSS30 DDR_A_DM4 1K_0402_1% DDR_A_D34 VSS32 DQ38 DDR_A_D39
135 136 141 142
DDR_A_DQS4 DQS#4 DM4 DDR_A_D35 DQ34 DQ39
137 138 143 144
DQS4 VSS31 DDR_A_D38 2 2 DQ35 VSS33 DDR_A_D44
139 140 145 146
2
DDR_A_D34 VSS32 DQ38 DDR_A_D39 DDR_A_D40 VSS34 DQ44 DDR_A_D45
141 142 147 148
B DDR_A_D35 DQ34 DQ39 DDR_A_D41 DQ40 DQ45 B
143 144 149 150
DQ35 VSS33 DDR_A_D44 DQ41 VSS35 DDR_A_DQS#5
145 146 151 152
DDR_A_D40 VSS34 DQ44 DDR_A_D45 DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5
147 148 153 154
DDR_A_D41 DQ40 DQ45 DM5 DQS5
149 150 155 156
DQ41 VSS35 DDR_A_DQS#5 DDR_A_D42 VSS37 VSS38 DDR_A_D46
151 152 157 158
DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5 DDR_A_D43 DQ42 DQ46 DDR_A_D47
153 154 159 160
DM5 DQS5 DQ43 DQ47
155 156 161 162
DDR_A_D42 VSS37 VSS38 DDR_A_D46 DDR_A_D48 VSS39 VSS40 DDR_A_D52
157 158 163 164
DDR_A_D43 DQ42 DQ46 DDR_A_D47 DDR_A_D49 DQ48 DQ52 DDR_A_D53
159 160 165 166
DQ43 DQ47 DQ49 DQ53
161 162 167 168
DDR_A_D48 VSS39 VSS40 DDR_A_D52 DDR_A_DQS#6 VSS41 VSS42 DDR_A_DM6
Layout Note:Place near JDIMM1.203/204 163 164 169 170
DDR_A_D49 DQ48 DQ52 DDR_A_D53 DDR_A_DQS6 DQS#6 DM6
165 166 171 172
DQ49 DQ53 DQS6 VSS43 DDR_A_D54
167 168 173 174
+0.75VS DDR_A_DQS#6 VSS41 VSS42 DDR_A_DM6 DDR_A_D50 VSS44 DQ54 DDR_A_D55
169 170 175 176
DDR_A_DQS6 DQS#6 DM6 DDR_A_D51 DQ50 DQ55
171 172 177 178
DQS6 VSS43 DDR_A_D54 DQ51 VSS45 DDR_A_D60
173 174 179 180
DDR_A_D50 VSS44 DQ54 DDR_A_D55 DDR_A_D56 VSS46 DQ60 DDR_A_D61
175 176 181 182
DDR_A_D51 DQ50 DQ55 DDR_A_D57 DQ56 DQ61
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
177 178 183 184

DQ51 VSS45 DDR_A_D60 DQ57 VSS47 DDR_A_DQS#7
1 1 179 180 185 186
DDR_A_D56 VSS46 DQ60 DDR_A_D61 DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
181 182 187 188
DQ56 DQ61 DM7 DQS7
C116
C112 DDR_A_D57 183 184 189 190

DQ57 VSS47 DDR_A_DQS#7
Layout Note:Place near JDIMM2.203/204 DDR_A_D58 VSS49 VSS50 DDR_A_D62
185 186 191 192
2 2 DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7 DDR_A_D59 DQ58 DQ62 DDR_A_D63
187 188 193 194
DM7 DQS7 +0.75VS DQ59 DQ63
189 190 195 196
DDR_A_D58 VSS49 VSS50 DDR_A_D62 10K_0402_5% 2 VSS51 VSS52
191 192 1 R31 197 198
DDR_A_D59 DQ58 DQ62 DDR_A_D63 SA0 EVENT# D_CK_SDATA
193 194 +3VS 199 200
DQ59 DQ63 VDDSPD SDA
4.7U_0603_6.3V6K
195 196 201 202 D_CK_SCLK

VSS51 VSS52 SA1 SCL
0.1U_0402_16V4Z
197 198 +0.75VS 203 204 +0.75VS

SA0 EVENT# D_CK_SDATA VTT1 VTT2
+3VS 199 200 1 1
VDDSPD SDA D_CK_SDATA <11,13>
C117
0.1U_0402_16V4Z
C114
2.2U_0603_6.3V6K
C115
10K_0402_5%
R32
201 202 D_CK_SCLK 205 206
SA1 SCL D_CK_SCLK <11,13> G1 G2
2
C113
+0.75VS 203 204 +0.75VS 1 1

VTT1 VTT2 FOX_AS0A626-U2SN-7F
1
2 2
0.1U_0402_16V4Z
C118
2.2U_0603_6.3V6K
C119
10K_0402_5%
R30
10K_0402_5%
R33
A CONN@ A
205 G1 G2 206
2
1 1 2 2
SUYIN_600023HB204G208ZL
STANDARD:5.2mm
1
CONN@
DDR_A_DM0 R22 1 2 0_0402_5%
2
2 2 DDR_A_DM1 R23 1 2 0_0402_5%

STANDARD:9.2mm
1
DDR_A_DM2 R24 1 2 0_0402_5%

DDR_A_DM3 R25 1 2 0_0402_5%
DDR_A_DM4
DDR_A_DM5
R26
R27
1 2 0_0402_5%
0_0402_5%
1 2 Issued Date 2010/07/20 Deciphered Date 2011/07/20 Title
DDR_A_DM6 R28 1 2 0_0402_5%
DDR_A_DM7 R29 1 2 0_0402_5%
DDRIII CHANNELA
Custom 0.3
5 4 3 2 1
5 4 3 2 1
Layout Note:Place C124 on Bottom Layer at DIMM Layout Note:

+1.5V +1.5V
close to CPU +1.5V +1.5V +1.5V Place near JDIMMB
R34 JDIMM3
0_0402_5% JDIMM4 +DIMM1_VREF 1 2
VREF_DQ VSS1
+V_DDR_REFB 1 2 +DIMM1_VREF 1 VREF_DQ VSS1 2 3 VSS2 DQ4 4 DDR_B_D4
0.1U_0402_16V4Z
C124
3 4 DDR_B_D4 DDR_B_D0 5 6 DDR_B_D5
VSS2 DQ4 DQ0 DQ5
0.1U_0402_16V4Z
C125
1U_0402_6.3V6K
C120
1U_0402_6.3V6K
C121
1U_0402_6.3V6K
C122
1U_0402_6.3V6K
C126
All VREF traces should 1 1 DDR_B_D0 5 6 DDR_B_D5 DDR_B_D1 7 8
DDR_B_D1 DQ0 DQ5 DQ1 VSS3 DDR_B_DQS#0
have 10 mil trace width 7 DQ1 VSS3 8 1 1 1 1 9 VSS4 DQS#0 10
9 10 DDR_B_DQS#0 DDR_B_DM0 11 12 DDR_B_DQS0
DDR_B_DM0 VSS4 DQS#0 DDR_B_DQS0 DM0 DQS0
11 DM0 DQS0 12 13 VSS5 VSS6 14
2 2 13 14 DDR_B_D2 15 16 DDR_B_D6
DDR_B_D2 VSS5 VSS6 DDR_B_D6 2 2 2 2 DDR_B_D3 DQ2 DQ6 DDR_B_D7
15 16 17 18
DDR_B_D3 DQ2 DQ6 DDR_B_D7 DQ3 DQ7
17 18 19 20
DQ3 DQ7 DDR_B_DQS#[0..7] <6> DDR_B_D8 VSS7 VSS8 DDR_B_D12
19 20 21 22
D DDR_B_D8 VSS7 VSS8 DDR_B_D12 DDR_B_D9 DQ8 DQ12 DDR_B_D13 D
21 22 23 24
DDR_B_D9 DQ8 DQ12 DDR_B_D13 DDR_B_DQS[0..7] <6> DQ9 DQ13
23 24 25 26
DQ9 DQ13 DDR_B_DQS#1 VSS9 VSS10 DDR_B_DM1
25 26 27 28
DDR_B_DQS#1 VSS9 VSS10 DDR_B_DM1 DDR_B_D[0..63] <6> DDR_B_DQS1 DQS#1 DM1 SM_DRAMRST#
27 28 29 30
DQS#1 DM1 DQS1 RESET#
0.1U_0402_16V4Z
DDR_B_DQS1 29 30 SM_DRAMRST# 31 32
+1.5V DQS1 RESET# SM_DRAMRST# <6,10> DDR_B_MA[0..15] <6> VSS11 VSS12
31 32 DDR_B_D10 33 34 DDR_B_D14
DDR_B_D10 VSS11 VSS12 DDR_B_D14 DDR_B_D11 DQ10 DQ14 DDR_B_D15
33 34 35 36
+DIMM1_VREF DDR_B_D11 DQ10 DQ14 DDR_B_D15 DQ11 DQ15
35 36 37 38
DQ11 DQ15 DDR_B_D16 VSS13 VSS14 DDR_B_D20
37
VSS13 VSS14
38 Layout Note: Place near JDIMMB 39
DQ16 DQ20
40
1
DDR_B_D16 39 40 DDR_B_D20 +1.5V DDR_B_D17 41 42 DDR_B_D21

R35 DDR_B_D17 DQ16 DQ20 DDR_B_D21 DQ17 DQ21
1 41 42 43 44
1K_0402_1% DQ17 DQ21 DDR_B_DQS#2 VSS15 VSS16 DDR_B_DM2
43 VSS15 VSS16 44 45 DQS#2 DM2 46
C295 DDR_B_DQS#2 45 46 DDR_B_DM2 DDR_B_DQS2 47 48
DQS#2 DM2 DQS2 VSS17
10U_0603_6.3V6M
C130
10U_0603_6.3V6M
C123
10U_0603_6.3V6M
C127
10U_0603_6.3V6M
C131
10U_0603_6.3V6M
C132
10U_0603_6.3V6M
C128
10U_0603_6.3V6M
DDR_B_DQS2 47 48 49 50 DDR_B_D22
2
DQS2 VSS17 VSS18 DQ22
1
2
C133
+DIMM1_VREF 49 50 DDR_B_D22 1 1 1 1 1 1 1 DDR_B_D18 51 52 DDR_B_D23
DDR_B_D18 VSS18 DQ22 DDR_B_D23 + DDR_B_D19 DQ18 DQ23
51 DQ18 DQ23 52 53 DQ19 VSS19 54
1
DDR_B_D19 53 54 C129 55 56 DDR_B_D28

R36 DQ19 VSS19 DDR_B_D28 560U_2.5V_M_R10 DDR_B_D24 VSS20 DQ28 DDR_B_D29
55 56 57 58
2
1K_0402_1% DDR_B_D24 VSS20 DQ28 DDR_B_D29 2 2 2 2 2 2 2 DDR_B_D25 DQ24 DQ29
57 DQ24 DQ29 58 59 DQ25 VSS21 60
DDR_B_D25 59 60 61 62 DDR_B_DQS#3
DQ25 VSS21 DDR_B_DQS#3 DDR_B_DM3 VSS22 DQS#3 DDR_B_DQS3
61 62 63 64
2

63 DM3 DQS3 64 65 VSS23 VSS24 66
65 66 10/23 Change symbol of C129 from SGA20331E10 to SF000002M00 DDR_B_D26 67 68 DDR_B_D30
67 DQ26 DQ30 68 11/2 Change PN of C129 from SF000002M00 to SF000001K00 69 DQ27 DQ31 70
DDR_B_D27 69 70 DDR_B_D31 71 72
DQ27 DQ31 VSS25 VSS26
71 VSS25 VSS26 72
DDR_B_CKE2 73 74 DDR_B_CKE3
DDR_B_CKE0 DDR_B_CKE1 <6> DDR_B_CKE2 CKE0 CKE1 DDR_B_CKE3 <6>
<6> DDR_B_CKE0 73 CKE0 CKE1 74 DDR_B_CKE1 <6> 75 VDD1 VDD2 76
75 76 77 78 DDR_B_MA15
VDD1 VDD2 DDR_B_MA15 DDR_B_BS2 NC1 A15 DDR_B_MA14
77 NC1 A15 78 <6> DDR_B_BS2 79 BA2 A14 80
C DDR_B_BS2 DDR_B_MA14 DDR_B_DM0 R37 0_0402_5% C
<6> DDR_B_BS2 79 BA2 A14 80 1 2 81 VDD3 VDD4 82
81 82 DDR_B_DM1 R38 1 2 0_0402_5% DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA12 VDD3 VDD4 DDR_B_MA11 DDR_B_DM2 R39 0_0402_5% DDR_B_MA9 A12/BC# A11 DDR_B_MA7
83 A12/BC# A11 84 1 2 85 A9 A7 86
DDR_B_MA9 85 86 DDR_B_MA7 DDR_B_DM3 R40 1 2 0_0402_5% 87 88
A9 A7 DDR_B_DM4 R41 0_0402_5% DDR_B_MA8 VDD5 VDD6 DDR_B_MA6
87 VDD5 VDD6 88 1 2 89 A8 A6 90
DDR_B_MA8 89 90 DDR_B_MA6 DDR_B_DM5 R42 1 2 0_0402_5% DDR_B_MA5 91 92 DDR_B_MA4
DDR_B_MA5 A8 A6 DDR_B_MA4 DDR_B_DM6 R43 0_0402_5% A5 A4
91 A5 A4 92 1 2 93 VDD7 VDD8 94
93 94 DDR_B_DM7 R44 1 2 0_0402_5% DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA3 VDD7 VDD8 DDR_B_MA2 DDR_B_MA1 A3 A2 DDR_B_MA0
95 96 97 98
DDR_B_MA1 A3 A2 DDR_B_MA0 A1 A0
97 98 99 100
A1 A0 DDR_B_CLK2 VDD9 VDD10 DDR_B_CLK3
99 100 <6> DDR_B_CLK2 101 102 DDR_B_CLK3 <6>
DDR_B_CLK0 VDD9 VDD10 DDR_B_CLK1 DDR_B_CLK2# CK0 CK1 DDR_B_CLK3#
<6> DDR_B_CLK0 101 102 DDR_B_CLK1 <6> 103 104 DDR_B_CLK3# <6>
DDR_B_CLK0# CK0 CK1 DDR_B_CLK1# <6> DDR_B_CLK2# CK0# CK1#
103 104 DDR_B_CLK1# <6> 105 106
<6> DDR_B_CLK0# CK0# CK1# +1.5V DDR_B_MA10 VDD11 VDD12 DDR_B_BS1
105 106 107 108 DDR_B_BS1 <6>
DDR_B_MA10 VDD11 VDD12 DDR_B_BS1 DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
107 108 DDR_B_BS1 <6> <6> DDR_B_BS0 109 110 DDR_B_RAS# <6>
DDR_B_BS0 A10/AP BA1 DDR_B_RAS# BA0 RAS#
<6> DDR_B_BS0 109 110 DDR_B_RAS# <6> 111 112
BA0 RAS# DDR_B_WE# VDD13 VDD14 DDR_B_CS2#
111 112 <6> DDR_B_WE# 113 114 DDR_B_CS2# <6>
VDD13 VDD14 WE# S0#
1
DDR_B_WE# 113 114 DDR_B_CS0# DDR_B_CAS# 115 116 DDR_B_ODT2
<6> DDR_B_WE# WE# S0# DDR_B_CS0# <6> <6> DDR_B_CAS# CAS# ODT0 DDR_B_ODT2 <6>
DDR_B_CAS# 115 116 DDR_B_ODT0 R45 117 118
<6> DDR_B_CAS# CAS# ODT0 DDR_B_ODT0 <6> DDR_B_MA13 VDD15 VDD16 DDR_B_ODT3 +VREF_CB
117 118 1K_0402_1% 119 120
DDR_B_MA13 VDD15 VDD16 DDR_B_ODT1 DDR_B_CS3# A13 ODT1 DDR_B_ODT3 <6>
119 120 DDR_B_ODT1 <6> <6> DDR_B_CS3# 121 122
DDR_B_CS1# A13 ODT1 S1# NC2
<6> DDR_B_CS1# 121 122 123 124
2
S1# NC2 VDD17 VDD18 +VREF_CB
123 124 125 126
VDD17 VDD18 +VREF_CB NCTEST VREF_CA
125 126 127 128
NCTEST VREF_CA DDR_B_D32 VSS27 VSS28 DDR_B_D36
127 128 129 130
VSS27 VSS28 DQ32 DQ36
2.2U_0603_6.3V6K
C136
0.1U_0402_16V4Z
C137
DDR_B_D32 129 130 DDR_B_D36 DDR_B_D33 131 132 DDR_B_D37
DQ32 DQ36 DQ33 DQ37
1
2.2U_0603_6.3V6K
C134
0.1U_0402_16V4Z
C135
DDR_B_D33 131 132 DDR_B_D37 133 134 1 1
DQ33 DQ37 R46 DDR_B_DQS#4 VSS29 VSS30 DDR_B_DM4
133 134 1 1 135 136
DDR_B_DQS#4 VSS29 VSS30 DDR_B_DM4 1K_0402_1% DDR_B_DQS4 DQS#4 DM4
135 136 137 138
DDR_B_DQS4 DQS#4 DM4 DQS4 VSS31 DDR_B_D38
137 138 139 140
DQS4 VSS31 DDR_B_D38 DDR_B_D34 VSS32 DQ38 DDR_B_D39 2 2
139 140 141 142
2
DDR_B_D34 VSS32 DQ38 DDR_B_D39 2 2 DDR_B_D35 DQ34 DQ39
141 142 143 144
B DDR_B_D35 DQ34 DQ39 DQ35 VSS33 DDR_B_D44 B
143 144 145 146
DQ35 VSS33 DDR_B_D44 DDR_B_D40 VSS34 DQ44 DDR_B_D45
145 146 147 148
DDR_B_D40 VSS34 DQ44 DDR_B_D45 DDR_B_D41 DQ40 DQ45
147 148 149 150
149 150 151 152
DQ41 VSS35 DDR_B_DQS#5 DDR_B_DM5 VSS36 DQS#5 DDR_B_DQS5
151 152 153 154
153 154 155 156
DM5 DQS5 DDR_B_D42 VSS37 VSS38 DDR_B_D46
155 156 Layout Note:Place near JDIMM3.203/204 157 158
157 158 159 160
159 160 161 162
DQ43 DQ47 +0.75VS DDR_B_D48 VSS39 VSS40 DDR_B_D52
161 162 Layout Note:Place near JDIMM4.203/204 163 164
163 164 165 166
165 166 167 168
DQ49 DQ53 +0.75VS DDR_B_DQS#6 VSS41 VSS42 DDR_B_DM6
167 168 169 170
VSS41 VSS42 DQS#6 DM6
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
DDR_B_DQS#6 169 170 DDR_B_DM6 DDR_B_DQS6 171 172
DDR_B_DQS6 DQS#6 DM6 DQS6 VSS43 DDR_B_D54
171 172 1 1 173 174
DQS6 VSS43 VSS44 DQ54
C139
C141
VSS44 DQ54 DQ50 DQ55
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
DDR_B_D50 175 176 DDR_B_D55 DDR_B_D51 177 178

+3VS +3VS DDR_B_D51 DQ50 DQ55 DQ51 VSS45 DDR_B_D60
177 178 1 1 179 180
DQ51 VSS45 2 2 VSS46 DQ60
C138
C140

DDR_B_D56 VSS46 DQ60 DDR_B_D61 DDR_B_D57 DQ56 DQ61
181 182 183 184
183 184 185 186
DQ57 VSS47 VSS48 DQS#7
1
2 2
0.1U_0402_16V4Z
C142
2.2U_0603_6.3V6K
C143
1 1 185 186 DDR_B_DQS#7 DDR_B_DM7 187 188 DDR_B_DQS7

R47 DDR_B_DM7 VSS48 DQS#7 DDR_B_DQS7 DM7 DQS7
187 188 189 190
10K_0402_5% DM7 DQS7 DDR_B_D58 VSS49 VSS50 DDR_B_D62
189 190 191 192
191 192 193 194
2 2 DDR_B_D59 DQ58 DQ62 DDR_B_D63 DQ59 DQ63
193 194 195 196
2
DQ59 DQ63 R50 VSS51 VSS52

195 196 1 2 10K_0402_5% 197 198
VSS51 VSS52 SA0 EVENT# D_CK_SDATA
197 198 199 200
SA0 EVENT# D_CK_SDATA R48 1 VDDSPD SDA D_CK_SCLK
199 200 +3VS 2 10K_0402_5% 201 202
VDDSPD SDA D_CK_SCLK D_CK_SDATA <10,13> SA1 SCL
201 202 +0.75VS 203 204 +0.75VS
SA1 SCL D_CK_SCLK <10,13> VTT1 VTT2
+0.75VS 203 204 +0.75VS
VTT1 VTT2
0.1U_0402_16V4Z
C144
2.2U_0603_6.3V6K
1 1 C145 205 G1 G2 206
1
A A
205 G1 G2 206
R49 FOX_AS0A626-UARN-7F
10K_0402_5% FOX_AS0A626-U2RN-7F CONN@
CONN@ 2 2
Reverse H:9.2mm
2
<Address: 01> Security Classification Compal Secret Data Compal Electronics, Inc.
Reverse H:5.2mm Issued Date 2010/07/20 Deciphered Date 2011/07/20 Title
DDRIII CHANNELB
Custom 0.3
5 4 3 2 1
5 4 3 2 1
U1C CPT_CRB
AC56 SATA_DTX_C_PRX_N0
SATA0RXN SATA_DTX_C_PRX_N0 <37>
AB55 SATA_DTX_C_PRX_P0
CLINK
SATA0RXP SATA_DTX_C_PRX_P0 <37>
AE46 SATA_PTX_DRX_N0 SATA for MINI SSD
SATA0TXN SATA_PTX_DRX_N0 <37>
D AE44 SATA_PTX_DRX_P0 D
SATA0TXP SATA_PTX_DRX_P0 <37>
SATA3
BA50 AA53 SATA_DTX_C_PRX_N1
CL_CLK1 SATA1RXN SATA_DTX_C_PRX_N1 <37>
BF50 AA56 SATA_DTX_C_PRX_P1
CL_DATA1 SATA1RXP SATA_DTX_C_PRX_P1 <37>
@ 1 R891 2 0_0402_5% BF49 AG49 SATA_PTX_DRX_N1 SATA for HDD
<45> EC_REVPW ROK CL_RST1# SATA1TXN SATA_PTX_DRX_N1 <37>
AG47 SATA_PTX_DRX_P1
SATA1TXP SATA_PTX_DRX_P1 <37>
<13> PCH_PW ROK_R 1 R892 2 0_0402_5% BC46 APWROK
AL50 SATA_DTX_C_PRX_N2
SATA2RXN SATA_DTX_C_PRX_N2 <37>
BN21 AL49 SATA_DTX_C_PRX_P2
PWM0 SATA2RXP SATA_DTX_C_PRX_P2 <37>
SATA_PTX_DRX_N2 <37> SATA for SSD(Reserve)
BT21 AL56 SATA_PTX_DRX_N2 10/27 Add
PWM1 SATA2TXN SATA_PTX_DRX_P2
BM20 PWM2 SATA2TXP AL53 SATA_PTX_DRX_P2 <37>
BN19 PWM3 SATA3RXN AN46
FAN
SATA2
SATA3RXP AN44
SATA3TXN AN56
PCH_GPIO17 BT17 AM55
CAM_OFF TACH0_GPIO17 SATA3TXP SATA_DTX_C_PRX_N4
<36> CAM_OFF BR19 TACH1_GPIO1 SATA4RXN AN49 SATA_DTX_C_PRX_N4 <37>
PCH_GPIO6 BA22 AN50 SATA_DTX_C_PRX_P4
TACH2_GPIO6 SATA4RXP SATA_DTX_C_PRX_P4 <37>
SATA_PTX_DRX_N4 <37> SATA for ODD
EC_SCI# BR16 AT50 SATA_PTX_DRX_N4
<45> EC_SCI# TACH3_GPIO7 SATA4TXN
PCH_GPIO68 BU16 AT49 SATA_PTX_DRX_P4
TACH4_GPIO68 SATA4TXP SATA_PTX_DRX_P4 <37>
PCH_GPIO69 BM18 AT46
PCH_GPIO70 TACH5_GPIO69 SATA5RXN
BN17 TACH6_GPIO70 SATA5RXP AT44
PCH_GPIO71 BP15 AV50
TACH7_GPIO71 SATA5TXN
SATA5TXP AV49
BC43 SST
AF55 CLK_BUF_PCIE_SATA# T54
PCH_GPIO22 CLKIN_SATA_N CLK_BUF_PCIE_SATA
BA53 SCLOCK_GPIO22 CLKIN_SATA_P AG56 T57
PROJECT_ID2 BE54
PCH_GPIO39 SLOAD_GPIO38 PCH_SATALED# +1.05VS_PCH
BF55 SDATAOUT0_GPIO39 SATALED# BF57 PCH_SATALED# <48>
PCH_GPIO48 AW53 AJ55 Layout Note:SATA_COMP WITH LENGTH NO MORE THAN 500 MILS TO
SDATAOUT1_GPIO48 SATAICOMPI SATA_COMP R51
SATAICOMPO AJ53 1 2 37.4_0402_1%
C RESISTOR. C
GPIO
BC54 PCH_GPIO21
SATA0GP_GPIO21 PCH_GPIO19
AY52
SATA1GP_GPIO19 PROJECT_ID0 Boot BIOS Strap Bit 0(GPIO19)
SATA2GP_GPIO36 BB55
AY20 BG53 PROJECT_ID1
NC SATA3GP_GPIO37 PCH_GPIO16 SERIRQ C963 @ 1
SATA4GP_GPIO16 AU56 2 1000P_0402_50V7K
BA56 PCH_GPIO49 SATA3_COMP C996 @ 1 2 1000P_0402_50V7K
SATA5GP_GPIO49 +1.05VS_PCH
SATA3COMPI AE54 R52

PROJECT ID TABLE AE52 SATA3_COMP 2 1 49.9_0402_1%
+3VS SATA3RCOMPO
TP16 AE50
DIS@ R53
10K_0402_5% 2 1 R680 AC52 SATA3RBIAS 1 2
10K_0402_5% 2 SATA3RBIAS
1 R61 PROJECT_ID0
UMA@ 750_0402_1%
AMIC@
10K_0402_5% 2 1 R681 BB57 EC_GA20
A20GATE EC_GA20 <45>
10K_0402_5% 2 1 R62 PROJECT_ID1 BN56
INIT3_3V#
HOST
DMIC@ BG56 EC_KBRST#
RCIN# EC_KBRST# <45>
AV52 SERIRQ
10K_0402_5% 2 @ SERIRQ SERIRQ <45>
1 R511 THRMTRIP# E56 H_THERMTRIP#
H_THERMTRIP# <5>
10K_0402_5% 2 1 R209 PROJECT_ID2 H48 PCH_PECI_R 0_0402_5% 1 @ 2 R111
PECI H_PM_SYNC H_PECI <5,45>
PMSYNCH F55 H_PM_SYNC <5> +3VS
PCH_SATALED# R54 1 2 10K_0402_5%

3 OF 10 EC_GA20 R55 1 2 10K_0402_5%
BD82H67-QNCY-B1_FCBGA942 EC_KBRST# R56 1 2 10K_0402_5%
B SERIRQ R57 10K_0402_5% B
1 2
PCH_GPIO21 R58 1 2 10K_0402_5%
PCH_GPIO19 R59 1 2 10K_0402_5%
PCH_GPIO16 R60 1 2 10K_0402_5%
PCH_GPIO49 R499 1 2 10K_0402_5%
PCH_GPIO17 R502 1 2 10K_0402_5%
CAM_OFF R503 1 @ 2 10K_0402_5%
PCH_GPIO6 R504 1 2 10K_0402_5%
EC_SCI# R505 1 @ 2 10K_0402_5%
PCH_GPIO68 R506 1 2 10K_0402_5%
PCH_GPIO69 R507 1 2 10K_0402_5%
PCH_GPIO70 R508 1 2 10K_0402_5%
PCH_GPIO71 R509 1 2 10K_0402_5%
7/30 R510--- CRB:1K ohm;EDS:10K ohm PCH_GPIO22 R510 1 2 10K_0402_5%
7/30 R512--- CRB:10K ohm PD to GND;EDS:10K ohm PU PCH_GPIO39 R512 1 2 10K_0402_5%

PCH_GPIO48 R513 1 2 10K_0402_5%
to +3VS
CLK_BUF_PCIE_SATA# R361 1 2 10K_0402_5%

CLK_BUF_PCIE_SATA R362 1 2 10K_0402_5%
PCH_GPIO19 R347 1 @ 2 1K_0402_1%
+3VSB
+RTCVCC
+RTCBATT
A A
D3
2
W=20mils 1 R299
1 3 +RTCBATT_R 1 2
C293 W=20mils W=20mils
1U_0402_6.3V6K DAN202UT106_SC70 1K_0402_5%
2
PCH (1/9) SATA,FAN
Custom 0.3
5 4 3 2 1
5 4 3 2 1
+3VALW
HDA for AUDIO EC_SMI# R324 2 1 10K_0402_5%

EC_SW I# R74 2 1 10K_0402_5%
1 2 HDA_BITCLK_PCH PCH_GPIO74 R75 2 1 10K_0402_5%
<41> HDA_BITCLK_AUDIO
R69 33_0402_5% U1D PCH_SML1CLK R63 2 1 4.7K_0402_5%
AW55 PCH_GPIO0 PCH_SML1DAT R76 2 1 4.7K_0402_5%
BMBUSY#_GPIO0 CLKRUN# LAN_SMBCLK R64 2.2K_0402_5%
BA20 LDRQ1#_GPIO23 CLKRUN#_GPIO32 BC56 CLKRUN# <45> 2 1
1 2 HDA_RST#_PCH LPC_AD0 BK15 BC25 PCH_GPIO33 LAN_SMBDATA R65 2 1 2.2K_0402_5%
<41> HDA_RST#_AUDIO <45> LPC_AD0 FWH0_LAD0 HDA_DOCK_EN#_GPIO33
R72 33_0402_5% LPC_AD1 BJ17 BL56 PCH_GPIO34 PCH_GPIO60 R77 2 1 2.2K_0402_5%
HDA_SDOUT_PCH <45> LPC_AD1 LPC_AD2 FWH1_LAD1 STP_PCI#_GPIO34 PCH_GPIO35 PM_LANPHY_ENABLE R66 @ 10K_0402_5%
<41> HDA_SDOUT_AUDIO 1 2 <45> LPC_AD2 BJ20 FWH2_LAD2 GPIO35 BJ57 2 1
R73 33_0402_5% LPC_AD3 BG20 SMIB R67 2 1 10K_0402_5%
<45> LPC_AD3 FWH3_LAD3 EC_SMI# PCH_GPIO28 R68 1K_0402_1%
D BK17 LDRQ0# GPIO8 BP51 EC_SMI# <38,45> 2 1 D
HDA_SDO LPC_FRAME# BG17 BK50 PM_LANPHY_ENABLE PM_LANPHY_ENABLE <40> PCH_GPIO13 R896 2 1 10K_0402_5%
<45> LPC_FRAME# FWH4_LFRAME# LAN_PHY_PWR_CTRL_GPIO12
BA25 PCH_GPIO13 SUSW ARN#_R R448 2 1 10K_0402_5%
HDA_BITCLK_PCH HDA_DOCK_RST#_GPIO13 SMIB PCH_GPIO57 R71 10K_0402_5%
ME debug mode, BU22 HDA_BCLK GPIO15 BM55 SMIB <38> 2 1
HDA_RST#_PCH BC22 BP53 PCH_GPIO27 R78 2 1 10K_0402_5%
this signal has a weak internal pull down HDA_SDIN0 HDA_RST# GPIO24_MEM_LED PCH_GPIO28
T1
W LAN_CLKREQ# R530 10K_0402_5%
<41> HDA_SDIN0 BD22 HDA_SDIN0 GPIO28 BJ55 2 1
Low = Disable (default) SLP_LAN# CLKREQ_USB30# R531 10K_0402_5%
*
High = Enable (flash descriptor security overide) +3VALW R338 2 @ 1 1K_0402_1%
BF22
BK22
HDA_SDIN1
HDA_SDIN2
SLP_LAN#_GPIO29
PCIECLKRQ2#_GPIO20
BH49
AV43 LAN_CLKREQ#
SLP_LAN# <40>
LAN_CLKREQ# <40>
TV_CLKREQ# R532
2
2
1
1 10K_0402_5%
BJ22 BL54 W LAN_CLKREQ# DRAMPW ROK R646 2 @ 1 200_0402_5%
HDA_SDIN3 PCIECLKRQ5#_GPIO44 W LAN_CLKREQ# <44>
R890 1 2 HDA_SDOUT_PCH BT23 AV44 CLKREQ_USB30# PCH_GPIO31 R675 2 1 10K_0402_5%
<45> ME_FLASH HDA_SDO PCIECLKRQ6#_GPIO45 CLKREQ_USB30# <38>
0_0402_5% HDA_SYNC_AUDIO_R BP23 BP55 TV_CLKREQ# PCH_GPIO72 R676 2 1 200_0402_5%
HDA_SYNC PCIECLKRQ7#_GPIO46 TV_CLKREQ# <44>
HDA_SYNC BT53 PCH_GPIO57 PCH_PCIE_W AKE#_R R203 2 1 1K_0402_1%
PCH_SPI_MOSI_1 R79 0_0402_5% PCH_SPI_MOSI GPIO57 SYS_PW ROK_R PCH_GPIO11 R716 10K_0402_5%
This signal has a weak internal pull down 1 2 AU53 SPI_MOSI SYS_PWROK BJ53 EC_SW I# <45> 2 1
PCH_SPI_MISO_1 R80 1 2 0_0402_5% PCH_SPI_MISO AT55 BJ48 EC_SW I#
H=>On Die PLL is supplied by 1.5V PCH_SPI_CS0# R81 0_0402_5% PCH_SPI_CS0#_R SPI_MISO RI# PCH_PLT_RST#
PCH_PLT_RST# <5,40,45>
1 2 AT57 SPI_CS0# PLTRST# BK48
L=>On Die PLL is supplied by 1.8V PCH_SPI_CLK_1 R83 1 2 0_0402_5% PCH_SPI_CLK AR54 BC44 PCH_PCIE_W AKE#_R R364 1 2 0_0402_5%
SPI_CLK WAKE# PCH_PCIE_W AKE# <38,44>
Need to pull high for Huron River platform
* +3VALW
AR56 SPI_CS1# SLP_A#
SLP_S3#
BC41
BM53 PM_SLP_S3# PM_SLP_S3# <45>
BN52 PM_SLP_S4# PM_SLP_S4# <45>
SLP_S4# SUS_PW R_ACK_R R391 1 2 0_0402_5% SUSW ARN#_R
2.2K_0402_5% 1 2 R945 PCH_SMBCLK BH50 PM_SLP_S5# PM_SLP_S5# <45>
2.2K_0402_5% 1 SLP_S5#_GPIO63
2 R946 PCH_SMBDATA
SUS_STAT#_GPIO61 BN54 T2
1 R70 2 HDA_SYNC_AUDIO_R BA47 PCH_SUSCLK_R R363 1 2 0_0402_5%
<41> HDA_SYNC_AUDIO SUSCLK_GPIO62 PCH_SUSCLK <45>
33_0402_5% AV46 PCH_GPIO72
BATLOW#_GPIO72 SUS_PW R_ACK_R R365 1 @
1
SUSACK# BP45 2 0_0402_5% SUS_PW R_ACK <45>
PCH_RTCX1 BR39 BU46 SUSW ARN#_R R390 1 2 0_0402_5%
RTCX1 SUSWARN#-SUS_PWR_DN_ACK-GPIO30 SUSW ARN# <45>
@ PCH_RTCX2 BN39 BG46 DRAMPW ROK DRAMPW ROK <5>
R356 PCH_RTCRST# RTCX2 DRAMPWROK
BT41 RTCRST# Stuff R391 if EC don't want to
1M_0402_5% PCH_SRTCRST# BN37
PM_GPIO(DSW)
C SM_INTRUDER# SRTCRST# PCH_GPIO27
involve in the handshake mechanism +3VS C
BM38 BJ43
2
PCH_PW ROK_R INTRUDER# GPIO27 for the DeepSX state entry and exit
<12> PCH_PW ROK_R BJ38 PWROK
PCH_RSMRST# BK38 BG43 PCH_GPIO31
PCH_INTVRMEN RSMRST# GPIO31 PCH_GPIO33 R894 10K_0402_5%
BN41 INTVRMEN SLP_SUS# BD43 T51 2 1
PCH_DPW ROK BT37 BT43 PBTN_OUT# PCH_GPIO0 R82 2 1 10K_0402_5%
DPWROK PWRBTN# PBTN_OUT# <45>
PCH_DSW VRMEN BR42 PCH_GPIO34 R84 2 1 10K_0402_5%
DSWVRMEN XDP_DBRETSET# LAN_CLKREQ# R529 10K_0402_5%
SYS_RESET# BE52 XDP_DBRETSET# <5> 2 1
PCH_RSMRST# R303 1 2 0_0402_5% PCH_DPW ROK BE56 PCH_SPKR PCH_SPKR <41> XDP_DBRETSET# R581 2 1 10K_0402_5%
PCH_GPIO11 SPKR PCH_SPKR R583 @ 1K_0402_5%
BN49 SMBALERT#_GPIO11 2 1
Stuff R303 if do not support DeepSX state PCH_SMBCLK BT47 PCH_SPKR:HIGH= Enable ( No Reboot);
<37,44> PCH_SMBCLK PCH_SMBDATA SMBCLK
BR49
EC_PW ROK R3441 2 0_0402_5% PCH_PW ROK_R <37,44> PCH_SMBDATA PCH_GPIO60 BU49
SMBDATA
SML0ALERT#_GPIO60 PROCPWRGD D53 H_CPUPW RGD H_CPUPW RGD <5> * LOW= Disable(Default)
LAN_SMBCLK BT51
<40> LAN_SMBCLK LAN_SMBDATA SML0CLK CLKRUN# R926 @
BM50 SML0DATA 2 1 10K_0402_5%
<40> LAN_SMBDATA PCH_GPIO74 BR46 SLP_LAN# R897 2 @ 1 1K_0402_1%
EC_SMB_CK2 R88 SML1ALERT#_PCHHOT#_GPIO74
<21,42,45> EC_SMB_CK2 1 2 0_0402_5% PCH_SML1CLK BJ46 SML1CLK_GPIO58
PCH_GPIO33 R895 2 @ 1 1K_0402_1%
EC_SMB_DA2 R89 1 2 0_0402_5% PCH_SML1DAT BK46 SYS_PW ROK R719 2 1 10K_0402_5%
<21,42,45> EC_SMB_DA2 SML1DATA_GPIO75 PCH_GPIO35 R85 2.2K_0402_5%
2 1
JTAG(SUS)
C146 8/20 Add BC49 PCH_JTAG_RST# EC_SMI# R86 2 @ 1 1K_0402_1%
18P_0402_50V8J TP12 PCH_JTAG_TCK SUSW ARN#_R R207 @ 1K_0402_1%
JTAG_TCK BA43 2 1
2 1 PCH_RTCX1 1000P_0402_50V7K 2 1 @ C987 LAN_CLKREQ# BC52 PCH_JTAG_TDI EC_PW ROK R718 2 1 10K_0402_5%
1000P_0402_50V7K 2 JTAG_TDI
1 @ C988 PCH_JTAG_TDO
JTAG_TDO BF47 PCH_JTAG_TDO PCH_GPIO28 R340 2 @ 1 1K_0402_1%
X1
JTAG_TMS BC50 PCH_JTAG_TMS * On-Die PLL Voltage Regulator
1
3 4 4 OF 10
NC OSC R87 BD82H67-QNCY-B1_FCBGA942
H: Enable
2 1 +RTCVCC R99 1 2 20K_0402_1% PCH_SRTCRST# L: Disable
NC OSC 10M_0402_5% close to RAM door @
32.768KHZ_12.5PF_Q13MC14610002 1 @ 2 RC Delay 18~25mS 8/19 Change footprint of U2 to XDP_DBRETSET# C676 1 2 0.1U_0402_16V4Z
2
C147 J2 R342 2 @ 1 0_0402_5%

B PCH_RTCX2 10K_0603_5%
WIESO_G6179-100000_8P Q18 <EMI> B
2 1
C149 SA000041P00 4MB MMBT3906_SOT23-3 8/13 Add C676 close to U1(EMI request)
18P_0402_50V8J 1U_0402_6.3V6K +3VS PCH_RSMRST# 1 3
C
EC_RSMRST# <45>
1 2
E
+3VS +3VS U2 +3VALW
1
R655 PCH_SPI_CS0# 1 8
B
2
4.7K_0402_5% R94 CS# VCC
1 2 4.7K_0402_5% SPI_W P1# 3 WP# SCLK 6 PCH_SPI_CLK_1 R717 1 2 +3VALW
2
R96 2 4.7K_0402_5% SPI_HOLD1# PCH_SPI_MOSI_1 10K_0402_5% R319 4.7K_0402_5%

G
1 2 +3VS 1 7 HOLD# SI 5
4 2 PCH_SPI_MISO_1 R91 1 2 200_0402_5%
PCH_SMBCLK D_CK_SCLK GND SO D38A PCH_JTAG_TMS R92
1 3 D_CK_SCLK <10,11> 1 2 100_0402_5%
2
S IC FL 32M MX25L3206EM2I-12G SOP 8P 1
D
Q32 +RTCVCC R90 1 2 20K_0402_1% PCH_RTCRST# SPI ROM Footprint 200mil 6

SSM3K7002FU_SC70-3 close to RAM door 2 R93 1 2 200_0402_5%
1 @ 2 RC Delay 18~25mS PCH_JTAG_TDO R95 1 2 100_0402_5%
J1 R348 1 @ 2 0_0402_5% BAV99DW -7-F_SOT363~N
10K_0603_5%
+3VS C148 +3VS D38B R97 1 2 200_0402_5%
R654 1U_0402_6.3V6K 4 PCH_JTAG_TDI R98 1 2 100_0402_5%
4.7K_0402_5% 1 2 3
2
U20
G
1 2 +3VS 5
1
EC_PW ROK R100 1 2 20K_0402_5%
B 2
P
EC_PW ROK <45>

PCH_SMBDATA 1 3 D_CK_SDATA SYS_PW ROK 4 BAV99DW -7-F_SOT363~N R343 PCH_JTAG_RST# R101 1 2 10K_0402_5%
D_CK_SDATA <10,11> Y VGATE 2.2K_0402_5%
1
D
A VGATE <45,57>
G
Q31
SSM3K7002FU_SC70-3 R943 1 2 0_0402_5% NC7SZ08P5X_NL_SC70-5
3
2
PCH_JTAG_TCK R102 1 2 51_0402_5%
+3VS
+RTCVCC
A
@ SYS_PW ROK_R R349 1 2 0_0402_5% SYS_PW ROK A
5
U25
1M_0402_5% 2 1 R103 SM_INTRUDER# PCH_PLT_RST# 2 B R350 1 @ 2 0_0402_5% VGATE
P
4 PLT_RST# PLT_RST# <22,38,39,44>

390K_0402_5% 2 Y
1 R104 PCH_DSW VRMEN 1 A
G
390K_0402_5% 2 1 R105 PCH_INTVRMEN

1
NC7SZ08P5X_NL_SC70-5
3
1
R944
R106 2010/07/20 2011/07/20 Title
100K_0402_5%
1K_0402_5%
@
PCH (2/9) LPC, HDA, SMBUS
2
2
Custom 0.3
5 4 3 2 1
5 4 3 2 1
DMI_HTX_PRX_N[0..3]
<4> DMI_HTX_PRX_N[0..3]
D DMI_HTX_PRX_P[0..3] D
<4> DMI_HTX_PRX_P[0..3]
DMI_PTX_HRX_N[0..3]
<4> DMI_PTX_HRX_N[0..3]
DMI_PTX_HRX_P[0..3]
<4> DMI_PTX_HRX_P[0..3] CPT_CRB
U1B
DMI_HTX_PRX_N0 D33 BF36 USB20_N0

DMI_HTX_PRX_P0 DMI0RXN USBP0N USB20_P0 USB20_N0 <46>
DMI_PTX_HRX_N0
B33 DMI0RXP USBP0P BD36
USB20_N1 USB20_P0 <46> USB Conn
J36 DMI0TXN USBP1N BC33 USB20_N1 <46>
DMI_PTX_HRX_P0 H36 BA33 USB20_P1 USB Conn
DMI_HTX_PRX_N1 DMI0TXP USBP1P USB20_N2 USB20_P1 <46>
A36 DMI1RXN USBP2N BM33 USB20_N2 <38>
DMI_HTX_PRX_P1 B35 BM35 USB20_P2 USB Conn
DMI_PTX_HRX_N1 DMI1RXP USBP2P USB20_N3 USB20_P2 <38>
P38 DMI1TXN USBP3N BT33 USB20_N3 <38>
DMI
DMI_PTX_HRX_P1 R38 DMI1TXP USBP3P BU32 USB20_P3
USB20_P3 <38> USB Conn EHCI 1
DMI_HTX_PRX_N2 B37 BR32 USB20_N4
DMI_HTX_PRX_P2 DMI2RXN USBP4N USB20_P4 USB20_N4 <36>
DMI_PTX_HRX_N2
C36 DMI2RXP USBP4P BT31
USB20_N5 USB20_P4 <36> Touch Screen
H38 DMI2TXN USBP5N BN29 USB20_N5 <36>
DMI_PTX_HRX_P2 J38 BM30 USB20_P5 Web Camera
DMI_HTX_PRX_N3 DMI2TXP USBP5P USB20_N6 USB20_P5 <36>
E37 DMI3RXN USBP6N BK33 USB20_N6 <38>
+1.05VS_PCH DMI_HTX_PRX_P3 USB20_P6
DMI_PTX_HRX_N3
F38 DMI3RXP USBP6P BJ33
USB20_N7 USB20_P6 <38> USB 2.0
M41 DMI3TXN USBP7N BF31 USB20_N7 <48>
R107 DMI_PTX_HRX_P3 P41 BD31 USB20_P7 3D IR
49.9_0402_1% DMI3TXP USBP7P USB20_P7 <48>
B31 DMI_IRCOMP USBP8N BN27
1 2 DMI_COMP E31 BR29
DMI_ZCOMP USBP8P USB20_N9
USBP9N BR26 USB20_N9 <38>
USB
T77 CLK_BUF_CPU_DMI# P33 BT27 USB20_P9 USB 2.0
CLK_BUF_CPU_DMI CLKIN_DMI_N USBP9P USB20_N10 USB20_P9 <38>
T78 R33 CLKIN_DMI_P USBP10N BK25 USB20_N10 <48>
BJ25 USB20_P10 Bluetooth
C PCIE_DTX_C_PRX_N1 USBP10P USB20_N11 USB20_P10 <48> C
<39> PCIE_DTX_C_PRX_N1 J20 PERN1 USBP11N BJ31 USB20_N11 <44> OC[0..3] use for EHCI 1
For CardReader <39> PCIE_DTX_C_PRX_P1
PCIE_DTX_C_PRX_P1 L20 BK31 USB20_P11 Mini Card(TV Tuner) EHCI 2
PCIE_PTX_DRX_N1 PERP1 USBP11P USB20_P12 USB20_P11 <44> OC[4..7] use for EHCI 2
<39> PCIE_PTX_DRX_N1 F25 PETN1 USBP12P BD27 USB20_P12 <44>
PCIE_PTX_DRX_P1 F23 BF27 USB20_N12 Mini Card(WLAN)
<39> PCIE_PTX_DRX_P1 PETP1 USBP12N USB20_N12 <44>
PCIE_DTX_C_PRX_N2 P20 BK27
<40> PCIE_DTX_C_PRX_N2 PERN2 USBP13P
For PCIE LAN PCIE_DTX_C_PRX_P2 R20 BJ27
<40> PCIE_DTX_C_PRX_P2 PERP2 USBP13N
PCIE_PTX_DRX_N2 C22
<40> PCIE_PTX_DRX_N2 PETN2
PCIE_PTX_DRX_P2 A22 BM43 USB_OC#0
<40> PCIE_PTX_DRX_P2 PETP2 OC0#_GPIO59 USB_OC#0 <46>
PCI-E
H17 BD41 USB_OC#1
PERN3 OC1#_GPIO40 USB_OC#1 <38>
J17 BG41 USB_OC#2_R
PERP3 OC2#_GPIO41 USB_OC#34
E21 PETN3 OC3#_GPIO42 BK43 USB_OC#34 <46>
B21 PETP3 OC4#_GPIO43 BP43
P17 BJ41 USB_OC#5_R
PERN4 OC5#_GPIO9 USB_OC#6_R
M17 PERP4 OC6#_GPIO10 BT45
F18 BM45 USB_OC#7_R
PETN4 OC7#_GPIO14
PCIE_DTX_C_PRX_N5
E17 PETP4 USB_BIAS R108 Layout Note:USB_BIAS WITH LENGTH NO MORE THAN 500 MILS TO
<44> PCIE_DTX_C_PRX_N5 N15 PERN5 USBRBIAS# BP25 1 2
<44> PCIE_DTX_C_PRX_P5
PCIE_DTX_C_PRX_P5 M15 BM25 22.6_0402_1%
RESISTOR.
PCIE_PTX_DRX_N5 PERP5 USBRBIAS
For WiFi LAN <44> PCIE_PTX_DRX_N5
PCIE_PTX_DRX_P5
B17 PETN5 CLK_BUF_DREF_96M#
<44> PCIE_PTX_DRX_P5 C16 PETP5 CLKIN_DOT_96N BD38 T58
PCIE_DTX_C_PRX_N6 J15 BF38 CLK_BUF_DREF_96M T76
<38> PCIE_DTX_C_PRX_N6 PERN6 CLKIN_DOT_96P
PCIE_DTX_C_PRX_P6 L15
<38> PCIE_DTX_C_PRX_P6 PERP6 R109
For USB3.0 PCIE_PTX_DRX_N6 A16 A32 DMI2RBIAS 1 2
<38> PCIE_PTX_DRX_N6 PETN6 DMI2RBIAS
PCIE_PTX_DRX_P6 B15
<38> PCIE_PTX_DRX_P6 PETP6
PCIE_DTX_C_PRX_N7 J12 750_0402_1%
<44> PCIE_DTX_C_PRX_N7 PERN7
PCIE_DTX_C_PRX_P7 H12
<44> PCIE_DTX_C_PRX_P7 PERP7
For TV Tuner PCIE_PTX_DRX_N7 F15
<44> PCIE_PTX_DRX_N7 PETN7
PCIE_PTX_DRX_P7 F13
<44> PCIE_PTX_DRX_P7 PETP7
H10 USB_OC#2_R R110 1 2 10K_0402_5% +3VALW
B PERN8 USB_OC#7_R R113 10K_0402_5% B
J10 PERP8 1 2
B13 USB_OC#6_R R114 1 2 10K_0402_5%
PETN8 USB_OC#5_R R115 10K_0402_5%
D13 PETP8 1 2
2 OF 10
BD82H67-QNCY-B1_FCBGA942 CLK_BUF_DREF_96M# R357 1 2 10K_0402_5%
CLK_BUF_DREF_96M R358 1 2 10K_0402_5%
CLK_BUF_CPU_DMI# R359 1 2 10K_0402_5%
CLK_BUF_CPU_DMI R360 1 2 10K_0402_5%
A A

PCH (3/9) DMI, USB, PCIE
A 0.3
5 4 3 2 1
5 4 3 2 1
U1E CPT_CRB
PLACE RGB RESISTORS CLOSE TO
PCH:<250 MILS TO MCH BALL
M48 RESERVED_29 RESERVED_22 AB50
CPT_CRB
U1F NV_CLE R47 Y50
PCH_CRT_B CRT@1 DF_TVS RESERVED_21
2 Y41 RESERVED_6 RESERVED_14 AB49
150_0402_1% R116 M50 AB44
1M_0402_5% 2 RESERVED_4 RESERVED_13
+3VS 1 R514 PCH_CRT_G 2 CRT@1 M49 RESERVED_3 RESERVED_12 U49
1M_0402_5% 2 1 R882 150_0402_1% R117 U43 R44
PCH_CRT_R CRT@1 RESERVED_2 RESERVED_11
2 J57 RESERVED_1 RESERVED_10 U50
PCH_HDMI_DET T1 AR4 PCH_CRT_HSYNC 150_0402_1% R118 U46
<33> PCH_HDMI_DET DDPB_HPD CRT_HSYNC PCH_CRT_HSYNC RESERVED_9
PCH_HDMIOUT_DET N2 AR2 PCH_CRT_VSYNC U44
<38> PCH_HDMIOUT_DET DDPC_HPD CRT_VSYNC PCH_CRT_VSYNC RESERVED_8
M1 DDPD_HPD RESERVED_7 H50
AN6 PCH_CRT_R K46
CRT_RED PCH_CRT_R RESERVED_20
D R8 AN2 PCH_CRT_G L56 D
DDPB_AUXP CRT_GREEN PCH_CRT_G RESERVED_19
R9 AM1 PCH_CRT_B J55
DDPB_AUXN CRT_BLUE PCH_CRT_B RESERVED_18
U14 DDPC_AUXP RESERVED_17 F53
U12 DDPC_AUXN CRT_IRTN AM6 RESERVED_16 H52
N6 DDPD_AUXP RESERVED_15 E52
R6 DDPD_AUXN
RESERVED_28 K50
PCH_HDMI_TXD2+ R14 AW1 PCH_CRT_DATA K49
<33> PCH_HDMI_TXD2+ DDPB_0P CRT_DDC_DATA PCH_CRT_DATA RESERVED_27
PCH_HDMI_TXD2- R12 AW3 PCH_CRT_CLK AB46
<33> PCH_HDMI_TXD2- DDPB_0N CRT_DDC_CLK PCH_CRT_CLK RESERVED_26
PCH_HDMI_TXD1+ M11 G56
<33> PCH_HDMI_TXD1+ DDPB_1P RESERVED_25
PCH_HDMI_TXD1- M12 AT3 DAN_IREF
<33> PCH_HDMI_TXD1- DDPB_1N DAC_IREF
PCH_HDMI_TXD0+ H8 Y44
<33> PCH_HDMI_TXD0+ DDPB_2P RESERVED_24
1
PCH_HDMI_TXD0- K8 L53
<33> PCH_HDMI_TXD0- DDPB_2N RESERVED_23
PCH_HDMI_TXC+ L5 R121
<33> PCH_HDMI_TXC+ DDPB_3P
PCH_HDMI_TXC- M3 1K_0402_0.5% R50
<33> PCH_HDMI_TXC- DDPB_3N RESERVED_5
PCH_HDMI_CTXD2+ L2
<38> PCH_HDMI_CTXD2+ DDPC_0P
PCH_HDMI_CTXD2- J3 Y18 @ T3 PLACE DACREFSET RES(R121) CLOSE TO NVRAM
<38> PCH_HDMI_CTXD2-
2
PCH_HDMI_CTXD1+ G2 DDPC_0N TP6 @ T4 5 OF 10
<38> PCH_HDMI_CTXD1+ DDPC_1P TP7 Y17 PCH:<500 MILS TO MCH BALL
PCH_HDMI_CTXD1- G4 AB18 @ T5 BD82H67-QNCY-B1_FCBGA942
<38> PCH_HDMI_CTXD1- DDPC_1N TP8
PCH_HDMI_CTXD0+ F3 AB17 @ T6
<38> PCH_HDMI_CTXD0+ DDPC_2P TP9
PCH_HDMI_CTXD0- F5
<38> PCH_HDMI_CTXD0- DDPC_2N
PCH_HDMI_CTXC+ E4
<38> PCH_HDMI_CTXC+ DDPC_3P
PCH_HDMI_CTXC- E2
<38> PCH_HDMI_CTXC- DDPC_3N +3VS
D5 DDPD_0P
B5 DDPD_0N
C6 DDPD_1P DMI & FDI Termination Voltage
D7 DDPD_1N
1
B7 DDPD_2P Set to VCC when HIGH
C9 DDPD_2N NV_CLE
C E11 R482 R483 Set to VSS when LOW C
B11
DDPD_3P 2.2K_0402_5% 2.2K_0402_5% For HDMI OUT
DDPD_3N UMA@ UMA@
2
U2 AL12 +1.8VS
SDVO_INTP DDPC_CTRLCLK PCH_HDMI_CCLK_R <38>
T3 SDVO_INTN DDPC_CTRLDATA AL14 PCH_HDMI_CDATA_R <38>
1
W3 AL9 +3VS
SDVO_STALLP DDPD_CTRLCLK R636
U5 SDVO_STALLN DDPD_CTRLDATA AL8
2.2K_0402_5%
U8 SDVO_TVCLKINP SDVO_CTRLCLK AL15
1
U9 AL17 R637
2
SDVO_TVCLKINN SDVO_CTRLDATA NV_CLE 2 1 H_SNB_IVB# <5>
R394 R395 4.7K_0402_5% 1
6 OF 10 2.2K_0402_5% 2.2K_0402_5%
BD82H67-QNCY-B1_FCBGA942 UMA@ UMA@ Note:Place R637 close to U1.R47 C782
2
PCH_HDMI_CLK <33> and <=100 mils 0.1U_0402_16V4Z
2 @
+5VS PCH_HDMI_DATA <33>
+CRT_VCC
D31
2 1
CRT@ 1
RB491D_SOT23-3 C718 +CRT_VCC
W=40mils 2
0.1U_0402_16V4Z
CRT@ JCRT1
1 1
RED 2 2
3 3
GREEN 4
B 4 B
5 5
BLUE 6 6
7 7
R671 1 @ 2 0_0402_5% JRGB_VS 8
<34,35,45> UART_TX 8
R672 1 @ 2 0_0402_5% 9
<34,35,45> UART_RX 9
JRGB_HS 10
RGB_DDC_DAT 10
11 11
RGB_DDC_CLK 12 12
13 GND1
14 GND2
ACES_87213-1200G +CRT_VCC +3VS
CONN@
R515 1 CRT@ 2 0_0402_5% RED 2.2K_0402_5%

PCH_CRT_R
1
R516 1 CRT@ 2 0_0402_5% GREEN CRT@
PCH_CRT_G
CRT@ R525
R526 4.7K_0402_5% R120 R119
R517 1 CRT@ 2 0_0402_5% BLUE 4.7K_0402_5% CRT@ 2.2K_0402_5%
PCH_CRT_B
2
CRT@
2
2
R527
R518 1 CRT@ 2 0_0402_5% JRGB_HS RGB_DDC_DAT 1 CRT@ 2 6 1 PCH_CRT_DATA
PCH_CRT_HSYNC PCH_CRT_DATA
0_0402_5%
5
R519 1 CRT@ 2 0_0402_5% JRGB_VS CRT@ Q15A
PCH_CRT_VSYNC
A
R528 DMN66D0LDW -7_SOT363-6 A
RGB_DDC_CLK 1 CRT@ 2 3 4 PCH_CRT_CLK
PCH_CRT_CLK
0_0402_5%
11/4 Change PN of Q15 from SB00000AR00 to SB00000DH00 CRT@ Q15B
BLUE 2 CRT@ 1 DMN66D0LDW -7_SOT363-6
150_0402_1% R523
GREEN 2 CRT@
150_0402_1%
1
R524 Security Classification Compal Secret Data Compal Electronics, Inc.
RED 2 CRT@ 1 2010/07/20 2011/07/20 Title
150_0402_1% R522
PCH (4/9) CRT, DPI, VRAM
Custom 0.3
5 4 3 2 1
5 4 3 2 1
D D
<4> H_FDI_TXN[0..7]
<4> H_FDI_TXP[0..7]
U1A CPT_CRB
+3VS CPT_CRB
BH8 BF15 U1G
PCI_DEVSEL# PAR AD0
BH9 DEVSEL# AD1 BF17
<17> CLK_PCH_33M_FB BD15 CLKIN_PCILOOPBACK AD2 BT7
AV14 PCIRST# AD3 BT13
R122 1 2 8.2K_0402_5% PCI_DEVSEL# PCI_IRDY# BF11 BG12
R123 8.2K_0402_5% PCI_IRDY# IRDY# AD4
1 2 AV15 BN11
R124 8.2K_0402_5% PCI_SERR# PCI_SERR# PME# AD5 FDILINK
1 2 BR6 SERR# AD6 BJ12
R125 1 2 8.2K_0402_5% PCI_STOP# PCI_STOP# BC12 BU9
PCI_PLOCK# STOP# AD7 T7 @ H_FDI_TXN0
BA17 PLOCK# AD8 BR12 H31 TP21 FDI_RXN0 C42
PCI_TRDY# BC8 BJ3 T8 @ J31 B43 H_FDI_TXP0
PCI_PERR# TRDY# AD9 T9 @ TP25 FDI_RXP0 H_FDI_TXN1
BM3 PERR# AD10 BR9 C29 TP29 FDI_RXN1 F45
R126 1 2 8.2K_0402_5% PCI_PLOCK# PCI_FRAME# BC11 BJ10 T10 @ E29 F43 H_FDI_TXP1
R127 8.2K_0402_5% PCI_TRDY# FRAME# AD11 TP33 FDI_RXP1 H_FDI_TXN2
1 2 BM8 H41
R128 8.2K_0402_5% PCI_PERR# AD12 T11 @ FDI_RXN2 H_FDI_TXP2
1 2 AD13 BF3 J27 TP22 FDI_RXP2 J41
R129 1 2 8.2K_0402_5% PCI_FRAME# BN2 T12 @ L27 C46 H_FDI_TXN3
C PCI_GNT0# AD14 T13 @ TP26 FDI_RXN3 H_FDI_TXP3 C
BA15 GNT0# AD15 BE4 F28 TP30 FDI_RXP3 D47
PCI_GNT1# AV8 BE6 T14 @ E27 B45 H_FDI_TXN4
Boot BIOS Strap Bit 0(GNT1#) PCI_GNT2# GNT1#_GPIO51 AD16 TP34 FDI_RXN4 H_FDI_TXP4
BU12 GNT2#_GPIO53 AD17 BG15 FDI_RXP4 A46
R130 1 2 8.2K_0402_5% PCI_REQ0# PCI_GNT3# BE2 BC6 T15 @ J25 B47 H_FDI_TXN5
R131 8.2K_0402_5% PCI_REQ1# GNT3#_GPIO55 AD18 T16 @ TP23 FDI_RXN5 H_FDI_TXP5
1 2 BT11 L25 C49
R132 8.2K_0402_5% PCI_REQ2# AD19 T17 @ TP27 FDI_RXP5 H_FDI_TXN6
1 2 AD20 BA14 C26 TP31 FDI_RXN6 J43
R133 1 2 8.2K_0402_5% PCI_REQ3# BL2 T18 @ B27 H43 H_FDI_TXP6
PCI_REQ0# AD21 TP35 FDI_RXP6 H_FDI_TXN7
BG5 BC4 M43
PCI_REQ1# REQ0# AD22 T19 @ FDI_RXN7 H_FDI_TXP7
BT5 BL4 L22 P43
PCI_REQ2# REQ1#_GPIO50 AD23 T20 @ TP24 FDI_RXP7
BK8 BC2 J22
PCI_REQ3# REQ2#_GPIO52 AD24 T21 @ TP28 H_FDI_FSYNC0
AV11 BM13 B25 B51 H_FDI_FSYNC0 <4>
R134 8.2K_0402_5% PCI_PIRQA# REQ3#_GPIO54 AD25 T22 @ TP32 FDI_FSYNC0 H_FDI_LSYNC0
1 2 BA9 D25 E49 H_FDI_LSYNC0 <4>
R135 8.2K_0402_5% PCI_PIRQB# AD26 TP36 FDI_LSYNC0 H_FDI_FSYNC1
1 2 AD27
BF9
FDI_FSYNC1
C52 H_FDI_FSYNC1 <4>
R136 1 2 8.2K_0402_5% PCI_PIRQC# BA8 D51 H_FDI_LSYNC1
PCI_PIRQD# PCI_PIRQA# AD28 FDI_LSYNC1 H_FDI_LSYNC1 <4>
R137 1 2 8.2K_0402_5% BK10 BF8
PCI_PIRQB# PIRQA# AD29 H_FDI_INT
BJ5 AV17 H46 H_FDI_INT <4>
PCI_PIRQC# PIRQB# AD30 FDI_INT
BM15 BK12
PCI_PIRQD# PIRQC# AD31
BP5
PCI_PIRQE# PIRQD#
BN9
R138 8.2K_0402_5% PCI_PIRQE# PCI_PIRQF# PIRQE#_GPIO2
1 2 AV9
R139 8.2K_0402_5% PCI_PIRQF# PCI_PIRQG# PIRQF#_GPIO3
1 2 BT15
PIRQG#_GPIO4 C_BE0#
BN4
R140 1 2 8.2K_0402_5% PCI_PIRQG# CARD_HPLUG BR4 BP7
<39> CARD_HPLUG PIRQH#_GPIO5 C_BE1#
R141 1 2 8.2K_0402_5% CARD_HPLUG BG2
C_BE2# 7 OF 10
BP13
C_BE3# BD82H67-QNCY-B1_FCBGA942
PCI
1 OF 10
BD82H67-QNCY-B1_FCBGA942
B B
1000P_0402_50V7K 2 1 @ C989 CLK_PCH_33M_FB
8/23 Add
Boot BIOS Strap PCI_GNT0# R142 1 @ 2 1K_0402_5%

PCH_GNT1# PCH_GPIO19 Boot BIOS Loaction Have internal PU
PCI_GNT1# R143 1 @ 2 1K_0402_5%
0 0 LPC Have internal PU
PCI_GNT2# R144 1 @ 2 1K_0402_5%
0 1 Reserved Have internal PU
PCI_GNT3# R145 1 @ 2 1K_0402_5%
1 0 PCI Have internal PU
1 1 SPI *
A A

PCH (5/9) PCI,FDI
Custom
5 4 3 2 1
5 4 3 2 1
CPT_CRB
U1H
R27 CLKIN_GND1_N_R
CLKIN_GND1_N CLKIN_GND1_P_R CLKIN_GND1_N_R R146 10K_0402_5%
CLKIN_GND1_P P27 1 2
CLKIN_GND1_P_R R147 1 2 10K_0402_5%
W53 CLKIN_GND0_N_R CLKIN_GND0_N_R R148 1 2 10K_0402_5%
T23 @ CLKIN_GND0_N CLKIN_GND0_P_R CLKIN_GND0_P_R R149 10K_0402_5%
D AT11 CLKOUT_PCI0 CLKIN_GND0_P V52 1 2 D
CLK_BUF_ICH_14M R292 1 2 10K_0402_5%
T24 @ AN14 R52 CLK_CPU_XDP# T82
CLKOUT_PCI1 CLKOUT_ITPXDP_N CLK_CPU_XDP
CLKOUT_ITPXDP_P N52 T83
2 1 CLK_PCH_33M_FB_R AT12
<16> CLK_PCH_33M_FB CLKOUT_PCI2
R150 22_0402_5% AE2 CLK_PCIE_TV#
CLKOUT_PCIE7N CLK_PCIE_TV# <44>
2 1 CLK_PCI_LPC_R AT17 AF1 CLK_PCIE_TV For TV Tuner
<45> CLK_PCI_LPC CLKOUT_PCI3 CLKOUT_PCIE7P CLK_PCIE_TV <44>
R151 22_0402_5%
T25 @ AT14 P31 CLK_CPU_DMI#
CLKOUT_PCI4 CLKOUT_DMI_N CLK_CPU_DMI# <5>
R31 CLK_CPU_DMI
CLKOUT_DMI_P CLK_CPU_DMI <5>
CLKOUT_DP_N N56
T26 @ AT9 M55
T27 @ CLKOUTFLEX0_GPIO64 CLKOUT_DP_P
BA5 CLKOUTFLEX1_GPIO65
T28 @ AW5 AE6 CLK_PCIE_READER#
CLKOUTFLEX2_GPIO66 CLKOUT_PCIE0N CLK_PCIE_READER# <39>
T29 @ BA2 AC6 CLK_PCIE_READER For CardReader
CLKOUTFLEX3_GPIO67 CLKOUT_PCIE0P CLK_PCIE_READER <39>
CLKOUT_PCIE1N AA5
+1.05VS_PCH R152 1 2 90.9_0402_1% XCLK_RCOMP AL2 W5
XCLK_RCOMP CLKOUT_PCIE1P
T79 CLK_BUF_ICH_14M AN8 AB12 CLK_PCIE_LAN#
REFCLK14IN CLKOUT_PCIE2N CLK_PCIE_LAN# <40>
AB14 CLK_PCIE_LAN For PCIE LAN
CLKOUT_PCIE2P CLK_PCIE_LAN <40>
CLKOUT_PCIE3N AB9
CLKOUT_PCIE3P AB8
CLKOUT_PCIE4N Y9
CLKOUT_PCIE4P Y8
C AF3 CLK_PCIE_W LAN# C
CLKOUT_PCIE5N CLK_PCIE_W LAN# <44>
AG2 CLK_PCIE_W LAN For PCIE WLAN
CLKOUT_PCIE5P CLK_PCIE_W LAN <44>
C156
2 1 AB3 CLK_USB30#
CLKOUT_PCIE6N CLK_USB30# <38>
AA2 CLK_USB30 For USB 3.0
CLKOUT_PCIE6P CLK_USB30 <38>
2
27P_0402_50V8J R153
1
AG8 CLK_PCIE_VGA#
CLKOUT_PEG_A_N CLK_PCIE_VGA# <22>
Y1 1M_0402_5% AG9 CLK_PCIE_VGA
CLKOUT_PEG_A_P CLK_PCIE_VGA <22>
XTAL25_OUT AJ5
C157 XTAL25_OUT
AE12
2
XTAL25_IN CLKOUT_PEG_B_N
2 1 AJ3 XTAL25_IN CLKOUT_PEG_B_P AE11
27P_0402_50V8J 25MHZ_20PF_7A25000012
1000P_0402_50V7K 2 1 @ C999 XCLK_RCOMP
B B
8/23 Add
8 OF 10
BD82H67-QNCY-B1_FCBGA942
A A

PCH (6/9) CLOCK
Custom 0.3
5 4 3 2 1
5 4 3 2 1
+1.05VS_PCH
CPT_CRB +1.05VS_PCH
U1I
1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0805_10V6K F20 AC24 10U_0805_10V6K 1U_0402_6.3V6K

VCCIO_24 VCCCORE_1
F30 VCCIO_25 VCCCORE_2 AC26
1 1 1 1 1 1 V25 VCCIO_26 VCCCORE_3 AC28
V27 VCCIO_27 VCCCORE_4 AC30 1 1 1 1
C439 C438 C437 C436 C440 C441 V31 AC32
1U_0402_6.3V6K VCCIO_28 VCCCORE_5 C158 C159 C442 C489
V33 VCCIO_29 VCCCORE_6 AE24
2 2 2 2 2 2 1U_0402_6.3V6K
Y24 VCCIO_30 VCCCORE_7 AE28
2 2 2 2
1U_0402_6.3V6K 10U_0805_10V6K
Y26 VCCIO_31 PCIe CORE VCCCORE_8 AE30
Y30 VCCIO_32 VCCCORE_9 AE32
D Y32 VCCIO_33 VCCCORE_10 AE34 D
Y34 AE36 1U_0402_6.3V6K
VCCIO_34 VCCCORE_11
VCCCORE_12 AG32
VCCCORE_13 AG34
VCCCORE_14 AJ32
VCCCORE_15 AJ34
VCCCORE_16 AJ36
VCCCORE_17 AL32
@ PJ28 AL34
VCCCORE_18
2 2 1 AN32
+1.05VS 1 +1.05VS_PCH VCCCORE_19
AN34
JUMP_43X118 VCCCORE_20
VCCCORE_21 AR32
@ PJ29 AR34
VCCCORE_22
2 2 1 1 AA34 VCCIO_22
AA36 VCCIO_23 PCIe
JUMP_43X118
V22 VCCIO_35
Y20 VCCIO_36
Y22 VCCIO_37
+VCCDMI
Near B41/E41
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
1 1 1 1
C C
C749 C750 C751 C752
0.1U_0402_16V4Z
2 2 2 2
1U_0402_6.3V6K
Note:Trace need to be at least 20 mils width with full VSS/VCC reference plane)
AG24 +VCCASW 1U_0402_6.3V6K R537 1 2 0_0805_5% +1.05VS_PCH
R584 1 +VCCDMI VCCASW_4
+1.05VS 2 B41 VCCDMI_2 VCCASW_5 AG26
0_0805_5% DMI AG28 1 1 1 1
VCCASW_6
E41 VCCDMI_1 VCCASW_7 AJ24
AJ26 C735 C736 C739 C737
VCCASW_8 1U_0402_6.3V6K 10U_0805_10V4Z
VCCASW_9 AJ28
1U_0402_6.3V6K 2 2 2 2
+1.05VS_PCH AL40 VCCIO_8 VCCASW_10 AL24
+VCCAPLLSATA AN40 VCCIO_9 SATA VCCASW_11 AL28
1 1 AN41 AN22 1U_0402_6.3V6K
VCCIO_10 VCCASW_12
VCCASW_13 AN24
1 1 C753 C754 AG38 AN26
1U_0402_6.3V6K VCCIO_20 VCCASW_14
AG40 VCCIO_21 VCCASW_15 AN28
C771 C772 2 2
SATA3 VCCASW_16 AR24
1U_0402_6.3V6K 10U_0805_10V4Z AG41 AR26
@ 2 2 @ VCCIO_7 VCCASW_17
VCCASW_18 AR28
VCCASW_19 AR30
VCCASW_20 AR36
VCCASW_21 AR38
VCCASW_22 AU30
VCCASW_23 AU36
B +VCCSSC B
AU34 +VCCDIFFCLK
VCCASW_3
VCCASW_2 AV36
+VCCAPLLEXP AU32
VCCASW_1 1 1
AE15 +VCCDIFFCLK R374 1 2 0_0603_5% +1.05VS_PCH C755 C757

VCCDIFFCLKN_1 1U_0402_6.3V6K 1U_0402_6.3V6K
1 1 AE17
DIFFCLKN VCCDIFFCLKN_2 AG15
2 2
C740 C741 VCCDIFFCLKN_3 +VCC_DMICLK R536 1
AJ20 2 0_0805_5% Near AE15 Near AC20
1U_0402_6.3V6K 10U_0805_10V4Z DMI VCCCLKDMI
AE40 +VCCUSB
+1.05VS_PCH
@ 2 2 @ VCCIO_18 +VCCSSC R375 1
VCCSSC_1 AC20 2 0_0603_5% +1.05VS_PCH
SSC VCCSSC_2 AE20
+1.05VS_PCH R631 1 @ 2 0_0805_5% +VCCAPLLSATA U56 VCCAPLLSATA +VCCUSB R376 1 +VCC_DMICLK
VCCIO_1 AV24 2 0_0805_5% +1.05VS_PCH
Need change to 1uH +1.05VS_PCH BA38 VCCIO_19 PLL VCCIO_2 AV26
USB VCCIO_3 AY25 1
+1.05VS_PCH L27 1 @ 2 +VCCAPLLEXP B53 AY27 1 1
+VCCAPLLDMI2 10UH_LB2012T100MR_20% VCCAPLLEXP VCCIO_4 C758
+1.05VS_PCH R632 1 @ 2 0_0603_5% +VCCAFDIPLL C54 V36 1U_0402_6.3V6K C738 C756
VCCAFDIPLL VCCIO_13 2 1U_0402_6.3V6K 10U_0805_10V4Z
1 1
PCIe Y36
2 2 @
VCCIO_12
C773 C774 +1.05VS_PCH R633 1 @ 2 0_0603_5% +VCCACLK_PCH AL5 SATA3 AJ38 Near AJ20
1U_0402_6.3V6K 10U_0805_10V4Z VCCACLK VCCIO_11
@ 2 2 @ R634 1 @
+1.05VS_PCH 2 0_0805_5% +VCCAPLLDMI2 A19 VCCAPLLDMI2 PCIe VCCIO_14 Y28
9 OF 10
A
BD82H67-QNCY-B1_FCBGA942 A

PCH (7/9) PWR
Custom 0.3
5 4 3 2 1
5 4 3 2 1
+3VS
2
U1K
D13 +VCCVRM
RB751V-40_SOD323-2 +VCC5REF BF1
+5VS V5REF
+VCC5REFSUS BT25 AJ1 R535 1 2 0_0402_5% +1.8VS
1
V5REF_SUS VCCVRM_1
VCCVRM_4 R2 1 1
R533 1 2 10_0402_5% +VCC5REF +3VALW AV28 R54
VCCSUSHDA VCCVRM_3 C775 C734
VCCVRM_2 R56
D 1 1 Near BF1 +3VS AU20 10U_0805_10V4Z 0.1U_0402_16V4Z D
VCC3_3_9 2 2
AV20 VCC3_3_10
C728 C729 +3VALW R898 1 @ 2 AU22
0.1U_0402_16V4Z 1U_0402_6.3V6K 0_0805_5% VCC3_3_7
VCCPNAND_01 T55 +1.8VS
2 2 R899 1
+3VS 2 AN52 VCCSPI VCCPNAND_02 T57
0_0805_5% +1.8VS Near T55
1 Near AN52
+3VALW
1
C727 AL38 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VS
1U_0402_6.3V6K VCC3_3_5 C726
PCI VCC3_3_6 AN38
2
2 0.1U_0402_16V4Z
1 1 1 1 2
D14
RB751V-40_SOD323-2 C722 C723 C724 C725
+5VALW BC17 1U_0402_6.3V6K
VCC3_3_2 2 2 2 2
BD17
1
HVCMOS VCC3_3_3
BD20 Near AL38
R534 1 VCC3_3_4
2 10_0402_5% +VCC5REFSUS
0.1U_0402_16V4Z
Near BF1 +3VS
1 1
C731 C730 A12
0.1U_0402_16V4Z 0.1U_0402_16V4Z
PCIe VCC3_3_8
AF57
2 2 VCC3_3_1
SATA 1 1
C160 C161
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2
+3VS +3VALW Near AF57
C 1 1 C
C733 C732
1U_0402_6.3V6K 0.1U_0402_16V4Z Place C706/C720/C721 close to PCH BALL(D55)
2 2
Near AU20 Near AV28 +1.05VS_PCH

+3VALW
BT35 1U_0402_6.3V6K
VCCSUS3_3_11
VCCSUS3_3_2 AV30 1 1 1 1
VCCSUS3_3_3 AV32 1 1
AY31 C706 C719 C720 C721
VCCSUS3_3_4 C162 C163
VCCSUS3_3_5 AY33 0.1U_0402_16V4Z
0.1U_0402_16V4Z 2 2 2 2
VCCSUS3_3_6 BJ36 0.1U_0402_16V4Z
9/7 Add BK36
2 2
VCCSUS3_3_7 4.7U_0603_6.3V6K 0.1U_0402_16V4Z
VCCSUS3_3_8 BM36 Near BT35
R154
VCCSUS3_3_9 AT40
VCCSUS3_3_10 AU38
VCCSUS3_3_1 U31
+VCCDPW ROK
FBM-11-160808-601-T_0603 AV40 +VCCDPW ROK R635 1 2 0_0603_5% +3VALW
UMA@ VCCDSW3_3
V_PROC_IO D55 +1.05VS 1

V_PROC_IO_NCTF B56
C167
B +VCCSUS B
Layout Note: +3VS DCPSUS_3 A39
2
0.1U_0402_16V4Z
AA32
Close to AT1,AB1,AC2 < 100 mil DCPSUS_1
Near AV40
BU42 +RTCVCC
<1mA VCCRTC +RTCVCC
2
BR54 +VCCRTCEXT
1_0603_5% DCPRTC
DCPRTC_NCTF BT56
R154 AT41 +VCCSUS
DIS@ +VCCDAC DCPSUS_2
11/4 Change PN of C170/C172 from SF000002Y00 to AV41 +VCCDCPSUS
1
DCPSUSBYP
SF000001G00 +VCCSST
AT1 VCCADAC DCPSST BA46
1 1 1 1
+1.05VS_PCH +VCCADPLLA AB1 @
1 VCCADPLLA
1 C164 C410 C165 C166
C169 + C168 AC2 Near BA46 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
@ VCCADPLLB 2 2 2 2
L1 1 2 220U_6.3V_M
10UH_LB2012T100MR_20% 1U_0402_6.3V6K 2 2
10uH inductor, 120mA
1 1
C171 R155 BD82H67-QNCY-B1_FCBGA942
1
+ 0_0402_5% +RTCVCC
C170 1U_0402_6.3V6K @
330U_6.3V_M_R14 2
2
1 1
2
+VCCADPLLB C776 C630

1U_0402_6.3V6K 0.1U_0402_16V4Z
2 2
A +VCCADPLLA A
L2 1 2
10UH_LB2012T100MR_20% Near BU42
10uH inductor, 120mA 1 1 +VCCADPLLB
C173
+
C172 1U_0402_6.3V6K
330U_6.3V_M_R14 2 Security Classification Compal Secret Data Compal Electronics, Inc.
2
PCH (8/9) PWR
Custom 0.3
5 4 3 2 1
5 4 3 2 1
CPT_CRB
U1J
BC15 A26
VSS_125 VSS_5
BC20 VSS_126 VSS_6 A29
BC38 VSS_130 VSS_10 AA20 U1L
BC47 VSS_131 VSS_11 AA22
BC9 VSS_132 VSS_12 AA24
BD25 VSS_133 VSS_13 AA26 L12 VSS_231 TP3 L33
BD33 VSS_134 VSS_14 AA28 L17 VSS_232 TP13 AE49
BF12 VSS_135 VSS_15 AA30 L38 VSS_233 TP17 BA36
BF20 VSS_136 VSS_16 AA38 L41 VSS_234 TP18 AY36
BF25 AB11 L43 Y14
VSS_137 VSS_17 VSS_235 TP19
BF33 AB15 M20 Y12
BF41 AB40 M22 P22
D VSS_139 VSS_19 VSS_237 TP1 D
BF43 AB41 M25 M38
BF46 AB43 M27 P25
VSS_141 VSS_21 VSS_239 VSS_296
BF52 AB47 M31 R25
BF6 AB52 T52 P36
BG22 AB57 T6 R36
BG25 AB6 U11 L31
BG27 AC22 U15 L36
BG31 AC34 U17 AL44
BG33 AC36 U20 AL43
BG36 AC38 U22
VSS_149 VSS_29 VSS_266
BG38 AC4 U25 AE41
BH52 VSS_151 VSS_31 AC54 U27 VSS_268 TP15 AE43
BH6 VSS_152 VSS_32 AE14 U33 VSS_269
BJ1 VSS_153 VSS_33 AE18 U36 VSS_270 TP11 BA27
BJ15 VSS_154 VSS_34 AE22 U38 VSS_271
BK20 VSS_155 VSS_35 AE26 U41 VSS_272
BK41 VSS_156 VSS_36 AE38 U47 VSS_273
BK52 VSS_157 VSS_37 AE4 U53 VSS_274
BK6 VSS_158 VSS_38 AE47 V20 VSS_275
BM10 VSS_159 VSS_39 AE8 V38 VSS_276
BM12 VSS_160 VSS_40 AE9 V6 VSS_277
BM16 VSS_161 VSS_41 AF52 W1 VSS_278
BM22 VSS_162 VSS_42 AF6 W55 VSS_279 TP10 BM46
BM23 VSS_163 VSS_43 AG11 W57 VSS_280
BM26 VSS_164 VSS_44 AG14 Y11 VSS_281
BM28 VSS_165 VSS_45 AG20 Y15 VSS_282 L_BKLTCTL AG12 NOTE:PCH adds support for panel power sequencing required for
BM32 VSS_166 VSS_46 AG22 Y38 VSS_283 L_BKLTEN AG18 embedded DisplayPort support. L_VDDEN, L_BKLTEN and L_BKLTCTL pins are
BM40 AG30 Y40 AG17
BM42
VSS_167 VSS_47
AG36 Y43
VSS_284 L_VDD_EN added on the PCH for panel power sequencing. It is important to note that a 6
VSS_168 VSS_48 VSS_285 layer board design may be required to access these pins on the PCH package
BM48 VSS_169 VSS_49 AG43 Y46 VSS_286
BM5 VSS_170 VSS_50 AG44 Y47 VSS_287 in a fully featured platform design.
BN31 VSS_171 VSS_51 AG46 Y49 VSS_288
C C
BN47 VSS_172 VSS_52 AG5 Y52 VSS_289
BN6 VSS_173 VSS_53 AG50 Y6 VSS_290
BP3 VSS_174 VSS_54 AG53
BP33 VSS_175 VSS_55 AH52
BP35 VSS_176 VSS_56 AH6
BR22 VSS_177 VSS_57 AJ22
BR52 VSS_178 VSS_58 AJ30 A4 VSS_NCTF_1
BU19 AJ57 A6
VSS_179 VSS_59 VSS_NCTF_2
BU26 AK52 B2
BU29 AK6 BM1
BU36 AL11 BM57
BU39 AL18 BP1
C19 AL20 BP57
C32 AL22 BT2
C39 AL26 BU4
C4 AL30 BU52
D15 AL36 BU54
D23 AL41 BU6
D3 AL46 D1
D35 AL47 F1
D43 AM52
VSS_192 VSS_73
D45 AM3
VSS_193 VSS_72
E19 AM57
VSS_194 VSS_74
E39 AN11
VSS_195 VSS_75
E54 AN12
VSS_196 VSS_76
E6 AN15
VSS_197 VSS_77
E9 AN17
VSS_198 VSS_78
F10 AN18
VSS_199 VSS_79
F12 AN20
VSS_200 VSS_80
F16 AN30
VSS_201 VSS_81
F22 AN36
VSS_202 VSS_82
F26 AN4
B VSS_203 VSS_83 B
F32 AN43
VSS_204 VSS_84
F33 AN47
VSS_205 VSS_85
F35 AN54
VSS_206 VSS_86
F36 AN9
VSS_207 VSS_87
F40 AR20
VSS_208 VSS_88
F42 AR22
VSS_209 VSS_89
F46 AR52
VSS_210 VSS_90
F48 AR6
VSS_211 VSS_91
F50 AT15
VSS_212 VSS_92
F8 AT18 AY22
AV18 AT43 C12
AV22 AT47 AE56
AV34 AT52 BR36
AV38 AT6 AU2
VSS_107 VSS_97 VSSADAC
AV47 AT8
VSS_108 VSS_98
AV6 AU24 A54
VSS_109 VSS_99 TS_VSS1
AW57 AU26 A52
AY38 AU28 F57
AY6 AU5 D57
B23 AV12
VSS_113 VSS_103
BA11 BA49
VSS_114 VSS_119
BA12 BB1
VSS_115 VSS_120
BA31 BB3
VSS_116 VSS_121
BA41 BB52
VSS_117 VSS_122
BA44 BB6
VSS_118 VSS_123
G54 BC14
VSS_214 VSS_124
H15 M33
VSS_215 VSS_241
H20 M36
VSS_216 VSS_242
H22 M46
VSS_217 VSS_243 BD82H67-QNCY-B1_FCBGA942
H25 M52
VSS_218 VSS_244
H27 M57
VSS_219 VSS_245
H33 VSS_220 VSS_246 M6
A A
H6 VSS_221 VSS_247 M8
J1 VSS_222 VSS_248 M9
J33 VSS_223 VSS_249 N4
J46 VSS_224 VSS_250 N54
J48 VSS_225 VSS_251 R11
J5 VSS_226 VSS_252 R15
J53 VSS_227 VSS_253 R17
K52 R22
K6
VSS_228
VSS_229
VSS_254
VSS_255 R4
K9 VSS_230 VSS_256 R41 Issued Date 2010/07/20 Deciphered Date 2011/07/20 Title
R43
VSS_257
VSS_258 R46 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH(9/9)VSS
R49 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
10 OF 10 VSS_259 Custom
BD82H67-QNCY-B1_FCBGA942 Date: Friday, November 05, 2010 Sheet 20 of 62
5 4 3 2 1
5 4 3 2 1
U8D
Part 4 of 7
AM11 IFPA_TXC NC_0 A2
AM12 IFPA_TXC_N NC_1 A7 Internal Thermal Sensor
AM8 B7
AL8
AM10
IFPA_TXD0
IFPA_TXD0_N
NC_2
NC_3 C5
C7
External VGA Thermal Sensor SMB_CLK_GPU <22>
IFPA_TXD1 NC_4 SMB_DATA_GPU <22>
AM9
AK10
IFPA_TXD1_N NC_5
D5
D6
Address: 0x9A H
IFPA_TXD2 NC_6
1
AL10 D7 R186 R187
IFPA_TXD2_N NC_7 VGA@ VGA@
AK11 IFPA_TXD3 NC_8 E5
AL11 E7 0_0402_5% 0_0402_5%
D IFPA_TXD3_N NC_9 D
NC_10 F4
G5 Address: 0x9E H
2
NC_11 +3VS_DGPU
AP13 IFPB_TXC NC_12 H32
AN13 J25 @ U9
IFPB_TXC_N NC_13 C213 2 VGA_SMB_CK2
AN8 IFPB_TXD4 NC_14 J26 1 1 VDD SCLK 8
AP8 P6 0.1U_0402_16V4Z
IFPB_TXD4_N NC_15 THERM_D+ VGA_SMB_DA2
AP10 IFPB_TXD5 NC_16 U7 2 D+ SDATA 7
AN10 V6 C214
IFPB_TXD5_N NC_17 2200P_0402_50V7K 3 THERM#_VGA
AR11 IFPB_TXD6 NC_18 Y4 1 2 D- ALERT# 6
AR10 AA4 THERM#_VGA <22>
IFPB_TXD6_N NC_19 @
AN11 AB4 THERM_D- 4 5
IFPB_TXD7 NC_20 THERM# GND
AP11 IFPB_TXD7_N NC_21 AB7
AC5 VGA_SMB_CK2 C980 @ 1 2 1000P_0402_50V7K
NC_22
NC
AD6 ADM1032ARMZ-2REEL_MSOP8 VGA_SMB_DA2 C981 @ 1 2 1000P_0402_50V7K
VGA_HDMI_CTXD2+ NC_23 @
AM7 IFPC_L0 NC_24 AF6
<38> VGA_HDMI_CTXD2+ VGA_HDMI_CTXD2- AM6 AG6
<38> VGA_HDMI_CTXD2- VGA_HDMI_CTXD1+ IFPC_L0_N NC_25
AL5 IFPC_L1 NC_26 AG20
<38> VGA_HDMI_CTXD1+ VGA_HDMI_CTXD1- AM5 AJ5
<38> VGA_HDMI_CTXD1- VGA_HDMI_CTXD0+ IFPC_L1_N NC_27
To HDMI-out <38>
<38>
VGA_HDMI_CTXD0+
VGA_HDMI_CTXD0-
VGA_HDMI_CTXD0-
AM3
AM4
IFPC_L2
IFPC_L2_N
NC_28
NC_29
AK15
AL7
VGA_HDMI_CTXC+ AP1
<38> VGA_HDMI_CTXC+ VGA_HDMI_CTXC- IFPC_L3 +3VS_DGPU
AR2 IFPC_L3_N
<38> VGA_HDMI_CTXC-
+3VS_DGPU
AR8 IFPD_L0
2
AR7 VGA@ 11/4 Change PN of Q1 from
IFPD_L0_N VGA@ R188 R189
AP7 IFPD_L1 SB00000EO00 to SB00000DH00
AN7 2.2K_0402_5% 2.2K_0402_5%
IFPD_L1_N
AN5 IFPD_L2
5
VGA@
LVDS/TMDS
C AP5 C
1
IFPD_L2_N Q1B
AR5 IFPD_L3
AR4 VGA_SMB_CK2 4 3
IFPD_L3_N EC_SMB_CK2 <13,42,45>
2
VGA@ DMN66D0LDW-7_SOT363-6
VGA_DVI_ETXD2+ AH6 Q1A
<33> VGA_DVI_ETXD2+ VGA_DVI_ETXD2- IFPE_L0 VGA_SMB_DA2
AH5 IFPE_L0_N
1 6
<33> VGA_DVI_ETXD2- VGA_DVI_ETXD1+ AH4 EC_SMB_DA2 <13,42,45>
<33> VGA_DVI_ETXD1+ VGA_DVI_ETXD1- IFPE_L1 DMN66D0LDW-7_SOT363-6
AG4
<33> VGA_DVI_ETXD1- VGA_DVI_ETXD0+ IFPE_L1_N
PU AT EC SIDE, +3VS AND 4.7K
To 2D/3D Vision <33>
<33>
VGA_DVI_ETXD0+
VGA_DVI_ETXD0-
VGA_DVI_ETXD0-
AF4
AF5
IFPE_L2
IFPE_L2_N
@
VGA_DVI_ETXC+ AE6 VGA_SMB_CK2 1 2 EC_SMB_CK2
<33> VGA_DVI_ETXC+ VGA_DVI_ETXC- IFPE_L3 R190 0_0402_5%
AE5
<33> VGA_DVI_ETXC- IFPE_L3_N VGA_SMB_DA2 EC_SMB_DA2
1 2
D35 VGA_SENSE R191 @ 0_0402_5%
VGA_DVI_FTXD2+ VDD_SENSE_0 VGA_SENSE <59>
AL2 P7
<33> VGA_DVI_FTXD2+ VGA_DVI_FTXD2- IFPF_L0 VDD_SENSE_1
AL3 AD20
<33> VGA_DVI_FTXD2- VGA_DVI_FTXD1+ IFPF_L0_N VDD_SENSE_2
AJ3
<33> VGA_DVI_FTXD1+ VGA_DVI_FTXD1- IFPF_L1
To 3D Vision <33>
<33>
VGA_DVI_FTXD1-
VGA_DVI_FTXD0+
VGA_DVI_FTXD0+
AJ2
AJ1
IFPF_L1_N
IFPF_L2
VGA_DVI_FTXD0- AH1 AD19 GND_SENSE
<33> VGA_DVI_FTXD0- IFPF_L2_N GND_SENSE_0 GND_SENSE <59>
+3VS_DGPU AH2 E35
IFPF_L3 GND_SENSE_1
AH3 R7
IFPF_L3_N GND_SENSE_2
1
1
R192 R193
2.2K_0402_5% 2.2K_0402_5%
VGA@ VGA@ AP2
IFPC_AUX_I2CW_SCL
AN3
TEST
2
2
VGA_HDMI_CCLK_R IFPC_AUX_I2CW_SDA_N
<38> VGA_HDMI_CCLK_R
VGA_HDMI_CDATA_R
B HDMI-OUT <38> VGA_HDMI_CDATA_R
+3VS_DGPU AP4 AP35 TESTMODE B
IFPD_AUX_I2CX_SCL TESTMODE
AN4 AP14 T31
IFPD_AUX_I2CX_SDA_N JTAG_TCK
1
AN14 @
JTAG_TDI T32
1
1
AN16 @
JTAG_TDO T33 10K_0402_5%
R682 R683 AE4 AR14 @
IFPE_AUX_I2CY_SCL JTAG_TMS T34
2.2K_0402_5% 2.2K_0402_5% AD4 AP16 R195 1 VGA@
@ 2 10K_0402_5% VGA@ R194
VGA@ VGA@ IFPE_AUX_I2CY_SDA_N JTAG_TRST_N
2
2
2
<33,34> VGA_HDMI_ECLK_R VGA_HDMI_ECLK_R AF3

VGA_HDMI_EDATA_R IFPF_AUX_I2CZ_SCL
Scalar <33,34> VGA_HDMI_EDATA_R AF2
IFPF_AUX_I2CZ_SDA_N SERIAL Reserve VBIOS for NV suggest (1Mbit)
C3 ROM_CS# +3VS_DGPU
ROM_CS_N ROM_SI +3VS_DGPU
D3
ROM_SI ROM_SO ROM_SI <32>
C4
ROM_SO ROM_SCLK ROM_SO <32>
D4 1
ROM_SCLK
1
ROM_SCLK <32>
R295 C551
+3VS_DGPU 0.1U_0402_16V4Z @
GENERAL A5
10K_0402_5%
@ 2
NC/SPDIF_NC U47
R196 A4
2
BUFRST_N R197 1 VGA@ ROM_CS#
N9 2 40.2K_0402_1% 1 8
MULTI_STRAP_REF0_GND CE# VDD
2 1 AB5 R690 1 @ 2 4.7K_0402_5% SPI_WP#_VGA 3 6 ROM_SCLK
CEC WP# SCK
VGA@ 10K_0402_5% M9 R198 1 VGA@ 2 40.2K_0402_1% +3VS_DGPU R689 1 @ 2 4.7K_0402_5% SPI_HOLD#_VGA 7 5 ROM_SI
STRAP0 MULTI_STRAP_REF1_GND HOLD# SI ROM_SO
W5 4 2
<32> STRAP0 STRAP1 STRAP0 THERM_D+ VSS SO
W7 B5
<32> STRAP1 STRAP2 STRAP1 THERMDP THERM_D- MX25L1005AMC-12G_SOP8
V7 B4
<32> STRAP2 STRAP2 THERMDN @
A N12P-GT1-A1_BGA_973P VGA@ A

VGA(1/12)-LVDS/HDMI/DP/THM
0.3
5 4 3 2 1
5 4 3 2 1
U8A
PEG_HTX_C_GRX_P[0..15]
PEG_HTX_C_GRX_P0 AP17 Part 1 of 7 K1 <4> PEG_HTX_C_GRX_P[0..15]
PEG_HTX_C_GRX_N0 PEX_RX0 GPIO0 VGA_HDMI_DET
AN17 PEX_RX0_N GPIO1 K2 VGA_HDMI_DET <38>
PEG_HTX_C_GRX_P1 AN19 K3 VGA_BL_PWM PEG_HTX_C_GRX_N[0..15]
PEX_RX1 GPIO2 VGA_BL_PWM <36> <4> PEG_HTX_C_GRX_N[0..15]
PEG_HTX_C_GRX_N1 AP19 H3 VGA_ENVDD
PEG_HTX_C_GRX_P2 PEX_RX1_N GPIO3 VGA_ENBKL VGA_ENVDD <36>
AR19 PEX_RX2 GPIO4 H2 VGA_ENBKL <35>
PEG_HTX_C_GRX_N2 AR20 H1 GPU_VID0 PEG_GTX_C_HRX_P[0..15]
PEG_HTX_C_GRX_P3 PEX_RX2_N GPIO5 GPU_VID1 GPU_VID0 <59> <4> PEG_GTX_C_HRX_P[0..15]
AP20 PEX_RX3 GPIO6 H4 GPU_VID1 <59>
PEG_HTX_C_GRX_N3 AN20 H5 R879 1 @ 2
PEG_HTX_C_GRX_P4 PEX_RX3_N GPIO7 GPIO8 0_0402_5% VRAM_SEL PEG_GTX_C_HRX_N[0..15]
AN22 PEX_RX4 GPIO8 H6
PEG_HTX_C_GRX_N4 AP22 J7 THERM#_VGA <4> PEG_GTX_C_HRX_N[0..15]
PEG_HTX_C_GRX_P5 PEX_RX4_N GPIO9 MEM_VREF THERM#_VGA <21>
AR22 K4 MEM_VREF <28,29,30,31>
PEG_HTX_C_GRX_N5 PEX_RX5 GPIO10
AR23 K5
PEG_HTX_C_GRX_P6 PEX_RX5_N GPIO11 GPIO12
AP23 H7
GPIO
D PEG_HTX_C_GRX_N6 PEX_RX6 GPIO12 +3VS_DGPU D
AN23 J4 T30
PEG_HTX_C_GRX_P7 PEX_RX6_N GPIO13 @
AN25 J6
PEG_HTX_C_GRX_N7 PEX_RX7 GPIO14 VGA_IFPE_DET_R R156 1 VGA@2
AP25 L1
PEG_HTX_C_GRX_P8 PEX_RX7_N GPIO15 10K_0402_5%
AR25 L2
PEG_HTX_C_GRX_N8 PEX_RX8 GPIO16
Under GPU(below 150mils) AR26
PEX_RX8_N GPIO17
L4
2
G
150mA PEG_HTX_C_GRX_P9 AP26 M4
BLM18PG330SN1D_0603 PEG_HTX_C_GRX_N9 PEX_RX9 GPIO18
AN26 L7
0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0603_6.3V6M +PLLVDD PEG_HTX_C_GRX_P10 PEX_RX9_N GPIO19 VGA_IFPE_DET_R
+1.05VS_DGPU 1 2 AN28
PEX_RX10 GPIO20
L5 3 1
L3 PEG_HTX_C_GRX_N10 VGA_IFPE_DET <33,34>
D
AP28 K6
VGA@ PEG_HTX_C_GRX_P11 PEX_RX10_N GPIO21
1 1 1 1 2 AR28 L6 VRAM_SEL
C177 C174 C175 C178 C176 PEG_HTX_C_GRX_N11 PEX_RX11 GPIO22 Q58
AR29 M6
PEG_HTX_C_GRX_P12 PEX_RX11_N GPIO23
AP29 PEX_RX12 GPIO24 M7 R880 1 @ 2 SSM3K7002FU_SC70-3
PEG_HTX_C_GRX_N12 AN29 0_0402_5% @
VGA@ 2 VGA@ 2 VGA@ 2 VGA@ 2 VGA@ 1 PEG_HTX_C_GRX_P13 PEX_RX12_N +3VS_DGPU
AN31 PEX_RX13 MIOA_D0_NC N1
PEG_HTX_C_GRX_N13 AP31 P4 R850 1 @ 2
0.1U_0402_16V4Z 0.1U_0402_16V4Z PEG_HTX_C_GRX_P14 PEX_RX13_N MIOA_D1_NC 0_0402_5%
AR31 PEX_RX14 MIOA_D2_NC P1
PEG_HTX_C_GRX_N14 AR32 P2
PEG_HTX_C_GRX_P15 PEX_RX14_N MIOA_D3_NC
AR34 PEX_RX15 MIOA_D4_NC P3
PEG_HTX_C_GRX_N15 AP34 T3 GPIO8 R157 1 VGA@ 2 10K_0402_5%
PEX_RX15_N MIOA_D5_NC
MIOA_D6_NC T2
T1 GPIO12 R158 1 VGA@ 2 10K_0402_5%
PEG_GTX_C_HRX_P0 C179 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P0 MIOA_D7_NC
1 2 AL17 PEX_TX0 MIOA_D8_NC U4
PEG_GTX_C_HRX_N0 PEG_GTX_HRX_N0 I2CC_SCL
PCI EXPRESS
C180 1 2 VGA@ .1U_0402_16V7K AM17 U1 R159 1 VGA@ 2 2.2K_0402_5%
PEG_GTX_C_HRX_P1 C181 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P1 PEX_TX0_N MIOA_D9_NC
1 2 AM18 PEX_TX1 MIOA_D10_NC U2
PEG_GTX_C_HRX_N1 C182 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N1 AM19 U3 I2CC_SDA R160 1 VGA@ 2 2.2K_0402_5%
1 2 AL19 PEX_TX2 MIOA_D12_NC R6
PEG_GTX_C_HRX_N2 C184 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N2 AK19 T6 SMB_CLK_GPU R161 1 VGA@ 2 2.2K_0402_5%
DVO
1 2 AL20 PEX_TX3 MIOA_D14_NC N6
PEG_GTX_C_HRX_N3 C186 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N3 AM20 SMB_DATA_GPU R162 1 VGA@ 2 2.2K_0402_5%
PEG_GTX_C_HRX_P4 C187 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P4 PEX_TX3_N
1 2 AM21 Y1
PEG_GTX_C_HRX_N4 C188 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N4 PEX_TX4 MIOB_D0_NC THERM#_VGA R163 1 VGA@
1 2 AM22 PEX_TX4_N MIOB_D1_NC Y2 2 10K_0402_5%
PEG_GTX_C_HRX_P5 C189 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P5 AL22 Y3
C PEG_GTX_C_HRX_N5 C190 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N5 PEX_TX5 MIOB_D2_NC HDCP_SCL R164 1 VGA@ C
1 2 AK22 PEX_TX5_N MIOB_D3_NC AB3 2 2.2K_0402_5%
PEG_GTX_C_HRX_P6 C191 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P6 AL23 AB2
PEG_GTX_C_HRX_N6 C192 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N6 PEX_TX6 MIOB_D4_NC HDCP_SDA R165 1 VGA@
1 2 AM23 AB1 2 2.2K_0402_5%
PEG_GTX_C_HRX_P7 C193 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P7 PEX_TX6_N MIOB_D5_NC
1 2 AM24 PEX_TX7 MIOB_D6_NC AC4
PEG_GTX_C_HRX_N7 C194 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N7 AM25 AC1 I2CA_SCL R166 1 VGA@ 2 2.2K_0402_5%
1 2 AL25 PEX_TX8 MIOB_D8_NC AC2
PEG_GTX_C_HRX_N8 C196 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N8 AK25 AC3 I2CA_SDA R167 1 VGA@ 2 2.2K_0402_5%
1 2 AL26 AE3
PEG_GTX_C_HRX_N9 C198 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N9 PEX_TX9 MIOBD_10_NC I2CB_SCL R168 1 VGA@
1 2 AM26 AE2 2 2.2K_0402_5%
1 2 AM27 U6
PEG_GTX_C_HRX_N10 C200 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N10 PEX_TX10 MIOB_D12_NC I2CB_SDA R169 1 VGA@
1 2 AM28 W6 2 2.2K_0402_5%
1 2 AL28 Y6
PEG_GTX_C_HRX_N11 C202 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N11 PEX_TX11 MIOB_D14_NC
1 2 AK28
PEX_TX11_N
PEG_GTX_C_HRX_P12 C203 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P12 AK29 N3
PEG_GTX_C_HRX_N12 C204 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N12 PEX_TX12 MIOA_HSYNC_NC
1 2 AL29
PEX_TX12_N MIOA_VSYNC_NC
L3
PEG_GTX_C_HRX_P13 C205 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P13 AM29 VGA_ENVDD R170 1 VGA@ 2 10K_0402_5%
PEG_GTX_C_HRX_N13 C206 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N13 PEX_TX13
1 2 AM30 W1
PEG_GTX_C_HRX_P14 C207 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P14 PEX_TX13_N MIOB_HSYNC_NC VGA_ENBKL R171 2 VGA@ 1 10K_0402_5%
1 2 AM31 W2
PEG_GTX_C_HRX_N14 C208 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N14 PEX_TX14 MIOB_VSYNC_NC
1 2 AM32
PEX_TX14_N
PEG_GTX_C_HRX_P15 C209 1 2 VGA@ .1U_0402_16V7K PEG_GTX_HRX_P15 AN32 N2 VGA_BL_PWM R172 2 @ 1 10K_0402_5%
PEG_GTX_C_HRX_N15 C210 VGA@ .1U_0402_16V7K PEG_GTX_HRX_N15 PEX_TX15 MIOA_DE_NC
1 2 AP32
PEX_TX15_N MIOA_CTL3_NC
P5
N5
MIOA_VREF_NC VGA_HDMI_DET R754 1 VGA@ 2 100K_0402_5%
Y5
CLK_PCIE_VGA MIOB_DE_NC
<17> CLK_PCIE_VGA AR16 W3
CLK_PCIE_VGA# PEX_REFCLK MIOB_CTL3_NC
AR17 AF1
<17> CLK_PCIE_VGA# CLK_REQ_GPU# PEX_REFCLK_N MIOB_VREF_NC
AR13 VGA@
PEX_CLKREQ_N R173 1
MIOA_CLKIN_NC
N4 2 10K_0402_5%
1 VGA@ 2 PEX_TSTCLK_OUT
Differential signal R174 200_0402_1% PEX_TSTCLK_OUT#
AJ17
AJ18
PEX_TSTCLK_OUT MIOA_CLKOUT_NC
R4
PEX_TSTCLK_OUT_N VGA@
AE1 R175 1 2 10K_0402_5%
MIOB_CLKIN_NC
V4
B R176 1 VGA@ 2 PLTRST_VGA_R# MIOB_CLKOUT_NC B
AM16
<13,38,39,44> PLT_RST# 0_0402_5% PEX_RST_N +3VS_DGPU
AG21 T4
R177 1 VGA@ 2 2.49K_0402_1% PEX_TERMP MIOA_CLKOUT_NC_N
W4
MIOB_CLKOUT_NC_N
R178 1 @ 2 10M_0402_5% 60mA U5
+PLLVDD MIOACAL_PD_VDDQ_NC
AE9 T5 1
PLLVDD MIOACAL_PU_GND_NC @
45mA
1
Y2 PLTRST_VGA_R# AF9 AA7 C805
SP_PLLVDD MIOBCAL_PD_VDDQ_NC @ 0.1U_0402_16V4Z
XTALIN XTAL_OUT
45mA MIOBCAL_PU_GND_NC
AA6
2
1 2 AD9 R685
VID_PLLVDD
2
10K_0402_5% U6
CLK
27MHZ_16PF_X5H027000FG1H R179 XTALIN B1 8 1
2
VGA@ 10K_0402_5% XTAL_OUT XTAL_IN VCC NC
1 1 B2 AM15 7 2
C211 C212 @ XTAL_OUT DACA_RED HDCP_SCL NC NC
AM14 6 3
18P_0402_50V8J 18P_0402_50V8J 10K_0402_5%2 R180 XTALOUT DACA_GREEN HDCP_SDA SCL NC
1 VGA@ D1 AL14 5 4
1
VGA@ VGA@ XTALSSIN XTAL_OUTBUFF DACA_BLUE SDA GND

2 R181 1 VGA@ D2
XTAL_SSIN
1
2 2 10K_0402_5% AT88SC0808C-SU-2.7_SO8
AM13
DACA_HSYNC @ @ @
AL13
DACA_VSYNC
Internal Thermal Sensor R182 R684 R686
SMB_CLK_GPU E2 AJ12 +DACA_VDD 2 1 2.2K_0402_5% 100K_0402_1%
<21> SMB_CLK_GPU I2CS_SCL DACA_VDD
SMB_DATA_GPU E1 AK12 10K_0402_5%VGA@
<21> SMB_DATA_GPU
2
I2CS_SDA DACA_VREF
AK13
I2CC_SCL DACA_RSET
E3
I2CC_SCL
DACs
I2CC_SDA E4 AK4
I2CC_SDA DACB_RED
DACB_GREEN
AL4 8/19 Change symbol and footprint of U6 to SA000017Y00
+3VS_DGPU I2CB_SCL G3 AJ4
I2CB_SDA I2CB_SCL DACB_BLUE
G2
I2C
I2CB_SDA
AM1
I2CA_SCL DACB_HSYNC
G1 AM2
I2CA_SDA I2CA_SCL DACB_VSYNC
G4
I2CA_SDA
2
AG7 +DACB_VDD 2 R183 1 VGA@

R184 HDCP_SCL DACB_VDD 10K_0402_5%
F6 I2CH_SCL DACB_VREF AK6
A VGA@ 10K_0402_5% HDCP_SDA A
G6 I2CH_SDA DACB_RSET AH7
1
N12P-GT1-A1_BGA_973P VGA@
CLK_REQ_GPU#
2
@ R185
@R185
10K_0402_5%
VGA(2/12)-PCIE/DAC/GPIO
1
0.3
5 4 3 2 1
5 4 3 2 1
D D
+VGA_CORE +VGA_CORE
U8G
AB11 VDD_0 VDD_56 P21

AB13 Part 7 of 7 P23
VDD_1 VDD_57
AB15 VDD_2 VDD_58 P25
AB17
AB19
VDD_3
VDD_4
VDD_59
VDD_60
R11
R12 Under GPU
AB21 VDD_5 VDD_61 R13
AB23 VDD_6 VDD_62 R14
AB25 R15 +VGA_CORE
VDD_7 VDD_63
AC11 VDD_8 VDD_64 R16
AC12 R17 4700P_0402_25V7K 0.01U_0402_25V7K 0.01U_0402_25V7K 0.01U_0402_25V7K 0.047U_0402_25V6K
VDD_9 VDD_65
AC15 VDD_12 VDD_68 R20 1 1 1 1 1 1 1 1 1
AC16 R21 C215 C216 C217 C218 C219 C220 C221 C222 C224 C225
VDD_13 VDD_69 C223
AC18 R23 VGA@
VDD_15 VDD_71 VGA@ VGA@ VGA@ 2 VGA@ 2 VGA@ 2 VGA@ 2 VGA@ 2 VGA@ 2 2 VGA@ 2 VGA@ 2
AC21 VDD_18 VDD_74 T12
C AC22 T14 4700P_0402_25V7K 0.01U_0402_25V7K 0.01U_0402_25V7K 0.01U_0402_25V7K 0.047U_0402_25V6K 0.047U_0402_25V6K C
VDD_19 VDD_75
POWER
AD12 VDD_23 VDD_79 T22
AD14 T24 4700P X2
VDD_24 VDD_80 +VGA_CORE 0.01U X 6
AD16 VDD_25 VDD_81 V11
0.047U X3
AD18 VDD_26 VDD_82 V13
0.022U_0402_25V7K 0.1U_0402_16V4Z 0.22U_0402_6.3V6K 0.22U_0402_6.3V6K 0.022U X3
AD22 VDD_27 VDD_83 V15 0.1U X2
AD24 VDD_28 VDD_84 V17 0.22U X3
L11 VDD_29 VDD_85 V19 1U X1
L12 VDD_30 VDD_86 V21 1 1 1 1 1 1
1
L13 V23 C226 C227 C228 C229 C230 C231 C232 C233 C234
VDD_31 VDD_87
L14 VDD_32 VDD_88 V25
L15 W11 VGA@ VGA@ VGA@
2
VDD_33 VDD_89 VGA@ 2 VGA@ 2 VGA@ 2 2 2 VGA@ VGA@ VGA@ 2
L16 VDD_34 VDD_90 W12
L17 VDD_35 VDD_91 W13
L18 VDD_36 VDD_92 W14
L19 W15 0.022U_0402_25V7K 0.022U_0402_25V7K 0.1U_0402_16V4Z 0.22U_0402_6.3V6K 1U_0402_6.3V4Z
VDD_37 VDD_93
L20 VDD_38 VDD_94 W16
L21 VDD_39 VDD_95 W17
L22 VDD_40 VDD_96 W18
L23 VDD_41 VDD_97 W19
L24
L25
VDD_42
VDD_43
VDD_98
VDD_99
W20
W21
+VGA_CORE
Near GPU
M12 VDD_44 VDD_100 W22
M14 W23 +VGA_CORE
VDD_45 VDD_101 22U_0805_6.3V6M 10U_0603_6.3V6M
B M16 VDD_46 VDD_102 W24 B
M18 W25 330U_D2_2V_Y
VDD_47 VDD_103
M20 VDD_48 VDD_104 Y12
M22 VDD_49 VDD_105 Y14 1 2 2 1 1 1
1
M24 Y16 C235 C236 C237 C238
VDD_50 VDD_106 + + C240 + C1018
P11 VDD_51 VDD_107 Y18
P13 Y20 VGA@ C239 VGA@ VGA@
VDD_52 VDD_108 2 VGA@ 1 VGA@ 1 VGA@ 2 330U_2.5V_M_R15
P15 Y22
2
VDD_53 VDD_109 @ 2 2
P17 VDD_54 VDD_110 Y24
P19 560U_2.5V_M_R10
VDD_55 10U_0603_6.3V6M 4.7U_0603_6.3V6K
10/23 Change symbol of C239 from SGA20331E10 to SF000002M00

11/2 Change PN of C1018 from SF000002000 to SF000001K00
+VGA_CORE
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10/7 Add C819~C825
1 1 1 1 1 1 1
C819 C820 C821 C822 C823 C824 C825
@ @ @ @ @ @ @
0.1U_0402_16V4Z 2 2 2 2 2 2 2
A 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z A

VGA(3/12)-VGA CORE
0.3
5 4 3 2 1
5 4 3 2 1
+VRAM_1.5VS U8E Under GPU

Close to Pin
2200mA
3.5A Part 5 of 7
4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K J23 AG11 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z 10U_0603_6.3V6M +1.05VS_DGPU
FBVDDQ_0 PEX_IOVDDQ_0
J24 FBVDDQ_1 PEX_IOVDDQ_1 AG12
1 1 1 1 1 1 1 1 J29 FBVDDQ_2 PEX_IOVDDQ_2 AG13 1 1 1 1 1 1 1 1
C241 C242 C243 C244 C245 C246 C247 C248 AA27 AG15 C249 C256
FBVDDQ_3 PEX_IOVDDQ_3 C250 C251 C252 C253 C254 C255
AA29 FBVDDQ_4 PEX_IOVDDQ_4 AG16
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ AA31 AG17 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 22U_0805_6.3V6M
2 2 2 2 2 2 2 2 FBVDDQ_5 PEX_IOVDDQ_5 2 2 2 2 2 2 2 2
AB27 FBVDDQ_6 PEX_IOVDDQ_6 AG18
AB29 FBVDDQ_7 PEX_IOVDDQ_7 AG22
4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K AC27 AG23 0.1U_0402_16V4Z 1U_0402_6.3V4Z 4.7U_0603_6.3V6K
D AD27 FBVDDQ_9 PEX_IOVDDQ_9 AG24 D
AE27 FBVDDQ_10 PEX_IOVDDQ_10 AG25
AJ28 AG26 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z 10U_0603_6.3V6M +1.05VS_DGPU
B18 FBVDDQ_12 PEX_IOVDDQ_12 AJ14
22U_0805_6.3V6M 22U_0805_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M E21 AJ15 1 1 1 1 1 1 1 1
FBVDDQ_13 PEX_IOVDDQ_13 C257 C264
G17 FBVDDQ_14 PEX_IOVDDQ_14 AJ19
G18 AJ21 C258 C259 C260 C261 C262 C263
1 1 1 1 1 1 1 1 FBVDDQ_15 PEX_IOVDDQ_15
G22 AJ22 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 22U_0805_6.3V6M
C265 C266 C267 C268 C269 C270 C271 C272 FBVDDQ_16 PEX_IOVDDQ_16 2 2 2 2 2 2 2 2
G8 FBVDDQ_17 PEX_IOVDDQ_17 AJ24
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ G9 AJ25
2 2 2 2 2 2 2 2 FBVDDQ_18 PEX_IOVDDQ_18 0.1U_0402_16V4Z 1U_0402_6.3V4Z 4.7U_0603_6.3V6K
H29 FBVDDQ_19 PEX_IOVDDQ_19 AJ27
POWER
J14 FBVDDQ_20 PEX_IOVDDQ_20 AK18
22U_0805_6.3V6M 22U_0805_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M J15
J16
FBVDDQ_21 PEX_IOVDDQ_21 AK20
AK23
Close to Pin
FBVDDQ_22 PEX_IOVDDQ_22 L4 VGA@
J17 FBVDDQ_23 PEX_IOVDDQ_23 AK26
J20 AL16 1U_0402_6.3V4Z 1U_0402_6.3V4Z 2 1 +1.05VS_DGPU
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z FBVDDQ_24 PEX_IOVDDQ_24 BLM18PG121SN1D_0603
J21 FBVDDQ_25
J22 FBVDDQ_26 1 1 1 1 1
N27 +1.05VS_DGPU
1 1 1 1 1 1 1 FBVDDQ_27
P27 AK16 C280 C281 C282 C803 C804
C273 C274 C275 C276 C277 C278 C279 FBVDDQ_28 PEX_IOVDD_0 VGA@ @ VGA@ VGA@ @ 1000P_0402_50V7K
R27 FBVDDQ_29 PEX_IOVDD_1 AK17
VGA@ VGA@ VGA@ VGA@ 2 2 2 2 2 1U_0402_6.3V4Z
T27 FBVDDQ_30 PEX_IOVDD_2 AK21
VGA@ 2 VGA@ 2 VGA@ 2 2 2 2 2
U27 AK24 1 1 1 1
FBVDDQ_31 PEX_IOVDD_3 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
U29 FBVDDQ_32 PEX_IOVDD_4 AK27
0.1U_0402_16V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z V27 C514 C515 C516 C517
V29
FBVDDQ_33 120mA @ @ @ @
FBVDDQ_34 1000P_0402_50V7K 2 2 2 2 1000P_0402_50V7K
V34 FBVDDQ_35
W27 AG14 +PEX_PLLVDD 1000P_0402_50V7K
FBVDDQ_36 PEX_PLLVDD
Y27 FBVDDQ_37
C C
+VRAM_1.5VS VGA@ 10K_0402_5% +3VS_DGPU
8/9 EMI Suggestion R199 1 +IFPAB_PLLVDD 240mA (120mA each) 1U_0402_6.3V4Z
2 AK9 IFPAB_PLLVDD PEX_SVDD_3V3 AG19
1000P_0402_50V7K 1 2 AJ11 F7
R200 @ 1K_0402_1% IFPAB_RSET PEX_SVDD_3V3_NC
1 1 1
+3VS_DGPU
1 1 1 1
2 R201 1 +IFPAB_IOVDD AG9
120mA(12~16mils) C283 C284 C285
C502 C506 C507 C509 VGA@ 10K_0402_5% IFPA_IOVDD 0.1U_0402_16V4Z 1U_0402_6.3V4Z VGA@ VGA@ VGA@
AG10 IFPB_IOVDD VDD33_0 J10
@ @ @ @ 2 2 2
VDD33_1 J11
1000P_0402_50V7K 2 2 2 2 1000P_0402_50V7K
J12 1 1 1 1 1
1000P_0402_50V7K +IFPC_PLLVDD VDD33_2 C290 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
AJ9 IFPC_PLLVDD VDD33_3 J13
1 VGA@ 2 AK7 J9 C286 C287 C288 C289
R202 1K_0402_1% IFPC_RSET VDD33_4 VGA@ VGA@ VGA@ VGA@ VGA@ 4.7U_0603_6.3V6K
+IFPC_IOVDD 2 2 2 2 2
AJ8 IFPC_IOVDD
VGA@ P9 0.1U_0402_16V4Z 0.1U_0402_16V4Z
R205 1 +IFPD_PLLVDD MIOA_VDDQ_NC_0 +3VS_DGPU
2 AC6 IFPD_PLLVDD MIOA_VDDQ_NC_1 R9 8/9 EMI Suggestion
2
1 @ 2 10K_0402_5% AB6 IFPD_RSET MIOA_VDDQ_NC_2 T9 Under GPU(below 150mils)
R204 1K_0402_1% U9 R206 1000P_0402_50V7K
R691 1 +IFPD_IOVDD MIOA_VDDQ_NC_3 VGA@ 10K_0402_5%
2 AK8 IFPD_IOVDD
VGA@ 10K_0402_5% 1 1 1 1
AA9
1
+IFPEF_PLLVDD MIOB_VDDQ_NC_0 C510 C511 C512 C513
AJ6 IFPEF_PLLVDD MIOB_VDDQ_NC_1 AB9
1 VGA@ 2 AL1 IFPEF_RSET MIOB_VDDQ_NC_2 W9 @ @ @ @
R208 1K_0402_1% Y9 1000P_0402_50V7K 2 2 2 2 1000P_0402_50V7K
+IFPE_IOVDD MIOB_VDDQ_NC_3 1000P_0402_50V7K
AE7 IFPE_IOVDD
2
AD7 IFPF_IOVDD VGA@ R210
10K_0402_5%
B B
+3VS_DGPU N12P-GT1-A1_BGA_973P VGA@
1
L5
2 1 +IFPCDEF_PLLVDD +3VS to +3VS_DGPU
BLM18PG181SN1D_0603 Under GPU(below 150mils)
VGA@
+1.05VS_DGPU PJ26
JUMP_43X79
0_0603_5% 220mA L13 285mA 2 1
+IFPCDEF_PLLVDD 1 1U_0402_6.3V4Z +IFPC_PLLVDD 2 1
2 2 1 4.7U_0603_6.3V6K 0.1U_0402_16V4Z +IFPE_IOVDD
R688 BLM18PG181SN1D_0603 VGA@ +3VS_DGPU
VGA@ VGA@ 1 1 1 1 AO3413_SOT23-3
+3VS
D
1 1 C816 C815 C818 C817 3 1
VGA@ VGA@ VGA@ VGA@ 1 Q2
2
C291 C292 2 2 2 2 C296 C297
@ VGA@ R211 @ @ R212
G
2
2 2 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V7K 10U_0805_6.3V6M 470_0603_5%
2
100K_0402_5% @ 2 @
@
1 1
4.7U_0603_6.3V6K R213 @
24K_0402_1% D
220mA 2 SUSP
D SUSP <5,49,50,55>
1
+IFPCDEF_PLLVDD
1 2 0.1U_0402_16V4Z +IFPEF_PLLVDD @ R214 Q3 G
<45,49,53,54,56,59> SUSP#
R687 0_0603_5% 2 S SSM3K7002FU_SC70-3
3
+1.05VS_DGPU
Under GPU(below 150mils) VGA@ 1 1 1 0_0402_5% 1 G Q4 @
C814 C813 C812 S@
285mA
3
0.1U_0402_16V4Z
L6 @ @ VGA@
C298
2 1 0.1U_0402_16V4Z +IFPC_IOVDD SSM3K7002FU_SC70-3
BLM18PG181SN1D_0603 2 2 2 2
A A
VGA@ 1 1 1 @
0.1U_0402_16V4Z 0.1U_0402_16V4Z
C300 C301 C302
@ VGA@ @
2 2 2
1U_0402_6.3V4Z 0.1U_0402_16V4Z Security Classification Compal Secret Data Compal Electronics, Inc.
VGA(4/12)-POWER
0.3
5 4 3 2 1
5 4 3 2 1
U8F
B3 Part 6 of 7
GND_0
B6 GND_1 GND_97 V18
B9 GND_2 GND_98 V20
B12 GND_3 GND_99 V22
B15 GND_4 GND_100 V24
B21 GND_5 GND_101 V31
B24 GND_6 GND_102 Y11
B27 GND_7 GND_103 Y13
B30 GND_8 GND_104 Y15
B33 GND_9 GND_105 Y17
D
C2 GND_10 GND_106 Y19 D
C34 GND_11 GND_107 Y21
E6 GND_12 GND_108 Y23
E9 GND_13 GND_109 Y25
E12 GND_14 GND_110 AA2
E15 GND_15 GND_111 AA5
E18 GND_16 GND_112 AA11
E24 GND_17 GND_113 AA12
E27 GND_18 GND_114 AA13
E30 GND_19 GND_115 AA14
F2 GND_20 GND_116 AA15
F31 GND_21 GND_117 AA16
F34 GND_22 GND_118 AA17
F5 GND_23 GND_119 AA18
J2 GND_24 GND_120 AA19
J5 GND_25 GND_121 AA20
J31 GND_26 GND_122 AA21
J34 GND_27 GND_123 AA22
K9 GND_28 GND_124 AA23
L9 GND_29 GND_125 AA24
M2 GND_30 GND_126 AA25
M5 GND_31 GND_127 AA34
M11 GND_32 GND_128 AB12
M13 GND_33 GND_129 AB14
M15 GND_34 GND_130 AB16
M17 GND_35 GND_131 AB18
M19 GND_36 GND_132 AB20
M21 GND_37 GND_133 AB22
M23 GND_38 GND_134 AB24
M25 GND_39 GND_135 AC9
C M31 GND_40 GND_136 AD2 C
M34 GND_41 GND_137 AD5
GND
N11 GND_42 GND_138 AD11
N12 GND_43 GND_139 AD13
N13 GND_44 GND_140 AD15
N14 GND_45 GND_141 AD17
N15 GND_46 GND_142 AD21
N16 GND_47 GND_143 AD23
N17 GND_48 GND_144 AD25
N18 GND_49 GND_145 AD31
N19 GND_50 GND_146 AD34
N20 GND_51 GND_147 AE11
N21 GND_52 GND_148 AE12
N22 GND_53 GND_149 AE13
N23 GND_54 GND_150 AE14
N24 GND_55 GND_151 AE15
N25 GND_56 GND_152 AE16
P12 GND_57 GND_153 AE17
P14 GND_58 GND_154 AE18
P16 GND_59 GND_155 AE19
P18 GND_60 GND_156 AE20
P20 GND_61 GND_157 AE21
P22 GND_62 GND_158 AE22
P24 GND_63 GND_159 AE23
R2 GND_64 GND_160 AE24
R5 GND_65 GND_161 AE25
R31 GND_66 GND_162 AG2
R34 GND_67 GND_163 AG5
T11 GND_68 GND_164 AG31
B
T13 GND_69 GND_165 AG34 B
T15 GND_70 GND_166 AK2
T17 GND_71 GND_167 AK5
T19 GND_72 GND_168 AK14
T21 GND_73 GND_169 AK31
T23 GND_74 GND_170 AK34
T25 GND_75 GND_171 AL6
U11 GND_76 GND_172 AL9
U12 GND_77 GND_173 AL12
U13 GND_78 GND_174 AL15
U14 GND_79 GND_175 AL18
U15 GND_80 GND_176 AL21
U16 GND_81 GND_177 AL24
U17 GND_82 GND_178 AL27
U18 GND_83 GND_179 AL30
U19 GND_84 GND_180 AN2
U20 GND_85 GND_181 AN34
U21 GND_86 GND_182 AP3
U24 GND_89 GND_185 AP12
U25 GND_90 GND_186 AP15
V2 GND_91 GND_187 AP18
V12 GND_94 GND_190 AP27
V14 GND_95 GND_191 AP30
V16 GND_96 GND_192 AP33
A A

VGA(5/12)-GND
0.3
5 4 3 2 1
5 4 3 2 1
U8B Mode G- Mapping

Part 2 of 7 U30 CMDA0 DATA Bus
MDA[0..63] FBA_CMD0 CMDA0 <28>
D MDA0 L32 V30 CMDA1 D
<28,29> MDA[0..63] FBA_D0 FBA_CMD1 CMDA1 <28>
MDA1 N33 U31 CMDA2
CMDA2 <28>
Address 0..31 32..63
MDA2 FBA_D1 FBA_CMD2 CMDA3
L33 FBA_D2 FBA_CMD3 V32 CMDA3 <28>
MDA3 N34 T35 CMDA4 CMD3 A4_BA2
FBA_D3 FBA_CMD4 CMDA4 <28>
MDA4 N35 U33 CMDA5
MDA5 P35 W32 CMDA6 CMD8 ABI#
MDA6 P33 W33 CMDA7
MDA7 P34 W31 CMDA8 CMD2 A2_BA0
MDA8 K35 W34 CMDA9
MDA9 K33 U34 CMDA10
MDA10 K34 U35 CMDA11 CMD7 A6_A11
MDA11 H33 U32 CMDA12
FBA_D11 FBA_CMD12 CMDA12 <28> +VRAM_1.5VS
MDA12 G34 T34 CMDA13 CMD15 RESET#
FBA_D12 FBA_CMD13 CMDA13 <28> CKE# data[0,31]
MDA13 G33 T33 CMDA14
MDA14 E34 W30 CMDA15 CMDA10 1 R215 2 CMD13 RAS#
FBA_D14 FBA_CMD15 CMDA15 <28,29>
MDA15 E33 AB30 CMDA16 VGA@ 10K_0402_5%
MDA16 G31 AA30 CMDA17 CMD4 A5_BA1
MDA17 F30 AB31 CMDA18
FBA_D17 FBA_CMD18 CMDA18 <29> CKE# data[32,63]
MDA18 G30 AA32 CMDA19 CMD6 A7_A8
MDA19 G32 AB33 CMDA20 CMDA26 1 R216 2
MDA20 K30 Y32 CMDA21 VGA@ 10K_0402_5% CMD12 A0_A10
MDA21 K32 Y33 CMDA22
MDA22 H30 AB34 CMDA23 CMD10 CKE#
FBA_D22 FBA_CMD23 CMDA23 <29> Reset#
MDA23 K31 AB35 CMDA24
MDA24 L31 Y35 CMDA25 CMDA15 1 R217 2 CMD9 A12_RFU
MDA25 L30 W35 CMDA26 VGA@ 10K_0402_5%
MDA26 M32 Y34 CMDA27 CMD1 A3_BA3
MEMORY INTERFACE
MDA27 N30 Y31 CMDA28
MDA28 M30 Y30 CMDA29 CMD11 A1_A9
C MDA29 P31 W29 CMDA30 C
MDA30 R32 Y29 CMD0 CS#
MDA31 FBA_D30 FBA_CMD31
R30 FBA_D31
MDA32 AG30 P32 DQMA0 CMD5 WE#
MDA33 FBA_D32 FBA_DQM0 DQMA1
AG32 FBA_D33 FBA_DQM1 H34 DQMA[7..0] <28,29>
MDA34 AH31 J30 DQMA2 CMD14 CAS#
AF31 FBA_D35 FBA_DQM3 P30
MDA36 AF30 AF32 DQMA4 CMD30 RAS#
AE30 FBA_D37 FBA_DQM5 AL32
MDA38 AC32 AL34 DQMA6 CMD20 A3_BA3
AD30 FBA_D39 FBA_DQM7 AF35
MDA40 AN33 CMD16 WE#
MDA41 FBA_D40 T35 @
AL31 FBA_D41 FBA_DQS_RN0 L35
A
MDA42 AM33 G35 T36 @ CMD25 A12_RFU
MDA43 FBA_D42 FBA_DQS_RN1 T37 @
AL33 FBA_D43 FBA_DQS_RN2 H31
MDA44 AK30 N32 T38 @ CMD28 A7_A8
AK32 FBA_D45 FBA_DQS_RN4 AD32
MDA46 AJ30 AJ31 T40 @ CMD22 A0_A10
AH30 FBA_D47 FBA_DQS_RN6 AJ35
MDA48 AH33 AC34 T42 @ CMD19 A2_BA0
MDA49 FBA_D48 FBA_DQS_RN7
AH35 FBA_D49
MDA50 AH34 L34 DQSA0 CMD17 A5_BA1
MDA51 FBA_D50 FBA_DQS_WP0 DQSA1
AH32 FBA_D51 FBA_DQS_WP1 H35
MDA52 AJ33 J32 DQSA2 CMD27 A6_A11
AL35 FBA_D53 FBA_DQS_WP3 N31
MDA54 AM34 AE31 DQSA4
AM35 FBA_D55 FBA_DQS_WP5 AJ32 DQSA[7..0] <28,29> CMD29 CAS#
MDA56 AF33 AJ34 DQSA6
B
AE32 FBA_D57 FBA_DQS_WP7 AC33 CMD18 A4_BA2 B
MDA58 AF34
MDA59 FBA_D58 FBA_W CK01
AE35 FBA_D59 FBA_WCK0 P29 FBA_W CK01 <28> CMD15 RESET#
MDA60 AE34 R29 FBA_W CK01#
FBA_D60 FBA_WCK0_N FBA_W CK01# <28>
MDA61 AE33 L29 FBA_W CK23 CMD26 CKE#
+1.05VS_DGPU FBA_D61 FBA_WCK1 FBA_W CK23 <28>
Under GPU(below 150mils) MDA62 AB32 FBA_D62 FBA_WCK1_N M29 FBA_W CK23#
FBA_W CK23# <28>
12mil MDA63 AC35 AG29 FBA_W CK45 CMD23 A1_A9
FBA_D63 FBA_WCK2 FBA_W CK45 <29>
BLM18PG330SN1D_0603 AH29 FBA_W CK45#
FBA_WCK2_N FBA_W CK45# <29>
1 2 10U_0603_6.3V6M 1U_0402_6.3V6K 0.1U_0402_16V4Z +FB_AVDD_0 AG27 FB_DLLAVDD_0 FBA_WCK3 AD29 FBA_W CK67
FBA_W CK67 <29> CMD24 ABI#
L7 AF27 AE29 FBA_W CK67#
FB_PLLAVDD_0 FBA_WCK3_N FBA_W CK67# <29>
VGA@ 1 1 1 1 1 CMD21 CS#
+FB_AVDD_1 J19
C303 C304 C305 C306 C307 FB_DLLAVDD_1 CLKA0
J18 FB_PLLAVDD_1 FBA_CLK0 T32 CLKA0 <28>
VGA@ VGA@ VGA@ VGA@ VGA@ T31 CLKA0#
2 2 2 2 2 FBA_CLK0_N CLKA0# <28>
J27 FB_VREF_NC
0.1U_0402_16V4Z 2R218 60.4_0402_1%
1 T30 AC31 CLKA1
FBA_DEBUG0 FBA_CLK1 CLKA1 <29>
0.1U_0402_16V4Z 2 VGA@ 1 T29 AC30 CLKA1#
FBA_DEBUG1 FBA_CLK1_N CLKA1# <29>
R219 10K_0402_5%
VGA@
+VRAM_1.5VS N12P-GT1-A1_BGA_973P VGA@
+1.05VS_DGPU
BLM18PG330SN1D_0603
12mil
1 2 10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z +FB_AVDD_1
L8
VGA@ 1 1 1 1 1
C308 C309 C310 C311 C312
A
VGA@ VGA@ VGA@ VGA@ VGA@ A
2 2 2 2 2
1U_0402_6.3V6K
0.1U_0402_16V4Z

VGA(6/12)-MEM Interface A
0.3
5 4 3 2 1
5 4 3 2 1
U8C
Mode G- Mapping
Part 3 of 7 F18 CMDB0
MDB[0..63] FBC_CMD0 CMDB0 <30>
<30,31> MDB[0..63] MDB0 B13 E19 CMDB1 DATA Bus
FBC_D0 FBC_CMD1 CMDB1 <30>
MDB1 D13 D18 CMDB2
MDB2 A13 FBC_D2 FBC_CMD3 C17 CMDB3
CMDB3 <30>
Address 0..31 32..63
MDB3 A14 F19 CMDB4
MDB4 C16 C19 CMDB5 CMD3 A4_BA2
MDB5 B16 B17 CMDB6
D MDB6 A17 E20 CMDB7 CMD8 ABI# D
MDB7 D16 B19 CMDB8
MDB8 C13 D20 CMDB9 CMD2 A2_BA0
FBC_D8 FBC_CMD9 CMDB9 <30> +VRAM_1.5VS
MDB9 B11 A19 CMDB10
FBC_D9 FBC_CMD10 CMDB10 <30> CKE# data[0,31]
MDB10 C11 D19 CMDB11
MDB11 A11 C20 CMDB12 CMDB10 1 R220 2 CMD7 A6_A11
MDB12 C10 F20 CMDB13 VGA@ 10K_0402_5%
MDB13 C8 B20 CMDB14 CMD15 RESET#
MDB14 B8 G21 CMDB15
FBC_D14 FBC_CMD15 CMDB15 <30,31> CKE# data[32,63]
MDB15 A8 F22 CMDB16 CMD13 RAS#
MDB16 E8 F24 CMDB17 CMDB26 1 R221 2
MDB17 F8 F23 CMDB18 VGA@ 10K_0402_5% CMD4 A5_BA1
MDB18 F10 C25 CMDB19
MDB19 F9 C23 CMDB20 CMD6 A7_A8
FBC_D19 FBC_CMD20 CMDB20 <31> Reset#
MDB20 F12 F21 CMDB21
MDB21 D8 E22 CMDB22 CMDB15 1 R222 2 CMD12 A0_A10
MDB22 D11 D21 CMDB23 VGA@ 10K_0402_5%
MDB23 E11 A23 CMDB24 CMD10 CKE#
MDB24 D12 D22 CMDB25
MDB25 E13 B23 CMDB26 CMD9 A12_RFU
MDB26 F13 C22 CMDB27
MEMORY INTERFACE C
MDB27 F14 B22 CMDB28 CMD1 A3_BA3
MDB28 F15 A22 CMDB29
MDB29 E16 A20 CMDB30 CMD11 A1_A9
MDB30 F16 G20
MDB31 FBC_D30 FBC_CMD31
F17 FBC_D31 CMD0 CS#
MDB32 D29 A16 DQMB0
MDB33 FBC_D32 FBC_DQM0 DQMB1
F27 FBC_D33 FBC_DQM1 D10 CMD5 WE#
MDB34 F28 F11 DQMB2
FBC_D34 FBC_DQM2 DQMB[7..0] <30,31>
C MDB35 E28 D15 DQMB3 CMD14 CAS# C
D26 FBC_D36 FBC_DQM4 D27
MDB37 F25 D34 DQMB5 CMD30 RAS#
D24 FBC_D38 FBC_DQM6 A34
MDB39 E25 D28 DQMB7 CMD20 A3_BA3
MDB40 FBC_D39 FBC_DQM7
E32 FBC_D40
MDB41 F32 B14 T43 @ CMD16 WE#
MDB42 FBC_D41 FBC_DQS_RN0 T44 @
D33 FBC_D42 FBC_DQS_RN1 B10
MDB43 E31 D9 T45 @ CMD25 A12_RFU
C33 FBC_D44 FBC_DQS_RN3 E14
MDB45 F29 F26 T47 @ CMD28 A7_A8
D30 FBC_D46 FBC_DQS_RN5 D31
MDB47 E29 A31 T49 @ CMD22 A0_A10
B29 FBC_D48 FBC_DQS_RN7 A26
MDB49 C31 CMD19 A2_BA0
MDB50 FBC_D49 DQSB0
C29 FBC_D50 FBC_DQS_WP0 C14
MDB51 B31 A10 DQSB1 CMD17 A5_BA1
MDB52 FBC_D51 FBC_DQS_WP1 DQSB2
C32 FBC_D52 FBC_DQS_WP2 E10
MDB53 B32 D14 DQSB3 CMD27 A6_A11
B35 FBC_D54 FBC_DQS_WP4 E26
MDB55 B34 D32 DQSB5
FBC_D55 FBC_DQS_WP5 DQSB[7..0] <30,31>
MDB56 A29 A32 DQSB6 CMD29 CAS#
B28 FBC_D57 FBC_DQS_WP7 B26
MDB58 A28 CMD18 A4_BA2
MDB59 FBC_D58 FBB_W CK01
C28 FBC_D59 FBC_WCK0 G14 FBB_W CK01 <30>
MDB60 C26 G15 FBB_W CK01# CMD15 RESET#
FBC_D60 FBC_WCK0_N FBB_W CK01# <30>
MDB61 D25 G11 FBB_W CK23
FBC_D61 FBC_WCK1 FBB_W CK23 <30>
MDB62 B25 G12 FBB_W CK23# CMD26 CKE#
FBC_D62 FBC_WCK1_N FBB_W CK23# <30>
MDB63 A25 G27 FBB_W CK45
B FBC_D63 FBC_WCK2 FBB_W CK45 <31> B
G28 FBB_W CK45# CMD23 A1_A9
FBC_WCK2_N FBB_W CK45# <31>
G24 FBB_W CK67
FBC_WCK3 FBB_W CK67 <31>
+VRAM_1.5VS 1 2 K27 G25 FBB_W CK67# CMD24 ABI#
FBCAL_PD_VDDQ FBC_WCK3_N FBB_W CK67# <31>
R223 VGA@ 40.2_0402_1%
1 2 L27 FBCAL_PU_GND CMD21 CS#
R224 VGA@ 40.2_0402_1% E17 CLKB0
FBC_CLK0 CLKB0 <30>
1 2 M27 D17 CLKB0#
FBCAL_TERM_GND FBC_CLK0_N CLKB0# <30>
R225 VGA@ 60.4_0402_1%
+VRAM_1.5VS 60.4_0402_1% 2 1 R226 G19 FBC_DEBUG0 FBC_CLK1 D23 CLKB1
CLKB1 <31>
2 VGA@ 1 G16 FBB_DEBUG1 FBC_CLK1_N E23 CLKB1#
CLKB1# <31>
R227 10K_0402_5%
VGA@
A A

VGA(7/12)-MEM Interface C
0.3
5 4 3 2 1
5 4 3 2 1
U10 U11
MF=0 MF=0 MF=1 MF=1 MF=0 MF=1 MF=0 MF=1 MF=1 MF=0 MDA[0..63] <26,29>
Byte 0 and 2 DQSA0 C2

DQ24 DQ0 A4
A2
MDA0
MDA1
DQ24 DQ0 A4
A2
MDA24
MDA25
EDC0 EDC3 DQ25 DQ1 MDA2 EDC0 EDC3 DQ25 DQ1 MDA26 DQMA[7..0] <26,29>
C13 EDC1 EDC2 DQ26 DQ2 B4 C13 EDC1 EDC2 DQ26 DQ2 B4
DQSA2 R13 B2 MDA3 DQSA1 R13 B2 MDA27
EDC2 EDC1 DQ27 DQ3 MDA4 EDC2 EDC1 DQ27 DQ3 MDA28 DQSA[7..0] <26,29>
R2 EDC3 EDC0 DQ28 DQ4 E4 R2 EDC3 EDC0 DQ28 DQ4 E4
E2 MDA5 E2 MDA29
DQ29 DQ5 MDA6 DQ29 DQ5 MDA30
DQ30 DQ6 F4 DQ30 DQ6 F4
DQMA0 D2 F2 MDA7 DQMA3 D2 F2 MDA31
DBI0# DBI3# DQ31 DQ7 DBI0# DBI3# DQ31 DQ7
D13 A11 D13 A11
DQMA2 DBI1# DBI2# DQ16 DQ8 DQMA1 DBI1# DBI2# DQ16 DQ8
P13 A13 P13 A13
P2 B11 P2 B11
D DBI3# DBI0# DQ18 DQ10 DBI3# DBI0# DQ18 DQ10 D
B13 B13
CLKA0 DQ19 DQ11 CLKA0 DQ19 DQ11
J12 E11 J12 E11
<26> CLKA0 CLKA0# CK DQ20 DQ12 <26> CLKA0 CLKA0# CK DQ20 DQ12
J11 E13 J11 E13
<26> CLKA0# CMDA10 CK# DQ21 DQ13 <26> CLKA0# CMDA10 CK# DQ21 DQ13
J3 F11 J3 F11
<26> CMDA10 CKE# DQ22 DQ14 <26> CMDA10 CKE# DQ22 DQ14 +VRAM_1.5VS +VRAM_1.5VS
F13 F13
U11 U11
CMDA2 DQ8 DQ16 MDA17 CMDA3 DQ8 DQ16 MDA9
H11 U13 H11 U13
BA0/A2 BA2/A4 DQ9 DQ17 BA0/A2 BA2/A4 DQ9 DQ17
1
<26> CMDA2 CMDA4 K10 T11 MDA18 <26> CMDA3 CMDA1 K10 T11 MDA10
<26> CMDA4 CMDA3 BA1/A5 BA3/A3 DQ10 DQ18 MDA19 <26> CMDA1 CMDA2 BA1/A5 BA3/A3 DQ10 DQ18 MDA11 R228 R229
K11 T13 K11 T13
<26> CMDA3 CMDA1 BA2/A4 BA0/A2 DQ11 DQ19 MDA20 <26> CMDA2 CMDA4 BA2/A4 BA0/A2 DQ11 DQ19 MDA12 549_0402_1% 549_0402_1%
H10 N11 H10 N11
<26> CMDA1 BA3/A3 BA1/A5 DQ12 DQ20 MDA21 <26> CMDA4 BA3/A3 BA1/A5 DQ12 DQ20 MDA13 VGA@ VGA@
N13 N13
M11 M11
2
CMDA6 DQ14 DQ22 MDA23 CMDA12 DQ14 DQ22 MDA15 +FBA_VREFC +FBA_VREFD
K4 A8/A7 A10/A0 DQ15 DQ23 M13 K4 A8/A7 A10/A0 DQ15 DQ23 M13
<26> CMDA6 CMDA11 H5 U4 <26> CMDA12 CMDA7 H5 U4
A9/A1 A11/A6 DQ0 DQ24 A9/A1 A11/A6 DQ0 DQ24
1
A10/A0 A8/A7 DQ1 DQ25 A10/A0 A8/A7 DQ1 DQ25 1 1
<26> CMDA12 CMDA7 K5 T4 <26> CMDA6 CMDA11 K5 T4 R230 C313 R231 C314
<26> CMDA7 CMDA9 A11/A6 A9/A1 DQ2 DQ26 <26> CMDA11 CMDA9 A11/A6 A9/A1 DQ2 DQ26 1.33K_0402_1% 0.01U_0402_25V7K 1.33K_0402_1% 0.01U_0402_25V7K
J5 A12/RFU/NC DQ3 DQ27 T2 J5 A12/RFU/NC DQ3 DQ27 T2
<26> CMDA9 N4 <26> CMDA9 N4 VGA@ VGA@ VGA@ VGA@
DQ4 DQ28 DQ4 DQ28 2 2
A5 N2 A5 N2
2
VPP/NC DQ5 DQ29 VPP/NC DQ5 DQ29
1
U5 VPP/NC DQ6 DQ30 M4 U5 VPP/NC DQ6 DQ30 M4
M2 +VRAM_1.5VS M2 R232 R233
DQ7 DQ31 DQ7 DQ31 931_0402_1%
1 R234 2 J1 1 R235 2 J1 VGA@ VGA@
VGA@ 1K_0402_5% J10 MF +VRAM_1.5VS VGA@ 1K_0402_5% J10 MF +VRAM_1.5VS 931_0402_1%
2
SEN SEN
1 R236 2 J13 ZQ VDDQ B1 1 R237 2 J13 ZQ VDDQ B1
VGA@ 121_0402_1% D1 VGA@ D1
VDDQ 121_0402_1% VDDQ
VDDQ F1 VDDQ F1
CMDA8 J4 M1 CMDA8 J4 M1
<26> CMDA8 CMDA13 G3 ABI# VDDQ <26> CMDA8 CMDA14 G3 ABI# VDDQ
RAS# CAS# VDDQ P1 RAS# CAS# VDDQ P1
1
<26> CMDA13 CMDA0 G12 <26> CMDA14 CMDA5 G12 D
CS# WE# VDDQ T1 CS# WE# VDDQ T1
<26> CMDA0 CMDA14 L3 G2 <26> CMDA5 CMDA13 L3 G2 2
<26> CMDA14 CMDA5 CAS# RAS# VDDQ <26> CMDA13 CMDA0 CAS# RAS# VDDQ <22,29,30,31> MEM_VREF G Q5
L12 WE# CS# VDDQ L2 L12 WE# CS# VDDQ L2
C <26> CMDA5 B3 <26> CMDA0 B3 S SSM3K7002FU_SC70-3 C
3
VDDQ VDDQ VGA@
VDDQ D3 VDDQ D3
VDDQ F3 VDDQ F3
FBA_WCK01# D5 H3 FBA_WCK23# D5 H3
<26> FBA_WCK01# FBA_WCK01 WCK01# WCK23# VDDQ <26> FBA_WCK23# FBA_WCK23 WCK01# WCK23# VDDQ
D4 WCK01 WCK23 VDDQ K3 D4 WCK01 WCK23 VDDQ K3
<26> FBA_WCK01 M3 <26> FBA_WCK23 M3
FBA_WCK23# VDDQ FBA_WCK01# VDDQ
P5 WCK23# WCK01# VDDQ P3 P5 WCK23# WCK01# VDDQ P3
<26> FBA_WCK23# FBA_WCK23 P4 T3 <26> FBA_WCK01# FBA_WCK01 P4 T3
<26> FBA_WCK23 WCK23 WCK01 VDDQ <26> FBA_WCK01 WCK23 WCK01 VDDQ
E5 E5
VDDQ VDDQ
N5 N5
+FBA_VREFD VDDQ +FBA_VREFD VDDQ
A10 E10 A10 E10
+FBA_VREFD VREFD VDDQ +FBA_VREFD VREFD VDDQ
U10 N10 U10 N10
+FBA_VREFC VREFD VDDQ +FBA_VREFC VREFD VDDQ
1 J14 B12 J14 B12
C315 VREFC VDDQ VREFC VDDQ R238
D12 D12
0.01U_0402_25V7K VDDQ VDDQ CLKA0
VDDQ
F12
VDDQ
F12 1 2 VGA@
VGA@ H12 H12 40.2_0402_1%
VDDQ VDDQ
2
2 CMDA15 CMDA15
CLKA0_R
J2 K12 J2 K12
<26,29> CMDA15 RESET# VDDQ <26,29> CMDA15 RESET# VDDQ R239
M12 M12
VDDQ VDDQ @ 160_0402_1% +VRAM_1.5VS
P12 P12
VDDQ VDDQ
T12 T12
VDDQ VDDQ 10U_0603_6.3V6M 10U_0603_6.3V6M
G13 G13
1
VDDQ VDDQ CLKA0# R240 2 VGA@
H1 L13 H1 L13 1
VSS VDDQ VSS VDDQ 40.2_0402_1%
K1 B14 K1 B14 1 1 1
VSS VDDQ VSS VDDQ
B5 D14 B5 D14 1
VSS VDDQ VSS VDDQ C316 C317 C318 C319
G5 F14 G5 F14
VSS VDDQ VSS VDDQ 0.01U_0402_25V7K VGA@ VGA@ VGA@
L5 M14 L5 M14
VSS VDDQ VSS VDDQ VGA@ 2 2 2
T5 P14 T5 P14
VSS VDDQ VSS VDDQ 2
B10 T14 B10 T14
VSS VDDQ VSS VDDQ 10U_0603_6.3V6M
D10 D10
VSS VSS
G10 G10
VSS VSS
L10 A1 L10 A1
VSS VSSQ VSS VSSQ +VRAM_1.5VS
P10 C1 P10 C1
B VSS VSSQ VSS VSSQ B
T10 E1 T10 E1
VSS VSSQ VSS VSSQ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
H14 N1 H14 N1
VSS VSSQ VSS VSSQ
K14 R1 K14 R1
VSS VSSQ VSS VSSQ
U1 U1 1 1 1 1 1 1
+VRAM_1.5VS VSSQ +VRAM_1.5VS VSSQ C320 C321 C322 C323 C324 C325
H2 H2
VSSQ VSSQ
G1 K2 G1 K2
VDD VSSQ VDD VSSQ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
L1 A3 L1 A3
VDD VSSQ VDD VSSQ 2 2 2 2 2 2
G4 C3 G4 C3
VDD VSSQ VDD VSSQ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
L4 E3 L4 E3
VDD VSSQ VDD VSSQ
C5 N3 C5 N3
VDD VSSQ VDD VSSQ +VRAM_1.5VS
R5 R3 R5 R3
VDD VSSQ VDD VSSQ
C10 U3 C10 U3
VDD VSSQ VDD VSSQ 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z
R10 C4 R10 C4
VDD VSSQ VDD VSSQ
D11 R4 D11 R4
VDD VSSQ VDD VSSQ
G11 F5 G11 F5 1 1 1 1 1 1 1 1
VDD VSSQ VDD VSSQ C326 C327 C328 C329 C330 C331 C332 C333
L11 M5 L11 M5
VDD VSSQ VDD VSSQ
P11 F10 P11 F10
VDD VSSQ VDD VSSQ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
G14 M10 G14 M10
VDD VSSQ VDD VSSQ 2 2 2 2 2 2 2 2
L14 C11 L14 C11
9/7 Add VDD VSSQ VDD VSSQ 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z
R11 R11
VSSQ VSSQ
A12 A12
U10 U11 VSSQ VSSQ
C12 C12
VSSQ VSSQ +VRAM_1.5VS
E12 E12
VSSQ VSSQ
N12 N12
VSSQ VSSQ
R12 R12
170-BALL VSSQ 170-BALL VSSQ
U12 U12
VSSQ VSSQ
H13 H13 1
VSSQ VSSQ
1
K4G10325FE-HC04 K4G10325FE-HC04 SGRAM GDDR5 K13 SGRAM GDDR5 K13
X76_SAM@ X76_SAM@ VSSQ VSSQ C742 + + C1017
A14 A14
VSSQ VSSQ 330U_6.3V_M_R14 330U_6.3V_M
C14 C14
U10 U11 VSSQ VSSQ @ @
E14 E14
2
VSSQ VSSQ 2
VSSQ N14 VSSQ N14
A A
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
H5GQ1H24AFR-T2L_BGA170 X76_HYN@ H5GQ1H24AFR-T2L_BGA170 X76_HYN@ 10/23 Change symbol of C742 from SGA20331E10 to SF000002M00
K4G20325FC-HC04 K4G20325FC-HC04 11/2 Change PN of C742 from SF000002M00 to SF000001G00
X76_SAM2G@ X76_SAM2G@
U10 U11
VRAM_GDDR5 / Channel A
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C Custom
X76_HYN2G@ X76_HYN2G@
5 4 3 2 1
5 4 3 2 1
U12 U13
MF=0 MF=0 MF=1 MF=1 MF=0 MF=1 MF=0 MF=1 MF=1 MF=0 MDA[0..63] <26,28>

DQ24 DQ0 A4
A2
MDA32
MDA33
DQ24 DQ0 A4
A2
MDA56
MDA57
EDC0 EDC3 DQ25 DQ1 MDA34 EDC0 EDC3 DQ25 DQ1 MDA58 DQMA[7..0] <26,28>
DQSA6 R13 B2 MDA35 DQSA5 R13 B2 MDA59
EDC2 EDC1 DQ27 DQ3 MDA36 EDC2 EDC1 DQ27 DQ3 MDA60 DQSA[7..0] <26,28>
E2 MDA37 E2 MDA61
DQMA4 D2 F2 MDA39 DQMA7 D2 F2 MDA63
D13 A11 D13 A11
DQMA6 DBI1# DBI2# DQ16 DQ8 DQMA5 DBI1# DBI2# DQ16 DQ8
P13 A13 P13 A13
P2 B11 P2 B11
B13 B13
CLKA1 DQ19 DQ11 CLKA1 DQ19 DQ11
J12 E11 J12 E11
<26> CLKA1 CLKA1# CK DQ20 DQ12 CLKA1# CK DQ20 DQ12
J11 E13 J11 E13
<26> CLKA1# CMDA26 CK# DQ21 DQ13 CMDA26 CK# DQ21 DQ13 +VRAM_1.5VS +VRAM_1.5VS
J3 F11 J3 F11
<26> CMDA26 CKE# DQ22 DQ14 <26> CMDA26 CKE# DQ22 DQ14
F13 F13
U11 U11
DQ8 DQ16 DQ8 DQ16
1
CMDA19 H11 U13 MDA49 CMDA18 H11 U13 MDA41
<26> CMDA19 CMDA17 BA0/A2 BA2/A4 DQ9 DQ17 MDA50 <26> CMDA18 CMDA20 BA0/A2 BA2/A4 DQ9 DQ17 MDA42 R241 R242
K10 T11 K10 T11
<26> CMDA17 CMDA18 BA1/A5 BA3/A3 DQ10 DQ18 MDA51 <26> CMDA20 CMDA19 BA1/A5 BA3/A3 DQ10 DQ18 MDA43 549_0402_1% 549_0402_1%
K11 T13 K11 T13
<26> CMDA18 CMDA20 BA2/A4 BA0/A2 DQ11 DQ19 MDA52 <26> CMDA19 CMDA17 BA2/A4 BA0/A2 DQ11 DQ19 MDA44 VGA@ VGA@
H10 N11 H10 N11
<26> CMDA20 BA3/A3 BA1/A5 DQ12 DQ20 MDA53 <26> CMDA17 BA3/A3 BA1/A5 DQ12 DQ20 MDA45 16mil 16mil
N13 N13
2
DQ13 DQ21 MDA54 DQ13 DQ21 MDA46 +FBA_VREFD_U +FBA_VREFC_U
DQ14 DQ22 M11 DQ14 DQ22 M11
CMDA28 K4 M13 MDA55 CMDA22 K4 M13 MDA47
1
<26> CMDA23 CMDA22 H4 U2 <26> CMDA27 CMDA28 H4 U2 R243 C334 R244 C335
<26> CMDA22 CMDA27 A10/A0 A8/A7 DQ1 DQ25 <26> CMDA28 CMDA23 A10/A0 A8/A7 DQ1 DQ25 1.33K_0402_1% 0.01U_0402_25V7K 1.33K_0402_1% 0.01U_0402_25V7K
K5 A11/A6 A9/A1 DQ2 DQ26 T4 K5 A11/A6 A9/A1 DQ2 DQ26 T4
<26> CMDA27 CMDA25 J5 T2 <26> CMDA23 CMDA25 J5 T2 VGA@ VGA@ VGA@ VGA@
<26> CMDA25 A12/RFU/NC DQ3 DQ27 <26> CMDA25 A12/RFU/NC DQ3 DQ27 2 2
N4 N4
2
DQ4 DQ28 DQ4 DQ28
A5 VPP/NC DQ5 DQ29 N2 A5 VPP/NC DQ5 DQ29 N2
M2 +VRAM_1.5VS M2
DQ7 DQ31 DQ7 DQ31
1
1 R245 2 J1 1 R246 2 J1 R247 R248
VGA@ 1K_0402_1% J10 MF +VRAM_1.5VS VGA@ 1K_0402_1% J10 MF +VRAM_1.5VS
SEN SEN
1 R249 2 J13 ZQ VDDQ B1 1 R250 2 J13 ZQ VDDQ B1 VGA@ VGA@
VGA@ 121_0402_1% D1 VGA@ 121_0402_1% D1 931_0402_1% 931_0402_1%
2
VDDQ VDDQ
VDDQ F1 VDDQ F1
CMDA24 J4 M1 CMDA24 J4 M1
<26> CMDA24 CMDA30 G3 ABI# VDDQ <26> CMDA24 CMDA29 G3 ABI# VDDQ
<26> CMDA30 CMDA21 G12 T1 <26> CMDA29 CMDA16 G12 T1
<26> CMDA21 CMDA29 CS# WE# VDDQ <26> CMDA16 CMDA30 CS# WE# VDDQ
L3 CAS# RAS# VDDQ G2 L3 CAS# RAS# VDDQ G2
1
<26> CMDA29 CMDA16 L12 <26> CMDA30 CMDA21 L12 D
WE# CS# VDDQ L2 WE# CS# VDDQ L2
C <26> CMDA16 B3 <26> CMDA21 B3 2 C
VDDQ VDDQ <22,28,30,31> MEM_VREF G Q6
VDDQ D3 VDDQ D3
F3 F3 S SSM3K7002FU_SC70-3
3
FBA_WCK45# VDDQ FBA_WCK67# D5 VDDQ VGA@
D5 WCK01# WCK23# VDDQ H3 WCK01# WCK23# VDDQ H3
<26> FBA_WCK45# FBA_WCK45 D4 K3 <26> FBA_WCK67# FBA_WCK67 D4 K3
VDDQ M3 VDDQ M3
FBA_WCK67# P5 P3 FBA_WCK45# P5 P3
<26> FBA_WCK67# FBA_WCK67 WCK23# WCK01# VDDQ <26> FBA_WCK45# FBA_WCK45 WCK23# WCK01# VDDQ
P4 T3 P4 T3
E5 E5
VDDQ VDDQ R251
N5 N5
+FBA_VREFD_U VDDQ +FBA_VREFD_U VDDQ CLKA1
A10 E10 A10 E10 1 2 VGA@
+FBA_VREFD_U VREFD VDDQ +FBA_VREFD_U VREFD VDDQ 40.2_0402_1%
U10 N10 U10 N10
VREFD VDDQ VREFD VDDQ
2
1 +FBA_VREFC_U J14 B12 +FBA_VREFC_U J14 B12
C336 VREFC VDDQ VREFC VDDQ R252
CLKA1_R
D12 D12
0.01U_0402_25V7K VDDQ VDDQ @ 160_0402_1%
F12 F12
VGA@ VDDQ VDDQ
H12 H12
2 CMDA15 VDDQ CMDA15 VDDQ +VRAM_1.5VS
J2 K12 J2 K12
1
<26,28> CMDA15 RESET# VDDQ <26,28> CMDA15 RESET# VDDQ CLKA1# R253 2 VGA@
M12 M12 1
VDDQ VDDQ 40.2_0402_1% 10U_0603_6.3V6M 10U_0603_6.3V6M
P12 P12
VDDQ VDDQ
T12 T12 1
VDDQ VDDQ C337
G13 G13 1 1 1
VDDQ VDDQ 0.01U_0402_25V7K
H1 L13 H1 L13
VSS VDDQ VSS VDDQ VGA@ C338 C339 C340
K1 B14 K1 B14
VSS VDDQ VSS VDDQ 2 VGA@ VGA@ VGA@
B5 D14 B5 D14
VSS VDDQ VSS VDDQ 2 2 2
G5 F14 G5 F14
VSS VDDQ VSS VDDQ
L5 M14 L5 M14
T5 P14 T5 P14
VSS VDDQ VSS VDDQ
B10 T14 B10 T14
VSS VDDQ VSS VDDQ
D10 D10
VSS VSS +VRAM_1.5VS
G10 G10
VSS VSS
L10 A1 L10 A1
P10 C1 P10 C1
T10 E1 T10 E1
VSS VSSQ VSS VSSQ
H14 N1 H14 N1 1 1 1 1 1 1
VSS VSSQ VSS VSSQ C341 C342 C343 C344 C345 C346
K14 R1 K14 R1
VSS VSSQ VSS VSSQ
U1 U1
+VRAM_1.5VS VSSQ +VRAM_1.5VS VSSQ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
H2 H2
VSSQ VSSQ 2 2 2 2 2 2
G1 K2 G1 K2
L1 A3 L1 A3
VDD VSSQ VDD VSSQ
G4 C3 G4 C3
L4 E3 L4 E3
VDD VSSQ VDD VSSQ
C5 N3 C5 N3
R5 R3 R5 R3
VDD VSSQ VDD VSSQ
C10 U3 C10 U3
VDD VSSQ VDD VSSQ
R10 C4 R10 C4 1 1 1 1 1 1 1 1
D11 R4 D11 R4
VDD VSSQ VDD VSSQ
G11 F5 G11 F5
L11 M5 L11 M5
P11 F10 P11 F10
G14 M10 G14 M10
VDD VSSQ VDD VSSQ
L14 C11 L14 C11
VDD VSSQ VDD VSSQ
R11 R11
VSSQ VSSQ
A12 A12
U12 U13 VSSQ VSSQ
C12 C12
VSSQ VSSQ
E12 E12
VSSQ VSSQ
N12 N12
VSSQ VSSQ
R12 R12
U12 U12
VSSQ VSSQ
H13 H13
K4G10325FE-HC04 K4G10325FE-HC04 SGRAM GDDR5 VSSQ SGRAM GDDR5 VSSQ
K13 K13
X76_SAM@ X76_SAM@ VSSQ VSSQ
A14 A14
VSSQ VSSQ
C14 C14
U12 U13 VSSQ VSSQ
E14 E14
VSSQ VSSQ
VSSQ N14 VSSQ N14
A A
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
H5GQ1H24AFR-T2L_BGA170 X76_HYN@ H5GQ1H24AFR-T2L_BGA170 X76_HYN@

K4G20325FC-HC04 K4G20325FC-HC04
U12 U13 Security Classification Compal Secret Data Compal Electronics, Inc.
VRAM_DDDR5 / Channel A
Custom
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C
PLA00 M/B LA-6951P Schematic0.3
X76_HYN2G@ X76_HYN2G@ Date: Friday, November 05, 2010 Sheet 29 of 62
5 4 3 2 1
5 4 3 2 1
U14 U15
MF=0 MF=0 MF=1 MF=1 MF=0 MF=1 MF=0 MF=1 MF=1 MF=0 MDB[0..63] <27,31>
Byte 0 and 2 DQSB0 C2

DQ24 DQ0 A4
A2
MDB0
MDB1
DQ24 DQ0 A4
A2
MDB24
MDB25
EDC0 EDC3 DQ25 DQ1 MDB2 EDC0 EDC3 DQ25 DQ1 MDB26 DQMB[7..0] <27,31>
DQSB2 R13 B2 MDB3 DQSB1 R13 B2 MDB27
EDC2 EDC1 DQ27 DQ3 MDB4 EDC2 EDC1 DQ27 DQ3 MDB28 DQSB[7..0] <27,31>
E2 MDB5 E2 MDB29
DQ29 DQ5 MDB6 DQ29 DQ5 MDB30
DQMB0 D2 F2 MDB7 DQMB3 D2 F2 MDB31
D13 A11 D13 A11
DQMB2 DBI1# DBI2# DQ16 DQ8 DQMB1 DBI1# DBI2# DQ16 DQ8
P13 A13 P13 A13
P2 B11 P2 B11
B13 B13
CLKB0 DQ19 DQ11 CLKB0 DQ19 DQ11
J12 E11 J12 E11
<27> CLKB0 CLKB0# CK DQ20 DQ12 <27> CLKB0 CLKB0# CK DQ20 DQ12
J11 E13 J11 E13
<27> CLKB0# CMDB10 CK# DQ21 DQ13 <27> CLKB0# CMDB10 CK# DQ21 DQ13 +VRAM_1.5VS +VRAM_1.5VS
J3 F11 J3 F11
<27> CMDB10 CKE# DQ22 DQ14 <27> CMDB10 CKE# DQ22 DQ14
F13 F13
U11 U11
DQ8 DQ16 DQ8 DQ16
1
CMDB2 H11 U13 MDB17 CMDB3 H11 U13 MDB9
<27> CMDB2 CMDB4 BA0/A2 BA2/A4 DQ9 DQ17 MDB18 <27> CMDB3 CMDB1 BA0/A2 BA2/A4 DQ9 DQ17 MDB10 R254 R255
K10 T11 K10 T11
<27> CMDB4 CMDB3 BA1/A5 BA3/A3 DQ10 DQ18 MDB19 <27> CMDB1 CMDB2 BA1/A5 BA3/A3 DQ10 DQ18 MDB11 549_0402_1% 549_0402_1%
K11 T13 K11 T13
<27> CMDB3 CMDB1 BA2/A4 BA0/A2 DQ11 DQ19 MDB20 <27> CMDB2 CMDB4 BA2/A4 BA0/A2 DQ11 DQ19 MDB12 VGA@ VGA@
H10 N11 H10 N11
<27> CMDB1 BA3/A3 BA1/A5 DQ12 DQ20 MDB21 <27> CMDB4 BA3/A3 BA1/A5 DQ12 DQ20 MDB13
N13 N13
2
DQ13 DQ21 MDB22 DQ13 DQ21 MDB14 +FBB_VREFD +FBB_VREFC
DQ14 DQ22 M11 DQ14 DQ22 M11
CMDB6 K4 M13 MDB23 CMDB12 K4 M13 MDB15
1
<27> CMDB6 CMDB11 H5 U4 <27> CMDB12 CMDB7 H5 U4
<27> CMDB11 CMDB12 H4 U2 <27> CMDB7 CMDB6 H4 U2 R256 C355 R257 C356
<27> CMDB12 CMDB7 A10/A0 A8/A7 DQ1 DQ25 <27> CMDB6 CMDB11 A10/A0 A8/A7 DQ1 DQ25 1.33K_0402_1% 0.01U_0402_25V7K 1.33K_0402_1% 0.01U_0402_25V7K
<27> CMDB7 CMDB9 J5 T2 <27> CMDB11 CMDB9 J5 T2 VGA@ VGA@ VGA@ VGA@
<27> CMDB9 A12/RFU/NC DQ3 DQ27 <27> CMDB9 A12/RFU/NC DQ3 DQ27 2 2
N4 N4
2
DQ4 DQ28 DQ4 DQ28
M2 +VRAM_1.5VS M2
DQ7 DQ31 DQ7 DQ31
1
1 R258 2 J1 1 R259 2 J1 R260 R261
VGA@ 1K_0402_1% J10 MF +VRAM_1.5VS VGA@ 1K_0402_1% J10 MF +VRAM_1.5VS
SEN SEN
1 R262 2 J13 ZQ VDDQ B1 1 R263 2 J13 ZQ VDDQ B1 VGA@ VGA@
VGA@ 121_0402_1% D1 VGA@ 121_0402_1% D1 931_0402_1% 931_0402_1%
2
VDDQ VDDQ
VDDQ F1 VDDQ F1
CMDB8 J4 M1 CMDB8 J4 M1
<27> CMDB8 CMDB13 G3 ABI# VDDQ <27> CMDB8 CMDB14 G3 ABI# VDDQ
<27> CMDB13 CMDB0 G12 T1 <27> CMDB14 CMDB5 G12 T1
<27> CMDB0 CMDB14 CS# WE# VDDQ <27> CMDB5 CMDB13 CS# WE# VDDQ
1
<27> CMDB14 CMDB5 <27> CMDB13 CMDB0 D
L12 WE# CS# VDDQ L2 L12 WE# CS# VDDQ L2
C <27> CMDB5 B3 <27> CMDB0 B3 2 C
VDDQ VDDQ <22,28,29,31> MEM_VREF G Q7
VDDQ D3 VDDQ D3
F3 F3 S SSM3K7002FU_SC70-3
3
FBB_WCK01# VDDQ FBB_WCK23# VDDQ VGA@
D5 WCK01# WCK23# VDDQ H3 D5 WCK01# WCK23# VDDQ H3
<27> FBB_WCK01# FBB_WCK01 D4 K3 <27> FBB_WCK23# FBB_WCK23 D4 K3
<27> FBB_WCK01 WCK01 WCK23 VDDQ <27> FBB_WCK23 WCK01 WCK23 VDDQ
VDDQ M3 VDDQ M3
FBB_WCK23# P5 P3 FBB_WCK01# P5 P3
<27> FBB_WCK23# FBB_WCK23 WCK23# WCK01# VDDQ <27> FBB_WCK01# FBB_WCK01 WCK23# WCK01# VDDQ
P4 T3 P4 T3
E5 E5
VDDQ VDDQ
N5 N5
+FBB_VREFD VDDQ +FBB_VREFD VDDQ
A10 E10 A10 E10
+FBB_VREFD VREFD VDDQ +FBB_VREFD VREFD VDDQ R264
U10 N10 U10 N10
+FBB_VREFC VREFD VDDQ +FBB_VREFC VREFD VDDQ CLKB0
1 J14
VREFC VDDQ
B12 J14
VREFC VDDQ
B12 1 2 VGA@
C357 D12 D12 40.2_0402_1%
VDDQ VDDQ
2
0.01U_0402_25V7K
CLKB0_R
F12 F12
VGA@ VDDQ VDDQ R265
H12 H12
2 CMDB15 VDDQ CMDB15 VDDQ @ 160_0402_1%
J2 K12 J2 K12
<27,31> CMDB15 RESET# VDDQ <27,31> CMDB15 RESET# VDDQ
M12 M12
VDDQ VDDQ +VRAM_1.5VS
P12 P12
1
VDDQ VDDQ CLKB0# R266 2 VGA@
T12 T12 1
VDDQ VDDQ 40.2_0402_1% 10U_0603_6.3V6M 10U_0603_6.3V6M
G13 G13
VDDQ VDDQ
H1 L13 H1 L13 1
VSS VDDQ VSS VDDQ C358
K1 B14 K1 B14 1 1 1
VSS VDDQ VSS VDDQ 0.01U_0402_25V7K
B5 D14 B5 D14
VSS VDDQ VSS VDDQ VGA@ C359 C360 C361
G5 F14 G5 F14
VSS VDDQ VSS VDDQ 2 VGA@ VGA@ VGA@
L5 M14 L5 M14
VSS VDDQ VSS VDDQ 2 2 2
T5 P14 T5 P14
VSS VDDQ VSS VDDQ
B10 T14 B10 T14
D10 D10
VSS VSS
G10 G10
VSS VSS
L10 A1 L10 A1
VSS VSSQ VSS VSSQ +VRAM_1.5VS
P10 C1 P10 C1
T10 E1 T10 E1
H14 N1 H14 N1
VSS VSSQ VSS VSSQ
K14 R1 K14 R1
VSS VSSQ VSS VSSQ
U1 U1 1 1 1 1 1 1
+VRAM_1.5VS VSSQ +VRAM_1.5VS VSSQ C362 C363 C364 C365 C366 C367
H2 H2
VSSQ VSSQ
G1 K2 G1 K2
VDD VSSQ VDD VSSQ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
L1 A3 L1 A3
VDD VSSQ VDD VSSQ 2 2 2 2 2 2
G4 C3 G4 C3
L4 E3 L4 E3
VDD VSSQ VDD VSSQ
C5 N3 C5 N3
R5 R3 R5 R3
VDD VSSQ VDD VSSQ
C10 U3 C10 U3
R10 C4 R10 C4
VDD VSSQ VDD VSSQ
D11 R4 D11 R4
VDD VSSQ VDD VSSQ
G11 F5 G11 F5 1 1 1 1 1 1 1 1
L11 M5 L11 M5
VDD VSSQ VDD VSSQ
P11 F10 P11 F10
G14 M10 G14 M10
L14 C11 L14 C11
R11 R11
VSSQ VSSQ
A12 A12
U14 U15 VSSQ VSSQ
C12 C12
VSSQ VSSQ
E12 E12
VSSQ VSSQ
N12 N12
VSSQ VSSQ +VRAM_1.5VS
R12 R12
U12 U12
VSSQ VSSQ
H13 H13
VSSQ
K13
VSSQ
K13 10/23 Change symbol of C743 from SGA20331E10 to SF000002M00
X76_SAM@ X76_SAM@ A14 A14 11/2 Change PN of C743 from SF000002M00 to SF000001G00
VSSQ VSSQ
1
C14 C14
U14 U15 VSSQ VSSQ C743 +
E14 E14
VSSQ VSSQ 330U_6.3V_M_R14
VSSQ N14 VSSQ N14
A VGA@ A
R14 R14
2
VSSQ VSSQ
VSSQ U14 VSSQ U14

K4G20325FC-HC04 K4G20325FC-HC04
U14 U15
VRAM_GDDR5 / Channel B
5 4 3 2 1
5 4 3 2 1
U16 U17
MF=0 MF=0 MF=1 MF=1 MF=0 MF=1 MF=0 MF=1 MF=1 MF=0 MDB[0..63] <27,30>

DQ24 DQ0 A4
A2
MDB32
MDB33
DQ24 DQ0 A4
A2
MDB56
MDB57
EDC0 EDC3 DQ25 DQ1 MDB34 EDC0 EDC3 DQ25 DQ1 MDB58 DQMB[7..0] <27,30>
DQSB6 R13 B2 MDB35 DQSB5 R13 B2 MDB59
EDC2 EDC1 DQ27 DQ3 MDB36 EDC2 EDC1 DQ27 DQ3 MDB60 DQSB[7..0] <27,30>
E2 MDB37 E2 MDB61
DQMB4 D2 F2 MDB39 DQMB7 D2 F2 MDB63
D13 A11 D13 A11
DQMB6 DBI1# DBI2# DQ16 DQ8 DQMB5 DBI1# DBI2# DQ16 DQ8
P13 A13 P13 A13
P2 B11 P2 B11
B13 B13
CLKB1 DQ19 DQ11 CLKB1 DQ19 DQ11
J12 E11 J12 E11
<27> CLKB1 CLKB1# CK DQ20 DQ12 CLKB1# CK DQ20 DQ12
J11 E13 J11 E13
<27> CLKB1# CMDB26 CK# DQ21 DQ13 CMDB26 CK# DQ21 DQ13 +VRAM_1.5VS +VRAM_1.5VS
J3 F11 J3 F11
<27> CMDB26 CKE# DQ22 DQ14 <27> CMDB26 CKE# DQ22 DQ14
F13 F13
U11 U11
DQ8 DQ16 DQ8 DQ16
1
CMDB19 H11 U13 MDB49 CMDB18 H11 U13 MDB41
<27> CMDB19 CMDB17 BA0/A2 BA2/A4 DQ9 DQ17 MDB50 <27> CMDB18 CMDB20 BA0/A2 BA2/A4 DQ9 DQ17 MDB42 R267 R268
K10 T11 K10 T11
<27> CMDB17 CMDB18 BA1/A5 BA3/A3 DQ10 DQ18 MDB51 <27> CMDB20 CMDB19 BA1/A5 BA3/A3 DQ10 DQ18 MDB43 549_0402_1% 549_0402_1%
K11 T13 K11 T13
<27> CMDB18 CMDB20 BA2/A4 BA0/A2 DQ11 DQ19 MDB52 <27> CMDB19 CMDB17 BA2/A4 BA0/A2 DQ11 DQ19 MDB44 VGA@ VGA@
H10 N11 H10 N11
<27> CMDB20 BA3/A3 BA1/A5 DQ12 DQ20 MDB53 <27> CMDB17 BA3/A3 BA1/A5 DQ12 DQ20 MDB45 16mil 16mil
N13 N13
2
DQ13 DQ21 MDB54 DQ13 DQ21 MDB46 +FBB_VREFD_U +FBB_VREFC_U
DQ14 DQ22 M11 DQ14 DQ22 M11
CMDB28 K4 M13 MDB55 CMDB22 K4 M13 MDB47
1
<27> CMDB28 CMDB23 H5 U4 <27> CMDB22 CMDB27 H5 U4
<27> CMDB23 CMDB22 H4 U2 <27> CMDB27 CMDB28 H4 U2 R269 C376 R270 C377
<27> CMDB22 CMDB27 A10/A0 A8/A7 DQ1 DQ25 <27> CMDB28 CMDB23 A10/A0 A8/A7 DQ1 DQ25 1.33K_0402_1% 0.01U_0402_25V7K 1.33K_0402_1% 0.01U_0402_25V7K
<27> CMDB27 CMDB25 J5 T2 <27> CMDB23 CMDB25 J5 T2 VGA@ VGA@ VGA@ VGA@
<27> CMDB25 A12/RFU/NC DQ3 DQ27 <27> CMDB25 A12/RFU/NC DQ3 DQ27 2 2
N4 N4
2
DQ4 DQ28 DQ4 DQ28
M2 +VRAM_1.5VS M2
DQ7 DQ31 DQ7 DQ31
1 R271 2 J1 MF 1 R272 2 J1 MF
1
VGA@ 1K_0402_1% J10 +VRAM_1.5VS VGA@ 1K_0402_1% J10 +VRAM_1.5VS
SEN SEN
1 R273 2 J13 ZQ VDDQ B1 1 R274 2 J13 ZQ VDDQ B1 R275 R276
VGA@ 121_0402_1% D1 VGA@ 121_0402_1% D1
VDDQ VDDQ VGA@ VGA@
VDDQ F1 VDDQ F1
CMDB24 J4 M1 CMDB24 J4 M1 931_0402_1% 931_0402_1%
2
<27> CMDB24 CMDB30 G3 ABI# VDDQ <27> CMDB24 CMDB29 G3 ABI# VDDQ
<27> CMDB30 CMDB21 G12 T1 <27> CMDB29 CMDB16 G12 T1
<27> CMDB21 CMDB29 CS# WE# VDDQ <27> CMDB16 CMDB30 CS# WE# VDDQ
C <27> CMDB29 CMDB16 L12 L2 <27> CMDB30 CMDB21 L12 L2 C
<27> CMDB16 WE# CS# VDDQ <27> CMDB21 WE# CS# VDDQ
VDDQ B3 VDDQ B3
1
D
VDDQ D3 VDDQ D3
VDDQ F3 VDDQ F3 2
FBB_WCK45# D5 H3 FBB_WCK67# D5 H3 <22,28,29,30> MEM_VREF G Q8
D4 K3 D4 K3 S SSM3K7002FU_SC70-3
3
<27> FBB_WCK45 WCK01 WCK23 VDDQ <27> FBB_WCK67 WCK01 WCK23 VDDQ VGA@
VDDQ M3 VDDQ M3
FBB_WCK67# P5 P3 FBB_WCK45# P5 P3
P4 T3 P4 T3
E5 E5
VDDQ VDDQ
N5 N5
+FBB_VREFD_U VDDQ +FBB_VREFD_U VDDQ R277
A10 E10 A10 E10
+FBB_VREFD_U VREFD VDDQ +FBB_VREFD_U VREFD VDDQ CLKB1
U10
VREFD VDDQ
N10 U10
VREFD VDDQ
N10 1 2 VGA@
1 +FBB_VREFC_U J14 B12 +FBB_VREFC_U J14 B12 40.2_0402_1%
VREFC VDDQ VREFC VDDQ
2
C378
CLKB1_R
D12 D12
0.01U_0402_25V7K VDDQ VDDQ R278
F12 F12
VGA@ VDDQ VDDQ @ 160_0402_1%
H12 H12
2 CMDB15 VDDQ CMDB15 VDDQ +VRAM_1.5VS
J2 K12 J2 K12
<27,30> CMDB15 RESET# VDDQ <27,30> CMDB15 RESET# VDDQ
M12 M12
1
VDDQ VDDQ CLKB1# R279 2 VGA@ 10U_0603_6.3V6M 10U_0603_6.3V6M
P12 P12 1
VDDQ VDDQ 40.2_0402_1%
T12 T12
VDDQ VDDQ
G13 G13 1 1 1 1
VDDQ VDDQ C379
H1 L13 H1 L13
VSS VDDQ VSS VDDQ 0.01U_0402_25V7K C380 C381 C382
K1 B14 K1 B14
VSS VDDQ VSS VDDQ VGA@ VGA@ VGA@ VGA@
B5 D14 B5 D14
VSS VDDQ VSS VDDQ 2 2 2 2
G5 F14 G5 F14
VSS VDDQ VSS VDDQ
L5 M14 L5 M14
T5 P14 T5 P14
VSS VDDQ VSS VDDQ
B10 T14 B10 T14
VSS VDDQ VSS VDDQ
D10 D10
VSS VSS +VRAM_1.5VS
G10 G10
VSS VSS
L10 A1 L10 A1
B VSS VSSQ VSS VSSQ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z B
P10 C1 P10 C1
VSS VSSQ VSS VSSQ
T10 E1 T10 E1
VSS VSSQ VSS VSSQ
H14 N1 H14 N1 1 1 1 1 1 1
VSS VSSQ VSS VSSQ C383 C384 C385 C386 C387 C388
K14 R1 K14 R1
VSS VSSQ VSS VSSQ
U1 U1
+VRAM_1.5VS VSSQ +VRAM_1.5VS VSSQ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
H2 H2
VSSQ VSSQ 2 2 2 2 2 2
G1 K2 G1 K2
L1 A3 L1 A3
VDD VSSQ VDD VSSQ
G4 C3 G4 C3
L4 E3 L4 E3
VDD VSSQ VDD VSSQ
C5 N3 C5 N3
R5 R3 R5 R3
VDD VSSQ VDD VSSQ
C10 U3 C10 U3
VDD VSSQ VDD VSSQ
R10 C4 R10 C4 1 1 1 1 1 1 1 1
D11 R4 D11 R4
VDD VSSQ VDD VSSQ
G11 F5 G11 F5
L11 M5 L11 M5
P11 F10 P11 F10
G14 M10 G14 M10
VDD VSSQ VDD VSSQ
L14 C11 L14 C11
VDD VSSQ VDD VSSQ
R11 R11
VSSQ VSSQ
A12 A12
U16 U17 VSSQ VSSQ
VSSQ
C12
VSSQ
C12 10/22 Add C522~C525
E12 E12 +VRAM_1.5VS
VSSQ VSSQ
N12 N12
VSSQ VSSQ 0.1U_0402_16V4Z
R12 R12
U12 U12
VSSQ VSSQ
H13 H13 1 1 1 1
K13 K13
X76_SAM@ X76_SAM@ VSSQ VSSQ C522 C523 C524 C525
A14 A14
VSSQ VSSQ @ @ @ @
C14 C14
U16 U17 VSSQ VSSQ 0.1U_0402_16V4Z 2 2 2 2 0.1U_0402_16V4Z
VSSQ E14 VSSQ E14
A 0.1U_0402_16V4Z A
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14

K4G20325FC-HC04 K4G20325FC-HC04
U16 U17
VRAM_DDDR5 / Channel B
5 4 3 2 1
5 4 3 2 1
Physical Logical Logical Logical Logical

Strapping pin Power Rail Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
+3VS_DGPU
ROM_SO +3VS XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE
ROM_SCLK +3VS PCI_DEVID[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLLEN_TERM
ROM_SI +3VS RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0]
2
R280 R281 R282 STRAP2 +3VS PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
45.3K_0402_1% 34.8K_0402_1% 20K_0402_1%
VGA@ @ VGA@ STRAP1 +3VS 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]
D D
1
STRAP0 +3VS USER[3] USER[2] USER[1] USER[0]
<21> STRAP0 STRAP0
<21> STRAP1 STRAP1
<21> STRAP2 STRAP2
Resistor Values Pull-up to +3VS Pull-down to Gnd
2
@ R283 R284 R285 5K 1000 0000
45.3K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
1 VGA@ @ 10K 1001 0001
1
15K 1010 0010
20K 1011 0011
25K 1100 0100
30K 1101 0101
+3VS_DGPU
35K 1110 0110
45K 1111 0111
2
2
C C
R286 R287 R288
4.99K_0402_1% 4.99K_0402_1% 15K_0402_1%
@ @ @
1
<21> ROM_SI ROM_SI

<21> ROM_SO ROM_SO
ROM_SCLK
<21> ROM_SCLK SUB_VENDOR XCLK_417
2
0 No VBIOS ROM 0 277MHz (Default)

2
R289
X76 15K_0402_1% R290 R291
X76_HYN@ 10K_0402_1% 15K_0402_1% 1 BIOS ROM is present (Default) 1 Reserved
VGA@ VGA@
1
FB_0_BAR_SIZE USER Straps

R289 R289 R289 0 256MB (Default) User[3:0]
1 Reserved 1000-1100 Customer defined

B B
20K_0402_1% 20K_0402_1% 15K_0402_1%

X76_SAM@ X76_SAM2G@ X76_HYN2G@
3GIO_PADCFG PEX_PLL_EN_TERM
3GIO_PADCFG[3:0] 0 Disable (Default)
0110 Notebook Default 1 Enable
SLOT_CLK_CFG
Hynix H5GQ1H24AFR-T2L 0 GPU and MCH don't share a common reference clock
1G 0010 PD 15K
SA00003WL00
1 GPU and MCH share a common reference clock (Default)
Samsung K4G10325FE-HC04
1G 0011 PD 20K
SA00003RS00 SMBUS_ALT_ADDR VGA_DEVICE
0 0x9E (Default) 0 3D Device
A 1 0x9C (Multi-GPU usage) 1 VGA Device (Default) A

VGA(12/12)-MISC
Custom 0.3
5 4 3 2 1
5 4 3 2 1
+3VS
1
R851
10K_0402_5%
2
VGA_IFPE_DET @ 1 R421 2 HDMI_HPD_SW HDMI_HPD_SW <35>
<22,34> VGA_IFPE_DET
0_0402_5%
0804 Vendor suggest close to Cap.
@ 1 R422 2
<15> PCH_HDMI_DET
0_0402_5%
D R693 1 3D@ HDMI_3TX2- D
2 0_0402_5% HDMI_3TX2- <34>
1
R698 1 3D@ 2 0_0402_5% HDMI_3TX2+
HDMI_3TX2+ <34>
R538
R694 1 3D@ 2 0_0402_5% HDMI_3TX1- 20K_0402_5%
HDMI_3TX1+ HDMI_3TX1- <34>
R699 1 3D@ 2 0_0402_5% @
HDMI_3TX1+ <34>
2
R695 1 3D@ 2 0_0402_5% HDMI_3TX0-
HDMI_3TX0+ HDMI_3TX0- <34>
R697 1 3D@ 2 0_0402_5% HDMI_3TX0+ <34>
R696 1 3D@ 2 0_0402_5% HDMI_3CLK- C497 UMA@2 1 .1U_0402_16V7K PCH_HDMI_C_TXD2- R429 1 UMA@ 2 0_0402_5% HDMI_TX2-
HDMI_3CLK+ HDMI_3CLK- <34> <15> PCH_HDMI_TXD2- PCH_HDMI_C_TXD2+ HDMI_TX2+
R692 1 3D@ 2 0_0402_5% C491 UMA@2 1 .1U_0402_16V7K R614 1 UMA@ 2 0_0402_5%
HDMI_3CLK+ <34> <15> PCH_HDMI_TXD2+
C495 UMA@2 1 .1U_0402_16V7K PCH_HDMI_C_TXD1- R615 1 UMA@ 2 0_0402_5% HDMI_TX1-
<15> PCH_HDMI_TXD1- PCH_HDMI_C_TXD1+ HDMI_TX1+
C492 UMA@2 1 .1U_0402_16V7K R616 1 UMA@ 2 0_0402_5%
<15> PCH_HDMI_TXD1+
<21> VGA_DVI_ETXD2- C397 VGA@2 1 .1U_0402_16V7K VGA_HDMI_C_TXD2- R621 1VGA_2D@2 0_0402_5% HDMI_TX2-
C398 VGA@2 1 .1U_0402_16V7K VGA_HDMI_C_TXD2+ R622 1 VGA_2D@2 0_0402_5% HDMI_TX2+ C494 UMA@2 1 .1U_0402_16V7K PCH_HDMI_C_TXD0- R617 1 UMA@ 2 0_0402_5% HDMI_TX0-
<21> VGA_DVI_ETXD2+ <15> PCH_HDMI_TXD0-
C493 UMA@2 1 .1U_0402_16V7K PCH_HDMI_C_TXD0+ R618 1 UMA@ 2 0_0402_5% HDMI_TX0+
VGA_HDMI_C_TXD1- <15> PCH_HDMI_TXD0+
<21> VGA_DVI_ETXD1- C399 VGA@2 1 .1U_0402_16V7K R623 1 VGA_2D@2 0_0402_5% HDMI_TX1-
<21> VGA_DVI_ETXD1+ C400 VGA@2 1 .1U_0402_16V7K VGA_HDMI_C_TXD1+ R624 1 VGA_2D@2 0_0402_5% HDMI_TX1+ C498 UMA@2 1 .1U_0402_16V7K PCH_HDMI_C_TXC- R619 1 UMA@ 2 0_0402_5% HDMI_CLK-
<15> PCH_HDMI_TXC- PCH_HDMI_C_TXC+ HDMI_CLK+
C496 UMA@2 1 .1U_0402_16V7K R620 1 UMA@ 2 0_0402_5%
VGA_HDM_C_TXD0- <15> PCH_HDMI_TXC+
<21> VGA_DVI_ETXD0- C401 VGA@2 1 .1U_0402_16V7K R625 1 VGA_2D@2 0_0402_5% HDMI_TX0-
C402 VGA@2 1 .1U_0402_16V7K VGA_HDMI_C_TXD0+ R626 1 VGA_2D@2 0_0402_5% HDMI_TX0+
<21> VGA_DVI_ETXD0+
<21> VGA_DVI_ETXC- C403 VGA@2 1 .1U_0402_16V7K VGA_HDMI_C_TXC- R627 1 VGA_2D@2 0_0402_5% HDMI_CLK-
<21> VGA_DVI_ETXC+ C405 VGA@2 1 .1U_0402_16V7K VGA_HDMI_C_TXC+ R628 1 VGA_2D@2 0_0402_5% HDMI_CLK+
C501 3D@ 2 1 .1U_0402_16V7K VGA_HDMI_C_TX2D2- R665 1 3D@ 2 0_0402_5% HDMI_2TX2-

<21> VGA_DVI_FTXD2- HDMI_2TX2- <34>
C504 2 1 .1U_0402_16V7K VGA_HDMI_C_TX2D2+ R666 1 3D@ 2 0_0402_5% HDMI_2TX2+ SEL2 SEL1
<21> VGA_DVI_FTXD2+ HDMI_2TX2+ <34>
3D@
(pin50) (pin49) TMDS/I2C output
<21> VGA_DVI_FTXD1- C445 3D@ 2 1 .1U_0402_16V7K VGA_HDMI_C_TX2D1- R667 1 3D@ 2 0_0402_5% HDMI_2TX1-
VGA_HDMI_C_TX2D1+ HDMI_2TX1+ HDMI_2TX1- <34>
<21> VGA_DVI_FTXD1+ C500 2 1 .1U_0402_16V7K R668 1 3D@ 2 0_0402_5%
C HDMI_2TX1+ <34> C
3D@
<21> VGA_DVI_FTXD0- C503 3D@ 2 1 .1U_0402_16V7K VGA_HDM_C_TX2D0- R669 1 3D@ 2 0_0402_5% HDMI_2TX0-
HDMI_2TX0- <34>
<21> VGA_DVI_FTXD0+ C505 2 1 .1U_0402_16V7K VGA_HDMI_C_TX2D0+ R670 1 3D@ 2 0_0402_5% HDMI_2TX0+ H H PORT1/SCL1/SDA1
HDMI_2TX0+ <34>
3D@
H L PORT2/SCL2/SDA2
R917 1 2D@ 2 0_0402_5% HDMI_IN_D2+_2D
R918 1 2D@ 2 0_0402_5% HDMI_IN_D2-_2D
R919 1 2D@ 2 0_0402_5% HDMI_IN_D1+_2D

R920 1 2D@ 2 0_0402_5% HDMI_IN_D1-_2D
R921 1 2D@ HDMI_IN_D0+_2D 8/18 Add L56(Vendor suggest) +V_5V

2 0_0402_5% 8/18 Add C927(Vendor suggest)
R922 1 2D@ 2 0_0402_5% HDMI_IN_D0-_2D 9/29 Add +V_5V
+V_3.3V +V_3.3V_R +V_3.3V_R
R923 1 2D@ 2 0_0402_5% HDMI_IN_CK+_2D 0_0603_5%
L56
1
R924 1 2D@ 2 0_0402_5% HDMI_IN_CK-_2D 2D@ 1
1
FBMA-L11-160808-221LMT 0603 R733
C927 R677 4.7K_0402_5%
0.1U_0402_16V4Z R938 4.7K_0402_5% 2D@
<38> HDMI_IN_D2+ R909 1 3D@ 2 0_0402_5% HDMI_IN_D2+_3D 2D@ 2 2D@ 2D@
HDMI_IN_D2+_3D <34> 8/18 Add C923~C926(Vendor suggest)
2
R910 1 3D@ 2 0_0402_5% HDMI_IN_D2-_3D U18 HPD_SINK
<38> HDMI_IN_D2- HDMI_IN_D2-_3D <34>
2
R911 1 3D@ 2 0_0402_5% HDMI_IN_D1+_3D 0.1U_0402_16V4Z 0.1U_0402_16V4Z 54 51
<38> HDMI_IN_D1+ HDMI_IN_D1+_3D <34> VDD VDD5
R912 1 3D@ 2 0_0402_5% HDMI_IN_D1-_3D 3
<38> HDMI_IN_D1- HDMI_IN_D1-_3D <34> VDD
1 1 1 1 1 8 50 HDMI_SWOFF_EC HDMI_SWOFF_EC <45>
R913 1 3D@ HDMI_IN_D0+_3D VDD S_DDCS2 HDMI_SW_EC
<38> HDMI_IN_D0+ 2 0_0402_5% HDMI_IN_D0+_3D <34>
0.1U_0402_16V4Z 13
VDD S_DDCS1
49 HDMI_SW_EC <45>
R914 1 3D@ 2 0_0402_5% HDMI_IN_D0-_3D C407 C923 C924 C925 C926 18
<38> HDMI_IN_D0- HDMI_IN_D0-_3D <34> VDD
2D@ 2D@ 2D@ 2D@ 2D@ 23 48
2 2 2 2 2 VDD NC R900
R915 1 3D@ 2 0_0402_5% HDMI_IN_CK+_3D 36 47 1 2 @
B <38> HDMI_IN_CK+ HDMI_IN_CK+_3D <34> VDD HPD2 HDMI_IN_HPD <34,38> B
R916 1 3D@ 2 0_0402_5% HDMI_IN_CK-_3D 0.1U_0402_16V4Z 10U_0603_6.3V6M 41 46 0_0402_5%
<38> HDMI_IN_CK- HDMI_IN_CK-_3D <34> VDD HPD1
57 45 HPD_SINK 1 R901 2 @
HEATGND HPD_SINK HDMI_IN_HPD_SC <35,38>
0_0402_5%
52 44 R964 1 2 @ +V_3.3V_R
NC EQ_S0 4.7K_0402_5%
10/22 Add(EMI Request) 53
NC
55 43 HDMI_SC_D0- <35>
+V_5V NC D1-
56 42 HDMI_SC_D0+ <35>
NC D1+
1 40 HDMI_SC_D1- <35>
820P_0402_25V7 NC D2-
2 39 HDMI_SC_D1+ <35>
NC D2+
1 1 4 38 HDMI_SC_D2- <35>
NC D3-
1
5 37 HDMI_SC_D2+ <35>
C779 C791 C792 C780 NC D3+
35 HDMI_SC_CK- <35>
VGA@ VGA@ VGA@ VGA@ HDMI_IN_D0-_2D CLK-
6 34 HDMI_SC_CK+ <35>
2
<EMI> <EMI> 2 <EMI> 2 <EMI> HDMI_IN_D0+_2D D1-2 CLK+

7
820P_0402_25V7 330P_0402_50V7K HDMI_IN_D1-_2D D1+2
9 33
330P_0402_50V7K HDMI_IN_D1+_2D D2-2 S_HS2 HDMI_SW_EC
10 32
HDMI_IN_D2-_2D D2+2 H_HS1
11
HDMI_IN_D2+_2D D3-2
12
HDMI_IN_CK-_2D D3+2
14 31 HDMI_SC_SDA <34,35>
HDMI_IN_CK+_2D CLK-2 SDA_SINK
15 30 HDMI_SC_SCL <34,35>
CLK+2 SCL_SINK
HDMI_TX0- 16 29
D1-1 SDA2 HDMI_IN_SDATA <34,38>
HDMI_TX0+ 17 28
D1+1 SCL2 HDMI_IN_SCLK <34,38>
HDMI_TX1- 19
HDMI_TX1+ D2-1 R794 1 VGA@ 2 0_0402_5%
20 27 VGA_HDMI_EDATA_R <21,34>
HDMI_TX2- D2+1 SDA1 R800 1 VGA@ 2 0_0402_5%
21 26 VGA_HDMI_ECLK_R <21,34>
HDMI_TX2+ D3-1 SCL1
22
HDMI_CLK- D3+1
24
HDMI_CLK+ CLK-1 R793 1 UMA@ 2 0_0402_5%
25 PCH_HDMI_DATA <15>
CLK+1 R799 1 UMA@ 2 0_0402_5% PCH_HDMI_CLK <15>
A 2D@ PI3HDMI221-AZFEX_TQFN56_11X5 A
10/7 Change U18 symbol

HDMI Switch
Custom
5 4 3 2 1
5 4 3 2 1
0810 Vendor suggest to reserve for EDID debug

D +HDMI_EDID_5V D
D40
+V_5V 2
1
3
DAN202UT106_SC70-3
@
2
1
R786 R787
C917
4.7K_0402_5% 4.7K_0402_5% 0.1U_0402_10V6K
@ @ U52 2 @
1
@ 8 1
@ VCC A0
7 WP A1 2
<33,35> HDMI_SC_SCL R788 1 2 100_0402_5% 6 3
R789 1 SCL A2
<33,35> HDMI_SC_SDA 2 100_0402_5% 5 SDA GND 4
@
CAT24C02WI-GT3_SO8
C915 1 1
C916
33P_0402_50V8K
@ 33P_0402_50V8K
2 2 @
C C
1003 IO/B Pin define update

J4
+12V1 1 2 +12V1
1 2
<33> HDMI_3TX0- 3 4 HDMI_3TX0+ <33>
3 4
<33> HDMI_3TX1- 5 6 HDMI_3TX1+ <33>
5 6
<33> HDMI_3TX2- 7 8 HDMI_3TX2+ <33>
7 8
<33> HDMI_3CLK- 9 10 HDMI_3CLK+ <33>
9 10
<33> HDMI_2TX0- 11 12 HDMI_2TX0+ <33>
11 12
<33> HDMI_2TX1- 13 14 HDMI_2TX1+ <33>
13 14
<33> HDMI_2TX2- 15 16 HDMI_2TX2+ <33>
VGA_HDMI_ECLK 15 16 VGA_HDMI_EDATA
17 18
17 18
<22,33> VGA_IFPE_DET 19 20
19 20
<33> HDMI_IN_D2+_3D 21 22 HDMI_IN_D2-_3D <33>
21 22
23 24
25 26
<33> HDMI_IN_CK+_3D 27 28 HDMI_IN_CK-_3D <33>
27 28
<33,38> HDMI_IN_SCLK 29 30 HDMI_IN_SDATA <33,38>
29 30
+V_3.3V 31 32 HDMI_IN_HPD <33,38>
31 32
33 34
<35,47> I2S_WS 33 34 I2S_DATA0 <35,47>
35 36
<35,47> I2S_SCLK 35 36 I2S_DATA1 <35,47>
37 38
<35,47> I2S_MCLK 37 38 I2S_DATA2 <35,47>
<35,38> CVBS_L 39 40
39 40
+V_3.3V 41 42 +V_3.3V
41 42
<35,45> LSADC0 43 44 LSADC1 <35,45>
43 44
<35,45> LSADC2 45 46 LSADC3 <35,45>
B 45 46 B
47 48
<35,36,45> S_BKOFF 47 48 BL_PWM <35,36>
49 50
<15,35,45> UART_TX 49 50 UART_RX <15,35,45>
51 52
<35,38,45> CVBS_SYNC_DET 51 52 HDMI_SYNC_DET <35,45>
<35,45> PANEL_STATE_OFF 53 54 MUTE_CODEC <35,41>
53 54
+V_5V 55 56 +V_5V
55 56
+V_5V 57 58 +V_5V
57 58
59 60
59 60
PLAST_PTFZ60S3B018HR_60P
CONN@
<21,33> VGA_HDMI_ECLK_R R939 1 3D@ 2 0_0402_5% VGA_HDMI_ECLK
R940 1 3D@ 2 0_0402_5% VGA_HDMI_EDATA

<21,33> VGA_HDMI_EDATA_R
A A

3D Scalar
Custom
5 4 3 2 1
5 4 3 2 1
120P_0402_50V8
56P_0402_50V8
+1.3VALW +1.3V_SCA_L +3V_SCA_L +3V_SCA_VB +1.3V_SCA_YPP 2D@ +3V_SCL 1 R457 2
+1.3V_SCA_L +3V TO +1.3VALW 1 1 0_0603_5%
+V_3.3V
C908
C907
L51 L52 Pre-MP Scaler power soft start 1
1 R759 2 0_0603_5% 2D@ R297 1 R545 2 +3VSB
10U_0805_10V6K
2D@ FBMA-L11-160808-221LMT 0603 C411 10K_0402_5% 0_0603_5%
10U_0805_10V6K
FBMA-L11-160808-221LMT 0603 2 2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
2D@ 1 1 1 0.1U_0402_16V4Z 2D@ @
3
2D@ 2
S
C421
1U_0402_6.3V4Z
C423 1 1 1 FBMA-L11-160808-221LMT 0603 2D@
2
G
+3V_SCA_DELAY +3V_SCA_L 1 2D@ 2
C422
C413
2D@ 2 9/29 Add R457/R545
+3V_SCA_PLL +1.3V_SCA_D <45> SCALER_ON#
C412
@ 0.1U_0402_16V4Z C870 2D@ L48 R298 100_0402_1%
1 R760 2 0_0603_5% 2 2 2 2D@ 2D@ Q11
2 2 2 +1.3VALW
0.1U_0402_16V4Z
2D@ SI2305ADS-T1-GE3 1P SOT23-3
56P_0402_50V8
+3V_SCA_D
10U_0805_10V6K
220U_6.3V_M
D
1U_0402_6.3V4Z
1 2D@
1
+3V_SCA_L 2D@ +3V_SCA_VD 2D@ 1 1 1 1 1
+3V_SCA_VD +3V_SCA_L
C906
C873
C417
C871
C905
+
2
+1.3V_SCA_D +3V_SCA
C416
D D
L49
+3V_SCA_VD R301 U22
+1.3V_SCA_YPP 2 @ 2 2 2 2 2
10U_0805_10V6K
FBMA-L11-160808-221LMT 0603 30_0402_1% 1 8
SHDN GND
1U_0402_6.3V4Z
2D@ +3V_SCA_VB 2D@ 2D@ 2 7
1 1 1 1 1 1 IN GND
+3V_SCA_IF
C433
C435 120P_0402_50V8 2D@ 2D@ 2D@ 3 6
1
OUT GND
C434
2D@ C910 C909 2D@ C414 4 5
@ 0.1U_0402_16V4Z 2D@ 56P_0402_50V8 +3V_SCA_TMDS 2D@ SET GND
1
2
2 2 2 2 2 2D@ 4.7U_0603_6.3V6K 2 G9141P11U_SO8
2D@ 120P_0402_50V8 R302 C415 2D@
2D@ 1U_0805_25V7K
100_0402_1% 2D@ 2
1
0809 EMI suggest 10/30 Change U22 to SOP8 package
115
125
128
111
+3V_SCA_L +3V_SCA_TMDS 10/30 Mount R301=30 ohm;R302=100 ohm
18
20
47
52
59
63
64
75
86
87
2
0.1U_0402_16V4Z
L50 U23
+3V_SCA_TMDS +3V_SCA_L +3V_SCA_D
V3.3IO
V3.3BB1
V3.3BB0
V3.3PLL
V3.3APLL
V1.2CORE
V3.3LVDS
V12CORE
V1.2TMDS
V3.3TMDS
V12CORE
V1.2YPPADC
V3.3VDADC
V3.3VDAC
V3.3IFADC
+3V_SCA_PLL
10U_0805_10V6K
1U_0402_6.3V4Z
FBMA-L11-160808-221LMT 0603 FBMA-L11-160808-221LMT 0603

2D@ 1 1 1 L53 L54
C418
C420
C885 2D@ 1 2 0.1U_0402_16V4Z 3 +3V_SCA_PLL 2D@ 2D@ 2D@

BIN1N
120P_0402_50V8
56P_0402_50V8
C419
1U_0402_6.3V4Z
0.1U_0402_16V4Z
C886 2D@ 1 2 0.1U_0402_16V4Z 4 102 2D@ FBMA-L11-160808-221LMT 0603
BIN1P SPDIFO I2S_MCLK <34,47>
1U_0402_6.3V4Z
@ C887 2D@ 1 2 0.1U_0402_16V4Z 5 101 1 1 1 1 1
2 2 2 GIN1N SPDIFI I2S_DATA0 <34,47>
C428
C912
C911
C888 2D@ 1 2 0.1U_0402_16V4Z 6 100 I2S_DATA1
2D@ GIN1P I2C_S_SDA I2S_DATA1 <34,47>
C427
C889 2D@ 1 2 0.1U_0402_16V4Z 7 99 I2S_DATA2 1 1 1 C426
C890 2D@ 1 0.1U_0402_16V4Z RIN1N I2C_S_SCL I2S_DATA2 <34,47> C431 2D@
2 8 RIN1P I2C_M0_SDA 98 POWER_KEY <45>
10U_0805_10V6K 2 2 2 2 2
C430
2D@ +3V_SCA_VD 9 97 C429 2D@
C877 2D@ 4.7U_0603_6.3V6K V3.3YPPADC I2C_M0_SCL S_MUTE# <42> 2D@ 0.1U_0402_16V4Z
1 2 10 AIN_5R IRRX 96 ENVDD <36>
C862 2D@ 1 2 4.7U_0603_6.3V6K 11 95 BL_PWM 2 2 2 2D@
C891 2D@ 0.1U_0402_16V4Z AIN_5L RF_AGC SCA_RESET BL_PWM <34,36> 2D@
1 2 12 BIN0N RESET 94
+3V_SCA_L 2D@
C892 2D@ 1 2 0.1U_0402_16V4Z 13 BIN0P TCON13 93
S_BKOFF <34,36,45> 0809 EMI suggest
330NH_SWI0805F-R33K_10% +3V_SCA_IF C893 2D@ 1 2 0.1U_0402_16V4Z 14 92 10U_0805_10V6K
GIN0N LSADC3 LSADC3 <34,45>
1 2 C894 2D@ 1 2 0.1U_0402_16V4Z 15 91
GIN0P LSADC2 LSADC2 <34,45>
L47 C895 2D@ 1 2 0.1U_0402_16V4Z 16 90
RIN0N LSADC1 LSADC1 <34,45>
10U_0805_10V6K
C 2D@ C896 2D@ 0.1U_0402_16V4Z C

1 1 1 2 17 RIN0P LSADC0 89 LSADC0 <34,45>
1U_0402_6.3V4Z 88 1 2D@ 2 C781 +V_3.3V
C858 C859 UART_RX LSADC_REF 10K_0402_1%
107 DDC0_SDA
1 2
2D@ 2D@ <15,34,45> UART_RX UART_TX R708
2 2 <15,34,45> UART_TX 108
109
DDC0_SCL
85
Close to Scaler 1U_0402_6.3V4Z
<33,34> HDMI_SC_SDA DDC1_SDA TEAN TXE0- <36> +3V_SCA 10K_0402_5%
IF_GND
<33,34> HDMI_SC_SCL 110 DDC1_SCL TEAP 84

TXE0+ <36> SCA_RESET
I2S signal to TAS3208 83 1 R334 2 2D@
TEBN TXE1- <36> 10K_0402_5%
112 82
<34,47> I2S_WS GPIOA5 TEBP TXE1+ <36> SPI_SC_MOSI
113 81 1 R305 2 2D@
<34,47> I2S_SCLK GPIOA6 TECN TXE2- <36>
1
114 80
2D@ CEC TECP TXE2+ <36> +1.3VALW
+3V_SCA_TMDS 1 R318 2 79 R710 10K_0402_5%
27K_0402_5% TECLKN TXEC- <36> 20K_0402_5% SI2305ADS-T1-GE3 1P SOT23-3 SPI_SC_SCK
116 <33> HDMI_SC_CK- 78 1 R306 2 2D@
RXCN TECLKP TXEC+ <36> 2D@
117 <33> HDMI_SC_CK+ 77
RXCP TEDN TXE3- <36>
3
S
+V_3.3V 118 76 10K_0402_5%
<33> HDMI_SC_D0-
2
RX0N TEDP TXE3+ <36> G
BL_PWM
119 <33> HDMI_SC_D0+ RX0P 2 1 R308 2 2D@
1
120 <33> HDMI_SC_D1- 74
10K_0402_5% RX1N TOAN TXO0- <36> 2D@ Q50
121 <33> HDMI_SC_D1+ 73
UART_TX RX1P TOAP TXO0+ <36>
1 R757 R709 2D@
2 122
123
<33>
<33>
HDMI_SC_D2-
HDMI_SC_D2+
RX2N RTD2667/LQFP128 TOBN
72
71
TXO1- <36> 10K_0402_5%
D
1
RX2P TOBP TXO1+ <36>
1
10K_0402_5% 1 2D@ 2 124 70 C
+3V_SCA_DELAY
2
UART_RX REXT TOCN TXO2- <36>
1 R758 2 2D@R707 6.2K_0402_1%
TOCP
69 2 Q51
TXO2+ <36>
2
1 2 4.7U_0603_6.3V6K
126 68 B 2D@
10K_0402_5% C8631 HSYNCVIN TOCLKN TXOC- <36> E MMBT3904_SOT23-3
2 4.7U_0603_6.3V6K
127 67 1 R309
3
HP_PLUG# VSYNCVIN TOCLKP TXOC+ <36>
1 R763 2 C878 2D@ 66 C872 10K_0402_5% @
CVBS_SYNC_DET 39 TODN TXO3- <36> 1U_0402_6.3V4Z
<34,38,45> CVBS_SYNC_DET 65
@ 10K_0402_5% CVBS_L_R VIN10P TODP TXO3+ <36> 2D@ SPI_SC_CS
40
1 1
VIN01P 2
1 R772 2 I2S_DATA2 <34,45> PANEL_STATE_OFF 41
VIN0N VIN11P SPI_SC_CS
42
VIN0N SPI_CS#
106 0804 Vendor suggest delay circuit.
@ 10K_0402_5% 43 105 SPI_SC_SCK
<47> DEMT0 VIN02P SPI_SCK (3ms more) 10K_0402_5%
1 R773 2 I2S_DATA1 <34,41> MUTE_CODEC 44
VIN12P SPI_DI
104 SPI_SC_MISO
1 2 4.7U_0603_6.3V6K 45 103 SPI_SC_MOSI R310
4.7K_0402_5% 2D@ C861 VIN1N SPI_DO HDMI_SYNC_DET 2D@
46 38 HDMI_SYNC_DET <34,45>
2
B VIN03P VIN00P +V_3.3V B
2 R790 1CVBS_SYNC_DET <47> DEMT1 AIN_1R
36 AIN_R
@ 35 +V_3.3V
AIN_1L AIN_L
4.7K_0402_5% <33,38> HDMI_IN_HPD_SC 48
RGBSW0
2 R791 1HDMI_SYNC_DET <41,43,45> HP_PLUG#
HP_PLUG# 49
AIN_2L
1
@ 50 33 C576 1 2 2D@ 4.7U_0603_6.3V6K 0.1U_0402_10V6K
4.7K_0402_5% <33> HDMI_HPD_SW R886 0_0402_5% RGBSW1 HPOUT_L C577 2D@ 4.7U_0603_6.3V6K HP_SCA_LEFT <43>
<22> VGA_ENBKL 1 2 51
AIN_2R HPOUT_R
32 1 2
HP_SCA_RIGHT <43>
1
2 R792 1MUTE_CODEC @ 31 C866 1 2 2D@ 4.7U_0603_6.3V6K R312 1
@ R748 1 2D@ 2 75_0402_5% AIN_3L C867 2D@ 4.7U_0603_6.3V6K 10K_0402_5% 2D@
53 30 1 2
R749 1 2D@ 2 75_0402_5% AVOUT1 AIN_3R 2D@ R313 C424
54 29
2
AVOUT2 AIO_2L 2D@ 10K_0402_5% 2D@
28
+3V_SCA_L AIO_2R 0_0402_5% U24 2
27
2
C864 1 AIO_1L SPI_SC_CS
2 2D@ 1U_0402_6.3V4Z 57 26 1 R314 2 1 8
10K_0402_5% C865 1 IF1N AIO_1R SPI_SC_MISO 1 R315 CS# VCC
2 2D@ 1U_0402_6.3V4Z 58 25 2 2 7 47_0402_5%
IF1P AOUT_L AMP_SCA_LEFT <42> DO(IO1) HOLD#(IO3)
2 R307 1 S_MUTE# 24 0_0402_5% 3 6 R316 1 2D@ 2 SPI_SC_SCK
2D@ AOUT_R C868 2D@ AMP_SCA_RIGHT <42> 2D@ WP#(IO2) CLK SPI_SC_MOSI
23 4 5 R317 1 2
G3.3VDADC
AIN_MONO GND DI(IO0)

G3.3IFADC
G3.3VDAC
XI_SC 61 22 1 2 1U_0402_6.3V4Z 0_0402_5%

G3.3APLL
XIN AOUT_MONO
G3.3BB1
G3.3BB0
G3.3PLL
XO_SC 62 21 1 2 W25X40BVSNIG SOIC 8P 2D@

XOUT VCM_BB
EPAD
2D@
L41 C869 0.1U_0402_16V4Z
CVBS_L 1 2 2D@
Close to Scaler
1UH_CBC2012T1R0M_20% 2D@ 10/29 Change value of C425/C432 from 22pF to 15pF
1
19
34
37
55
56
60
129
2D@ 1 0804 Vendor suggest close to scaler

2D@
C853 C425
FBM-11-160808-601-T_0603
FBM-11-160808-601-T_0603
330P_0402_50V7K L42 2D@ C856 2 1 XO_SC

2
2 2D@ 1 2D@ 2
IF_GND
<38,47> AIN_IO_L 1 2 1 AIN_L
1
NBQ100505T-800Y-N_2P 0_0402_5% R704 15P_0402_50V8J
2
1
NBQ100505T-800Y-N_2P 4.7U_0603_6.3V6K 2D@ @
2D@ L43 C857 R323 Y3
1UH_CBC2012T1R0M_20% L45 2D@ 1 2 1 2 2D@ 1 2D@ 2 1M_0402_5% 27MHZ_12PF_X5H027000IC1H-H
C851 <38,47> AIN_IO_R AIN_R
470P_0402_50V8J
470P_0402_50V8J
L40 L55 L44 L46 1 1 2D@ 0_0402_5% R706 2D@
2
R700
2
1
FBM-11-160808-601-T_0603
CVBS_L 1 2 1 2 1 2 CVBS_L_R 2D@ 2D@ C854 4.7U_0603_6.3V6K C432

<34,38> CVBS_L
2
FBM-11-160808-601-T_0603
A 2D@ C855 XI_SC A

51_0402_5% 2 1
1
2D@ 1 0.047U_0402_25V8K D36 2D@ 2D@ R328 R326

3
2D@ 2 2 10K_0402_5% 10K_0402_5% 15P_0402_50V8J

SM05_SOT23
D35 75_0402_5% C850 @ @ @ 2D@
2
SM05_SOT23 R702 270P_0402_50V7K

1
@ 2D@ 2 2D@
1
C852
2
0_0402_5%
1
1 R701 2 VIN0N# 1 2 VIN0N

2D@ Issued Date 2010/07/20 2011/07/20 Title
0.047U_0402_25V8K
Deciphered Date
2D@
Scalar
0804 Vendor suggest close to scaler AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
5 4 3 2 1
A B C D E
WebCam+Digital Mic R330

1 2
0_0402_5% +3VS 4
D10
@
2 USB20_P5_R
L15 @ JCAM1 VIN IO1
USB20_P5 1 1 USB20_P5_R USB20_N5_R
<14> USB20_P5 2 2 USB20_N5_R
1 1 3 IO2 GND 1
5/18 Change R332 from 100K to 10K ohm R331 1 CAM_PWR
2 2
2 0_0402_5% 3 3
PRTR5V0U2X_SOT143-4
+3VS USB20_N5 1 R965 2 0_0402_5%
135mA <14> USB20_N5
4 4 3 3 4 4 Close to JCAM1
40 mils WCM-2012-900T_0805 0_0402_5% INT_MIC
5
6
5
10/26 Change symbol of JCAM1 from
DMIC_DATA_R 6
1 2 <41> DMIC_DATA 1 R969 2 7 SP02000F000 to SP02000RQ00(7pin to
7
D
3 1 CAM_PWR R333 0_0402_5% 1 R970 2 DMIC_CLK_R 8
<41> DMIC_CLK 8 8pin)
0.1U_0402_16V4Z
0_0402_5% 9
GND1
2
R332 2 @ 1 10/27 Add D49(ESD request) 10
GND2
C443
1 @ Q12 C444 D49 1
G
2
10K_0402_5% AO3413_SOT23-3 @ 2 DMIC_DATA_R ACES_50224-0080N-001
10U_0603_6.3V6M 1 CONN@
R335 1 2 3 DMIC_CLK_R
1
1 @ 2 0_0402_5% +3VS
<12> CAM_OFF
PESD5V0U2BT_SOT23-3
<45> EC_CAM_OFF 1 R942 2 0_0402_5%
2
@ <ESD>
R437
10K_0402_5%
@
R797
1
1 2 1 R810 2 INT_MIC R703 1 2 1K_0402_5%
MIC_INT_VREFO INT_MIC_RIGHT <41>
0_0402_5% 2.2K_0402_5%
D41
1
1 2
R809 R742 1
C453 27K_0402_5% 0_0402_5% 3
0.1U_0402_16V4Z @
@ 2
2
PESD5V0U2BT_SOT23-3
<EMI>
R705 1 2 1K_0402_5% INT_MIC_LEFT <41>
2
LVDS CONN +V_5V
1150mA 2
JLVDS1
LVDS POWER +LCDVDD +5VSB
<35> TXO0+ 2 2 1 1 TXO0- <35> 1
2
<35> TXO1+ 4 4 3 3 TXO1- <35>
6 5 R336 R337 C446
<35> TXO2+ 6 5 TXO2- <35> 4.7U_0805_10V4Z
8 7 220_0402_5% 390K_0402_5%
<35> TXOC- 8 7 2
10 9 2D@ 2D@ 2D@
<35> TXO3- 10 9 TXOC+ <35>
<35> TXE0- 12 11 TXO3+ <35>
6 2
1
12 11
14 13 TXE0+ <35>
14 13
<35> TXE1+ 16
16 15
15 TXE1- <35> 120mil
18 17 Q13A
<35> TXE2- 18 17
3
20 19 DMN66D0LDW-7_SOT363-6 R339
<35> TXEC- 20 19 TXE2+ <35>
22 21 2D@ 2 1 2 2 Q14
<35> TXE3- 22 21 TXEC+ <35>
24 23 1M_0402_5%
24 23 TXE3+ <35>
26 25 11/4 Change PN of Q13 from SB570025280 to 2D@ 1 SI2305CDS-T1-GE3_SOT23-3
1
26 25
3
+LCDVDD 28 27 SB00000DH00 2D@
28 27 C447
30 29 +LCDVDD
1
30 29 @
1 2
3300P_0402_50V7-K 120mil 1150mA
C448 32 31 2 1 5 2D@ +LCDVDD
GND GND <22> VGA_ENVDD
2D@ R419 0_0402_5% Q13B
2
680P_0402_50V7K ACES_87242-3001-09 DMN66D0LDW-7_SOT363-6
4
2 CONN@ 2D@ 1 2D@
<35> ENVDD 2 1 1
+LCDVDD R420 0_0402_5% R341
2D@ C449 C450
2 @ 1 4.7U_0805_10V4Z 0.1U_0402_16V4Z
<45> EC_ENVDD
1
R881 0_0402_5% 47K_0402_5% 2D@ 2 2 2D@
1 1
C451 C452
0.1U_0402_16V4Z 0.1U_0402_16V4Z
3
2D@ 2 2 2D@
INVERTER 3
950mA +12V2 INVPWR_B+

ENVDD: scalar->EC-> inverter L17
INVT_PWM: scalar-> inverter 1
1 2
FBMA-L11-201209-221LMA30T_0805
1
BKOFF#: scalar->EC-> inverter 10/20 C456 C457
680P_0402_50V7K 680P_0402_50V7K
2
2
PVT change from alw to vs for EUP.

Touch Panel @ 0_0402_5% @ 2 R747 JINV1
D11 100mA <22> VGA_BL_PWM 1
INVPWR_B+ 1
USB20_P4_R @ 1
+5VS 4 2 +5VS 1 2 2
VIN IO1 C458 0.1U_0402_16V4Z 0_0402_5% 2
<45> INVT_PWM 1 2 R352 3
USB20_N4_R 3
3 1 4
IO2 GND 4
5
PRTR5V0U2X_SOT143-4 @ 1 0_0402_5% BL_PWM_R 5
2 <34,35> BL_PWM 1 2 R351 6
6
C459 1U_0603_10V6K 7
0_0402_5% S_BKOFF_R 7
<34,35,45> S_BKOFF 1 2 R353 8
8
9
9
1
0_0402_5% 1 @ 2 R598 10
<45> BKOFF# 10
JTOUCH R354 11
4.7K_0402_5% 11
1 1 12
USB20_N4 0_0402_5% USB20_N4_R 1 12
1 2 R345 2
2
<14> USB20_N4 USB20_P4 0_0402_5% USB20_P4_R
1 2 R346 3 C499
2
4 <14> USB20_P4 3 4
4 4 13 GND1
5 2 14
5 680P_0402_50V7K GND2
6 GND
7 ACES_87213-1200G
Shield GND GND CONN@
ACES_87213-0500G_5P
CONN@
LCD CONN. / WebCam
Custom
A B C D E
A B C D E F G H
HDD POWER Conn

+12VS 8/18 Add C918~C921 HDD SATA HDD Conn.
1 1
C920 C918 +12VS JHDD1
0.1U_0402_16V4Z 10U_0805_25V_K
2 2 1
SATA_PTX_DRX_P1 C461 1 SATA_PTX_C_DRX_P1 GND
<12> SATA_PTX_DRX_P1 2 0.01U_0402_16V7K 2
SATA_PTX_DRX_N1 C462 1 SATA_PTX_C_DRX_N1 A+
<12> SATA_PTX_DRX_N1 2 0.01U_0402_16V7K 3
A-
1 JWAF1 1
4
+5VS SATA_DTX_C_PRX_N1 C463 1 SATA_DTX_PRX_N1 GND
1
1 2 0.01U_0402_16V7K 5
B-
2 <12> SATA_DTX_C_PRX_N1 SATA_DTX_C_PRX_P1 C464 1 2 0.01U_0402_16V7K SATA_DTX_PRX_P1 6
+5VS 2 <12> SATA_DTX_C_PRX_P1 B+
3 7 8
3 GND GND
4 9
4 GND
5 7
5 G1 LOTES_ABA-SAT-049-K
1 1 6 8
6 G2 CONN@
C921 C919 ACES_ 50310-00671-001_6P
0.1U_0402_16V4Z 10U_0805_10V4Z CONN@
2 2
10/28 Change footprint of JWAFER1 from LTCX002XR00 to LTCX0033X00
Layout Note:Place C918/C919/C920/C921 close to JWAFER1
ODD POWER Conn

+12VS 10/29 Add C930/C931
+12VS
ODD SATA ODD Conn.
1 1 JWAF2
+5VS 1 JODD1
2 C930 C931 1 2
2 2
0.1U_0402_16V4Z 10U_0805_25V_K 3 1
2 2 3 C470 1 SATA_PTX_C_DRX_P4 GND
4 <12> SATA_PTX_DRX_P4 2 0.01U_0402_16V7K 2
4 C471 1 SATA_PTX_C_DRX_N4 A+
5 5 G1 7 <12> SATA_PTX_DRX_N4 2 0.01U_0402_16V7K 3 A-
6 6 G2 8 4 GND
C469 1 2 0.01U_0402_16V7K SATA_DTX_PRX_N4 5
ACES_ 50310-00671-001_6P <12> SATA_DTX_C_PRX_N4 C472 1 SATA_DTX_PRX_P4 B-
2 0.01U_0402_16V7K 6
+5VS CONN@ <12> SATA_DTX_C_PRX_P4 B+
7 8
GND GND
9
GND
1 1 LOTES_ABA-SAT-049-K
10/28 Add footprint of JWAFER2 to LTCX0033X00 CONN@
C928 C929
0.1U_0402_16V4Z 10U_0805_10V4Z
2 2
10/28 Add C928/C929

Layout Note:Place C928/C929 close to JWAFER2
+3VS
SSD +1.5VS
1U_0402_6.3V4Z
MINI SSD Conn.
JMINI3
+3VS
+1.5VS
3 3
1 2
1U_0402_6.3V4Z 1 2
1 1 1 1 3 4
3 4
5 6
C481 C482 C483 C484 5 6
1 1 1 1 7 8
1000P_0402_50V7K 7 8
9 10
C476 C475 C474 C473 2 2 2 2 9 10
11 12
10U_0805_10V4Z 1000P_0402_50V7K 11 12
13 14
2 2 2 2 0.1U_0402_16V4Z 10U_0805_10V4Z 13 14
15 16
15 16
17 18
0.1U_0402_16V4Z 17 18
19 20
19 20
21 22
SATA_DTX_C_PRX_P0 C744 1 SATA_DTX_PRX_P0_RC 21 22
<12> SATA_DTX_C_PRX_P0 2 0.01U_0402_16V7K 23 24
SATA_DTX_C_PRX_N0 C745 1 SATA_DTX_PRX_N0_RC 23 24
<12> SATA_DTX_C_PRX_N0 2 0.01U_0402_16V7K 25 26
25 26 @ R745
27 28
27 28
29
29 30
30 2 1 0_0402_5% PCH_SMBCLK <13,44>
SATA_PTX_DRX_N0 C746 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N0_RC 31 32 2 1 0_0402_5%
<12> SATA_PTX_DRX_N0 31 32 PCH_SMBDATA <13,44>
SATA_PTX_DRX_P0 C747 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P0_RC 33 34 @ R746
<12> SATA_PTX_DRX_P0 33 34
35 36
+3VS 35 36
37 38
37 38
39 40
39 40
41 42
SATAJSSD1
SSD Conn. 43
45
41
43
42
44
44
46
45 46
47 48
47 48
1 49 50
SATA_PTX_DRX_P2 C478 SATA_PTX_C_DRX_P2 GND 49 50
<12> SATA_PTX_DRX_P2 1 2 0.01U_0402_16V7K 2 <45> SSD_DET# 51 52
SATA_PTX_DRX_N2 C477 SATA_PTX_C_DRX_N2 A+ 51 52
<12> SATA_PTX_DRX_N2 1 2 0.01U_0402_16V7K 3
A-
4 53 54
SATA_DTX_C_PRX_N2 C479 SATA_DTX_PRX_N2 GND GND1 GND2
<12> SATA_DTX_C_PRX_N2 1 2 0.01U_0402_16V7K 5
SATA_DTX_C_PRX_P2 C480 SATA_DTX_PRX_P2 B-
<12> SATA_DTX_C_PRX_P2 1 2 0.01U_0402_16V7K 6
B+
7 8 BELLW_80003-1021
GND GND CONN@
GND 9
4 4
LOTES_ABA-SAT-049-K
CONN@

HDD & ODD & SSD Connector
B
A B C D E F G H
5 4 3 2 1
+V_3.3V +1.5V +3VALW +3VALW +1.5V

0902 IO/B Pin define update
J6
+V_5V
1
+USB_VCCB 1 2
U37 1 2
<40> LAN_MIDI0+ 3 3 4 4 LAN_MIDI0- <40>
1 8 R439 5 6
GND OUT <40> LAN_MIDI1+ 5 6 LAN_MIDI1- <40>
2 7 100K_0402_5% 7 8
IN OUT <40> LAN_MIDI2+ 7 8 LAN_MIDI2- <40>
3 6 <40> LAN_MIDI3+ 9 10 LAN_MIDI3- <40>
2
IN OUT 9 10
1 4 EN# OC# 5 1 2 USB_OC#1 <14> <40> LOM_ACTLED_YEL# 11 11 12 12 LOM_SPD1000LED_ORG# <40>
R440 13 14
<40> LOM_SPD100LED_GRN# 13 14
C648 APL3510BXI-TRG MSOP8 10K_0402_5% +USB_VCCB 15 16
4.7U_0603_6.3V6K 15 16
1 <14> USB20_N2 17 18 USB20_N3 <14>
2 17 18
10/22 Add(EMI Request) <14> USB20_P2 19
19 20
20 USB20_P3 <14>
+USB_VCCB C649 +USB_VCCB 21 22 SYSON <45,49,55>
D 0.1U_0402_16V4Z +5VSB 21 22 D
<17> CLK_USB30 23 24 CLK_USB30# <17>
2 23 24
330U_6.3V_M_R14
1 <14> PCIE_PTX_DRX_P6 25 26
<46,49> SYSON# 25 26 PCIE_DTX_C_PRX_P6 <14>
1 <14> PCIE_PTX_DRX_N6 27 28
27 28 PCIE_DTX_C_PRX_N6 <14>
C644
+ C645 29 30
1 1 <13,22,39,44> PLT_RST# 29 30 PCH_PCIE_WAKE# <13,44>
31 32
470P_0402_50V7K C829 C830 <13> CLKREQ_USB30# 31 32
33 34
2 2 82P_0402_50V8J 82P_0402_50V8J 33 34
11/2 Change PN of C644 from SF000002Y00 to 2 2 <EMI>
35
35 36
36
<EMI> 37 38
SF000001G00 +USB_VCCD 37 38 +USB_VCCD
39 40
39 40
1 R948 2 0_0402_5%
@1 R949 0_0402_5% SMIB <13>
2 EC_SMI# <13,45>
+HDMI_EDID_5V PLAST_PTFZ40S3B018HR_40P-T
CONN@
2
+3V_SCA_L +3VS +3VS +3VS_DGPU +HDMI_5V_OUT
1
R293
1K_0402_1% C408
0.1U_0402_16V4Z
1
2
2
1
R807 R808
2
R712 HDMI_IN_HPD 0_0402_5% 0_0402_5%
G
100K_0402_5% UMA@ VGA@
1
PCH_OUT_DET 1 3 PCH_HDMIOUT_DET PCH_HDMIOUT_DET <15>
2
1
1
C R751 R750
S
1
<33,35> HDMI_IN_HPD_SC 1 R711 2 2 Q52 4.7K_0402_5% 4.7K_0402_5%
B MMBT3904_SOT23-3 R883
1K_0402_1% E Q87
20K_0402_5%
3
2
2
UMA@ 2N7002H_SOT23 <15> PCH_HDMI_CCLK_R R803 1 UMA@ 2 0_0402_5%
UMA@
2
<21> VGA_HDMI_CCLK_R R804 1 VGA@ 2 0_0402_5% 1 6 HDMI_CCLK
C 0804 Vendor suggest. Q84A DMN66D0LDW-7 2N_SOT363-6 C
5
<15> PCH_HDMI_CDATA_R R805 1 UMA@ 2 0_0402_5%
10/22 Add C880/C897~C899(Close to C833~C838)
(Place on Bottom side) R806 1 VGA@ 2 0_0402_5% 4 3 HDMI_CDATA
+V_5V +HDMI_EDID_5V <21> VGA_HDMI_CDATA_R
R839 2 UMA@ 1 0_0402_5% D33 Q84B DMN66D0LDW-7 2N_SOT363-6
<15> PCH_HDMI_CTXC- +5VALW
R840 2 UMA@ 1 0_0402_5% 0.1U_0402_16V4Z 2 10/22 Add(EMI Request)
<15> PCH_HDMI_CTXC+ +5VSB
R843 2 UMA@ 1 0_0402_5% 1
PCH_OUT_DET 1 1 1 1 3
1
R844 2 UMA@ 1 0_0402_5% C880 C897 C898 C899 DAN202UT106_SC70-3 +HDMI_5V_IN +5VALW
<15> PCH_HDMI_CTXD0- 1 1
R845 2 UMA@ 1 0_0402_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z R602 R601
<15> PCH_HDMI_CTXD0+ 2 2 2 2
R846 2 UMA@ 1 0_0402_5% 4.7K_0402_5% 4.7K_0402_5% C831 C832
R847 2 UMA@ 1 0_0402_5% 0.1U_0402_16V4Z 1027 IO/B Pin define update 82P_0402_50V8J 82P_0402_50V8J
<15> PCH_HDMI_CTXD1+ 2 2 <EMI>
R848 2 UMA@ 1 0_0402_5% <EMI>
2
R849 2 UMA@ 1 0_0402_5% J3
<15> PCH_HDMI_CTXD2+
1 2
R828 2 VGA@ 1 0_0402_5% HDMI_CTXC- 1 2
<21> VGA_HDMI_CTXC- 3 4
R829 2 VGA@ 1 0_0402_5% HDMI_CTXC+ <14> USB20_N6 3 4 USB20_N9 <14>
<21> VGA_HDMI_CTXC+ 5 6
<14> USB20_P6 5 6 USB20_P9 <14>
7 8 HDMI_CABLE_DET <45>
7 8
<33> HDMI_IN_D2+ 9 10 HDMI_IN_D1+ <33>
R832 2 VGA@ 1 0_0402_5% HDMI_OUT_DET 9 10
<22> VGA_HDMI_DET <33> HDMI_IN_D2- 11 12 HDMI_IN_D1- <33>
11 12
<33> HDMI_IN_D0+ 13 14 HDMI_IN_CK+ <33>
R833 VGA@ 0_0402_5% HDMI_CTXD0- 13 14
<21> VGA_HDMI_CTXD0- 2 1 <33> HDMI_IN_D0- 15 16 HDMI_IN_CK- <33>
R834 VGA@ 0_0402_5% HDMI_CTXD0+ 15 16
<21> VGA_HDMI_CTXD0+ 2 1 <33,34> HDMI_IN_SCLK 17 18 HDMI_IN_SDATA <33,34>
R835 VGA@ 0_0402_5% HDMI_CTXD1- 17 18
<21> VGA_HDMI_CTXD1- 2 1 19 20 HDMI_IN_HPD <33,34>
R836 VGA@ 0_0402_5% HDMI_CTXD1+ 19 20
<21> VGA_HDMI_CTXD1+ 2 1 21 22
R837 VGA@ 0_0402_5% HDMI_CTXD2- 21 22 HDMI_OUT_DET
<21> VGA_HDMI_CTXD2- 2 1 23
23 24
24
R838 2 VGA@ 1 0_0402_5% HDMI_CTXD2+ HDMI_CTXD2+ 25 26 HDMI_CTXD1+
<21> VGA_HDMI_CTXD2+ HDMI_CTXD2- 25 26 HDMI_CTXD1-
27 28
HDMI_CTXD0+ 27 28 HDMI_CTXC+
29 30
8/13 Add D46/D47SCA00000T00(EMI Suggest) HDMI_CTXD0- 29 30 HDMI_CTXC-
8/13 Change symbol of D7/D8 to SCA00000T00(EMI Suggest) 31
31 32
32
B HDMI_CCLK HDMI_OUT_DET HDMI_CCLK HDMI_CDATA B
33 34
33 34
HDMI IN
HDMI_IN_SCLK
HDMI_IN_SDATA
HDMI_IN_HPD
HDMI_CABLE_DET
HDMI OUT HDMI_CDATA
+HDMI_5V_OUT 35
37
35
37
36
38
36
38
+HDMI_5V_OUT
<45> PS2_CLK 39 40 PS2_DATA <45>

R766 2 0_0402_5% 39 40
<34,35> CVBS_L 1 41 42
41 42
3
R327 2 1 0_0402_5% 43 44 R768 2 1 0_0402_5%

<35,47> AIN_IO_L 43 44 CVBS_SYNC_DET <34,35,45>
3
D45 D44 R329 2 1 0_0402_5% 45 46

<35,47> AIN_IO_R 45 46
D7 D8 <EMI> <EMI> 47 48
<45,48> BT_RESET 47 48
<EMI> <EMI> @ @ 49 50 11/4 Change PN of D37 from
@ @ 49 50
SC1B491D000 to SCS00002000 +HDMI_5V_OUT
10/22 Add(EMI Request)
PESD5V0U2BT_SOT23-3 PLAST_PTFZ50S3B018HR_50P-T
PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3 +V_5V CONN@ R714 1 @ 2 0_0603_5%
PESD5V0U2BT_SOT23-3
1
D37 F3 W=40mils
1
1 2 1 +HDMI_5V 1 2
+5VS
1
10/22 Add(EMI Request) 10/22 Add(EMI Request) 1

C716 C715 RB491D_SC59-3 1.1A_6V_SMD1812P110TF
D46 @ 820P_0402_25V7 330P_0402_50V7K +12V1 Place close to J6 +V_5V C874
2
D12 @ HDMI_CTXC- HDMI_CTXC- VGA@ 2 VGA@ 0.1U_0402_16V4Z

1 10
HDMI_IN_CK- 1 10 HDMI_IN_CK- <EMI> <EMI> 2
1 1
HDMI_CTXC+ 2 9 HDMI_CTXC+
HDMI_IN_CK+ 2 9 HDMI_IN_CK+ C828 C834 +HDMI_EDID_5V
HDMI_CTXD0- 4 7 HDMI_CTXD0- 82P_0402_50V8J 82P_0402_50V8J
HDMI_IN_D0- HDMI_IN_D0- +12V1 <EMI> 2 <EMI> 2
4 7
HDMI_CTXD0+ 5 6 HDMI_CTXD0+
HDMI_IN_D0+ HDMI_IN_D0+ D15
5 6 @ D23 F2
3 1 +V_5V 2 1 1 2 1 2 +HDMI_5V_IN
+V_5V 10/22 Add(EMI Request)
1
3
9/2 Change PN of D12/D22/D46/D47 from 8 C717 C778 RB491D_SOT23 1.1A_6V_SMD1812P110TF
8 820P_0402_25V7 330P_0402_50V7K 330P_0402_50V7K 82P_0402_50V8J RB491D_SOT23
SC300000T00 to SC300000T10
2
RCLAMP0524PATCT UMA@ 2 UMA@

1 1 1 1 11/4 Change PN of D15 from
1
A RCLAMP0524PATCT <EMI> <EMI> C409 A
D47 SCS00003600 to SCS00002000
@ C793 C794 C795 C833
D22 @ HDMI_CTXD1- 1 10 HDMI_CTXD1- 330P_0402_50V7K <EMI> <EMI> 0.1U_0402_16V4Z
2
HDMI_IN_D1- 1 10 HDMI_IN_D1- <EMI> 2 2 2 <EMI> 2
HDMI_CTXD1+ 2 9 HDMI_CTXD1+ 820P_0402_25V7
HDMI_IN_D1+ 2 9 HDMI_IN_D1+
HDMI_CTXD2- HDMI_CTXD2- Place close to J3
4 7
HDMI_IN_D2- 4 7 HDMI_IN_D2-
HDMI_CTXD2+ 5 6 HDMI_CTXD2+ Security Classification Compal Secret Data Compal Electronics, Inc.
HDMI_IN_D2+ 5 6 HDMI_IN_D2+ 2010/07/20 2011/07/20 Title
3
3
IO BD CONN
8 Size Document Number Rev
8 Custom
RCLAMP0524PATCT
RCLAMP0524PATCT Date: Friday, November 05, 2010 Sheet 38 of 62
5 4 3 2 1
5 4 3 2 1
+3VS
U29
C521 2 1 .1U_0402_16V7K PCIE_PTX_C_DRX_P1 1 48 RREF 1 2

<14> PCIE_PTX_DRX_P1 HSIP RREF R372 6.2K_0402_1% C527 8/19 Add
C520 2 1 .1U_0402_16V7K PCIE_PTX_C_DRX_N1 2 47 2 1 +3VS
<14> PCIE_PTX_DRX_N1 HSIN 3V3_IN 0.1U_0402_16V4Z
D CLK_PCIE_READER 3 46 CDCLK_REQ# D
<17> CLK_PCIE_READER REFCLKP CLK_REQ#
CLK_PCIE_READER# CDCLK_REQ# R885
<17> CLK_PCIE_READER# 4 REFCLKN PERST# 45 PLT_RST# <13,22,38,44> 1 2 10K_0402_5%
C526 1 2 AV12 5 44
4.7U_0603_6.3V6K AV12 EEDO
PCIE_DTX_C_PRX_P1 2 1 PCIE_DTX_C_PRX_P1_C 6 43 CARD_HPLUG_R 1 R373 2 CARD_HPLUG
<14> PCIE_DTX_C_PRX_P1 HSOP EECS CARD_HPLUG <16>
C518 0.1U_0402_16V4Z @ 0_0402_5%
PCIE_DTX_C_PRX_N1 2 1 PCIE_DTX_C_PRX_N1_C 7 42
<14> PCIE_DTX_C_PRX_N1 HSON EESK
C519 0.1U_0402_16V4Z
8 41 CARD_HPLUG_R C971 @ 1 2 1000P_0402_50V7K
GND GPIO/EEDI
2 1 DV13 9 40 MS_INS# 8/20 Add
C528 0.1U_0402_16V4Z DV12 MS_INS#
+3VS 10 Card1_3V3 39 SD_CD#
+3VS_CR SD_CD#
11 38 SP15_SDWP_XDD7
3V3_IN SP15
12 37 SP14_MSCLK_XDD6 1 R599 2 0_0402_5%
1 1 Card2_3V3 SP14
10U_0603_6.3V6M 0.1U_0402_16V4Z
C554 C552 XD_CD# 13 36 SP13_MSD7_XDD5 1
XD_CD# SP13
2 2 4.7U_0603_6.3V6K DV33_18 14 35 SP12_MSD3_XDD4 C531
DV33_18 SP12
5P_0402_50V
15 34 SP11_MSD6_XDD3 2
1 1 GND SP11
8/18 Change C531 to 5pF(Vendor suggest)
C956 C556 SP1_SDD7_XDRDY 16 33 SP10_MSD2_XDD2
@ SP1 SP10
2 2 SP2_SDD6_XDRE# 17 32 SP9_MSD0_XDD1
SP2 SP9
C 8/18 Add C956(Vendor suggest) C
0.1U_0402_16V4Z SP3_SDD5_XDCE# 18 31 SP8_MSD4_XDD0
SP3 SP8
SP4_SDD4_XDWE# 19 30 SP7_MSD1_XDWP#
SP4 SP7
SD_D1_R 1 R366 2 0_0402_5% SD_D1 20 29 SP6_MSD5_XDALE C557
SD_D1 SP6
1 2 4.7U_0603_6.3V6K
SD_D0_R 1 R367 2 0_0402_5% SD_D0 21 28 SP5_MSBS_XDCLE
C532 SD_D0 SP5 C533
2 1 SD_CLK_R 1 R368 2 0_0402_5% SD_CLK 22 27 DV12_S 1 2 0.1U_0402_16V4Z
SD_CLK DV12_S
5P_0402_50V SD_CMD_R 1 R370 2 0_0402_5% SD_CMD 23 26
SD_CMD GND
SD_D3_R 1 R371 2 0_0402_5% SD_D3 24 25 SD_D2 1 R600 2 0_0402_5% SD_D2_R
SD_D3 SD_D2
8/18 Change C532 to 5pF(Vendor suggest)
RTS5209-GR_LQFP48_7X7
< 7 in 1 Card Reader > 8/15 Update JREAD1 Pin define +3VS_CR
B +3VS_CR JREAD1 B
+3VS_CR 21
SD_VDD SP15_SDWP_XDD7
38 XD_VCC SD_W /P 41
15 SD_CMD_R
SP15_SDWP_XDD7 SD_CMD SD_CD#
37 XD_D7 SD_C/D 39
0.1U_0402_16V4Z 0.1U_0402_16V4Z SP14_MSCLK_XDD6 36 25 SD_CLK_R 1 R801 2 33_0402_5%
SP13_MSD7_XDD5 XD_D6 SD_CLK SD_D0_R @
35 XD_D5 SD_DAT0 31 1
SP12_MSD3_XDD4 33 34 SD_D1_R
SP11_MSD6_XDD3 XD_D4 SD_DAT1 SD_D2_R @ C796
1 1 1 1 32 XD_D3 SD_DAT2 9
2
SP10_MSD2_XDD2 30 11 SD_D3_R 22P_0402_50V8J

R369 C534 C529 C535 C530 SP9_MSD0_XDD1 XD_D2 SD_CD/DAT3 2
27 XD_D1 SD_GND 40
@ 0.1U_0402_16V4Z SP8_MSD4_XDD0 23 19
10K_0402_5% 2 2 2 2 XD_D0 SD_VSS +3VS_CR
SD_VSS 29
SP7_MSD1_XDWP# 13
1
SP4_SDD4_XDWE# XD_-W P
8 XD_-W E
SP6_MSD5_XDALE 7 12 R798
10U_0603_6.3V6M SP5_MSBS_XDCLE XD_ALE MS_VCC SP14_MSCLK_XDD6 @
6 XD_CLE MSCLK 14 1 2 33_0402_5%
SP3_SDD5_XDCE# 5 22 SP9_MSD0_XDD1 1
SP2_SDD6_XDRE# XD_-CE MS_SDIO/DATA0 SP7_MSD1_XDWP#
4 XD_-RE MS_DATA1 24
SP1_SDD7_XDRDY 3 20 SP10_MSD2_XDD2 C783
XD_CD# XD_R/-B MS_DATA2 SP12_MSD3_XDD4 @
Place C534 close to socket pin 38 2 XD_CARD DECTECT MS_DATA3 16
2
22P_0402_50V8J
26 SP5_MSBS_XDCLE
MS_BS MS_INS#
Place C529 close to socket pin 21 1 XD_GND MS_INS/EXT DET 18
17 XD_GND MS_VSS 28
Place C535 close to socket pin 21 MS_VSS 10
Place C530 close to socket pin 12 42 GND GND 43

A A
Proconn-MXP038-A0-2042_43P
CONN@

PCIE-Card Reader-RTS5209
5 4 3 2 1
5 4 3 2 1
1 R590 2 +1.05V_LAN
+3VSB 1 R889 2 0_0603_5%
0_0603_5% 60mil
Q86 +3.3V_LAN
0.1U_0402_16V4Z
D
+V_3.3V 1 R888 2 3 1
0_0603_5%
@ @ AO3413_SOT23-3
0.1U_0402_16V4Z
G
1 1 1 1 1 1 1 1
2
2
R826 2
C922
C536 C537 C538 C539 C540 C541 C542 C543
D 10K_0402_5% 22U_0805_6.3V6M 0.1U_0402_16V4Z 22U_0805_6.3V6M D
@ @ 2
4.7U_0603_6.3V6K 2 2 2 2 2 2 2
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z +1.05V_LAN +1.05VS_PCH
Place C538 close to pin5 L19
0812 Reserve GLAN_PCIE_WAKE# @ 1 R377
1
R827 @ D REGCTL_PNP10 @
1 2 1 2
1 2 2 Q47 C555 4.7UH_TLPC3010C-4R7M_0.65A_20%
<45> GLAN_PCIE_WAKE#
0_0402_5% G @ 1 1 0_0805_5%
S 2 0.1U_0402_16V4Z Idc max=330mA
3
1 R902 2 @ C544 C545
<13> SLP_LAN#
0_0402_5% SSM3K7002FU_SC70-3 10U_0805_10V4Z 0.1U_0402_16V4Z
2 2
10/26 Add Q47/C555
1000P_0402_50V7K 2 1 @ C998 SLP_LAN#
+3.3V_LAN
2
+3.3V_LAN
R378
10K_0402_5%
@ 10/27 Add
C @ TP_LAN_JTAG_TMS C
2 1
1
R591 10K_0402_5% U30
2 @ 1 TP_LAN_JTAG_TCK 0_0402_5%
R592 10K_0402_5% <13> LAN_CLKREQ# R379 2 1 LAN_CLKREQ#_R 48 13 LAN_MIDI0+_R R393 2 1 0_0402_5% LAN_MIDI0+
CLK_REQ_N MDI_PLUS0 LAN_MIDI0-_R LAN_MIDI0- LAN_MIDI0+ <38>
R893 2 1 0_0402_5% 36 14 R401 2 1 0_0402_5%
<5,13,45> PCH_PLT_RST# PE_RST_N MDI_MINUS0 LAN_MIDI0- <38>
CLK_PCIE_LAN 44 17 LAN_MIDI1+_R R402 2 1 0_0402_5% LAN_MIDI1+
<17> CLK_PCIE_LAN PE_CLKP MDI_PLUS1 LAN_MIDI1+ <38>
CLK_PCIE_LAN# 45 18 LAN_MIDI1-_R R404 2 1 0_0402_5% LAN_MIDI1-
<17> CLK_PCIE_LAN# LAN_MIDI1- <38>
PCIE
PE_CLKN MDI_MINUS1
MDI
C546 1 2 .1U_0402_16V7K PCIE_DTX_PRX_P2 38 20 LAN_MIDI2+_R R406 2 1 0_0402_5% LAN_MIDI2+
<14> PCIE_DTX_C_PRX_P2 PCIE_DTX_PRX_N2 PETp MDI_PLUS2 LAN_MIDI2-_R LAN_MIDI2- LAN_MIDI2+ <38>
C547 1 2 .1U_0402_16V7K 39 21 R414 2 1 0_0402_5%
<14> PCIE_DTX_C_PRX_N2 PETn MDI_MINUS2 LAN_MIDI2- <38>
C151 1 2 .1U_0402_16V7K PCIE_PTX_C_DRX_P2 41 23 LAN_MIDI3+_R R415 2 1 0_0402_5% LAN_MIDI3+
<14> PCIE_PTX_DRX_P2 PERp MDI_PLUS3 LAN_MIDI3+ <38>
C150 1 2 .1U_0402_16V7K PCIE_PTX_C_DRX_N2 42 24 LAN_MIDI3-_R R416 2 1 0_0402_5% LAN_MIDI3-
<14> PCIE_PTX_DRX_N2 PERn MDI_MINUS3 LAN_MIDI3- <38>
0_0402_5% 2 1 R380 LAN_SMBCLK_R 28 6

<13> LAN_SMBCLK
SMBUS
0_0402_5% LAN_SMBDATA_R SMB_CLK RSVD_NC
<13> LAN_SMBDATA 2 1 R381 31
+3.3V_LAN SMB_DATA +RSVD_VCC3P3_1
RSVD_VCC3P3_1
1 1 R382 2 4.7K_0402_1% +3.3V_LAN
For Power saving mode, Speed down to 10Mb/s 2 +RSVD_VCC3P3_2 1 R383 2 4.7K_0402_1% +1.0V_LAN POWER OPTIONS
RSVD_VCC3P3_2
5
VDD3P3_IN
2
3
LAN_DISABLE_N
Shared with PCH
R384 4 +3.3V_LAN_OUT 1.05V SVR * Internal SRV
VDD3P3_OUT
10K_0402_5%
15 1
0_0402_5% LOM_ACTLED_YEL# VDD3P3_15 STUFF: R377 STUFF: L19
<38> LOM_ACTLED_YEL# 26 19
1
LOM_SPD1000LED_ORG# LED0 VDD3P3_19 C548

<13> PM_LANPHY_ENABLE 2 1 <38> LOM_SPD1000LED_ORG# 27
LED1 VDD3P3_29
29 NO STUFF: L19 NO STUFF: R377
LED
LOM_SPD100LED_GRN# 25 +1.05V_LAN 1U_0603_10V6K
<38> LOM_SPD100LED_GRN# LED2
2
R385 2
R386 47
VDD1P0_47
10K_0402_5% 46
@ T52 PAD~D TP_LAN_JTAG_TDI VDD1P0_46
32 37
B T53 PAD~D TP_LAN_JTAG_TDO JTAG_TDI VDD1P0_37 B
34
1
JTAG_TDO
JTAG
TP_LAN_JTAG_TMS 33 43
0_0402_5% TP_LAN_JTAG_TCK JTAG_TMS VDD1P0_43
35
@ JTAG_TCK
<45> LAN_DISABLE#_R 2 1 11
0_0402_5% R387 VDD1P0_11
R392 2 1 XTALO 9 40
XTALI XTAL_OUT VDD1P0_40
10 22
25MHZ_20PF_7A25000012 XTAL_IN VDD1P0_22
16
VDD1P0_16
Y5 8
LAN_TEST_EN VDD1P0_8
1 2 30
TEST_EN
RES_BIAS 12 7 REGCTL_PNP10
RBIAS CTRL_1P0
33P_0402_50V8J
33P_0402_50V8J
1 1
C549
C550
49
VSS_EPAD
2
R388 R389 82579_QFN48_6X6~D

2 2 3.01K_0402_1%
1K_0402_5%
1
8/20 Add
1000P_0402_50V7K 2 1 @ C976 LAN_SMBCLK_R
1000P_0402_50V7K 2 1 @ C977 LAN_SMBDATA_R
A A

Intel LAN-82579
Custom 0.3
5 4 3 2 1
A B C D E F G H
1 2 MONO_IN_1 1 2 MONO_IN
<45> BEEP# R397 47K_0402_5% C565 0.1U_0402_16V4Z
1 2 +5VAMP
<13> PCH_SPKR R398 47K_0402_5% U31
1 +5VS L20 1 2 0.1U_0402_16V4Z 60mil 1 40mil
IN
1
0_0805_5%
OUT 5 +VDDA 4.75V
R399 C566 1 1 2
L21 C567 C568 GND @
0.1U_0402_16V4Z 1 2
10K_0402_5% 2 0_0805_5% 3 4 1 2
1 0.1U_0402_16V4Z SHDN BYP C569 1
2
2 2
7/27 Follow NCQFO 11/4 Change symbol value of L21/L21 from SM010014520 to SD002000080 G9191-475T1U_SOT23-5 0.01U_0402_25V7K
(output = 300 mA)
40mil 1026 DEL MIC_R_VREFO

+AVDD_HDA
MIC_INT_VREFO
L22
10mil
MIC_L_VREFO
+VDDA 1 2
1 1
FBMA-L11-160808-800LMT_0603 2.2U_0603_16V6K
C572 C573 VREF 1 1
10U_0805_10V4Z 0.1U_0402_16V4Z C571
2 2 C570 0.1U_0402_16V4Z
(Place next to PIN25)
+AVDD_HDA 2 2
+3VS_VDD
1026 Add 595
1 1 1
C574 C575 C595
10U_0805_10V4Z 0.1U_0402_16V4Z 2.2U_0603_16V6K
2 2 2
(Place next to PIN38)
25
27
28
19
31
38
1
9
U32
2 2
DVDD-IO
MIC2-VREFO
DVDD1
AVDD1
MIC1-VREFO-L
AVDD2
VREF
CPVEE
SPDIFO2 45
<43> HP_LEFT 33 HPOUT-L
LINE1-R 24 0810 vendor suggest
<43> HP_RIGHT 32 HPOUT-R
23
LINE1-L
1026 Add digital-MIC for reserve 37
MONO-OUT
22 MIC_C_R 2 1 MIC_R_R R776 1 2 1K_0402_5%
MIC1-R 4.7U_0603_6.3V6K C579 MIC_CEN_R <43>
<36> DMIC_CLK 46
+3VS_VDD DMIC-CLK1/2 MIC_C_L MIC_R_L R777 1
21 2 1 2 1K_0402_5%
MIC1-L 4.7U_0603_6.3V6K C581 MIC_LFE_L <43>
<36> DMIC_DATA 2
GPIO0/DMIC-DATA1/2
L23 1026 Change mute_codec to GPIO1 MUTE_CODEC INT_MIC_RIGHT_C 1 2 C454
2 1
15mil <34,35> MUTE_CODEC 3
GPIO1 MIC2-R
17
1U_0402_6.3V4Z INT_MIC_RIGHT <36>
+3VS
MBK1608121YZF_0603 16 INT_MIC_LEFT_C 1 2 C455
HDA_SDOUT_AUDIO MIC2-L 1U_0402_6.3V4Z INT_MIC_LEFT <36>
1 1 5
<13> HDA_SDOUT_AUDIO SDATA-OUT
15
C578 C580 LINE2-R
6
10U_0805_10V4Z 0.1U_0402_16V4Z <13> HDA_BITCLK_AUDIO BIT-CLK
14
2 2 LINE2-L
1 <13> HDA_SDIN0 1 R413 2 HDA_SDIN0_R 8
SDATA-IN
(Place next to PIN1) 33_0402_5%
C586 10 20K_0402_1%
22P_0402_50V8J <13> HDA_SYNC_AUDIO SYNC
13 1 2 R405
2 Sense A MIC_PLUG# <43>
<13> HDA_RST#_AUDIO 11 34 1 2 R400
RESET# Sense B 5.1K_0402_1% HP_PLUG# <35,43,45>
MONO_IN 12
PCBEEP
1 1 35 R778 1 2 0_0402_5%
FRONT-OUT-L AMP_FRONT_LEFT <42>
18
3 C582 C583 LINE1-VREFO R779 1 0_0402_5% 3
36 2 AMP_FRONT_RIGHT <42>
10U_0805_10V4Z 0.1U_0402_16V4Z FRONT-OUT-R
20
@ 2 2 LINE2-VREFO R780 1 0_0402_5%
(Place next to PIN9) SURR-OUT-L
39 2 AMP_SUR_LEFT <42>
2 R403 1 JDREF 40 41 R781 1 2 0_0402_5%
JDREF SURR-OUT-R AMP_SUR_RIGHT <42>
20K_0402_1%
<45> EAPD_CODEC 47 43 R782 1 2 0_0402_5%
EAPD CEN AMP_CENTER <42>
48 44
C597 SPDIFO1 LFE
1 2 29
CBP
DVSS1
DVSS2
AVSS2
AVSS1
C584 1 2.2U_0603_16V6K 30 <EMI> C616 1 2 0.1U_0402_16V4Z
@ CBN
ESD 1026 Add C597 <EMI> C615 1 2 0.1U_0402_16V4Z
10P_0402_50V8J ALC663-GR_LQFP48_7X7
42
26
2 <EMI> C460 1 2 1U_0402_6.3V4Z
1026 Change U32 from SA00004BR00 to SA00003G300
<EMI> C508 1 2 1U_0402_6.3V4Z
+3VS
<EMI> C553 1 2 1U_0402_6.3V4Z
10/23 Add C460/C508/C553(EMI suggest)
R407 1 2 0_0805_5%
1
R408 1 2 0_0805_5%
R756
4.7K_0402_5% R409 1 2 0_0805_5%
@ 8/13 Add R756(EMI Suggest)
R410 1 2 0_0805_5%
2
R411 1 2 0_0805_5%
HDA_RST#_AUDIO
4 R412 1 4
2 0_0805_5%
Sense Pin Impedance Codec Signals 1
C585
SENSE A 0.01U_0402_16V7K
2 GND GNDA
20K PORT1 (PIN 21, 22) @
Place close to Codec

SENSE B 5.1K PORT-2 (PIN 32, 33) HD Audio Codec ALC663
B PLA00 M/B LA-6951P Schematic 0.3
A B C D E F G H
A B C D E
U40 @
1 9/29 Add U40/C637 9/29 Add Q60/R548/R549 +V_3.3V
IN
OUT 5
2 GND
+V_5V @ +PVDD
4.7K_0402_5%
3 SHDN BYP 4 1 2
4.7K_0402_5%
C637
+V_3.3V
R549
G9191-475T1U_SOT23-5 0.01U_0402_25V7K
R548
L60 1 2 10U_0805_10V4Z 0.1U_0402_16V4Z
FBMA-L11-201209-221LMA30T_0805 1 1 1 1
2
2
L61 1 2 C587 C588 C589 C590
FBMA-L11-201209-221LMA30T_0805 1
6 1 VOL_SCL_1_AMP
2 2 2 2 <45> VOL_SCL_1
C712
5
1 10U_0805_10V4Z 0.1U_0402_16V4Z Q60A 1
1U_0402_6.3V4Z
0_0402_5% 2 DMN66D0LDW-7_SOT363-6
@ 1 R418 2 3 4 VOL_SDA_1_AMP +PVDD
<45> EC_MUTE# <45> VOL_SDA_1
Q60B 10U_0805_10V4Z 0.1U_0402_16V4Z +V_3.3V
@ 1 R417 0_0402_5% MUTE_AMP DMN66D0LDW-7_SOT363-6
16
<35> S_MUTE# 2 U43
1
1 1 1 1
C591 C592 C593 C594
PVDD2
PVDD1
AVDD
I2CVDD
<47> PCM_FRONT_RIGHT 1 2 11/4 Change PN of Q60 from SB00000AR00 to SB00000DH00
C696 1U_0402_6.3V4Z 1
3D@ 2 2 2 2
1 2 10U_0805_10V4Z 0.1U_0402_16V4Z C714
<43,47> AV_FRONT_RIGHT SPK_FRONT_R+
C1015 1U_0402_6.3V4Z 7 1U_0402_6.3V4Z
@ OUT-RP 2
9 MUTEb
1 2 1 R953 2 300_0402_5% 6 SPK_FRONT_R-
<35> AMP_SCA_RIGHT OUT-RN
C596 1U_0402_6.3V4Z
1 2 1 2 12
16
<41> AMP_FRONT_RIGHT INPUT-R U45
1
C598 4.7U_0603_6.3V6K C1022 1U_0402_6.3V4Z 2 SPK_FRONT_L+
OUT-LP
PVDD2
PVDD1
AVDD
I2CVDD
AMP_POWER_DOWN# 10 3 SPK_FRONT_L- 3D@
<45> AMP_POWER_DOWN# SDb OUT-LN
<43,47> AV_FRONT_RIGHT 1 2
C1019 1U_0402_6.3V4Z MUTE_AMP
<41> AMP_FRONT_LEFT 1 2 1 2 13
C600 4.7U_0603_6.3V6K C1023 1U_0402_6.3V4Z INPUT-L VOL_SCL_AMP SPK_SUR_R+
VOL_SCL 14 <47> PCM_SUR_RIGHT 1 2 OUT-RP 7
@1 2 C698 1U_0402_6.3V4Z 9
<35> AMP_SCA_LEFT R958 2 MUTEb
C602 1U_0402_6.3V4Z +PVDD 1 11 15 VOL_SDA_AMP 1 R955 2 300_0402_5% 6 SPK_SUR_R-
5.1K_0402_5% BYPASS SE_BTLb/SDA OUT-RN
<47> PCM_FRONT_LEFT 1 2
C697 1U_0402_6.3V4Z 1 2 1 2 12
<41> AMP_SUR_RIGHT INPUT-R
AGND
EPAD
1 2 C599 4.7U_0603_6.3V6K C1024 1U_0402_6.3V4Z 2 SPK_SUR_L+
<43,47> AV_FRONT_LEFT OUT-LP
C1016 1U_0402_6.3V4Z 1
1
3D@ R959 AMP_POWER_DOWN# 10 3 SPK_SUR_L-

R954 C605 ALC106-GR_ESOP16 SDb OUT-LN
5.1K_0402_5%
17
2 300_0402_5% 2.2U_0805_25V6K 2
2
2 1 2 1 2 13
<41> AMP_SUR_LEFT INPUT-L
C601 4.7U_0603_6.3V6K C1025 1U_0402_6.3V4Z 14 VOL_SCL_1_AMP
2
VOL_SCL
R950 <47> PCM_SUR_LEFT 1 2
8/25 Modify to AGND 1 2 C699 1U_0402_6.3V4Z 1 R960 2 11 15 VOL_SDA_1_AMP
+PVDD BYPASS SE_BTLb/SDA
0_0402_5% 5.1K_0402_5%
5.1K_0402_5%
<43,47> AV_FRONT_LEFT 1 2 1
AGND
EPAD
C1020 1U_0402_6.3V4Z
3D@ C606
R961
1
9/29 Add Q59/R546/R547 +V_3.3V 8/25 Modify to AGND 2.2U_0805_25V6K
R956 2 ALC106-GR_ESOP16
17
+PVDD +V_3.3V 300_0402_5%
4.7K_0402_5%
10U_0805_10V4Z 0.1U_0402_16V4Z
2
1
4.7K_0402_5%
R951
11/4 Change PN of Q59 from 1 1 1 1 1 2
R546
R547
SB00000AR00 to SB00000DH00 C607 C608 C609 C610 0_0402_5%

1
2
2
2
2 2 2 2 C713 ACES_87212-04G0
10U_0805_10V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z JSPK20
VOL_SCL_AMP 2 SPK_FRONT_L+
<45> VOL_SCL 6 1 1
1
SPK_FRONT_L- 2
2
5
Q59A SPK_FRONT_R+ 3
DMN66D0LDW-7_SOT363-6 SPK_FRONT_R- 3
4
VOL_SDA_AMP 4
3 4 5
16
<45> VOL_SDA U44 GND
1
6
Q59B GND
PVDD2
PVDD1
AVDD
I2CVDD
DMN66D0LDW-7_SOT363-6 CONN@
SPK_SUR_L+ 1
SPK_SUR_L- 1
<47> PCM_CENTER 1 2 2
2
C700 1U_0402_6.3V4Z SPK_SUR_R+ 3
3 3D@ SPK_CEN+ SPK_SUR_R- 3 3
7 4
MUTE_AMP OUT-RP SPK_CEN- 4
<43,47> AV_FRONT_RIGHT 1 2 9 5 7
C1021 1U_0402_6.3V4Z MUTEb SPK_CEN- SPK_CEN+ 5 G1
6 6 8
OUT-RN 6 G2
1 2 1 2 12 ACES_87212-06G0
<41> AMP_CENTER INPUT-R
C612 4.7U_0603_6.3V6K C1026 1U_0402_6.3V4Z 2 1 1 1 1 1 1 1 1 1 1 JSPK50
OUT-LP C618 C619 C620 C621 C622 C623 C624 C625 C626 C627 CONN@
1
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
AMP_POWER_DOWN# 10 3
SDb OUT-LN
1000P_0402_50V7K
R957
300_0402_5% 2 2 2 2 2 2 2 2 2 2
13
INPUT-L EC_SMB_CK2
14 EC_SMB_CK2 <13,21,45>
2
VOL_SCL
1 R962 2 11 15 EC_SMB_DA2
+PVDD BYPASS SE_BTLb/SDA EC_SMB_DA2 <13,21,45>
5.1K_0402_5%
1
5.1K_0402_5%
1
AGND
EPAD
C617
R963
2.2U_0805_25V6K
2 ALC106-GR_ESOP16
2
17
SPK_FRONT_R+
SPK_FRONT_L+
SPK_FRONT_R-
SPK_FRONT_L-
SPK_SUR_R+
SPK_SUR_L+
SPK_SUR_R-
SPK_SUR_L-
SPK_CEN+
8/25 Modify to AGND

SPK_CEN-
R952
1 2
0_0402_5%
8/25 Modify to AGND

3
4 4
D16 D17 D18 D19 D20
<EMI> <EMI> <EMI> <EMI> <EMI>
@ @ @ @ @

1
PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3 Issued Date 2010/07/20 2011/07/20 Title

Deciphered Date
AMP
PESD5V0U2BT_SOT23-3 Size Document Number Rev
Custom
8/13 Change symbol of D16~D20 to SCA00000T00(EMI Suggest) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A B C D E
5 4 3 2 1
MIC_L_VREFO 1026 Add Diode for MIC_L_VREFO

D24
2 1
CH751H-40PT_SOD323-2
D25
2 1
CH751H-40PT_SOD323-2
EXT MIC IN
1
D R593 R596 D
4.7K_0402_5% 4.7K_0402_5%
JMIC1 CONN@ 8/13 Change symbol of D30 to SCA00000T00(EMI Suggest)
5
2
MIC_PLUG# 4 MIC_CEN_R_1
<41> MIC_PLUG#
1 2 MIC_CEN_R_1 3 MIC_LFE_L_1
<41> MIC_CEN_R
L30 FBM-11-160808-601-T_0603 6
1 2 MIC_LFE_L_1 2
<41> MIC_LFE_L
2
L34 FBM-11-160808-601-T_0603 1
D30
7 PESD5V0U2BT_SOT23-3
Need <EMI>
8
600 Ohm
500 mA SINGATRON 2SJ-B351-S39
1 1
1
1 1
C710 C711
330P_0402_50V7K 330P_0402_50V7K C708 C647
2 2 .1U_0402_16V7K .1U_0402_16V7K
2 ESD request 2 ESD request
D29 D28 Add for EMC suggest

MIC_PLUG# 2 2
1 1
C HP_PLUG# C
3 3
PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
<EMI> <EMI>
8/13 Change symbol of D29 to SCA00000T00(EMI Suggest) 8/13 Change symbol of D28 to SCA00000T00(EMI Suggest)
2 1
<35> HP_SCA_RIGHT R824 0_0402_5% HP OUT JHP1 CONN@ 8/13 Change symbol of D21 to SCA00000T00(EMI Suggest)
2 1 5
<35> HP_SCA_LEFT R825 0_0402_5%
HP_PLUG# 4
<35,41,45> HP_PLUG#
PR
PL
<41> HP_RIGHT 1 2INTSPK_CR+ 1 2 PR 3
R595 75_0603_1% L33 FBM-11-160808-601-T_0603 6
<41> HP_LEFT 1 2 INTSPK_CL+ 1 2 PL 2
R438 75_0603_1% L32 FBM-11-160808-601-T_0603 1
2
2
Need 7
@ R594 @ R597 1 1 D21
600 Ohm 8 <EMI>
20K_0402_5% 20K_0402_5% 500 mA C646 C709 @
330P_0402_50V7K SINGATRON 2SJ-B351-S39
1
330P_0402_50V7K 2 2
1 ESD request
C707
1
.1U_0402_16V7K PESD5V0U2BT_SOT23-3
2
10/22 Change U56 from SA00001ZW00 to SA00004IS00

B B
+PVDD
0.1U_0402_16V4Z
1 1 1
3D@
10U_0805_10V6K C1005 C806 C1002
@ 3D@ 10U_0805_10V6K
2 2 2
16
U56
PVDD
VDD
C1037
1 2 3D@ 1 7 INTSPK_CL+
CP+ LOUT
2.2U_0603_16V6K
3 9 INTSPK_CR+ +PVDD
CP- ROUT
C1003 1U_0603_10V6K
1 2 10 11 R971 1 2 100K_0402_5%
<42,47> AV_FRONT_LEFT LIN /RSD
3D@ APA2176A @
C1004 1U_0603_10V6K
<42,47> AV_FRONT_RIGHT 1 2 12
RIN NC
4
3D@
13 15 HP_AMP_DOWN#
NC /LSD HP_AMP_DOWN# <45>
PGND
CVSS
GND
VSS
3D@
2
14
A A
1
C1038
2.2U_0603_16V6K Security Classification Compal Secret Data Compal Electronics, Inc.
2 3D@ Issued Date 2010/07/20 Deciphered Date 2011/07/20 Title
Audio Jack
Custom
5 4 3 2 1
5 4 3 2 1
+3VS_W LAN R423 1 2 0_0603_5% +3VS
WLAN H=9mm
R424 1
@
2 0_0603_5% +3VALW
R4250_0402_5% JMINI1 +3VS_W LAN

PCH_PCIE_W AKE# 1 @ 2 1 2 +3VS_W LAN
<13,38> PCH_PCIE_W AKE# 1 2
3 4 0.1U_0402_16V4Z
T55 PAD 3 4
T56 PAD 5 5 6 6 +1.5VS 1 1
W LAN_CLKREQ# 7 8
<13> W LAN_CLKREQ# 7 8
9 10 C631 C632 C633
CLK_PCIE_W LAN# 9 10
D
<17> CLK_PCIE_W LAN# 11 11 12 12 D
CLK_PCIE_W LAN 2 2
<17> CLK_PCIE_W LAN 13 13 14 14
15 16 4.7U_0805_10V4Z 0.1U_0402_16V4Z
15 16
17 17 18 18
19 20 W L_OFF# W L_OFF# <45>
19 20 PLT_RST#
21 21 22 22 PLT_RST# <13,22,38,39> 10/5 Add C13/C15/C16 by Vivian
PCIE_DTX_C_PRX_N5 23 24
<14> PCIE_DTX_C_PRX_N5 23 24
PCIE_DTX_C_PRX_P5 25 26
<14> PCIE_DTX_C_PRX_P5 25 26
27 27 28 28
29 30 PCH_SMBCLK PCH_SMBCLK <13,37>
C152 2 .1U_0402_16V7K PCIE_PTX_C_DRX_N5 29 30 PCH_SMBDATA +1.5VS
<14> PCIE_PTX_DRX_N5 1 31 31 32 32 PCH_SMBDATA <13,37>
C153 2 1 .1U_0402_16V7K PCIE_PTX_C_DRX_P5 33 34
<14> PCIE_PTX_DRX_P5 33 34 +3VS
35 36 USB20_N12 USB20_N12 <14> 0.1U_0402_16V4Z
35 36 USB20_P12
37 37 38 38 USB20_P12 <14> 1
+3VS_W LAN 39 39 40 40
R426 1 2 0_0402_5% C634 C635 C636
41 41 42 42 (9~16mA)
1
43 44 MINI1_LED#
43 44 MINI1_LED# <48> 2
45 46 R427
45 46 4.7U_0805_10V4Z 0.1U_0402_16V4Z
47 47 48 48 10K_0402_5%
<45> E51TXD_P80DATA E51TXD_P80DATA 49 50
E51RXD_P80CLK 49 50
<45> E51RXD_P80CLK 51 52
2
51 52
12/7 Add C156/C157/C167 by Vivian
53 54 MINI1_LED#
GND1 GND2
BELLW ETHER 80003-8041 52P

CONN@ PCH_SMBCLK C972 @ 1 2 1000P_0402_50V7K
PCH_SMBDATA C973 @ 1 2 1000P_0402_50V7K
C 8/20 Add C
+3VS +1.5VS
Max 2.7A +3VS_MINI Max 0.5A +1.5VS_MINI
L11 L12
Mini Card Slot 1---TV tuner Currecnt: 3.3 : 2750mA, 1.5: 500mA 1
0_1206_5%
2 0.01U_0402_16V7K 4.7U_0603_6.3V6K 2
0_0603_5%
1 4.7U_0603_6.3V6K
MINI C490
1 C768
0.1U_0402_16V7K
1
C763
1
C404
1
C765
1
C770
1
C769
1
2 2 2 2 2 2
2
0.1U_0402_16V4Z 0.01U_0402_16V7K 0.1U_0402_16V4Z
H=4mm
JMINI2
1 1 2 2 +3VS_MINI
3 3 4 4
5 5 6 6 +1.5VS_MINI
7 8 +VCC_SIM 1 1
<13> TV_CLKREQ# 7 8
9 10 B_DAT C767 C406
9 10 B_CLK
<17> CLK_PCIE_TV#
<17> CLK_PCIE_TV
11
13
11
13
12
14
12
14 B_RST 39P_0402_50V8J 39P_0402_50V8J Smart Card Conn.(B-CAS)
B 2 2 B
15 15 16 16
B_DETECT_R 17 18
19
17
19
18
20 20 +5VS Follow PCA50 pin-define
21 22 PLT_RST#
PCIE_DTX_C_PRX_N7 21 22 @
<14> PCIE_DTX_C_PRX_N7 23 23 24 24
PCIE_DTX_C_PRX_P7 25 26 1 R539 2 +VCC_SIM
<14> PCIE_DTX_C_PRX_P7 25 26 0_0603_5%
27 27 28 28
29 29 30 30 PCH_SMBCLK <13,37>
C628 2 1 .1U_0402_16V7K PCIE_PTX_C_DRX_N7 31 32 PCH_SMBDATA <13,37>
<14> PCIE_PTX_DRX_N7 31 32
C629 2 1 .1U_0402_16V7K PCIE_PTX_C_DRX_P7 33 34
<14> PCIE_PTX_DRX_P7 33 34
35 36 USB20_N11_R 1 R630 2 0_0402_5% JBCAS1
35 36 USB20_P11_R 1 R430 USB20_N11 <14>
37 37 38 38 2 0_0402_5% USB20_P11 <14> 10 10 20 20 DET1 R586 1 2 0_0402_5%
R428 39 40 9 19 DET2 R585 1 2 0_0402_5% B_DETECT_R
+3V_MINI_R 39 40 9 19
+3VS_MINI 1 2 41 41 42 42 8 8 18 18
0_0603_5% 43 44 7 17
43 44 7 17 B_DAT
45 45 46 46 6 6 16 16
47 48 5 15 B_CLK
R587 47 48 5 15
49 49 50 50 4 4 14 14
1 @ 2 B+_MINI 51 52 3 13 B_RST
T84 PAD 51 52 3 13
2 2 12 12
0_0603_5% 53 54 1 11 +VCC_SIM
GND1 GND2 1 11
1
1 1 CONN@ C759
C766 BELLW _80003-1021 ACES_85203-10021 0.1U_0402_16V4Z
CONN@ C764
39P_0402_50V8J 39P_0402_50V8J 2
2 2
A A
10/26 Vertical pin define

PCH_SMBCLK C974 @ 1 2 1000P_0402_50V7K
PCH_SMBDATA C975 @ 1 2 1000P_0402_50V7K
WLAN&MINI
8/20 Add Custom 0.3
5 4 3 2 1
A B C D E
+3VSB +3VSB
Place closely pin 12
1000P_0402_50V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
1 1 1 1 1 1
2
CLK_PCI_LPC R441
C650 C651 C652 C653 C654 C655 0_0603_5% 1 R447 2
<57> VR_HOT# H_PROCHOT# <5>
2
R552 0_0402_5%
2 2 2 2 2 2 0_0603_5%
C656 1
1
R444 1000P_0402_50V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z R443 D
1
10_0402_5% +EC_AVCC 1 2 ECAGND 1 @ 2 H_PROCHOT#_EC 2 Q42 C860
0_0402_5% G 47P_0402_50V8J
1
0.1U_0402_16V4Z S 2N7002H_SOT23 2
3
1
111
125
1 1
22
33
96
67
9
C657 U46
18P_0402_50V8J
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
2
EC_GA20 1 21 EC_OSD_PWM
<12> EC_GA20 EC_KBRST# GATEA20/GPIO00 PWM0/GPIO0F EC_OSD_PWM <48> +3VSB
<12> EC_KBRST# 2 23 BEEP# <41>
PCH_PLT_RST# SERIRQ KBRST#/GPIO01 BEEP#/PWM1/GPIO10
<12> SERIRQ
3
SERIRQ# PWM Output FANPWM0/GPIO12
26 FAN_CPU_PWM <48>
LPC_FRAME# 4 27
<13> LPC_FRAME# LPC_FRAME#/LFRAME# ACOFF/FANPWM1/GPIO13 FAN_GPU_PWM <48>
2
1 LPC_AD3 5
@ <13> LPC_AD3 LPC_AD2 LPC_AD3/LAD3 R442
C658 <13> LPC_AD2 LPC_AD1
7
8
LPC_AD2/LAD2
63
Ra 100K_0402_5%
0.1U_0402_16V4Z <13> LPC_AD1 LPC_AD0 LPC_AD1/LAD1 BATT_TEMP/AD0/GPI38 GFXVR_IMON
10 LPC_AD0/LAD0 BATT_OVP/AD1/GPI39 64 GFXVR_IMON <57>
2 <13> LPC_AD0
LPC & MISC 65
1
CLK_PCI_LPC ADP_I/AD2/GPI3A AD_BID
<17> CLK_PCI_LPC 12 CLK_PCI_EC/PCICLK AD3/GPI3B 66
PCH_PLT_RST# 13 AD Input 75 AD_BID
<5,13,40> PCH_PLT_RST# ECRST# PCIRST#/GPIO05 AD4/GPI42 IMVP_IMON
Place closely pin 13 +3VSB 1 R446 2 37 EC_RST#/ECRST# AD5/GPI43 76 IMVP_IMON <57>
47K_0402_5% EC_SCI# 20
<12> EC_SCI# EC_SCI#/GPIO0E
2
1 38 CLKRUN#/GPIO1D
R925 1 @ 2 CLKRUN#_R 68 R762 1 2 0_0402_5% R445
<13> CLKRUN# DAC_BRIG/DA0/GPO3C LSADC0 <34,35>
C659 0_0402_5% R761 0_0402_5%
0.1U_0402_16V4Z DA Output
EN_DFAN1/DA1/GPO3D 70
71 R449
1
1
2
2 0_0402_5%
LSADC1 <34,35> Rb 0_0603_5%
2 IREF/DA2/GPO3E LSADC2 <34,35> @
UART_TX_R 55 72 R450 1 2 0_0402_5%
LSADC3 <34,35>
1
EC_MUTE# KSI0/GPIO30 DA3/GPO3F
<42> EC_MUTE# 56 KSI1/GPIO31
AMP_POWER_DOWN# 57
<42> AMP_POWER_DOWN# CVBS_SYNC_DET KSI2/GPIO32 PS2_CLK
10/25 Add R968 <34,35,38> CVBS_SYNC_DET 58 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 83
PS2_CLK <38>
+3VSB HDMI_SYNC_DET 59 84 PS2_DATA
<34,35> HDMI_SYNC_DET HP_PLUG# KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B VOL_SCL_1 PS2_DATA <38>
<35,41,43> HP_PLUG# 60 KSI5/GPIO35 CAP_INT#/PSCLK2/GPIO4C 85 VOL_SCL_1 <42>
BT_RESET 61 PS2 Interface 86 VOL_SDA_1
+3VSB <38,48> BT_RESET KSI6/GPIO36 PSDAT2/GPIO4D VOL_SDA_1 <42>
4.7K_0402_5% 1 2 R968 KSI7 J5 1 @ 2 KSI7 62 87 EC_3V5V_EN
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E HP_AMP_DOWN# EC_3V5V_EN <52> LSADC0
10K_0603_5% 39 88 R492 1 2 100K_0402_5%
2 KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F HP_AMP_DOWN# <43> LSADC1 2
R451 2 1 47K_0402_5% 40 R493 1 2 100K_0402_5%
R452 2 KSO2 KSO1/GPIO21 LSADC2
8/15 Add 1 47K_0402_5% 41 KSO2/GPIO22
R494 1 2 100K_0402_5%
42 97 VGATE_R R453 2 1 0_0402_5% VGATE LSADC3 R495 1 2 100K_0402_5%
EC_OSD_RST# KSO3/GPIO23 SDICS#/GPXIOA00 LAN_DISABLE#_R VGATE <13,57>
<48> EC_OSD_RST# 43 KSO4/GPIO24 WOL_EN/SDICLK/GPXIOA01 98 LAN_DISABLE#_R <40>
UART_TX_R SOURCE_LED
KSO5/GPIO25 Int. K/B
R474 1 2 0_0402_5% 44 99
<15,34,35> UART_TX UART_RX_R <48> SOURCE_LED EC_CAM_OFF ME_EN/SDIMOSI/GPXIOA02 ME_FLASH <13>
R485 1 2 0_0402_5% 45 109 10/5 Add R492~495(EC request)
<15,34,35> UART_RX <36> EC_CAM_OFF AV_AUDIO_SEL# KSO6/GPIO26 Matrix LID_SW#/GPXIOD00 SCALER_ON# <35>
<47> AV_AUDIO_SEL# 46 KSO7/GPIO27 SPI Device I/F
HDMI_SW_EC 47
<33> HDMI_SW_EC EC_ENVDD KSO8/GPIO28 EC_SI_SPI_SO
<36> EC_ENVDD 48 119 EC_SI_SPI_SO <46>
KSO9/GPIO29 SPIDI/MISO EC_SO_SPI_SI R454 33_0402_5%
49 120 EC_SO_SPI_SI <46>
HDMI_SWOFF_EC KSO10/GPIO2A SPIDO/MOSI SPI_CLK
<33> HDMI_SWOFF_EC 50
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
126 1 2 SPI_CLK_R <46>
51 128 SPI_CS#
KSO12/GPIO2C SPICS# SPI_CS# <46> +3VSB
J8 1 @ 2 10K_0603_5% 52 1
KSO13/GPIO2D R455
8/19 Add R884(Vendor suggest) <34,35> PANEL_STATE_OFF 53 1 2 10K_0402_5% @
UART_RX_R KSO14/GPIO2E CIR_IN C660
54
KSO15/GPIO2F GPIO40
73 CIR_IN <48> 9/29 Change net name from +V_5V to +5VSB
1K_0402_1% 2 1 R884 PANEL_STATE_OFF H_PROCHOT#_EC 81 74 100P_0402_50V8J +5VSB
EC_REVPWROK KSO16/GPIO48 H_PECI/GPIO41 GLAN_PCIE_WAKE# H_PECI <5,12> 2
<12> EC_REVPWROK 82
KSO17/GPIO49 GPIO FSTCHG/GPIO50
89 GLAN_PCIE_WAKE# <40>
90 SSD_DET# <37>
BATT_CHG_LED#/GPIO52 BT_OFF#
91 BT_OFF# <48>
VOL_SCL CAPS_LED#/GPIO53 WL_BLUE_LED# PS2_CLK 4.7K_0402_5% 1 @
<42> VOL_SCL 77 92 WL_BLUE_LED# <48> 2 R927
VOL_SDA EC_SMB_CK1/SCL0/GPIO44 BATT_LOW_LED#/GPIO54 PWR_ON_LED#
<42> VOL_SDA 78 93 PWR_ON_LED# <48>
EC_SMB_CK2_M EC_SMB_DA1/SDA0/GPIO45 PWR_LED#/GPIO55 SYSON PS2_DATA 4.7K_0402_5% 1 @
79
EC_SMB_CK2/SCL1/GPIO46 SYSON/GPIO56
95 SYSON <38,49,55> 2 R928
EC_SMB_DA2_M 80 121 VR_ON
EC_SMB_CK2 EC_SMB_DA2/SDA1/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <57>
1000P_0402_50V7K 2 1 @ C982 127
EC_SMB_DA2 AC_IN/GPIO59
1000P_0402_50V7K 2 1 @ C983 SM Bus
PCH_PLT_RST# 1 R456 2
8/20 Add PM_SLP_S3# 6 100 EC_RSMRST# 100K_0402_5%
<13> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <13>
PM_SLP_S5# 14 101 VCCSA_PG
<13> PM_SLP_S5# EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 VCCSA_PG <53>
EC DEBUG port <13,38> EC_SMI# EC_ESB_INT
15
16
EC_SMI#/GPIO08 EC_ON/GPXIOA05
102
103
EC_ON <50>
<48> EC_ESB_INT GPIO0A EC_SWI#/GPXIOA06 EC_PWROK EC_SWI# <13>
17 104 R458
<48> EC_OSD_CK GPIO0B ICH_PWROK/GPXIOA07 EC_PWROK <13>
18 GPIO 105 BKOFF# 1 2D@ 2
3 <48> EC_OSD_DA GPIO0C BKOFF#/GPXIOA08 BKOFF# <36> +3VSB 3
SUS_PWR_ACK 19 GPO RF_OFF#/GPXIOA09 106 100K_0402_5%
<13> SUS_PWR_ACK INVT_PWM SUS_PWR_DN_ACK/GPIO0D EC_ID WL_OFF# <44>
Reserve R460 for EC debug. <36> INVT_PWM FAN_CPU_SPEED
25
28
INVT_PWM/PWM2/GPIO11 GPXIOA10
107
108 R459
<48> FAN_CPU_SPEED FAN_GPU_SPEED FAN_SPEED1/FANFB0/GPIO14 GPXIOA11 POWER_KEY <35>
<48> FAN_GPU_SPEED 29 1 3D@ 2
R460 E51TXD_P80DATA FANFB1/GPIO15 100K_0402_5%
<44> E51TXD_P80DATA 30
E51TXD_P80DATA E51RXD_P80CLK EC_TX/GPIO16
1 2 <44> E51RXD_P80CLK 31
EC_RX/GPIO17 PM_SLP_S4#/GPXIOD01
110 PM_SLP_S4# <13>
ON/OFF 32 112 ENBKL 2 R461 1
<50> ON/OFF CEN_PWR_LED ON_OFF/GPIO18 ENBKL/GPXIOD02 S_BKOFF <34,35,36>
100K_0603_5% 34 114 0_0402_5%
<48> CEN_PWR_LED SUSWARN# SUSP_LED#/GPIO19 EAPD/GPXIOD03 HDMI_CABLE_DET EAPD_CODEC <41>
<13> SUSWARN# 36
NUM_LED#/GPIO1A GPI EC_THERM#/GPXIOD04
115 HDMI_CABLE_DET <38>
116 SUSP#
SUSP#/GPXIOD05 PBTN_OUT# SUSP# <24,49,53,54,56,59>
C662 117
PBTN_OUT#/GPXIOD06 PBTN_OUT# <13> +3VSB
15P_0402_50V8J 118 35V_PG
CRY2 EC_PME#/GPXIOD07 35V_PG <52>
1 2 122
100P_0402_50V8J 1 ON/OFF XCLK1
2 C876 123 124 2 1
XCLK0 V18R C663 4.7U_0603_6.3V6K
1
AGND
32.768KHZ_12.5PF_Q13MC14610002 VOL_SDA_1 4.7K_0402_5% 1 2 R967

GND
GND
GND
GND
GND
2 NC @ VOL_SCL_1 4.7K_0402_5% R966

OSC 1
1 2
R463 EC_OSD_RST# 2.2K_0402_5% 1 2 R947
3 4 20M_0402_5% KB930QF-A1_LQFP128_14X14 BT_RESET 4.7K_0402_5% 1 2 R941
11
24
35
94
113
69
NC OSC AV_AUDIO_SEL# 4.7K_0402_5% @ R936

1 2
2
Y6 +V_3.3V HDMI_CABLE_DET 4.7K_0402_5% 1 2 R887

ECAGND
EC_OSD_CK 4.7K_0402_5% 1 2 R854

1 2 CRY1 EC_OSD_DA 4.7K_0402_5% 1 2 R853
+3VSB
4.7K_0402_5%
HDMI_SW_EC 10K_0402_5% 1 2 R852
2
1
+3VSB
4.7K_0402_5%
C664 PANEL_STATE_OFF 4.7K_0402_5% 1 @ 2 R497
15P_0402_50V8J R467 AMP_POWER_DOWN# 4.7K_0402_5% 1 @ 2 R496
1
R550
R551
@ 0_0402_5% EC_ESB_INT 2.2K_0402_5% 1 2 R771
R465 GLAN_PCIE_WAKE# 100K_0402_5% 1 2 R462
@
2
10K_0402_5% ON/OFF 4.7K_0402_5% 1 2 R464
1
2
5
1
U39 @ POWER_KEY 4.7K_0402_5% 1 @ 2 R713

<13> PCH_SUSCLK
SN74AHCT1G125GW_SOT353-5 EC_SMB_CK2_M 6 1 EC_SMB_CK2 PWR_ON_LED# 8.2K_0402_5% 1 @ 2 R466
OE#
P
EC_SMB_CK2 <13,21,42>
2
2 4 EC_RSMRST# VOL_SCL 4.7K_0402_5% 1 2 R468

A Y
5
4 Q61A VOL_SDA 4.7K_0402_5% R469 4
1 2
G
DMN66D0LDW-7_SOT363-6 WL_BLUE_LED# 8.2K_0402_5% 1 @ 2 R470

1 EC_SMB_DA2_M 3 4 EC_SMB_DA2 EC_MUTE# 4.7K_0402_5% 1 2 R472
EC_SMB_DA2 <13,21,42>
3
@
C665 11/4 Change PN of Q61 from SB00000AR00 to SB00000DH00 Q61B
0.1U_0402_10V6K DMN66D0LDW-7_SOT363-6
2
1 2
R471 0_0402_5%
@
EC KB930/KB conn
Custom
A B C D E
A B C D E
D42 <EMI>
USB20_P0_1 6 3 +USB_VCCA
12mA Close to JP9.PIN1
1
0.1U_0402_16V4Z 2 1 C875 +3VSB C677
+USB_VCCA 5 2 0.1U_0402_16V4Z
<EMI>
2
4 1 USB20_N0_1
U48 20mils
<45> SPI_CS# SPI_CS# 1 8 CM1293A-04SO_SOT23-6
R720 1 CE# VDD
2 4.7K_0402_5% SPI_W P# 3 WP# SCK 6 EC_SPICLK_R 1 R722 2 0_0402_5% SPI_CLK_R SPI_CLK_R <45>
1 +3VSB R721 1 2 4.7K_0402_5% SPI_HOLD# 7 5 EC_SO_SPI_SI_R 1 R723 2 0_0402_5% EC_SO_SPI_SI 10/25 Change symbol and footprint of D42 from SC300000100 to 1
HOLD# SI EC_SO_SPI_SI <45>
4 2 EC_SI_SPI_SO_R 1 R724 2 0_0402_5% EC_SI_SPI_SO
VSS SO EC_SI_SPI_SO <45> SC300000O00(ESD request)
MX25L1005AMC-12G_SO8 @ +USB_VCCA
SA00002C100 R431 1 2 0_0402_5%
150mils
Layout Note: Please Place R722/R723 Close to U46 L28 W CM-2012-900T_4P JUSB1
128kB USB20_N0 1 1
<14> USB20_N0 2 2 USB20_N0_1
1 VCC
2 USB_N
USB20_P0_1 3
USB20_P0 USB_P
4 4 3 3 4 GND
<14> USB20_P0 5
R433 1 @ GND
2 0_0402_5% 6 GND
7 GND
8 GND
SUYIN_020173MR004G565ZR
CONN@
@ +USB_VCCA
R435 1 2 0_0402_5%
11/2 Change PN of C640 from SF000002Y00 to
L29 JUSB2
SF000001G00 USB20_N1 1 1 2 2 1 VCC
10/22 Add(EMI Request) <14> USB20_N1 USB20_N1_1 2
+USB_VCCA USB_N
USB20_P1_1 3
+V_3.3V USB20_P1 USB_P
4 4 3 3 4 GND
<14> USB20_P1 5
1 1
330U_6.3V_M_R14
C641 W CM-2012-900T_4P GND
1 6 GND
+
C640
2 1 2 7 2
+V_3.3V C826 R436 @ 0_0402_5% GND
8 GND
2 82P_0402_50V8J
2 470P_0402_50V7K <EMI> 2 SUYIN_020173MR004G565ZR
CONN@
+V_5V
1
+USB_VCCA
U36
1 8 R432
2
GND
IN
OUT
OUT 7 8/13 Add D43/C678(EMI Suggest)
USB Conn. (SIDE)
3 6 100K_0402_5%
2
IN OUT
1 4 EN# OC# 5 1 2 USB_OC#0 <14>
C643 R434 1 D43 <EMI>
APL3510BXI-TRG MSOP8 10K_0402_5% C642 USB20_P1_1 6 3 +USB_VCCA
4.7U_0603_6.3V6K 10/22 Add(EMI Request)
2 0.1U_0402_16V4Z +V_5V
2 1
C678
<38,49> SYSON# 0.1U_0402_16V4Z
+USB_VCCA 5 2 1
<EMI>
2 C827
82P_0402_50V8J
USB20_N1_1 <EMI> 2
4 1
11/2 Change PN of C799 from SF000002Y00 to CM1293A-04SO_SOT23-6

SF000001G00
10/25 Change symbol and footprint of D43 from SC300000100 to
+USB_VCCD SC300000O00(ESD request) 10/3 Add C789/C790(Place close to JP10)
+USB_VCCA
1 1
330U_6.3V_M_R14
3 C800 3
1
+V_3.3V +
C799
1
@ +
@ 2 C789 C790
2 470P_0402_50V7K 220U_6.3V_M 470P_0402_50V7K
@ 2 2 @
+V_5V
1
+USB_VCCD
U38
1 8 R678
GND OUT 100K_0402_5%
2 IN OUT 7
3 6
2
SYSON# IN OUT
1 4 EN# OC# 5 1 2 USB_OC#34 <14>
C801 R679 1
@ APL3510BXI-TRG MSOP8 10K_0402_5% C802
4.7U_0603_6.3V6K @ @
2 0.1U_0402_16V4Z
2
4 4

USB / BIOS ROM
Custom 0.3
A B C D E
5 4 3 2 1
+V_5V +5VS_L
L57 10/3 Change symbol location

1 2
FBMA-L11-160808-800LMT_0603
1 1
U41
1 C686 C687
D IN 0.1U_0402_16V4Z 10U_0805_10V4Z C684 D
5 PCM_FRONT_RIGHT <42>
OUT 2 2 R929
2
GND @ FRONT_RIGHT 10U_0805_6.3V6M 1 2 1 2 1 2
3 4 1 2 1K_0402_5% C784 3300P_0402_50V7-K
SHDN BYP C638 C685 PCM_FRONT_LEFT <42>
G9191-475T1U_SOT23-5 0.01U_0402_25V7K R930
@ 9/29 Add U41/C638 FRONT_LEFT 10U_0805_6.3V6M 1 2 1 2 1 2
1K_0402_5% C785 3300P_0402_50V7-K
C680 PCM_CENTER <42>
R931
CENTER 10U_0805_6.3V6M 1 2 1 2 1 2
+5VS_L 1K_0402_5% C786 3300P_0402_50V7-K
PCM_SUR_RIGHT <42>
C682 R932
SUR_RIGHT 10U_0805_6.3V6M 1 2 1 2 1 2
0_0603_5% 1K_0402_5% C787 3300P_0402_50V7-K
1 R491 2 4.7U_0603_6.3V6K 0.1U_0402_16V4Z +DVDD PCM_SUR_LEFT <42>
C683 R933
1 1 1 1 1 SUR_LEFT 10U_0805_6.3V6M 1 2 1 2 1 2
1K_0402_5% C788 3300P_0402_50V7-K
C691 C692 C693 C694 C695 +DVDD
@
2 2 2 2 2 0.1U_0402_16V4Z
4.7U_0603_6.3V6K 0.1U_0402_16V4Z
U53
15 10 FRONT_LEFT
C935 VCC VOUT1 FRONT_LEFT
10/27 Add C558~C561(EMI request)
1 2 10U_0805_10V4Z14 11 FRONT_RIGHT
C VCOM VOUT2 FRONT_RIGHT C
+5VSB +1.5VS 12 CENTER
VOUT3
R858 1 2 0_0402_5% 1 13
<34,35> I2S_DATA0 DATA1 VOUT4
1 1
R859 1 2 0_0402_5% 2 8 SUR_LEFT
C558 C559
<EMI> <EMI> R860 1 2 0_0402_5% 3 9 SUR_RIGHT
1000P_0402_50V7K 2 1000P_0402_50V7K 2
R861 1 2 0_0402_5% 18 6
<34,35> I2S_WS LRCK ZEROA
R862 1 2 0_0402_5% 19
<34,35> I2S_SCLK BCK
4 1
+3VSB +V_3.3V R863 1 FMT1
<34,35> I2S_MCLK 2 0_0402_5% 20
SCKI C941
5
FMT0
<35> DEMT0
R869 1 @ 2 0_0402_5% DEMT0_R 16 0.1U_0402_16V4Z
DEMP0 2 @
1 1
<35> DEMT1
R870 1 @ 2 0_0402_5% DEMT1_R 17 7
C560 C561 DEMP1 AGND
<EMI> <EMI>
1
1000P_0402_50V7K 2 1000P_0402_50V7K 2
I2S_SCLK R872 R871 0817 Vendor suggest reverse C to GND
I2S_MCLK 0_0402_5% 0_0402_5% PCM1606
1 1
2
C603 C604
+V_5V 22P_0402_50V8J 22P_0402_50V8J
@ 2 2 @
<EMI> <EMI>
10/28 Add C603/C604(EMI request)

B R873 @ DEMT0_R B
1 2 10K_0402_5%
R874 2 @ 1 10K_0402_5% DEMT1_R
8/23 Add +V_3.3V

0818 Vendor suggest(Close to U42.Pin43/Pin44)
4.7U_0603_6.3V6K
NBQ100505T-800Y-N_2P
L59 3D@ C947 3D@ 3D@ 1 1
1 2 1 2 1 2 AIN_TAS_L
<35,38> AIN_IO_L
0_0402_5% R877 C1014 C1013
NBQ100505T-800Y-N_2P 4.7U_0603_6.3V6K 3D@ 3D@
L58 3D@ C948 3D@ 3D@ R935 U54 2 2
3D@ 1 2 1 2 1 2 AIN_TAS_R AIN_TAS_L 1 3D@ 2 0_0402_5% 9 8 0.1U_0402_16V4Z
<35,38> AIN_IO_R NC1 V+
470P_0402_50V8J
470P_0402_50V8J
1 1 0_0402_5% R878 2
NO1
3
C949 4.7U_0603_6.3V6K R934 10 AV_FRONT_LEFT <42,43>

C950 AIN_TAS_R COM1
1 3D@ 2 0_0402_5% 7 3D@
D48 3D@ R875 R876 NC2 R973 1
4 2 FRONT_LEFT
2 2 10K_0402_5% 10K_0402_5% NO2 0_0402_5%
SM05_SOT23
3D@ @ @ 6 AV_FRONT_RIGHT <42,43>
2
COM2
1 3D@
1
IN1 R974 1
<45> AV_AUDIO_SEL# 5 3 2 FRONT_RIGHT
IN2 GND 0_0402_5%
TS5A23157DGSR_MSOP10
3D@
8/29 Modify to GNDA
De-Emphasis Control
A A
DEMT1 (pin 17) DEMT0 (pin 16) AUDIO INTERFACE
LOW LOW OFF *
LOW HIGH 48 kHz Security Classification Compal Secret Data Compal Electronics, Inc.
HIGH LOW 44.1 kHz Issued Date 2010/07/20 Deciphered Date 2011/07/20 Title
5CH AUDIO_PCM1606
HIGH HIGH 32 kHz AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
5 4 3 2 1
A B C D E
+3VS +3VALW
Power switch board SENSOR BOTTOM
2
+3VSB
11/4 Change PN of Q16 from SB00000AR00 to R544
@
Follow NCQD0 SB00000EO10
@
10K_0402_5%
5
1 @ 2 +3VS Q16B
1
JPWR1 R784 0_0402_5% JFUN1
1 1 2 1 WL_BLUE_LED# 4 3
1 +3VALW 1 <45> WL_BLUE_LED# MINI1_LED# <44>
2 R785 0_0402_5% PWRLED 2
2 ON/OFFBTN#_R R855 0_0402_5% 2 2N7002KDWH_SOT363-6
3 1 2 ON/OFFBTN# <50> <45> EC_OSD_PWM 1 2 3
3 R473 0_0402_5% R540 0_0402_5% 3
6 4 <45> EC_OSD_CK 1 2 4
G1 4 4
6
1 R588 0_0402_5% 1
7 5 <45> EC_OSD_DA 1 2 5
G2 5 R589 0_0402_5% 5
<45> EC_ESB_INT 1 2 6
6
JOINT A1001WV-S 1 R770 2 0_0402_5% 7
<45> EC_OSD_RST# 7
CONN@ 8 @ Q16A 2 BT_LED
8 2N7002KDWH_SOT363-6
1 1 1 9 11
C761 9 G11
10 12
1
R475 0_0402_5% C760 C762 10 G12
1
PWRLED 1 2 33P_0402_50V8K 33P_0402_50V8K ACES_87212-10G0
PWR_ON_LED# <45> 2 2 2 CONN@ @R543
@ R543
33P_0402_50V8K 100K_0402_5%
2
LED board conn. +3VS
DECO LED board conn.
+3VALW
JLEDIR +3VSB
1 JLED1
1
2 2 1 1
3 PCH_SATALED# 2 @
3 PCH_SATALED# <12> <45> CEN_PWR_LED 2 D34
9 4 WL_BLUE_LED# 3
GND 4 SOURCE_LED 3 USB20_P7_R
10 GND 5 5 SOURCE_LED <45> +5VS 4 VIN IO1 2
6 CIR_IN 4
6 BT_LED CIR_IN <45> GND USB20_N7_R
7 7 5 GND 3 IO2 GND 1
8 8
ACES_87212-03G0 PRTR5V0U2X_SOT143-4
1000P_0402_50V7K C666
1000P_0402_50V7K C667
1000P_0402_50V7K C668
ACES_87212-08G0 2 2 2 CONN@
2 CONN@ 2
1 1 1 +3VS 10/3 Change symbol of JLED1 from 10/3 Change symbol of J3DIR1 from SP020008V00
R476
1
0_0603_5%
2 +3VAUX_BT SP020008V00 to SP02000PO00(4pin to to SP02000GC00( 直直直
to R/A)
3pin)
BT
+3VALW +5VS
R477 @
1
0_0603_5%
2
3D IR
Connector
J3DIR1
1 @ 1 1 @ R541 0_0402_5% 1
C669 C671 C670 USB20_N7_R 1
2 1 2
<14> USB20_N7 USB20_P7_R 2
2 1 3
3 GND
5
1U_0603_10V6K 0.1U_0402_16V4Z 4.7U_0603_6.3V6K @ <14> USB20_P7 R542 0_0402_5%
D26 4 6
2 2 2 4 GND
4 2 USB20_P10_R ACES_87213-0400G
+5VS VIN IO1 CONN@
8/13 Change symbol of D27 to SCA00000E00(EMI Suggest) USB20_N10_R 3 1 2
IO2 GND
PRTR5V0U2X_SOT143-4 C672
PWRLED JBT1
1 1000P_0402_50V7K
1 +3VAUX_BT
ON/OFFBTN#_R 1
2
2 USB20_P10_R
3 R478 2 1 0_0402_5% USB20_P10
3 USB20_P10 <14>
3
4 USB20_N10_R R479 2 1 0_0402_5% USB20_N10

D27 4 BT_LED USB20_N10 <14>
5
PJSOT24C_SOT23-3 5
8 6 BT_OFF# <45>
<EMI> G8 6
9 7 BT_RESET <38,45>
@ G9 7
ACES_87213-0700G
1
3 CONN@ 3
10/26 Change symbol and footprint of JBT1 from SP02000FR00 to SP02000F000
+12VS +12VS
Fan Control circuit +3VS

+3VS
2
2
R764 R765
2
0_0603_5% 0_0603_5%
2
R480
R481 10K_0402_5%
1
1
10K_0402_5% JFAN1
JFAN2 +VCC_FAN1 1
1
+VCC_FAN2 1
1 <45> FAN_CPU_SPEED 2
1
1 2
<45> FAN_GPU_SPEED 2 1 <45> FAN_CPU_PWM 3
2 3
<45> FAN_GPU_PWM 3 4
3 C673 4
4 5
4 1000P_0402_50V7K G5
1 5 6
G5 2 G6
6
C675 G6 CONN@
1000P_0402_50V7K CONN@ ACES_50273-00401-001
2 ACES_50273-00401-001
4 4
0809 Change footprint to ACES_50273-00401-001_4P
0809 Change footprint to ACES_50273-00401-001_4P

WL/BT ON/OFF, PWR S/W, OSD
Custom PLA00 M/B LA-6951P Schematic 0.3
A B C D E
A B C D E
+V_3.3V TO +3VS +V_5V TO +5VS +12V1 TO +12VS

+V_3.3V +3VS +V_5V +5VS +12V1 +12VS
U35 11/4 Change PN of U34 from SB000009580 to U34 U51

8
D S
1 SB000009510 8
D S
1 11/2 Change PN of U51 from 1
S D
8
1 1
7 2 7 2 SB00000N100 to SB00000DJ00 2 7
D S D S S D
2
6 3 1 6 3 1 3 6 1
D S C486 R611 D S R612 S D R744
5 4 5 4 4 5
D G 470_0603_5% D G C488 G D C884
AO4468L_SO8 AO4468L_SO8 1U_0603_10V6K 470_0603_5% AO4435_SO8 1U_0603_25V6 470_0603_5%
2
1U_0603_10V6K 2 2
1
11/4 Change PN of U35 from SB000009580 to
SB000009510
3
R613 R743
1 2 Q40B 2 1 5VS_GATE Q41B 2 1 Q57B
+12V1 +12V1 +12V1
R603 5 SUSP 5 SUSP 5 SUSP
47K_0402_5% 1 20K_0402_5% 1 20K_0402_5% 1
6
6
2N7002DW-T/R7_SOT363-6 C487 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
4
C485 C883
Q40A 0.1U_0603_25V7K Q41A 0.1U_0603_25V7K Q57A 0.1U_0603_25V7K
SUSP 2 2 SUSP 2 2 SUSP# 2 2
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6

1
1
+1.5V
2 +1.5V TO +1.5VS 2
9/29 Change net name from +5VALW to +5VSB

+5VSB 9/29 Change net name from +5VALW to +5VSB
+1.5VS +5VSB
2
U33
2
8 D S 1
7 2 R605 R604
D S 100K_0402_5% 100K_0402_5%
6 3 1
D S
2
5 4 C467
1
D G R609
1
AO4468L_SO8 470_0805_5% <38,46> SYSON# SYSON# SUSP
2 SUSP <5,24,50,55>
6
1U_0603_10V6K
1
3
11/4 Change PN of U33 from SB000009580 to
SB000009510 Q44A 1
3
SYSON 2 Q44B
<38,45,55> SYSON
2N7002DW-T/R7_SOT363-6 5 C466
<24,45,53,54,56,59> SUSP#
+12V1 1 2 Q37B 100P_0402_50V8J
1
1
2N7002DW-T/R7_SOT363-6 2
470P_0402_50V8J
R610 5 SUSP
4
1
47K_0402_5% 1 R629
6
1
C468 2N7002DW-T/R7_SOT363-6 R640
4
10K_0402_5% C465
Q37A 0.1U_0603_25V7K 10K_0402_5%
2
SUSP 2 2
2
2N7002DW-T/R7_SOT363-6
1
+0.75VS
+VCCSA
2
@
Discharge circuit
2
3 R606 3
470_0805_5% @
+1.5V R608
+VRAM_1.5VS +1.05VS_DGPU 470_0805_5%
1
@ PJ21
1
2
@ 2 2 1
+3VALW 1 +V_3.3V
2
R607
NON-PDH @ 470_0805_5% @ JUMP_43X118
1
R908 R907 D @ @ PJ22
1
470_0805_5% 470_0805_5% SUSP Q45 D
2 2 2
1 1 +3VSB
1
G SUSP 2 Q46
1 1
H8 @ S SSM3K7002FU_SC70-3 G JUMP_43X118
3
H_8P0N FM1 FM2 FM3 FM4 D @ @ PJ23
S
3
1
SUSP Q24 D D SSM3K7002FU_SC70-3

1 1 1 1 2 2 2
G SUSP Q23 SYSON# Q22 +5VALW 1 1 +V_5V
2 2
@ @ @ @ @ S G G JUMP_43X118
1
SSM3K7002FU_SC70-3 S S @ PJ24
3
SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 10/28 Add R645/Q48 +VGA_CORE 2 2

1 1 +5VSB
JUMP_43X118
2
@
Screw R645
470_0805_5%
H1 H2 H3 H4 H5 H6 8/24 Add C1031~C1036
H_3P5 H_4P0 H_4P0 H_3P5 H_3P5 H_3P5
1
+V_5V
@ @ @ @ @ @ 0.1U_0603_25V7K
1
1 1 1 @
1
D
C1031 C1032 C1033 SUSP 2 Q48
H7 H10 H11 H12 H13 H14 0.1U_0603_25V7K <EMI> <EMI> G
4 H_3P3 H_4P5 H_4P5 H_4P5 H_4P5 H_4P5 <EMI> 2 2 2 S SSM3K7002FU_SC70-3 4
0.1U_0603_25V7K 3
8/24 Place C1031/C1032/C1033 close to H4/H5/H7(EMI request)
@ @ @ @ @ @
1
+V_5V
0.1U_0603_25V7K
H15 H16 H17 H20 H18 H19
H_4P5 H_4P5 H_4P5 H_3P8 H_3P8 H_3P8 <EMI>
1
<EMI>
1
<EMI>
1 Security Classification Compal Secret Data Compal Electronics, Inc.
C1036 C1034 C1035 Issued Date 2010/07/20 2011/07/20 Title
0.1U_0603_25V7K
Deciphered Date
@ @ @ @ @ @ 2 2 2 DC Interface/Screw
1
0.1U_0603_25V7K AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.3
8/24 Place C1034/C1035/C1036 close to H1/H2/H6(EMI request)
A B C D E
A B C D E
Power Button
+3VSB
1 1
2
R731 R856
ON/OFF switch 100K_0402_5%
100K_0402_5% @
<48> ON/OFFBTN#
1
SW1 D39
EVQPLHA15_4P 2
3 1 ON/OFFBTN# 1 ON/OFF <45>
3 PS_ON#
4 2 PS_ON# <51>
DAN202UT106_SC70-3
5
6
1
D
EC_ON 2
<45> EC_ON G Q53
2
S SSM3K7002FU_SC70-3
3
R732
10K_0402_5%
1
+1.05VS to +1.05VS_DGPU Transfer
PJ25
2 2 1 1
@ JUMP_43X118
2 +1.05VS +1.05VS_DGPU 2
U50 100mil(1.5A)
8 D S 1
7 D S 2
2
6 D S 3
5 4 1 1 R739
D G C881 C882 470_0603_5%
SI4856ADY_SO8 VGA@ VGA@ @
@ 10U_0805_10V4Z
1
2 2
0.1U_0402_16V4Z
9/15 Change net name from +12V1 to +12V2
R737
510K_0402_1%
3
1 @ 2 1.8VSDGPU_GATE
+12V2
6
1 Q55B
C879 DMN66D0LDW-7 2N_SOT363-6 5 1 @ 2 SUSP
Q55A 0.1U_0603_25V7K @ R740 0_0402_5%
SUSP 1 @ 2 2 @
<5,24,49,55> SUSP
4
R738 0_0402_5% @ 2
DMN66D0LDW-7 2N_SOT363-6
1
3 3
4 4

Power OK/PBN
B 0.3
A B C D E
A B C D
PH1 under CPU botten side :

CPU thermal protection at 92 degree C
Recovery at 57 degree C
PL1
HCB4532KF-800T90_1812
1 2 +12V1
1 1
VL
@ PJP1 PL2
1
LOTES_ABA-POW -005-K70 HCB4532KF-800T90_1812
1
2 1 ATX12V1 1 2 PR1
2 1 @ PC1 20.5K_0402_1%
4 3 .1U_0402_16V7K @
2
4 3
2
PC5 @ PR2
470P_0402_50V7K
470P_0402_50V7K
2
6 5 GND 10K_0402_1%
6 5
1
1000P_0402_50V7K
2
8 7 PC2 PC3 PC4
8 7 +5VSB 1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J PR3
1
PC31
PC36
9.53K_0402_1%
PU1 @
PR30
1 8
1
PSU_PG <52> VCC TMSNS1
1 2
1
2 GND RHYST1 7
0_0402_5% PH1 @
3 OT1 TMSNS2 6
100K_0402_1%_NCP15W F104F03RC
PR4
4 5
2
PS_ON#_1 1 OT2 RHYST2
2 PS_ON# <50>
G718TM1U_SOT23-8
@
0_0402_5%
2
@ PR5
10K_0402_1%
<52> VS_ON
1
2 2
+12V2
LOTES_ABA-POW -005-K70
@
PJP2
8 8 7 7
6 6 5 5
470P_0402_50V7K
4 4 3 3
1
1
2 1 PC13 PC47 PC171 PC15
2 1 1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K
2
2
PC37
PJ1
1 2 +3VSB
+3VSBP 1 2
JUMP_43X79
FOR EC suspend
3 3
@
PU2 PL3
PJ2
4
1UH_MMD-06CZ-1R0M-V1_11A_20% VFB=0.6V
2 1 10 2 LX_3VSB 1 2
+5VSB
PG
2 1 PVIN LX +3VSBP Vo=VFB*(1+PR7/PR9)=3.318 V

JUMP_43X79
68P_0402_50V8J
9 PVIN LX 3
1
1
Ipeak=0.062A, Imax=0.045A
4.7_0603_5%
1
1
PC7
PC6 8 SVIN
PR6
22U_0805_6.3VAM PR7
6 60.4K_0402_1% Current limit >4A
2
2
FB @
22U_0805_6.3VAM
22U_0805_6.3VAM
5
2
2
EN
1
NC
NC
TP
PC8
PC9
FB_3VSB
11
2
1 2 EN_3VSB
1
JBATT1
1
PR8
680P_0603_50V7K
1
PC10
10K_0402_1% SY8033BDBC_DFN10_3X3 PR9

1
PR10 13.3K_0402_1%
2
10K_0402_1% PC11
2
1U_0402_6.3V6K
2
1 2
+RTCBATT
2
+ -
<BOM Structure>
SUYIN_060003FA002G202NL
CONN@
4 4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
A B C D
5 4 3 2 1
2VREF_8205
1U_0603_10V6K
<BOM Structure>
D D
1
PC12
2
PR11 PR12
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PR13 PR14
20K_0402_1% 20K_0402_1%
1 2 FB3 FB5 1 2
8205_12V
8205_12V
+12V1
HCB4532KF-800T90_1812
1 2 +3VLP
PL4
ENTRIP2
ENTRIP1
PR15 PR16
4.7U_0805_25V6-K
174K_0402_1% 249K_0402_1%
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PC169
1 2 1 2 +V_3.3VP
4.7U_0805_10V6K
1
PC16
PC170
PC14
1
PU3
10K_0402_1%
5
6
7
8
PC17
PR202
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
8
7
6
5
1
C PQ2 C
PQ1 25 FDS8884_SO8
FDS8884_SO8 P PAD
2
7 24 35V_PG <45> 4
VO2 VO1
4
8 23 PC19
PR17 VREG3 PGOOD 0.1U_0603_16V7K
1 2 BST3A 1 2 BST_3V 9 22 BST_5V 1 2 BST5A 1 2
3
2
1
2.2_0603_5% BOOT2 BOOT1 2.2_0603_5% PR18
FB=2V
1
2
3
PL5 PC18 UG_3V 10 21 UG_5V PL6

4.7U_LF919AS-4R7M-P3_5.2A_20% 0.1U_0603_16V7K UGATE2 UGATE1 3.3UH_1164AY-3R3N-P3_7.5A_30%
1 2 LX_3V 11 20 LX_5V 1 2
+V_3.3VP PHASE2 PHASE1
1
8
7
6
5
5
6
7
8
1
LG_3V LG_5V +V_5VP
4.7_1206_5%
1000P_0603_50V7K 4.7_1206_5%
12 LGATE2 LGATE1 19
PR19
PR20
+5VSB
SKIPSEL
PQ3
330U_6.3V_M
VREG5
FDS6690AS_NL_SO8
Rds(ON) :Max=18m-ohm
330U_6.3V_M
1 1
GND
1
VIN
1SS355_SOD323-2
PC21
NC
EN
100K_0402_5% PD2
2
2
+ +
PC20
PR21
4 4
Min=15m-ohm 1 2 RT8205EGQW _W QFN24_4X4
13
14
15
16
17
18
1
PC23
1000P_0603_50V7K
2 PR22 PQ4 2
PC22
ESR=14m
2
100K_0402_5% FDS6690AS_NL_SO8
Imax=5 A
2
1
2
3
3
2
1
2
1 2
<51> PSU_PG
Ipeak=7 A VL
1
200K_0402_5%
0.1U_0402_25V6
Iocp=8.4 A
4.7U_0805_10V6K
B <51> VS_ON B
PR24
PC24
PC25
ESR=14m 1 2
2
@ PR23 2
0_0402_5%
fsw=375kHz 8205_12V Rds(ON) :Max=18m-ohm
1
<45> EC_3V5V_EN
Delta I=1.36 A Min=15m-ohm
0.1U_0603_25V7K
1 2
2
PC26
@ PR29 2VREF_8205
0_0402_5%
Iocp=delta I/2+Vtrip/Rds(on)=8.56~10A Imax=7.6A
Ipeak=10.8A
Vo=2(1+Rt/Rb)=3.37 V Iocp=13A
fsw=300kHz
@ PJ3
+V_3.3VP 2 2 1 1
+V_3.3V
Delta I=2.95A
JUMP_43X118 Iocp=delta I/2+Vtrip/Rds(on)=13.2~15.6A
Vo=2(1+Rt/Rb)=5.09 V
@ PJ4
2 2 1
+V_5VP 1 +V_5V
A A
JUMP_43X118

+V_5VP/ +V_3VP
5 4 3 2 1
5 4 3 2 1
+V_3.3V
Ipeak=1.86A, Imax=1.3A
Vo=0.8(1+Rt/Rb)=1.827 V
1
PJ5 +V_5V
1
D D
@ JUMP_43X79
2
2
1
PC27
1U_0402_6.3V6K
2
PC28
4.7U_0805_6.3V6K
1
PU4
6 @
VCNTL PJ6
5 3
2
PR25 9
VIN
VIN
VOUT
VOUT 4 +1.8VSP +1.8VSP 1 1 2 2 +1.8VS
1
0_0402_5%
22U_0805_6.3V6M
1
1 2 8 PR26 PC29
EN JUMP_43X79
1
<24,45,49,54,56,59> SUSP#
PC30
7 2 0.01U_0402_25V7K
GND
POK FB 1.54K_0402_1%
2
2
1
@
2
PR27 PC32
1
@ 47K_0402_5% .1U_0402_16V7K APL5930KAI-TRG_SO8
1
1
PR28
1.2K_0402_1%
FB=0.8V
2
C C
@ PJ8
2 2 1 1 +1.05VS
JUMP_43X118
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
1
1
PC175
PC176
PC33
Imax=6.2A
2
5
6
7
8
4.7U_0805_6.3V6K
FB=0.8V +V_5V 1 2
Ipeak=8.8A
PR205
PU16
1 2 1 EN VCC 6
4
ESR=14 mohm
<24,45,49,54,56,59> SUSP#
49.9K_0402_1% 2 GNDDRV 5
1
PQ42
Vo=0.8(1+Rt/Rb)=0.928 V
3
2
1
PC34 3 4 1 2 IRF8736TRPBF_SO8
1U_0402_6.3V6K FB POK +3VS
2
PR250 10K_0402_1%
APL5610CI-TRG_SOT23-6 +VCCSAP
VCCSA_PG <45>
1
PC35
47P_0402_50V8J PR208
1 2 0_0402_5%
B B
1
2
PR209
1 2 1 2 + PC173
330U_6.3V_M
PR203 4.7K_0402_1% 10_0402_5% VCCSA_SENSE <5>
+3VS 2
1
@
PR207
+3VS
1
49.9K_0402_1%
@
PR210 PR204
10K_0402_1% 29.4K_0402_1%
2
1
@
PR212 PR206
2
2
6
10K_0402_1% 10K_0402_1% D
1 2 2
G
2
PR211
3
10K_0402_1% D S
1
1
<5> VCCSA_VID 1 2 5 PQ43A

G PC174 DMN66D0LDW -7_SOT363-6
@
0.1U_0402_16V7K
2
1
S
4
1
@
PR213
PR213
1K_0402_1%
0.1U_0402_16V7K
@ PC189
2
@
2
PQ43B VCCSA_VID +VCCSAP

DMN66D0LDW -7_SOT363-6
0 0.925V(0.928V) Default
A @ PJ7 A
1 0.85V(0.851V) +VCCSAP 2 2 1 1 +VCCSA
JUMP_43X118

+VCCSA/+1.8VSP
5 4 3 2 1
5 4 3 2 1
HCB4532KF-800T90_1812
+1.05V_12V2 2 1 +12V2
PL9
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
D D
1
PC45
PC44
PC46
2
2
5
PQ9
PR45 4
BST_1.05V 1 2BST_1.05V_A1 2 FDMS7696A_POW ER56-8-5
2.2_0603_5%
PU6 PC48 0.22U_0603_25V7K
1 10
3
2
1
PGOOD VBST
PR46
1 2 TRIP_1.05V 2 9 UG_1.05V PL10
TRIP DRVH 1UH +-20% MMD-10DZ-1R0M-X1A 18A
PR47 143K_0402_1%
1 2 EN_1.05V 3 8 SW _1.05V 1 2
45,49,53,56,59> SUSP# EN SW +1.05VSP
0_0402_5%
FB_1.05V 4 7 +V_5V
VFB V5IN +V_5V
1
390U 2.5V M 6.3X5.7 LESR10M
1000P_0402_50V7K
@ PC49 RF_1.05V 5 6 LG_1.05V 1
1U_0603_6.3V7K
RF DRVL
5
0.1U_0402_16V7K PR48
2
1
PQ10 4.7_1206_5% +
PC51
PC207
PC208
TP 11
PC50
2
TPS51218DSCR_SON10_3X3 1U_0603_6.3V6M
0_0402_5%
2
2
2
PR49
FDMS0310S_POWER56-8-5
1
PC52
FB=0.7V 4
1
C 1000P_0603_50V7K C
1
PR50
200K_0402_5%
3
2
1
2
PR51
PR52
5.23K_0402_1% 10_0402_5%
2 1 2 1
VCCIO_SENSE <5>
2
PR53
10K_0402_1%
PR58
1
10_0402_5%
2 1
VSSIO_SENSE <5>
Ipeak=24.7 A Imax=17.3A
B Iocp=30A B
<Vo=1.05V> VFB=0.7V
Vo=VFB*(1+Rtop/Rdown)=1.066V
Fsw=340 KHz
Cout ESR=10m ohm Rdson=4.3~5.2m ohm
Delta I=((12-1.05)*(1.05/12))/(1u*340 K)=2.82 A
Iocp(min)=Vtrip/(8*Rdson)+1/2Delta
@ PJ10
2 2 1
=36.3~30.3 A
+1.05VSP 1 +1.05VS
JUMP_43X118
@ PJ9
2 2 1 1
JUMP_43X118
A A

+1.05VSP
5 4 3 2 1
5 4 3 2 1
HCB2012KF-121T50_0805
+1.5V_12V1 2 1 +12V1
PL11
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
D D
1
PC55
PC56
PC54
PR246
2
5
6
7
8
300K_0402_5%
1 2 PQ12
PR245
0_0402_5% PR248 FDS8884_SO8
1 2 BST_1.5V 1 2
<38,45,49> SYSON
4
2.2_0603_5%
1
15
14
1
PC194 @ PU18 PC195
1U_0402_6.3V6K BST_1.5V-1 1 2
EN_SKIP
TP
BST
2
3
2
1
2 13 DH_1.5V 0.1U_0603_25V7K PL12
TON DH 1.8UH_1164AY-1R8N=P3_9.5A_30%
PR247 3 12 LX_1.5V 1 2
100_0402_1% OUT LX +1.5VP
+V_5V
+V_5V 1 2 4 VCC FB=0.75v ILIM 11 1 2
1
PR249
15K_0402_1%
1U_0603_6.3V7K
5 FB VDD 10 1
5
6
7
8
PR61
560U_2.5V_M
1
1
+
PC199
PC61
6 9 DL_1.5V PQ13 4.7_1206_5%
PGOOD DL
AGND
PGND
PC193 PC188
2
4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
FDS6690AS_NL_SO8
2
2
2
FB_1.5V
1
4 PC63
8
TPS51117RGYR QFN 14P
1000P_0603_50V7K
2
C C
3
2
1
PR243
4.22K_0402_1%
1 2
1
Ipeak=18.75 A Imax=13.12A
PR244
4.12K_0402_1%
@ PJ11
2
JUMP_43X118 <Vo=1.5V> VFB=0.75V

1 1 2 2 Vo=0.75*(1+Rtop/Rdown)=1.518V
Fsw=253 KHz
Cout ESR=10m ohm
@ PJ12
JUMP_43X118 Rdson=12~15 m ohm
+1.5VP 1 1 2 2 +1.5V
Delta I=2.63 A
=>1/2DeltaI=1.44A
Vtrip=165 mV
Iocp=13.9~10.6 A
+1.5V
B B
1
PJ14
1
@ JUMP_43X79
2
PU8
2
1 VIN NC 8 +V_3.3V
2 GND NC 7
1
PC64
1
4.7U_0805_6.3V6K 3 6 PC65
PR65 VREF VCNTL 1U_0603_6.3V6M
2
1K_0402_1% 4 5
VOUT NC
9
2
TP
APL5336KAI-TRL_SOP8P8
1
PR66 +0.75VSP
1
0_0402_5% D PR67
PC66
1K_0402_1%
0.1U_0402_16V7K
<5,24,49,50> SUSP 1 2 2
1
G
2
1
S PQ14
<BOM Structure> PC67
3
PC68 SSM3K7002FU_SC70-3 10U_0805_6.3V6M

2
@ 0.1U_0402_16V7K
Imax=0.28A
2
Ipeak=0.4A
A A
@
PJ15
1 2
+0.75VSP 1 2 +0.75VS Security Classification Compal Secret Data Compal Electronics, Inc.
JUMP_43X79 Issued Date 2010/07/20 Deciphered Date 2011/07/20 Title
1.5VP/+1.2VALWP/+0.75VS
(?A,??mils ,Via NO.= ??) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Custom
0.3
5 4 3 2 1
A B C D
DIS@ PL25
HCB2012KF-121T50_0805
+VRAM_12V2 1 2 +12V2
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
DIS@ DIS@ 1
1
PC179
PC180
5
6
7
8
@ PR217
2
200K_0402_1% PQ45
1 2 FDS8884_SO8
<59> VGA_PG
DIS@
DIS@ PR214
300K_0402_5% 4
1 2
DIS@ PR215 PR216
200K_0402_5% 2.2_0603_5% DIS@
1 2 BST_VRAM1 2
<24,45,49,53,54,59> SUSP#
3
2
1
1
ESR=14m ohm
1
@ DIS@ DIS@ PL26
15
14
1
PR242 PC182 PU17 PC183 1.8UH_1164AY-1R8N=P3_9.5A_30%
10K_0402_1% .1U_0402_16V7K BST_VRAM-1 1 2 1 2
EN_SKIP
TP
BST
+VRAM_1.5VSP
2
2
2 13 DH_VRAM 0.1U_0603_25V7K
TON DH
1
DIS@ DIS@
4.7_1206_5%
PR219 3 12 LX_VRAM
OUT LX
5
6
7
8
PR218
100_0402_1% PR220 DIS@ DIS@
1U_0603_6.3V7K
1
+V_5V PQ46 DIS@
330U_6.3V_M
+V_5V 1 2 4 VCC ILIM 11 1 2
1
+
PC184
PC204
15K_0402_1%
2
5 10
FDS6690AS_NL_SO8
DIS@ FB VDD
2
1
1
DL_VRAM 2
1000P_0603_50V7K
6 PGOOD DL 9 4
AGND
PGND
PC186
PC185 DIS@
4.7U_0603_6.3V6K
2
1
FB_VRAM1.5V DIS@
2
TPS51117RGYR QFN 14P PC187 2
3
2
1
DIS@ 4.7U_0603_6.3V6K
2
DIS@
Ip=13.8A Im=9.7A DIS@
PR221
4.12K_0402_1%
<Vo=1.35V> VFB=0.75V 1 2
Vo=1.354V
Fsw=253 KHz
Cout ESR=14m ohm Rdson=12~15m

Ipeak=13.9A, Imax=9.8 A
1
DIS@ @ PJ30
Delta I=2.63 A +VRAM_1.5VSP 2 2 1 1 +VRAM_1.5VS
PR222
5.11K_0402_1% JUMP_43X118
Vtrip=165mV
2
Iocp=Vtrip/(Rdson)+1/2delta I
=13.8~10.4 A
3 3
4 4

VCCPP/1.8VP
Custom 0.3
A B C D
A B C D E F G H
CSSUM PR68 100K_0603_1%

2 1 CSP1
PR69 75K_0402_1%
2 1
CSCOMP PR70 165K_0402_1% 2 PR71 1 CSP2
2 1 100K_0603_1%
220K_0402_5%_ERTJ0EV224J
PC70 PC71 2 1 1 2 2 PR72 1 CSP3
PR73 100P_0402_50V8J 2200P_0402_50V7K PH2 PC69 330P_0402_50V7K 100K_0603_1%
1 2 1 2 1 2 1 2 2 1
47_0402_1% 4.02K_0402_1% PR75 23.2K_0402_1% 1 2 2 PR76 1 CSP4
PR77 2
PR74
1K_0402_1%
4.7K_0402_1%
1 1
PC72 1200P_0402_50V7K 100K_0603_1%
820P_0402_25V7
1
1 2 PC73
47P_0402_50V8J 820P_0402_25V7
2 1
2 PR80 1 1 2 2 1 CSN1
2 1 10_0402_1% PR81
10_0402_1%
4700P_0402_25V7K PC74 CSN2
PC76
PR79
2 1
2
PR78 1K_0402_1% 1 PR83 2 1 2 PR82 10_0402_1%
1
412_0402_1% PC75 2 PR86 1 2 1 CSN3
1 2 1 2 8.2K_0402_1% PR87 10_0402_1%
1
2K_0402_1% 22K_0402_1% PR89 2 1 CSN4
PR84 PR85 2 1 IMVP_IMON <45> PR88 10_0402_1%
PC77 0_0402_5% PC78
ILIM
4700P_0402_25V7K 0.1U_0402_25V6
1 2
DIFFOUT
COMP
1 2
PR90 23.7K_0402_1%
2
PC79
1000P_0402_50V8-J 6.98K_0402_1%
PR91
CSREF 1
1 2 CSP4 CSP4 <58>
1
CSCOMP
DIFFOUT
FB
CSSUM
0.047U_0402_16V7K
PR92 PC80 CSN4 CSN4 <58>
2
100_0402_1%
1 2
53
52
51
50
49
48
47
46
45
44
43
42
41
40
PR93 0_0402_5% PU9
1 2 CSN2 CSN2 <58>
CSP4
CSN4
FLAG / GND
VSN
DIFFOUT
TRBST
IOUT
CSREF
FB
COMP
DROOP
CSCOMP
ILIM
CSSUM
1
1
<5> VSSSENSE 0.047U_0402_16V7K
PR94 0_0402_5% PC81 39 PC82
1000P_0402_50V8-J CSN2 CSP2 <58>
1 2 1 1 2 CSP2
2
<5> VCCSENSE VSP PR98 6.98K_0402_1%
38
<45> VR_HOT# TSENSE CSP2 CSN3 CSN3 <58>
2
TSENSE
1
+CPU_CORE 1 2 PR96 51_0402_5% 37 0.047U_0402_16V7K
PR95 CSN3 PC83
1 2 3
100_0402_1% PR97 107_0402_1% VR_HOT# CSP3 CSP3 <58>
2 +1.05VS 36 1 2 2
2
CSP3 PR99 6.98K_0402_1%
1 2 4
PR100 54.9_0402_1% SDIO CSN1 CSN1 <58>
+1.05VS 35
CSN1
1
TSENSE 1 2 <5> H_VIDSOUT 5 PC84
100K_0402_1%_NCP15WF104F03RC
SCLK 0.047U_0402_16V7K
34
CSP1
2
1 2 <5> H_VIDSCLK 6 1 2 CSP1 CSP1 <58>

8.25K_0402_1%
+1.05VS
0.1U_0402_25V6
2
ALERT#
1
@ PR102 75_0402_1% PR103 6.98K_0402_1%

PC85
PR101
33
DRON
2 <5> H_VIDALERT# NCP6151S52MNR2G_QFN52_6X6 DRVON <58>
PH3
1 7
PR104 10K_0402_1% VR_RDY PWM1
+3VS 32
2
PWM1/ADDR PWM1 <58>

8
1
<13,45> VGATE VR_RDYA PWM3

31
PWM3/IMAX PWM3 <58>
1 2 9
<45> VR_ON PR105 0_0402_5% ENABLE PWM2
30
PWM2/VBOOT PWM2 <58>
10
VCC PWM4
+V_5V 29
PWM4 PWM4 <58>
1 2 1 2 11
PR107 9.09K_0402_1% ROSC PWMA
28
PR106 2.2_0603_5% PWMA/IMAXA PWMA <58>
1 2 12
VRMP
CSCOMPA
DIFFOUTA
TSENSEA 27 2 1
DROOPA
+V_5V
CSSUMA
VBOOTA
TRBSTA
TSENSEA
COMPA
PC86 1U_0603_6.3V6M 13
IOUTA
TSENSEA
CSNA
VSNA
CSPA
VSPA
ILIMA
1 2 1K_0402_1% PR108 DIS@ PR167 PWM2 PWMA
100K_0402_1%_NCP15WF104F03RC
+CPU_12V2
FBA
DIS@ 0_0402_5%
2
PR109 1K_0402_1% 1 2 1 2 2 1
8.25K_0402_1%
0.1U_0402_25V6
1
PR111
UMA@ PC88
UMA@ PR110
14
15
16
DIFFOUTA 17
18
19
20
21
CSCOMOA 22
23
CSSUMA 24
25
26
PH4
PC87 0.01U_0402_50V7K 10K_0402_1% UMA@ UMA@ PC89 VCORE
1
1000P_0402_50V8-J UMA@
10K_0402_1%
VBOOT
2
PR114 V_GT PR113
PR112
1 2
1
COMPA
SET AT
UMA@
DIS@ PR168 27.4K_0402_1%
FBA
PR169 UMA@ 0_0402_5% IMAX SET
DIS@ CSNA <58>
0V AT 35A
UMA@ PR114 0_0402_5% 2 1
2
1
100_0402_1% 2 1 UMA@ PC90
4700P_0402_25V7K 0.047U_0402_16V7K
1 2
1
CSPA <58>
PC93 UMA@
0_0402_5% UMA@ PR117 1 2 CSPA
2
PR116 UMA@ PR115
PR110 <5> VGFX_VSSSENSE 1 2 2K_0402_1% 2 1 6.98K_0402_1%
UMA@ PR118 0_0402_5%
2
UMA@ 0_0402_5% GFXVR_IMON <45>
16.5K_0402_1%
2
DIS@ 412_0402_1% UMA@ PR119 23.2K_0402_1% PR119
UMA@ PR125
2
3 3
UMA@ PR122 2 1 PWM1 PWM3
1
PR164 UMA@ PC91 1 2 2 1

0_0402_5% 0_0402_5% 1000P_0402_50V8-J 2 1 DIS@
DIS@ 1 UMA@ PC95
2
.1U_0402_16V7K
470P_0402_50V7K
1500P_0402_50V7K
1
1
0_0402_5% UMA@ 0_0402_5% VCORE
UMA@ PC94 22P_0402_50V8J
1 2 UMA@ PR124 PWM PR127
1.82K_0402_1%
IMAX SET
1
<5> VGFX_VCCSENSE PR120 PR126 88.7K_0402_1%
UMA@ PR131 UMA@ PC96
1 2 ADDRESS
8.06K_0402_1% UMA@ PC97 10K_0402_1% AT 112A
1
2
PR128 UMA@ PR129 820P_0402_25V7 UMA@ PR130
PC92
2
1CSNA
UMA@
+VGFX_CORE 1 2 2 1 1 2 2
PR121 10_0402_1% 10_0402_1%
PR166 0_0402_5%
2
1
100_0402_1% DIS@
2
UMA@ PC98 UMA@ UMA@ PR132

1
2
4700P_0402_25V7K
UMA@ PR123
UMA@ PR128
2 1
1K_0402_1%
4.02K_0402_1%
2
0_0402_5% 3.3K_0402_1%
1
1
1
PC100 UMA@
1
1000P_0402_50V7K
1
2
UMA@ PR135
75K_0402_1%
DIS@
CSCOMOA
FBA 2 1 UMA@ PR137

UMA@ PR136 21K_0603_1%
2 1 CSSUMA 2 1CSPA
100P_0402_50V8J
2
165K_0402_1%
UMA@ PC99
2 1
UMA@ PR133 1K_0402_1%
UMA@ PC101
1
220K_0402_5%_ERTJ0EV224J 1 2
UMA@ PH5
330P_0402_50V7K
2
UMA@ PC102
1 2
1
PR134
47_0402_1%
1200P_0402_50V7K
DIS@ PR165
1
2 1
UMA@
4 0_0402_5% 4
DIFFOUTA

CPU_CORE_1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
A B C D E F G H
5 4 3 2 1
HCB4532KF-800T90_1812
PL17 +CPU_12V2
1 2
FDMS7696A_POWER56-8-5
+12V2 HCB4532KF-800T90_1812
PC105
PL18
10U_1206_25V6M
1U_0805_25V6K
1 2
+CPU_12V2 PC103
1
470P_0402_50V7K
1000P_0402_50V7K
1 1 1
PC104
BST_CPU1A PQ15 PQ16 PC106
10U_1206_25V6M
1 2
1
+ + + @ 10U_1206_25V6M
2
PC131
PC197
PC198
PC196 PC132 PC133 PC134
470P_0402_50V7K 220U_25V_M 220U_25V_M 220U_25V_M PR138 0.22U_0603_25V7K
2
2
2 2 2 2.2_0603_1% PU10 4 4
DH_CPU1
D D
1 2 BST_CPU1 1 BST FLAG 9
+CPU_12V2
+CPU_CORE
2 8 DH_CPU1 PL13
<57> PW M1 PWM DRVH 0.36UH_FDU1040J-H-R36M=P3_33A_20%
3
2
1
3
2
1
<57> DRVON 2 PR1401 49.9_0402_1%3 7 LX_CPU1 1 4
EN SW
PC117
@
10U_1206_25V6M
1U_0805_25V6K
2 1 4 6 2 3
PC115 VCC GND
5
PQ24
470P_0402_50V7K
+V_5V
PC116
BST_CPU3A 1 2 PQ23 PC118 PR141 5 DL_CPU1 PQ19 PQ20
DRVL
1
10U_1206_25V6M
PC201
2.2_0402_1%
2
NCP5911MNTBG_DFN8_2X2
4.7_1206_5%
0.22U_0603_25V7K
1
PR146
DH_CPU3
2
PR144
2.2_0603_1% PU12 4 4 PC111 4 4
1 2 BST_CPU3 1 9 1U_0603_25V6K
2
BST FLAG
1
<57> PW M3 2 8 DH_CPU3 PL15
PR147 49.9_0402_1% PWM DRVH 0.36UH_FDU1040J-H-R36M=P3_33A_20%
3
2
1
3
2
1
3
2
1
3
2
1
<57> DRVON DRVON 2 LX_CPU3
1000P_0603_50V7K
1 3 EN SW 7 1 4 +CPU_CORE
PC113
2 1 4 6 PQ28 2 3 FDMS0309S_POW ER56-8-5
VCC GND
470P_0402_50V7K
0.1U_0402_25V4K
+V_5V
2
1
PR148 5 DL_CPU3
DRVL
1
2.2_0402_1% <57> <57> CSP1 CSN1
PC200
PC210
4.7_1206_5%
2
1
2
PR149
PC123 4 4
1U_0603_25V6K +CPU_12V2
2
1
3
2
1
3
2
1
@
1000P_0603_50V7K
1
C C
PC124
PC107
PC109
PQ27 PQ18
10U_1206_25V6M
1U_0805_25V6K
1
1
BST_CPU2A 1 2 PQ17
PC108
<57> <57> CSP3 CSN3 PC110
FDMS0309S_POW ER56-8-5 FDMS0309S_POW ER56-8-5 10U_1206_25V6M
2
PR139 0.22U_0603_25V7K
DH_CPU2
2.2_0603_1% PU11 4 4
1 2 BST_CPU2 1 BST FLAG 9
+CPU_CORE
2 8 DH_CPU2 PL14
3
2
1
3
2
1
2 PR142 1 49.9_0402_1%
3 EN 7 LX_CPU2 1 4
UMA@ <57> DRVON SW
2 1 4 VCC GND 6 2 3
5
HCB4532KF-800T90_1812 +CPU_12V2
PL22 @ PJ31 +V_5V PR143 5 DL_CPU2 PQ21 PQ22
+GFX_12V2 2 2.2_0402_1% DRVL
470P_0402_50V7K
1 2 1
2 1
2
UMA@ NCP5911MNTBG_DFN8_2X2
4.7_1206_5%
10U_1206_25V6
1
PC128 UMA@
PC130 UMA@
JUMP_43X118
1U_0805_25V6K
PC127
5
PR145
PC202
PC112 4 4
BST_GFXA 1 2 PC129 UMA@ PC209 1U_0603_25V6K
2
10U_1206_25V6 0.1U_0402_25V4K
2
1
PR154 UMA@ 0.22U_0603_25V7K
3
2
1
3
2
1
2.2_0603_1% PU14 UMA@
1000P_0603_50V7K
4
PC114
1 2 BST_GFX 1 BST FLAG 9
UMA@ PQ31
<57> PW MA 2 8 DH_GFX FDMS7696A_POW ER56-8-5 PL19 UMA@
2
PR155 49.9_0402_1% PWM DRVH 0.36UH_FDU1040J-H-R36M=P3_33A_20%
3
2
1
<57> DRVON DRVON

2 1 3 7 LX_GFX 1 4
EN SW +VGFX_CORE
UMA@ <57> <57> CSP2 CSN2
B 2 1 4 6 2 3 B
VCC GND
5
+CPU_12V2
+V_5V
PR156 5 DL_GFX
2.2_0402_1% DRVL FDMS0309S_POW ER56-8-5
2
UMA@ NCP5911MNTBG_DFN8_2X2
4.7_1206_5%
1
PQ34 UMA@
5
UMA@
PR157
PC121
PC135 @
10U_1206_25V6M
1U_0805_25V6K
4 PC119
1
1U_0603_25V6K PQ25 PQ26
2
PC120
UMA@ BST_CPU4A 1 2 PC122
1
10U_1206_25V6M
DH_CPU4
2
3
2
1
PR150 0.22U_0603_25V7K
1000P_0603_50V7K
4 4
1
UMA@ PC136
2.2_0603_1% PU13
1 2 BST_CPU4 1 BST FLAG 9 FDMS7696A_POW ER56-8-5
<57> <57> CSPA CSNA
+CPU_CORE
2
2 8 DH_CPU4 PL16
3
2
1
3
2
1
VGFX: DRVON
2 PR1511 49.9_0402_1% 3 7 LX_CPU4 1 4
<57> DRVON EN SW
Cout ESR= m ohm Rdson=3~3.6m
470P_0402_50V7K
2 1 4 VCC GND 6 2 3
5
Ipeak=35 A, Imax=25 A +V_5V
PR152 5 DL_CPU4 PQ30 PQ29
<BOM Structure>
Delta I= DRVL
PC203
2.2_0402_1%
4.7_1206_5%
PR153
OCP= 40 A
2
PC125 4 4
1U_0603_25V6K
1000P_0603_50V7K
3
2
1
3
2
1
PC126
A CPU_CORE: A
<57> <57> CSP4 CSN4
Cout=22U*18+ 390u 10m*4+560u 10m*3 +330u 9m*3 +560u 15m*2
2
Rdson=3~3.6m
Ipeak= A, Imax=85 A
F=338k hz
Delta I= Security Classification Compal Secret Data Compal Electronics, Inc.
OCP= 135 A CPU_CORE_2
5 4 3 2 1
5 4 3 2 1
HCB4532KF-800T90_1812
+VGA_12V2 2 1 +12V2
PL21 DIS@
+3VS
10U_1206_25V6
10U_1206_25V6
10U_1206_25V6
10U_1206_25V6
1
1
PC139
PQ11 DIS@
PC137
PC142
PC144
D PQ33 D
2
5
5
DIS@
1
DIS@
PR235
100K_0402_5%
DIS@ DIS@
PC53 4 4 FDMS7696A_POW ER56-8-5 DIS@ DIS@ DIS@ DIS@
PR161
2
BST_VGA 1 2 1 2
2.2_0603_5%
<56> VGA_PG PU15
UG_VGA
0.22U_0603_25V7K
1 10
3
2
1
3
2
1
DIS@ PR57 PGOOD VBST
1 2 TRIP_VGA 2 9 UG_VGA
DIS@ PR158 TRIP DRVH 0.36UH_MMD-12CE-R36M-M1L_34A_20%
100K_0402_1%
1 2 EN_VGA 3 8 SW _VGA 1 2
<24,45,49,53,54,56> SUSP# EN SW +VGA_CORE
150K_0402_1%
FB_VGA 4 7 +V_5V DIS@ PL20
VFB V5IN +V_5V
1
1000P_0402_50V7K
DIS@ PC140 RF_VGA 5 6 LG_VGA 1 1
1U_0603_6.3V7K
RF DRVL
1
0.1U_0402_16V7K DIS@
560U_2.5V_M
560U_2.5V_M
2
1
PR170 + +
DIS@ PC141
DIS@ PC143
PC205
PC206
TP 11
PQ35
1 2 VGA_PG PC62 PR159 DIS@
2
@ 470K_0402_5% TPS51218DSCR_SON10_3X3 1U_0603_6.3V6M 4.7_1206_5%
0_0402_5%
2
2
DIS@ DIS@ 2 2
PR160
2
4 4
1
1
PC138 DIS@
1
PR162 DIS@
1000P_0603_50V7K
470K_0402_5%
3
2
1
3
2
1
2
DIS@
C
ESR=10m ohm C
2
DIS@
PQ32
FDMS0309S_POW ER56-8-5
PR54 DIS@
PR56 DIS@
2.87K_0402_1% 10_0402_5%
2 1 2 1
VGA_SENSE <21>
+3VS
1
PR225
1
11.3K_0402_1%
DIS@ PR228
10K_0402_1%
+3VS
2
2
DIS@
DMN66D0LDW-7_SOT363-6
DIS@ PR226
15K_0402_1%
2
3
D 47K_0402_1%
1
PQ47B
PR55
5 2 1
G DIS@ PR229
1
10K_0402_1%
DIS@ S DIS@
4700P_0402_16V7K
4
DIS@ PR163 PR227

SSM3K7002FU_SC70-3
2
D
1
PQ48
10_0402_5% 47K_0402_1%
DIS@ PC177
B B
2 1 2 2 1 GPU_VID1 <22>
2
<21> GND_SENSE G
S
3
4700P_0402_16V7K
1
1
+3VS
PC181 VFB=0.7V
PR231 DIS@
2
3.92K_0402_1%
Fsw=290 KHz
1
DIS@
2
PR234 DIS@ PR230

PQ47A DIS@ 47K_0402_1% 47K_0402_1%
DMN66D0LDW -7_SOT363-6 2 1 Cout ESR=10m ohm/2 Rdson=4.3~5.2m ohm
DIS@ PR233
Ipeak=35.7 A, Imax=25 A Iocp=42.48A
2
6
D 10K_0402_1%
2 2 1 GPU_VID0 <22> Delta I=5.35 A
G
2200P_0402_50V7K
S
1
PC178
Iocp=Vtrip/(Rdson*8)+1/2delta I
=51.1~42.8 A
2
DIS@
GPU_VID1 GPU_VID0 VGA_CORE
1 1 0.9V (Default)
1 0 0.825V
A A
0 1 1.075V

Issued Date 2011/07/20 Title
2010/07/20 Deciphered Date
VGA_CORE
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title
<Title>

A PLA00 M/B LA-6951P Schematic 0.3

5 4 3 2 1
5 4 3 2 1
Intel Sandy Bridge- Desktop

PU10, PU11, +CPU_CORE +CPU_CORE
+12V2 PU12,PU13, PU14
PJP2 1.1V VCC CORE 85A
NCP5911MNTBG +VGFX_CORE +VGFX_CORE
0.25~1.52V VGFX_CORE 35A
PU6 +1.05VS PU16 +VCCSA
TPS51218DSCR 0.9V VCCSA 8.8A
APL5601
+1.5V +1.5V 1.5V VDDQ 4.75A
PU18
D G5603RU1U +1.05VS D
1.05VS VCCIO 8.5A
+V_3.3V +1.8VS
+12V1 PU3 PU4 1.8V VCCPLL 1.5A
PJP1 RT8205EGQW APL5930KAI
RAM DDRIII SODIMM X 4

+V_5V U34 +5VS +1.5V
1.5V VDD_MEM 14A
AO4468
+0.75VS PU8
0.75V VTT_MEM 0.4A
APL5336KAI
+5VSB
VGA Nvdia N12P_GT

PU15 +VGA_CORE +VGA_CORE
TPS51218DSCR 0.825~1.075V VDD 35.71 A
FB_DLLAVDD 100mA
FB_PLLAVDD 100mA
IFPAB_PLLVDD 220mA
IFP[C..F]_IOVDD 1140mA
U50 +1.05VS_DGPU 1.05VS_DGPU PEX_IOVDD/Q 1720mA
PEX_PLLVDD 120mA
SI4856ADY PLLVDD 60mA VRAM 1GB *8
SP_PLLVDD 45mA
VID_PLLVDD 45mA 64Mx16 (H5GQ1H24AFR-T2L)
PU17 +VRAM_1.5VS +VRAM_1.5VS

1.5V FBVDDQ 10.95A 1.5V 13.84 A
C G5603RU1U C
+3VS_DGPU VDDR3 60 mA
U35 +3VS 3.3V A2VDD 130 mA
AO4468 PJ26
U51 +12VS
AO4413 Intel Cougar Point- H67
+5VSB +3VSB
PU2 V_PROC_IO 1mA
SY8033BDBC VccCore 1.44A
+3VALW VccDMI 57mA
PJ21 PJ28 1.05V
+1.05VS_PCH
PJ29 VccADPLLA 100mA

VccADPLLB 100mA
PJ23 VccIO 4.07A
VccASW 1.61A
+5VALW
+1.8VS 1.8V VccDFTERM 200mA
+INVPWR_B+ VccVRM 159mA
Vcc3_3 409mA
+V_3.3V +3VS
VccADAC 68mA
VccSPI 20mA
U22 3.3V VccDSW 3mA
G9141P11U +3VALW VccSus3_3 97mA
B VccSusHDA 1mA B
LCD Inverter FAN
+1.2VALW
+5VS +5VS
V5REF 1mA
+12V1 1000mA +5VALW 5V
B+ 300mA V5REF_Sus 1mA
+5VALW
RTC RTCVCC VCCRTC
+V_5V Bettary
U36
USB2.0 X4
USB3.0X2 U37 U33
AO4468
+5VALW 1800mA UB4
3500mA
UB6 +5VS
+1.5VS
+V_3.3V
+3VS
UB1 UB2
+1.05V +3V
A USB 3.0 DAC Audio AMP Audio Codec LAN Realtek EC Realtek A
ALC106 X3 SATA(HDD/ODD) LCD 23" SSD Mini Card X2 Bluetooth CAMERA Touch Screen
NEC UPD720200F1 (TAS3208/PCM1606) ALC662 intel 82579 RTD2667 ENE KB930 RTS5209
+V_5V 3360mA +5VS 38mA +3VALW 201mA +3VS 600mA +12VS 2A +V_3.3V 20mA +V_5V 3850mA +3VS 1.1A +1.5VS 1000mA +3VS 60mA
+V_5V 3360mA +V_5V 3360mA +3VS 2A +3VS 110mA +3VS 130mA +5VS
+3VS 23mA +1.2VALW 300mA +5VS 700mA +3VALW 660mA
Security Classification Compal Secret Data

PLA00 POWER DELIVERY CHART
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom PLA00 M/B LA-6951P Schematic 0.3
5 4 3 2 1
5 4 3 2 1
COMPAL CONFIDENTIAL
MODEL NAME: PLA00 Power Sequence Block Diagram (Discrete)
PCB NAME: LA6951P
D REVISION: 0.3 D
DATE: 2010/10/26
17+EC_PWROK
+5VSB +3VSB 18
+5VSB
PU2 24 +SYS_PWROK
6 +EC_RSMRST#
+PCH_RSMRST#
PS_ON# EC_ON#
PS_ON# 7 PBTN_OUT#
PSU_PG PJP2 PSU_PG

2 PCH 19 DRAMPWROK
SLP_S3# 9
PSU 20 H_CPUPWRGD
PU3 5 35V_PG SLP_S5# 8 CPU
+12V1
+V_5VP
EC 25 +PLT_RST
+VGFX_CORE
+12V2 +V_3.3VP GFX
3 +12V1
+CPU_CORE
+V_5V(+5VALW)
C PU14 22 C
+12V2 +V_3.3V(+3VALW)
PU10 PU11 PU12 PU13
PJP1 4 +VCCSA_PG 21
+3VSB 15 VIDSCLK
VIDSOUT
PU9 VID_ALERT
1 R731 16 +CPU_CORE VGATE
D39 23
ON/OFFBTN# ON/OFF VR_ON +VGFX_CORE
12
+12V1 U18 10
SYSON
+1.5VP(+1.5V)
SUSP# +1.5V U33
11 +1.5VS
B
+1.5VP PU8 B
+0.75VS +V_5V U34

+5VS
+12V2 PU15 +12V2 PU6
+VGA_CORE +1.05VS +V_3.3V U35
VGA_PG +3VS
13
+12V2 PU17 +12V1 U51
RC
+VRAM_1.05VS +12VS
14 +1.05VS PU16
+12V2 +VCCSA +V_3.3V PU4
U50
+1.8VS
A
+1.05VS_DGPU A
VCCSA_PG15

Power Sequence Block Diagram
Custom
5 4 3 2 1
www.s-manuals.com

Compal La-6951p r0.3 Schematics

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PLA00 LA6951P Schematics Document 2

Intel Sandy Bridge Processor with DDRIII + Cougar Point

Security Classification Compal Secret Data Compal Electronics, Inc.

AMP x3 INT EXT KBC

SPK 3W x5 USB2.0 AV-IN

3D Scalar Board Dual USB2.0 x2 USB2.0/3.0 HDMI OUT

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

DMI_PTX_HRX_N[0..3] <14> PEG_GTX_C_HRX_P[0..15] <22>

DMI_HTX_PRX_N[0..3] <14> PEG_HTX_C_GRX_P[0..15] <22>

Workstation. T3 PE_RX#[2] PE_TX#[2] R5

24.9_0402_1% 2 1 R1 PEG_IRCOMP B5 PEG_ICOMPO H_FDI_TXN[0..7] <16>

+1.05VS 24.9_0402_1% 2 1 R2 FDI_ICOMP AE2 LINK

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_VREF AJ22 C40 CLK_CPU_ITP_R T80

DDR_VREF CFG1 CFG[0] BPM#[0]

1 CFG3 K36 G40

CFG8 CFG[7] BPM#[7]

PEG Static x4 Lane Numbering Reversal. RSVD AD34 @

PCIE Port Bifurcation Straps

74AHC1G09GW _TSSOP5 R294

DDR_A_MA0 AV27 AJ3 DDR_A_D0 <REV>

AV13 AK3 DDR_A_DQS0 AN16 AH7 DDR_B_DQS0

LOTES_ACAZIF096P01_SANDYBRIDGE 1 OF 11 LOTES_ACAZIF096P01_SANDYBRIDGE CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

10U_0805_6.3V6M 8.8A H10 VCCSA

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D17 41 42 DDR_A_D21 DDR_A_DQS2 47 48

2 VSS18 DQ22 VSS20 DQ28

DDR_A_D27 DQ26 DQ30 DDR_A_D31

177 178 183 184

C112 DDR_A_D57 183 184 189 190

195 196 201 202 D_CK_SCLK

197 198 +0.75VS 203 204 +0.75VS

+0.75VS 203 204 +0.75VS 1 1

2 2 DDR_A_DM1 R23 1 2 0_0402_5%

DDR_A_DM2 R24 1 2 0_0402_5%

Layout Note:Place C124 on Bottom Layer at DIMM Layout Note:

DDR_B_D16 39 40 DDR_B_D20 +1.5V DDR_B_D17 41 42 DDR_B_D21

DQS2 VSS17 VSS18 DQ22

DDR_B_D19 53 54 C129 55 56 DDR_B_D28

DDR_B_DM3 VSS22 DQS#3 DDR_B_DQS3 DM3 DQS3

DDR_B_D50 175 176 DDR_B_D55 DDR_B_D51 177 178

179 180 DDR_B_D60 DDR_B_D56 181 182 DDR_B_D61

1 1 185 186 DDR_B_DQS#7 DDR_B_DM7 187 188 DDR_B_DQS7

DQ59 DQ63 R50 VSS51 VSS52

SATA3COMPI AE54 R52

PCH_SATALED# R54 1 2 10K_0402_5%

7/30 R512--- CRB:10K ohm PD to GND;EDS:10K ohm PU PCH_GPIO39 R512 1 2 10K_0402_5%

CLK_BUF_PCIE_SATA# R361 1 2 10K_0402_5%

HDA for AUDIO EC_SMI# R324 2 1 10K_0402_5%

C147 J2 R342 2 @ 1 0_0402_5%

R96 2 4.7K_0402_5% SPI_HOLD1# PCH_SPI_MOSI_1 10K_0402_5% R319 4.7K_0402_5%

Q32 +RTCVCC R90 1 2 20K_0402_1% PCH_RTCRST# SPI ROM Footprint 200mil 6

EC_PW ROK <45>

4 PLT_RST# PLT_RST# <22,38,39,44>

390K_0402_5% 2 1 R105 PCH_INTVRMEN