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    Dell XPS 13 9380 LA-E672P Schematic

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    leandro podda
    The document provides details on the model, PCB number, and BOM part number for a laptop. It lists various components used in the laptop including the processor, memory, storage, ports, cameras, and wireless modules. The document contains schematics and specifications for the different parts and is confidential property of the company.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Dell XPS 13 9380 LA-E672P Schematic

    Uploaded by

    leandro podda
    115 views100 pages
    The document provides details on the model, PCB number, and BOM part number for a laptop. It lists various components used in the laptop including the processor, memory, storage, ports, cameras, and wireless modules. The document contains schematics and specifications for the different parts and is confidential property of the company.

    Copyright

    © © All Rights Reserved

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    PDF, TXT or read online from Scribd

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    The document provides details on the model, PCB number, and BOM part number for a laptop. It lists various components used in the laptop including the processor, memory, storage, ports, cameras, and wireless modules. The document contains schematics and specifications for the different parts and is confidential property of the company.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    115 views100 pages

    Dell XPS 13 9380 LA-E672P Schematic

    Uploaded by

    leandro podda
    The document provides details on the model, PCB number, and BOM part number for a laptop. It lists various components used in the laptop including the processor, memory, storage, ports, cameras, and wireless modules. The document contains schematics and specifications for the different parts and is confidential property of the company.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 100

    A B C D E

    MODEL NAME : ZZZZZZ


    PCB NO : LA-E672P
    BOM P/N : 43xxxxx
    ZZZ
    1 1

    MB_PCB

    Dell/Compal Confidential
    2 2

    Schematic Document
    Italia WHL

    3 2018-10-22 3

    @ : Nopop Component
    L@: Intel 8265 Rev: 1.0 ( A00)
    XPS@ : Killer1435-S
    DCI@ : for DCI Debug
    DEBUG@ : for Other Debug
    @CONN@ : Reserve Connector Component
    @EMC@ : Reserve EMC Component
    CONN@ : Connector Component
    EMC@ : EMC Component
    RF@ : RF Solution Component
    4
    XDP@ : XDP Debug Component 4

    RTD3@ : for TBT RTD3 and follow Merion


    @RTD3@ : No TBT RTD3 DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2016/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P01-Cover Page
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672 0.1
    Date: Tuesday, October 30, 2018 Sheet 1 of 100
    A B C D E
    A B C D E

    eDP Panel Conn. eDP 1.3

    I2C Channel A
    + Touch Screen Memory Bus (LPDDR3) LPDDR3 8Gb or 16Gb (x32) * 2
    (IPT) Dual Channel P.23
    P.38
    1 1.2V LPDDR3 2133 MHz Non-Interleave Channel B 1

    LPDDR3 8Gb or 16Gb (x32) * 2


    DP 1.2 X2 P.24

    TI PD USB2.0 Alpine Ridge Intel


    USB TypeC Conn. Thunderbolt PCIe Gen3 X 4
    TPS65982 P.43 P.46
    P.41 Whiskey Lake
    SPI SPI ROM
    TI PD USB TypeC Conn. USB2.0 DP 1.2 X1
    TPS65982 P.44 P.46 ULT 128/256Mb P.08
    USB3.1
    DP Switch
    TI PD USB TypeC Conn. Retimer USB2.0
    TPS65982 P.45 P.47 PS8802 P.71 TPM2.0
    Nuvoton P.66
    USB2.0 15W TDP
    Digital Camera
    P.38 DMIC
    USB2.0 M.2 Socket3 M-Key
    PD SATA3 X1 / PCIE X4
    2 2
    SSD P.67

    USB2.0 WLAN1216
    CardReader PCIE Gen2
    uSD 4.0 PCIE WLAN
    P.70 RTS5242 P.70 BT4.0
    P.52

    Fingerprint USB2.0
    P.66
    Audio/B with FPC

    HDA Audio Codec Headphone Jack


    I2C ( iPhone & Nokia compatible)

    Precision Touch Pad ALC3271 P.55


    P.56

    P.66

    I2S
    3 SMBus 3
    DMIC
    Fan conn. x 2 Page 6 ~ 19 Audio AMP Int. Speaker
    P.67 ALC1309 P.56 P.56

    RTC conn. ESPI


    P.64

    User Interface
    DC/DC Interface CKT.
    P.77~78
    EC
    PS/2 MEC 5105 Battery Gauge LED
    P.58 ~59 P.63
    Power Circuit DC/DC
    P.81~100
    BCBUS
    WIN debug
    P.10
    KBC/B
    Keyboard Controller KSIO Int.KBD
    4
    ECE1117B 4

    Front Side LED + 4 MIC

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    P02-Block Diagram

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 2 of 100
    A B C D E
    A

    Board ID Table for AD channel


    USB PORT# DESTINATION
    RE194 CE75 REV
    CPU 4+2 2+2 VPro
    240K 4700p X00 1 PD PORT3
    130K 4700p X01 PCH
    62K 4700p X02 Italia WHL USB 2.0 2 NC
    33K 4700p X03 EDO30 Port
    8.2K 4700p A00 3 NC
    Mapping
    4.3K 4700p
    2K 4700p 4 NC
    1K 4700p
    5 IR Camera & Cam
    BOARD_ID rise time is measured from 5%~68%.
    6 USB PD PORT2
    SMBUS Control Table

    BATTERY Audio 7 NGFF WLAN BT


    SOURCE PD1 PD2 PWR_MON 5105 XDP eDP Touch Pad Touch S IR_THER_S
    Charger AMP
    8 NC
    SMB00_CLK
    SMB00_DATA
    MEC5105
    V
    9 USB PD PORT1
    SMB01_CLK
    SMB01_DATA
    MEC5105
    V
    10 Fingerprint
    SMB02_CLK
    SMB02_DATA
    MEC5105
    V
    1 DP MX (PS8743B)
    SMB04_CLK
    SMB04_DATA
    MEC5105
    V PCH
    USB 3.0 2
    SMB05_CLK
    SMB05_DATA
    MEC5105
    V Port
    Mapping
    SMB07_CLK
    SMB07_DATA
    MEC5105
    V
    SMB10_CLK
    SMB10_DATA
    MEC5105
    V
    PCH_SML1CLK
    PCH_SML1DATA
    PCH
    V DDI PORT# DESTINATION
    PCH
    SMBCLK
    SMBDATA
    PCH
    V DDI 1 Alpine Ridge
    1
    I2C0_CLK PCH
    V Port 1

    I2C0_DATA 2 Alpine Ridge


    Mapping
    I2C1_CLK
    I2C1_DATA
    PCH
    V
    I2C2_CLK
    I2C2_DATA
    PCH
    V

    DIFFERENTIAL CLK# DESTINATION PCI EXPRESS PORT# DESTINATION


    SATA PORT# DESTINATION
    CLKOUT_PCIE0 Alpine Ridge Lane 5 Card Reader
    SATA-0 NC
    CLKOUT_PCIE1 NGFF WLAN Lane 6 NC SATA-1A NC
    CLKOUT_PCIE2 NC Lane 7 NGFF WLAN SATA-1B NC
    CLKOUT_PCIE3 M.2 SSD Lane 8 NC
    CLK SATA-2 M.2 SSD
    CLKOUT_PCIE4 NC Lane 9 Alpine Ridge

    CLKOUT_PCIE5 Card Reader Lane 10 Alpine Ridge

    FLEX CLK# DESTINATION Lane 11 Alpine Ridge Symbol Note :

    CLKOUT_LPC_0 ESPI 5105 Lane 12 Alpine Ridge : means Digital Ground

    CLKOUT_LPC_1 NC Lane 13 M.2 SSD


    CLKOUT_ITPXDP XDP CONN Lane 14 M.2 SSD
    : means Analog Ground
    Lane 15 M.2 SSD

    Lane 16 / SATA 2 M.2 SSD DELL CONFIDENTIAL/PROPRIETARY


    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P03-Notes List
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 3 of 100
    A
    5 4 3 2 1

    SIO_SLP_S4# & SIO_SLP_S0# & CPU PWR


    SUS_ON_EC RUN_ON_P
    SY8210A TPS22961 PCH PWR
    (PU600) 5500mA +1.2V_DDR (UZ5) 260mA +VCCPLL_OC +1.0V_MPHYGT
    GPU PWR
    Peripheral Device PWR
    SM_PG_CTRL

    600mA +0.6VS +1.0V_MPHYAON


    Type C X 3
    SIO_SLP_SUS# &
    SIO_SLP_SUS# SUS_ON_P
    D SY8286 TPS22961 D

    (PU700) 880mA +1.0VA 240mA +1.0V_VCCST


    (UZ3)
    SIO_SLP_S3# & SIO_SLP_S0# &
    RUN_ON_EC RUN_ON_P
    TPS62134A TPS22961
    (PU1400) 3100mA +1.0VS_VCCIO 40mA +1.0V_VCCSTG
    (UZ4)
    ISL88738
    (PU300) TPS62134B SIO_SLP_SUS#
    RUN_ON_P
    +1.0V_PRIM_CORE
    (PU1401) 2570mA
    200mA +5VS

    ALWON AUD_PWR_EN
    SY8288C AOZ1331
    (PU501) 530mA +5VALW (U12) 3150mA +5VS_AUDIO
    B+
    BATTERY SIO_SLP_SUS#
    (JT100) TLV6215
    (PU800) 210mA +1.8VA

    C C

    AUD_PWR_EN
    AOZ1331
    (U14) 400mA +1.8VS_AUDIO
    SY8286B
    (PU500)

    ALWON
    ENVDD
    590mA +3VALW SY6288C
    545mA +LCDVDD
    (UZ2)

    TP_PW_EN
    AP22850
    (U10) 35mA +3VS_TP

    PCH_PWR_EN
    AOZ1331 (SIO_SLP_SUS#)
    (U11) 535mA +3V_PCH
    RUN_ON_P
    B 2500mA +3.3VDX_SSD B

    AOZ1331 AUX_EN_WOWL
    (U13) 620mA +3VS_NGFF
    RUN_ON_P
    TLV62150R
    (PU900) 480mA +3VS
    3.3V_TS_EN
    TPS22961
    (UZ1) 300mA +3VS_TS
    SD_PWR_EN
    SUS_ON_P

    660mA

    1200mA +3VS_CR
    AUD_PWR_EN
    AOZ1331
    50mA +3VS_AUDIO ALS_I2C_INT#
    (U14)
    250uA +3VS_ALS_DB
    MP2949A AP22850
    PCH_PWR_EN
    (PU1501) EM1109
    60mA +1.2V_RUN
    (U502)
    IMVP_VR_ON

    EN_INVPWR

    590mA
    5100mA

    IMVP_VR_ON

    IMVP_VR_ON
    64000mA

    29000mA

    A A

    +INV_PWR_SRC +1.8VU DELL CONFIDENTIAL/PROPRIETARY


    +VCC_SA +VCC_GT +VCC_CORE
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P04-Power rails
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev

    WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 4 of 100
    5 4 3 2 1
    A B C D E F G H

    Reference [ BAX02-PWR Sequence_KBL-U22_DDR4_Volume_S0iX ]

    G3->S0 S0->S3/DS3 S0/ DS3 ->S0 S0->S5


    +3VL_RTC +3VL_RTC
    tPCH01_Min : 9 ms
    SOC_RTCRST# SOC_RTCRST#

    +19VB +19VB
    1 1
    +3VLP/+5VLP +3VLP/+5VLP

    EC_ON EC_ON
    tPCH04_Min : 9 ms
    +5VALW/+3VALW/+3VALW_DSW +5VALW/+3VALW/+3VALW_DSW
    Pull-up to DSW well if not implemented.
    PM_BATLOW# PM_BATLOW#

    PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)

    +3V_PRIM +3V_PRIM

    +1.8V_PRIM +1.8V_PRIM

    EXT_PWR_GATE# If EXT_PWR_GATE# Toffmin is too small, Pwr EXT_PWR_GATE#


    gate may choose to completely ignore it

    +1.0V_MPHYPLL +1.0V_MPHYPLL

    +1.0V_PRIM_CORE +1.0V_PRIM_CORE
    tPCH34_Max : 20 ms
    +1.0V_PRIM tPCH06_Min : 200 us +1.0V_PRIM

    SUSACK# SUSACK#
    tPCH02_Min : 10 ms
    PCH_DPWROK PCH_DPWROK
    tPCH03_Min : 10 ms
    EC_RSMRST# EC_RSMRST#
    tPLT02_Min : 0 ms Max : 90 ms
    2 2
    AC_PRESENT AC_PRESENT

    ON/OFF ON/OFF

    PBTN_OUT# PBTN_OUT#
    Minimum duration of PWRBTN# assertion = 16mS. PWRBTN# can assert before or after RSMRST#

    PM_SLP_S5# PM_SLP_S5#
    tPCH18_Min : 90 us
    ESPI_RST# ESPI_RST#

    PM_SLP_S4# PM_SLP_S4#

    SYSON SYSON

    +1.0V_VCCST/+1.0V_VCCSFR +1.0V_VCCST/+1.0V_VCCSFR

    +1.35V_VDDQ/+1.35V_VCCSFR_OC +1.35V_VDDQ/+1.35V_VCCSFR_OC

    PM_SLP_S3# PM_SLP_S3#

    SUSP# SUSP#
    tCPU04 Min : 100 ns
    +1.0VS_VCCSTG +1.0VS_VCCSTG
    tCPU10 Min : 1 ms
    3
    +1.0VS_VCCIO +1.0VS_VCCIO 3

    +5VS/+3VS/+1.5VS/+1.05VS
    +5VS/+3VS/+1.5VS/+1.05VS
    T4 = Min : 20ms Max : 30ms(EC Control)
    EC_VCCST_PG EC_VCCST_PG

    VR_ON VR_ON
    tCPU19 Max : 100 ns
    SM_PG_CTRL SM_PG_CTRL
    tCPU18 Max : 35 us
    +0.675VS_VTT +0.675VS_VTT
    tCPU09 Min : 1 ms
    +VCC_SA +VCC_SA

    +VCC_CORE +VCC_CORE

    +VCC_GT +VCC_GT

    VR_PWRGD VR_PWRGD
    tCPU16 Min : 0 ns
    PCH_PWROK PCH_PWROK

    H_CPUPWRGD H_CPUPWRGD

    SYS_PWROK SYS_PWROK
    4 4

    SUS_STAT# SUS_STAT#

    SOC_PLTRST#
    SOC_PLTRST#

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2013/07/04 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P05-Power Sequence
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 5 of 100
    A B C D E F G H
    5 4 3 2 1

    +3VS

    2 1 CPU_DP1_CTRL_CLK
    RC1 2.2K_0402_5% @ UCPU1A
    2 1 CPU_DP1_CTRL_DATA AL5 AG4
    <41> DDI1_PTX_TBRX_N0 AL6 DDI1_TXN_0 EDP_TXN_0 AG3 eDP_TXN0 <38>
    RC3 2.2K_0402_5% <41> <38>
    2 1 CPU_DP2_CTRL_CLK DDI1_PTX_TBRX_P0 AJ5 DDI1_TXP_0 EDP_TXP_0 AG2 eDP_TXP0
    <41> DDI1_PTX_TBRX_N1 AJ6 DDI1_TXN_1 EDP_TXN_1 AG1 eDP_TXN1 <38>
    RC5
    2
    2.2K_0402_5%
    1 CPU_DP2_CTRL_DATA
    NOTE: PORT B <41> DDI1_PTX_TBRX_P1 AF6 DDI1_TXP_1 EDP_TXP_1 AJ4 eDP_TXP1 <38> Support UHD
    <41> DDI1_PTX_TBRX_N2 AF5 DDI1_TXN_2 EDP_TXN_2 AJ3 eDP_TXN2 <38>
    RC7 2.2K_0402_5% <41> eDP_TXP2 <38>
    2 @ 1 CPU_DDPD_CTRL_CLK DDI1_PTX_TBRX_P2 AE5 DDI1_TXP_2 EDP_TXP_2 AJ2
    <41> DDI1_PTX_TBRX_N3 AE6 DDI1_TXN_3 EDP_TXN_3 AJ1 eDP_TXN3 <38>
    RC438 2.2K_0402_5% <41> <38>
    @ DDI1_PTX_TBRX_P3 DDI1_TXP_3 EDP_TXP_3 eDP_TXP3
    2 1 CPU_DDPD_CTRL_DATA Alpine Ridge AC4 +3VS
    RC437 2.2K_0402_5% <41>
    D DDI2_PTX_TBRX_N0 AC3 DDI2_TXN_0 AH4 D
    <41> DDI2_PTX_TBRX_P0 DDI2_TXP_0 EDP_AUX_N eDP_AUXN <38> I2C2_IRQ_TS
    AC1 AH3 RH83 1 2 100K_0402_5%
    <41> DDI2_PTX_TBRX_N1 DDI2_TXN_1 EDP_AUX_P eDP_AUXP <38>
    AC2
    <41> DDI2_PTX_TBRX_P1 AE4 DDI2_TXP_1 AM7
    +3V_PCH NOTE: PORT C <41> DDI2_PTX_TBRX_N2 DDI2_TXN_2 DISP_UTILS
    AE3
    <41> DDI2_PTX_TBRX_P2 AE1 DDI2_TXP_2 AC7
    <41> DDI2_PTX_TBRX_N3 DDI2_TXN_3 DDI1_AUX_N CPU_DDI1_AUXN <41>
    AE2 AC6
    <41> DDI2_PTX_TBRX_P3 DDI2_TXP_3 DDI1_AUX_P CPU_DDI1_AUXP <41>
    AD4
    2

    DDI2_AUX_N CPU_DDI2_AUXN <41> EDP_HPD


    RC443 AD3 2 1
    DDI2_AUX_P CPU_DDI2_AUXP <41>
    AG7 100K_0402_5% RC2
    4.7K_0402_5% DDI3_AUX_N AG6 PAD~D @ T1 CPU_DP1_HPD 2 1
    DDI3_AUX_P PAD~D @ T2
    100K_0402_5% RC4
    1

    CPU_DP2_HPD 2 1
    GPPC_H21 CPU_DP1_HPD
    CN6 100K_0402_5% RC6
    GPP_E13/DDPB_HPD0/DISP_MISC0 CPU_DP2_HPD CPU_DP1_HPD <41>
    CM6
    GPP_E14/DDPC_HPD1/DISP_MISC1 CPU_DP2_HPD <41>
    LOW: 38.4/19.2MHZ (DEFAULT) CP7
    2

    GPP_E15/DPPD_HPD2/DISP_MISC2 I2C2_IRQ_TS <38>


    HIGH: 24MHZ CP6
    @ RC444 GPP_E16/DPPE_HPD3/DISP_MISC3 CM7 EDP_HPD
    20K_0402_5% GPP_E17/EDP_HPD/DISP_MISC4 EDP_HPD <38>
    COMPENSATION PU FOR eDP CK11
    All VREF traces should CAD Note: EDP_BKLTEN CG11 PANEL_BKLEN <38>
    1

    have 10 mil trace width Trace width=20 mils EDP_VDDEN CH11 ENVDD_PCH <58,77>
    EDP_BKLTCTL EDP_BIA_PWM <38>
    Isolation Spacing=25mil,
    Max length=100 mils.
    +3V_PCH
    RC8 1 2 24.9_0402_1% EDP_COMP AM6
    +1.0VS_VCCIO DISP_RCOMP
    0 = Master Attached Flash Sharing CPU_DP1_CTRL_CLK CC8
    2

    <41> CPU_DP1_CTRL_CLK CPU_DP1_CTRL_DATA CC9 GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#


    (MAFS) enabled. (Default) <41> CPU_DP1_CTRL_DATA
    @ RC445 1 = Slave Attached Flash Sharing GPP_E19/DPPB_CTRLDATA
    4.7K_0402_5% (SAFS) enabled. CPU_DP2_CTRL_CLK CH4
    C <41> CPU_DP2_CTRL_CLK CPU_DP2_CTRL_DATA CH3 GPP_E20/DPPC_CTRLCLK C
    <41> CPU_DP2_CTRL_DATA GPP_E21/DPPC_CTRLDATA
    1

    GPPC_H23 CPU_DDPD_CTRL_CLK CP4


    CPU_DDPD_CTRL_DATA CN4 GPP_E22/DPPD_CTRLCLK
    GPP_E23/DPPD_CTRLDATA
    2

    CR26
    @ RC446 GPP_H17 CP26 GPP_H16/DDPF_CTRLCLK
    GPP_H17/DDPF_CTRLDATA
    20K_0402_5% @ UCPU1I
    WHL-U42_BGA1528
    1

    CR30 CN27 CPU_C10_GATE#


    CNV_WR_D0N GPP_H18/CPU_C10_GATE# CPU_C10_GATE# <78,89>
    CP30
    CNV_WR_D0P CM27 1 of 20
    CM30 GPP_H19/TIMESYNC_0 +3V_PCH_DSW
    CN30 CNV_WR_D1N CF25 GPPC_H21
    CN32 CNV_WR_D1P GPP_H21 CN26 RTD3_CIO_PWR_EN
    CNV_WT_D0N GPP_H22 GPPC_H23 RTD3_CIO_PWR_EN <12,41>
    CM32 CM26
    CNV_WT_D0P GPP_H23

    2
    CK17
    CP33 GPP_F10 RH95
    CN33 CNV_WT_D1N BV35 TBT_RTD3_WAKE#
    CNV_WT_D1P GPD7 TBT_RTD3_WAKE# <41> 100K_0402_5%
    CN20
    CN31 GPP_F3

    1
    CP31 CNV_WR_CLKN CG25 TBT_RTD3_WAKE#
    CP34 CNV_WR_CLKP GPP_D4/IMGCLKOUT0/BK4/SBK4 CH25
    CN34 CNV_WT_CLKN GPP_H20/IMGCLKOUT_1
    CNV_WT_CLKP

    2
    CR20
    150_0402_1% 1 2 RC440 CP32 GPP_F12/EMMC_DATA0 CM20 MEM_CONFIG0 @ RC454
    150_0402_1% 1 2 RC439 CR32 CNV_WT_RCOMP_0 GPP_F13/EMMC_DATA1 CN19 MEM_CONFIG1
    CNV_WT_RCOMP_1 GPP_F14/EMMC_DATA2 20K_0402_5%
    CP20 CM19 MEM_CONFIG2
    GPP_F0/CNV_PA_BLANKING GPP_F15/EMMC_DATA3 CN18 MEM_CONFIG3

    1
    CK19 GPP_F16/EMMC_DATA4 CR18 MEM_CONFIG4
    CG17 GPP_F1 GPP_F17/EMMC_DATA5 CP18
    B GPP_F2 GPP_F18/EMMC_DATA6 CM18 B
    PCH_TBT_PERST# CR14 GPP_F19/EMMC_DATA7
    <41> PCH_TBT_PERST# GPP_C8/UART0_RXD
    CP14
    <59> SBIOS_TX 3.3V_CAM_EN# CN14 GPP_C9/UART0_TXD CM16
    <77> 3.3V_CAM_EN# HOST_SD_WP# GPP_C10/UART0_RTS# GPP_F20/EMMC_RCLK
    CM14 CP16
    <70> HOST_SD_WP# GPP_C11/UART0_CTS# GPP_F21/EMMC_CLK CR16
    CJ17 GPP_F11/EMMC_CMD CN16
    CH17 GPP_F8/CNV_MFUART2_RXD GPP_F22/EMMC_RESET#
    GPP_F9/CNV_MFUART2_TXD CK15 EMMC_RCOMP 1 2
    CF17 EMMC_RCOMP RC10 200_0402_1%
    GPP_F23/A4WP_PRESENT

    WHL-U42_BGA1528 570990_CFL_U_DDR4_SOCSYM_REV0P7.olb
    +3VS 9 of 20
    575962_WHL-U_DDR4_RVP_Sch_Rev0p5.pdf
    575414_WHL_U4plus2_Processor_Line_Ballout_Mech_Spec_Rev1p1.xlsm
    +3V_PCH
    1 2 HOST_SD_WP#
    RTD3@ RC395 GPIO Pin Pin Name Micron 4G Micron 8G Mircon 16G Hynix 4G Hynix 8G Hynix 16G Samsung 4G Samsung 8G Samsung 16G
    RC38 10K_0402_5% PCH_TBT_PERST# 2 1
    +1.8VA 10K_0402_5%
    GPP_F13 MEM_CONFIG0 0 1 0 1 0 1 0 1 0
    PCH_TBT_PERST# 1 2
    1 2 GPP_H17 100K_0402_5%~D @ RH90
    X04_05
    @ RH101 20K_0402_5% GPP_F14 MEM_CONFIG1 1 1 0 0 1 1 0 0 1
    +1.8VA 2133 Mbps
    GPP_F15 MEM_CONFIG2 0 0 1 1 1 1 0 0 0
    @ RH51 2 1 10K_0402_5% MEM_CONFIG0 @ RH52 2 1 10K_0402_5%

    @ RH53 2 1 10K_0402_5% MEM_CONFIG1 @ RH54 2 1 10K_0402_5% GPP_F16 MEM_CONFIG3 0 0 0 0 0 0 1 1 1


    A @ RH55 2 1 10K_0402_5% MEM_CONFIG2 @ RH56 2 1 10K_0402_5% GPP_F17 MEM_CONFIG4 1 1 1 1 1 1 1 1 1 A

    @ RH57 2 1 10K_0402_5% MEM_CONFIG3 @ RH58 2 1 10K_0402_5%

    @ RH59 2 1 10K_0402_5% MEM_CONFIG4 @ RH60 2 1 10K_0402_5%

    DELL CONFIDENTIAL/PROPRIETARY
    DDR Memory Configuratino Type Strap pin Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P06-MCP(1/14)DDI,EDP,CSI2,EMMC
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev

    WWW.AliSaler.Com 5 4
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    3 2
    Date:
    LA-E671P
    Monday, October 22, 2018
    1
    Sheet 6 of 100
    0.1
    5 4 3 2 1

    LPDDR3, Ballout for side by side(Non-Interleave)

    @
    <23> UCPU1B
    DDR_M0_D[0..15] DDR_M0_D0 A26
    DDR_M0_D1 D26 DDR0_DQ_0/DDR0_DQ_0 V32 DDR_M0_CLK#0 @ UCPU1C
    D DDR_M0_D2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0/DDR0_CKN_0 DDR_M0_CLK0 DDR_M0_CLK#0 <23,25> <23> DDR_M0_D[16..31] DDR_M0_D16 DDR_M1_CLK#0 D
    D28 V31 J22 AF28
    DDR_M0_D3 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_0/DDR0_CKP_0 DDR_M0_CLK#1 DDR_M0_CLK0 <23,25> DDR_M0_D17 DDR1_DQ_0/DDR0_DQ_16
    DDR1_CKN_0/DDR1_CKN_0 DDR_M1_CLK0 DDR_M1_CLK#0 <24,25>
    C28 T32 H25 AF29
    DDR_M0_D4 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1/DDR0_CKN_1 DDR_M0_CLK1 DDR_M0_CLK#1 <23,25> DDR_M0_D18 DDR1_DQ_1/DDR0_DQ_17DDR1_CKP_0/DDR1_CKP_0 DDR_M1_CLK#1 DDR_M1_CLK0 <24,25>
    B26 T31 G22 AE28
    DDR_M0_D5 DDR0_DQ_4/DDR0_DQ_4 DDR0_CKP_1/DDR0_CKP_1 DDR_M0_CLK1 <23,25> DDR_M0_D19 DDR1_DQ_2/DDR0_DQ_18
    DDR1_CKN_1/DDR1_CKN_1 DDR_M1_CLK1 DDR_M1_CLK#1 <24,25>
    C26 H22 AE29
    DDR_M0_D6 DDR0_DQ_5/DDR0_DQ_5 DDR_M0_CKE0 DDR_M0_D20 DDR1_DQ_3/DDR0_DQ_19DDR1_CKP_1/DDR1_CKP_1 DDR_M1_CLK1 <24,25>
    B28 U36 F25
    DDR_M0_D7 DDR0_DQ_6/DDR0_DQ_6 DDR0_CKE_0/DDR0_CKE_0 DDR_M0_CKE1 DDR_M0_CKE0 <23,25> DDR_M0_D21 DDR1_DQ_4/DDR0_DQ_20 DDR_M1_CKE0
    A28 U37 J25 T28
    DDR_M0_D8 DDR0_DQ_7/DDR0_DQ_7 DDR0_CKE_1/DDR0_CKE_1 DDR_A_CKE2 DDR_M0_CKE1 <23,25> DDR_M0_D22 DDR1_DQ_5/DDR0_DQ_21DDR1_CKE_0/DDR1_CKE_0 DDR_M1_CKE1 DDR_M1_CKE0 <24,25>
    B30 U34 G25 T29
    DDR_M0_D9 DDR0_DQ_8/DDR0_DQ_8 DDR0_CKE_2/NC DDR_A_CKE3 DDR_A_CKE2 <23,25> DDR_M0_D23 DDR1_DQ_6/DDR0_DQ_22DDR1_CKE_1/DDR1_CKE_1 DDR_B_CKE2 DDR_M1_CKE1 <24,25>
    D30 U35 F22 V28
    DDR_M0_D10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_3/NC DDR_A_CKE3 <23,25> DDR_M0_D24 DDR1_DQ_7/DDR0_DQ_23 DDR1_CKE_2/NC DDR_B_CKE3 DDR_B_CKE2 <24,25>
    B33 D22 V29
    DDR_M0_D11 DDR0_DQ_10/DDR0_DQ_10 DDR_M0_CS#0 DDR_M0_D25 DDR1_DQ_8/DDR0_DQ_24 DDR1_CKE_3/NC DDR_B_CKE3 <24,25>
    D32 AE32 C22
    DDR_M0_D12 DDR0_DQ_11/DDR0_DQ_11 DDR0_CS#_0/DDR0_CS#_0 DDR_M0_CS#1 DDR_M0_CS#0 <23,25> DDR_M0_D26 DDR1_DQ_9/DDR0_DQ_25 DDR_M1_CS#0
    A30 AF32 C24 AL37
    DDR_M0_D13 DDR0_DQ_12/DDR0_DQ_12 DDR0_CS#_1/DDR0_CS#_1 DDR_M0_ODT0 DDR_M0_CS#1 <23,25> DDR_M0_D27 DDR1_DQ_10/DDR0_DQ_26
    DDR1_CS#_0/DDR1_CS#_0 DDR_M1_CS#1 DDR_M1_CS#0 <24,25>
    C30 AE31 D24 AL35
    DDR_M0_D14 DDR0_DQ_13/DDR0_DQ_13 DDR0_ODT_0/DDR0_ODT_0 DDR_M0_ODT0 <23,25> DDR_M0_D28 DDR1_DQ_11/DDR0_DQ_27
    DDR1_CS#_1/DDR1_CS#_1 DDR_M1_ODT0 DDR_M1_CS#1 <24,25>
    B32 AF31 A22 AL36
    DDR_M0_D15 DDR0_DQ_14/DDR0_DQ_14 NC/DDR0_ODT_1 DDR_M0_D29 DDR1_DQ_12/DDR0_DQ_28
    DDR1_ODT_0/DDR1_ODT_0 DDR_M1_ODT0 <24,25>
    C32 B22 AL34
    <23> DDR_M0_D[32..47] DDR_M0_D32 DDR0_DQ_15/DDR0_DQ_15 DDR_M0_D30 DDR1_DQ_13/DDR0_DQ_29 NC/DDR1_ODT_1
    H37 AC37 A24 AG36
    DDR_M0_D33 DDR0_DQ_16/DDR0_DQ_32 DDR0_CAB_9/DDR0_MA_0 DDR_M0_CAB_9 <23,25> DDR_M0_D31 DDR1_DQ_14/DDR0_DQ_30DDR1_CAB_9/DDR1_MA_0 DDR_M1_CAB_9 <24,25>
    H34 AC36 B24 AG35
    DDR_M0_D34 DDR0_DQ_17/DDR0_DQ_33 DDR0_CAB_8/DDR0_MA_1 DDR_M0_CAB_8 <23,25> <23> DDR_M0_D[48..63] DDR_M0_D48 DDR1_DQ_15/DDR0_DQ_31DDR1_CAB_8/DDR1_MA_1 DDR_M1_CAB_8 <24,25>
    K34 AC34 G31 AF34
    DDR_M0_D35 DDR0_DQ_18/DDR0_DQ_34 DDR0_CAB_5/DDR0_MA_2 DDR_M0_CAB_5 <23,25> DDR_M0_D49 DDR1_DQ_16/DDR0_DQ_48DDR1_CAB_5/DDR1_MA_2 DDR_M1_CAB_5 <24,25>
    K35 AC35 G32 AG37
    DDR_M0_D36 H36 DDR0_DQ_19/DDR0_DQ_35 NC/DDR0_MA_3 AA35 DDR_M0_D50 H29 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_MA_3 AE35
    DDR_M0_D37 H35 DDR0_DQ_20/DDR0_DQ_36 NC/DDR0_MA_4 AB35 DDR_M0_D51 H28 DDR1_DQ_18/DDR0_DQ_50 NC/DDR1_MA_4 AF35
    DDR_M0_D38 DDR0_DQ_21/DDR0_DQ_37 DDR0_CAA_0/DDR0_MA_5 DDR_M0_CAA_0 <23,25> DDR_M0_D52 DDR1_DQ_19/DDR0_DQ_51DDR1_CAA_0/DDR1_MA_5 DDR_M1_CAA_0 <24,25>
    K36 AA37 G28 AE37
    DDR_M0_D39 DDR0_DQ_22/DDR0_DQ_38 DDR0_CAA_2/DDR0_MA_6 DDR_M0_CAA_2 <23,25> DDR_M0_D53 DDR1_DQ_20/DDR0_DQ_52DDR1_CAA_2/DDR1_MA_6 DDR_M1_CAA_2 <24,25>
    K37 AA36 G29 AC29
    DDR_M0_D40 DDR0_DQ_23/DDR0_DQ_39 DDR0_CAA_4/DDR0_MA_7 DDR_M0_CAA_4 <23,25> DDR_M0_D54 DDR1_DQ_21/DDR0_DQ_53DDR1_CAA_4/DDR1_MA_7 DDR_M1_CAA_4 <24,25>
    N36 AB34 H31 AE36
    DDR_M0_D41 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAA_3/DDR0_MA_8 DDR_M0_CAA_3 <23,25> DDR_M0_D55 DDR1_DQ_22/DDR0_DQ_54DDR1_CAA_3/DDR1_MA_8 DDR_M1_CAA_3 <24,25>
    N34 W36 H32 AB29
    DDR_M0_D42 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAA_1/DDR0_MA_9 DDR_M0_CAA_1 <23,25> DDR_M0_D56 DDR1_DQ_23/DDR0_DQ_55DDR1_CAA_1/DDR1_MA_9 DDR_M1_CAA_1 <24,25>
    R37 Y31 L31 AG34
    DDR_M0_D43 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAB_7/DDR0_MA_10 DDR_M0_CAB_7 <23,25> DDR_M0_D57 DDR1_DQ_24/DDR0_DQ_56
    DDR1_CAB_7/DDR1_MA_10 DDR_M1_CAB_7 <24,25>
    R34 W34 L32 AC28
    DDR_M0_D44 DDR0_DQ_27/DDR0_DQ_43 DDR0_CAA_7/DDR0_MA_11 DDR_M0_CAA_7 <23,25> DDR_M0_D58 DDR1_DQ_25/DDR0_DQ_57
    DDR1_CAA_7/DDR1_MA_11 DDR_M1_CAA_7 <24,25>
    N37 AA34 N29 AB28
    DDR_M0_D45 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAA_6/DDR0_MA_12 DDR_M0_CAA_6 <23,25> DDR_M0_D59 DDR1_DQ_26/DDR0_DQ_58
    DDR1_CAA_6/DDR1_MA_12 DDR_M1_CAA_6 <24,25>
    N35 AC32 N28 AK35
    DDR_M0_D46 DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_0/DDR0_MA_13 DDR_M0_CAB_0 <23,25> DDR_M0_D60 DDR1_DQ_27/DDR0_DQ_59
    DDR1_CAB_0/DDR1_MA_13 DDR_M1_CAB_0 <24,25>
    R36 L28
    DDR_M0_D47 R35 DDR0_DQ_30/DDR0_DQ_46 AC31 DDR_M0_D61 L29 DDR1_DQ_28/DDR0_DQ_60 AJ35
    <24> DDR_M1_D[0..15] DDR_M1_D0 DDR0_DQ_31/DDR0_DQ_47 DDR0_CAB_2/DDR0_MA_14 DDR_M0_CAB_2 <23,25> DDR_M0_D62 DDR1_DQ_29/DDR0_DQ_61
    DDR1_CAB_2/DDR1_MA_14 DDR_M1_CAB_2 <24,25>
    AN35 AB32 N31 AK34
    DDR_M1_D1 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_1/DDR0_MA_15 DDR_M0_CAB_1 <23,25> DDR_M0_D63 DDR1_DQ_30/DDR0_DQ_62
    DDR1_CAB_1/DDR1_MA_15 DDR_M1_CAB_1 <24,25>
    AN34 Y32 N32 AJ34
    C DDR_M1_D2 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_3/DDR0_MA_16 DDR_M0_CAB_3 <23,25> <24> DDR_M1_D[16..31] DDR_M1_D16 DDR1_DQ_31/DDR0_DQ_63
    DDR1_CAB_3/DDR1_MA_16 DDR_M1_CAB_3 <24,25> C
    AR35 AJ29
    DDR_M1_D3 AR34 DDR0_DQ_34/DDR1_DQ_2 W32 DDR_M1_D17 AJ30 DDR1_DQ_32/DDR1_DQ_16 AJ37
    DDR_M1_D4 DDR0_DQ_35/DDR1_DQ_3 DDR0_CAB_4/DDR0_BA_0 DDR_M0_CAB_4 <23,25> DDR_M1_D18 DDR1_DQ_33/DDR1_DQ_17DDR1_CAB_4/DDR1_BA_0 DDR_M1_CAB_4 <24,25>
    AN37 AB31 AM32 AJ36
    DDR_M1_D5 DDR0_DQ_36/DDR1_DQ_4 DDR0_CAB_6/DDR0_BA_1 DDR_M0_CAB_6 <23,25> DDR_M1_D19 DDR1_DQ_34/DDR1_DQ_18DDR1_CAB_6/DDR1_BA_1 DDR_M1_CAB_6 <24,25>
    AN36 V34 AM31 W29
    DDR_M1_D6 DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_5/DDR0_BG_0 DDR_M0_CAA_5 <23,25> DDR_M1_D20 DDR1_DQ_35/DDR1_DQ_19DDR1_CAA_5/DDR1_BG_0 DDR_M1_CAA_5 <24,25>
    AR36 AM30
    DDR_M1_D7 AR37 DDR0_DQ_38/DDR1_DQ_6 V35 DDR_M1_D21 AM29 DDR1_DQ_36/DDR1_DQ_20 Y28
    DDR_M1_D8 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_8/DDR0_ACT# DDR_M0_CAA_8 <23,25> DDR_M1_D22 DDR1_DQ_37/DDR1_DQ_21DDR1_CAA_9/DDR1_BG_1 DDR_M1_CAA_9 <24,25>
    AU35 W35 AJ31 W28
    DDR_M1_D9 DDR0_DQ_40/DDR1_DQ_8 DDR0_CAA_9/DDR0_BG_1 DDR_M0_CAA_9 <23,25> DDR_M1_D23 DDR1_DQ_38/DDR1_DQ_22DDR1_CAA_8/DDR1_ACT# DDR_M1_CAA_8 <24,25>
    AU34 AJ32
    DDR_M1_D10 AW35 DDR0_DQ_41/DDR1_DQ_9 C27 DDR_M1_D24 AR31 DDR1_DQ_39/DDR1_DQ_23 H24
    DDR_M1_D11 DDR0_DQ_42/DDR1_DQ_10
    DDR0_DQSN_0/DDR0_DQSN_0 DDR_M0_DQS#0 <23> DDR_M1_D25 DDR1_DQ_40/DDR1_DQ_24
    DDR1_DQSN_0/DDR0_DQSN_2 DDR_M0_DQS#2 <23>
    AW34 D27 AR32 G24
    DDR_M1_D12 DDR0_DQ_43/DDR1_DQ_11
    DDR0_DQSP_0/DDR0_DQSP_0 DDR_M0_DQS0 <23> DDR_M1_D26 DDR1_DQ_41/DDR1_DQ_25
    DDR1_DQSP_0/DDR0_DQSP_2 DDR_M0_DQS2 <23>
    AU37 D31 AV30 C23
    DDR_M1_D13 DDR0_DQ_44/DDR1_DQ_12
    DDR0_DQSN_1/DDR0_DQSN_1 DDR_M0_DQS#1 <23> DDR_M1_D27 DDR1_DQ_42/DDR1_DQ_26
    DDR1_DQSN_1/DDR0_DQSN_3 DDR_M0_DQS#3 <23>
    AU36 C31 AV29 D23
    DDR_M1_D14 DDR0_DQ_45/DDR1_DQ_13
    DDR0_DQSP_1/DDR0_DQSP_1 DDR_M0_DQS1 <23> DDR_M1_D28 DDR1_DQ_43/DDR1_DQ_27
    DDR1_DQSP_1/DDR0_DQSP_3 DDR_M0_DQS3 <23>
    AW36 J35 AR30 G30
    DDR_M1_D15 DDR0_DQ_46/DDR1_DQ_14
    DDR0_DQSN_2/DDR0_DQSN_4 DDR_M0_DQS#4 <23> DDR_M1_D29 DDR1_DQ_44/DDR1_DQ_28
    DDR1_DQSN_2/DDR0_DQSN_6 DDR_M0_DQS#6 <23>
    AW37 J34 AR29 H30
    <24> DDR_M1_D[32..47] DDR_M1_D32 DDR0_DQ_47/DDR1_DQ_15
    DDR0_DQSP_2/DDR0_DQSP_4 DDR_M0_DQS4 <23> DDR_M1_D30 DDR1_DQ_45/DDR1_DQ_29
    DDR1_DQSP_2/DDR0_DQSP_6 DDR_M0_DQS6 <23>
    BA35 P34 AV32 L30
    DDR_M1_D33 DDR0_DQ_48/DDR1_DQ_32
    DDR0_DQSN_3/DDR0_DQSN_5 DDR_M0_DQS#5 <23> DDR_M1_D31 DDR1_DQ_46/DDR1_DQ_30
    DDR1_DQSN_3/DDR0_DQSN_7 DDR_M0_DQS#7 <23>
    BA34 P35 AV31 N30
    DDR_M1_D34 DDR0_DQ_49/DDR1_DQ_33
    DDR0_DQSP_3/DDR0_DQSP_5 DDR_M0_DQS5 <23> <24> DDR_M1_D[48..63] DDR_M1_D48 DDR1_DQ_47/DDR1_DQ_31
    DDR1_DQSP_3/DDR0_DQSP_7 DDR_M0_DQS7 <23>
    BC35 AP35 BA32 AL31
    DDR_M1_D35 DDR0_DQ_50/DDR1_DQ_34
    DDR0_DQSN_4/DDR1_DQSN_0 DDR_M1_DQS#0 <24> DDR_M1_D49 DDR1_DQ_48/DDR1_DQ_48
    DDR1_DQSN_4/DDR1_DQSN_2 DDR_M1_DQS#2 <24>
    BC34 AP34 BA31 AL30
    DDR_M1_D36 DDR0_DQ_51/DDR1_DQ_35
    DDR0_DQSP_4/DDR1_DQSP_0 DDR_M1_DQS0 <24> DDR_M1_D50 DDR1_DQ_49/DDR1_DQ_49
    DDR1_DQSP_4/DDR1_DQSP_2 DDR_M1_DQS2 <24>
    BA37 AV34 BD31 AU31
    DDR_M1_D37 DDR0_DQ_52/DDR1_DQ_36
    DDR0_DQSN_5/DDR1_DQSN_1 DDR_M1_DQS#1 <24> DDR_M1_D51 DDR1_DQ_50/DDR1_DQ_50
    DDR1_DQSN_5/DDR1_DQSN_3 DDR_M1_DQS#3 <24>
    BA36 AV35 BD32 AU30
    DDR_M1_D38 DDR0_DQ_53/DDR1_DQ_37
    DDR0_DQSP_5/DDR1_DQSP_1 DDR_M1_DQS1 <24> DDR_M1_D52 DDR1_DQ_51/DDR1_DQ_51
    DDR1_DQSP_5/DDR1_DQSP_3 DDR_M1_DQS3 <24>
    BC36 BB35 BA30 BC31
    DDR_M1_D39 DDR0_DQ_54/DDR1_DQ_38
    DDR0_DQSN_6/DDR1_DQSN_4 DDR_M1_DQS#4 <24> DDR_M1_D53 DDR1_DQ_52/DDR1_DQ_52
    DDR1_DQSN_6/DDR1_DQSN_6 DDR_M1_DQS#6 <24>
    BC37 BB34 BA29 BC30
    DDR_M1_D40 DDR0_DQ_55/DDR1_DQ_39
    DDR0_DQSP_6/DDR1_DQSP_4 DDR_M1_DQS4 <24> DDR_M1_D54 DDR1_DQ_53/DDR1_DQ_53
    DDR1_DQSP_6/DDR1_DQSP_6 DDR_M1_DQS6 <24>
    BE35 BF34 BD29 BH31
    DDR_M1_D41 DDR0_DQ_56/DDR1_DQ_40
    DDR0_DQSN_7/DDR1_DQSN_5 DDR_M1_DQS#5 <24> DDR_M1_D55 DDR1_DQ_54/DDR1_DQ_54
    DDR1_DQSN_7/DDR1_DQSN_7 DDR_M1_DQS#7 <24>
    BE34 BF35 BD30 BH30
    DDR_M1_D42 DDR0_DQ_57/DDR1_DQ_41
    DDR0_DQSP_7/DDR1_DQSP_5 DDR_M1_DQS5 <24> DDR_M1_D56 DDR1_DQ_55/DDR1_DQ_55
    DDR1_DQSP_7/DDR1_DQSP_7 DDR_M1_DQS7 <24>
    BG35 BG31
    DDR_M1_D43 BG34 DDR0_DQ_58/DDR1_DQ_42 W37 DDR_M1_D57 BG32 DDR1_DQ_56/DDR1_DQ_56 Y29
    DDR_M1_D44 BE37 DDR0_DQ_59/DDR1_DQ_43 NC/DDR0_ALERT# W31 PAD~D @ T3 DDR_M1_D58 BK32 DDR1_DQ_57/DDR1_DQ_57 NC/DDR1_ALERT# AE34 PAD~D @ T5
    DDR_M1_D45 BE36 DDR0_DQ_60/DDR1_DQ_44 NC/DDR0_PAR F36 PAD~D @ T4 DDR_M1_D59 BK31 DDR1_DQ_58/DDR1_DQ_58 NC/DDR1_PAR BU31 PAD~D @ T6
    DDR_M1_D46 BG36 DDR0_DQ_61/DDR1_DQ_45 DDR_VREF_CA D35 +V_DDR_REF_CA <25> DDR_M1_D60 BG29 DDR1_DQ_59/DDR1_DQ_59 DRAM_RESET# PAD~D @ T7
    DDR_M1_D47 DDR0_DQ_62/DDR1_DQ_46 DDR0_VREF_DQ_0 +V_DDR_REFA_R <25> DDR_M1_D61 DDR1_DQ_60/DDR1_DQ_60 SM_RCOMP0
    BG37 D37 BG30 BN28
    DDR0_DQ_63/DDR1_DQ_47 DDR0_VREF_DQ_1 E36 DDR_M1_D62 BK30 DDR1_DQ_61/DDR1_DQ_61 DDR_COMP_0 BN27 SM_RCOMP1
    DDR1_VREF_DQ DDR_VTT_CNTL +V_DDR_REFB_R <25> DDR_M1_D63 DDR1_DQ_62/DDR1_DQ_62 DDR_COMP_1 SM_RCOMP2
    C35 BK29 BN29
    B DDR_VTT_CNTL DDR1_DQ_63/DDR1_DQ_63 DDR_COMP_2 B

    WHL-U42_BGA1528 WHL-U42_BGA1528

    3 of 20
    2 of 20

    +1.2V_DDR
    LPDDR3 COMPENSATION SIGNALS
    UC9
    1 5 SM_RCOMP0 RC11 1 2 200_0402_1%
    NC VCC
    DDR_VTT_CNTL 2 SM_RCOMP1 RC12 1 2 80.6_0402_1%
    A 1
    4 @ +3VS
    3 Y CC92 SM_RCOMP2 RC13 1 2 162_0402_1%
    GND 0.1U_0402_10V7K
    1

    SN74AUP1G07DCKR_SC70 2 @
    @ RE241 CAD Note:
    100K_0402_5%
    Trace width=12~15 mil, Spacing=20 mils
    Max trace length= 500 mil
    2

    1 @ 2
    SM_PG_CTRL <85>
    RC383 0_0402_1%

    PVT_0001
    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P07-MCP(2/14)LPDDR3
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 7 of 100
    5 4 3 2 1
    5 4 3 2 1

    +3VS

    RC388 1 @ 2 0_0402_1%
    SPI_MOSI= SPI_IO0
    SPI_MISO= SPI_IO1

    2
    PCH EDS R0.7 p.235~236 @ UCPU1E
    MEM_SMBCLK 6 1 DDR_XDP_SMBCLK
    PCH_SPI_CLK MEM_SMBCLK DDR_XDP_SMBCLK <14>
    CH37 CK14
    PCH_SPI_SO CF37 SPI0_CLK GPP_C0/SMBCLK CH15 MEM_SMBDATA @ QC1A
    SPI0_MISO GPP_C1/SMBDATA

    5
    PCH_SPI_SI CF36 CJ15 PCH_SMB_ALERT# DMN66D0LDW-7_SOT363-6
    <14> PCH_SPI_SI PCH_SPI_IO2 CF34 SPI0_MOSI GPP_C2/SMBALERT#
    <14> PCH_SPI_IO2 PCH_SPI_IO3 CG34 SPI0_IO2 CH14 MEM_SMBDATA 3 4 DDR_XDP_SMBDAT
    PCH_SPI_CS0# SPI0_IO3 GPP_C3/SML0CLK DDR_XDP_SMBDAT <14>
    CG36 CF15
    D CG35 SPI0_CS0# GPP_C4/SML0DATA CG15 GPP_C5 @ QC1B D
    CH34 SPI0_CS1# GPP_C5/SML0ALERT# DMN66D0LDW-7_SOT363-6
    <66> PCH_SPI_CS2# SPI0_CS2# CN15 SML1_SMBCLK
    GPP_C6/SML1CLK SML1_SMBCLK <58>
    CM15 SML1_SMBDAT RC387 1 @ 2 0_0402_1%
    GPP_C7/SML1DATA GPP_B23 SML1_SMBDAT <58>
    CF20 CC34
    CG22 GPP_D1/SPI1_CLK/BK1/SBK1 GPP_B23/SML1ALERT#/PCHHOT# +3VS
    <66> TPM_PIRQ# GPP_D2/SPI1_MISO_IO1/BK2/SBK2
    CF22
    CG23 GPP_D3/SPI1_MOSI_IO0/BK3/SBK3 CA29 ESPI_IO0_R RC3661 2 15_0402_5%
    GPP_D21/SPI1_IO2 GPP_A1/LAD0/ESPI_IO0 ESPI_IO1_R ESPI_IO0 <58,59> DDR_XDP_SMBDAT 2 1
    CH23 BY29 RC3671 2 15_0402_5%
    MEDIACARD_IRQ# GPP_D22/SPI1_IO3 GPP_A2/LAD1/ESPI_IO1 ESPI_IO2_R ESPI_IO1 <58,59>
    CG20 BY27 RC3681 2 15_0402_5% <58,59> 2.2K_0402_5% RN1
    <70> MEDIACARD_IRQ# GPP_D0/SPI1_CS0#/BK0/SBK0 GPP_A3/LAD2/ESPI_IO2 ESPI_IO3_R ESPI_IO2 DDR_XDP_SMBCLK 2 1
    BV27 RC3691 2 15_0402_5%
    GPP_A4/LAD3/ESPI_IO3 ESPI_IO3 <58,59>
    CA28 2.2K_0402_5% RN2
    GPP_A5/LFRAME#/ESPI_CS# CA27 ESPI_CS# <58,59> CLKRUN# 2 1
    +3V_PCH <58>
    CH7 GPP_A14/SUS_STAT#/ESPI_RESET# ESPI_RESET# ESPI_RESET# 8.2K_0402_5% RC16 @
    <52> CL_CLK CH8 CL_CLK PAD~D @ T138
    MEDIACARD_IRQ# <52> CL_DAT CL_DATA PCI_CLK_LPC0
    @ RC17 1 2 10K_0402_5% CH9 BV32 RC19 1 2 33_0402_5% EMC@
    <52> CL_RST# CL_RST# GPP_A9/CLKOUT_LPC0/ESPI_CLK BV30 PCI_CLK_LPC1 ESPI_CLK_5105 <58,59>
    RC22 1 2 22_0402_5% @
    SIO_RCIN# BV29 GPP_A10/CLKOUT_LPC1 BY30 CLKRUN#
    X04_07
    +3.3V_1.8V_ESPI ESPI_ALERT# BV28 GPP_A0/RCIN#/TIME_SYNC1 GPP_A8/CLKRUN# +3V_PCH
    <58> ESPI_ALERT# GPP_A6/SERIRQ
    @ RC21 1 2 10K_0402_5% SIO_RCIN#
    WHL-U42_BGA1528 MEM_SMBCLK 1 2
    RC24 1 2 10K_0402_1% ESPI_ALERT# @ RC18 1K_0402_5%
    MEM_SMBDATA 1 2
    5 of 20 @ RC20 1K_0402_5%
    PCH GLITCH ISSUE MITIGATION(PDG p.130) SML1_SMBCLK 1 2
    RC23 1K_0402_5%
    ESPI_RESET# RC614 1 @ 2 75K_0201_5% SML1_SMBDAT 1 2
    RC25 1K_0402_5%

    C C

    ESPI_CLK_5105 2 1 +3V_PCH
    SPI_SI_VROM RC469 2 1 33_0201_1%PCH_SPI_SI_R 12P_0402_50V8J @
    SPI_CLK_VROM RC470 2 1 33_0201_1%PCH_SPI_CLK_R CC2
    RC471 2 1 33_0201_1%
    <66>
    <66>
    PCH_SPI_CLK_TPM
    PCH_SPI_SI_TPM RC472 2 1 33_0201_1% Reserve for RF PCH_SMB_ALERT# 1 2
    RC26 2.2K_0402_5%

    TLS CONFIDENTIALITY
    +3V_PCH HIGH ENABLE
    <66> RC473 2 1 33_0201_1% PCH_SPI_SO_R
    CC4
    PCH_SPI_SO_TPM SPI_SO_VROM RC474 2 1 33_0201_1% LOW(DEFAULT) DISABLE

    ROM is Quad SPI 1 2 SPI_IO2_VROM RC475 2 1 33_0201_1% PCH_SPI_IO2_R


    SPI_IO3_VROM RC476 2 1 33_0201_1% PCH_SPI_IO3_R
    0.1U_0402_25V6
    U1 +3V_PCH
    PCH_SPI_CS0#_R 1 8
    SPI_SO_VROM 2 CS# VCC 7 SPI_IO3_VROM 4.7K_0402_5%
    SPI_IO2_VROM 3 DO HOLD#_RESET# 6 SPI_CLK_VROM GPP_C5 RC27 1 2
    4 WP# CLK 5 SPI_SI_VROM
    GND DI SPI_CLK_VROM GPP_C5 @ RC397 1 2 20K_0402_5%

    W25Q256FVEIQ_WSON8 +3V_PCH

    2
    33_0402_5%
    @ RH97 1 2 100K_0402_5% PCH_SPI_SO
    EC interface
    @ RC28
    B
    SPI ROM FOR ME ( 32 MByte ) RH94 1 2 100K_0402_5% PCH_SPI_SI HIGH (DEFAULT)
    LOW
    ESPI
    LPC B
    1

    2 100K_0402_5% PCH_SPI_IO2
    33P_0402_50V8J

    RH61 1
    2

    @ CC5

    +3V_PCH
    RH62 1 2 100K_0402_5% PCH_SPI_IO3
    1

    @ RC29
    from CPU to SPI ROM GPP_B23 1 2
    RH96 1 2 100K_0402_5% PCH_SPI_CLK
    JSPI1 150K_0402_1%
    1 @ RH63 1 2 1K_0402_5%~D PCH_SPI_IO3
    2 1
    PCH_SPI_SI RC30 1 @ 2 0_0402_1% PCH_SPI_SI_R 3 2 @ RH100 1 2 20K_0402_5% PCH_SPI_SO EXI BOOT STALL BYPASS
    4 3
    PCH_SPI_SO RC31 1 @ 2 0_0402_1% PCH_SPI_SO_R 5 4 @ RH98 1 2 20K_0402_5% PCH_SPI_SI HIGH ENABLE
    6 5 LOW(DEFAULT) DISABLE
    PCH_SPI_CLK RC32 1 @ 2 0_0402_1% PCH_SPI_CLK_R 7 6 @ RH99 1 2 20K_0402_5% PCH_SPI_IO2
    8 7
    PCH_SPI_CS0# RC33 1 2 0_0402_1% PCH_SPI_CS0#_R 9 8
    @
    9 RC29 DCI need pop 4.7 k ohm
    10
    PCH_SPI_IO2 RC34 1 @ 2 0_0402_1% PCH_SPI_IO2_R 11 10 follow EDS strap chapter to pu 100 K ohm
    12 11
    PCH_SPI_IO3 RC35 1 @ 2 0_0402_1% PCH_SPI_IO3_R 13 12
    14 13
    15 14
    +3V_PCH 15
    RC36 1 @ 2 0_0402_1% 16
    RC37 1 2 0_0402_5% 17 16
    +3VALW 17
    @ 18
    19 18 566439_CNL_PCH_UY_EDS_Vol_1_Rev_1.1.pdf
    20 19 External pull-up is required. Recommend 100K if pulled up to 3.3V or 75K if pulled up to 1.8V. This strap should sample HIGH.
    Serial Peripheral Interface (SPI) Topology Guidelines 20 There should NOT be any on-board device driving it to opposite direction during strap sampling.
    A A
    21
    22 GND_1
    GND_2
    PCH SPI ACES_50696-0200M-P01
    CONN@
    DELL CONFIDENTIAL/PROPRIETARY
    TPM Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    P08-MCP(3/14)SPI,SMB,LPC
    JSPI THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev

    WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 8 of 100
    5 4 3 2 1
    5 4 3 2 1

    +3VS

    BSSB_DCI_CLK RH91 1 2 100K_0402_5%~D


    @ UCPU1F
    BSSB_DCI_DATA RH92 1 2 100K_0402_5%~D
    CC27
    <38> TS_I2C_RST# CC32 GPP_B15/GSPI0_CS0# CN22 +3VS
    +3VS CE28 GPP_A7/PIRQA#/GSPI0_CS1# GPP_D9/ISH_SPI_CS#/GSPI2_CS0# CR22
    <38> DBC_EN GPP_B16/GSPI0_CLK GPP_D10/ISH_SPI_CLK/GSPI2_CLK BSSB_DCI_CLK
    CE27 CM22
    NRB_BIT GPP_B17/GSPI0_MISO GPP_D11/ISH_SPI_MISO/GSPI2_MISO BSSB_DCI_DATA BSSB_DCI_CLK <71> DDR_CHA_EN
    CE29 CP22 RH66 1 2 100K_0402_5%~D
    GPP_B18/GSPI0_MOSI GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI BSSB_DCI_DATA <71>
    D 1 2 SIO_EXT_SCI# TPM_DET CA31 CK22 ISH_I2C0_SDA T141 DDR_CHB_EN RH67 1 2 100K_0402_5%~D D
    PME# CA32 GPP_B19/GSPI1_CS0# GPP_D5/ISH_I2C0_SDA CH20 ISH_I2C0_SCL PAD~D @
    RC39 10K_0402_5% T142
    T12@ PAD~D SIO_EXT_SCI# CC29 GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN# GPP_D6/ISH_I2C0_SCL PAD~D @
    1 2 UART_1_CRXD_DTXD CC30 GPP_B20/GSPI1_CLK CH22 DDR_CHA_EN @ RH68 1 2 SHORT PADS
    <77> 3.3V_TS_EN GPP_B22 GPP_B21/GSPI1_MISO GPP_D7/ISH_I2C1_SDA
    RH64 49.9K_0402_1% CA30 CJ22
    GPP_B22/GSPI1_MOSI GPP_D8/ISH_I2C1_SCL DDR_CHB_EN @ RH69 1 2 SHORT PADS
    1 2 UART_1_CTXD_DRXD CK20
    RH65 49.9K_0402_1% GPP_F6 CG19 GPP_F5/CNV_BRI_RSP CJ27
    CJ20 GPP_F6/CNV_RGI_DT GPP_H10/I2C5_SDA/ISH_I2C2_SDA CJ29
    +1.8VA CH19 GPP_F4/CNV_BRI_DT GPP_H11/I2C5_SCL/ISH_I2C2_SCL
    GPP_F7/CNV_RGI_RSP CM24 DDR_CHB_EN
    GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA CN23 DDR_CHA_EN
    RH93 1 2 GPP_F6 CR12 GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL CM23 BID_BC
    CP12 GPP_C20/UART2_RXD GPP_D15/ISH_UART0_RTS#/GSPI2_CS1# CR24
    20K_0402_5% SIO_EXT_WAKE# CN12 GPP_C21/UART2_TXD GPP_D16/ISH_UART0_CTS#/SML0BALERT#
    <58> SIO_EXT_WAKE# GPP_C22/UART2_RTS# UART_1_CTXD_DRXD
    CM12 CG12
    T8 @ PAD~D GPP_C23/UART2_CTS# GPP_C12/UART1_RXD/ISH_UART1_RXD UART_1_CRXD_DTXD
    0 = Integrated CNVi enable. CH12
    1 = Integrated CNVi disable. CM11 GPP_C13/UART1_TXD/ISH_UART1_TXD CF12
    (Disable CNVi for bring up) <38> I2C0_SDA_TS GPP_C16/I2C0_SDA GPP_C14/UART1_RTS#/ISH_UART1_RTS# PCH_MUTE# <55>
    TS CN11 CG14 GPP_C15 T146
    <38> I2C0_SCK_TS GPP_C17/I2C0_SCL GPP_C15/UART1_CTS#/ISH_UART1_CTS# PAD~D @
    +3V_PCH I2C1_SDA_TP CK12 BW35 RE298 1 @ 2 ALS_I2C_INT# T143
    TP <65> I2C1_SDA_TP I2C1_SCK_TP CJ12 GPP_C18/I2C1_SDA GPP_A18/ISH_GP0 BW34 ALS_GPIO19 PAD~D @
    <65> 0_0402_1% <58>
    I2C1_SCK_TP GPP_C19/I2C1_SCL GPP_A19/ISH_GP1 CA37 SUPPLIER_ID0 ALS_GPIO19
    1 2 SIO_EXT_WAKE# CF27 GPP_A20/ISH_GP2 CA36 SUPPLIER_ID1
    <38> I2C2_SDA_EDP_PCH GPP_H4/I2C2_SDA GPP_A21/ISH_GP3
    RC40 10K_0402_5% eDP CF29 CA35 ALS_GPIO22
    <38> I2C2_SCK_EDP_PCH GPP_H5/I2C2_SCL GPP_A22/ISH_GP4 ALS_GPIO22 <58>
    CA34 ALS_GPIO23
    GPP_A23/ISH_GP5 ALS_GPIO23 <58>
    CH27 BW37 LCD_GPIO2
    PWRMONITOR GPP_H6/I2C3_SDA GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF# LCD_GPIO2 <38>
    CH28
    GPP_H7/I2C3_SCL
    CJ30
    CJ31 GPP_H8/I2C4_SDA
    GPP_H9/I2C4_SCL
    C WHL-U42_BGA1528 C

    6 of 20
    +3VS

    LCD_GPIO2 100K_0402_5% 2 1 RH105


    +3V_PCH
    LCD_GPIO2 100K_0402_5% 1 2 RH104 @
    TPM_DET 100K_0402_5% 2 1 RH71
    Camera POP STATUS
    TPM_DET 100K_0402_5% 1 2 RH72 @ OLD RH105 High
    New Low

    +3VS
    TPM BOM Optional ALS_GPIO19 100K_0201_5% 2 1 RE453 @
    TPM_DET ALS_GPIO22 100K_0201_5% 2 1 RE454 @
    +3V_PCH
    TPM 1 = W/TPM ALS_GPIO23 100K_0201_5% 2 1 RE455 @

    1 2 NRB_BIT 0 = W/O TPM


    @ RC45 2.2K_0402_5%

    NO REBOOT STRAP
    HIGH No REBOOT +3.3V_1.8V_PGPPA +3.3V_1.8V_PGPPA
    B LOW(DEFAULT) REBOOT ENABLE +3V_PCH B
    +5VS
    Weak IPD

    2
    2
    JUART1
    1 RH84 XPS@ 100K_0402_5% 100K_0402_5%
    UART_1_CRXD_DTXD 2 1 RH87 RH86
    2 100K_0201_5%
    UART_1_CTXD_DRXD 3

    1
    4 3

    1
    4 BID_BC SUPPLIER_ID1 @ SUPPLIER_ID0 @
    5
    6 GND
    GND

    2
    +3V_PCH
    CVILU_CI1804M1VRA-NH RH85 L@
    Product POP STATUS 100K_0201_5% 100K_0402_5% 100K_0402_5%
    CONN@
    XPS RH84 High RH88 RH89
    1

    @ L RH85 Low

    1
    2.2K_0402_5%
    RC46
    2

    GPP_B22

    RH87 RH88 RH86 RH89 REV


    BOOT BIOS Destination(Bit 6)
    V V 00 Supplier A
    HIGH LPC *
    LOW(DEFAULT) SPI V V 01 Supplier B
    V V 10 Supplier C
    A
    V V 11 Supplier D A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P09-MCP(4/14)GSPI,I2C,UART,ISH
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 9 of 100
    5 4 3 2 1
    5 4 3 2 1

    @ UCPU1H
    CB5 <71>
    PCIE1_RXN/USB31_1_RXN USB3_CRX_DTX_N1
    <70> BW9 CB6 <71>
    D PCIE_PRX_CARDTX_N5 PCIE5_RXN/USB31_5_RXN PCIE1_RXP/USB31_1_RXP USB3_CRX_DTX_P1 D
    BW8 CA4 USB3.0 DP MX (PS8802)
    Cardreader <70> PCIE_PRX_CARDTX_P5
    BW4 PCIE5_RXP/USB31_5_RXP PCIE1_TXN/USB31_1_TXN CA3 USB3_CTX_DRX_N1 <71>
    PCIe Gen2 x 1 <70> PCIE_PTX_CARDRX_N5 PCIE5_TXN/USB31_5_TXN PCIE1_TXP/USB31_1_TXP <71>
    BW3 USB3_CTX_DRX_P1
    <70> PCIE_PTX_CARDRX_P5 PCIE5_TXP/USB31_5_TXP BY8
    BU6 PCIE2_RXN/USB31_2_RXN/SSIC_1_RXN BY9
    BU5 PCIE6_RXN/USB31_6_RXN PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP CA2
    BU4 PCIE6_RXP/USB31_6_RXP PCIE2_TXN/USB31_2_TXN/SSIC_1_TXN CA1
    BU3 PCIE6_TXN/USB31_6_TXN PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP
    PCIE6_TXP/USB31_6_TXP BY7
    BT7 PCIE3_RXN/USB31_3_RXN BY6
    <52> PCIE_PRX_WLANTX_N7 PCIE7_RXN PCIE3_RXP/USB31_3_RXP
    BT6 BY4
    WLAN <52> PCIE_PRX_WLANTX_P7
    BU2 PCIE7_RXP PCIE3_TXN/USB31_3_TXN BY3
    PCIe Gen2 x 1 <52> PCIE_PTX_WLANRX_N7 PCIE7_TXN PCIE3_TXP/USB31_3_TXP
    <52> BU1
    PCIE_PTX_WLANRX_P7 PCIE7_TXP BW6 USB3RN4
    BU9 PCIE4_RXN/USB31_4_RXN BW5 USB3RP4
    PCIE8_RXN PCIE4_RXP/USB31_4_RXP DCI Debug
    BU8 BW2 USB3TN4
    BT4 PCIE8_RXP PCIE4_TXN/USB31_4_TXN BW1 USB3TP4
    BT3 PCIE8_TXN PCIE4_TXP/USB31_4_TXP
    PCIE8_TXP CE3
    USB2_1N USB20_N1 <45>
    <41> BP5 CE4 <45> USB2.0 for USB PD PORT3
    PCIE_PRX_TBTX_N9 PCIE9_RXN USB2_1P USB20_P1
    <41> BP6
    PCIE_PRX_TBTX_P9 PCIE9_RXP
    <41> BR2 CE1
    PCIE_PTX_TBRX_N9 PCIE9_TXN USB2_2N
    <41> BR1 CE2
    PCIE_PTX_TBRX_P9 PCIE9_TXP USB2_2P
    <41> BN6 CG3
    PCIE_PRX_TBTX_N10 PCIE10_RXN USB2_3N
    <41> BN5 CG4
    PCIE_PRX_TBTX_P10 PCIE10_RXP USB2_3P
    <41> BR4
    PCIE_PTX_TBRX_N10 PCIE10_TXN
    <41> BR3 CD3
    PCIE_PTX_TBRX_P10 PCIE10_TXP USB2_4N CD4
    Alpine Ridge BN10 USB2_4P
    PCIe Gen3 x 4 <41> PCIE_PRX_TBTX_N11 PCIE11_RXN/SATA0_RXN
    <41> BN8 CG5 <38> CAM & IR CAM
    PCIE_PRX_TBTX_P11 PCIE11_RXP/SATA0_RXP USB2_5N USB20_N5
    <41> BN4 CG6 <38>
    C PCIE_PTX_TBRX_N11 PCIE11_TXN/SATA0_TXN USB2_5P USB20_P5 C
    <41> BN3
    PCIE_PTX_TBRX_P11 PCIE11_TXP/SATA0_TXP
    BL6
    CC1
    USB20_N6 <44> USB2.0 for USB PD PORT2
    <41> PCIE_PRX_TBTX_N12 USB2_6N CC2
    BL5 PCIE12_RXN/SATA1A_RXN USB20_P6 <44>
    <41> PCIE_PRX_TBTX_P12 USB2_6P
    BN2 PCIE12_RXP/SATA1A_RXP CG8
    <41> PCIE_PTX_TBRX_N12
    BN1 PCIE12_TXN/SATA1A_TXN USB2_7N CG9
    USB20_N7 <52> NGFF (WLAN)
    <41> PCIE_PTX_TBRX_P12 PCIE12_TXP/SATA1A_TXP USB2_7P USB20_P7 <52>
    BK6 CB8 USB20_N8
    <67> PCIE_PRX_SSDTX_N13 BK5 PCIE13_RXN USB2_8N CB9 USB20_P8
    USB2.0 for DCI
    <67> PCIE_PRX_SSDTX_P13 BM4 PCIE13_RXP USB2_8P
    <67> PCIE_PTX_SSDRX_N13 BM3 PCIE13_TXN CH5
    <67> PCIE_PTX_SSDRX_P13 PCIE13_TXP USB2_9N USB20_N9 <43>
    CH6 <43> USB2.0 for USB PD PORT1
    USB2_9P USB20_P9
    <67> BJ6
    PCIE_PRX_SSDTX_N14 PCIE14_RXN
    <67> BJ5 CC3 <65>
    PCIE_PRX_SSDTX_P14 PCIE14_RXP USB2_10N USB20_N10
    BL2 CC4
    <67> PCIE_PTX_SSDRX_N14
    BL1 PCIE14_TXN USB2_10P USB20_P10 <65> Fingerprint
    <67> PCIE_PTX_SSDRX_P14 PCIE14_TXP CC5 USBCOMP RC47 1 2 113_0402_1%
    M.2 SSD BG5 USB2_COMP CE8 USB2_ID RC48 1 @ 2 0_0402_1%
    PCIe Gen3 x 4 <67> PCIE_PRX_SSDTX_N15 PCIE15_RXN/SATA1B_RXN USB2_ID
    <67> BG6 CC6 VBUSSENSE RC49 1 2 1K_0402_5%
    PCIE_PRX_SSDTX_P15 PCIE15_RXP/SATA1B_RXP USB2_VBUSSENSE
    <67> BL4
    PCIE_PTX_SSDRX_N15 PCIE15_TXN/SATA1B_TXN TBT_A_USB_OC0#
    <67> BL3 CK6
    PCIE_PTX_SSDRX_P15 PCIE15_TXP/SATA1B_TXP GPP_E9/USB2_OC0#/GP_BSSB_CLK TBT_B_USB_OC1# TBT_A_USB_OC0# <43>
    CK5
    GPP_E10/USB2_OC1#/GP_BSSB_DI MUX_C_USB_OC2# TBT_B_USB_OC1# <44>
    <67> BE5 CK8
    SATA_CRX_DTX_N2 PCIE16_RXN/SATA2_RXN GPP_E11/USB2_OC2# USB_OC3# MUX_C_USB_OC2# <45>
    <67> BE6 CK9
    SATA_CRX_DTX_P2 PCIE16_RXP/SATA2_RXP GPP_E12/USB2_OC3#
    <67> BJ4
    SATA_CTX_DRX_N2 PCIE16_TXN/SATA2_TXN
    <67> BJ3 CP8 @ RC389 1 2 0_0402_5%
    SATA_CTX_DRX_P2 PCIE16_TXP/SATA2_TXP GPP_E4/DEVSLP0 B+_CAM_EN <38,58>
    CR8
    PCIE_RCOMPN CE6 GPP_E5/DEVSLP1 PRIM_CORE_OPT_DIS <65>
    CM8
    1 2 100_0402_1%PCIE_RCOMPP CE5 PCIE_RCOMP_N GPP_E6/DEVSLP2 SSD_DEVSLP <67>
    RC50
    PCIE_RCOMP_P CN8 @
    CR28 GPP_E0/SATAXPCIE0/SATAGP0 CM10 GPP_E1 1 2
    SATA SSD CP28 GPP_H12/M2_SKT2/CFG_0 GPP_E1/SATAXPCIE1/SATAGP1 CP10 RC52 0_0201_5%
    B GPP_H13/M2_SKT2/CFG_1 GPP_E2/SATAXPCIE2/SATAGP2 SSD_IFDET <67> B
    CN28
    CM28 GPP_H14/M2_SKT2/CFG_2 CN7
    GPP_H15/M2_SKT2/CFG_3 GPP_E8/SATALED#/SPI1_CS1#
    AR3
    UFS_RESET#
    WHL-U42_BGA1528
    +3V_PCH
    8 of 20

    TBT_A_USB_OC0# 1 2
    RC53 10K_0402_5%
    @ RT307 TBT_B_USB_OC1# 1 2
    WIN debug TBT_A_USB_OC0# 1
    TBT_B_USB_OC1# 1
    2 0_0402_5%
    2 0_0402_5% CROSSBAR_DCI_CLK
    CROSSBAR_DCI_DATA
    <71>
    <71>
    RC54
    MUX_C_USB_OC2# 1 2
    10K_0402_5%

    @ RC55 10K_0402_5%
    DCI@ RT306 USB_OC3# 1 2
    USB3TP4 1 2 USB3TP4_R X00 _ Reserve two 0 ohm for DCI can remove of MP RC56 10K_0402_5%
    CH44 0.1U_0201_10V6K
    DCI@
    USB3TN4 1 2 USB3TN4_R TBT_A_USB_OC0# 1 @ 2 20K_0402_5%
    CH45 0.1U_0201_10V6K +5VALW RC398
    JDEBUG1 TBT_B_USB_OC1# 1 @ 2 20K_0402_5%
    USB20_N8 1 RC399
    2 1 MUX_C_USB_OC2# 1 @ 2 20K_0402_5%
    USB20_P8 USB20_P8 3 2 RC400
    USB20_N8 4 3 USB_OC3# 1 @ 2 20K_0402_5%
    5 4
    RC401
    USB3TP4_R 6 5
    6
    TVNST52302AB0_SOT523-3

    USB3TN4_R 7
    8 7
    8
    3

    SCA00001W00

    USB3RP4 9
    A D429 USB3RN4 10 9 A
    DCI@ 10

    11
    12 GND1
    1

    GND2

    ACES_50521-01041-P01
    DELL CONFIDENTIAL/PROPRIETARY
    CONN@
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    Note : JDEBUG1 place to BOT side and need check footprint THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P10-MCP(5/14)PCIE,USB,SATA
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev

    WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 10 of 100
    5 4 3 2 1
    5 4 3 2 1

    CC6
    1 2
    SUSCLK 1 2

    200K_0402_1%
    @ RC57 1K_0402_5% 15P_0402_50V8J

    3
    4
    RC59
    YC1
    @ UCPU1J 24MHZ_12PF_X3G024000DC1H

    1
    2
    AW2 AU1 CLK_ITPXDP_N_R RC60 1 EMC@ 2 47_0402_5%
    <41> CLK0_PCIE_TBT# CLKOUT_PCIE_N_0 CLKOUT_ITPXDP_N CLK_ITPXDP_P_R CLK_ITPXDP_N <14> XTAL24_IN
    AY3 AU2 RC61 1 EMC@ 2 47_0402_5% RC375 2 1 33_0201_1% CC7
    Alpine Ridge---> <41> CLK0_PCIE_TBT CF32 CLKOUT_PCIE_P_0 CLKOUT_ITPXDP_P CLK_ITPXDP_P <14> XTAL24_OUT RC376 2 1 33_0201_1% 1 2
    <41> CLKREQ_PCIE#0 GPP_B5/SRCCLKREQ0#
    RC58 1 2 10K_0402_5% BT32 SUSCLK
    +3VS GPD8/SUSCLK SUSCLK <52,67>
    BC1 15P_0402_50V8J
    D <52> CLK1_PCIE_WLAN# BC2 CLKOUT_PCIE_N_1 CK3 XTAL24_IN D
    @ CC93 2 1
    WLAN---> <52> CLK1_PCIE_WLAN CE32 CLKOUT_PCIE_P_1 XTAL_IN CK2 XTAL24_OUT 0.1U 16V K X5R 0201
    <52> CLKREQ_PCIE#1 GPP_B6/SRCCLKREQ1# XTAL_OUT
    RC62 1 2 10K_0402_5%
    +3VS XCLK_BIASREF 1
    BD3 CJ1 2 CC8
    CLKOUT_PCIE_N_2 CLK_BIASREF +1.0V_CLK PCH_RTCX1 RC403
    BC3 CM3 @ RC64 2.7K_0402_1% 1 @ 2 0_0402_1% 1 2
    @ RC63 1 2 10K_0402_5% CF30 CLKOUT_PCIE_P_2 CLKIN_XTAL
    +3VS GPP_B7/SRCCLKREQ2# PCH_RTCX1 PCH_RTCX2 RC404
    BN31 1 @ 2 0_0402_1% 8.2P_0402_50V8J
    BH3 RTCX1 BN32 PCH_RTCX2
    <67> CLK_PCIE_SSD# BH4 CLKOUT_PCIE_N_3 RTCX2
    SDD--->

    2
    <67> CLK_PCIE_SSD CLKOUT_PCIE_P_3

    1
    <67> CE31 BR37 SRTCRST# RC68 1 2 20K_0402_5%
    CLKREQ_PCIE#3 GPP_B8/SRCCLKREQ3# SRTCRST# +RTCVCC RC66
    RC65 1 2 10K_0402_5% BR34 YC2
    +3VS RTCRST#
    BA1 CC9 1 2 1U_0201_6.3V6M 10M_0402_5% 9PF 20PPM 9H03280012
    BA2 CLKOUT_PCIE_N_4 ESR MAX=50k ohm

    2
    RC67 1 2 10K_0402_5% CE30 CLKOUT_PCIE_P_4

    1
    +3VS GPP_B9/SRCCLKREQ4# PCH_RTCRST# RC71 1 2 20K_0402_5% CC10
    BE1 PCH_RTCX2_R 1 2
    <70> CLK_PCIE_MMI# BE2 CLKOUT_PCIE_N_5 1 2 1U_0201_6.3V6M
    CC11
    Card Reader ---> <70> CLK_PCIE_MMI CF31 CLKOUT_PCIE_P_5 8.2P_0402_50V8J
    <70> CLKREQ_PCIE#5 GPP_B10/SRCCLKREQ5#
    RC70 1 2 10K_0402_5%
    +3VS
    WHL-U42_BGA1528 1 2
    1 2
    10 of 20
    SHORT PADS~D
    @CMOS1
    XCLK_BIASREF RC4021 2 60.4_0402_1%
    CMOS1 must take care short & touch risk on layout placement

    +3V_PCH_DSW +3VS +3VS


    C +3VS C

    PCH_PCIE_WAKE#
    1

    1 2
    RC73 1K_0402_5% RC433

    5
    1 2 LAN_WAKE# 100K_0402_5% 1 PCH_PLTRST#

    P
    RC74 10K_0402_5% UC10 TC7SH08FU_SSOP5~D 4 B
    <41,52,59,66,67,70> PCH_PLTRST#_EC O
    5
    2

    2
    A

    G
    1
    1 UC2
    P

    <90> IMVP_VR_PG B

    2
    4 IMVP_VR_PG_R RC76 TC7SH08FU_SSOP5~D

    3
    2 O RC77 @
    A 100K_0402_5%
    G

    10K_0402_5%
    +RTCVCC
    3

    1
    @ RC390 INTRUDER# 1 2
    1 2 RC78 1M_0402_5%
    0_0402_5%
    +1.0V_VCCST +3V_PCH_DSW +3V_PCH

    1 2 H_VCCST_PWRGD_P
    RC79 1K_0402_5% PCH_BATLOW# 1 2 VRALERT# 1 2
    1 2 IMVP_VR_PG_R RC80 10K_0402_5% RC81 10K_0402_5%
    +3V_PCH AC_PRESENT 1 2
    RC381 10K_0402_5% RC82 10K_0402_5%
    1 2 ME_SUS_PWR_ACK
    @ RC83 10K_0402_5% @ UCPU1K

    BJ37 SIO_SLP_S0#
    SIO_SLP_S0# <65,66,78,89,90>
    APS CONN
    PCH_PLTRST# BJ35 GPP_B12/SLP_S0# BU36 SIO_SLP_S3#
    SYS_RESET# GPP_B13/PLTRST# GPD4/SLP_S3# SIO_SLP_S4# SIO_SLP_S3# <41,58,59,65>
    CN10 BU27
    PCH_RSMRST# SYS_RESET# GPD5/SLP_S4# SIO_SLP_S5# SIO_SLP_S4# <58,65> JAPS1
    BR36 BT29
    B <14,58> PCH_RSMRST# RSMRST# GPD10/SLP_S5# SIO_SLP_S5# <58> 1 B
    +3V_PCH SIO_SLP_S3# 1
    H_CPUPWRGD_R@ RC85 1 2 1K_0402_5% H_CPUPWRGD AR2 BU29 2
    T10 @ PAD~D H_VCCST_PWRGD_P PROCPWRGD SLP_SUS# SIO_SLP_SUS# <58,65,77,86,88,89> 3 2
    RC86 1 2 60.4_0402_1% VCCST_PWRGD BJ2 BT31 +3VALW 3
    <14,58,59,65> H_VCCST_PWRGD_P VCCST_PWRGOOD SLP_LAN# BT30 PAD~D @ T11 SIO_SLP_S5# 4
    GPD9/SLP_WLAN# SIO_SLP_WLAN# <58,77> SIO_SLP_S4# 5 4
    CR10 BU37 5
    <14,58> SYS_PWROK IMVP_VR_PG_R SYS_PWROK GPD6/SLP_A# SIO_SLP_A# <58> SIO_SLP_A# 6
    BP31 6
    BP30 PCH_PWROK BU28 7
    <59> PCH_DPWROK_R SIO_PWRBTN# <11,14,58> +3V_PCH 7
    DSW_PWROK GPD3/PWRBTN# BU35 AC_PRESENT 8
    H_CPUPWRGD H_VCCST_PWRGD_P RC442 1 LPC@ 2 0_0402_5% GPD1/ACPRESENT AC_PRESENT <58> PCH_RTCRST# 9 8
    ME_SUS_PWR_ACK_R BV34 BV36 PCH_BATLOW# <58> PCH_RTCRST#
    <58> ME_SUS_PWR_ACK GPP_A13/SUSWARN#/SUSPWRDACK GPD0/BATLOW# 10 9
    1 2 SUSACK#_R BY32
    <58> SUSACK# 10
    100P_0402_50V8J~D

    100P_0402_50V8J~D

    GPP_A15/SUSACK# 11
    RC441 LPC@ 0_0402_5% <11,14,58> SIO_PWRBTN# 12 11
    PCH_PCIE_WAKE# BU30 BR35 INTRUDER#
    <41,58,59> PCH_PCIE_WAKE# WAKE# INTRUDER# SYS_RESET# 13 12
    1 1 LAN_WAKE# BU32
    <58> 13
    CA1

    CA2

    LAN_WAKE# BU34 GPD2/LAN_WAKE# CC37 14


    GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# MPHYP_PWR_EN <78> SIO_SLP_S0# 15 14
    CC36 VRALERT# 15
    GPP_B2/VRALERT# 16
    2 2 17 16
    BT27 INPUT3VSEL 17
    +3V_PCH INPUT3VSEL 18
    19 18
    SIO_SLP_S0#
    +3V_PCH GND
    EMC@ EMC@ RC582 1 2 100K_0201_5% 20
    GND
    WHL-U42_BGA1528
    ESD Request:place near CPU side RC569 1 2 100K_0201_5% SIO_SLP_S3# CONN@

    2
    ACES_50506-01841-P01
    CC248 1 @ 2 0.33U_0201_6.3V6M
    11 of 20
    +3VS @ RC451
    X04_21
    20K_0402_5%
    RC570 1 2 100K_0201_5% SIO_SLP_S4# 10K_0402_5%
    RC90
    1

    @ R5879 1 2 1K_0201_5% SYS_RESET#

    1
    RC88

    CC249 1 @ 2 0.33U_0201_6.3V6M
    POP NO Support Deep sleep INPUT3VSEL
    DE-POP Support Deep sleep RC571 1 2 100K_0201_5% SIO_SLP_A#

    2
    2

    PCH_DPWROK_R1 2 PCH_RSMRST# CC250 1 @ 2 0.33U_0201_6.3V6M RC452 0 = 3.3V supply is 3.3V +/- 5% (3.3V for bring up)
    A @ RC90 0_0402_5% 1 @ 2 SYS_RESET#_R 1 2 SYS_RESET# A
    1 2 100K_0201_5% SIO_SLP_WLAN# <14> PM_SYS_RESET# RC89 1K_0402_5% 4.7K_0402_5% 1 = 3.3V supply is 3.0V +/- 5%
    RC572 RC87 0_0402_1%
    1
    0.01U_0402_16V7K

    100K_0402_5%~D

    1
    CC251 1 @ 2 0.33U_0201_6.3V6M
    CC12

    RC92

    RC573 1 2 100K_0201_5% SIO_SLP_SUS#


    2 DELL CONFIDENTIAL/PROPRIETARY
    2

    CC252 1 @ 2 0.33U_0201_6.3V6M
    Security Classification Compal Secret Data Compal Electronics, Inc.
    @ RC577 1 2 100K_0201_5% SIO_SLP_S5# 2015/12/16 2016/12/13 Title
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P11-MCP(6/14)CLK,PM,RTC
    Size Document Number Rev
    PCH GLITCH ISSUE MITIGATION(PDG p.130) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Tuesday, October 23, 2018 Sheet 11 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    PCH GLITCH ISSUE MITIGATION(PDG p.130)


    RC613 1 @ 2 100K_0201_5% HDA_BIT_CLK

    RC615 1 @ 2 100K_0201_5% HDA_RST# Service Mode Switch:


    Add a switch to ME_FWP signal to unlock the ME region and
    allow the entire region of the SPI flash to be updated using FPT.

    HDA_SDOUT 1K_0402_5%~D 2 1 RH73 ME_EN

    <58> ME_FWP_EC 0_0402_1%2 @ 1 R1

    C HDA_BIT_CLK_R HDA_SDOUT HDA_SDIN0 HDA_RST# C

    1 ME_FWP PCH has internal 20K PD.


    @ 2 2 2
    CC13 RF@ RF@ RF@ FLASH DESCRIPTOR SECURITY OVERRIDE
    22P_0402_50V8J CR24 CR25 CR26
    2
    2.2P_0201_25V 2.2P_0201_25V 2.2P_0201_25V Disable ME Protect (ME can be updated) ----> Pin1 & Pin2 short
    1 1 1 Enable ME Protect (ME cannot be updated)-->Pin3 & Pin2 short(Default position)
    Close to RC112

    @ UCPU1G +3VS
    RC111 1 2 33_0402_5% HDA_SYNC BN34
    <55> HDA_SYNC_R HDA_BIT_CLK HDA_SYNC/I2S0_SFRM CAM_CBL_DET# CAM_CBL_DET#
    RC112 1 2 33_0402_5% BN37 CH36 1 2
    <55> HDA_BIT_CLK_R HDA_SDOUT HDA_BCLK/I2S0_SCLK GPP_G0/SD_CMD CAM_CBL_DET# <38>
    RC113 1 2 33_0402_5% BN36 CL35 RC114 100K_0402_5%~D
    <55> HDA_SDOUT_R HDA_SDIN0 HDA_SDO/I2S0_TXD GPP_G1/SD3_DATA0
    BN35 CL36
    <55> HDA_SDIN0 HDA_SDI0/I2S0_RXD GPP_G2/SD3_DATA1 TBT_CIO_PLUG_EVENT# <41>
    BL36 CM35
    HDA_RST# HDA_SDI1/I2S1_RXD/SNDW1_DATA GPP_G3/SD3_DATA2 SSD_PWR_EN <77>
    PAD~D @ T15 BL35 CN35
    CK23 HDA_RST#/I2S1_SCLK/SNDW1_CLK GPP_G4/SD_DATA3 CH35
    <41> RTD3_USB_PWR_EN GPP_D23/I2S_MCLK GPP_G5/SD_CD# CK36
    BL37 GPP_G6/SD_CLK CK34
    I2S1_SFRM/SNDW2_CLK GPP_G7/SD_WP SPK_DET# <56>
    BL34
    I2S1_TXD/SNDW2_DATA

    CJ32
    B CH32 GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET# B
    CH29 GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK
    CH30 GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ BW36 ISH_GP7 T144
    GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7 BY31 PAD~D @
    @
    RC462 1 2 0_0402_5% CP24 GPP_A16/SD_1P8_SEL
    <6,41> RTD3_CIO_PWR_EN GPP_D19/DMIC_CLK0/SNDW4_CLK
    RC461 1 @ 2 0_0402_1%PCH_TBT_FORCE_PWR CN24
    <41> TBT_FORCE_PWR GPP_D20/DMIC_DATA0/SNDW4_DATA CK33
    RC457 1 @ 2 0_0402_1% CK25 SD_1P8_RCOMP CM34 SD_RCOMP RC116 1 2 200_0402_1%
    <41> TBT_BATLOW# GPP_D17/DMIC_CLK1/SNDW3_CLK SD_3P3_RCOMP
    RC463 1 @ 2 0_0402_1% CJ25
    <64> KB_DET# GPP_D18/DMIC_DATA1/SNDW3_DATA
    SPKR CF35
    <55> SPKR GPP_B14/SPKR
    +3V_PCH WHL-U42_BGA1528

    1 2 KB_DET# 7 of 20
    RC41 100K_0402_5%~D

    +3V_PCH +3V_PCH

    A 1 2 SPKR 1 2 HDA_SDOUT A
    @ RC118 2.2K_0402_5% @ RC119 4.7K_0402_5%

    TOP SWAP STRAP Flash Descriptor Security override DELL CONFIDENTIAL/PROPRIETARY


    HIGH ENABLE HIGH DISABLE Security Classification Compal Secret Data Compal Electronics, Inc.
    LOW(DEFAULT) DISABLE LOW(DEFAULT) ENABLE 2015/12/16 2016/12/13 Title
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P12-MCP(7/14)MISC,JTAG,HDA,SDIO
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev

    WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 12 of 100
    5 4 3 2 1
    5 4 3 2 1

    1 2 CFG0 1 2 CFG7
    @ RC120 1K_0402_1% @ RC411 1K_0402_1%

    <14> CFG[0..15]
    CFG0
    CFG1
    CFG2
    EAR-STALL/NOT STALL RESET PEG DEFER TRAINING CFG3
    SEQUENCE AFTER PCU PLL IS LOCKED CFG4
    1: (DEFAULT) PEG TRAIN IMMEDIATELY CFG5
    CFG0 1:(DEFAULT)NORMAL OPERATION; NO STALL CFG7 FOLLOWING XXRESETB DE ASSERTION CFG6
    0:STALL 0: PEG WAIT FOR BIOS FOR TRAINING
    D CFG7 D
    CFG8
    CFG9
    CFG10
    1 2 CFG1 1 2 CFG8 CFG11
    @ RC405 1K_0402_1% @ RC412 1K_0402_1% CFG12
    CFG13
    CFG14
    CFG15

    ALLOW THE USE OF CFG ON LOCKED UNITS @ UCPU1Q


    PCH/ PCH LESS MODE SELECTION
    1: DISABLED(DEFAULT); IN THIS CASE, CFG WILL BE
    1: (DEFAULT) NORMAL OPERATION DISABLED IN LOCKED UNITS AND ENABLED IN UN-LOCKED UNITS AND CFG0 T4 F37
    CFG1 CFG8 0: EENABLED; CFG WILL BE CFG_0 RSVD_TP5 F34 PAD~D @ T16
    0: PCH-LESS MODE PAD~D @ T17
    AVAILABLE REGARDLESS OF THE LOCKING OF THE UNIT CFG1 R4 RSVD_TP4
    CFG2 T3 CFG_1 CP36
    CFG3 R3 CFG_2 IST_TRIG CN36 PAD~D @ T18
    CFG4 J4 CFG_3 RSVD_TP3 PAD~D @ T19
    1 2 CFG2 1 2 CFG9 CFG5 M4 CFG_4 BJ36
    @ RC406 1K_0402_1% @ RC413 1K_0402_1% CFG6 J3 CFG_5 RSVD15 BJ34
    CFG7 M3 CFG_6 RSVD14
    CFG8 R2 CFG_7 BK34
    CFG9 N2 CFG_8 TP_1 BR18 PAD~D @ T20
    CFG10 R1 CFG_9 TP_3 PAD~D @ T21
    CFG11 N1 CFG_10
    PCI EXPRESS STATIC LANE REVERSAL NO SVID PROTOCOL CAPABLE VR CONNECTED CFG12 J2 CFG_11
    <14> CFG12 CFG_12
    FOR ALL PEG PORTS CFG13 L2 BT9
    CFG14 J1 CFG_13 RSVD21 BT8 PAD~D @ T129
    1:VRS SUPPORTING SVID PROTOCOL ARE PRESENT <14> CFG14 CFG_14 RSVD20 PAD~D @ T131
    CFG2 1: (DEFAULT)NORMAL OPERATION CFG9 0: NO VR SUPPORTING SVID
    CFG15 L1
    0: LANE REVERSAL CFG_15 BP8
    L3 RSVD18 BP9 PAD~D @ T132
    <14> CFG16 CFG_16 RSVD19 PAD~D @ T130
    C N3 C
    <14> CFG18 CFG_18
    <14> CFG17 L4 CR4
    1 2 CFG3 1 2 CFG10 N4 CFG_17 RSVD29 PAD~D @ T133
    <14> CFG19 CFG_19
    @ RC407 1K_0402_1% @ RC414 1K_0402_1% CP3
    RSVD26 CR3
    2 1 CFG_RCOMP AB5 RSVD27
    RC124 49.9_0402_1% CFG_RCOMP
    2 1 W4
    +1.0VA_XDP ITP_PMODE
    RC125 1.5K_0402_5%
    <14> XDP_ITP_PMODE CG2
    PCH/ PCH LESS MODE SELECTION SAFE MODE BOOT CG1 RSVD25
    RSVD24
    1:(DEFAULT) NORMAL OPERATION CFG10 1: POWER FEATURES ACTIVATED DURING RESET
    CFG3 0: PCH-LESS MODE 0: POWER FEATURES (ESPECIALLY CLOCK GATINE ARE NOT ACTIVATED RSVD12
    AT3
    AU3
    RSVD13
    H4
    H3 RSVD34
    RSVD33 AN1
    1 2 CFG4 1 2 CFG11 RSVD8
    BV24 AN2
    RC123 1K_0402_5% @ RC415 1K_0402_1% RSVD22 RSVD9
    BV25
    RSVD23 AN4
    RSVD11 AN3
    RSVD10
    0: AN EXTERNAL DISPLAY PORT DEVICE PORT IS CONNECTED TO THE EMBEDDED PORT AL2
    1: NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT VSS_F65_G65 RSVD3
    G3 AL1
    EAR-STALL/NOT STALL RESET VSS_436 RSVD2
    DISPLAY PORT PRESENCE STRAP SEQUENCE AFTER PCU PLL IS LOCKED G4
    VSS_437
    1:(DEFULT) AL4
    CFG4 0: ENABLED CFG11 DMI WILL BE CONFIGURED AS HALF SWING DC COUPLED RSVD5

    2
    1: DISABLED; 0:DMI WILL BE CONFIGURED AS FULL SWING AC COUPLED AL3
    RC391 ES1@ BK36 RSVD4
    BK35 RSVD17 BP34
    0_0201_5% RSVD16 TP1 BP36 PAD~D @ T24 X04_08
    B W3 TP_2 BP35 B
    1 2 CFG5 1 2 CFG12 PAD~D @ T22

    1
    AM4 RSVD35 TP_4 +VCCGT
    @ RC409 1K_0402_1% @ RC416 1K_0402_1% RSVD7 C34 RC420 2 @ 1 0_0201_5%
    AM3 VSS_435

    100_0402_1%
    RSVD6 A34
    PAD~D @ T27

    1
    RSVD_TP1 B35

    RC436
    RSVD_TP2 PAD~D @ T28
    1 2 CFG6
    CR35
    @ RC410 1K_0402_1% PM SYNC LEGACY RSVD28
    A35
    D34 RSVD1 @

    2
    1: (DEFAULT) PMSYNC 2.0 RSVD30 AH26 RC435 1 @ 2 0_0402_5%
    CFG12 0 : LEGACY G2 ZVM# AJ27 RC434 1 @ 2 0_0402_5%
    G1 RSVD32 MSM#
    RSVD31 E1 SKTOCC# RC223 1 @ 2 0_0402_5%
    SKTOCC#

    PCIE PORT BIFURCATION STRAPS 1 2 CFG13


    WHL-U42_BGA1528
    @ RC417 1K_0402_1%
    11: DEVICE1 FUNTION 1, DEVICE 1 FUNCTION2 DISABLED 20 of 20
    10: DEVICE1 FUNTION 1, ENABLED DEVICE 1 FUNCTION2 DISABLED

    CFG5,6
    PCH/ PCH LESS MODE SELECTION PMSYNC AYNC MODE- PM SYNC

    01: DEVICE1 FUNTION 1, DISABLED, DEVICE 1 FUNCTION2 ENABLED 1: (DEFAULT)SYNCHCRONOUS (1 24 MHZ CYCLE PER BIT)
    00: DEVICE 1 FUNCTION 1 ENABLED, DEVICE 1 FUNCTION 2 ENABLED
    CFG13 0: ASYNC - 4-24MHZ CYCLES PER BIT

    1 2 CFG14 1 2 CFG15
    A A
    @ RC418 1K_0402_1% @ RC419 1K_0402_1%

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    CFG14 CFG15 Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P13-MCP(8/14)CFG,RSVD
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 13 of 100
    5 4 3 2 1
    5 4 3 2 1

    +1.0V_VCCST

    RC2181 2 1K_0402_1% H_THERMTRIP#_R

    @ RC2191 2 49.9_0402_1% H_CATERR#


    @ UCPU1D
    H_CATERR# AA4 T6 CPU_XDP_TCK
    +1.0V_VCCSTG AR1 CATERR# PROC_TCK U6 CPU_XDP_TDI
    <58> PECI_EC H_PROCHOT# RC2201 H_PROCHOT#_R PECI PROC_TDI CPU_XDP_TDO
    <58,83,90> 2 499_0402_1% Y4 Y5
    H_PROCHOT# H_PROCHOT# H_THERMTRIP#_R PROCHOT# PROC_TDO CPU_XDP_TMS
    RC2211 2 1K_0402_1%
    <59>
    1 @ 2 BJ1 T5
    H_THERMTRIP# THRMTRIP# PROC_TMS AB6 CPU_XDP_TRST#
    RC222 0_0402_1%
    +3V_PCH XDP_BPM#0 U1 PROC_TRST#
    XDP_BPM#1 U2 BPM#_0
    D RH81 1 2 10K_0201_5% SIO_EXT_SMI# T50 @ XDP_BPM#2_R U3 BPM#_1 W6 PCH_JTAG_TCK D
    T51 @ XDP_BPM#3_R U4 BPM#_2 PCH_TCK U5 PCH_JTAG_TDI
    +3VS BPM#_3 PCH_TDI W5 PCH_JTAG_TDO
    @ PCH_TDO P5 PCH_JTAG_TMS
    RH82 1 2 10K_0201_5% TOUCH_SCREEN_PD# SIO_EXT_SMI# CE9 PCH_TMS Y6 PCH_JTAG_TRST#
    TOUCH_SCREEN_PD# CN3 GPP_E3/CPU_GP0 PCH_TRST# P6 PCH_JTAGX
    <38> TOUCH_SCREEN_PD# TOUCHPAD_INTR# GPP_E7/CPU_GP1 PCH_JTAGX
    <58,65> RC3791 @ 2 0_0402_1% CB34
    TP_INTR# CC35 GPP_B3/CPU_GP2
    <77> AUD_PWR_EN GPP_B4/CPU_GP3 CPU_XDP_PREQ#
    W2
    PROC_PREQ# W1 CPU_XDP_PRDY#
    CPU_POPIRCOMP BP27 PROC_PRDY#
    PCH_POPIRCOMP BW25 PROC_POPIRCOMP
    EDRAM_OPIO_RCOMP L5 PCH_OPIRCOMP
    EOPIO_RCOMP OPCE_RCOMP

    1
    49.9_0402_1%

    49.9_0402_1%

    49.9_0402_1%

    49.9_0402_1%
    N5
    OPC_RCOMP

    RC106

    RC107

    RC108

    RC109
    +3V_PCH WHL-U42_BGA1528

    2
    RC2251 XDP@ 2 100K_0201_5% XDP_PRSENT# @ @
    4 of 20

    +1.0VA_XDP

    RC2261 XDP@ 2 1K_0402_5% XDP_RST#

    CPU_XDP_TDO RC2271 XDP@ 2 0_0201_5% XDP_TDO


    +1.0V_VCCSTG CPU_XDP_TCK RC2281 XDP@ 2 0_0201_5% XDP_TCK0
    <To CPU JTAG> CPU_XDP_TDI RC2291 XDP@ 2 0_0201_5% XDP_TDI
    @ RC2302 1 51_0402_5% CPU_XDP_PREQ# CPU_XDP_TMS RC2311 XDP@ 2 0_0201_5% XDP_TMS
    CPU_XDP_TRST# RC2321 XDP@ 2 0_0201_5% XDP_TRST#
    C C

    PCH_JTAG_TDO RC2331 XDP@ 2 0_0201_5% XDP_TDO


    PCH_JTAG_TDI RC2341 XDP@ 2 0_0201_5% XDP_TDI
    PU/PD for CPU JTAG signals <To PCH JTAG> PCH_JTAG_TMS RC2351 XDP@ 2 0_0201_5% XDP_TMS
    PCH_JTAG_TRST# RC2361 XDP@ 2 0_0201_5% XDP_TRST#
    PCH_JTAGX RC2371 XDP@ 2 0_0201_5% XDP_TCK0
    +1.0V_VCCSTG PCH_JTAG_TCK RC2381 XDP@ 2 0_0201_5% XDP_TCK1

    RC2392 1 51_0402_5% CPU_XDP_TMS Closed to CPU


    RC2402 1 51_0402_5% CPU_XDP_TDI <11,58> RC3701 @ 2 0_0402_5%
    SYS_PWROK
    <8> PCH_SPI_SI RC2411 XDP@ 2 1K_0201_5% RESET_OUT#_R
    R1 RC2421 2 100_0402_1% CPU_XDP_TDO <8> RC2431 XDP@ 2 1K_0201_5% XDP_PRSENT#
    PCH_SPI_IO2

    RC2442 1 51_0402_5% CPU_XDP_TCK


    R2 XDP_BPM#0 XDP_OBS0
    RC2451 XDP@ 2 0_0201_5% @ T70 XDP_OBS0
    @ RC2172 1 51_0402_5% CPU_XDP_TRST# XDP_BPM#1 RC2461 XDP@ 2 0_0201_5% XDP_OBS1 @ T73 XDP_OBS1

    <XDP Misc.> +1.0VA +1.0VA_XDP +1.0VA_XDP


    RC2471 XDP@ 2 0_0201_5% XDP_PWRBTN# RC251
    <11,58> SIO_PWRBTN#
    RC2481 XDP@ 2 0_0201_5% XDP_DBRESET# 1 XDP@ 2
    <11> PM_SYS_RESET#
    RC2492 XDP@ 1 0_0402_5% XDP_RST# 0_0402_5%
    <13> XDP_ITP_PMODE 1 1
    RC2501 XDP@ 2 1K_0402_5% PWRGD_XDP CC85 CC86
    <11,58> PCH_RSMRST#
    @ RC3711 2 1K_0402_5% XDP@ XDP@

    PU/PD for PCH JTAG signals


    <11,58,59,65> H_VCCST_PWRGD_P
    XDP CONN 0.1U_0201_10V6K
    2 2
    0.1U_0201_10V6K

    Connect to XDP Conn.


    +1.0V_VCCSTG (Option w/ CPU JTAG) +1.0VA_XDP +1.0VA_XDP
    RC253 JXDP1
    B RC2522 1 51_0402_5% PCH_JTAG_TMS CFG3 1 XDP@ 2 XDP_PIN1 1 2 B
    R5 CPU_XDP_PREQ# 3 1 2 4
    1K_0402_1%
    PCH_JTAG_TDI CPU_XDP_PRDY# 5 3 4 CFG17 <13>
    R4 RC2542 1 51_0402_5% 6
    7 5 6 8 CFG16 <13>
    RC256
    R3 RC2551 2 100_0402_1% PCH_JTAG_TDO 1 XDP@ 2 9 7 8 10 CFG8
    <13> CFG0 11 9 10 12 CFG9 CFG8 <13>
    1K_0402_1%
    <13> CFG1 13 11 12 14 CFG9 <13>
    RC257 2 @ 1 51_0402_5% PCH_JTAGX 15 13 14 16 CFG10
    <13> CFG2 CFG3 17 15 16 18 CFG11 CFG10 <13>
    PCH_JTAG_TCK <13> CFG3 19 17 18 CFG11 <13>
    R6 RC258 2 @ 1 51_0402_5% 20
    XDP_OBS0 21 19 20 22
    XDP_OBS1 23 21 22 24 CFG19 <13>
    25 23 24 26 CFG18 <13>
    27 25 26 28
    <13> CFG4 29 27 28 30 CFG12 <13>
    CFG13
    <13> CFG5 31 29 30 32 CFG13 <13>
    33 31 32 34
    <13> CFG6 35 33 34 36 CFG15 CFG14 <13>
    2 1 RESET_OUT#_R <13> CFG7 37 35 36 38 CFG15 <13>
    @ CC89 0.1U_0402_25V6 PWRGD_XDP 39 37 38 40
    CLK_ITPXDP_P <11>
    XDP_PWRBTN# 41 39 40 42
    CLK_ITPXDP_N <11>
    43 41 42 44 <XDP CLK>
    Place near JXDP1.47 45 43 44 46 XDP_RST# From CPU
    RESET_OUT#_R 47 45 46 48 XDP_DBRESET#
    49 47 48 50
    <8> 51 49 50 52 XDP_TDO
    DDR_XDP_SMBDAT
    <XDP SMBUS> <8> 53 51 52 54 XDP_TRST#
    DDR_XDP_SMBCLK
    Link to PCH SMB XDP_TCK1 55 53 54 56 XDP_TDI
    XDP_TCK0 57 55 56 58 XDP_TMS
    59 57 58 60 XDP_PRSENT#
    61 59 60
    XDP_DBRESET# XDP_PWRBTN# 61
    A 62 63 A
    GND GND
    0.1U_0201_10V6K
    CC87

    0.1U_0201_10V6K
    CC88

    Place near JXDP1.48 Place near JXDP1.41


    1 1 E-T_6601K-Y61N-04L
    CONN@
    XDP@

    XDP@

    2 2 DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P14-MCP(9/14)XDP
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev

    WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 14 of 100
    5 4 3 2 1
    5 4 3 2 1

    PSC(Primary side cap) : Place as close to the package as possible +VCC_CORE


    BSC(Backside cap) : Place on secondary side, underneath the package +VCC_CORE

    @ UCPU1L
    Component placement order: AN9 AW24
    Package edge > 0402 caps > 0805 caps > Bulk caps >Power source AN10 VCCCORE5 VCCCORE35 AW25
    AN24 VCCCORE1 VCCCORE36 AW26
    AN26 VCCCORE2 VCCCORE37 AW27
    +VCC_CORE: 0.55~1.5V, 29A AN27
    AP2
    VCCCORE3
    VCCCORE4
    VCCCORE38
    VCCCORE44
    AY24
    AY26

    D
    +VCC_EDRAM: 1V, 2.5A AP9
    AP24
    VCCCORE6
    VCCCORE9
    VCCCORE45
    VCCCORE48
    BA5
    BA7 D
    AP26 VCCCORE7 VCCCORE49 BA8
    AR5 VCCCORE8 VCCCORE50 BA25
    AR6 VCCCORE13 VCCCORE46 BA27
    AR7 VCCCORE14 VCCCORE47 BB2
    AR8 VCCCORE15 VCCCORE51 BB26
    AR10 VCCCORE16 VCCCORE52 BC5
    AR25 VCCCORE10 VCCCORE56 BC6
    AR27 VCCCORE11 VCCCORE57 BC7
    @ UCPU1O AT9 VCCCORE12 VCCCORE58 BC9
    AT24 VCCCORE19 VCCCORE59 BC10
    K12 AA24 AT26 VCCCORE17 VCCCORE53 BC26
    K14 VCCOPC1 VCCEOPIO1 AA26 AU5 VCCCORE18 VCCCORE54 BC27
    K15 VCCOPC2 VCCEOPIO2 AB25 AU6 VCCCORE24 VCCCORE55 BD5
    K17 VCCOPC3 VCCEOPIO3 AC24 AU7 VCCCORE25 VCCCORE63 BD8
    K18 VCCOPC4 VCCEOPIO4 AC25 AU8 VCCCORE26 VCCCORE64 BD10
    K20 VCCOPC5 VCCEOPIO5 AC26 AU9 VCCCORE27 VCCCORE60 BD25
    L25 VCCOPC6 VCCEOPIO6 AD24 AU24 VCCCORE28 VCCCORE61 BD27
    M24 VCCOPC7 VCCEOPIO7 AD26 AU25 VCCCORE20 VCCCORE62 BE9
    M26 VCCOPC8 VCCEOPIO8 AU26 VCCCORE21 VCCCORE69 BE24
    P24 VCCOPC9 V25 VCCEOPIO_SENSE AU27 VCCCORE22 VCCCORE65 BE25 +VCC_CORE
    P26 VCCOPC10 VCCEOPIO_SENSE T25 VSSEOPIO_SENSE PAD~D @ T136 AV2 VCCCORE23 VCCCORE66 BE26
    R24 VCCOPC11 VSSEOPIO_SENSE PAD~D @ T137 AV5 VCCCORE30 VCCCORE67 BE27

    1
    VCCOPC12 VCCCORE32 VCCCORE68

    100_0402_1%
    R25 AV7 BF2
    R26 VCCOPC13 AV10 VCCCORE33 VCCCORE70 BF9
    VCCOPC14 VCCCORE29 VCCCORE73 Close CPU

    RC150
    AV27 BF24
    AW5 VCCCORE31 VCCCORE71 BF26
    W25 AW6 VCCCORE39 VCCCORE72 BG27 RC430 0_0402_1%

    2
    V24 VCC_OPC_1P8_2 AW7 VCCCORE40 VCCCORE74 VCC_SENSE_R 1 @ 2
    VCC_OPC_1P8_1 VCCCORE41 VSS_SENSE_R VCC_SENSE <90>
    AW8 AN6 1 @ 2
    VCCCORE42 VCC_SENSE VSS_SENSE <90>
    Y25 AW9 AN5 RC429

    1
    VCC_OPC_1P8_4 VCCCORE43 VSS_SENSE

    100_0402_1%
    Y24 AW10 0_0402_1%
    C VCC_OPC_1P8_3 VCCCORE34 AA3 H_CPU_SVIDALRT# C
    VIDALERT#

    RC151
    +VCC_CORE_G0 BB9 AA1 VIDSCLK_R
    T29 @ PAD~D +VCC_CORE_G1 RSVD3 VIDSCK
    WHL-U42_BGA1528 BC24
    T30 @

    2
    PAD~D +VCC_CORE_G2 AY9 RSVD4 AA2 VIDSOUT_R
    T134@ PAD~D +VCC_CORE_G3 RSVD1 VIDSOUT 1V@0.05A
    15 of 20 BB24
    T135@ PAD~D RSVD2 Y3
    RSVD5
    BG3 +1.0V_VCCSTG_R RC153 1 @ 2 0_0603_5%
    VCCSTG1 +1.0V_VCCSTG
    +V1.8S_EDRAM: 1.8V, 50mA - REMOVE WHL-U42_BGA1528

    +VCC_EOPIO: 0.8~1V, 2A - REMOVE 12 of 20

    VCCOPC,VCCOPC_1P8,VCCEOPIO for SKYLAKE-U 2+3e


    (w/ on package cache)

    +1.0V_VCCST
    SVID ALERT

    1
    56_0402_1%
    RC154
    CAD Note: Place the PU resistors close to CPU
    RC154 close to CPU 1000 - 1500mils
    B B

    2
    2 1 H_CPU_SVIDALRT#
    <90> VR_SVID_ALERT#
    220_0402_5% RC155

    +1.0V_VCCST
    SVID DATA

    100_0402_1%
    1
    CAD Note: Place the PU resistors close to CPU

    RC156
    RC156close to CPU 1000 - 1500mils

    2
    0_0402_1% 2 @ 1 RC157 VIDSOUT_R
    <90> VR_SVID_DATA

    +1.0V_VCCST
    SVID CLK

    100_0402_1%
    1

    @ RC158
    CAD Note: Place the PU resistors close to CPU
    RC158close to CPU 1000 - 1500mils

    2
    0_0402_1% 2 @ 1 RC159 VIDSCLK_R
    A <90> VR_SVID_CLK A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P15-MCP(10/14)PWR-VCC CORE
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 15 of 100
    5 4 3 2 1
    5 4 3 2 1

    +VCCGT +VCC_CORE
    D +VCC_CORE +VCCGT D
    1.5V@54A

    @ UCPU1M

    A5 D15
    A6 VCCGT8 VCCGT58 D17
    A8 VCCGT9 VCCGT59 D18
    A11 VCCGT10 VCCGT60 D20
    A12 VCCGT1 VCCGT61 E4
    A14 VCCGT2 VCCGT64 F5
    A15 VCCGT3 VCCGT69 F6
    A17 VCCGT4 VCCGT70 F7
    A18 VCCGT5 VCCGT71 F8
    A20 VCCGT6 VCCGT72 F11
    AA9 VCCGT7 VCCGT65 F14
    AB2 VCCGT11 VCCGT66 F17
    AB8 VCCGT13 VCCGT67 F20
    AB9 VCCGT14 VCCGT68 G11
    AB10 VCCGT15 VCCGT73 G12
    AC8 VCCGT12 VCCGT74 G14
    AD9 VCCGT16 VCCGT75 G15
    AE8 VCCGT17 VCCGT76 G17
    AE9 VCCGT19 VCCGT77 G18
    AE10 VCCGT20 VCCGT78 G20
    AF2 VCCGT18 VCCGT79 H5
    AF8 VCCGT22 VCCGT87 H6
    AF10 VCCGT23 VCCGT88 H7
    AG8 VCCGT21 VCCGT89 H8
    C AG9 VCCGT24 VCCGT90 H11 C
    AH9 VCCGT25 VCCGT80 H12
    AJ8 VCCGT26 VCCGT81 H14
    AJ10 VCCGT28 VCCGT82 H15
    AK2 VCCGT27 VCCGT83 H17
    AK9 VCCGT29 VCCGT84 H18
    AL8 VCCGT30 VCCGT85 H20
    AL9 VCCGT32 VCCGT86 J7
    AL10 VCCGT33 VCCGT95 J8
    AM8 VCCGT31 VCCGT96 J11
    B3 VCCGT34 VCCGT91 J14
    B4 VCCGT39 VCCGT92 J17
    B6 VCCGT40 VCCGT93 J20
    B8 VCCGT41 VCCGT94 K2
    B11 VCCGT42 VCCGT98 K11
    B14 VCCGT35 VCCGT97 L7
    B17 VCCGT36 VCCGT100 L8
    B20 VCCGT37 VCCGT101 L10
    C2 VCCGT38 VCCGT99 M9
    C3 VCCGT49 VCCGT102 N7
    C6 VCCGT51 VCCGT104 N8
    C7 VCCGT52 VCCGT105 N9
    C8 VCCGT53 VCCGT106 N10
    C11 VCCGT54 VCCGT103 P2
    C12 VCCGT43 VCCGT107 P8
    C14 VCCGT44 VCCGT108 R9
    C15 VCCGT45 VCCGT109 T8 +VCCGT
    C17 VCCGT46 VCCGT111 T9
    C18 VCCGT47 VCCGT112 T10

    100_0402_1%
    C20 VCCGT48 VCCGT110 U8
    VCCGT50 VCCGT114

    1
    D4 U10

    RC160
    D7 VCCGT62 VCCGT113 V2
    B D11 VCCGT63 VCCGT115 V9 B
    D12 VCCGT55 VCCGT116 W8 Close CPU
    D14 VCCGT56 VCCGT117 W9

    2
    Y10 VCCGT57 VCCGT118 Y8
    VCCGT119 VCCGT120
    E3 VCCGT_SENSE_R RC432 1 @ 2 0_0402_1%
    VCCGT_SENSE D2 VSSGT_SENSE_RRC431 1 2 0_0402_1% VCCGT_SENSE <90>
    @
    VSSGT_SENSE VSSGT_SENSE <90>

    100_0402_1%
    WHL-U42_BGA1528
    13 of 20

    RC161
    2

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P16-MCP(11/14)PWR-VCCGT
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev

    WWW.AliSaler.Com
    1.0
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 16 of 100
    5 4 3 2 1
    5 4 3 2 1

    +1.2V_DDR: 1.2V, 3.5A


    +1.0V_VCCST: 1V, 120mA; VCCPLL: 1V, 120mA
    +1.0V_VCCSTG: 1V, 40mA
    +VCCPLL_OC: 1.2V, 260mA
    +1.0VS_VCCIO: 0.85~0.95V, 3.1A +1.2V_DDR
    +1.0VS_VCCIO

    +VCC_SA: 1.15V, 5.1A 0.95V@3.1A


    1.2V@3.5A @ UCPU1N
    +1.2V_DDR +1.2V_MEM_CPUCLK AK24
    AD36 VCCIO1 AK26
    D AH32 VDDQ1 VCCIO2 AL24 D
    AH36 VDDQ2 VCCIO3 AL25
    @ RC162 1 2 0_0402_5% VDDQ3 VCCIO4
    AM36 AL26
    AN32 VDDQ4 VCCIO5 AL27
    AW32 VDDQ5 VCCIO6 AM25
    AY36 VDDQ6 VCCIO7 AM27
    BE32 VDDQ7 VCCIO8 BH24
    BH36 VDDQ8 VCCIO9 BH25
    R32 VDDQ9 VCCIO10 BH26
    +1.2V_MEM_CPUCLK Y36 VDDQ10 VCCIO11 BH27
    VDDQ11 VCCIO12 BJ24
    VCCIO13 BJ26
    +1.0V_VCCST VCCIO14 BP16
    BC28 VCCIO15 BP18 +VCCSA
    1V@0.12A
    RSVD1 VCCIO16
    PSC BP11 BG8
    close to package BP2 VCCST1 VCCSA2 BG10
    VCCST2 VCCSA1

    1U_0201_6.3V6M
    +1.0V_VCCSTG_FUSE BH9 1.15V@5.1A
    VCCSA3

    0.1U_0402_10V7K
    1 1 BJ8
    VCCSA5

    CC28

    CC97
    BG1 BJ9
    BG2 VCCSTG1 VCCSA6 BJ10
    VCCSTG2 VCCSA4 BK8
    2 2 VCCSA9

    @
    BL27 BK25 +1.0VS_VCCIO
    BM26 VCCPLL_OC1 VCCSA7 BK27
    +1.0V_VCCSTG VCCPLL_OC2 VCCSA8 BL8
    1V@0.04A
    BR11 VCCSA13 BL9
    VCCPLL1 VCCSA14

    100_0402_1%
    BT11 BL10
    BSC VCCPLL2 VCCSA10

    RC163
    BL24
    underneath the package VCCSA11 BL26
    VCCSA12
    Close CPU
    +1.0V_VCCSTG BM24
    +1.0V_VCCSTG_FUSE VCCSA15

    1U_0402_6.3V6K
    1 BN25

    2
    +VCCPLL_OC VCCSA16

    @ CC29
    C R5856 1.2V@0.26A
    X04_02 BP28 RC464 1 @ 2 0_0402_1% VCCIO_SENSE C
    VCCIO_SENSE VSSIO_SENSE VCCIO_SENSE <89>
    0_0603_5% BP29 RC465 1 @ 2 0_0402_1%
    1 @ 2 2 PSC VSSIO_SENSE VSSIO_SENSE <89>
    close to package BE7 RC425 1 @ 2 0_0402_1%
    VSSSA_SENSE

    10U_0402_6.3V6M

    10U_0402_6.3V6M
    1U_0201_6.3V6M
    BG7 1 2 0_0402_1%

    0.1U_0201_6.3V6K
    RC426 @
    VCCSA_SENSE

    100_0402_1%
    CC1445

    CC1444
    1 1 1 1

    100_0402_1%
    CC30

    CC1451
    WHL-U42_BGA1528

    RC164
    PSC

    RC165
    14 of 20 1 2
    2 2 2 2 +VCCSA
    @ 1V@0.12A RC166 100_0402_1%

    2
    @

    2
    +1.0V_VCCPLL +1.0V_VCCST

    close to package BLM18EG221TN1D_2P <90>


    VSSSA_SENSE
    2 1 LC3 @ <90>
    VCCSA_SENSE

    1U_0201_6.3V6M
    22U_0603_6.3V6M
    0.1U_0201_6.3V6K
    1 1 1 2 1 RC627

    CC31
    CC242

    CC96
    0_0402_5%
    2 2 2

    X04_02
    +1.0VS_VCCIO +1.2V_DDR
    B +1.2V_DDR B

    PSC BSC
    +0.6VS +0.6VS +1.2V_DDR PSC
    PSC

    10U_0402_6.3V6M

    1U_0201_6.3V6M
    22U_0603_6.3V6M

    1 1
    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    CC43

    @ CC44
    1 1 1 1 1
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    CC1450

    1 1 1 1 1 1 1 1 1
    CD113

    CD112

    CC32

    CC33

    CC34

    CC35

    CC36

    CC37

    CC38

    CC39

    CC40

    CC41

    CC42
    2 2
    2 2 2 2 2
    2@ 2@ @ 2 2 2 2 2 2 2 @ @ @ @

    Based on Layout review with Dell BSC BSC


    EE for DDR issue ,
    add a PSC capacitor with +1.2V_DDR
    10U_0402_6.3V6M

    10U_0402_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    for reserve . 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
    @ CC45

    @ CC46

    @ CC47

    @ CC48

    @ CC49

    @ CC50

    CC1448

    CC1449

    CC1446

    CC1447

    CC51

    CC52

    CC53

    CC54

    CC55

    CC56
    Not follow RVP 07/26 / can
    remove it.
    2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

    +1.2V_MEM_CPUCLK (VDDQC) Place on CPU


    +1.2_DDR Decoupling Requirment +1.0VS_VCCIO Decoupling Requirment Back Side Back Side (underneath the package):
    A A
    Back Side (underneath the package): (underneath the package): 1U_0201*1 pcs (@)
    10U_0402*2 pcs + 1U_0201*4 pcs (@) 10U_0402 * 6 pcs + Primary Side (close to package):
    Primary Side (close to package): 1U_0201 * 4 pcs 10U_0402 * 1 pcs
    10U_0402*4 pcs + 22U_0603*3 pcs Primary Side (close to package):
    1U_0402 *4 pcs (@) (Placeholder Only)
    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P17-MCP(12/14)PWR-VCCIO,MEM
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 17 of 100
    5 4 3 2 1
    5 4 3 2 1

    PCH PWR

    +1.8VA +3.3V_1.8V_PGPPA +3.3V_1.8V_ESPI


    D D
    +3V_PCH +3VALW +1.8VA +1.0VA +1.0V_PRIM_CORE
    RC386 RC384
    1 @ 2 1 @ 2
    @ @ @ @
    47U_0603_6.3V

    47U_0603_6.3V

    47U_0603_6.3V

    47U_0603_6.3V
    1
    0.1U_0402_10V7K

    1 1 1 1 0_0402_1% 0_0402_1%
    X04_11
    CC60

    CC61

    CC62

    CC63
    RF@ CC94

    RVP => +VCCPRIM_1P05 +1.0VA


    2 2 2 2 2
    CAD NOTE: CAP +3V_PCH
    1.05V@1.625A

    1U_0201_6.3V6M
    1 1 UCPU1P

    CC67
    CC1455 BP20
    +1.8VA BW16 VCCPRIM_1P05_1 CB16
    RVP => +VCCPRIM_1P8 3.3V@0.199A
    VCCPRIM_1P05_9 VCCPRIM_3P3_3

    1U_0201_6.3V6M
    1U_0201_6.3V6M BW18
    2 2 BW19 VCCPRIM_1P05_10 +RTCVCC
    CAD NOTE: CAPs 1 1

    0.1U_0402_10V7K
    VCCPRIM_1P05_11

    CC75
    BY16

    CC74
    VCCPRIM_1P05_12

    1U_0201_6.3V6M
    CA14 BR23 3.0V@0.002A
    1.8V@0.696A VCCPRIM_1P05_14 VCCRTC
    1 1

    0.1U_0402_10V7K
    2 2

    1U_0201_6.3V6M

    CC73
    CC15 BY20
    VCCPRIM_1P8_1 VCCPRIM_1P05_13 +1.0VA
    CD15 BP24

    CC72
    X04_12

    0.1U_0402_10V7K
    1 VCCPRIM_1P8_4 DCPRTC 1
    +3V_PCH

    CC98
    RVP => +VCCPRIM_3P3 CD16

    CC76
    CP17 VCCPRIM_1P8_5 2 2
    3.3V@0.199A VCCPRIM_1P8_8 BR20
    2 CB22 VCCPRIM_1P05_3 +1.0VA
    2 @
    CB23 VCCPRIM_3P3_4 BT12
    1 1 VCCPRIM_3P3_5 VCCAPLL_1P05_3 +1.0V_APLL

    0.1U_0201_10V6K
    CC243

    1U_0201_6.3V6M
    CC244
    CC22
    CC23 VCCPRIM_3P3_6 BP14
    VCCPRIM_3P3_7 VCCA_BCLK_1P05 +1.0VA
    CD22 DESIGN NOTE: BP24 / CAP EMPTY
    +1.0V_PRIM_CORE 2 @ 2 @ CD23 VCCPRIM_3P3_8 BR14
    RVP => +VCCPRIM_CORE VCCPRIM_3P3_9 VCCAPLL_1P05_1
    1.05V@0.102A +1.0V_APLL PLACEHOLDER CAM BE REMOVED AFTER PI SIMULATION
    CP29
    VCCPRIM_3P3_10
    1.05V@4.26A
    BU15 BU12 1.05V@0.034A
    VCCPRIM_CORE1 VCCA_SRC_1P05 +1.0VA
    BU22
    BV15 VCCPRIM_CORE2 CP5
    1 CAD NOTE: CAP 1.05V@0.034A

    1U_0402_6.3V6K
    VCCPRIM_CORE3 VCCA_XTAL_1P05 +1.0V_CLK
    BV16

    @ CC66
    +3V_PCH +3.3V_SPI VCCPRIM_CORE4
    RC170 BV18 BY24 1.24V@0.61A
    VCCPRIM_CORE5 VCCDPHY_1P24_2 +VCCLDOSRAM_1P24 +VCCDPHY_1P24
    0_0603_5% BV19 CA24
    1 @ 2 2 BV20 VCCPRIM_CORE6 VCCDPHY_1P24_4
    C C
    BV22 VCCPRIM_CORE7 BY23
    VCCPRIM_CORE8 VCCDPHY_1P24_1 CAD NOTE: CAPs DESIGN NOTE: VCCDPHY_1P24

    4.7U_0402_6.3V6M
    BW20 CA23 (BY23 CA23 CP25 BY24 CA24): PCH internal VRM
    +VCCPDSW_1P05 BW22 VCCPRIM_CORE9 VCCDPHY_1P24_3 CP25
    CA12 VCCPRIM_CORE10 VCCDPHY_EC_1P24
    VCCPRIM_CORE11 1
    CA16 BT23 3.3V@0.199A +3V_PCH_DSW
    CA18 VCCPRIM_CORE12 VCCDSW_3P3_2
    DESIGN NOTE: VCCDPHY_1P24 VCCPRIM_CORE13 CA84
    (BY23 CA23 CP25 BY24 CA24): PCH internal VRM 1 CA19 BR12 1.05V@0.027A +1.0VA
    CA20 VCCPRIM_CORE14 VCCA_19P2_1P05 2
    CC65 CB12 VCCPRIM_CORE15
    VCCPRIM_CORE16 +1.8VA
    1U_0201_6.3V6M CB14
    2 CB15 VCCPRIM_CORE17
    +1.0V_APLL VCCPRIM_CORE18 CC18
    1.05V@0.024A 1.8V@0.696A
    VCCPRIM_1P8_2

    1U_0201_6.3V6M
    BT24 CC19
    +1.0V_MPHYGT VCCDSW_1P05 VCCPRIM_1P8_3 CD18
    VCCPRIM_1P8_6 1

    CC69
    1.05V@0.102A BU14 CD19
    VCCAPLL_1P05_4 VCCPRIM_1P8_7 CP23
    BV12 VCCPRIM_1P8_9
    1.05V@2.878A
    VCCPRIM_MPHY_1P05_1 2
    1U_0201_6.3V6M

    BW12 BW23 3.3V@0.199A


    VCCPRIM_MPHY_1P05_3 VCCPRIM_3P3_2 +3V_PCH
    47U_0603_6.3V

    1 1 BW14
    VCCPRIM_MPHY_1P05_4
    CC70

    CC71

    BY12
    BY14 VCCPRIM_MPHY_1P05_5
    VCCPRIM_MPHY_1P05_6 BP23 3.3V@0.199A +3V_PCH
    2 @ 2 BV2 VCCPRIM_3P3_1
    +1.0V_AMPHYPLL 1.05V@0.152A VCCAMPHYPLL_1P05 CB36 CORE_VID0 <89>
    BR15 GPP_B0/CORE_VID0 CB35
    +1.0V_APLL 1.05V@0.102A CORE_VID1 <89>
    VCCAPLL_1P05_2 GPP_B1/CORE_VID1
    +3V_PCH 1.05V@0.129A CC12
    +1.0VA VCCDUSB_1P05
    LA65 RF@ 3.3V@0.001A BR24
    +3V_PCH_DSW VCCDSW_3P3_1
    BLM18EG221TN1D_2P~D
    1 2 VCCHDA 3.3V@0.006A BT20
    VCCHDA
    @ RC616 +3.3V_SPI 3.3V@0.002A BV23
    1

    0.01_0603_1% BT18 VCCSPI


    2 +1.0VA VCCPRIM_1P05_4
    RF@ 1 2 RF@ BT19
    R3 CC95 BU18 VCCPRIM_1P05_5
    0_0201_5% BU19 VCCPRIM_1P05_7
    B 2.2P_0201_25V VCCPRIM_1P05_8 B
    1 +1.0V_MPHYGT
    2

    BT22
    +1.0VA VCCPRIM_1P05_6
    1 2.2P_0201_25V BP22
    VCCPRIM_1P05_2
    CC77 BV14
    RF@ VCCPRIM_MPHY_1P05_2
    1
    1U_0402_6.3V6K

    2 WHL-U42_BGA1528
    @ CC99

    @
    16 of 20
    2

    +3V_PCH_DSW X04_13 +3V_PCH +3VALW


    X04_02 X04_02
    close UC1 <120mil close UC1 <100mil
    NDS3@ RC628 1 2
    0_0402_5% +1.0VA @RF@ +1.0VA +1.0V_CLK
    @ RC394 1 2 +1.0V_MPHYGT LC177 +1.0V_APLL
    0_0402_5% Q352 +1.0V_AMPHYPLL BLM18EG221TN1D_2P~D LC421
    DMG2301U-7_SOT23-3 LC423 1 2 1 2 LQM18PN2R2NC0L_2P
    1 2 LQM18PN2R2NC0L_2P

    47U_0603_6.3V
    RC424 1 2 +3.3V_ALW_DSW_Q352 1 3 RC422
    D

    0.01_0603_1% 1 1 1 1 1

    CC100

    CC83

    CC262

    CC1452

    CC261
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    1U_0201_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    1U_0201_6.3V6M
    0_0402_5% 1 1 1 1 2.2P_0201_25V 1 0_0603_5% @ RC175

    1
    1 2
    CC102

    CC80

    CC1453

    CC1454
    1U_0201_6.3V6M

    0.01_0603_1% 2 @ 1
    499K_0402_1%

    @ RC173 CE96
    1
    22U_0603_6.3V6M

    R5853 1 2 R4 RF@
    1 1
    G
    2

    2 2 2 2 2
    CC101

    @ CC82

    RF@ 0_0201_5% @
    2 2 2 2 2

    2
    2 2
    2

    1 2.2P_0201_25V
    R5854 PDG REV2.0 :1U_0402*1 + 47U_0603*1 + 2.2uH inductor
    100K_0402_5% CE84 RF@
    1

    A PDG REV2.0 :1U_0402*1 + 47U_0603*1 + 2.2uH inductor 2


    A
    1

    0.1U_0402_25V6

    R5855
    @ CC1443

    49.9K_0402_1%
    2

    2
    1

    D
    2
    Q353
    G
    VCCDSW_EN <58>
    DELL CONFIDENTIAL/PROPRIETARY
    S Security Classification Compal Secret Data Compal Electronics, Inc.
    3

    L2N7002WT1G_SC-70-3
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    P18-MCP(13/14)PCH PWR

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 18 of 100
    5 4 3 2 1
    5 4 3 2 1

    Note1: VCCPRIM_CORE Implementation with PCH CORE_VID Recommendation

    @ UCPU1R @
    UCPU1T
    @ UCPU1S
    CR34 BL7 BT35 BY25 N6 CF23
    BT5 VSS_1 VSS_73 AE25 D6 VSS_145 VSS_217 J18 B37 VSS_290 VSS_362 V4
    BY5 VSS_2 VSS_74 BM33 AL32 VSS_146 VSS_218 AU32 CB3 VSS_291 VSS_363 BE30
    D CP35 VSS_3 VSS_75 CM5 BT36 VSS_147 VSS_219 BY28 P10 VSS_292 VSS_364 CF28 D
    CM37 VSS_4 VSS_76 AE27 D8 VSS_148 VSS_220 J21 B5 VSS_293 VSS_365 W10
    CK37 VSS_5 VSS_77 BM35 AL7 VSS_149 VSS_221 AV25 CB33 VSS_294 VSS_366 BE31
    AW1 VSS_6 VSS_78 CM9 D9 VSS_150 VSS_222 BY33 P3 VSS_295 VSS_367 CF3
    CM1 VSS_7 VSS_79 AE30 AM10 VSS_151 VSS_223 J24 B7 VSS_296 VSS_368 W27
    BD6 VSS_8 VSS_80 BM36 BU11 VSS_152 VSS_224 AV28 CB4 VSS_297 VSS_369 CF4
    AY4 VSS_9 VSS_81 CN13 E23 VSS_153 VSS_225 BY35 P33 VSS_298 VSS_370 W30
    B34 VSS_10 VSS_82 AE7 AM28 VSS_154 VSS_226 J33 B9 VSS_299 VSS_371 BF3
    E35 VSS_11 VSS_83 BM9 E27 VSS_155 VSS_227 AV3 CB7 VSS_300 VSS_372 CG33
    A4 VSS_12 VSS_84 CN17 AM33 VSS_156 VSS_228 BY36 P36 VSS_301 VSS_373 W7
    AE24 VSS_13 VSS_85 AF27 BU23 VSS_157 VSS_229 J36 BA10 VSS_302 VSS_374 BF33
    AE26 VSS_14 VSS_86 BN30 E29 VSS_158 VSS_230 AV33 CC11 VSS_303 VSS_375 CG7
    AF25 VSS_15 VSS_87 CN21 AM35 VSS_159 VSS_231 J6 P4 VSS_304 VSS_376 BF36
    AG24 VSS_16 VSS_88 AF3 BU24 VSS_160 VSS_232 AV36 BA28 VSS_305 VSS_377 Y26
    AG26 VSS_17 VSS_89 BN7 E31 VSS_161 VSS_233 C1 P7 VSS_306 VSS_378 BF4
    AH24 VSS_18 VSS_90 CN25 BU25 VSS_162 VSS_234 K21 BA3 VSS_307 VSS_379 CH31
    AH25 VSS_19 VSS_91 AF30 E33 VSS_163 VSS_235 AV4 CC20 VSS_308 VSS_380 Y27
    B2 VSS_20 VSS_92 CN29 AN25 VSS_164 VSS_236 C21 R27 VSS_309 VSS_381 BG25
    B36 VSS_21 VSS_93 AF33 BU7 VSS_165 VSS_237 K22 BB3 VSS_310 VSS_382 Y30
    C36 VSS_22 VSS_94 BP15 E9 VSS_166 VSS_238 AV6 CC25 VSS_311 VSS_383 BG28
    C37 VSS_23 VSS_95 AF36 AN28 VSS_167 VSS_239 C25 R28 VSS_312 VSS_384 CJ11
    CN1 VSS_24 VSS_96 AF4 BV11 VSS_168 VSS_240 K24 BB33 VSS_313 VSS_385 Y33
    CN2 VSS_25 VSS_97 CN5 F12 VSS_169 VSS_241 AV8 CC28 VSS_314 VSS_386 CJ14
    CN37 VSS_26 VSS_98 AF7 AN29 VSS_170 VSS_242 C29 R29 VSS_315 VSS_387 Y35
    CP2 VSS_27 VSS_99 BP25 F15 VSS_171 VSS_243 K25 BB36 VSS_316 VSS_388 BH28
    D1 VSS_28 VSS_100 CN9 AN30 VSS_172 VSS_244 AW28 CC31 VSS_317 VSS_389 CJ19
    A32 VSS_29 VSS_101 AG10 F18 VSS_173 VSS_245 C33 R30 VSS_318 VSS_390 Y7
    F33 VSS_30 VSS_102 BP3 AN31 VSS_174 VSS_246 K27 BB4 VSS_319 VSS_391 BH29
    A3 VSS_31 VSS_103 CP1 BV3 VSS_175 VSS_247 AW29 CC7 VSS_320 VSS_392 CJ23
    BJ7 VSS_32 VSS_104 BP32 F2 VSS_176 VSS_248 C4 R31 VSS_321 VSS_393 BH32
    CJ36 VSS_33 VSS_105 CP11 AN7 VSS_177 VSS_249 K28 BC25 VSS_322 VSS_394 CJ28
    A36 VSS_34 VSS_106 AH27 BV31 VSS_178 VSS_250 AW3 CD11 VSS_323 VSS_395 BH33
    C BK10 VSS_35 VSS_107 BP33 F21 VSS_179 VSS_251 C9 T27 VSS_324 VSS_396 CJ33 C
    CJ4 VSS_36 VSS_108 CP13 AN8 VSS_180 VSS_252 K29 CD12 VSS_325 VSS_397 BH35
    AB27 VSS_37 VSS_109 AH28 BV33 VSS_181 VSS_253 AW30 T30 VSS_326 VSS_398 CJ35
    BK2 VSS_38 VSS_110 BP4 F24 VSS_182 VSS_254 CA11 BC29 VSS_327 VSS_399 BP19
    CK1 VSS_39 VSS_111 CP15 BV4 VSS_183 VSS_255 K3 CD14 VSS_328 VSS_400 BR16
    AB3 VSS_40 VSS_112 AH29 F3 VSS_184 VSS_256 AW31 T33 VSS_329 VSS_401 BY18
    BK28 VSS_41 VSS_113 BP7 AP3 VSS_185 VSS_257 CA15 T35 VSS_330 VSS_402 BY19
    AB30 VSS_42 VSS_114 CP19 BW11 VSS_186 VSS_258 K30 BC32 VSS_331 VSS_403 CC16
    BK3 VSS_43 VSS_115 AH30 F4 VSS_187 VSS_259 AY33 CD24 VSS_332 VSS_404 BU16
    CK4 VSS_44 VSS_116 CP21 AP33 VSS_188 VSS_260 CA22 T36 VSS_333 VSS_405 CC14
    AB33 VSS_45 VSS_117 AH31 BW15 VSS_189 VSS_261 K31 CD25 VSS_334 VSS_406 BR22
    BK33 VSS_46 VSS_118 BR19 G21 VSS_190 VSS_262 AY35 T7 VSS_335 VSS_407 BU20
    CK7 VSS_47 VSS_119 CP27 AP36 VSS_191 VSS_263 K32 BC8 VSS_336 VSS_408 CD20
    AB36 VSS_48 VSS_120 AH33 G27 VSS_192 VSS_264 B12 CE33 VSS_337 VSS_409 BT14
    BK4 VSS_49 VSS_121 BR25 AP4 VSS_193 VSS_265 K4 U26 VSS_338 VSS_410 BP12
    CL2 VSS_50 VSS_122 AH35 G33 VSS_194 VSS_266 B15 BD28 VSS_339 VSS_411 CB24
    AB4 VSS_51 VSS_123 CP37 AR28 VSS_195 VSS_267 CA25 CE35 VSS_340 VSS_412 CC24
    BK7 VSS_52 VSS_124 AJ25 G35 VSS_196 VSS_268 K9 U7 VSS_341 VSS_413 J5
    CM13 VSS_53 VSS_125 BT15 G36 VSS_197 VSS_269 B18 BD33 VSS_342 VSS_414 U24
    AB7 VSS_54 VSS_126 AJ28 AT33 VSS_198 VSS_270 CB11 CE36 VSS_343 VSS_415 BD7
    BL25 VSS_55 VSS_127 BT16 BW24 VSS_199 VSS_271 L27 V26 VSS_344 VSS_416 AR4
    CM17 VSS_56 VSS_128 CP9 G9 VSS_200 VSS_272 B21 BD35 VSS_345 VSS_417 AU4
    AC10 VSS_57 VSS_129 AJ7 AT35 VSS_201 VSS_273 L33 CE7 VSS_346 VSS_418 AW4
    BL28 VSS_58 VSS_130 CR2 H21 VSS_202 VSS_274 B23 V27 VSS_347 VSS_419 BA6
    CM21 VSS_59 VSS_131 AK3 AT36 VSS_203 VSS_275 L35 BD36 VSS_348 VSS_420 BC4
    AC27 VSS_60 VSS_132 CR36 BW7 VSS_204 VSS_276 B25 CF11 VSS_349 VSS_421 BE4
    BL29 VSS_61 VSS_133 AK33 H27 VSS_205 VSS_277 CB18 V3 VSS_350 VSS_422 BE8
    CM25 VSS_62 VSS_134 D21 AT4 VSS_206 VSS_278 L36 BE10 VSS_351 VSS_423 BA4
    AC30 VSS_63 VSS_135 AK36 BY11 VSS_207 VSS_279 B27 CF14 VSS_352 VSS_424 BD4
    BL30 VSS_64 VSS_136 BT25 AU10 VSS_208 VSS_280 CB19 V30 VSS_353 VSS_425 BG4
    CM29 VSS_65 VSS_137 D25 BY15 VSS_209 VSS_281 L6 BE28 VSS_354 VSS_426 CJ2
    BL31 VSS_66 VSS_138 AK4 H9 VSS_210 VSS_282 B29 CF19 VSS_355 VSS_427 CJ3
    B CM31 VSS_67 VSS_139 BT28 AU28 VSS_211 VSS_283 CB2 V33 VSS_356 VSS_428 AM5 B
    AD33 VSS_68 VSS_140 AL28 BY22 VSS_212 VSS_284 N25 BE29 VSS_357 VSS_429 CM4
    BL32 VSS_69 VSS_141 BT33 J12 VSS_213 VSS_285 B31 CF2 VSS_358 VSS_430 AC5
    CM33 VSS_70 VSS_142 D5 AU29 VSS_214 VSS_286 CB20 V36 VSS_359 VSS_431 AG5
    AD35 VSS_71 VSS_143 AL29 J15 VSS_215 VSS_287 N27 BE3 VSS_360 VSS_432 CR6
    VSS_72 VSS_144 VSS_216 VSS_288 CB25 VSS_361 VSS_433
    VSS_289
    WHL-U42_BGA1528 WHL-U42_BGA1528
    WHL-U42_BGA1528
    17 of 20 19 of 20
    18 of 20

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P19-MCP(14/14)VSS
    Size
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 19 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P020 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 20 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P021 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 21 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P022 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 22 of 100
    5 4 3 2 1
    5 4 3 2 1

    +1.8VU +1.8VU +1.8VU +1.8VU

    +1.8VU UD42 @ +1.8VU UD41 @

    10U_0402_6.3V6M
    A3 P9 DDR_M0_D21 A3 P9 DDR_M0_D61
    VDD1 DQ0 VDD1 DQ0

    10U_0402_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    1 1 1 A4 N9 DDR_M0_D16 1 1 1 A4 N9 DDR_M0_D56
    <7> DDR_M0_DQS#[0..7] VDD1 DQ1 VDD1 DQ1

    CD10

    CD1

    CD2

    CD12

    CD3
    A5 N10 DDR_M0_D19 A5 N10 DDR_M0_D59
    VDD1 DQ2 VDD1 DQ2

    CD9
    A6 N11 DDR_M0_D18 A6 N11 DDR_M0_D58
    <7> DDR_M0_DQS[0..7] VDD1 DQ3 VDD1 DQ3
    A10 M8 DDR_M0_D17 A10 M8 DDR_M0_D60
    2 2 2 U3 VDD1 DQ4 M9 DDR_M0_D20 2 2 2 U3 VDD1 DQ4 M9 DDR_M0_D57
    <7> DDR_M0_D[0..63] VDD1 DQ5 VDD1 DQ5
    U4 M10 DDR_M0_D23 U4 M10 DDR_M0_D62
    U5 VDD1 DQ6 M11 DDR_M0_D22 U5 VDD1 DQ6 M11 DDR_M0_D63
    <7,25> DDR_M0_CAA_[0..9] VDD1 DQ7 VDD1 DQ7
    U6 F11 DDR_M0_D24 U6 F11 DDR_M0_D55
    U10 VDD1 DQ8 F10 DDR_M0_D25 U10 VDD1 DQ8 F10 DDR_M0_D49
    <7,25> DDR_M0_CAB_[0..9] VDD1 DQ9 VDD1 DQ9
    +1.2V_DDR F9 DDR_M0_D31 +1.2V_DDR F9 DDR_M0_D54
    DQ10 F8 DDR_M0_D27 DQ10 F8 DDR_M0_D50
    D
    A8 DQ11 E11 DDR_M0_D29 A8 DQ11 E11 DDR_M0_D53 D
    A9 VDD2 DQ12 E10 DDR_M0_D28 A9 VDD2 DQ12 E10 DDR_M0_D48
    D4 VDD2 DQ13 E9 DDR_M0_D30 +1.2V_DDR +1.2V_DDR D4 VDD2 DQ13 E9 DDR_M0_D52
    +1.2V_DDR +1.2V_DDR D5 VDD2 DQ14 D9 DDR_M0_D26 D5 VDD2 DQ14 D9 DDR_M0_D51
    D6 VDD2 DQ15 T8 DDR_M0_D15 D6 VDD2 DQ15 T8 DDR_M0_D45
    G5 VDD2 DQ16 T9 DDR_M0_D14 G5 VDD2 DQ16 T9 DDR_M0_D40
    VDD2 DQ17 VDD2 DQ17

    10U_0402_6.3V6M
    H5 T10 DDR_M0_D11 H5 T10 DDR_M0_D43
    VDD2 DQ18 VDD2 DQ18
    10U_0402_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    H6 T11 DDR_M0_D12 1 1 1 1 H6 T11 DDR_M0_D42
    VDD2 DQ19 VDD2 DQ19
    CD4

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    CD6

    CD7

    CD8

    CD14
    H12 R8 DDR_M0_D13 H12 R8 DDR_M0_D44
    1 1 1 1 VDD2 DQ20 VDD2 DQ20

    CD5

    CD11

    CD13
    J5 R9 DDR_M0_D10 J5 R9 DDR_M0_D41
    J6 VDD2 DQ21 R10 DDR_M0_D8 J6 VDD2 DQ21 R10 DDR_M0_D46
    K5 VDD2 DQ22 R11 DDR_M0_D9 2 2 2 2 K5 VDD2 DQ22 R11 DDR_M0_D47
    2 2 2 2 K6 VDD2 DQ23 C11 DDR_M0_D6 K6 VDD2 DQ23 C11 DDR_M0_D33
    K12 VDD2 DQ24 C10 DDR_M0_D7 K12 VDD2 DQ24 C10 DDR_M0_D38
    L5 VDD2 DQ25 C9 DDR_M0_D2 L5 VDD2 DQ25 C9 DDR_M0_D39
    P4 VDD2 DQ26 C8 DDR_M0_D0 P4 VDD2 DQ26 C8 DDR_M0_D35
    P5 VDD2 DQ27 B11 DDR_M0_D1 P5 VDD2 DQ27 B11 DDR_M0_D34
    P6 VDD2 DQ28 B10 DDR_M0_D3 P6 VDD2 DQ28 B10 DDR_M0_D37
    U8 VDD2 DQ29 B9 DDR_M0_D4 U8 VDD2 DQ29 B9 DDR_M0_D32
    U9 VDD2 DQ30 B8 DDR_M0_D5 U9 VDD2 DQ30 B8 DDR_M0_D36
    +1.2V_DDR VDD2 DQ31 +1.2V_DDR +1.2V_DDR +1.2V_DDR +1.2V_DDR VDD2 DQ31

    +1.2V_DDR +1.2V_DDR +1.2V_DDR


    Closed to UD41
    A11 R2 DDR_M0_CAA_0 A11 R2 DDR_M0_CAB_0
    C12 VDDQ CA0 P2 DDR_M0_CAA_1 C12 VDDQ CA0 P2 DDR_M0_CAB_1
    Closed to UD42 VDDQ CA1 VDDQ CA1

    10U_0402_6.3V6M

    0.1U_0402_16V7K~D

    0.1U_0402_16V7K~D
    E8 N2 DDR_M0_CAA_2 E8 N2 DDR_M0_CAB_2
    VDDQ CA2 VDDQ CA2

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    E12 N3 DDR_M0_CAA_3 1 1 1 1 1 1 1 E12 N3 DDR_M0_CAB_3
    VDDQ CA3 VDDQ CA3
    10U_0402_6.3V6M

    0.1U_0402_16V7K~D

    0.1U_0402_16V7K~D

    CD22

    CD23

    CD24

    CD25

    CD26
    G12 M3 DDR_M0_CAA_4 G12 M3 DDR_M0_CAB_4
    VDDQ CA4 VDDQ CA4
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    CD27

    CD28
    1 1 1 1 1 1 1 H8 F3 DDR_M0_CAA_5 H8 F3 DDR_M0_CAB_5
    VDDQ CA5 VDDQ CA5
    CD15

    CD16

    CD17

    CD18

    CD19

    CD20

    H9 E3 DDR_M0_CAA_6 H9 E3 DDR_M0_CAB_6
    VDDQ CA6 2 2 2 2 2 2 2 VDDQ CA6
    CD21

    H11 E2 DDR_M0_CAA_7 H11 E2 DDR_M0_CAB_7


    J9 VDDQ CA7 D2 DDR_M0_CAA_8 J9 VDDQ CA7 D2 DDR_M0_CAB_8
    2 2 2 2 2 2 2 J10 VDDQ CA8 C2 DDR_M0_CAA_9 J10 VDDQ CA8 C2 DDR_M0_CAB_9
    K8 VDDQ CA9 K8 VDDQ CA9
    K11 VDDQ K11 VDDQ
    L12 VDDQ L10 DDR_M0_DQS2 L12 VDDQ L10 DDR_M0_DQS7
    N8 VDDQ DQS0 G10 DDR_M0_DQS3 N8 VDDQ DQS0 G10 DDR_M0_DQS6
    N12 VDDQ DQS1 P10 DDR_M0_DQS1 N12 VDDQ DQS1 P10 DDR_M0_DQS5
    R12 VDDQ DQS2 D10 DDR_M0_DQS0 R12 VDDQ DQS2 D10 DDR_M0_DQS4
    C C
    U11 VDDQ DQS3 U11 VDDQ DQS3
    +1.2V_DDR VDDQ +1.2V_DDR +1.2V_DDR +1.2V_DDR VDDQ
    L11 DDR_M0_DQS#2 L11 DDR_M0_DQS#7
    F2 DQS0# G11 DDR_M0_DQS#3 F2 DQS0# G11 DDR_M0_DQS#6
    +1.2V_DDR +1.2V_DDR G2 VDDCA DQS1# P11 DDR_M0_DQS#1 G2 VDDCA DQS1# P11 DDR_M0_DQS#5
    VDDCA DQS2# VDDCA DQS2#

    10U_0402_6.3V6M
    H3 D11 DDR_M0_DQS#0 H3 D11 DDR_M0_DQS#4
    VDDCA DQS3# VDDCA DQS3#

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    L2 1 1 1 L2
    VDDCA VDDCA

    CD29

    CD30

    CD31
    M2 M2
    VDDCA VDDCA
    10U_0402_6.3V6M

    L8 L8
    DM0 DM0
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1 1 1 G8 G8
    DM1 2 2 2 DM1
    CD32

    CD33

    CD34

    A1 P8 A1 P8
    A2 NC DM2 D8 A2 NC DM2 D8
    A12 NC DM3 A12 NC DM3
    2 2 2 A13 NC A13 NC
    B1 NC B3 DDR_A0_ZQ0 RD1 1 2 240_0402_1% B1 NC B3 DDR_A1_ZQ0 RD2 1 2 240_0402_1%
    B13 NC ZQ0 B4 DDR_A0_ZQ1 RD3 1 2 240_0402_1% B13 NC ZQ0 B4 DDR_A1_ZQ1 RD4 1 2 240_0402_1%
    C4 NC ZQ1 C4 NC ZQ1
    K9 NC K9 NC
    R3 NC K3 R3 NC K3
    NC CKE0 DDR_M0_CKE0 <7,25> NC CKE0 DDR_A_CKE2 <7,25>
    T1 K4 DDR_M0_CKE1 <7,25> T1 K4 DDR_A_CKE3 <7,25>
    T13 NC CKE1 T13 NC CKE1
    U1 NC U1 NC
    U2 NC L3 DDR_M0_CS#0 U2 NC L3 DDR_M0_CS#0
    NC CS0# DDR_M0_CS#0 <7,25> NC CS0#
    U12 L4 DDR_M0_CS#1 U12 L4 DDR_M0_CS#1
    NC CS1# DDR_M0_CS#1 <7,25> NC CS1#
    U13 U13
    NC NC
    J3 DDR_M0_CLK0 <7,25> J3 DDR_M0_CLK1 <7,25>
    P3 CK J2 P3 CK J2
    VSSCA CK# DDR_M0_CLK#0 <7,25> All VREF traces should VSSCA CK# DDR_M0_CLK#1 <7,25>
    M4 have 10 mil trace width M4
    J4 VSSCA J4 VSSCA
    G4 VSSCA J8 DDR_M0_ODT0 G4 VSSCA J8 DDR_M0_ODT0
    VSSCA ODT DDR_M0_ODT0 <7,25> VSSCA ODT
    G3 G3
    F4 VSSCA F4 VSSCA
    D3 VSSCA J11 D3 VSSCA J11
    VSSCA Vref_DQ +VREFDQ_A VSSCA Vref_DQ +VREFDQ_A
    C3 H4 +VREFCA C3 H4 +VREFCA
    VSSCA Vref_CA VSSCA Vref_CA

    B B
    T12 B2 T12 B2
    T6 VSSQ VSS B5 T6 VSSQ VSS B5
    VSSQ VSS Closed to DRAM VSSQ VSS Closed to DRAM
    R6 C5 R6 C5
    P12 VSSQ VSS E4 +VREFDQ_A +VREFCA P12 VSSQ VSS E4 +VREFDQ_A +VREFCA
    N6 VSSQ VSS E5 N6 VSSQ VSS E5
    M12 VSSQ VSS F5 M12 VSSQ VSS F5
    VSSQ VSS VSSQ VSS
    0.047U_0402_10V7K~D

    0.047U_0402_10V7K~D

    0.047U_0402_10V7K~D

    0.047U_0402_10V7K~D
    M6 H2 M6 H2
    L9 VSSQ VSS J12 L9 VSSQ VSS J12
    K10 VSSQ VSS K2 K10 VSSQ VSS K2
    VSSQ VSS 1 1 VSSQ VSS 1 1
    CD35

    CD36

    CD37

    CD38
    H10 L6 H10 L6
    G9 VSSQ VSS M5 G9 VSSQ VSS M5
    G6 VSSQ VSS N4 G6 VSSQ VSS N4
    F12 VSSQ VSS N5 2 2 F12 VSSQ VSS N5 2 2
    F6 VSSQ VSS R4 F6 VSSQ VSS R4
    E6 VSSQ VSS R5 E6 VSSQ VSS R5
    D12 VSSQ VSS T2 D12 VSSQ VSS T2
    C6 VSSQ VSS T3 C6 VSSQ VSS T3
    B12 VSSQ VSS T4 B12 VSSQ VSS T4
    B6 VSSQ VSS T5 B6 VSSQ VSS T5
    VSSQ VSS VSSQ VSS

    H9CCNNN8JTMLAR-NTM_FBGA178~D H9CCNNN8JTMLAR-NTM_FBGA178~D

    Decoupling per DRAM device


    VDDQ 4x 0402 1uF 2x 0201 0.1uF 1x 0603 10uF +1.2V_DDR +1.8VU
    VDDCA 2x 0402 1uF 1x 0603 10uF
    VDD2 3x 0402 1uF 1x 0603 10uF
    VDD1 2x 0402 1uF 1x 0603 10uF
    10U_0402_6.3V6M

    10U_0402_6.3V6M

    intel uesd 0201 for 0.1uF 1 1


    CD39

    CD40

    A 2 2 A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P23-DDRIII Channel A
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 23 of 100
    5 4 3 2 1
    5 4 3 2 1

    <7> DDR_M1_DQS#[0..7] +1.8VU +1.8VU +1.8VU +1.8VU


    <7> DDR_M1_DQS[0..7] +1.8VU UD44 @ +1.8VU UD43 @
    <7> DDR_M1_D[0..63]

    10U_0402_6.3V6M

    10U_0402_6.3V6M
    A3 P9 DDR_M1_D27 A3 P9 DDR_M1_D61
    VDD1 DQ0 VDD1 DQ0

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    1 1 1 A4 N9 DDR_M1_D26 1 1 1 A4 N9 DDR_M1_D57
    <7,25> DDR_M1_CAA_[0..9] VDD1 DQ1 VDD1 DQ1

    CD44

    CD45

    CD41

    CD47

    CD48

    CD42
    A5 N10 DDR_M1_D29 A5 N10 DDR_M1_D63
    A6 VDD1 DQ2 N11 DDR_M1_D24 A6 VDD1 DQ2 N11 DDR_M1_D59
    <7,25> DDR_M1_CAB_[0..9] VDD1 DQ3 VDD1 DQ3
    A10 M8 DDR_M1_D30 A10 M8 DDR_M1_D60
    2 2 2 U3 VDD1 DQ4 M9 DDR_M1_D31 2 2 2 U3 VDD1 DQ4 M9 DDR_M1_D56
    U4 VDD1 DQ5 M10 DDR_M1_D25 U4 VDD1 DQ5 M10 DDR_M1_D62
    U5 VDD1 DQ6 M11 DDR_M1_D28 U5 VDD1 DQ6 M11 DDR_M1_D58
    U6 VDD1 DQ7 F11 DDR_M1_D2 U6 VDD1 DQ7 F11 DDR_M1_D39
    U10 VDD1 DQ8 F10 DDR_M1_D1 U10 VDD1 DQ8 F10 DDR_M1_D38
    +1.2V_DDR VDD1 DQ9 F9 DDR_M1_D4 +1.2V_DDR VDD1 DQ9 F9 DDR_M1_D34
    DQ10 F8 DDR_M1_D6 DQ10 F8 DDR_M1_D33
    D
    A8 DQ11 E11 DDR_M1_D0 A8 DQ11 E11 DDR_M1_D32 D
    A9 VDD2 DQ12 E10 DDR_M1_D5 A9 VDD2 DQ12 E10 DDR_M1_D37
    +1.2V_DDR +1.2V_DDR D4 VDD2 DQ13 E9 DDR_M1_D7 +1.2V_DDR +1.2V_DDR D4 VDD2 DQ13 E9 DDR_M1_D35
    D5 VDD2 DQ14 D9 DDR_M1_D3 D5 VDD2 DQ14 D9 DDR_M1_D36
    D6 VDD2 DQ15 T8 DDR_M1_D14 D6 VDD2 DQ15 T8 DDR_M1_D55
    G5 VDD2 DQ16 T9 DDR_M1_D10 G5 VDD2 DQ16 T9 DDR_M1_D50
    VDD2 DQ17 VDD2 DQ17
    10U_0402_6.3V6M

    10U_0402_6.3V6M
    H5 T10 DDR_M1_D9 H5 T10 DDR_M1_D48
    VDD2 DQ18 VDD2 DQ18

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    1 1 1 1 H6 T11 DDR_M1_D8 1 1 1 1 H6 T11 DDR_M1_D49
    VDD2 DQ19 VDD2 DQ19
    CD43

    CD49

    CD46

    CD50

    CD51

    CD52

    CD53

    CD54
    H12 R8 DDR_M1_D15 H12 R8 DDR_M1_D54
    J5 VDD2 DQ20 R9 DDR_M1_D11 J5 VDD2 DQ20 R9 DDR_M1_D51
    J6 VDD2 DQ21 R10 DDR_M1_D13 J6 VDD2 DQ21 R10 DDR_M1_D53
    2 2 2 2 K5 VDD2 DQ22 R11 DDR_M1_D12 2 2 2 2 K5 VDD2 DQ22 R11 DDR_M1_D52
    K6 VDD2 DQ23 C11 DDR_M1_D18 K6 VDD2 DQ23 C11 DDR_M1_D46
    K12 VDD2 DQ24 C10 DDR_M1_D23 K12 VDD2 DQ24 C10 DDR_M1_D44
    L5 VDD2 DQ25 C9 DDR_M1_D22 L5 VDD2 DQ25 C9 DDR_M1_D45
    P4 VDD2 DQ26 C8 DDR_M1_D21 P4 VDD2 DQ26 C8 DDR_M1_D41
    P5 VDD2 DQ27 B11 DDR_M1_D19 P5 VDD2 DQ27 B11 DDR_M1_D47
    P6 VDD2 DQ28 B10 DDR_M1_D16 P6 VDD2 DQ28 B10 DDR_M1_D43
    U8 VDD2 DQ29 B9 DDR_M1_D17 U8 VDD2 DQ29 B9 DDR_M1_D42
    U9 VDD2 DQ30 B8 DDR_M1_D20 U9 VDD2 DQ30 B8 DDR_M1_D40
    +1.2V_DDR +1.2V_DDR +1.2V_DDR +1.2V_DDR VDD2 DQ31 +1.2V_DDR VDD2 DQ31
    Closed to UD44 +1.2V_DDR +1.2V_DDR +1.2V_DDR
    A11 R2 DDR_M1_CAA_0 Closed to UD43 A11 R2 DDR_M1_CAB_0
    C12 VDDQ CA0 P2 DDR_M1_CAA_1 C12 VDDQ CA0 P2 DDR_M1_CAB_1
    VDDQ CA1 VDDQ CA1
    10U_0402_6.3V6M

    0.1U_0402_16V7K~D

    0.1U_0402_16V7K~D

    E8 N2 DDR_M1_CAA_2 E8 N2 DDR_M1_CAB_2
    VDDQ CA2 VDDQ CA2
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    10U_0402_6.3V6M

    0.1U_0402_16V7K~D

    0.1U_0402_16V7K~D
    1 1 1 1 1 1 1 E12 N3 DDR_M1_CAA_3 E12 N3 DDR_M1_CAB_3
    VDDQ CA3 VDDQ CA3
    CD55

    CD56

    CD57

    CD58

    CD59

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    G12 M3 DDR_M1_CAA_4 G12 M3 DDR_M1_CAB_4
    VDDQ CA4 1 1 1 1 1 1 1 VDDQ CA4
    CD60

    CD61

    CD62

    CD63

    CD64

    CD65

    CD66
    H8 F3 DDR_M1_CAA_5 H8 F3 DDR_M1_CAB_5
    VDDQ CA5 VDDQ CA5

    CD67

    CD68
    H9 E3 DDR_M1_CAA_6 H9 E3 DDR_M1_CAB_6
    2 2 2 2 2 2 2 H11 VDDQ CA6 E2 DDR_M1_CAA_7 H11 VDDQ CA6 E2 DDR_M1_CAB_7
    J9 VDDQ CA7 D2 DDR_M1_CAA_8 2 2 2 2 2 2 2 J9 VDDQ CA7 D2 DDR_M1_CAB_8
    J10 VDDQ CA8 C2 DDR_M1_CAA_9 J10 VDDQ CA8 C2 DDR_M1_CAB_9
    K8 VDDQ CA9 K8 VDDQ CA9
    K11 VDDQ K11 VDDQ
    L12 VDDQ L10 DDR_M1_DQS3 L12 VDDQ L10 DDR_M1_DQS7
    N8 VDDQ DQS0 G10 DDR_M1_DQS0 N8 VDDQ DQS0 G10 DDR_M1_DQS4
    N12 VDDQ DQS1 P10 DDR_M1_DQS1 N12 VDDQ DQS1 P10 DDR_M1_DQS6
    R12 VDDQ DQS2 D10 DDR_M1_DQS2 R12 VDDQ DQS2 D10 DDR_M1_DQS5
    C C
    U11 VDDQ DQS3 U11 VDDQ DQS3
    +1.2V_DDR VDDQ +1.2V_DDR +1.2V_DDR +1.2V_DDR VDDQ
    +1.2V_DDR +1.2V_DDR L11 DDR_M1_DQS#3 L11 DDR_M1_DQS#7
    F2 DQS0# G11 DDR_M1_DQS#0 F2 DQS0# G11 DDR_M1_DQS#4
    G2 VDDCA DQS1# P11 DDR_M1_DQS#1 G2 VDDCA DQS1# P11 DDR_M1_DQS#6
    VDDCA DQS2# VDDCA DQS2#

    10U_0402_6.3V6M
    H3 D11 DDR_M1_DQS#2 H3 D11 DDR_M1_DQS#5
    VDDCA DQS3# VDDCA DQS3#
    10U_0402_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    L2 1 1 1 L2
    VDDCA VDDCA
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    CD72

    CD73

    CD74
    1 1 1 M2 M2
    VDDCA VDDCA
    CD69

    CD70

    CD71

    L8 L8
    DM0 G8 DM0 G8
    A1 DM1 P8 2 2 2 A1 DM1 P8
    2 2 2 A2 NC DM2 D8 A2 NC DM2 D8
    A12 NC DM3 A12 NC DM3
    A13 NC A13 NC
    B1 NC B3 DDR_B0_ZQ0 RD5 1 2 240_0402_1% B1 NC B3 DDR_B1_ZQ0 RD6 1 2 240_0402_1%
    B13 NC ZQ0 B4 DDR_B0_ZQ1 RD7 1 2 240_0402_1% B13 NC ZQ0 B4 DDR_B1_ZQ1 RD8 1 2 240_0402_1%
    C4 NC ZQ1 C4 NC ZQ1
    K9 NC K9 NC
    R3 NC K3 R3 NC K3
    NC CKE0 DDR_M1_CKE0 <7,25> NC CKE0 DDR_B_CKE2 <7,25>
    T1 K4 DDR_M1_CKE1 <7,25> T1 K4 DDR_B_CKE3 <7,25>
    T13 NC CKE1 T13 NC CKE1
    U1 NC U1 NC
    U2 NC L3 DDR_M1_CS#0 U2 NC L3 DDR_M1_CS#0
    NC CS0# DDR_M1_CS#0 <7,25> NC CS0#
    U12 L4 DDR_M1_CS#1 U12 L4 DDR_M1_CS#1
    NC CS1# DDR_M1_CS#1 <7,25> NC CS1#
    U13 U13
    NC NC
    J3 DDR_M1_CLK0 <7,25> J3 DDR_M1_CLK1 <7,25>
    P3 CK J2 P3 CK J2
    VSSCA CK# DDR_M1_CLK#0 <7,25> All VREF traces should VSSCA CK# DDR_M1_CLK#1 <7,25>
    M4 have 10 mil trace width M4
    J4 VSSCA J4 VSSCA
    G4 VSSCA J8 DDR_M1_ODT0 G4 VSSCA J8 DDR_M1_ODT0
    VSSCA ODT DDR_M1_ODT0 <7,25> VSSCA ODT
    G3 G3
    F4 VSSCA F4 VSSCA
    D3 VSSCA J11 D3 VSSCA J11
    VSSCA Vref_DQ +VREFDQ_B VSSCA Vref_DQ +VREFDQ_B
    C3 H4 +VREFCA C3 H4 +VREFCA
    VSSCA Vref_CA VSSCA Vref_CA

    B B
    T12 B2 T12 B2
    T6 VSSQ VSS B5 T6 VSSQ VSS B5
    VSSQ VSS Closed to DRAM VSSQ VSS Closed to DRAM
    R6 C5 R6 C5
    P12 VSSQ VSS E4 +VREFDQ_B +VREFCA P12 VSSQ VSS E4 +VREFDQ_B +VREFCA
    N6 VSSQ VSS E5 N6 VSSQ VSS E5
    M12 VSSQ VSS F5 M12 VSSQ VSS F5
    VSSQ VSS VSSQ VSS
    0.047U_0402_10V7K~D

    0.047U_0402_10V7K~D

    0.047U_0402_10V7K~D

    0.047U_0402_10V7K~D
    M6 H2 M6 H2
    L9 VSSQ VSS J12 L9 VSSQ VSS J12
    K10 VSSQ VSS K2 K10 VSSQ VSS K2
    VSSQ VSS 1 1 VSSQ VSS 1 1
    CD75

    CD76

    CD77

    CD78
    H10 L6 H10 L6
    G9 VSSQ VSS M5 G9 VSSQ VSS M5
    G6 VSSQ VSS N4 G6 VSSQ VSS N4
    F12 VSSQ VSS N5 2 2 F12 VSSQ VSS N5 2 2
    F6 VSSQ VSS R4 F6 VSSQ VSS R4
    E6 VSSQ VSS R5 E6 VSSQ VSS R5
    D12 VSSQ VSS T2 D12 VSSQ VSS T2
    C6 VSSQ VSS T3 C6 VSSQ VSS T3
    B12 VSSQ VSS T4 B12 VSSQ VSS T4
    B6 VSSQ VSS T5 B6 VSSQ VSS T5
    VSSQ VSS VSSQ VSS

    H9CCNNN8JTMLAR-NTM_FBGA178~D H9CCNNN8JTMLAR-NTM_FBGA178~D

    Decoupling per DRAM device


    VDDQ 4x 0402 1uF 2x 0201 0.1uF 1x 0603 10uF
    VDDCA 2x 0402 1uF 1x 0603 10uF
    VDD2 3x 0402 1uF 1x 0603 10uF
    VDD1 2x 0402 1uF 1x 0603 10uF
    intel uesd 0201 for 0.1uF

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    P23-DDRIII Channel B

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 24 of 100
    5 4 3 2 1
    5 4 3 2 1

    +1.2V_DDR

    M3 M1

    1
    VREF traces should be at least 20 mils wide
    with 20 mils spacing to other signals/planes.
    RD9
    8.2K_0402_1%

    2
    RD10
    <7> 1 2
    +V_DDR_REF_CA +VREFCA
    1
    4.99_0402_1%~D
    CD79
    0.022U_0402_16V7K~D

    1
    D 2 D

    RD11

    1
    8.2K_0402_1%
    RD12

    2
    24.9_0402_1%

    2
    +1.2V_DDR +1.2V_DDR

    M3 M1 M3 M1

    1
    RD13 RD14
    8.2K_0402_1% 8.2K_0402_1%

    2
    RD15 RD16
    <7> 1 2 <7> 1 2
    +V_DDR_REFA_R +VREFDQ_A +V_DDR_REFB_R +VREFDQ_B

    1 10_0402_1%~D 1 10_0402_1%~D

    CD80 CD81

    1
    0.022U_0402_16V7K~D 0.022U_0402_16V7K~D
    2 2
    RD17 RD18

    1
    8.2K_0402_1% 8.2K_0402_1%
    1

    RD20

    2
    RD19 24.9_0402_1%
    24.9_0402_1%
    C C

    2
    2

    +0.6VS +0.6VS

    <7,23> RD21 1 2 68_0201_1% <7,24> RD22 1 2 68_0201_1%


    DDR_M0_CAA_0 DDR_M1_CAA_0
    RD23 1 2 68_0201_1% RD24 1 2 68_0201_1%
    <7,23> DDR_M0_CAA_1 <7,24> DDR_M1_CAA_1
    RD25 1 2 68_0201_1% RD26 1 2 68_0201_1%
    <7,23> DDR_M0_CAA_2 <7,24> DDR_M1_CAA_2
    <7,23> RD27 1 2 68_0201_1% <7,24> RD28 1 2 68_0201_1%
    DDR_M0_CAA_3 1 2 DDR_M1_CAA_3 1 2
    <7,23> RD29 68_0201_1% <7,24> RD30 68_0201_1%
    DDR_M0_CAA_4 DDR_M1_CAA_4
    <7,23> RD31 1 2 68_0201_1% <7,24> RD32 1 2 68_0201_1%
    DDR_M0_CAA_5 DDR_M1_CAA_5
    RD33 1 2 68_0201_1% RD34 1 2 68_0201_1%
    <7,23> DDR_M0_CAA_6 <7,24> DDR_M1_CAA_6
    RD35 1 2 68_0201_1% RD36 1 2 68_0201_1%
    <7,23> DDR_M0_CAA_7 <7,24> DDR_M1_CAA_7
    <7,23> RD37 1 2 68_0201_1% <7,24> RD38 1 2 68_0201_1%
    DDR_M0_CAA_8 1 2 DDR_M1_CAA_8 1 2
    <7,23> RD39 68_0201_1% <7,24> RD40 68_0201_1%
    DDR_M0_CAA_9 DDR_M1_CAA_9

    RD41 1 2 68_0201_1% RD42 1 2 68_0201_1%


    <7,23> DDR_M0_CAB_0 <7,24> DDR_M1_CAB_0
    <7,23> RD43 1 2 68_0201_1% <7,24> RD44 1 2 68_0201_1%
    DDR_M0_CAB_1 DDR_M1_CAB_1
    RD45 1 2 68_0201_1% RD46 1 2 68_0201_1%
    <7,23> DDR_M0_CAB_2 <7,24> DDR_M1_CAB_2
    RD47 1 2 68_0201_1% RD48 1 2 68_0201_1%
    <7,23> DDR_M0_CAB_3 <7,24> DDR_M1_CAB_3
    <7,23> RD49 1 2 68_0201_1% <7,24> RD50 1 2 68_0201_1%
    DDR_M0_CAB_4 1 2 DDR_M1_CAB_4 1 2
    <7,23> RD51 68_0201_1% <7,24> RD52 68_0201_1%
    DDR_M0_CAB_5 DDR_M1_CAB_5
    <7,23> RD53 1 2 68_0201_1% <7,24> RD54 1 2 68_0201_1%
    DDR_M0_CAB_6 DDR_M1_CAB_6
    RD55 1 2 68_0201_1% RD56 1 2 68_0201_1%
    <7,23> DDR_M0_CAB_7 <7,24> DDR_M1_CAB_7
    RD57 1 2 68_0201_1% RD58 1 2 68_0201_1%
    <7,23> DDR_M0_CAB_8 <7,24> DDR_M1_CAB_8
    <7,23> RD59 1 2 68_0201_1% <7,24> RD60 1 2 68_0201_1%
    DDR_M0_CAB_9 DDR_M1_CAB_9

    B B

    <7,23> RD61 1 2 80.6_0201_1%~D <7,24> RD62 1 2 80.6_0201_1%~D


    DDR_M0_CS#0 DDR_M1_CS#0
    <7,23> DDR_M0_CS#1 RD63 1 2 80.6_0201_1%~D <7,24> DDR_M1_CS#1 RD64 1 2 80.6_0201_1%~D

    +0.6VS
    <7,23> RD65 1 2 80.6_0201_1%~D <7,24> RD66 1 2 80.6_0201_1%~D
    DDR_M0_CKE0 DDR_M1_CKE0
    <7,23> RD67 1 2 80.6_0201_1%~D <7,24> RD68 1 2 80.6_0201_1%~D
    DDR_M0_CKE1 DDR_M1_CKE1
    <7,23> DDR_A_CKE2 RD69 1 2 80.6_0201_1%~D <7,24> DDR_B_CKE2 RD70 1 2 80.6_0201_1%~D
    <7,23> RD71 1 2 80.6_0201_1%~D <7,24> RD72 1 2 80.6_0201_1%~D
    DDR_A_CKE3 DDR_B_CKE3
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    10U_0603_25V6M

    10U_0603_25V6M
    1 1 1 1 1 1

    CD104

    CD110
    CD100 CD101 CD102 CD103 <7,23> RD73 1 2 80.6_0201_1%~D <7,24> RD74 1 2 80.6_0201_1%~D
    DDR_M0_ODT0 DDR_M1_ODT0

    2 2 2 2 2 2

    +0.6VS +0.6VS

    <7,23> DDR_M0_CLK0 RD75 1 2 37.4_0201_1%~D <7,24> DDR_M1_CLK0 RD76 1 2 37.4_0201_1%~D

    <7,23> DDR_M0_CLK#0 RD77 1 2 37.4_0201_1%~D <7,24> DDR_M1_CLK#0 RD78 1 2 37.4_0201_1%~D

    +0.6VS
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    10U_0603_25V6M

    10U_0603_25V6M

    1 1 1 1 1 1
    CD105 CD106 CD107 CD108
    +0.6VS +0.6VS
    CD109

    CD111

    2 2 2 2 2 2

    A <7,23> DDR_M0_CLK1 RD79 1 2 37.4_0201_1%~D <7,24> DDR_M1_CLK1 RD80 1 2 37.4_0201_1%~D A

    <7,23> DDR_M0_CLK#1 RD81 1 2 37.4_0201_1%~D <7,24> DDR_M1_CLK#1 RD82 1 2 37.4_0201_1%~D

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P25-DDRIII Vref & Termination
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 25 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P026 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 26 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P027 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 27 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P028 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 28 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P029 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 29 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P030 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 30 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P031 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 31 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P032 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 32 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P033 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 33 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P034 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

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    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
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    Date: Monday, October 22, 2018 Sheet 34 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P035 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 35 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P036 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

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    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 36 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P037 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G441P
    Date: Monday, October 22, 2018 Sheet 37 of 100
    5 4 3 2 1
    5 4 3 2 1

    IR Digital CAM / eDP Backlight B+ @ R5826 B+_CAM


    B+_CAM

    0_0603_5% @ C1119 1
    1 2 Css, Soft start setting
    1nF, rise time = 12uS 22P_0201_25V8J
    Css, Soft start setting 10nF, rise time = 100uS 2
    1nF, rise time = 12uS +INV_PWR_SRC B+ 100nF, rise time = 1000uS
    10nF, rise time = 100uS
    B+ 100nF, rise time = 1000uS C1049 1 60mil
    B+_CAM_F

    1U_0603_25V6K
    EMC@
    60mil X04_10

    1
    1U_0603_25V6K @ C1120 @
    22P_0201_25V8J C1121 1 2 0.01UF_0402_25V7K
    60mil
    1

    C1051 2
    60mil

    2
    C312 1 2 0.1U_0402_25V6K @ R6 B+_CAM
    D D
    @ U31 0.01_0603_1%
    2

    R253 +INV_PWR_SRC 9 1 2
    U22 0_0603_5% 1 VOUT @ R5824
    SS 1
    9 1 2 8 1 2 @ C1122
    1 VOUT R251 2 DIS 240_0402_1%
    SS 1 <10,58> B+_CAM_EN EN
    8 1 2 C1052 7 0.1U_0402_25V6
    2 DIS 240_0402_1% 3 PG 2
    <58> EN_INVPWR EN VIN1
    7 0.1U_0402_25V6 6
    3 PG 2 4 VBIAS
    VIN1 6 VIN2 5
    VBIAS GND ALS
    4 @ +3VALW +3VALW
    VIN2 5 AP22850SH8-7_W-DFN2020-8 R5825
    GND +3VALW +3VALW 1 2 B+_CAM
    1
    AP22850SH8-7_W-DFN2020-8 R252 10K_0201_5% @ C1123
    1 @ 2 JCAM1
    10K_0201_5% C1050
    1 CAM & IR CAM 1
    +3VALW 0.1U_0201_10V6K
    2 2 1
    0.1U_0201_10V6K 3 2
    +3VALW 2 +INV_PWR_SRC 3
    4
    5 4
    X04_01 6 5
    LCD BL Power LCD_GPIO1 7 6
    LCD_GPIO2 8 7
    <9> LCD_GPIO2 BL_PWMO 9 8
    L1 EMC@ B+_CAM +INV_PWR_SRC +3VS_CAM DISPOFF# 10 9
    1 2 USB20_P5_R 11 10
    <10> USB20_P5 +3VS_CAM 11
    12
    <12> CAM_CBL_DET# 12

    ESD101-B1-02ELS_TSSLP-2-4-2

    ESD101-B1-02ELS_TSSLP-2-4-2
    @ C1068 1 USB20_P5_R 13
    13

    10U_0402_6.3V6M

    0.1U_0201_10V6K

    0.1U_0201_10V6K

    68P_0402_50V8J
    EMC@ C21
    4 3 USB20_N5_R C1053 1 USB20_N5_R 14
    <10> USB20_N5 1 C1054 @ 1 1 1 14

    ESD101-B1-02ELS_TSSLP-2-4-2
    TVNST52302AB0_SOT523-3 EMC@ 15
    CAM & IR CAM

    1
    15

    10U_0603_25V6M

    C18

    C19

    C20
    EXC24CH900U_4P D2 D72 16
    3

    1
    2 16

    10U_0603_25V6M

    0.1U 16V K X5R 0201


    D3 D4 17

    2
    2 2 2 2 2 18 17
    19 18
    20 19
    21 20
    EMC@ EMC@ 22 G1
    1

    EMC@ EMC@ 23 G2
    C C

    2
    24 G3
    2

    2
    G4

    ACES_50406-02071-001
    CONN@

    eDP Conn +LCDVDD


    C1055 1 2 0.1U_0201_10V6K eDP_TXN0_C R14 1 @ 2 0_0201_5% eDP_TXN_P0_CONN JEDP1
    <6> eDP_TXN0
    <9> DBC_EN 40 45
    39 40 G5 44
    C1058 1 2 0.1U_0201_10V6K eDP_TXP0_C R15 1 @ 2 0_0201_5% eDP_TXP_P0_CONN C1067 1 C1065 1 C1066 1 C1018 1 +LCDVDD 38 39 G4 43
    <6> eDP_TXP0 <58> LCD_TST 38 G3
    EMC@ EMC@ EDP_HPD_R 37 42
    36 37 G2 41
    36 G1

    1
    0.1U_0201_10V6K

    10U_0402_6.3V6M

    22P_0402_50V8J

    100P_0201_50V8J
    @ RR21 eDP_TXN_P3_CONN 35
    2 2 2 2 eDP_TXP_P3_CONN 34 35
    C1064 1 2 0.1U_0201_10V6K eDP_TXN1_C R256 1 @ 2 0_0201_5% eDP_TXN_P1_CONN 10K_0402_5% 33 34
    <6> eDP_TXN1 33
    eDP_TXN_P2_CONN 32
    eDP_TXP_P2_CONN 31 32

    2
    C1063 1 2 0.1U_0201_10V6K eDP_TXP1_C R259 1 @ 2 0_0201_5% eDP_TXP_P1_CONN 30 31
    <6> eDP_TXP1 30
    RR22 RR23 eDP_TXN_P1_CONN 29
    1 @ 2 1 @ 2 EDP_HPD_R eDP_TXP_P1_CONN 28 29
    <6> EDP_HPD 28
    27
    0_0402_1% 0_0402_1% eDP_TXN_P0_CONN 26 27
    C1056 1 2 0.1U_0201_10V6K eDP_TXN2_C R260 1 @ 2 0_0201_5% eDP_TXN_P2_CONN eDP_TXP_P0_CONN 25 26
    <6> eDP_TXN2 25
    24
    +3VS_TS eDP_AUXP_CONN 23 24
    C1061 1 2 0.1U_0201_10V6K eDP_TXP2_C R261 1 @ 2 0_0201_5% eDP_TXP_P2_CONN eDP_AUXN_CONN 22 23
    <6> eDP_TXP2 22
    RC183 1 2 4.7K_0402_5% I2C0_SDA_TS 21
    RC184 1 2 4.7K_0402_5% I2C0_SCK_TS 20 21
    19 20
    +LCDVDD 19
    Jony_12/13 : RVP keep 4.7k ohm 18
    B
    C1062 1 2 0.1U_0201_10V6K eDP_TXN3_C R262 1 @ 2 0_0201_5% eDP_TXN_P3_CONN 17 18 B
    <6> eDP_TXN3 570990_CFL_U_DDR4_RVP_CRB_Sch_Rev0p8.pdf 17
    +LCDVDD 16
    RR20 1 @ 2 0_0201_5% 15 16
    <9> TS_I2C_RST# 15
    C1059 1 2 0.1U_0201_10V6K eDP_TXP3_C R255 1 @ 2 0_0201_5% eDP_TXP_P3_CONN RC372 1 2 4.7K_0402_5% I2C2_SDA_EDP_PCH 14
    <6> eDP_TXP3 14
    RC373 1 2 4.7K_0402_5% I2C2_SCK_EDP_PCH @ RR18 0_0201_5% 1 2 I2C2_SDA_EDP_PCH_R 13
    <9> I2C2_SDA_EDP_PCH I2C2_SCK_EDP_PCH_R 13
    <9> I2C2_SCK_EDP_PCH @ RR19 0_0201_5% 1 2 12
    11 12
    C1060 1 2 0.1U_0201_10V6K eDP_AUXN_C R257 1 @ 2 0_0201_5% eDP_AUXN_CONN INV_PWM_R 10 11
    <6> eDP_AUXN 10
    BL_PWMO 9
    LCD_GPIO2 8 9
    C1057 1 2 0.1U_0201_10V6K eDP_AUXP_C R258 1 @ 2 0_0201_5% eDP_AUXP_CONN LCD_GPIO1 7 8
    <6> eDP_AUXP 7
    6
    5 6
    <14> TOUCH_SCREEN_PD# 5
    4
    +3VS_TS EDP_3 4
    <9> I2C0_SDA_TS RR15 0_0402_1% 1 @ 2 3
    RR16 0_0402_1% 1 @ 2 EDP_2 2 3
    <9> I2C0_SCK_TS 2

    ESD101-B1-02ELS_TSSLP-2-4-2
    RR17 0_0402_1% 1 @ 2 EDP_1 1
    <6> I2C2_IRQ_TS 1
    Use I2CI for General Touch Module EDP
    +3VS_TS CONN@
    BackLight PWM Control

    1
    D18

    10U_0402_6.3V6M

    0.1U_0201_10V6K

    0.1U_0201_10V6K
    1 1 1

    C131

    C132

    C133
    D5 EMC@
    <6> PANEL_BKLEN 2

    2
    2 2 2
    1 DISPOFF#
    1

    <58> 3
    PANEL_BKEN_EC
    R13
    220K_0402_5%~D
    BAT54CW_SOT323-3
    2

    A A

    D6
    <6> 2
    EDP_BIA_PWM
    1 INV_PWM_R
    2

    3
    <58> BIA_PWM_EC
    R16
    1
    @ MC1
    DELL CONFIDENTIAL/PROPRIETARY
    BAT54CW_SOT323-3
    4.7K_0402_5%
    2
    680P_0402_50V7K~D Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2041/09/08 Deciphered Date 2013/10/28 Title
    1

    P38-eDP+TS & CAM+BL CONN

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 38 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P039 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 39 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P040 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 40 of 100
    5 4 3 2 1
    5 4 3 2 1

    @ UT2A
    +3VA_TBT_LC CT1 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_P9_C Y23 V23 PCIE_PRX_TBTX_P9_C CT2 2 1 0.22U_0201_6.3V6M
    <10> PCIE_PTX_TBRX_P9 PCIE_RX0_P PCIE_TX0_P PCIE_PRX_TBTX_P9 <10>
    VCC3V3_LC <10> CT3 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_N9_C Y22 V22 PCIE_PRX_TBTX_N9_C CT4 2 1 0.22U_0201_6.3V6M <10>
    PCIE_PTX_TBRX_N9 PCIE_RX0_N PCIE_TX0_N PCIE_PRX_TBTX_N9

    CPU PCIE RX
    1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_P10_C T23 PCIE_PRX_TBTX_P10_C CT19 2

    CPU PCIE TX
    <10> PCIE_PTX_TBRX_P10 CT5 2 P23 1 0.22U_0201_6.3V6M
    PCIE_PRX_TBTX_P10 <10>
    CT20 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_N10_C T22 PCIE_RX1_P PCIE_TX1_P P22 PCIE_PRX_TBTX_N10_C CT21 2 1 0.22U_0201_6.3V6M
    1
    <10> PCIE_PTX_TBRX_N10 PCIE_RX1_N PCIE_TX1_N PCIE_PRX_TBTX_N10 <10> X04_03

    1
    10K_0402_5%

    10K_0402_5%

    10K_0402_5%

    10K_0402_5%
    <10> CT22 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_P11_C M23 K23 PCIE_PRX_TBTX_P11_C CT6 2 1 0.22U_0201_6.3V6M <10>
    PCIE_PTX_TBRX_P11 PCIE_RX2_P PCIE_TX2_P PCIE_PRX_TBTX_P11
    1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_N11_C M22 PCIE_PRX_TBTX_N11_C CT8

    PCIe GEN3
    <10> PCIE_PTX_TBRX_N11 CT7 2 K22 2 1 0.22U_0201_6.3V6M
    PCIE_PRX_TBTX_N11 <10>
    PCIE_RX2_N PCIE_TX2_N
    RT6

    RT5

    RT4

    RT3
    <10> CT9 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_P12_C H23 F23 PCIE_PRX_TBTX_P12_C CT10 2 1 0.22U_0201_6.3V6M <10>
    +3V_PCH
    PCIE_PTX_TBRX_P12 PCIE_PRX_TBTX_P12
    2

    2
    CT11 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_N12_C H22 PCIE_RX3_P PCIE_TX3_P F22 PCIE_PRX_TBTX_N12_C CT12 2 1 0.22U_0201_6.3V6M
    <10> PCIE_PTX_TBRX_N12 PCIE_RX3_N PCIE_TX3_N PCIE_PRX_TBTX_N12 <10>
    TBT_JTAG_TDI
    TBT_JTAG_TMS V19 L4 TBT_PERST# TBT_CIO_PLUG_EVENT# RT441 2 1 10K_0201_1%
    <11> CLK0_PCIE_TBT PCIE_REFCLK_100_IN_P PERST_N
    TBT_JTAG_TCK T19
    <11> CLK0_PCIE_TBT# PCIE_REFCLK_100_IN_N
    TBT_JTAG_TDO RT71 2 @ 1 0_0201_5% CLKREQ_PCIE#0_N AC5 N16 PCIe_RBIAS RT7 2 1 3.01K_0402_1%
    <11> CLKREQ_PCIE#0 PCIE_CLKREQ_N PCIE_RBIAS
    <6> DDI1_PTX_TBRX_P0 CT13 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_P0_C AB7 R2
    TBT_DP_ML0_P <71>
    CT14 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_N0_C AC7 DPSNK0_ML0_P DPSRC_ML0_P R1 TBT_CIO_PLUG_EVENT# Power rail from +3VA_TBT change to +3V_PCH
    <6> DDI1_PTX_TBRX_N0 DPSNK0_ML0_N DPSRC_ML0_N TBT_DP_ML0_N <71>
    For backdrive issue RT441 pull up and RT29 change to NC. +3VA_TBT
    <6> DDI1_PTX_TBRX_P1 CT23 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_P1_C AB9 N2
    TBT_DP_ML1_P <71>
    CT15 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_N1_C AC9 DPSNK0_ML1_P DPSRC_ML1_P N1 TBT_TMU_CLK_OUT
    <6> DDI1_PTX_TBRX_N1 DPSNK0_ML1_N DPSRC_ML1_N TBT_DP_ML1_N <71>
    PCIE_WAKE#_AR

    SOURCE PORT 0
    RTD3@ RT430 2 1 10K_0201_1%
    1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_P2_C

    CPU DDI1

    100P_0201_50V8J
    D
    <6> DDI1_PTX_TBRX_P2 CT16 2 AB11 L2 TBT_DP_ML2_P <71> 1
    D
    1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_N2_C DPSNK0_ML2_P DPSRC_ML2_P PCH_PCIE_WAKE#

    SINK PORT 0
    <6> DDI1_PTX_TBRX_N2 CT24 2 AC11 L1
    TBT_DP_ML2_N <71> @ RT429 2 1 10K_0201_1%
    DPSNK0_ML2_N DPSRC_ML2_N

    C1083
    <6> CT17 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_P3_C AB13 J2 <71>
    DDI1_PTX_TBRX_P3 DPSNK0_ML3_P DPSRC_ML3_P TBT_DP_ML3_P 2
    <6> DDI1_PTX_TBRX_N3 CT18 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_N3_C AC13 J1 TBT_DP_ML3_N <71>
    DPSNK0_ML3_N DPSRC_ML3_N
    CT25 2 1 0.1U_0201_6.3V6K CPU_DDI1_AUXP_C Y11 W19 <45,71>
    <6> CPU_DDI1_AUXP DPSNK0_AUX_P DPSRC_AUX_P TBT_DP_AUX_P
    CT26 2 1 0.1U_0201_6.3V6K CPU_DDI1_AUXN_C W11 Y19 <45,71>
    <6> CPU_DDI1_AUXN DPSNK0_AUX_N DPSRC_AUX_N TBT_DP_AUX_N
    CPU_DP1_HPD AA2 G1 TBT_SRC_HPD RT8 1 @ 2 0_0201_5%
    <6> CPU_DP1_HPD DPSNK0_HPD DPSRC_HPD TBT_DP_HPD <45,71>
    CPU_DP1_CTRL_CLK @ RT91 2 1 0_0201_5% TBT_SNK0_DDC_CLK Y5 N6 DPSRC_RBIAS RT9 2 1 14K_0402_1%
    <6> CPU_DP1_CTRL_CLK DPSNK0_DDC_CLK DPSRC_RBIAS
    CPU_DP1_CTRL_DATA @ RT92 2 1 0_0201_5% TBT_SNK0_DDC_DATA R4
    <6> CPU_DP1_CTRL_DATA DPSNK0_DDC_DATA U1 TBT_I2C_DATA
    GPIO_0 TBT_I2C_DATA <43,44>
    <6> DDI2_PTX_TBRX_P0 CT27 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_P0_C AB15 U2 TBT_I2C_CLK
    TBT_I2C_CLK <43,44>
    CT28 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_N0_C AC15 DPSNK1_ML0_P GPIO_1 V1 TBT_ROM_WP#
    <6> DDI2_PTX_TBRX_N0 DPSNK1_ML0_N GPIO_2 V2 TBT_TMU_CLK_OUT
    CT29 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_P1_C AB17 GPIO_3 W1 PCIE_WAKE#_AR
    <6> DDI2_PTX_TBRX_P1 DPSNK1_ML1_P GPIO_4
    <6> DDI2_PTX_TBRX_N1 CT30 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_N1_C AC17 W2 TBT_CIO_PLUG_EVENT#
    TBT_CIO_PLUG_EVENT# <12>
    DPSNK1_ML1_N GPIO_5 TBT_DDC_DATA

    CPU DDI2
    Y1

    LC GPIO
    CT31 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_P2_C AB19 GPIO_6 Y2 TBT_DDC_CLK
    <6> DDI2_PTX_TBRX_P2 DPSNK1_ML2_P GPIO_7
    1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_N2_C TBT_SRC_CFG1

    SINK PORT 1
    <6> DDI2_PTX_TBRX_N2 CT32 2 AC19 AA1
    DPSNK1_ML2_N GPIO_8 J4 TBT_A_I2C_INT#
    POC_GPIO_0 TBT_A_I2C_INT# <43>
    <6> CT33 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_P3_C AB21 E2 TBT_B_I2C_INT#
    <44>
    DDI2_PTX_TBRX_P3 DPSNK1_ML3_P POC_GPIO_1 TBT_B_I2C_INT#
    <6> DDI2_PTX_TBRX_N3 CT34 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_N3_C AC21 D4 RTD3_USB_PWR_EN
    RTD3_USB_PWR_EN <12>
    DPSNK1_ML3_N POC_GPIO_2 H4 TBT_FORCE_PWR
    POC_GPIO_3 TBT_FORCE_PWR <12>
    CT35 2 1 0.1U_0201_6.3V6K CPU_DDI2_AUXP_C Y12 F2 TBT_BATLOW#
    <12>
    <6> CPU_DDI2_AUXP DPSNK1_AUX_P POC_GPIO_4 TBT_BATLOW#
    CT36 2 1 0.1U_0201_6.3V6K CPU_DDI2_AUXN_C W12 D2 TBT_SLP_S3_N RT16 1 @ 2 0_0201_5% <11,58,59,65>
    <6> SIO_SLP_S3#

    POC GPIO
    CPU_DDI2_AUXN DPSNK1_AUX_N POC_GPIO_5 RTD3_CIO_PWR_EN
    F1 RTD3_CIO_PWR_EN <6,12>
    CPU_DP2_HPD Y6 POC_GPIO_6
    <6> CPU_DP2_HPD DPSNK1_HPD E1 TBT_TEST_EN 2 1
    CPU_DP2_CTRL_CLK @ RT93 2 1 0_0201_5% TBT_SNK1_DDC_CLK Y8 TEST_EN 100_0201_1% RT18 RT69 2 @ 1 0_0201_5%
    <6> CPU_DP2_CTRL_CLK DPSNK1_DDC_CLK TBT_RESET_N_EC <58>
    CPU_DP2_CTRL_DATA @ RT94 2 1 0_0201_5% TBT_SNK1_DDC_DATA N4 AB5 TBT_TEST_PWRG 2 1
    <6> CPU_DP2_CTRL_DATA DPSNK1_DDC_DATA TEST_PWR_GOOD

    Misc
    100_0201_1% RT21
    2 1 DPSNK_RBIAS Y18 F4 TBT_RESET_N_R @ RT17 2 1 0_0201_5%
    DPSNK_RBIAS RESET_N TBT_A_RESET_N <43>
    RT23 14K_0402_1%
    TBT_JTAG_TDI Y4 D22 XTAL_25_IN
    TBT_JTAG_TMS V4 TDI XTAL_25_IN D23 XTAL_25_OUT @ RT15 2 1 0_0201_5%
    TMS XTAL_25_OUT TBT_B_RESET_N <44>
    TBT_JTAG_TCK T4
    AR/PPS COMMON FLASH TBT_JTAG_TDO W4 TCK AB3 TBT_ROM_DI
    TDO MISC EE_DI AC4 TBT_ROM_DO @ RT12 2 1 0_0201_5%
    EE_DO MUX_C_RESET_N <45>
    VCC3V3_TBT_LDO_A TBT_RBIAS H6 AC3 TBT_ROM_CS#
    1 2 TBT_RSENSE J6 RBIAS EE_CS_N AB4 TBT_ROM_CLK
    RT28 4.75K_0402_0.5% RSENSE EE_CLK RT22 2 @ 1 0_0201_5% UPD_MRESET <43,44,45>
    <46> TBT_USB3_RX1_P
    A15 B7 TBT_USB3_RX3_P <46>
    B15 PA_RX1_P PB_RX1_P A7
    <46> TBT_USB3_RX1_N PA_RX1_N PB_RX1_N TBT_USB3_RX3_N <46>
    1
    1

    <46> CT39 2 1 0.22U_0201_6.3V6M TBT_USB3_TX1_P_C A17 A9 TBT_USB3_TX3_P_C CT40 1 2 0.22U_0201_6.3V6M <46>


    2.2K_0201_1%

    2.2K_0201_1%

    2.2K_0201_1%

    2.2K_0201_1%

    TBT_USB3_TX1_P TBT_USB3_TX3_P
    0.1U_0201_6.3V6K

    PA_TX1_P PB_TX1_P
    CT51

    CT41 2 1 0.22U_0201_6.3V6M TBT_USB3_TX1_N_C B17 B9 TBT_USB3_TX3_N_C 1 2 0.22U_0201_6.3V6M


    RT47

    RT46

    RT45

    RT44

    <46> TBT_USB3_TX1_N CT42 TBT_USB3_TX3_N <46>


    PA_TX1_N PB_TX1_N
    C 2 CT43 2 1 0.22U_0201_6.3V6M TBT_USB3_TX0_P_C A19 A11 TBT_USB3_TX2_P_C CT44 1 2 0.22U_0201_6.3V6M C
    <46> TBT_USB3_TX0_P PA_TX0_P PB_TX0_P TBT_USB3_TX2_P <46>
    <46> TBT_USB3_TX0_N CT45 2 1 0.22U_0201_6.3V6M TBT_USB3_TX0_N_C B19 B11 TBT_USB3_TX2_N_C CT46 1 2 0.22U_0201_6.3V6M TBT_USB3_TX2_N <46>
    2

    PA_TX0_N PB_TX0_N
    TBT PORT A

    TBT PORT B
    B21 A13

    PORT A

    PORT B
    <46> TBT_USB3_RX0_P PA_RX0_P PB_RX0_P TBT_USB3_RX2_P <46>
    UT3 <46> TBT_USB3_RX0_N
    A21 B13 TBT_USB3_RX2_N <46>
    TBT_ROM_CS# 1 8 PA_RX0_N PB_RX0_N
    TBT_ROM_DO 2 CS# VCC 7 TBT_ROM_HOLD# CT47 2 1 0.1U_0201_6.3V6K TBT_A_AUX_P_C Y15 Y16 TBT_B_AUX_P_C CT48 1 2 0.1U_0201_6.3V6K
    <43> TBT_A_AUX_P TBT_B_AUX_P <44>

    TBT PORTS
    TBT_ROM_WP# 3 DO(IO1) HOLD#(IO3) 6 TBT_ROM_CLK CT49 2 1 0.1U_0201_6.3V6K TBT_A_AUX_N_C W15 PA_DPSRC_AUX_P PB_DPSRC_AUX_P W16 TBT_B_AUX_N_C CT50 1 2 0.1U_0201_6.3V6K
    WP#(IO2) CLK <43> TBT_A_AUX_N PA_DPSRC_AUX_N PB_DPSRC_AUX_N TBT_B_AUX_N <44>
    4 5 TBT_ROM_DI
    GND DI(IO0) 9 E20 E19
    thermal pad <43> TBT_A_USB2_D_P PA_USB2_D_P PB_USB2_D_P TBT_B_USB2_D_P <44>
    <43> TBT_A_USB2_D_N
    D20 D19 TBT_B_USB2_D_N <44>
    W25Q64FVZPIQ PA_USB2_D_N PB_USB2_D_N
    TBT_A_LSTX A5 B4 TBT_B_LSTX
    <43> <44>

    POC

    POC
    TBT_A_LSTX TBT_A_LSRX PA_LS_G1 PB_LS_G1 TBT_B_LSRX TBT_B_LSTX
    <43> TBT_A_LSRX
    A4 B5 TBT_B_LSRX <44>
    RT44,RT47 use 3.3K ohm TBT_A_HPD M4 PA_LS_G2 PB_LS_G2 G2 TBT_B_HPD
    <43> TBT_A_HPD PA_LS_G3 PB_LS_G3 TBT_B_HPD <44>
    Use SA00008WH00 for MP (1M) PA_USB2_RBIAS PB_USB2_RBIAS 2
    2 1 H19 F19 1
    PA_USB2_RBIAS PB_USB2_RBIAS
    +3VA_TBT RT42 AC23 D6 RT43
    499_0201_1% AB23 THERMDA MONDC_SVR 499_0201_1%
    THERMDA A23
    TBT_DDC_CLK RT11 2 1 2.2K_0201_5% V18 ATEST_P B23
    PCIE_ATEST ATEST_N
    TBT_DDC_DATA RT13 2 1 2.2K_0201_5% AC1 E18
    TEST_EDM DEBUG USB2_ATEST
    L15 W13
    N15 FUSE_VQPS_64 MONDC_DPSNK_0
    FUSE_VQPS_128 W18
    TBT_SNK0_DDC_CLK RT80 2 1 100K_0201_5% C23 MONDC_DPSNK_1
    C22 MONDC_CIO_0 AB2
    TBT_SNK0_DDC_DATA RT81 2 1 100K_0201_5% MONDC_CIO_1 MONDC_DPSRC
    AR-4C_BGA337
    RTD3_CIO_PWR_EN @ RT34 2 1 10K_0201_1%
    TBT_SNK1_DDC_CLK RT82 2 1 100K_0201_5%
    TBT_SNK1_DDC_DATA RT83 2 1 100K_0201_5%

    @RTD3@

    +3VA_TBT
    For RTD3 MUX Support RT190 2 1 0_0201_5%

    +3VALW C1614 RTD3@


    0.1U_0201_10V6K
    CLKREQ_PCIE#0_N @ RT10 2 1 10K_0201_1%
    NOTE: XTAL 1 2
    ASSEMBLE R165, R166 if DPSRC
    YT1
    RTD3_CIO_PWR_EN RT19 2 RTD3@ 1 10K_0201_1% NOT IN USE RT24 33_0201_1%
    4 3 XTAL_25_OUT_R 1 2 XTAL_25_OUT

    5
    TBT_RESET_N_R @ RT14 2 1 10K_0201_1% RT72 33_0201_1%
    B TBT_SRC_CFG1 R165 1 2 1M_0201_1% XTAL_25_IN 2 1 XTAL_25_IN_R 1 2 1 RTD3@ 2 1 B
    <11,52,59,66,67,70>

    P
    TBT_I2C_DATA PCH_PLTRST#_EC B TBT_PERST#_R TBT_PERST#
    RT25 2 1 2.2K_0201_5% 1 RT285 0_0201_5% 4 1 RTD3@ 2
    TBT_SRC_HPD R166 1 2 100K_0201_5% 1 RTD3@ 2 2 O RT287 0_0201_5%
    1 <6> PCH_TBT_PERST# A

    1
    TBT_I2C_CLK RT26 2 1 2.2K_0201_5% 25MHZ_20PF_FL2500123Z CT37 RT284 UT14
    NOTE: CT38 27P_0201_25V8 RT288

    3
    PCIE_WAKE#_R @ RT27 2 1 10K_0201_1% 27P_0201_25V8 2 RTD3@ 0_0201_5% 100K_0201_5%
    TBT_SRC_CFG1 = 0 for DP mode. 2 TC7SH08FU_SSOP5~D RTD3@
    TBT_CIO_PLUG_EVENT# @ RT29 2 1 10K_0201_1%

    2
    TBT_SLP_S3_N @ RT84 2 1 10K_0201_1%
    RT183 2 @RTD3@1 0_0201_5%
    TBT_BATLOW# RT30 2 1 10K_0201_1%
    TBT_A_I2C_INT# RT31 2 1 10K_0201_1% +3VALW

    TBT_B_I2C_INT# RT100 2 1 10K_0201_1%


    1
    RTD3_USB_PWR_EN RT20 2 1 10K_0201_1%
    RTD3@ C1613
    PCH TBT_RTD3_WAKE# RT294 1 2 0.1U_0201_10V6K
    <6> TBT_RTD3_WAKE# 2
    0_0201_5% UT15 RTD3@
    CPU PCH_PCIE_WAKE# 1@RTD3@ 2 1 5
    <11,58,59> PCH_PCIE_WAKE# NO V+
    RT289 0_0201_5%
    EC PCIE_WAKE#_R 1 RTD3@ 2 3 4 PCIE_WAKE#_AR_R 1 RTD3@ 2 PCIE_WAKE#_AR
    <58,59,67> PCIE_WAKE#_R NC COM
    RT290 0_0201_5% RT292 0_0201_5%

    1
    1 RTD3@ 2 6 2
    <58> RTD3_SELECT IN GND
    RT442 0_0201_5% RT293

    1
    TBT_TMU_CLK_OUT RT32 2 1 100K_0201_5% TS5A3159ADCKR_SC70-6 1M_0201_5%
    RT291 RTD3@ @RTD3@
    TBT_FORCE_PWR RT33 2 1 10K_0201_1% 10K_0201_5%

    2
    TBT_B_HPD RT39 2 1 100K_0201_5%
    X04_04

    2
    TBT_A_HPD RT36 2 1 100K_0201_5%

    TBT_A_LSRX
    FUNCTION TABLE
    RT38 2 1 1M_0201_1%

    TBT_B_LSRX RT41 2 1 1M_0201_1%


    NC TO COM NO TO COM
    IN IN NC NO
    TBT_B_LSTX RT40 2 1 1M_0201_1%
    COM TO NC COM TO NO
    TBT_A_LSTX RT37 2 1 1M_0201_1%
    L ON OFF L COM X
    RTD3_USB_PWR_EN @ RT35 2 1 100K_0201_5%
    H OFF ON H X COM

    A A

    PCIE_WAKE#_R 0_0402_5% 1 2 RT431 @ PCIE_WAKE#_AR

    PCH_PCIE_WAKE# 0_0402_5% 1 2 RT432 @


    TBT_RTD3_WAKE# 0_0402_5% 1 2 RT433 @ By pass can remove

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2014/09/08 Deciphered Date 2012/07/25

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P42-AR_TBT (1/2) DP / PCIE
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 41 of 100
    5 4 3 2 1
    5 4 3 2 1

    close to UT2.R13 close to UT2.H9

    +3V_TBT_S0 +3VA_TBT

    D D

    39P_0201_50V8J
    EMC@ C1089

    100P_0201_50V8J
    EMC@ C1090

    39P_0201_50V8J
    EMC@ C1113

    100P_0201_50V8J
    EMC@ C1114
    1 1 1 1

    2 2 2 2

    close to UT2.F8

    +3VA_TBT +3VA_TBT

    RT88 1 @ 2 0_0402_5%~D
    close to UT2.R6

    39P_0201_50V8J
    EMC@ C1091

    100P_0201_50V8J
    EMC@ C1092
    +3VA_TBT_LC +3VA_TBT_LC
    1 1
    +3VALW RT49 +3VA_TBT +3V_TBT_S0 close to UT2.A2,A3,B3 +3V_TBT
    LT2
    0_0603_5%
    2 @ 1 1 1 2
    2 2

    39P_0201_50V8J
    EMC@ C1093

    100P_0201_50V8J
    EMC@ C1094

    0.1U_0201_10V6K
    CT59

    1U_0201_6.3V6M
    CT60

    1U_0201_6.3V6M
    +3V_TBT TDP=520mA +3VS

    47U_0603_6.3V

    47U_0603_6.3V

    39P_0201_50V8J
    EMC@ C1095

    100P_0201_50V8J
    EMC@ C1096

    1U_0201_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M

    10U_0402_6.3V6M
    1 1 1 1 1 1 LQM18PN1R0MFHD_2P
    +3VS

    CT91

    CT92

    CT93
    1 1 1 1 1 1 1 RT50
    2

    CT62

    CT63

    CT64

    CT65
    0_0603_5%

    CT61
    RT89 1 @ 2 0_0603_5% 2 @ 1
    2 2 2 2 2 2
    2 2 2 2 2 2 2 +3VALW

    R13
    +VCC0V9_PCIE +VCC0V9_DP +VCC0V9_DP RT90 1 2 0_0603_5%

    R6

    H9
    @

    F8
    close to UT2 close to UT2 @ UT2B
    L8 A2

    VCC3P3_LC

    VCC3P3_SX

    VCC3P3A
    VCC3P3_S0
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    L11 VCC0P9_DP VCC3P3_SVR A3
    L12 VCC0P9_DP VCC3P3_SVR
    39P_0201_50V8J
    EMC@ C1099

    100P_0201_50V8J
    EMC@ C1100

    39P_0201_50V8J
    EMC@ C1097

    100P_0201_50V8J
    EMC@ C1098

    1 1 1 1 1 1 1 B3
    M8 VCC0P9_DP VCC3P3_SVR
    CT52

    CT53

    CT54

    CT55

    CT56

    CT57

    CT58
    1 1 1 1
    T11 VCC0P9_DP
    T12 VCC0P9_DP L9 VCC0V9_SVR

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    2 2 2 2 2 2 2 L6 VCC0P9_DP VCC0P9_SVR M9
    2 2 2 2 M6 VCC0P9_ANA_DPSRC VCC0P9_SVR E12 1 1 1 1 1 1 1
    V11 VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA E13

    CT72

    CT73

    CT74

    CT75

    CT76

    CT77

    CT78
    V12 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F11 close to UT2 close to UT2
    +VCC0V9_PCIE V13 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F12
    VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F13 2 2 2 2 2 2 2 VCC0V9_SVR TBT_SVR_IND
    M13 VCC0P9_SVR_ANA F15
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    M15 VCC0P9_PCIE VCC0P9_SVR_ANA

    39P_0201_50V8J
    EMC@ C1101

    100P_0201_50V8J
    EMC@ C1102

    39P_0201_50V8J
    EMC@ C1115

    100P_0201_50V8J
    EMC@ C1116
    J9
    1 1 1 1 M16 VCC0P9_PCIE VCC0P9_SVR_SENSE LT1 1 1 1 1
    +VCC0V9_USB L19 VCC0P9_PCIE
    CT67

    CT68

    CT69

    CT70

    VCC
    C close to UT2.R15,R16 N19 VCC0P9_ANA_PCIE_1 C1 TBT_SVR_IND 1 2 0.6UH_MND-04ABIR60M-XGL_20% C
    L18 VCC0P9_ANA_PCIE_1 SVR_IND C2
    2 2 2 2 M18 VCC0P9_ANA_PCIE_2 SVR_IND 2 2 2 2

    47U_0603_6.3V

    47U_0603_6.3V

    47U_0603_6.3V
    D1 1 1 1
    N18 VCC0P9_ANA_PCIE_2 SVR_IND
    39P_0201_50V8J
    EMC@ C1103

    100P_0201_50V8J
    EMC@ C1104

    CT79

    CT80

    CT81
    +VCC0V9_USB VCC0P9_ANA_PCIE_2
    1 1
    R15 A1
    R16 VCC0P9_USB SVR_VSS B1 2 2 2
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    VCC0P9_USB SVR_VSS B2
    2 2 R8 SVR_VSS
    1 1
    R9 VCC0P9_CIO
    CT71

    CT66

    R11 VCC0P9_CIO
    R12 VCC0P9_CIO F18
    2 2 VCC0P9_CIO VCC0P9_LVR H18 close to UT2
    VCC_3V3_PCIE L16 VCC0P9_LVR J11
    VCC_3V3_USB2 J16 VCC3P3_ANA_PCIE VCC0P9_LVR H11 VCC0V9_LVR_OUT VCC0V9_LVR_OUT

    1U_0201_6.3V6M

    1U_0201_6.3V6M
    VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE

    10U_0402_6.3V6M

    10U_0402_6.3V6M
    +VCC0V9_CIO

    39P_0201_50V8J
    EMC@ C1105

    100P_0201_50V8J
    EMC@ C1106
    A6 V5 1 1 1 1
    +VCC0V9_CIO A8 VSS_ANA VSS_ANA

    CT85

    CT86
    close to UT2.R8,R9,R11,R12 V6

    CT87

    CT88
    1 1
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    A10 VSS_ANA VSS_ANA V8


    A12 VSS_ANA VSS_ANA
    1

    1 1 V9
    10K_0402_5%
    1U_0201_6.3V6M

    1U_0201_6.3V6M

    1U_0201_6.3V6M

    A14 VSS_ANA VSS_ANA 2 2 2 2


    39P_0201_50V8J
    EMC@ C1107

    100P_0201_50V8J
    EMC@ C1108

    V15
    A16 VSS_ANA VSS_ANA
    CT89

    CT90

    V16 2 2
    RT440

    1 1 1 1 1
    A18 VSS_ANA VSS_ANA V20
    CT82

    CT83

    CT84

    2 2 A20 VSS_ANA VSS_ANA W5


    2

    A22 VSS_ANA VSS_ANA W6


    2 2 2 2 2 B6 VSS_ANA VSS_ANA W8
    B8 VSS_ANA VSS_ANA W9
    B10 VSS_ANA VSS_ANA W20
    B12 VSS_ANA VSS_ANA W22
    B14 VSS_ANA VSS_ANA W23
    B16 VSS_ANA VSS_ANA Y9
    close to UT2.L16 close to UT2.J16 B18 VSS_ANA VSS_ANA Y13
    B20 VSS_ANA VSS_ANA Y20
    VCC_3V3_PCIE VCC_3V3_USB2 B22 VSS_ANA VSS_ANA AA22
    D8 VSS_ANA VSS_ANA AA23
    D9 VSS_ANA VSS_ANA
    39P_0201_50V8J
    EMC@ C1109

    100P_0201_50V8J
    EMC@ C1110

    39P_0201_50V8J
    EMC@ C1111

    100P_0201_50V8J
    EMC@ C1112

    AB6
    1 1 1 1 D11 VSS_ANA VSS_ANA AB8
    D12 VSS_ANA VSS_ANA AB10
    D13 VSS_ANA VSS_ANA AB12
    D15 VSS_ANA VSS_ANA AB14
    2 2 2 2 D16 VSS_ANA VSS_ANA AB16
    D18 VSS_ANA VSS_ANA AB18
    E8 VSS_ANA VSS_ANA AB20
    E9 VSS_ANA VSS_ANA AB22
    E11 VSS_ANA VSS_ANA AC6
    E15 VSS_ANA VSS_ANA AC8
    E16 VSS_ANA VSS_ANA AC10
    GND

    E22 VSS_ANA VSS_ANA AC12


    E23 VSS_ANA VSS_ANA AC14
    F9 VSS_ANA VSS_ANA AC16
    B F16 VSS_ANA VSS_ANA AC18 B
    F20 VSS_ANA VSS_ANA AC20
    G22 VSS_ANA VSS_ANA AC22
    G23 VSS_ANA VSS_ANA D5
    H1 VSS_ANA VSS E4
    H2 VSS_ANA VSS E5
    H12 VSS_ANA VSS E6
    H13 VSS_ANA VSS F5
    H15 VSS_ANA VSS F6
    H16 VSS_ANA VSS H5
    H20 VSS_ANA VSS H8
    J5 VSS_ANA VSS J8
    J18 VSS_ANA VSS J12
    J19 VSS_ANA VSS J13
    J20 VSS_ANA VSS J15
    J22 VSS_ANA VSS L13
    J23 VSS_ANA VSS M11
    K1 VSS_ANA VSS M12
    K2 VSS_ANA VSS N8
    L5 VSS_ANA VSS N9
    L20 VSS_ANA VSS N11
    L22 VSS_ANA VSS N12
    L23 VSS_ANA VSS N13
    M1 VSS_ANA VSS T6
    M2 VSS_ANA VSS T8
    M5 VSS_ANA VSS T9
    M19 VSS_ANA VSS T13
    M20 VSS_ANA VSS T15
    N5 VSS_ANA VSS T16
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA
    VSS_ANA

    N20 VSS_ANA VSS T18


    N22 VSS_ANA VSS AB1
    N23 VSS_ANA VSS AC2
    VSS_ANA VSS
    AR-4C_BGA337
    P1
    P2
    R5
    R18
    R19
    R20
    R22
    R23
    T1
    T2
    T5
    T20
    U23
    U22

    A A

    Security Classification Compal Secret Data


    Title
    Compal Electronics, Inc.
    Issued Date 2014/09/08 Deciphered Date 2012/07/25

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P42-AR_TBT (2/2) PWR / VSS
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 42 of 100
    5 4 3 2 1
    5 4 3 2 1

    TBT_LDO_BMC_A VCC3V3_TBT_SX_A VCC3V3_TBT_LDO_A

    +5VALW
    1 1 1
    CT96 C141 C142
    2.2U_0402_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M
    2 2 2
    1 1 1 1
    C143 C144 C145 C146
    22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 2 2 2

    +3V_LDO +3V_VC_A VCC1V8A_TBT_LDO_A VCC1V8D_TBT_LDO_A +VBUS1_PD_20V


    D D

    R5746 1 @ 2
    1 1

    1
    +3VALW 0_0402_1%
    CT94 CT95 C140
    @ R265 1 2 0_0402_5% 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 1U_0603_25V6K

    2
    +3V_VC_A 2 2
    VCC3V3_TBT_LDO_A

    @ R5747 1 2 0_0402_5% 1

    VIN_3V3 source for dead battery C139


    Placement in bottom side 10U_0402_6.3V6M
    2 U19

    R5794 1 @ 2 A6 B10
    A7 PP_HV SENSEP A10
    0_0402_1% A8 PP_HV SENSEN
    VCC3V3_TBT_LDO_A B7 PP_HV
    PP_HV B9
    A11 HV_GATE1 A9 TBT_A_VBUS_L +VBUS1_PD_20V
    +5VALW PP_5V0 HV_GATE2
    1 C11 EMC@ LT3
    B11 PP_5V0 HCB2012KF-800T50_2P
    C1087 D11 PP_5V0 H11 1 2
    PP_5V0 VBUS J10
    0.1U_0201_10V6K VBUS
    2 H10 J11

    2
    PP_CABLE VBUS

    BAT54LPS-7
    K11
    VBUS

    D21
    B1 C148
    VDDIO 1U_0603_25V6K EMC@ DI1

    2
    +3V_VC_A H1 H2 VCC3V3_TBT_SX_A AZ4024-02S_SOT23-3~D
    VIN_3V3 VOUT_3V3 G1
    VCC3V3_TBT_LDO_A

    2
    VCC3V3_TBT_LDO_A LDO_3V3 K1
    VCC1V8A_TBT_LDO_A

    1
    D1 LDO_1V8A A2
    <41,44> TBT_I2C_DATA I2C_SDA1 LDO_1V8D VCC1V8D_TBT_LDO_A
    R167 1 2 4.7K_0201_5% PD1_EE_CS# D2 E1
    <41,44> TBT_I2C_CLK I2C_SCL1 LDO_BMC TBT_LDO_BMC_A
    R168 1 2 4.7K_0201_5% PD1_EE_DO C1
    <41> TBT_A_I2C_INT# I2C_IRQ1_N
    R169 1 2 4.7K_0201_5% PD1_EE_WP#
    R170 1 2 4.7K_0201_5% PD1_HOLD# UPD1_SMBDAT A5
    <58> UPD1_SMBDAT I2C_SDA2
    C UPD1_SMBCLK B5 C
    <58> UPD1_SMBCLK I2C_SCL2
    <58> B6 L9 <46>
    UPD1_ALERT# I2C_IRQ2_N C_CC1 TBT_A_CC1
    L10 TBT_A_CC2 <46>
    C_CC2
    X03_14 VCC3V3_TBT_LDO_A PD1_EE_CLK R5777 1 @ 20_0201_5% PD1_EE_CLK_F A3 K9
    <44> 1 1

    220P_0402_50V8K

    220P_0402_50V8K
    PD1_EE_CLK PD1_EE_DI R5774 PD1_EE_DI_F SPI_CLK RPD_G1
    1 @ 20_0201_5% B4 K10

    C149

    C150
    <44> PD1_EE_DI SPI_MOSI RPD_G2
    PD1_EE_DO R5775 1 @ 20_0201_5% PD1_EE_DO_F A4
    <44> PD1_EE_DO SPI_MISO
    PD1_EE_CS# R5776 1 @ 20_0201_5% PD1_EE_CS#_F B3
    <44> PD1_EE_CS# SPI_SS_N
    UT4 K6
    TBT_A_USB2_T_P <46> EMC@ 2 2 EMC@
    PD1_EE_CS# 1 8 C_USB_TP L6
    /CS VCC C_USB_TN TBT_A_USB2_T_N <46>
    PD1_EE_DO 2 7 PD1_HOLD# TBT_USB20_P9 L5
    PD1_EE_WP# 3 DO(IO1) /HOLD(IO3) 6 PD1_EE_CLK TBT_USB20_N9 K5 USB_RP_P
    DAP

    4 /WP(IO2) CLK 5 PD1_EE_DI USB_RP_N K7


    GND DI(IO0) C_USB_BP TBT_A_I2C_B_P <46>
    L7 <46>
    TBT_A_AUX_P C_USB_BN TBT_A_I2C_B_N
    <41> J1
    TBT_A_AUX_P
    9

    W25Q64FVZPIQ TBT_A_AUX_N J2 AUX_P


    <41> TBT_A_AUX_N AUX_N K8 TBT_A_SBU1
    C_SBU1 TBT_A_SBU1 <46>
    L8 TBT_A_SBU2
    C_SBU2 TBT_A_SBU2 <46>
    @ TC1 G4
    @ TC2 F4 SWD_CLK
    R5748 1 2 1M_0402_5% UART_MISO SWD_DATA B2 PD1_GPIO0 @ TC3 PD1_GPIO2 1 2
    GPIO0 C2 PD1_GPIO1 R173 1 @ 2 0_0201_5% R5749 1M_0402_5%
    GPIO1 EN_PD_HV1 <82>
    R5750 1 2 1M_0402_5% UART_MOSI UART_MOSI E2 D10 PD1_GPIO2 @ TC48 PD1_GPIO1 1 @ 2
    <44> UART_MOSI UART_TX GPIO2
    UART_MISO F2 G11 R5751 1M_0402_5%
    <44> UART_MISO UART_RX GPIO3 AC1_DISC# <82,83>
    C10 PD1_GPIO4 R175 1 @ 2 0_0201_5%
    GPIO4 TBT_A_HPD <41>
    TBT_A_LSTX R187 1 @ 2 0_0201_5% TBT_A_LSTX_R L4 E10 PD1_GPIO5 @ TC5
    <41> TBT_A_LSTX LSTX/R2P GPIO5
    TBT_A_LSRX R189 1 @ 2 0_0201_5% TBT_A_LSRX_R K4 G10 PD1_GPIO6 @ TC49
    <41> TBT_A_LSRX LSRX/P2R GPIO6 D7 PD1_GPIO7 R176 1 @ 2 0_0201_5%
    GPIO7 TBT_A_USB_OC0# <10>
    R177 1 2 10K_0402_5% TBT_A_DBG_CTL1 E4 H6 PD1_GPIO8 R178 1 @ 2 0_0201_5% PD1_GPIO8_EXT
    VCC3V3_TBT_LDO_A TBT_A_DBG_CTL2 DEBUG_CTL1 GPIO8
    R179 1 2 10K_0402_5% D5
    DEBUG_CTL2
    UPD1_SMBCLK R180 1 @ 2 0_0402_1% USBC_MCP23017_SMBCLK_R_A L2 PD_MRESET_A @ R181 1 2 0_0201_5%
    DEBUG1 UPD_MRESET <41,44,45>
    UPD1_SMBDAT R182 1 @ 2 0_0402_1% USBC_MCP23017_SMBDAT_R_A K2 E11 R183 1 2 100K_0402_5%
    DEBUG2 MRESET
    TBT_A_LSTX @ R191 1 20_0201_5% TBT_A_DEBUG3 L3 F11
    DEBUG3 RESET_N TBT_A_RESET_N <41>
    TBT_A_LSRX @ R192 1 20_0201_5% TBT_A_DEBUG4 K3
    DEBUG4 F10 @ RT52 1 2 0_0402_5%
    F1
    TPS65982DD_BGA_96P BUSPOWER_N VCC1V8A_TBT_LDO_A
    B I2C_ADDR G2 @ RT51 1 2 0_0402_5% B
    R_OSC VCC3V3_TBT_LDO_A
    VCC3V3_TBT_LDO_A H7
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    1

    SS
    100K_0201_5%

    100K_0201_5%

    15K_0402_1%
    1

    1
    RT53

    RT54

    0.22U_0201_6.3V6M
    RT55 1

    C151

    R184
    R185 1 2 100K_0402_5% TBT_A_AUX_N @ 0_0402_1% RT56
    A1
    D6
    E5
    E6
    E7
    F5
    G5
    H4
    H5
    B8
    D8
    E8
    F6
    F7
    F8
    G6
    G7
    G8
    H8
    L1
    L11
    R186 1 2 100K_0402_5% TBT_A_AUX_P @ 0_0402_1% HRESET_PD1_EC
    HRESET_PD1_EC <58>
    VCC3V3_TBT_LDO_A
    2

    RT95 2

    2
    1 2

    @
    0_0402_5%

    1
    HRESET_PD1

    0_0201_5%
    R5753
    R5752

    @
    10K_0402_1%

    2
    <41> TBT_A_USB2_D_P @ R5866 1 2 0_0402_5%
    @ R5867 1 2 0_0402_5% PD1_GPIO8_EXT HRESET_PD1
    <41> TBT_A_USB2_D_N
    R5868 1 @ 2 0_0402_1% TBT_USB20_P9
    <10> USB20_P9
    R5869 1 @ 2 0_0402_1% TBT_USB20_N9
    <10> USB20_N9

    R5757
    100K_0201_5%
    TBT_A_LSTX @ R5754 1 2 0_0201_5% TBT_A_SBU2

    2
    TBT_A_LSRX @ R5755 1 2 0_0201_5% TBT_A_SBU1
    R5756
    100K_0402_1%

    1
    A A

    Factory Set Device Configurations 7


    Infinite boot retry from Flash to Host I/F cycles.
    DIV=RT106/(RT105+RT106)
    between 0.7~1.0

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P43-PD CONTROL 1
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 43 of 100
    5 4 3 2 1
    5 4 3 2 1

    +5VALW

    1 1 1 1
    C156 C157 C158 C159 TBT_LDO_BMC_B VCC3V3_TBT_SX_B VCC3V3_TBT_LDO_B
    22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 2 2 2
    1 1 1
    CT99 C154 C155
    2.2U_0402_6.3V6M 1U_0201_6.3V6M 10U_0402_6.3V6M
    2 2 2

    D D
    +3V_VC_B

    VCC1V8A_TBT_LDO_B VCC1V8D_TBT_LDO_B +VBUS2_PD_20V


    1
    C152
    10U_0402_6.3V6M 1 1

    1
    2
    CT97 CT98 C153
    4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 1U_0603_25V6K

    2
    2 2

    U20
    R5795
    2 @ 1 0_0402_1% A6 B10
    A7 PP_HV SENSEP A10
    A8 PP_HV SENSEN
    +3V_LDO +3V_VC_B B7 PP_HV
    PP_HV B9
    @ R5758 1 2 0_0402_5% A11 HV_GATE1 A9 TBT_B_VBUS_L +VBUS2_PD_20V
    +5VALW PP_5V0 HV_GATE2
    C11 EMC@ LT4
    +3VALW B11 PP_5V0 HCB2012KF-800T50_2P
    D11 PP_5V0 H11 1 2
    R266 1 @ 2 0_0402_1% PP_5V0 VBUS J10
    H10 VBUS J11

    2
    VCC3V3_TBT_LDO_B PP_CABLE VBUS

    BAT54LPS-7
    K11
    VBUS

    D22
    B1 C161
    @ R5759 1 2 0_0402_5% VDDIO 1U_0603_25V6K EMC@ DI2

    2
    H1 H2 AZ4024-02S_SOT23-3~D
    +3V_VC_B VIN_3V3 VOUT_3V3 VCC3V3_TBT_SX_B
    VIN_3V3 source for dead battery G1 VCC3V3_TBT_LDO_B

    2
    LDO_3V3 K1
    Placement in bottom side VCC1V8A_TBT_LDO_B

    1
    D1 LDO_1V8A A2
    <41,43> TBT_I2C_DATA I2C_SDA1 LDO_1V8D VCC1V8D_TBT_LDO_B
    C <41,43> TBT_I2C_CLK D2 E1 TBT_LDO_BMC_B C
    C1 I2C_SCL1 LDO_BMC
    <41> TBT_B_I2C_INT# I2C_IRQ1_N
    UPD2_SMBDAT A5
    <58> UPD2_SMBDAT I2C_SDA2
    UPD2_SMBCLK B5
    <58> UPD2_SMBCLK I2C_SCL2
    <58> UPD2_ALERT# B6 L9 TBT_B_CC1 <46>
    I2C_IRQ2_N C_CC1 L10
    C_CC2 TBT_B_CC2 <46>
    PD1_EE_CLK @ R5778 1 20_0201_5% PD2_EE_CLK A3 K9 1 1
    <43>

    220P_0402_50V8K

    220P_0402_50V8K
    PD1_EE_CLK PD1_EE_DI PD2_EE_DI SPI_CLK RPD_G1
    1 20_0201_5% B4 K10

    C162

    C163
    <43> PD1_EE_DI @ R5779
    PD1_EE_DO @ R5780 1 20_0201_5% PD2_EE_DO A4 SPI_MOSI RPD_G2
    <43> PD1_EE_DO SPI_MISO
    PD1_EE_CS# @ R5781 1 20_0201_5% PD2_EE_CS# B3
    <43> PD1_EE_CS# SPI_SS_N 2 2
    K6 TBT_B_USB2_T_P <46>EMC@ EMC@
    C_USB_TP L6
    C_USB_TN TBT_B_USB2_T_N <46>
    VCC3V3_TBT_LDO_B TBT_USB20_P6 L5
    TBT_USB20_N6 K5 USB_RP_P
    USB_RP_N K7
    C_USB_BP TBT_B_I2C_B_P <46>
    R5782 1 2 3.3K_0402_0.5% PD2_EE_CS# L7
    C_USB_BN TBT_B_I2C_B_N <46>
    R5783 1 2 100K_0201_5% PD2_EE_CLK TBT_B_AUX_P J1
    <41> TBT_B_AUX_P AUX_P
    R5784 1 2 100K_0201_5% PD2_EE_DI TBT_B_AUX_N J2
    <41> TBT_B_AUX_N AUX_N
    R5785 1 2 100K_0201_5% PD2_EE_DO K8
    C_SBU1 TBT_B_SBU1 <46>
    L8 <46>
    C_SBU2 TBT_B_SBU2
    @ TC6 G4
    @ TC7 F4 SWD_CLK
    SWD_DATA B2 PD2_GPIO0 @ TC8
    GPIO0 C2 PD2_GPIO1 R201 1 @ 2 0_0201_5%
    GPIO1 EN_PD_HV2 <82>
    UART_MISO E2 D10 PD2_GPIO2 @ TC46
    <43> UART_MISO UART_TX GPIO2
    UART_MOSI F2 G11
    <43> UART_MOSI UART_RX GPIO3 AC2_DISC# <82,83>
    C10 PD2_GPIO4 R203 1 @ 2 0_0201_5%
    GPIO4 TBT_B_HPD <41>
    TBT_B_LSTX R215 1 @ 2 0_0201_5% TBT_B_LSTX_R L4 E10 PD2_GPIO5 @ TC10 PD2_GPIO2 1 2
    <41> TBT_B_LSTX LSTX/R2P GPIO5
    TBT_B_LSRX R216 1 @ 2 0_0201_5% TBT_B_LSRX_R K4 G10 PD2_GPIO6 @ TC47 R5760 1M_0402_5%
    <41> TBT_B_LSRX LSRX/P2R GPIO6 D7 PD2_GPIO7 R204 1 @ 2 0_0201_5% PD2_GPIO1 1 @ 2
    GPIO7 TBT_B_USB_OC1# <10>
    R205 1 2 10K_0402_5% TBT_B_DBG_CTL1 E4 H6 PD2_GPIO8 R206 1 @ 2 0_0201_5% PD2_GPIO8_EXT R5761 1M_0402_5%
    VCC3V3_TBT_LDO_B TBT_B_DBG_CTL2 DEBUG_CTL1 GPIO8
    R207 1 2 10K_0402_5% D5
    DEBUG_CTL2
    UPD2_SMBCLK R208 1 @ 2 0_0402_1% USBC_MCP23017_SMBCLK_R_B L2 PD_MRESET_B @ R209 1 2 0_0201_5%
    DEBUG1 UPD_MRESET <41,43,45>
    UPD2_SMBDAT R210 1 @ 2 0_0402_1% USBC_MCP23017_SMBDAT_R_B K2 E11 R211 1 2 100K_0402_5%
    DEBUG2 MRESET
    B TBT_B_LSTX TBT_B_DEBUG3 B
    @ R218 1 20_0201_5% L3 F11 <41>
    TBT_B_LSRX TBT_B_DEBUG4 DEBUG3 RESET_N TBT_B_RESET_N
    @ R220 1 20_0201_5% K3
    DEBUG4
    TPS65982DD_BGA_96P BUSPOWER_N
    F10 @ RT58 1 2 0_0402_5% VCC1V8A_TBT_LDO_B
    F1
    I2C_ADDR G2 @ RT57 1 2 0_0402_5%
    R_OSC VCC3V3_TBT_LDO_B
    @ H7
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    SS
    1

    1
    100K_0201_5%

    100K_0201_5%

    0_0402_5%

    15K_0402_1%
    1

    1
    RT59

    RT60

    RT61

    0.22U_0201_6.3V6M
    1

    C164

    R213
    VCC3V3_TBT_LDO_B RT62 VCC3V3_TBT_LDO_B
    A1
    D6
    E5
    E6
    E7
    F5
    G5
    H4
    H5
    B8
    D8
    E8
    F6
    F7
    F8
    G6
    G7
    G8
    H8
    L1
    L11

    @ 0_0402_1% HRESET_PD2_EC
    HRESET_PD2_EC <58>
    2

    R212 1 2 100K_0402_5% TBT_B_AUX_N RT96 2

    2
    R214 1 2 100K_0402_5% TBT_B_AUX_P 1 2

    1
    @ R5762

    1
    HRESET_PD2 0_0402_5% 10K_0402_1%

    0_0201_5%
    R5763
    @

    2
    <41> @ R5861 1 2 0_0402_5%
    TBT_B_USB2_D_P

    2
    <41> @ R5862 1 2 0_0402_5%
    TBT_B_USB2_D_N PD2_GPIO8_EXT
    R5863 1 @ 2 0_0402_1% TBT_USB20_P6
    <10> USB20_P6
    R5878 1 @ 2 0_0402_1% TBT_USB20_N6 HRESET_PD2
    <10> USB20_N6 TBT_B_LSTX @ R5764 1 2 0_0201_5% TBT_B_SBU1
    TBT_B_LSRX @ R5765 1 2 0_0201_5% TBT_B_SBU2

    1
    R5745
    100K_0201_5%
    R5744

    2
    100K_0402_1%

    2
    1
    A A

    Factory Set Device Configurations 7


    Infinite boot retry from Flash to Host I/F cycles.
    DIV=RT106/(RT105+RT106)
    between 0.7~1.0

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    P44-PD CONTROL 2

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 44 of 100
    5 4 3 2 1
    5 4 3 2 1

    +5VALW

    VCC3V3_TBT_SX_C VCC3V3_TBT_LDO_C VCC1V8A_TBT_LDO_C VCC1V8D_TBT_LDO_C TBT_LDO_BMC_C +VBUS3_PD_20V

    +3V_LDO +3V_VC_C
    R5766 1 1 1 1 1 1 1 1 1

    1
    1 @ 2 C169 C170 C171 C172
    22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M C167 C168 CT100 CT101 CT102 C166
    D +3VALW 1U_0603_25V6K D
    0_0402_1% 1U_0201_6.3V6M 10U_0402_6.3V6M 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 2.2U_0402_6.3V6M

    2
    2 2 2 2 2 2 2 2 2
    @ R267 1 2 0_0402_5%

    VCC3V3_TBT_LDO_A

    @ R5767 1 2 0_0402_5%

    VIN_3V3 source for dead battery


    Placement in bottom side U21
    +3V_VC_C R5796
    1 @ 2 A6 B10
    A7 PP_HV SENSEP A10
    0_0402_1% A8 PP_HV SENSEN
    1 PP_HV
    B7
    C165 PP_HV B9
    A11 HV_GATE1 A9 MUX_C_VBUS_L +VBUS3_PD_20V
    10U_0402_6.3V6M +5VALW PP_5V0 HV_GATE2
    2 C11 EMC@ LT5
    B11 PP_5V0 HCB2012KF-800T50_2P
    D11 PP_5V0 H11 1 2
    PP_5V0 VBUS J10
    H10 VBUS J11

    2
    PP_CABLE VBUS

    BAT54LPS-7
    K11
    VBUS

    D23
    +3V_VC_C B1 C174
    VDDIO 1U_0603_25V6K EMC@ DI3

    2
    H1 H2 AZ4024-02S_SOT23-3~D
    USB20_P1 VIN_3V3 VOUT_3V3 VCC3V3_TBT_SX_C
    <10> USB20_P1 G1 VCC3V3_TBT_LDO_C

    2
    USB20_N1 LDO_3V3 K1
    <10> USB20_N1 VCC1V8A_TBT_LDO_C

    1
    R5771 1 @ 2 0_0402_5% I2C_DAT1_PD3 D1 LDO_1V8A A2
    I2C_SDA1 LDO_1V8D VCC1V8D_TBT_LDO_C
    R5772 1 @ 2 0_0402_5% I2C_SCL1_PD3 D2 E1
    I2C_SCL1 LDO_BMC TBT_LDO_BMC_C
    R5773 1 @ 2 0_0402_5% I2C_IRQ1_PD3 C1
    I2C_IRQ1_N
    UPD3_SMBDAT A5
    <58> UPD3_SMBDAT I2C_SDA2
    UPD3_SMBCLK B5
    <58> UPD3_SMBCLK I2C_SCL2
    VCC3V3_TBT_LDO_C B6 L9
    <58> UPD3_ALERT# I2C_IRQ2_N C_CC1 MUX_C_CC1 <47>
    L10 <47>
    C_CC2 MUX_C_CC2
    C C
    @ R5814 1 2 100K_0402_5% MUX_C_AUX_N PD3_EE_CLK A3 K9 1 1

    220P_0402_50V8K

    220P_0402_50V8K
    PD3_EE_DI B4 SPI_CLK RPD_G1 K10

    C175

    C176
    R5815 1 2 1K_0402_5% MUX_C_AUX_P PD3_EE_DO A4 SPI_MOSI RPD_G2
    R5875 1 2 1K_0402_5% MUX_C_AUX_N PD3_EE_CS# B3 SPI_MISO
    SPI_SS_N K6 2 2
    C_USB_TP TOP_MUX_P <47>
    L6 <47>
    USB20_P1 C_USB_TN TOP_MUX_N
    L5
    USB20_N1 K5 USB_RP_P
    USB_RP_N K7 EMC@ EMC@
    C_USB_BP BOT_MUX_P <47>
    L7 BOT_MUX_N <47>
    @ C1117 1 2 0.1U_0201_10V6K MUX_C_AUX_P J1 C_USB_BN
    <41,71> TBT_DP_AUX_P AUX_P
    @ C1118 1 2 0.1U_0201_10V6K MUX_C_AUX_N J2
    <41,71> TBT_DP_AUX_N AUX_N K8 MUX_C_PD_SBU1 @ R227 1 2 0_0201_5%
    C_SBU1 MUX_C_SBU1 <47,71>
    L8 MUX_C_PD_SBU2 @ R228 1 2 0_0201_5%
    C_SBU2 MUX_C_SBU2 <47,71>
    @ TC11 G4
    @ TC12 F4 SWD_CLK PD3_GPIO1 1 @ 2
    SWD_DATA B2 PD3_GPIO0 R5818 1 @ 2 0_0201_5% MUX_FLIP_SEL R5769 1M_0402_5%
    GPIO0 MUX_FLIP_SEL <71>
    C2 PD3_GPIO1 R229 1 @ 2 0_0201_5% PD3_GPIO2 1 2
    GPIO1 EN_PD_HV3 <82>
    R5789 2 1 100K_0201_5% E2 D10 PD3_GPIO2 R5768 1M_0402_5%
    R230 1 @ 2 0_0201_5% F2 UART_TX GPIO2 G11
    UART_RX GPIO3 AC3_DISC# <82,83>
    C10 PD3_GPIO4 R5770 1 @ 2 0_0201_5%
    GPIO4 TBT_DP_HPD <41,71>
    TBT_C_LSTX_R L4 E10 PD3_GPIO5 R5791 1 @ 2 0_0201_5%
    VCC3V3_TBT_LDO_C @ TC50 TBT_C_LSRX_R K4 LSTX/R2P GPIO5 G10 PD3_GPIO6 @ TC45
    LSRX/P2R GPIO6 D7 PD3_GPIO7 R232 1 @ 2 0_0201_5%
    GPIO7 MUX_C_USB_OC2# <10>
    R233 1 2 10K_0402_5% TBT_C_DBG_CTL1 E4 H6 PD3_GPIO8 R234 1 @ 2 0_0201_5% PD3_GPIO8_EXT
    R235 1 2 10K_0402_5% TBT_C_DBG_CTL2 D5 DEBUG_CTL1 GPIO8
    DEBUG_CTL2 VCC3V3_TBT_LDO_C
    PS8802_CSCL R5819 1 @ 2 0_0201_5% UPD3_SMBCLK R236 1 @ 2 0_0201_5% TBT_C_DEBUG1 L2 PD_MRESET_C R237 1 @ 2 0_0201_5%
    <71> PS8802_CSCL DEBUG1 UPD_MRESET <41,43,44>
    PS8802_CSDA R5817 1 @ 2 0_0201_5% UPD3_SMBDAT R238 1 @ 2 0_0201_5% TBT_C_DEBUG2 K2 E11 1 2
    <71> PS8802_CSDA DEBUG2 MRESET R239 1M_0402_5%
    R5787 1 @ 2 0_0201_5% TBT_C_DEBUG3 L3 F11
    <71> PD3_USBC_AMSEL DEBUG3 RESET_N MUX_C_RESET_N <41>

    1
    MUX_DP_SEL <71>
    MUX_USB_SEL R5788 1 @ 2 0_0201_5% TBT_C_DEBUG4 K3
    MUX_USB_SEL DEBUG4 F10 @ RT63 1 2 0_0402_5% R5792
    BUSPOWER_N VCC3V3_TBT_LDO_C
    F1
    I2C_ADDR TPS65982DD_BGA_96P 10K_0402_1%
    G2 @ RT64 1 2 0_0402_5% VCC1V8A_TBT_LDO_C
    R_OSC

    2
    H7
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    GND
    1

    B SS B

    15K_0402_1%
    R5790 1 2 1K_0201_5% TBT_C_LSTX_R

    1
    0.22U_0201_6.3V6M
    RT67 1

    C177

    R240
    @ 0_0402_1% RT68 PD3_GPIO8_EXT
    A1
    D6
    E5
    E6
    E7
    F5
    G5
    H4
    H5
    B8
    D8
    E8
    F6
    F7
    F8
    G6
    G7
    G8
    H8
    L1
    L11
    VCC3V3_TBT_LDO_C @ 0_0402_1%
    2

    R223 1 2 4.7K_0201_5% PD3_EE_CS# RT97 2

    2
    R224 1 2 4.7K_0201_5% PD3_EE_DO 1 2

    1
    R225 1 2 4.7K_0201_5% PD3_EE_WP#
    R226 1 2 4.7K_0201_5% PD3_HOLD# @ R5793
    HRESET_PD3 0_0402_5%
    100K_0402_1%

    2
    VCC3V3_TBT_LDO_C VCC3V3_TBT_LDO_C HRESET_PD3_EC
    HRESET_PD3_EC <58>

    UT6 1
    PD3_EE_CS# 1 8
    PD3_EE_DO 2 /CS VCC 7 PD3_HOLD# C1088
    DO(IO1) /HOLD(IO3)

    1
    PD3_EE_WP# 3 6 PD3_EE_CLK 0.1U_0201_10V6K
    DAP

    /WP(IO2) CLK 2

    RT98
    0_0201_5%
    4 5 PD3_EE_DI
    GND DI(IO0)

    @
    9

    2
    W25Q64FVZPIQ

    HRESET_PD3

    voltage rating is 1.8v


    RT99
    100K_0201_5%
    2
    1

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P45-PD CONTROL 3
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 45 of 100
    5 4 3 2 1
    5 4 3 2 1

    D24 EMC@ D25 EMC@

    TBT_USB3_TX0_P 1 2 TBT_USB3_RX0_P 1 2

    PESD5V0C1BSF PESD5V0C1BSF

    D26 EMC@ D27 EMC@

    TBT_USB3_TX0_N 1 2 TBT_USB3_RX0_N 1 2
    D D

    PESD5V0C1BSF PESD5V0C1BSF
    D28 EMC@ D29 EMC@

    TBT_A_CC1 1 2 TBT_A_SBU2 1 2

    ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2
    D30 EMC@ D31 EMC@

    +VBUS1_PD_20V TBT_A_SBU1 1 2 TBT_A_CC2 1 2

    ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2

    10U_0603_25V6M

    0.1U_0402_25V6
    1 1
    D32 EMC@ D33 EMC@

    CT103

    C1085
    +VBUS1_PD_20V +VBUS1_PD_20V TBT_USB3_RX1_N 1 2 TBT_USB3_TX1_N 1 2
    TBT_VBUS 2 2

    PESD5V0C1BSF PESD5V0C1BSF
    JUSBC1
    A1 B12 D34 EMC@ D35 EMC@
    GND GND
    TBT_USB3_TX1_P A2 B11 TBT_USB3_RX1_P TBT_USB3_RX1_P 1 2 TBT_USB3_TX1_P 1 2
    <41> TBT_USB3_TX1_P SSTXP1 SSRXP1 TBT_USB3_RX1_P <41>
    ML3 EMC@ TBT_USB3_TX1_N A3 B10 TBT_USB3_RX1_N
    <41> TBT_USB3_TX1_N SSTXN1 SSRXN1 TBT_USB3_RX1_N <41>
    1 2 TBT_A_USB2_T_P_R
    <43> TBT_A_USB2_T_P
    C178 1 2 A4 B9 2 1 C179 PESD5V0C1BSF PESD5V0C1BSF
    0.47U_0402_25V6K VBUS VBUS 0.47U_0402_25V6K
    4 3 TBT_A_USB2_T_N_R TBT_A_CC2 A5 B8 TBT_A_SBU1 D36 EMC@ D37 EMC@
    <43> TBT_A_USB2_T_N <43> TBT_A_CC2 CC1 SUB2 TBT_A_SBU1 <43>
    EXC24CH900U_4P TBT_A_I2C_B_P_R A6 B7 TBT_A_USB2_T_N_R TBT_A_USB2_T_P_R 1 2 TBT_A_I2C_B_N_R 1 2
    TBT_A_I2C_B_N_R A7 DP1 DN2 B6 TBT_A_USB2_T_P_R
    DN1 DP2

    Bottom
    C TBT_A_SBU2 A8 B5 TBT_A_CC1 C
    <43> TBT_A_SBU2 SUB1 CC2 TBT_A_CC1 <43> ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2

    TOP
    C180 1 2 A9 B4 2 1 C181 D38 EMC@ D39 EMC@
    0.47U_0402_25V6K VBUS VBUS 0.47U_0402_25V6K
    TBT_USB3_RX0_N A10 B3 TBT_USB3_TX0_N TBT_A_USB2_T_N_R 1 2 TBT_A_I2C_B_P_R 1 2
    <41> TBT_USB3_RX0_N SSRXN2 SSTXN2 TBT_USB3_TX0_N <41>
    TBT_USB3_RX0_P A11 B2 TBT_USB3_TX0_P
    <41> TBT_USB3_RX0_P SSRXP2 SSTXP2 TBT_USB3_TX0_P <41>
    ML2 EMC@
    1 2 TBT_A_I2C_B_N_R A12 B1
    <43> TBT_A_I2C_B_N GND GND ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2

    4 3 TBT_A_I2C_B_P_R 1 4
    <43> TBT_A_I2C_B_P GND GND
    EXC24CH900U_4P 2 3
    5 GND GND 6
    GND GND
    JAE_DX07SD24JJ3
    CONN@

    D40 EMC@ D41 EMC@

    JUSBC1 and JUSBC2 use SP060009R0L TBT_USB3_TX2_P 1 2 TBT_USB3_RX2_P 1 2

    PESD5V0C1BSF PESD5V0C1BSF
    +VBUS2_PD_20V D42 EMC@ D43 EMC@

    TBT_USB3_TX2_N 1 2 TBT_USB3_RX2_N 1 2

    10U_0603_25V6M

    0.1U_0402_25V6
    1 1
    PESD5V0C1BSF PESD5V0C1BSF

    CT104

    C1086
    +VBUS2_PD_20V +VBUS2_PD_20V D44 EMC@ D45 EMC@
    2 2
    TBT_B_CC1 1 2 TBT_B_SBU2 1 2

    JUSBC2
    B B
    A1 B12
    GND GND ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2
    TBT_USB3_TX3_P A2 B11 TBT_USB3_RX3_P D46 EMC@ D47 EMC@
    <41> TBT_USB3_TX3_P SSTXP1 SSRXP1 TBT_USB3_RX3_P <41>
    ML5 EMC@ TBT_USB3_TX3_N A3 B10 TBT_USB3_RX3_N
    <41> TBT_USB3_TX3_N SSTXN1 SSRXN1 TBT_USB3_RX3_N <41>
    1 2 TBT_B_USB2_T_P_R TBT_B_SBU1 1 2 TBT_B_CC2 1 2
    <44> TBT_B_USB2_T_P
    C182 1 2 A4 B9 2 1 C183
    0.47U_0402_25V6K VBUS VBUS 0.47U_0402_25V6K
    4 3 TBT_B_USB2_T_N_R TBT_B_CC2 A5 B8 TBT_B_SBU1
    <44> TBT_B_USB2_T_N <44> TBT_B_CC2 CC1 SUB2 TBT_B_SBU1 <44> ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2
    EXC24CH900U_4P TBT_B_I2C_B_P_R A6 B7 TBT_B_USB2_T_N_R D48 EMC@ D49 EMC@
    TBT_B_I2C_B_N_R A7 DP1 DN2 B6 TBT_B_USB2_T_P_R
    DN1 DP2 TBT_USB3_RX3_N TBT_USB3_TX3_N
    1 2 1 2
    Bottom

    TBT_B_SBU2 A8 B5 TBT_B_CC1
    <44> TBT_B_SBU2 SUB1 CC2 TBT_B_CC1 <44>
    TOP

    C184 1 2 A9 B4 2 1 C185 PESD5V0C1BSF PESD5V0C1BSF


    0.47U_0402_25V6K VBUS VBUS 0.47U_0402_25V6K
    TBT_USB3_RX2_N A10 B3 TBT_USB3_TX2_N D50 EMC@ D51 EMC@
    <41> TBT_USB3_RX2_N SSRXN2 SSTXN2 TBT_USB3_TX2_N <41>
    TBT_USB3_RX2_P A11 B2 TBT_USB3_TX2_P
    <41> TBT_USB3_RX2_P SSRXP2 SSTXP2 TBT_USB3_TX2_P <41>
    ML4 EMC@ TBT_USB3_RX3_P 1 2 TBT_USB3_TX3_P 1 2
    1 2 TBT_B_I2C_B_N_R A12 B1
    <44> TBT_B_I2C_B_N GND GND
    PESD5V0C1BSF PESD5V0C1BSF
    4 3 TBT_B_I2C_B_P_R 1 4
    <44> TBT_B_I2C_B_P GND GND D52 EMC@ D53 EMC@
    EXC24CH900U_4P 2 3
    5 GND GND 6 TBT_B_USB2_T_P_R 1 2 TBT_B_I2C_B_N_R 1 2
    GND GND
    JAE_DX07SD24JJ3
    CONN@
    ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2
    D54 EMC@ D55 EMC@

    TBT_B_USB2_T_N_R 1 2 TBT_B_I2C_B_P_R 1 2

    ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2
    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    P46-PD USB TYPE-C TBT 1 & 2

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 46 of 100
    5 4 3 2 1
    5 4 3 2 1

    +VBUS3_PD_20V

    1
    CT105
    1U_0402_25V6K
    2

    D D
    +VBUS3_PD_20V +VBUS3_PD_20V

    JUSBC3
    A1 B12
    GND GND
    EXC24CH900U_4P
    4 3 TOP_MUX_P_R MUX_USB3_TX0_P A2 B11 MUX_USB3_RX0_P_RC
    <45> TOP_MUX_P <71> MUX_USB3_TX0_P SSTXP1 SSRXP1
    MUX_USB3_TX0_N A3 B10 MUX_USB3_RX0_N_RC
    <71> MUX_USB3_TX0_N SSTXN1 SSRXN1
    1 2 TOP_MUX_N_R C186 1 2 A4 B9 2 1 C187
    <45> TOP_MUX_N 0.47U_0402_25V6K VBUS VBUS 0.47U_0402_25V6K
    ML6 EMC@ MUX_C_CC1 A5 B8 MUX_C_SBU2
    <45> MUX_C_CC1 CC1 RFU2 MUX_C_SBU2 <45,71>
    TOP_MUX_P_R A6 B7 BOT_MUX_N_R
    TOP_MUX_N_R A7 DP1 DN2 B6 BOT_MUX_P_R
    DN1 DP2

    Bottom
    MUX_C_SBU1 A8 B5 MUX_C_CC2
    <45,71> MUX_C_SBU1 RFU1 CC2 MUX_C_CC2 <45>

    TOP
    C188 1 2 A9 B4 2 1 C189
    0.47U_0402_25V6K VBUS VBUS 0.47U_0402_25V6K
    ML7 EMC@
    1 2 BOT_MUX_P_R MUX_USB3_RX1_N_RC A10 B3 MUX_USB3_TX1_N
    <45> BOT_MUX_P SSRXN2 SSTXN2 MUX_USB3_TX1_N <71>
    MUX_USB3_RX1_P_RC A11 B2 MUX_USB3_TX1_P
    SSRXP2 SSTXP2 MUX_USB3_TX1_P <71>

    4 3 BOT_MUX_N_R A12 B1
    <45> BOT_MUX_N GND GND
    EXC24CH900U_4P
    1 4
    GND GND
    2 3
    GND GND

    JAE_DX07SA24XJ2
    CONN@

    Use DC23300LM0L
    C C

    R5857 @ R5844
    MUX_USB3_RX0_P 1 @ 2 MUX_USB3_RX0_P_RC 1 2 D56 EMC@ D57 EMC@
    <71> MUX_USB3_RX0_P
    0_0402_1% 220K_0402_5%~D MUX_USB3_TX0_P 1 2 MUX_USB3_RX0_P 1 2
    R5858 @ R5845
    MUX_USB3_RX0_N 1 @ 2 MUX_USB3_RX0_N_RC 1 2 PESD5V0C1BSF PESD5V0C1BSF
    <71> MUX_USB3_RX0_N
    0_0402_1% 220K_0402_5%~D D58 EMC@ D59 EMC@
    R5859 @ R5846
    MUX_USB3_TX0_N 1 2 MUX_USB3_RX0_N 1 2
    MUX_USB3_RX1_N 1 @ 2 MUX_USB3_RX1_N_RC 1 2
    <71> MUX_USB3_RX1_N
    0_0402_1% 220K_0402_5%~D PESD5V0C1BSF PESD5V0C1BSF
    R5860 @ R5847 D60 EMC@ D61 EMC@
    MUX_USB3_RX1_P 1 @ 2 MUX_USB3_RX1_P_RC 1 2
    <71> MUX_USB3_RX1_P
    MUX_C_CC1 1 2 MUX_C_SBU2 1 2
    0_0402_1% 220K_0402_5%~D

    ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2
    D62 EMC@ D63 EMC@

    MUX_C_SBU1 1 2 MUX_C_CC2 1 2

    ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2
    B B
    D64 EMC@ D65 EMC@

    MUX_USB3_RX1_N 1 2 MUX_USB3_TX1_N 1 2

    PESD5V0C1BSF PESD5V0C1BSF

    D66 EMC@ D67 EMC@

    MUX_USB3_RX1_P 1 2 MUX_USB3_TX1_P 1 2

    PESD5V0C1BSF PESD5V0C1BSF
    D68 EMC@ D69 EMC@

    TOP_MUX_P_R 1 2 BOT_MUX_N_R 1 2

    CNL/CFL Type-C External (Back Panel) Topology with Active Mux


    ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2
    PCH D70 EMC@ D71 EMC@
    Pre-Cap Pre-Cap
    Via Via TOP_MUX_N_R 1 2 BOT_MUX_P_R 1 2

    M1 M2 M3 M4 M5 M6 M7
    CMC

    BO
    ESD
    TX

    ESD101-B1-02ELS_TSSLP-2-4-2 ESD101-B1-02ELS_TSSLP-2-4-2

    BO
    M1 M2
    Type-C Connector

    M3 M4 M5 M6 M7
    Active Mux

    Crx
    Via
    Via M4 M5
    A M1 M2 M3 M6 M7 A

    BO
    CMC

    ESD
    RX

    BO
    M1 M2 M3 M4 M5 M6 M7

    Notes DELL CONFIDENTIAL/PROPRIETARY


    ------------------------------------------------------------------------------------
    Crx Cap Value: 297nF to 363nF including tolerance
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Recommended Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    ------------------------------------------------------------------------------------- Short Protection P47-PD USB TYPE-C 3
    Rb Resistor Value: 220kΩ ±5% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    Size Document Number Rev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
    USB3p1_Type_C_ECN_Update_CNL_CFL_MoW_WW46_Updated .pdf
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 47 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P048 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 48 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P049 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 49 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P050 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 50 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P051 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 51 of 100
    5 4 3 2 1
    A B C D E

    M.2 Slot-A Key-A (WLAN)

    1.1A @ Peak current from 3.3 V supply,


    including Wi-Fi and BT. Averaged over 25 usecase.
    +3VS_NGFF
    +3VS_NGFF WL1 @
    4
    Close to JNGFF RF Reserved. 5 3.3V
    72 3.3V 29
    3.3V PCIE_WAKE_L PCIE_WAKE# <59>

    22U_0603_6.3V6M~D

    0.1U_0402_10V7K

    15P_0402_50V8J
    C35
    73 30 <11>
    3.3V PCIE_CLKREQ_L CLKREQ_PCIE#1
    1 1 1 31 <11,41,59,66,67,70>
    1 PCIE_RST_L PCH_PLTRST#_EC 1

    C34

    C33

    EMC@
    1
    2 NC 27 @ 0_0402_5%~D 2 1 R23
    EXC24CH900U_4P 2 2 2 NC 32KHz_CLK_IN SUSCLK <11,67>
    3
    4 3 USB20_P7_R NC
    <10> USB20_P7
    14
    11 NC 15
    1 2 USB20_N7_R 12 LTE_SYNC NC
    <10> USB20_N7 LTE_PRI
    13
    L2 EMC@ LTE_ACTIVE 7
    NC

    2
    16
    D74 EMC@ 18 3D_SYNC
    PESD5V0U2BT_SOT23-3 19 NC 6
    66 NC GND 17
    AZC199-02SPR7G_SOT23-3 67 NC GND 20
    NC GND 23

    1
    21 GND 26
    22 NC GND 32
    24 NC GND 35
    25 NC GND 38
    NC GND 41
    GND 62
    33 GND 68
    <11> CLK1_PCIE_WLAN# PCIE_REFCLKN GND
    <11> CLK1_PCIE_WLAN 34 71
    CLK1_PCIE_WLAN PCIE_REFCLKP GND 74
    CLK1_PCIE_WLAN# CH1 1 2 0.1U_0402_10V7K~D PCIE_PRX_WLANTX_N7_C 36 GND 75
    <10> PCIE_PRX_WLANTX_N7 PCIE_TXN GND
    CH2 1 2 0.1U_0402_10V7K~D PCIE_PRX_WLANTX_P7_C 37 76
    <10> PCIE_PRX_WLANTX_P7 PCIE_TXP GND
    @EMC@ @EMC@ 77
    CH4 1 2 0.1U_0402_10V7K~D PCIE_PTX_WLANRX_N7_C 39 GND 78
    1 1 <10> PCIE_PTX_WLANRX_N7 PCIE_RXN GND
    15P_0402_50V8J
    C36

    15P_0402_50V8J
    C37

    CH5 1 2 0.1U_0402_10V7K~D PCIE_PTX_WLANRX_P7_C 40 79


    <10> PCIE_PTX_WLANRX_P7 PCIE_RXP GND 80
    GND 81
    2 2 L@ R24 1 2 0_0402_5%~D CL_CLK_R 42 GND 82
    <8> CL_CLK VIO_1V8_ext GND
    L@ R25 1 2 0_0402_5%~D CL_DAT_R 43 83
    <8> CL_DAT CL_RST#_R NC GND
    <8> L@ R26 1 2 0_0402_5%~D 44 84
    CL_RST# NC GND 85
    GND 86
    2 CLINK use for Intel only 2
    T145 @ 45 GND 87
    PAD~D WL_EN(3.3V) GND
    46 88
    47 SDIO_INT_L GND 89
    Commodity WLAN CPN - R1 SDIO_DATA3 GND
    48 90
    49 SDIO_DATA2 GND 91
    Italia XPS Killer1435-S PK29S006810 R24~R26 de-pop
    50 SDIO_DATA1 GND 92
    51 SDIO_DATA0 GND 93
    Italia-L Intel 8265 PK29S00980L R24~R26 pop
    52 SDIO_CMD(IO) GND 94
    SDIO_CLK(I) GND 95
    53 GND 96
    54 UART_WAKE#(3.3V) GND 97
    WL1 XPS@ WL1 L@
    55 UART_CTS GND 98
    56 UART_TXD GND 99
    57 UART_RXD GND 100
    UART_RTS GND 101
    GND 102
    58 GND 103
    PK29S006810 PK29S00980L
    59 PCM_SYNC GND 104
    U69H025.10 KILLER1435-S 8265D2WML.NVQ_108P PCM_IN GND
    60 105
    61 PCM_OUT GND 106
    PCM_CLK GND 107
    +3VS_NGFF GND 108
    DZ2
    1 2 WLAN_WIGIG60GHZ_DIS#_R 28 GND
    <58> WLAN_WIGIG60GHZ_DIS# WLAN_RF_KILL_L
    63
    2.2K_0201_5% 2 @ 1 RC181 WLAN_WIGIG60GHZ_DIS#_R RB751V40_SC76-2 BT_RF_KILL_L
    2.2K_0201_5% 2 @ 1 RC182 BT_RADIO_DIS#_R DZ3
    1 2 BT_RADIO_DIS#_R 65
    <58> BT_RADIO_DIS# WLAN_LED
    64
    BT_LED
    RB751V40_SC76-2
    USB20_N7_R 69
    USB20_P7_R 70 BT_USB_DN
    BT_USB_DP
    8
    9 NC
    10 NC
    NC
    3 3
    U69H025.10_108P~D

    CIS footprint change to Killer1435-S


    U69H025.10_108P~D

    4 4

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    P52-WLAN / BT

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 52 of 100
    A B C D E
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P053 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 53 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P054 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 54 of 100
    5 4 3 2 1
    5 4 3 2 1

    HD Audio Codec

    LA1 +PVDD2
    BLM15PX600SN1D_2P Placement near Audio Codec
    2 1 50mil
    +5VS_AUDIO moat

    0.1U_0402_16V7K~N
    +AVDD1 +5VS_AUDIO

    10U_0603_10V6M

    10U_0603_10V6M
    Place next to CODEC

    0.1U_0402_16V7K~N
    +AVDD1
    +3VS_AUDIO
    1 2 +DVDD 1 1 2 1

    0.1U_0402_10V7K

    10U_0603_10V6M
    CA5

    CA8
    LA2

    0.1U_0402_10V7K

    CA3

    CA6
    D BLM15BB220SN1D_2P 2 1 1 2 HCB1005KF-600T25_2P LA3 D

    10U_0402_6.3V6M

    CA7

    CA9

    CA10
    1 2
    2 @ 2 1@ 2

    CA4

    10U_0603_10V6M

    AZ5125-01H.R7G_SOD523-2
    1

    1
    1 2 2 1

    EMC@ U4
    CA11
    moat 2

    AGND AGND

    2
    +AVDD2
    Near Codec RA1
    1 @ 2 +1.8VS_AUDIO
    In order to prevent the built?in LDO damaged from
    0_0402_1% over?voltage on +5VD or Standby power line, we
    suggested using this Voltage suppressing device.

    0.1U_0402_10V7K
    1 2

    10U_0402_6.3V6M
    CA12
    1 2
    +3VS_AUDIO +DVDDIO

    CA13
    LA4 0.1U_0402_10V7K
    BLM15BB220SN1D_2P 2 1
    2 1
    10U_0402_6.3V6M

    CA15
    CA14

    1 2 Beep sound moat

    CA16
    +DVDDIO AGND RA2
    1 2 1 2 MONO_IN
    <58> BEEP
    RA3 1 @ 2 0_0402_1% 1K_0402_1%
    +DVDD +RTCVCC 0.1U_0402_10V7K

    100P_0402_50V8J
    Near Codec
    1
    RA4

    CA17
    <12> SPKR 1 2

    1
    2 1K_0402_1% 1
    R17 @ CA18

    18

    41

    46

    40

    20

    33
    3
    U5 1K_0402_1% 100P_0402_50V8J~D

    DVDD-IO

    PVDD1

    PVDD2

    AVDD1

    CPVDD/AVDD2

    5VSTB/AUX MODE
    DVDD
    2

    2
    C C
    DMIC_DAT12_CODEC RA5 1 2 22_0402_5% DMIC_DAT12_CODEC_R 4
    <64> DMIC_DAT12_CODEC GPIO_0/DMIC DATA12 MONO_IN
    34
    DMIC_CLK_CODEC RA6 1 2 22_0402_5% DMIC_CLK_CODEC_R 5 PCBEEP
    <64> DMIC_CLK_CODEC GPIO_1/DMCI CLK Close to U5 Pin2
    2 RA7 1 2 1K_0402_5%
    DMIC_DAT34_CODEC RA61 1 2 22_0402_5% DMIC_DAT34_CODEC_R 1 PDB
    <64> DMIC_DAT34_CODEC GPIO_2/DMIC DATA34

    23
    AMP_I2C_DAT 6 CBP
    <56> AMP_I2C_DAT I2C DATA 24 CA19 1 2 2.2U_0603_6.3V6K~D
    AMP_I2C_CLK 7 CBN 0603 package size +DVDD
    <56> AMP_I2C_CLK I2C CLK for 16 Ohm THD+N
    AMP_I2S_IN 8
    3271'S I2C supports master mode only. I2S IN 29 MIC2_VREFO_R <57>

    2
    AMP_I2S_OUT 9 Mic2-VrefO-R
    I2S OUT 28 RA8
    Mic2-VrefO-L MIC2_VREFO_L <57>
    AMP_I2S_BCLK 10 100K_0201_5%
    +DVDD I2S BCLK 31
    Mic2-R/Sleeve SLEEVE <57>
    AMP_I2S_MCLK 11 D7

    1
    I2S MCLK 30 2 1
    Mic2-L/Ring2 RING2 <57> <56> AMP_MUTE# NB_MUTE# <58>
    RA9 1 2 2.2K_0402_5% AMP_I2C_DAT AMP_I2S_LRCK 12

    1
    I2S LRCK
    AMP_I2C_CLK RB751V40_SC76-2
    RA10 1 2 2.2K_0402_5% @
    +DVDD RA11 1 2 100K_0402_1%~D 47 RA12 D8
    HDA_BIT_CLK_R I2S_IN/I2S_OUT JD 36 1K_0201_5% 2 1
    Line1-L LINE1_L <57> PCH_MUTE# <9>
    JACK_PLUG RA13 1 2 200K_0402_1% 48
    <57> JACK_PLUG

    2
    HP/Line 1 JD
    @EMC@

    JACK_PLUG 35
    Line1-R LINE1_R <57> RB751V40_SC76-2
    @ CA20 1 2 0.1U_0402_10V7K
    100P_0402_50V8J

    D9
    47P_0402_50V8J~D
    CA21

    26 HP2_D_R 2 1 CODEC_MUTE#
    1 1 HPOut-R HP2_D_R <57>
    @ CA22

    HDA_BIT_CLK_R 14
    <12> HDA_BIT_CLK_R AUDIOLINK: BCLK 27 HP2_D_L
    HPOut-L HP2_D_L <57> RB751V40_SC76-2
    <12> HDA_SYNC_R
    15
    2 2 AUDIOLINK:SYNC
    RA14 1 2 33_0201_1% HDA_SDIN0_R 16
    <12> HDA_SDIN0 AUDIOLINK:SDATA-IN
    Near Codec 32 CA23 1 2 10U_0402_6.3V6M +DVDD
    MIC2-CAP AGND
    <12> HDA_SDOUT_R 17 100K is used to speed up
    AUDIOLINK:SDATA-OUT 39 the discharge for LDO1.
    LDO1-CAP RA15 1 2 100K_0201_5% CODEC_MUTE#

    100K_0402_1%~D
    1
    38 CA24 1 2 2.2U_0402_6.3V6M 1
    DMIC_CLK_CODEC VREF

    RA16
    1 42
    SPK-OUT-LP 21 CA25 2 1 10U_0402_6.3V6M CA26
    B B
    EMC@ CA28 43 LDO2-CAP
    10U_0402_6.3V6M
    SPK-OUT-LN 13 CODEC_MUTE# 2

    2
    10P_0201_25V9 2 DMIC_CLK_CODEC 44 DC DET/EAPD AGND
    SPK-OUT-RN 19 CA27 2 1 10U_0402_6.3V6M
    DMIC_DAT12_CODEC LDO3-CAP
    TVNST52302AB0_SOT523-3

    DMIC_DAT34_CODEC
    TVNST52302AB0_SOT523-3

    45
    DMIC_DAT12_CODEC SPK-OUT-RP
    1
    3

    AGND
    Thermal Pad

    EMC@ CA29

    10P_0201_25V9 2
    CPVEE
    AVSS2

    AVSS1

    EMC@ D10 EMC@ D73


    1

    DMIC_DAT34_CODEC
    1
    ALC3271-CG_MQFN48_6X6
    22

    37

    25

    49

    EMC@ CA83 Need update CIS symbol(31 30 revese)


    2.2U_0603_6.3V6K~D

    10P_0201_25V9 2 1
    CA30

    HP2_D_R moat
    Reserved for EMI AGND
    2

    330P_0402_50V7K
    1

    CA31
    0603 package size @ JPA1
    for 16 Ohm THD+N 2 1

    2
    AGND
    JUMP_43X39
    @ JPA2
    POST I2S interface 2 1

    HP2_D_L JUMP_43X39

    330P_0402_50V7K
    AMP_I2S_IN RA17 1 2 33_0402_5% GND AGND
    AMP_I2S_IN_R <56>

    1
    AMP_I2S_OUT

    CA32
    RA18 1 2 33_0402_5% AMP_I2S_OUT_R <56> Near AVDD1 and AVDD2 power source input
    AMP_I2S_BCLK RA19 1 2 33_0402_5% AMP_I2S_BCLK_R <56> <JPA1> Place at Codec bottom side.

    2
    AMP_I2S_MCLK RA20 1 2 33_0402_5%
    <JPA2> Place near audio connector.
    AMP_I2S_MCLK_R <56> Don't short this pad to USB digital ground,
    AMP_I2S_LRCK RA21 1 2 33_0402_5% AMP_I2S_LRCK_R <56>
    and should be far away from any power traces.
    A A
    33P_0402_50V8J

    33P_0402_50V8J

    33P_0402_50V8J

    33P_0402_50V8J

    33P_0402_50V8J

    Vendor Suggested
    1

    1
    CA33

    CA34

    CA35

    CA36

    CA37
    2

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2013/07/04 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P55-Audio Codec3271
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 55 of 100
    5 4 3 2 1
    5 4 3 2 1

    SMART AMP
    B+_AMP B+_AMP

    10U_0603_25V6M

    10U_0603_25V6M

    0.1U_0402_25V6K~D

    1000P_0402_25V8J

    0.1U_0402_25V6K~D

    10U_0603_25V6M
    1 1 1 1 1

    1
    CA40

    CA41

    CA42

    CA43
    CA38

    CA39

    2
    B+ B+_AMP 2 2 2 2 2

    D D
    R18 1 @ 2 0_0603_5%

    RA22
    B+_AMP
    1 @ 2 +1.8VS_AUDIO

    10U_0603_25V6M

    0.1U_0402_25V6K~D

    1000P_0402_25V8J

    0.1U_0201_6.3V6K

    1U_0201_6.3V6M
    1 1 1 1

    1
    CA44

    CA45

    CA46
    0_0402_1%

    CA47

    CA48
    2
    2 2 2 2

    RA23
    +DVDD

    0.1U_0402_16V7K~N 0.1U_0402_16V7K~N

    1U_0201_6.3V6M
    B+_AMP @ 1 1

    2
    0.1U_0402_25V6K~D

    1000P_0402_25V8J

    CA49
    1

    1
    10U_0603_25V6M

    CA51

    CA52

    CA53
    1

    CA50
    RA24 2 2

    2
    2 1 2

    0_0402_5%
    1
    2
    100K_0402_5%
    +1.8VS_AUDIO

    1U_0201_6.3V6M
    1 1

    CA55
    1U_0603_25V6

    1U_0603_25V6

    CA56
    B+_AMP

    1
    10U_0603_25V6M

    10U_0603_25V6M

    CA57

    CA54
    2 2

    0.1U_0402_25V6K~D

    1000P_0402_25V8J
    1 1 1

    1
    CA60

    CA61

    2
    CA58

    CA59

    2
    2 2 2
    RA25 1 @ 2 0_0402_5% EC_I2C_DAT <58>

    56

    51

    48

    43

    42

    37

    21

    40

    16

    17
    1

    3
    U6 RA26 1 @ 2 0_0402_5% EC_I2C_CLK <58>

    AVDD1

    AVDD2

    PGVdd
    PVDD-C

    PVDD-D

    PVDD-D

    GVDD-CD

    DVDD
    DVDD-IO
    PVDD-A

    PVDD-A

    PVDD-B

    GVDD-AB
    C 7 AMP_I2C_DAT_R RA27 1 @ 2 0_0402_1% C
    SDA AMP_I2C_DAT <55>
    AMP_OUT_L- CA62 1 2 0.22U 25V K X5R 2 +DVDD
    RA28 10K_0402_0.1% BST-A 8 AMP_I2C_CLK_R RA33 1 @ 2 0_0402_1%
    SCL AMP_I2C_CLK <55>
    1 2 AMP_OUT_P_L-_R AMP_OUT_L+ CA63 1 2 0.22U 25V K X5R 50
    BST-B

    10K_0402_5%
    @ RA30
    RA29 10K_0402_0.1% 18 AMP_ADDR_SEL
    ASEL

    1
    1 2 SPK_OUT_L-_R AMP_OUT_R- CA64 1 2 0.22U 25V K X5R 49
    RA31 10K_0402_0.1% BST-C 39
    1 2 SPK_OUT_L+_R AMP_OUT_R+ CA65 1 2 0.22U 25V K X5R 41 SYNC-IN
    RA32 10K_0402_0.1% BST-D 38
    1 2 AMP_OUT_P_R-_R SYNC-OUT

    2
    RA34 10K_0402_0.1% CA66 1 2 10U_0402_6.3V6M 22
    1 2 SPK_OUT_R-_R LDO A1.5 55 AMP_OUT_L- AMP_ADDR_SEL
    RA36 10K_0402_0.1% AMP_OUT_P_L- RA35 1 2 39K +-0.1% 0402 AMP_OUT_P_L-_R 25 OUT-A
    LISENDE_P

    10K_0402_5%
    1 2 SPK_OUT_R+_R 52 AMP_OUT_L+
    OUT-B

    1
    SPK_OUT_L- RA37 1 2 39K +-0.1% 0402 SPK_OUT_L-_R 26
    LISENDE_N/LVSENSE_P

    RA38
    47 AMP_OUT_R-
    SPK_OUT_L+ RA39 1 2 39K +-0.1% 0402 SPK_OUT_L+_R 27 OUT-C
    LVSENSE_N 44 AMP_OUT_R+
    OUT-D I2C Address Selection

    2
    RA40 1 2 22.6K_0402_1% 5 Low : 0x20
    OC_ADJ 23 CA67 1 2 0.1U_0402_25V6K~D Hi : 0x22
    AMP_OUT_P_R- RA41 1 2 39K +-0.1% 0402 AMP_OUT_P_R-_R 28 VREF
    RISENSE_P
    SPK_OUT_R- RA42 1 2 39K +-0.1% 0402 SPK_OUT_R-_R 29 9
    RISENSE_N/RVSENSE_P MCLK AMP_I2S_MCLK_R <55>
    SPK_OUT_R+ RA43 1 2 39K +-0.1% 0402 SPK_OUT_R+_R 30 10
    RVSENSE_N BCLK AMP_I2S_BCLK_R <55>
    11 AMP_I2S_LRCK_R <55>
    LRCK
    32 12 AMP_I2S_OUT_R <55>
    NC DACDAT
    31 13
    NC SPDIF_IN
    36 14 AMP_I2S_IN_R <55>
    NC SPDIF OUT/I2S DATOUT
    35 15 AMP_MUTE# <55>
    NC PDBJD

    Thermal Pad
    B B

    PGND-CD

    PGND-CD

    PGND-AB

    PGND-AB
    Int. Speaker Conn.

    DGND
    AGND

    AGND

    AGND

    AGND
    GND
    4

    34

    33

    24

    20

    19

    46

    45

    54

    53

    57
    ALC1309-CG_QFN56_7X7

    Use 120 ohm bead 40mil = For 4ohm 3W Speaker

    1
    (SM01000L300, MURATA BLM15PX121SN1D)
    EVT1.1 use SA00009JZ10

    10K_0402_5%
    EMC@ LA5 BLM15PX121SN1D_2P RA44 0.2_0805_ 1%
    AMP_OUT_L- 1 2 AMP_OUT_P_L- 1 2 SPK_OUT_L-

    RA66
    EMC@ LA6 BLM15PX121SN1D_2P

    2
    AMP_OUT_L+ 1 2 SPK_OUT_L+
    EMC@ LA7 BLM15PX121SN1D_2P RA45 0.2_0805_ 1%
    AMP_OUT_R- 1 2 AMP_OUT_P_R- 1 2 SPK_OUT_R-
    EMC@ LA8 BLM15PX121SN1D_2P
    AMP_OUT_R+ 1 2 SPK_OUT_R+
    330P_0201_50V7K

    330P_0201_50V7K

    330P_0201_50V7K

    330P_0201_50V7K

    680P_0402_50V7K~D

    680P_0402_50V7K~D

    680P_0402_50V7K~D

    680P_0402_50V7K~D
    CA68 EMC@

    CA69 EMC@

    CA70 EMC@

    CA71 EMC@

    1 1 1 1
    1

    CA72

    CA73

    CA74

    CA75

    JSPK1
    SPK_OUT_L+ 1 SPK_OUT_L+ SPK_OUT_R+
    2

    2 2 2 2 SPK_OUT_L- 2 1 SPK_OUT_L- SPK_OUT_R-


    SPK_OUT_R+ 3 2
    SPK_OUT_R- 4 3
    4

    EMC@ DA1
    ESD203-B1-02EL_TSLP-2-20-2

    EMC@ DA2
    ESD203-B1-02EL_TSLP-2-20-2

    EMC@ DA3
    ESD203-B1-02EL_TSLP-2-20-2

    EMC@ DA4
    ESD203-B1-02EL_TSLP-2-20-2
    5
    5
    1

    1
    AMP_I2C_CLK_R RA64 1 2 0_0402_1% SPK_CLK 6
    RA46 EMC@

    RA47 EMC@

    RA48 EMC@

    RA49 EMC@

    @
    10_0402_1%

    10_0402_1%

    10_0402_1%

    10_0402_1%

    AMP_I2C_DAT_R RA63 1 @ 2 0_0402_1% SPK_DAT 7 6


    SPK_VDD 8 7
    8
    SPK_DET# @ RA62 1 2 0_0402_5% 9
    <12> SPK_DET#
    2

    10 GND

    2
    RA50 1 @ 2 0_0402_1% GND
    +3VS_AUDIO
    ACES_50208-00801-003
    A CONN@ A

    Function RA50 RA62

    EEPROM Speaker 0 ohm NC


    DELL CONFIDENTIAL/PROPRIETARY
    Speaker Detection 10K 0 ohm Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2014/09/08 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P56-Smart AMP / Speaker
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P

    WWW.AliSaler.Com
    Date: Monday, October 22, 2018 Sheet 56 of 100
    5 4 3 2 1
    5 4 3 2 1

    Universal Audio Jack

    D D

    RA51
    2.2K_0402_5%~D
    <55> MIC2_VREFO_L 1 2

    JAUDIO1
    RA521 2 BLM15PX330SN1D_2P RING2_R JACK_PLUG 1 2 RING2_R
    <55> RING2 HP2_D_L HP2_D_L_R1 LA9 1 HP2_D_L_C 1 2
    <55> 1 2 2 BLM15PX330SN1D_2P 3 4
    HP2_D_L HP2_D_L_C 3 4
    RA53 5.6_0402_5% 5 6
    HP2_D_R_C 7 5 6 8
    40mil JACK_PLUG SLEEVE_R 9 7 8 10 SLEEVE_R
    <55> JACK_PLUG 9 10
    HP2_D_R RA54 1 2 HP2_D_R_R1 LA10 1 2 BLM15PX330SN1D_2P HP2_D_R_C
    <55> HP2_D_R SLEEVE_R
    <55> 5.6_0402_5% 1 2
    SLEEVE
    RA55 BLM15PX330SN1D_2P 11 13
    12 GND GND 14
    GND GND
    HRS_BM20B(0P8)10DS0P4V(51)

    EMC@ DA9
    AZ5123-01F.R7G_DFN1006P2X2
    <55> MIC2_VREFO_R 1 2 CONN@

    EMC@ DA5
    AZ5123-01F.R7G_DFN1006P2X2

    EMC@ DA6
    AZ5123-01F.R7G_DFN1006P2X2

    EMC@ DA7
    AZ5123-01F.R7G_DFN1006P2X2

    EMC@ DA8
    AZ5123-01F.R7G_DFN1006P2X2
    RA56
    2.2K_0402_5%~D AGND

    680P_0402_50V7K~D

    680P_0402_50V7K~D

    680P_0402_50V7K~D

    680P_0402_50V7K~D
    CA76

    CA77

    CA78

    CA79

    1
    1

    1
    1 1 1 1

    PCB trace width of MIC2-R(SLEEVE)/MIC2-L(RING2) are


    required at least 40 mil for HP crosstalk consideration 2 2 2 2

    2
    and, its length should be as short as possible.

    2
    AGND

    C C

    CA80 1 2 10U_0603_6.3V6M LINE1_L_C RA57 1 @ 2 0_0402_1% HP2_D_L


    <55> LINE1_L
    CA81 1 2 10U_0603_6.3V6M LINE1_R_C RA58 1 @ 2 0_0402_1% HP2_D_R
    <55> LINE1_R

    1
    @ RA59 @ RA60
    9.09K_0402_1% 9.09K_0402_1%

    2
    AGND AGND

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2041/09/08 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P57-Audio CONN
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 57 of 100
    5 4 3 2 1
    5 4 3 2 1

    +3.3V_EC5105
    +RTCVCC_EC

    +RTC_CELL UPD1_SMBDAT 1 2
    RE106 2 @ 1 +RTC_CELL_VBAT RE105 2.2K_0402_5%
    0_0402_1% UPD1_SMBCLK 1 2
    +3.3V_EC5105

    0.1U_0201_10V6K
    +3VALW 1 RE107 2.2K_0402_5%

    CE42
    RE252 UPD1_ALERT# 1 2
    1 @ 2 RE108 100K_0402_5%
    UPD2_ALERT# 1 2
    2

    10U_0402_6.3V6M

    0.1U_0201_10V6K

    1U_0201_6.3V6M

    0.1U_0201_10V6K
    0_0603_5% RE109 100K_0402_5%
    CE46 UPD3_ALERT# 1 2
    1 1 1 1

    CE43

    CE44

    CE45
    RE231 100K_0402_5%
    IMVP_SMBCLK 1 2
    RE293 2.2K_0402_5%
    2 2 2 2 IMVP_SMBDAT 1 2
    RE292 2.2K_0402_5%
    UE3 PBAT_CHARGER_SMBDAT 1 2
    F2 TYPE_ID RE111 2.2K_0402_5%
    GPIO033/RC_ID0 PANEL_ID TYPE_ID <59> PBAT_CHARGER_SMBCLK
    A2 J10 <59> 1 2
    +3.3V_EC5105 VBAT GPIO034/RC_ID1/SPI0_CLK BOARD_ID PANEL_ID
    J13 <59> RE112 2.2K_0402_5%
    D GPIO036/RC_ID2/SPI0_MISO UPD2_SMBDAT BOARD_ID D
    B7 E7 <44>
    VTR_ANALOG GPIO003/SMB00_DATA/SPI0_CS# UPD2_SMBCLK UPD2_SMBDAT
    2 1 D7 PD 2
    +3.3V_EC5105 GPIO004/SMB00_CLK/SPI0_MOSI UPD2_SMBCLK <44>
    0.1U_0201_10V6K

    0.1U_0201_10V6K

    100_0402_1% RE113 K2
    VREF_ADC

    22U_0603_6.3V6M

    0.1U_0201_10V6K
    1 1 1 1 G3 RUNPWROK
    GPIO057/VCC_PWRGD
    CE50

    CE51

    @ CE47
    +3.3V_EC_PLL F1 H5 SSD_SCP
    VTR_PLL GPIO060/KBRST/48MHZ_OUT SSD_SCP <67>

    CE48
    G11 <59>
    GPIO104/UART0_TX HOST_DEBUG_TX
    H1 G12 <12>
    2 2 2 2 VTR_REG GPIO105/UART0_RX ME_FWP_EC UPD3_SMBDAT
    B13 2.2K_0201_1% 1 2 RE441
    GPIO127/A20M/UART0_CTS# UPD1_ALERT# ME_SUS_PWR_ACK <11> UPD3_SMBCLK
    G8 F10 2.2K_0201_1% 1 2 RE442
    VTR1 GPIO225/UART0_RTS# UPD1_ALERT# <43> UPD2_SMBCLK
    M9 2.2K_0201_1% 1 2 RE443
    +VSS_PLL +3.3V_EC5105 VTR2 PCIE_WAKE#_R UPD2_SMBDAT
    close to pin G8/M9 +1.8V_3.3V_ALW_VTR3 N5 N13 2.2K_0201_1% 1 2 RE444
    VTR3 GPIO025/TIN0/nEM_INT/UART_CLK PCIE_WAKE#_R <41,59,67>
    N12
    GPIO026/TIN1 SIO_SLP_S4# <11,65>
    F8 M11
    +3.3V_EC5105 <59> PCH_DPWROK_EC RUN_ON_EC GPIO020 GPIO027/TIN2 SIO_SLP_A# <11>
    RF Request E8 H9 <77>
    <59,65> RUN_ON_EC GPIO045 GPIO030/TIN3 TP_PW_EN
    0.1U_0201_10V6K

    1 M12
    +3VALW <9> SIO_EXT_WAKE# BT_RADIO_DIS# GPIO120
    <52> C2 L9
    BT_RADIO_DIS# PBAT_PRES# GPIO166 GPIO017/GPTP-IN5 BEEP <55>
    CE49

    <82,83>
    F9 M10
    PBAT_PRES# GPIO175 GPIO151/ICT4 DCIN1_EN <82>
    RE115 1 2 N4 N9
    2 <11,65,77,86,88,89> SIO_SLP_SUS# PCH_ALW_ON GPIO230 GPIO152/GPTP-OUT3 DCIN2_EN <82>
    43K_0402_1% M8
    <77> PCH_ALW_ON GPIO231 EC_I2C_DAT
    K8 C11 PWR_LED# 1 2
    <11> AC_PRESENT GPIO233 GPIO156/LED0 BREATH_LED# <63>
    D10 <64> @ RE242 2.2K_0402_5%
    GPIO157/LED1 BAT1_LED# EC_I2C_CLK
    <8> SML1_SMBDAT
    E11 D11 1 2
    GPIO007/SMB03_DATA/PS2_CLK0B GPIO153/LED2 BAT2_LED# <64>
    Close to pin H1 <8>
    D8 E1 <77> @ RE243 2.2K_0402_5%
    SML1_SMBCLK GPIO010/SMB03_CLK/PS2_DAT0B GPIO226/LED3 LCD_VCC_TEST_EN
    12P_0402_50V8J
    RF@ CE52

    68P_0402_50V8J
    RF@ CE53

    1 1 <63> BATT_LED#_LV5
    M13
    K12 GPIO110/PS2_CLK2 E5 FPR_SCAN#
    <11> SUSACK# WLAN_WIGIG60GHZ_DIS# L13 GPIO111/PS2_DAT2 GPIO005/SMB01_DATA/GPTP-OUT4 FPR_DET# FPR_SCAN# <65>
    <77> SLP_WLAN#_GATE B3 GPIO006 RE281 2 1 33_0201_1% <65>
    <52> WLAN_WIGIG60GHZ_DIS# GPIO112/PS2_CLK1A GPIO006/SMB01_CLK/GPTP-OUT7 UPD3_SMBDAT FPR_DET#
    <11,14>
    K11 M7 <45>
    2 2 SIO_PWRBTN# GPIO113/PS2_DAT1A GPIO012/SMB07_DATA/TOUT3 UPD3_SMBCLK UPD3_SMBDAT
    1 2 K10 M4 PD 3
    <11,14,59,65> H_VCCST_PWRGD_P LID_CL_SIO# GPIO114/PS2_CLK0A/nEC_SCI GPIO013/SMB07_CLK/TOUT2 PBAT_CHARGER_SMBDAT UPD3_SMBCLK <45> WLAN_WIGIG60GHZ_DIS#
    @ RE118 0_0402_5% RE237 2 @ 1 N11 M3 1 2
    <63> NB_LID# GPIO115/PS2_DAT0A GPIO130/SMB10_DATA/TOUT1 PBAT_CHARGER_SMBCLK PBAT_CHARGER_SMBDAT <82,83>
    <65> 0_0402_1% E10 N2 CHARGER RE119 100K_0402_5%
    CLK_TP_SIO GPIO154/SMB02_DATA/PS2_CLK1B GPIO131/SMB10_CLK/TOUT0 IMVP_SMBDAT PBAT_CHARGER_SMBCLK <82,83>
    <65> C12 N10 <90>
    DAT_TP_SIO GPIO155/SMB02_CLK/PS2_DAT1B GPIO132/SMB06_DATA IMVP_SMBCLK IMVP_SMBDAT
    A12 IMVP_SMBCLK <90> POWER IMVP
    JTAG_TDI E9 GPIO140/SMB06_CLK/ICT5 B6 EC_I2C_DAT
    <59> JTAG_TDI GPIO145/SMB09_DATA/JTAG_TDI GPIO141/SMB05_DATA/SPI1_CLK/UART0_DCD# EC_I2C_DAT <56>
    JTAG_TDO F6 F7 EC_I2C_CLK
    <59> JTAG_TDO JTAG_CLK GPIO146/SMB09_CLK/JTAG_TDO GPIO142/SMB05_CLK/SPI1_MOSI/UART0_DSR# UPD1_SMBDAT EC_I2C_CLK <56>
    C8 B4 THERMATRIP1# 1 2
    <59> JTAG_CLK JTAG_TMS GPIO147/SMB08_DATA/JTAG_CLK GPIO143/SMB04_DATA/SPI1_MISO/UART0_DTR# UPD1_SMBCLK UPD1_SMBDAT <43>
    <59> C5 C3 PD 1 RE124 10K_0402_5%
    JTAG_TMS JTAG_RST# GPIO150/SMB08_CLK/JTAG_TMS GPIO144/SMB04_CLK/SPI1_CS#/UART0_RI# UPD1_SMBCLK <43>
    G13
    JTAG_RST# J4 I_BATT_R RE125 1 2 300_0402_5%
    GPIO200/ADC00 I_BATT <83>
    E3 J5 I_SYS_R RE126 1 2 300_0402_5% PCIE_WAKE#_R 1 2
    <67> FAN1_TACH GPIO050/FAN_TACH0/GTACH0 GPIO201/ADC01 I_SYS <83,90>
    +3VS_TP D1 J6 RE127 10K_0402_5%
    <67> FAN2_TACH LCD_TST GPIO051/FAN_TACH1/GTACH1 GPIO202/ADC02 PTP_INT#_EC H_VCCST_PWRGD <65>
    <38> M2 G2 RE251 1 @ 2 0_0402_1% <14,65>
    CLK_TP_SIO LCD_TST GPIO052/FAN_TACH2/LRESET# GPIO203/ADC03 TP_INTR#
    RE235 1 2 4.7K_0402_5%~D <67> FAN1_PWM
    L10 H2 <45>
    C DAT_TP_SIO GPIO053/PWM0/GPWM0 GPIO204/ADC04 UPD3_ALERT# BC_DAT_ECE1117 C
    RE236 1 2 4.7K_0402_5%~D <67> FAN2_PWM
    L11 J2 PRODUCT_ID_EC <59> 1 2
    SHD_CS# M5 GPIO054/PWM1/GPWM1 GPIO205/ADC05 J3 VCCDSW_EN RE130 100K_0402_5%
    GPIO055/PWM2/SHD_CS#/(RSMRST#) GPIO206/ADC06 VCCDSW_EN <18>
    ALS_GPIO22 J8 K3
    <9> ALS_GPIO22 GPIO056/PWM3/SHD_CLK GPIO207/ADC07 DCIN3_EN <82>
    <38> BIA_PWM_EC N1 D3 <77>
    TBT_RESET_N_EC_R GPIO001/PWM4 GPIO210/ADC08 AUX_EN_WOWL BT_RADIO_DIS#
    RE132 1 @ 2 L8 D2 1 2
    <41> TBT_RESET_N_EC GPIO002/PWM5 GPIO211/ADC09 SUS_ON_EC <65>
    ESPI only support 1.8V 0_0402_1% N6 E2 RE133 100K_0402_5%
    <41> RTD3_SELECT GPIO014/PWM6/GPTP-IN6 GPIO212/ADC10 HRESET_PD3_EC BC_INT#_ECE1117 <64>
    J9 G5 HRESET_PD3_EC <45>
    <38> PANEL_BKEN_EC GPIO015/PWM7 GPIO213/ADC11 UPD2_ALERT#
    T140 @ PAD~D
    H11 F5
    GPIO035/PWM8/CTOUT1 GPIO214/ADC12 HRESET_PD1_EC UPD2_ALERT# <44>
    JP3 <11,77> SIO_SLP_WLAN# D9 K4 HRESET_PD1_EC <43>
    1 2 H12 GPIO133/PWM9 GPIO215/ADC13 L1 PCH_PCIE_WAKE#
    +1.8VA +1.8V_3.3V_ALW_VTR3 <63> BATT_LED#_LV3
    G10 GPIO134/PWM10/UART1_RTS# GPIO216/ADC14 L3
    PCH_PCIE_WAKE# <11,41,59> +RTCVCC_EC
    1 <63> BATT_LED#_LV2 GPIO135/UART1_CTS# GPIO217/ADC15 LAN_WAKE# <11>
    @ PAD-OPEN1x1m <59> MSCLK H10
    MSCLK GPIO170/TFDP_CLK/UART1_TX
    CE54 MSDATA G9 H8 <77> BATBTN# 1 2
    <59> MSDATA GPIO171/TFDP_DATA/UART1_RX GPIO222/SER_IRQ SSD_SCP_PWR_EN
    0.1U_0201_10V6K 1 CE55 J7 BATT_LED#_LV4 <63> RE137 100K_0402_5%
    2 0.1U_0201_10V6K A4 GPIO223/SHD_IO0 L6 HRESET_PD2_EC VCI_IN2# 1 2
    <55> NB_MUTE# GPIO022/GPTP-IN0 GPIO224/GPTP-IN4/SHD_IO1 HRESET_PD2_EC <44>
    EN_INVPWR B2 L7 SHD_IO2 RE142 100K_0402_5%
    <38> EN_INVPWR PRIM_PWRGD_GPIO024 GPIO023/GPTP-IN1 GPIO227/SHD_IO2 ALS_GPIO19 VCI_IN3#
    C1 M6 ALS_GPIO19 <9> 1 2
    2 Close to pin N5 IMVP_VR_ON_EC N7 GPIO024/nRESETI GPIO016/GPTP-IN7/SHD_IO3/ICT3 RE244 100K_0402_5%
    <59> IMVP_VR_ON_EC GPIO031/GPTP-OUT1
    K9 D6
    <11,41,59,65> SIO_SLP_S3# GPIO032/GPTP-OUT0 BGPO0 PAD~D @ T58 +PECI_VREF
    N8 C7 <83>
    2 @ 1
    +1.0V_VCCST
    <11> SIO_SLP_S5# GPI0040/GPTP-OUT2 GPIO164/VCI_OVRD_IN ALWON_RR5852 1 ACAV_IN
    A5 @ 2 0_0201_5%
    ALWON <84> RE147 0_0402_1%
    F13 VCI_OUT D5 +3.3V_EC5105
    <59>

    0.1U_0201_10V6K
    <82> VBUS1_ECOK GPIO121/PVT_IO0 GPIO163/VCI_IN0# POWER_SW_IN#
    E13 B5 BATBTN# BATBTN# <63>
    <82> AC_DISC# GPIO124/GPTP-OUT6/PVT_CS# GPIO162/VCI_IN1# VCI_IN2#
    C13 D4 RE147 close to UE3 at least 250mils

    CE56
    <82> VBUS2_ECOK GPIO125/GPTP-OUT5/PVT_CLK GPIO161/VCI_IN2# VCI_IN3# FPR_DET#
    E12 E4 1 2
    <82> VBUS3_ECOK GPIO126/PVT_IO3 GPIO000/VCI_IN3# RE280 10K_0402_5%
    100K_0201_5% 2 1 RE445 IMVP_VR_ON_EC RTCRST_ON F11

    2
    <64> RTCRST_ON GPIO122/BCM0_DAT/PVT_IO1
    100K_0201_5% 2 1 RE446 PCH_ALW_ON <63> BATT_LED#_LV1
    F12 C6 AC_DIS FPR_SCAN# 1 2
    GPIO123/BCM0_CLK/PVT_IO2 GPIO165/32KHZ_IN/CTOUT0 AC_DIS <83>
    100K_0201_5% 2 1 RE447 RUN_ON_EC <64> D12 RE272 10K_0402_5%
    BC_DAT_ECE1117 GPIO046/BCM1_DAT 32KHZ_OUT
    <64>
    D13 F3 CE57 1 2 10P_0402_50V8J
    BC_CLK_ECE1117 GPIO047/BCM1_CLK GPIO221/GPTP-IN3/32KHZ_OUT FPR_SCAN# 1 2
    @ <65> PTP_DIS#
    F4 @ RE254 100K_0402_5%
    RE152 2 1 1K_0402_5% B1 GPIO041/SYS_SHDN# J11 +PECI_VREF
    +3VLP SYSPWR_PRES GPIO044/VREF_VTT PECI_EC_R
    <10,38> B+_CAM_EN RE261 1 @ 2 0_0402_1% K7 K13 RE153 1 2 43_0402_5% <14>
    PECI_EC
    1

    ALS_GPIO23 N3 GPIO011/nSMI GPIO042/PECI_DAT/SB-TSI_DAT J12 GPIO043


    <9> @ T68
    ALS_GPIO23 GPIO021/LPCPD# GPIO043/SB-TSI_CLK 2PAD~D
    100K_0402_5%

    K6 A8 REM_DIODE1_N CE58 1 2200P_0402_50V7K REM_DIODE1_N


    <8> ESPI_RESET# GPIO061/LPCPD#/ESPI_RESET# DN1_DP1A REM_DIODE1_N <59>
    RE154

    H7 A7 REM_DIODE1_P REM_DIODE1_P
    <8> ESPI_ALERT# GPIO063/SER_IRQ/ESPI_ALERT# DP1_DN1A REM_DIODE2_N REM_DIODE2_N REM_DIODE1_P <59> I_BATT_R
    <59>
    K1 A10 CE59 1 2 2200P_0402_50V7K
    <59> CE60 1 2 2200P_0402_50V7K
    PCH_PLTRST#_5105 ESPI_CLK_5105 GPIO064/LRESET# DN2_DP2A REM_DIODE2_P REM_DIODE2_P REM_DIODE2_N
    G7 A9 <59>
    <8,59> REM_DIODE2_P
    2

    ESPI_CLK_5105 H6 GPIO065/PCI_CLK/ESPI_CLK DP2_DN2A B9 REM_DIODE3_N CE90 1 2 2200P_0402_50V7K I_SYS_R CE61 1 2 2200P_0402_50V7K


    <8,59> ESPI_CS# GPIO066/LFRAME#/ESPI_CS# DN3_DP3A REM_DIODE3_P REM_DIODE3_N
    <8,59>
    K5 B8 <59>
    ESPI_IO0 GPIO070/LAD0/ESPI_IO0 DP3_DN3A REM_DIODE4_N REM_DIODE3_P REM_DIODE3_N
    B L4 A11 CE62 1 2 2200P_0402_50V7K B
    <8,59> ESPI_IO1 GPIO071/LAD1/ESPI_IO1 DN4_DP4A REM_DIODE4_P REM_DIODE3_P <59>
    +3VALW G6 B10
    <8,59> ESPI_IO2 GPIO072/LAD2/ESPI_IO2 DP4_DN4A +VR_CAP
    <8,59> L5 C10
    100K_0402_5%

    ESPI_IO3 GPIO073/LAD3/ESPI_IO3 VIN VSET_5105 REM_DIODE4_N PCH_RSMRST#


    L2 C9
    VSET_5105 <59> <59>
    1 2
    REM_DIODE4_N
    2

    M1 GPIO067/CLKRUN# VSET B11 REM_DIODE4_P RE155 10K_0402_5%


    I_ADP <83> REM_DIODE4_P <59>
    RE156

    SYS_PWROK G4 GPIO100/nEC_SCI VCP H3 THERMATRIP2# SYS_PWROK 1 2

    VSS_ANALOG
    <11,14> SYS_PWROK GPIO106/PWROK GPIO103/THERMTRIP2# THERMATRIP2# <59>
    <6,77>
    L12 B12 THERMATRIP1# RE157 10K_0402_5%
    ENVDD_PCH GPIO107/nSMI THERMTRIP1# H_PROCHOT#_R1 I_SYS_R
    VSS_ADC
    H13 RE158 1 2 100_0402_1% 1 2

    VSS_PLL
    <14,83,90>
    VR_CAP
    MEC_XTAL1 GPIO160/PWM11/PROCHOT# H_PROCHOT#

    @
    A1 RE159 10K_0402_5%
    X04_20
    1

    MEC_XTAL2_R A3 XTAL1 LCD_TST 1 2


    VSS1

    VSS2

    VSS3

    XTAL2 RE160 100K_0402_5%


    JTAG_RST# EN_INVPWR 1 2
    MEC5105_WFBGA169_11X11 RE161 100K_0402_5%
    A6

    A13

    E6

    H4

    J1

    C4

    G1 TBT_RESET_N_EC_R 1 2
    Use SA00009GL30(MEC5105K-D2-TN-TR WFBGA 169P)
    +VR_CAP
    1

    RE162 100K_0402_5%
    1
    1U_0201_6.3V6M

    100_0402_1%

    1U_0201_6.3V6M

    +VSS_PLL
    1
    1
    @SHORT PADS~D
    JTAG2 CONN@

    CE63

    @ RE164

    B+_CAM_EN 1 2
    1 RE260 100K_0402_5%
    CE64

    ALWON_R 1 2
    2
    @ RE294 100K_0402_5%
    2

    2
    2

    RE253 1 2 100K_0402_5%
    +3V_PCH
    2

    SHD_IO2 RE245 1 @ 2 0_0402_1%


    1.8VA_PWROK <86> +3VS
    1.8V_PRIM_PWRGD For EMI request SUS_ON_EC 1 2
    2

    +3VALW ESPI_CLK_5105
    10K_0402_5% DMN65D8LDW-7_SOT363-6

    RE282 100K_0402_5%
    PRIM_PWRGD_GPIO024 RE247 1 2 100K_0402_5%
    +3VALW
    RE168

    RE171

    33_0402_5%
    1
    1 2

    EMC@
    GPIO024 use for SHD_IO2 (LPC) or PRIM_PWRGD(eSPI) 75_0402_5% PCH_RTCRST# <11> X04_06
    100K_0402_5%

    RE172
    1
    2

    1
    RUNPWROK D
    RTCRST_ON 2 QE10
    RE174

    MEC_XTAL2_R G L2N7002WT1G_SC-70-3

    2
    1
    S

    3
    6

    33P_0402_50V8J
    SHD_CS# RE177 1 @ 2 0_0402_1% RE176 +3.3V_EC5105
    <11,14>
    1

    PCH_RSMRST#
    QE11A

    EMC@
    1

    1
    GPIO055 use for SHD_CS# (LPC) or PCH_RSMRST#(eSPI) 100K_0201_5%
    RUN_ON# 2 SSD_SCP

    CE65
    RE178 1 2
    32 KHz Clock
    2

    A @ 0_0402_1% @ RE289 10K_0402_5% A

    2
    DMN65D8LDW-7_SOT363-6

    SSD_SCP 1 2
    2

    @ RE288 100K_0402_5%
    YE2
    QE11B

    MEC_XTAL1 1 2 MEC_XTAL2
    5
    <59,77> RUN_ON
    32.768KHZ_9PF_X1A000141000200
    4
    1

    CE66 CE67
    12P_0402_50V8J 12P_0402_50V8J DELL CONFIDENTIAL/PROPRIETARY
    2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P58-MEC5105 ESPI EC
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    1.0
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 58 of 100
    5 4 3 2 1
    5 4 3 2 1

    PCIE_WAKE# <52>

    RE185
    +RTCVCC_EC 2 @ 1 1 2
    <41,58,67> PCIE_WAKE#_R PCH_PCIE_WAKE# <11,41,58>
    +1.8V_3.3V_ALW_VTR3 0_0402_5% @ RE186
    0_0402_1%

    1
    +3VALW

    100K_0402_5%
    2

    RE184
    UE5 Stuff RE185 and no stuff RE186 keep E5 design
    RE183 Stuff RE186 and no stuff RE185 to save two GPIOs on EC(PCH_PCIE_WAKE# should be output with OD)
    1 5 10K_0402_5%
    NC VCC

    2
    2
    <11,41,52,66,67,70>

    1
    PCH_PLTRST#_EC A 4
    <58> <58> RE187 1 2 1K_0402_5%
    <63>
    2 1
    3 Y PCH_PLTRST#_5105 POWER_SW_IN# PBTN_SW#
    0_0402_5% @ RE188
    GND
    1
    74AUP1G07SE-7 SOT353

    1U_0402_6.3V6K
    1
    CE69 +3VALW

    CE68
    Use SA00007WE00 2.2U_0402_6.3V6M @ CE70
    2 1 2

    2
    UE7 +3VALW

    @
    D 0.1U_0402_25V6K D

    5
    1 5
    IMVP_VR_ON_EC 1 NC VCC
    <58>

    P
    IMVP_VR_ON_EC B IMVP_VR_ON
    4 2
    SIO_SLP_S3# 2 O A 4
    <11,41,58,59,65> SIO_SLP_S3# A Y H_VCCST_PWRGD_P <11,14,58,65>

    G
    UE6 3
    TC7SH08FU_SSOP5~D GND

    3
    74AUP1G07SE-7 SOT353
    Use SA00007WE00
    LPC 80Port RF Request
    Debug LPC ESPI IMVP_VR_ON <90>
    +3VALW 1 2
    1 +3VS +3VS 0_0402_5% @ RE191
    JESPI1 +3VS
    2 +3VS +3VS

    68P_0402_50V8J
    1
    1
    1 RUN_ON_EC

    RF@ CE72
    3 LPC_LAD0 ESPI_IO0 2 <58,65> 2 1
    2 RUN_ON_EC RUN_ON <58,77>
    3 ESPI_IO0 <8,58> 0_0402_5% @ RE192
    4 LPC_LAD1 ESPI_IO1 3 4 2
    4 ESPI_IO1 <8,58>
    5 ESPI_IO2 <8,58>
    5 LPC_LAD2 ESPI_IO2 5 6 +3VALW
    6 ESPI_IO3 <8,58>
    7 @ CE73
    7 ESPI_CS# <8,58>
    6 LPC_LAD3 ESPI_IO3 8 @ RE193 1 20_0402_5% PCH_PLTRST#_EC 1 2
    8 9
    7 LPC_FRAME# ESPI_CS# 9 10 0.1U_0402_25V6K
    10 ESPI_CLK_5105 <8,58>

    5
    8 PCH_PLTRST# NA 11 1

    P
    GND1 12 B 4
    9 GND GND GND2 2 O
    A

    G
    JXT_FP225H-010G1AM UE8
    10 LPC_CLK ESPI_CLK @CONN@ TC7SH08FU_SSOP5~D

    3
    +3VALW
    +3VALW
    +3VALW +3VALW

    1
    X01@

    1
    130K_0402_1% RE195

    2
    RE194 4.3K_0402_5%

    2
    ES1@

    2
    100K_0402_5% RE196 BOARD_ID
    <58>

    2
    RE249 240K_0402_5% BOARD_ID PANEL_ID
    <58> PANEL_ID

    1
    XPS@

    1
    CE75

    1
    PRODUCT_ID_EC CE76
    <58> 4700P_0402_25V7K

    2
    PRODUCT_ID_EC
    4700P_0402_25V7K

    2
    TYPE_ID
    <58> TYPE_ID

    2
    C C

    100K_0402_5%
    RE195 CE76 PANEL SIZE

    1
    RE250
    L@ CE78 RE194 CE75 REV 240K 4700p

    1
    4700P_0402_25V7K

    2
    240K 4700p X00 130K 4700p
    130K 4700p X01 33K 4700p
    62K 4700p X02 * 4.3K 4700p Italia 13 WHL
    RE249 RE250 REV RE196 CE78 REV 33K 4700p X03
    @ Italia XPS 240K 4700p 8.2K 4700p X04
    ES1 *
    @ Italia-L 130K 4700p 4.3K 4700p A00
    ES2 *
    * 62K 4700p QS 2K 4700p PANEL_ID rise time is measured from 5%~68%.
    * 33K 4700p U22 1K 4700p
    <58> PCH_DPWROK_EC
    PCH_DPWROK_EC RE248 1 @ 2 PCH_DPWROK_R
    PCH_DPWROK_R <11> * 8.2K 4700p V-PRO
    0_0402_1%
    4.3K 4700p BOARD_ID rise time is measured from 5%~68%.
    2K 4700p
    1K 4700p
    RE194 X03@ RE194 X04@ RE194 A00@
    VSET_5105
    VSET_5105 <58>

    0.1U_0402_25V6
    RE196 QS@ RE196 U22@ RE196 VPRO@

    1
    1.58K_0402_1%
    1

    CE79

    RE199
    SD028330280 SD028820180 SD028430180
    33K +-5% 0402 8.2K_0402_5% 4.3K_0402_5%

    2
    SD028620280 SD028330280 SD028820180
    62K_0402_5% 33K +-5% 0402 8.2K_0402_5%

    +3VALW
    Rest=1.58K , Tp=96 degree
    1

    1
    RE451

    RE452

    RE449

    RE450
    10K_0201_1%

    10K_0201_1%

    10K_0201_1%

    10K_0201_1%

    RE200
    0_0402_1% @

    1
    10K_0402_5%

    10K_0402_5%

    10K_0402_5%

    100K_0402_5%
    B B

    @ RE204
    2

    RE201

    RE202

    RE203
    JDEG1 DP1/DN1 for CPU
    1 +EC_DEBUG_VCC
    1 2 JTAG_TDI Place CE83 close to the QE12 as possible
    JTAG_TDI <58> Thermal diode mapping

    2
    2 3 JTAG_TMS
    3 JTAG_CLK JTAG_TMS <58> REM_DIODE1_P <58>
    4

    LMBT3904WT1G SC70-3
    4 JTAG_TDO JTAG_CLK <58>
    5
    5
    JTAG_TDO <58> RE205 5105 Channel Location

    3
    100P_0402_50V8J

    100P_0402_50V8J
    QE20
    6
    E
    MSCLK 10K_0402_5%
    6

    1
    @ CE93
    7 1 2 2
    B
    MSDATA C
    7 HOST_DEBUG_TX

    @ CE83
    8
    8
    9 DEBUG_TX DP1/DN1 OTP (QE12) C B
    2

    1
    9 10 E QE12

    3
    10
    11
    <6> SBIOS_TX
    1
    @ RE206
    2 SEN4 DN1a/DP1a Charger (QE20) LMBT3904WT1G SC70-3
    GND1 REM_DIODE1_N <58>
    12 0_0402_5%
    GND2
    JXT_FP225H-010G1AM
    HOST_DEBUG_TX <58> SEN1 DP2/DN2 DDR (QE14) DN1a/DP1a for VR
    MSDATA <58> Place QE20 close to chock & CE93 close to the QE20
    CONN@ MSCLK <58>
    1 @ 2
    SEN5 DN2a/DP2a SKIN (QE21)
    RE209
    0_0402_1% SEN6 DP3/DN3 SKIN (QE22) DP2/DN2 for DDR on QE14, place QE14 close
    to DDR and CE87 close to QE14
    SEN2 DN3a/DP3a SSD (QE15) REM_DIODE2_P <58>

    LMBT3904WT1G SC70-3
    3

    1
    100P_0402_50V8J

    100P_0402_50V8J
    SEN3

    QE21
    E C
    DP4/DN4 WLAN (QE19)

    1
    @ CE94

    @ CE87
    2 2
    B
    B
    DN4a/DP4a
    C E QE14

    3
    LMBT3904WT1G SC70-3

    REM_DIODE2_N <58>

    DN2a/DP2a for SKIN.


    Place CE94 close to QE21

    DP4/DN4 for WLAN on QE19, place QE19 close to DP3/DN3 for SSD
    WLAN & QE19 close to CE89. Place CE91 close to the QE15 as possible

    LMBT3904WT1G SC70-3
    RE215 8.2K_0402_5%
    0.1U_0402_25V6

    1 2 <58>
    +1.0VS_VCCIO +3VALW THERMATRIP2# REM_DIODE4_P <58> REM_DIODE3_P <58>

    SIO_SLP_S3# <11,41,58,59,65>
    1

    1
    LMBT3904WT1G SC70-3

    CE86

    100P_0402_50V8J

    100P_0402_50V8J

    100P_0402_50V8J
    E C
    @ QE13
    2

    1
    @ CE91

    @ CE95
    2 2
    B
    C
    G

    2
    @CE89
    C 2 B
    2

    QE15
    QE16

    1 3 1 2 2 B C E QE22

    3
    A RE219 2.2K_0402_5% B E QE19 LMBT3904WT1G SC70-3 A
    D

    3
    +1.0V_VCCST E LMBT3904WT1G SC70-3
    3

    L2N7002WT1G_SC-70-3 <58> <58>


    REM_DIODE4_N REM_DIODE3_N

    1 @ 2
    <14> H_THERMTRIP# DN3a/DP3a for TBD.
    Place CE95 close to QE22
    RE222
    0_0402_1%

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P59-MEC5105 Support
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 59 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P060 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    0.1(X00)
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 60 of 100
    5 4 3 2 1
    A B C D E F G H

    2.2K +3VS
    2.2K
    CK14 53
    MEM_SMBCLK DDR_XDP_SMBCLK
    CH15 51 XDP
    MEM_SMBDATA DDR_XDP_SMBDAT

    1 K
    WHL-U 1 K
    +3VS
    1 CK22 ISH_I2C0_SDA 1
    JP4 *1 ALS address selection 0x52_TBD
    CH20 ISH_I2C0_SCL ALS
    JP4 *2
    Sensor address selection 0x6C_TBD

    CM15 CN15
    1K
    SML1_SMBDATA

    SML1_SMBCLK
    +3V_PCH
    1K

    E11 D8

    SMB03
    2.2K

    2.2K
    +3.3V_EC5105

    D7 UPD2_SMBCLK B5
    SMB00 TI PD2 TI PD address selection 0x70_TBD
    E7 UPD2_SMBDAT A1

    L2
    2.2K PD2_Debug PD_Debug address selection 0xEC_TBD
    +3.3V_EC5105 K2
    2
    2.2K 2
    B3
    B3 IR_THER_SEN_SMBCLK
    SMB01 C3 IR_THER_S
    E5 IR_THER_SEN_SMBDAT
    4.7K

    WHL 4.7K +3VS_TP


    8
    C12 CLK_TP_SIO
    SMB02 9 TP TP address :0x42_TBD
    E10 DAT_TP_SIO

    2.2K
    L2
    PD1_Debug PD_Debug address selection 0xEC_TBD
    +3.3V_EC5105 K2
    2.2K

    C3 UPD1_SMBCLK B5
    SMB04 TI PD1 TI PD address selection 0x70_TBD
    B4 UPD1_SMBDAT A1
    2.2K

    MEC 5105
    2.2K +DVDD
    3 3
    F7 0 ohm
    EC_I2C_CLK 7
    SMB05 0 ohm AMP I2C address selection L= 0x20H (L= 0x20H ; H= 0x22H)_TBD
    B6 EC_I2C_DAT 8

    6
    Audio
    7
    2.2K
    +3VS_PWRM
    2.2K
    0 ohm
    A12 IMVP_SMBCLK_R C4
    SMB06 0 ohm MAX34407
    N10 IMVP_SMBDAT_R D4
    0 ohm
    IMVP_SMBCLK C4
    2.2K 0 ohm PWR
    +3.3V_EC5105 IMVP_SMBDAT D4 MP2949A
    2.2K
    M4 UPD3_SMBCLK B5
    SMB07 TI PD3
    M7 UPD3_SMBDAT A5

    2.2K

    2.2K +3.3V_EC5105
    100 ohm
    4 N2 PBAT_CHARGER_SMBCLK 8 4
    SMB10 100 ohm BATTERY
    M3 PBAT_CHARGER_SMBDAT 7
    CONN Battery address selection 0x16_TBD

    22
    Charger Charger address selection 0x12_TBD
    21
    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2013/07/04 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P061-SMBus block diagram
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 61 of 100
    A B C D E F G H
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P062 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 62 of 100
    5 4 3 2 1
    A B C D E F G H

    Power Button +LED

    1 1

    +5VALW

    1
    R288
    300_0402_5%

    2
    EC GPIO set to OD output

    LED6
    BREATH_LED# RE275 1 @ 2 0_0402_1% 1 2
    <58> BREATH_LED#
    PWR_LED# HT-F196BP5_WHITE

    PBTN_SW# SW3
    <59> 3 4
    PBTN_SW#
    +5VALW

    1 2
    SKRBAAE010_4P

    2
    Battery Gauge LED
    +3VALW

    LED5

    LED4

    LED3

    LED2

    LED1
    2 2

    27-11-T1D-CP1Q1RY-3C_WHITE~D

    27-11-T1D-CP1Q1RY-3C_WHITE~D

    27-11-T1D-CP1Q1RY-3C_WHITE~D

    27-11-T1D-CP1Q1RY-3C_WHITE~D

    27-11-T1D-CP1Q1RY-3C_WHITE~D
    1

    1
    5
    QH1A

    G
    BATT_LED#_LV5 4 3 R67 1 2 820_0402_5%~D BAT_LED#_LV5
    <58> BATT_LED#_LV5

    D
    DMN66D0LDW-7_SOT363-6

    2
    BATT_LED#_LV4
    <58> BATT_LED#_LV4
    QH1B

    G
    1 6 R68 1 2 820_0402_5%~D BAT_LED#_LV4
    BATT_LED#_LV3

    D
    <58> BATT_LED#_LV3 DMN66D0LDW-7_SOT363-6

    5
    BATT_LED#_LV2 QH2A

    G
    <58> BATT_LED#_LV2
    4 3 R69 1 2 820_0402_5%~D BAT_LED#_LV3

    D
    DMN66D0LDW-7_SOT363-6
    BATT_LED#_LV1
    <58> BATT_LED#_LV1
    2

    QH2B
    G

    1 6 R70 1 2 820_0402_5%~D BAT_LED#_LV2


    S

    DMN66D0LDW-7_SOT363-6
    2
    G

    3 1 R71 1 2 820_0402_5%~D BAT_LED#_LV1


    S

    +3VALW Q4
    L2N7002WT1G_SC-70-3

    2 1 BATT_LED#_LV5
    100K_0402_5% RE284
    3

    100K_0402_5%
    2

    2
    1

    1
    RE285
    BATT_LED#_LV4

    BATT_LED#_LV3
    NB LID SW 3

    100K_0402_5% RE283
    2 1 BATT_LED#_LV2
    100K_0402_5% RE286
    2 1 BATT_LED#_LV1 +3VALW
    100K_0402_5% RE287

    1
    +3VALW
    R274

    47K_0201_5%

    2
    NB_LID# <58>
    1
    C1077
    0.1U_0201_10V6K

    3
    2

    VCC

    VOUT
    Battery Gauge Button

    GND
    TCS40DLR_SOT23F3
    U26
    SW2

    1
    <58> BATBTN# 2 4
    1
    BATBTN#
    C71
    0.1U_0402_10V7K
    2 1 3
    TBFD12KQR

    4 4

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P63-Battery LED / LID
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 63 of 100
    A B C D E F G H
    A B C D E

    Keyboard Controller board + DMIC


    Power Monitor

    1 1

    JKB1
    1
    +5VALW 1
    2
    +3VALW
    +3VS
    3 2 Place close to JKB1
    4 3
    <12> KB_DET# 4 +3VALW +5VALW +3VS
    <58> 5
    BC_INT#_ECE1117 5
    <58> BC_DAT_ECE1117 6
    7 6
    <58> BC_CLK_ECE1117 7
    8
    White <58> BAT2_LED#
    9 8
    Amber <58> BAT1_LED# DMIC_DAT12_CODEC 10 9 1 1 1
    <55> DMIC_DAT12_CODEC DMIC_CLK_CODEC 10 C375 C376 C377
    11
    <55> DMIC_CLK_CODEC DMIC_DAT34_CODEC 11
    <55> 12 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
    DMIC_DAT34_CODEC 13 12 2 2 2
    14 13
    15 14
    15 16
    GND 17
    GND
    E-T_6710K-Y15M-31L
    CONN@

    Use SP010027G00

    2 2

    SCREW Hole
    RTC Battery With Charge Function
    +3VLP @ S3
    FD1 FD2 FD3 FD4 H22 H26
    +RTCVCC_EC @ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL
    RTCD1
    1 2 H_1P8N H_1P8X2P3N
    W=20mils @ @
    For PCB

    1
    W=20mils RB751V40_SC76-2 Locating holes

    1
    3
    +RTCVCC +RTCBATT shielding 3
    1

    JRTC1
    1 RTCR2 @ S1
    1 H13 H14 H18 H19 H20
    2
    2 200_0402_0.5%
    +RTCBATT
    1

    CLRP1 H_2P0 H_2P0N H_2P0N H_1P8 H_1P8


    2

    @ @ @ @ @
    @ 3 Screw For AR

    1
    SHORT PADS 4 G1 RTCR1
    2

    G2 1 2 W=20mils shielding
    ACES_50278-00201-001
    CONN@ 1 1K_0402_1%
    CH3 @ S2
    H11 H12 H21 H10
    1U_0201_6.3V6M
    2 H_2P0 H_2P0 H_2P0 H_2P6
    @ @ @ @
    Bracket Standoff For PCB

    1
    for WLAN shielding

    +RTCVCC +RTCVCC_EC
    @ R2751 H16 H17 H23 H1 H2
    W=20mils 0_0402_5% W=20mils H25
    1 2 H_2P0 H_2P0 H_2P0 H_3P3 H_3P3
    @ @ @ @ @ H_1P2X1P7N
    Bracket Standoff
    1

    1
    @

    1
    Q349 for eDP
    DMG2301U-7_SOT23-3

    1 3
    D

    H3 H4 H5 H6 H7 H24
    1U_0201_6.3V6M

    1
    1
    C1040

    H_3P3 H_3P3 H_3P3 H_3P3 H_3P3 CLIP_C6-PM


    G
    2

    R5840 D116 @ @ @ @ @ @
    Standoff for Standoff
    1

    1
    10K_0402_5% RB751S40T1G_SOD523-2
    2 2 1 CPU Cooller for SSD
    2

    4 4

    H8 H9

    H_2P6 H_2P6
    1

    D R5841 @ @
    Standoff
    1

    Q348 2 RTCRST_ON_R 1 2 R5839 1 @ 2 0_0201_5%


    RTCRST_ON <58>
    L2N7002WT1G_SC-70-3 G for FAN
    S
    DELL CONFIDENTIAL/PROPRIETARY
    3

    1M_0402_5%~D
    100K_0201_1%

    0.1U_0402_25V6K~D
    22P_0402_50V8J
    1

    R2745

    1 Security Classification Compal Secret Data Compal Electronics, Inc.


    C1131
    C1132

    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title


    2

    P64-SCREWH/KB/RTC/IR_T/PWRM
    2

    @ 2

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 64 of 100
    A B C D E
    5 4 3 2 1

    +3VALW

    +3VALW

    5
    SIO_SLP_S3# 1

    P
    B 4 RUN_ON_P
    O RUN_ON_P <77,78,85,87>

    5
    U16 @ <58,59,65>
    2
    RUN_ON_EC A

    G
    1 UC5

    G VCC
    <11,41,58,59> SIO_SLP_S3# B

    1
    4 <11,14,58,59>
    H_VCCST_PWRGD_P

    3
    2 Y TC7SH08FU_SSOP5~D RE5
    <58> H_VCCST_PWRGD A
    100K_0402_5%

    3
    MC74VHC1G09DFT2G_SC70-5

    2
    D
    2 1 D
    @ RE6 0_0402_5%~D

    @ RE461 2 1 0_0402_5%~D
    2 1
    @ RE4 0_0402_5%~D
    +3VALW
    VCCIO EN FORM S0# SIO_SLP_S0# @ RE464 2 1
    0_0402_5%~D

    5
    SIO_SLP_S3# RE463 1 @ 2 1 RE465
    VCCIO EN FORM S3#

    P
    +3VALW 0_0402_1% B 4 1 2
    O EN_VCCIO <89>
    2
    <58,59,65> RUN_ON_EC A

    G
    UC11 10K_0402_1% Close to PU1400

    680P_0402_50V7K~D
    @ C1612
    1

    3
    TC7SH08FU_SSOP5~D tCPU27 >240ns

    5
    <11,58,77,86,88,89> 1

    P
    SIO_SLP_SUS# B 2
    4 VCCST_EN <78>
    2 O 2 1
    A

    G
    UC6 @ RE459 0_0402_5%~D

    1
    3
    TC7SH08FU_SSOP5~D RE7
    100K_0402_5%
    +3VALW
    @

    2
    CZ13
    +3VALW 1 2

    5
    0.1U_0201_10V6K
    1

    P
    <10> PRIM_CORE_OPT_DIS INB
    5

    4 VR_LPM_R_N
    O VR_LPM_R_N <89>
    1 SIO_SLP_S0# 2
    <11,66,78,89,90>
    P

    <11,58> SIO_SLP_S4# B SIO_SLP_S0# INA @

    G
    4 SUS_ON_P <85,86,87> UZ9
    2 O
    <58> MC74VHC1G32DFT2G_SC70-5~D

    3
    SUS_ON_EC A
    G

    UC7
    1

    C C
    3

    TC7SH08FU_SSOP5~D RE8
    100K_0402_5%
    RE296 1 @ 2 0_0402_1%
    2

    2 1
    @ RE11 0_0402_5%~D

    Fingerprint CONN Touchpad CONN


    +3VS_TP

    +1.8VA Discharge
    R113 1 2 4.7K_0402_5%

    RH79 1 @ 2 0_0402_1% I2C1_SDA


    <9> I2C1_SDA_TP

    R114 1 2 4.7K_0402_5%

    RH80 1 @ 2 0_0402_1% I2C1_SCK


    <9> I2C1_SCK_TP

    +3VS_TP
    JFP2
    RE274 1 @ 2 0_0402_1% FPR_GPIO_DET# 1
    <58> FPR_DET# 1 +3VS_TP
    1U_0201_6.3V6M

    1 2 0_0402_1% 2
    C122

    RE273 @ EMC@
    15P_0402_50V8J

    B <58> FPR_SCAN# 2 1 1 B
    +3VS_TP +1.8VA
    C121

    3
    RE255 1 @ 2 FGND 4 3
    +3VS_FP USB20_P10_R 0_0402_1% 5 4
    5

    1
    USB20_N10_R 6 2 2
    7 6 R117 JTP1
    7

    1
    8 100K_0402_5%~D 1
    8 I2C1_SDA 2 1 R115
    9 I2C1_SCK 3 2 B+ 80.6_0402_1%~D
    2
    FPR_GPIO_DET# 10 GND 4 3
    GND 5 4
    <14,58> TP_INTR#

    2
    5

    1
    ACES_50521-00841-P01 PTP_DIS# 6
    <58> PTP_DIS# 6
    3

    EMC@ DAT_TP_SIO 7 R116


    CONN@ <58> DAT_TP_SIO 7
    MD3 CLK_TP_SIO 8 200K_0402_1%
    <58> CLK_TP_SIO 8

    3
    DMN66D0LDW-7_SOT363-6
    PESD5V0U2BT_SOT23-3
    9

    2
    GND1

    QE2B
    10
    +3VS GND2 5
    1

    2
    R281 +3VS_FP EMC@ EMC@ ACES_50506-00841-P01
    MD1 MD2 CONN@

    4
    6
    2.2U_0402_6.3V6M

    DMN66D0LDW-7_SOT363-6
    2 1 PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
    0.1U_0201_10V6K

    1
    C1079

    QE2A
    0438.500WR 0.5A 32V UL/CSA 1
    C1080

    SIO_SLP_SUS# 2
    1

    1
    2

    EXC24CH900U_4P I2C1_SDA DAT_TP_SIO


    4 3 USB20_N10_R
    <10> USB20_N10 I2C1_SCK CLK_TP_SIO
    @

    @
    680P_0402_50V7K~D

    680P_0402_50V7K~D

    680P_0402_50V7K~D

    EMC@

    680P_0402_50V7K~D

    EMC@
    1 2 USB20_P10_R
    <10> USB20_P10 1 1 1 1
    C1609

    C1610

    C123

    C124
    A A
    ML1 EMC@
    TVNST52302AB0_SOT523-3

    D20
    3

    2 2 2 2

    EMC@
    DELL CONFIDENTIAL/PROPRIETARY
    1

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P65-TP/FP/PWERGD
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
    1.0
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 65 of 100
    5 4 3 2 1
    5 4 3 2 1

    NOTE:
    Follow the SPI topology layout guidelines
    in the relevant Intel Platform Design Guide TPM NOTE:
    Place 0.1 uF capacitors as close as
    possible to the device power pins

    +3VS_TPM +TPM_VSB
    D For NPCT650x: connect to +3V_PCH D

    +3VS +3V_PCH +3VS_TPM


    650@ R19
    1 2 0_0603_5% C27 C28 C29 C30

    0.1U_0201_10V6K
    1 1 1 1 C1081 1 1 C1082

    0.1U_0201_10V6K

    0.1U_0201_10V6K

    0.1U_0201_10V6K
    750@ R5838
    1 2 0_0603_5%

    10U_0402_6.3V6M
    For NPCT750x: connect to S0 power well (+3VS) 2 2 2 2 2 2 4.7U_0402_6.3V6M

    +3V_PCH

    RH75 1 2 10K_0201_5% TPM_PIRQ#


    +TPM_VSB +3VALW
    C C
    U7 RC382
    750@ 1 2 @ 1
    RE2 1 2 0_0402_5% 29 VSB
    <11,65,78,89,90> SIO_SLP_S0# GPIO0/SDA/XOR_OUT
    30 8 +TPM_LPM 0_0603_5%
    1 2 3 GPIO1/SCL VDD 14
    GPIO2/GPX VDD +3VS_TPM
    RE104 0_0402_5%~D 6 22
    GPIO3/BADD VDD @
    650@
    24 2 +TPM_LPM 2 1
    <8> PCH_SPI_SO_TPM LAD0/MISO NC +3VS_TPM
    <8> 21 7 0_0402_5% RC178
    PCH_SPI_SI_TPM LAD1/MOSI NC
    TPM_PIRQ# 18 10
    <8> TPM_PIRQ# 15 LAD2/SPI_IRQ# NC 11 0_0402_1%2 @ 1 RC179 +3VS
    LAD3 NC 25
    PCH_SPI_CLK_TPM RE263 1 @ 2 0_0402_1% PCH_SPI_CLK_TPM_R 19 NC 26
    <8> PCH_SPI_CLK_TPM LCKL/SCLK NC
    <8> PCH_SPI_CS2# RE262 1 @ 2 0_0402_1% PCH_SPI_CS2#_R 20 31
    PCH_SPI_CS2# LFRAME#/SCS# NC
    <11,41,52,59,67,70> PCH_PLTRST#_EC 17
    R22 2 650@ 1 27 LRESET#/SPI_RST#/SRESET# 9
    10K_0201_5% 13 SERIRQ GND 16
    28 CLKRUN#/GPIO4/SINT# GND 23
    LPCPD# GND 32
    4 GND 33 +TPM_LPM
    +3VS_TPM 5 PP PGND 12 close to U7.8
    TEST Reserved C31 CA82

    4.7U_0402_6.3V6M
    1 1

    0.1U_0201_10V6K
    1

    B NPCT750JAAYX QFN ES B
    RE27
    @ 4.7K_0402_5%
    2 2
    1 2

    @
    RE29
    10K_0402_5%
    SA0000AQ220 :
    S IC NPCT750JAAYX QFN 32P TPM F/W is 7.2.0.1 - QS
    2

    @EMC@ C32
    2 1 PCH_SPI_CLK_TPM_R

    0.1U_0201_10V6K
    Reserve for EMI please close to U7
    A A
    1.Pin14&Pin22 (+3VS_TPM):
    For NPCT650x: connect to same power well with host SPI interface (it should be +3V_PCH)
    For NPCT750x: connect to S0 power well (+3VS)
    DELL CONFIDENTIAL/PROPRIETARY
    2.Pin27:
    For NPCT650x: pop R22
    Security Classification Compal Secret Data Compal Electronics, Inc.
    For NPCT750x: de-pop R22 Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    3.SLP_S0# connection:
    For NPCT650x: pop RE104, de-pop RE2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P66-TPM
    For NPCT750x: pop RE2, de-pop RE104 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    4.RC180 can be just deleted for both NPCT650x and NPCT750x DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    5.TPM_PIRQ# is recommended that pull-up to same GPIO power well at host side MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 66 of 100
    5 4 3 2 1

    WWW.AliSaler.Com
    5 4 3 2 1

    M.2 Slot-C Key-M (SSD)

    +3.3VDX_SSD
    D D

    JNGFF1 RF Reserved.
    1 2
    3 GND 3.3V 4 EMC@ EMC@
    GND 3.3V

    4.7U_0402_6.3V
    C41

    .1U_0402_16V7K~D
    C42

    0.01U_0402_16V7K~D
    C43

    47P_0402_50V8J~D
    C44

    15P_0402_50V8J
    C45
    <10> PCIE_PRX_SSDTX_N13 5 6 1 1 1 1 1
    7 PERn3 NC 8 1 @ 2
    <10> PCIE_PRX_SSDTX_P13 PERp3 NC SSD_SCP <58>
    9 10 0_0402_1%
    CD92 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_N13_C 11 GND DAS/DSS#/LED# 12 R5827
    <10> PCIE_PTX_SSDRX_N13 PETn3 3.3V 2 2 2 2 2
    CD93 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_P13_C 13 14
    <10> PCIE_PTX_SSDRX_P13 PETp3 3.3V
    15 16
    17 GND 3.3V 18
    <10> PCIE_PRX_SSDTX_N14
    19 PERn2 3.3V 20
    X04_06
    <10> PCIE_PRX_SSDTX_P14 PERp2 NC
    21 22
    CD94 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_N14_C 23 GND NC 24
    <10> PCIE_PTX_SSDRX_N14 PETn2 NC
    CD95 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_P14_C 25 26 Use SE00000SO00
    <10> PCIE_PTX_SSDRX_P14 PETp2 NC
    27 28
    29 GND NC 30
    PCIe SSD <10> PCIE_PRX_SSDTX_N15
    31 PERn1 NC 32
    <10> PCIE_PRX_SSDTX_P15 PERp1 NC
    33 34
    CD96 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_N15_C 35 GND NC 36 @ R29 2 1 10K_0402_5%~D
    <10> PCIE_PTX_SSDRX_N15 PETn1 NC +3.3VDX_SSD
    CD97 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_P15_C 37 38
    <10> PCIE_PTX_SSDRX_P15 PETp1 DEVSLP SSD_DEVSLP <10>
    39 40
    R30 1 @ 2 0_0402_1% SATA_CRX_C_DTX_P2 41 GND NC 42
    <10> SATA_CRX_DTX_P2 PERn0/SATA-B+ NC
    R31 1 @ 2 0_0402_1% SATA_CRX_C_DTX_N2 43 44
    <10> SATA_CRX_DTX_N2 PERp0/SATA-B- NC
    45 46
    SATA SSD CD98 1 2 0.22U_0402_10V6K SATA_CTX_C_DRX_N2 47 GND NC 48
    <10> SATA_CTX_DRX_N2 PETn0/SATA-A- NC
    CD99 1 2 0.22U_0402_10V6K SATA_CTX_C_DRX_P2 49 50
    <10> SATA_CTX_DRX_P2 PETp0/SATA-A+ PERST#/NC PCH_PLTRST#_EC <11,41,52,59,66,70>
    51 52 <11>
    GND CLKREQ#/NC SSD_PCIE_WAKE# CLKREQ_PCIE#3
    <11> 53 54 R32 1 2 10K_0402_5%~D
    CLK_PCIE_SSD# REFCLKn PEWAKE#/NC +3.3VDX_SSD
    <11> CLK_PCIE_SSD 55 56
    57 REFCLKp NC 58 @ R264 1 2 0_0402_5%~D
    GND NC PCIE_WAKE#_R <41,58,59>

    Solt M & Key M


    C
    Platform Pin-out C

    59 67 68 60 @ R33 1 2 0_0402_5%~D <11,52>


    61 NC SUSCLK SUSCLK
    R34 1 2 10K_0402_5%~D 69 70 62
    +3VS PEDET (NC-PCIe/GND-SATA) 3.3V +3.3VDX_SSD
    63 71 72 64
    65 73 GND 3.3V 74 66
    67 75 GND 3.3V
    GND
    69 77 76 68
    GND GND

    LOTES_APCI0146-P004A
    CONN@

    <10> R35 1 @ 2 0_0402_1%


    SSD_IFDET
    Use SP07001FKA0

    2
    SATA -> GND SATA -> GND LT12
    PCIe -> HI PCIe -> HI 0_0805_5%
    1

    only for EA keep NC or can remove

    FAN 1 FAN 2
    B B

    +3VS +5VS +3VS +5VS


    10U_0603_25V6M

    10U_0603_25V6M
    2 2
    10K_0402_5%~D

    10K_0402_5%~D
    2

    2
    C1124

    C1125
    0.1U_0402

    0.1U_0402
    10K_0402_5%~D

    10K_0402_5%~D

    10K_0402_5%~D

    10K_0402_5%~D
    2

    2
    R38

    C46

    R41

    C47
    R36

    R37

    R39

    R40
    1

    1
    1 @ 1 @
    JFAN1 JFAN2
    1

    1
    6 6
    1

    1
    LT6 5 G2 LT7 5 G2
    1 @ 2 4 G1 1 @ 2 4 G1
    0_0805_5% 3 4 0_0805_5% 3 4
    <58> FAN1_PWM D11 <58> FAN2_PWM D12
    2 1 2 3 2 1 2 3
    <58> FAN1_TACH 2 <58> FAN2_TACH 2
    1 1
    1

    1
    1 1
    RB751V40_SC76-2 RB751V40_SC76-2
    D79 ACES_50224-00401-001 D78 @ ACES_50224-00401-001
    BZT52C6V2LP CONN@ BZT52C6V2LP CONN@
    2

    2
    A A

    Note: Need Update CIS

    Note: Need Update CIS SC40000EX00, S ZEN DIO BZX884-C6V2 SOD882


    SC40000EV00, S ZEN DIO BZT52C6V2LP-7 X1-DFN1006-2 SC40000EV00, S ZEN DIO BZT52C6V2LP-7 X1-DFN1006-2
    SC40000EX00, S ZEN DIO BZX884-C6V2 SOD882
    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P67-SSD(M.2) / FAN
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 67 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P68-Reserved
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 68 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P69-Reserved
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 69 of 100
    5 4 3 2 1
    5 4 3 2 1

    Card Reader +3VS_CR


    +ODR_PW R

    SD_D2
    SD_D3
    1
    2
    JCR1
    DAT2
    SD_CMD 3 CD/DAT3 Close to JCR1
    +3VS +3VS_CR 4 CMD
    @ RT70 SD_CLK 5 VDD1 +ODR_PW R +SD_VDD2
    0_0603_5% C39 6 CLK
    1 C40 VSS

    1
    1 2 EMC@ EMC@ 1.DAT2 4.VDD1 SD_RCLK_P 7
    2.DAT3 15.VDD2 SD_RCLK_M 8 DAT0/RCLK+
    +SD_VDD2 DAT1/RCLK-

    100P_0201_50V8J

    22P_0402_50V8J
    3.CMD SD_CD# 9 CR1 CR2 1 CR3 1 CR4 1
    +3VS_CR

    2
    CD

    1
    2 5.CLK
    D 7.RCLK+ 15 D
    VDD2

    10U_0402_6.3V6M

    0.1U_0201_10V6K

    4.7U_0402_6.3V6M

    0.1U_0201_10V6K
    8.RCLK- 16

    2
    9.CD 17 SWIO 2 2 2
    16. NC SD_LN0_P 18 VSS
    6.VSS SD_LN0_M 19 D0+
    17.VSS 20 D0- 10
    +3VALW
    Max Current :2A 20.VSS SD_LN1_M 21 VSS GND 11
    RON : 70m ohm 23.VSS SD_LN1_P 22 D1- GND 12
    C362 VIH : 1.1V +3VS_CR 18.D0+ 10 23 D1+ GND 13
    2 1 U37 R195 19.D0- 11 VSS GND 14
    0_0603_5% 21.D1- 12 GND
    1U_0201_6.3V6M 6 1 +3VS_CR_R 1 @ 2 22.D1+ 13 T-SOL_158-1160902600
    +3VS IN OUT 14 CONN@

    10U_0402_6.3V6M
    1 2 5 2 1 1
    SET GND

    0.1U_0201_10V6K
    C250
    R5873 1 2 100K_0201_5% R313 20K_0402_5% Tom0114:wait CIS symbol

    C249
    R5874 1 @ 2 100K_0201_5% SD_PW R_EN_R 4 3 Use LTCX007ZY00
    EN(/EN) FLAG TAISOL 158-1160902600
    2 2 VDD1=ODR_PWR=3.3V
    G527ATP1U_TSOT23-6 VDD2=SD_VDD2=1.8V
    EMC@ changed footprint & CPN

    +3VS_CR +3VS_CR

    C CR5 1 CR6 1 CR7 CR8 1 C

    1
    0.1U_0201_10V6K

    4.7U_0402_6.3V6M

    10U_0402_6.3V6M

    0.1U_0201_10V6K
    2
    2 2 2

    Jony_1228: update UR1 footprint

    27
    11
    UR1
    +ODR_PW R

    3V3aux
    3V3_IN
    <11,41,52,59,66,67> PCH_PLTRST#_EC 1 12
    2 PERST# CARD_3V3 18 DV33_18 CR9 2 1 1U_0201_6.3V6M
    <11> CLKREQ_PCIE#5 CLK_REQ# DV33_18
    RR1 2 1 MEDIACARD_IRQ#
    +3VS_CR
    10K_0201_5% <11> CLK_PCIE_MMI 5
    6 REFCLKP 15 SD_RCLK_M
    <11> CLK_PCIE_MMI# REFCLKN SP1 16 SD_RCLK_P
    CR23 1 2 0.1U_0201_10V6K PCIE_PTX_CARDRX_P5_C 3 RTS5242 SP2 17 SD_CLK_L RR4 1 @ 2 0_0201_5% SD_CLK
    <10> PCIE_PTX_CARDRX_P5 HSIP SP3
    <10> CR22 1 2 0.1U_0201_10V6K PCIE_PTX_CARDRX_N5_C 4 19 SD_CMD
    PCIE_PTX_CARDRX_N5 HSIN SP4
    <10> CR10 1 2 0.1U_0201_10V6K PCIE_PRX_CARDTX_P5_C 7 20 SD_D3
    PCIE_PRX_CARDTX_P5 HSOP SP5
    <10> CR11 1 2 0.1U_0201_10V6K PCIE_PRX_CARDTX_N5_C 8 21 SD_D2
    PCIE_PRX_CARDTX_N5 HSON SP6 29 SP7_SDW P 1
    SP7 EMC@ CR17

    2.2P_0402_50V8C
    <8> MEDIACARD_IRQ# 32
    MEDIACARD_IRQ# WAKE#
    31
    SD_CD# 30 MS_INS# 2
    B
    Support Runtime D3 mode => DE-POP RR1 SD_CD# B
    No Support Runtime D3 mode => POP RR1 22 SD_LN1_P
    SD_LN1_P 23 SD_LN1_M
    CR18 1 2 DV12S 10 SD_LN1_M
    0.1U_0201_10V6K 14 AV12 26 SD_LN0_P
    DV12S SD_LN0_P 25 SD_LN0_M
    CR19 13 SD_LN0_M
    1 CR21 1 +SD_VDD2 SD_VDD2 24 SD_REG2 CR20 2 1 1U_0201_6.3V6M
    E-PAD

    RR8 1 2 RREF 9 SDREG2 28 RR9 2 1 10K_0201_5%


    RREF GPIO +3VS_CR
    0.1U_0201_10V6K

    4.7U_0402_6.3V6M

    6.2K_0402_1%
    2 2
    Close to UR1 RTS5242-GR_QFN32_4X4 If GPIO not use for LED function,
    33

    must be pull-high (Layout guide)

    QR1 +3VS_CR
    1)Placing the RTS5242 chip and flash card socket locate to suit trace routing for SI / EMI / ESD. For GPIO control SD_WP
    2)Keep bulk and de-coupling capacitors as close as possible to the RTS5242 chip and flash card socket. L2N7002W T1G_SC-70-3
    ■ Bulk capacitor for Card_3V3 place closed to flash card socket.

    1
    SP7_SDW P 1 3

    S
    ■ Bulk capacitor for 3V3_IN / 3V3aux / DV12S place closed to RTS5242 chip.
    RR10
    3)Keep damping resistor (ex, for SD CLK / MS CLK) as close as possible to the RTS5242 chip. @
    4)Keep these capacitors for SD card / MS card signals as close as possible to flash card socket. 10K_0201_5%

    G
    2
    <6> HOST_SD_W P#

    2
    SP7_SDW P
    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2041/09/08 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P70-Card Reader - RT5242
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 70 of 100
    5 4 3 2 1
    5 4 3 2 1

    +3.3V_RUN_UT9 +3.3V_CPS

    +1.2V_VDD_DM_D1
    +1.2V_RUN +1.2V_VDD_R1 +1.2V_RUN
    LV602 LV605
    1 2 1 2 1 2
    LT11 BLM18KG331SN1D_2P BLM18KG331SN1D_2P BLM18KG331SN1D_2P

    0.01UF_0402_25V7K

    0.01UF_0402_25V7K

    0.01UF_0402_25V7K
    4.7U_0402_6.3V6M

    0.1U_0201_10V6K
    +3.3V_RUN_UT9
    D D

    4.7U_0402_6.3V6M

    0.1U_0402_25V6

    4.7U_0402_6.3V6M

    0.1U_0402_25V6

    0.1U_0402_25V6

    0.1U_0402_25V6
    1

    CT118
    1 1 1 1 1 1 1 1 1

    CV44

    CV48

    CV618

    CV617

    CV614

    CV615

    CV616
    CT117

    1
    CV625

    CV628
    2
    2
    2 2 2 2 2 2 2 2 2 10K_0402_5%
    RT246

    2
    +3VS +3.3V_RUN_UT9 PS8802_RST#

    1
    CT122
    1 2
    @ RT397 0_0603_5% 1U_0201_6.3V6M
    +1.2V_RUN +3.3V_RUN_UT9 +3.3V_VDD_DCI 2
    +1.2V_VDD_A2 +1.2V_VDD_A1
    +3V_LDO +1.2V_RUN +1.2V_VDD_R2 +1.2V_RUN
    LV601 LV603 LV604
    1 2 1 2
    1 2
    BLM18KG331SN1D_2P BLM18KG331SN1D_2P 2 @ 1 RT303

    0.01UF_0402_25V7K
    BLM18KG331SN1D_2P

    0.01UF_0402_25V7K
    0.1U_0402_25V6

    4.7U_0402_6.3V6M

    0.1U_0402_25V6

    0.01UF_0402_25V7K
    0_0402_1%

    4.7U_0402_6.3V6M

    0.1U_0402_25V6
    4.7U_0402_6.3V6M
    RT398 1 @ 2 0_0603_5% 1 1 1 1
    1 1 1

    CV45

    CV46
    CV626
    1 CT119

    CV611

    CV612
    1 1

    CV610
    CV47

    CV627
    CV629
    1U_0201_6.3V6M
    2 2 2 2 2 2 2 +3.3V_RUN_UT9
    2 2 2
    MUX_USB_SEL 1 2
    RT308 4.7K_0402_5%
    PS8802_CSCL 1 2
    @ RT305 4.7K_0402_5%
    PS8802_CSDA 1 2
    @ RT304 4.7K_0402_5%
    CPU_DP2_AUXN_C_MUX 1 2
    RT131 100K_0402_5%
    C C

    +3.3V_RUN_UT9
    CPU_DP2_AUXP_C_MUX 1 2
    +1.2V_VDD_DM_D1 +3.3V_CPS +3.3V_VDD_DCI RT130 100K_0402_5%
    +1.2V_VDD_R1 PS8802_SBU1_R 1 2
    RT414 2M_0402_5%
    +1.2V_VDD_R2 PS8802_SBU2_R 1 2
    2

    2
    4.7K_0402_5%

    4.7K_0402_5%
    4.7K_0402_5%

    4.7K_0402_5%

    UT9 RT415 2M_0402_5%


    @ RT135

    @ RT137

    @ RT139

    @ RT141

    +1.2V_VDD_A1

    +1.2V_VDD_A2
    1

    1 27
    +1.2V_VDD_DM_D1 10 VDD_DM VDD33 52
    16 VDD_DM VDD33
    PS8802_ADDR VDD_DM
    38 49
    VDD_DM VDD_DCI
    PS8802_DPEQ 6 19 PS8802_ADDR
    7 VDD_R1 ADDR0 22 PS8802_DPEQ
    PS8802_CEQ VDD_R2 ADDR1
    13 43 PS8802_RST#
    PS8802_SSEQ 47 VDD_A1 RESET#
    VDD_A2
    30 33 PS8802_SBU1_R RT132 1 @ 2 0_0402_1%
    VDD_D1 SBU1 MUX_C_SBU1 <45,47>
    34 PS8802_SBU2_R RT133 1 @ 2 0_0402_1% <45,47>
    1

    SBU2 MUX_C_SBU2
    4.7K_0402_5%
    @ RT136

    4.7K_0402_5%
    @ RT138

    4.7K_0402_5%
    @ RT140

    4.7K_0402_5%
    @ RT142

    2 MUX_USB3_RX0_P <47>
    1 2 USB3_CRX_C_RD_DTX_P1 12 RX1p 3
    <10> USB3_CRX_DTX_P1 SSRXp RX1n MUX_USB3_RX0_N <47>
    CT136 1 2 0.22U_0402 USB3_CRX_C_RD_DTX_N1 11
    <10> USB3_CRX_DTX_N1 CT135 0.22U_0402 SSRXn 9 <47>
    2

    RX2p MUX_USB3_RX1_P
    1 2 USB3_CTX_C_RD_DRX_P1 15 8
    <10> USB3_CTX_DRX_P1 SSTXp RX2n MUX_USB3_RX1_N <47>
    CT133 1 2 0.22U_0402 USB3_CTX_C_RD_DRX_N1 14
    <10> USB3_CTX_DRX_N1 SSTXn MUX_USB3_TX0_P_C 0.1U_0201_10V6K 1
    CT134 0.22U_0402 41 2 C55
    TX1p MUX_USB3_TX0_N_C 0.1U_0201_10V6K 1 MUX_USB3_TX0_P <47>
    42 2 C57
    CPU_DP2_P0_C TX1n MUX_USB3_TX0_N <47>
    <41> TBT_DP_ML0_P
    1 2 17
    B CT124 1 2 0.22U_0402_10V6K CPU_DP2_N0_C 18 ML0p 45 MUX_USB3_TX1_P_C 0.1U_0201_10V6K 1 2 C62 B
    <41> TBT_DP_ML0_N ML0n TX2p MUX_USB3_TX1_P <47>
    CT126 0.22U_0402_10V6K 44 MUX_USB3_TX1_N_C 0.1U_0201_10V6K 1 2 C63
    1 2 CPU_DP2_P1_C TX2n MUX_USB3_TX1_N <47>
    <41> 20
    TBT_DP_ML1_P ML1p
    <41> CT123 1 2 0.22U_0402_10V6K CPU_DP2_N1_C 21
    TBT_DP_ML1_N ML1n
    CT130 0.22U_0402_10V6K 28 PS8802_CSCL_R RT435 1 @ 2 0_0402_1%
    CSCL PS8802_CSCL <45>
    1 2 CPU_DP2_P2_C 23 29 PS8802_CSDA_R RT434 1 @ 2 0_0402_1% PS8802_CSDA <45>
    <41> TBT_DP_ML2_P ML2p CSDA
    <41> TBT_DP_ML2_N CT132 1 2 0.22U_0402_10V6K CPU_DP2_N2_C 24
    CT131 0.22U_0402_10V6K ML2n 35 PD3_USBC_AMSEL
    CE_DP PD3_USBC_AMSEL <45>
    1 2 CPU_DP2_P3_C 25 36 MUX_USB_SEL
    <41> TBT_DP_ML3_P ML3p CE_USB MUX_USB_SEL <45>
    <41> TBT_DP_ML3_N CT128 1 2 0.22U_0402_10V6K CPU_DP2_N3_C 26 37 MUX_FLIP_SEL
    MUX_FLIP_SEL <45>
    CT125 0.22U_0402_10V6K ML3n FLIP
    1 2 CPU_DP2_AUXP_C_MUX 31 40 PS8802_HPD 2 @ 1 RT380
    <41,45> TBT_DP_AUX_P AUXp IN_HPD TBT_DP_HPD <41,45>
    <41,45> CT127 1 2 0.1U_0402_25V6 CPU_DP2_AUXN_C_MUX 32 0_0402_1%
    TBT_DP_AUX_N AUXn PS8802_REXT
    CT129 0.1U_0402_25V6 39
    REXT 4
    @ DCI_CLK_R RSV1
    <10> CROSSBAR_DCI_CLK RT437 1 2 0_0402_5% 50 5

    4.99K_0402_1%
    DCI_CLK RSV2

    1
    <10> RT436 1 2 0_0402_5% DCI_DATA_R 51 46 PS8802_SSEQ
    CROSSBAR_DCI_DATA DCI_DATA RSV3 48 PS8802_CEQ

    RT300
    @ RSV4
    <9> RT438 1 @ 2 0_0402_1%
    BSSB_DCI_CLK
    <9> BSSB_DCI_DATA RT439 1 @ 2 0_0402_1%
    53

    2
    ePAD
    ADDR: I2C control bus address. Internally pull down at 150k, 3.3V I/O
    L: Slave address 0x10-0x2F(default)
    H: Slave address 0x30-0x4F PS8802QFN52GTRA0_QFN52_6P5X4P5

    DPEQ:DP Receiver equalization setting; Internally pull down at 150k, 3.3V I/O
    L: Compensation for channel loss up to 12dB(Default)
    H: Compensation for channel loss up to 18dB

    CEQ: USB Type-C connector facing Rx channel receiver equalization setting;


    Internally pull down at 150k, 3.3V I/O.
    L: Compensation for channel loss up to 16dB(Default)
    A
    H: Compensation for channel loss up to 18dB A

    SSEQ: USB Host facing Rx channel receiver equalization setting;


    Internally pull down at 150k, 3.3V I/O.
    L: Compensation for channel loss up to 12dB(Default)
    H: Compensation for channel loss up to 18dB

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data
    Title
    Compal Electronics, Inc.
    Issued Date 2016/01/01 Deciphered Date 2017/01/01
    P071-DP/USB3 Repeater SW2 PS8802
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    B 0.2
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 71 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P073 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 72 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P073 - Reserve
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 73 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P74-Reserved
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 74 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P75-Reserved
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 75 of 100
    5 4 3 2 1
    5 4 3 2 1

    D D

    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P76-Reserved
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 76 of 100
    5 4 3 2 1
    5 4 3 2 1

    Touch Pad Load Switch +3VALW +3VS_TP


    Css, Soft start setting Touch Screen Load Switch
    C1069
    1nF, rise time = 12uS
    60mil EMC@
    1 10nF, rise time = 100uS
    100nF, rise time = 1000uS

    1U_0603_25V6K
    1
    C1070 22P_0201_25V8J
    2 +3VALW +3VS_TS
    C1071 1 2 0.01UF_0402_25V7K
    60mil X04_10

    2
    +3VS_TP C76
    U10 R268 1U_0201_6.3V6M UZ1 +3VS_TS 1

    0.1U_0402_25V6
    9 1 @ 2 2 1 1
    1 VOUT R269 2 VIN1 R73 C74
    SS 1 VIN2
    8 1 2 0_0603_5%C1072 0_0603_5% 0.1U_0402_10V7K
    TP_PW_EN 2 DIS +5VALW 7 6 1 2 2
    <58> TP_PW_EN 240_0402_1% R5823
    EN 7 +3VALW 0_0402_1% VIN thermal VOUT

    2
    D PG 2 D

    0.1U_0201_10V6K
    3 1 @ 2 3
    R270 VIN1 6 VBIAS
    VBIAS +3VALW 1
    4 C1073 3.3V_TS_EN 4 5
    VIN2 +3VALW <9> 3.3V_TS_EN ON GND
    100K_0402_5%~D 5
    GND R271

    1
    AP22850SH8-7_W-DFN2020-8 1 @ 2 2 TPS22961DNYR_WSON8
    10K_0201_5%
    R76 2 1 100K_0402_5%~D 3.3V_TS_EN

    Deeper Sleep, SSD Load Switch 5V_Run, 5V_Audio Load Switch


    +3VALW +3V_PCH +3V_PCH C81 +5VALW R80 +5VS +5VS
    C80 R79 1U_0201_6.3V6M U12 0_0603_5%
    @ RZ1956 1 2 0_0402_5% 1U_0201_6.3V6M U11 0_0603_5% 1 2 1 14 1 @ 2
    2 1 1 14 1 @ 2 2 VIN1 VOUT1 13 C84
    1 1
    2 VIN1 VOUT1 13 C83 VIN1 VOUT1 2200P_0402_25V7K~D
    +3VALW VIN1 VOUT1 1000P_0402_50V7K~D C82 RUN_ON_P 3 12 1 2 C85
    <65,78,85,87> RUN_ON_P ON1 CT1
    PCH_PWR_EN 3 12 1 2 0.1U_0402_10V7K 0.1U_0402_10V7K
    ON1 CT1 2 4 11 2
    UZ6 +5VALW C86
    5

    SSD_PWR_EN 1 2 0_0402_5% 4 11 VBIAS GND 220P_0402_50V8K


    <12> SSD_PWR_EN VBIAS GND
    RUN_ON_P 1 @ R81 C87 2200P_0402_25V7K~D AUD_PWR_EN 5 10 1 2
    P

    INB 4 RUN_ON_P_R 1 @ 2 0_0402_1% 5 10 1 2 C89 ON2 CT2


    SSD_SCP_PWR_EN 2 O R82 ON2 CT2 +3.3VDX_SSD +3.3VDX_SSD 1U_0201_6.3V6M 6 9 R84 +5VS_AUDIO +5VS_AUDIO
    <58> SSD_SCP_PWR_EN
    G

    INA 6 9 1 2 7 VIN2 VOUT2 8 0_0603_5%


    MC74VHC1G32DFT2G_SC70-5~D 1 2 7 VIN2 VOUT2 8 R83 VIN2 VOUT2 1 @ 2
    3

    C88 1U_0201_6.3V6M VIN2 VOUT2 1 @ 2 15


    1 1
    15 +3VS GPAD
    GPAD 0_0603_5% C90 AOZ1331_DFN_14P C91
    R85 1 2 100K_0402_5%~D PCH_PWR_EN AOZ1331_DFN_14P 0.1U_0402_10V7K R86 2 1 100K_0402_5%~D AUD_PWR_EN 0.1U_0402_10V7K
    SSD_SCP_PWR_EN 1 2 100K_0402_5% R87 1 2 100K_0402_5%~D SSD_PWR_EN 2 @ R88 1 2 100K_0402_5%~D RUN_ON_P 2
    C RZ1958 @ R89 2 1 100K_0402_5%~D AUD_PWR_EN C
    @ R90 1 2 0_0402_5% PCH_PWR_EN
    <58> PCH_ALW_ON
    <11,58,65,86,88,89> R91 1 2 0_0402_5%
    SIO_SLP_SUS#

    WiFi, 3V_RUN Load Switch +3VALW 3V_Audio, 1.8V_Audio Load Switch


    +3VS_AUDIO
    +3VS_NGFF +3VS_NGFF +3VALW +3VS_AUDIO
    C92 R92 C93 R93
    1U_0201_6.3V6M U13 0_0603_5% 1U_0201_6.3V6M U14 0_0603_5% 1
    1 2 1 14 1 @ 2 1 1 2 1 14 1 @ 2
    2 VIN1 VOUT1 13 C94 2 VIN1 VOUT1 13 C97 C96
    VIN1 VOUT1 2200P_0402_25V7K~D C95 VIN1 VOUT1 1000P_0402_50V7K~D 0.1U_0402_10V7K
    @ AUX_EN_WOWL_R 3 12 1 2 0.1U_0402_10V7K AUD_PWR_EN 3 12 1 2 2
    ON1 CT1 2 <14> AUD_PWR_EN ON1 CT1
    R5870 1 2 0.01_0603_1%
    +3VALW +5VALW
    4 11 C98 4 11 C99
    R5871 1 @ 2 0_0603_5% VBIAS GND 4700P_0402_25V7K VBIAS GND 4700P_0402_25V7K
    +3VALW RUN_ON_P AUD_PWR_EN +1.8VS_AUDIO
    5 10 1 2 5 10 1 2
    ON2 CT2 +3VS ON2 CT2 +1.8VS_AUDIO
    2

    +3VS
    R5837 6 9 R94 C101 +1.8VA 6 9 R95
    1 2 7 VIN2 VOUT2 8 0_0603_5% 1U_0201_6.3V6M 7 VIN2 VOUT2 8 0_0603_5%
    10K_0402_5% VIN2 VOUT2 VIN2 VOUT2 1
    FROM EC GPIO035 C100 1 @ 2 1 1 2 1 @ 2
    @ 1U_0201_6.3V6M 15 15 C103
    1

    RE290 1 2 GPAD C102 GPAD


    <58> SLP_WLAN#_GATE 0.1U_0402_10V7K
    QE23 0_0402_5% AOZ1331_DFN_14P 0.1U_0402_10V7K AOZ1331_DFN_14P 2
    2
    2
    G

    FROM PCH GPD9/SLP_WLAN# D75


    SIO_SLP_WLAN# 1 3 2
    <11,58> SIO_SLP_WLAN#
    D

    1 AUX_EN_WOWL_R
    FROM EC GPIO210/ADC08 L2N7002WT1G_SC-70-3 +3VALW +LCDVDD +LCDVDD
    3 +3VALW
    X04_10
    <58> AUX_EN_WOWL LCD Load Switch
    2

    BAT54CW_SOT323-3 R96 1 R97


    1 2 UZ2 0_0603_5% 1
    100K_0402_5%~D
    RE291 0_0402_5% C105 5 1 1 2 C104
    B @ 1U_0201_6.3V6M D13 IN OUT B
    0.1U_0402_10V7K
    1

    2 2 2 2
    <58> LCD_VCC_TEST_EN GND
    1 ENVDD 4 3
    EN OC
    3 BAT54CW_SOT323-3 SY6288C20AAC_SOT23-5
    <6,58> ENVDD_PCH
    R99 1 2 100K_0402_5%~D ENVDD
    Camera

    @
    X04_10 TypeC-SW MUX Load Switch +1.2V_RUN
    +3VS
    1
    RE299
    2
    0_0402_5% +3VS_CAM
    TDC 0.4 A
    QZ1 +3VALW Peak Current=0.6 A
    DMG2301U-7_SOT23-3 U502
    R98 +3VS_CAM EM1109V-AD_DFN3308-8_3X3 R5842
    OCP=1.3A fix by IC
    0_0603_5% 9 0_0603_5%
    GND
    S

    3 1 1 2 1 1.2VSP 1 @ 2
    1 8
    IN
    OUT
    +1.2V_RUN
    1 2
    C106 @ C1607 7 NC
    G

    5.1K_0402_1%
    2

    NC

    1
    1U_0402_6.3V6K 4.7U_0402_6.3V6M 3 ADJ_1.2V

    1
    C107 2 6 ADJ/NC

    R2014
    1

    0.01UF_0402_25V7K
    2 NC 4 C1605

    C1606
    0.1U_0402_10V7K
    2 PCH_PRIM_EN 5 GND 22U_0603_6.3V6M

    2
    1 @ 2 3.3V_CAM_EN# EN
    3.3V_CAM_EN# <6>

    2
    PCH_PWR_EN R2012 1 2 EN_1.2RUN 2
    1 RE297 0_0402_1%
    +3VS
    @ @
    @
    1

    C1608 0_0402_1%

    1
    0.01U_0402_16V7K~D @ @

    1
    2 3.3V_CAM_EN# R100 1 2 100K_0402_5% R2013 @ C1604
    R2010 2 Vout = 0.8*(1+5.1K/10.2K)
    .1U_0402_16V7K R2011
    0_0402_5% 1M_0402_1%
    =1.2V
    2

    <58,59> 1 @ 2 10.2K_0402_1%
    RUN_ON
    A A

    2
    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P77-DC/DC Interface 1
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 77 of 100
    5 4 3 2 1
    A B C D E

    Keep both “R101 & R103” to A00 MB


    +1.0V_VCCST source don’t remove this 0ohm for bead
    (LC filter) opportunity.
    +1.0V_VCCST
    +1.0V_VCCSTG source
    +1.0VA
    +1.0VA

    0.1U_0402_10V7K
    1
    UZ3
    1

    @ CZ1
    UZ4
    1
    2 VIN1 1 1
    VIN2 1.05V@0.19A VIN1
    R101 2 2 R102 1.05V@0.02A
    VIN2
    1U_0201_6.3V6M

    1 7 6 1 2 +1.0V_VCCST 0_0603_5%
    VIN thermal VOUT +5VALW
    CZ2

    7 6 1 @ 2 +1.0V_VCCSTG
    3 0_0603_5% VIN thermal VOUT
    +5VALW VBIAS 3
    2 VBIAS

    1U_0201_6.3V6M
    4 5 1
    ON GND

    CZ3

    0.1U_0402_10V7K
    1 4 5
    ON GND +1.0V_VCCSTG

    CZ4
    TPS22961DNYR_WSON8
    RZ1960 1 @ 2 2 TPS22961DNYR_WSON8
    <65> VCCST_EN 2

    0.1U_0402_10V7K
    0_0402_5% BEAVER CREEK: 1
    <65,77,78,85,87> RUN_ON_P RZ1961 1 2
    BEAVER CREEK:
    4.4mohm/6A

    @ CZ5
    0_0402_5%
    TR=12.5us@Vin=1.05V 4.4mohm/6A
    TR=12.5us@Vin=1.05V 2

    PDG page 520 (rev:0.8)


    VCCSTG_EN RZ5 1 @ 2 0_0402_1%
    Premium design,VccST gated by SLP_S3#

    Keep both “R101 & R103” to A00 MB


    +VCCPLL_OC source don’t remove this 0ohm for bead
    (LC filter) opportunity.
    RZ4 1 2 0_0402_5%
    +3VALW

    <6,89> CPU_C10_GATE#

    5
    +VCCPLL_OC RZ1962
    RZ1959 1 @ 2 0_0402_5% 1

    P
    +1.2V_DDR <11,65,66,89,90> SIO_SLP_S0# B 4 1 @ VCCSTG_EN
    2 0_0402_1%
    RZ1963 1 @ 2 0_0402_1% 2 O

    0.1U_0402_10V7K
    2 1 <65,77,78,85,87> 2
    RUN_ON_P A

    G
    UZ5 UC4

    1U_0201_6.3V6M
    100K_0402_5%
    CZ6
    1 1 @

    3
    VIN1

    CZ14
    2 1.2V@0.12A TC7SH08FU
    VIN2 2

    0.1U_0201_10V6K

    RZ1
    R103 1
    1 7 6 1 2 +VCCPLL_OC
    VIN thermal VOUT 2

    CZ15
    CZ7 +5VALW 3 0_0603_5%

    2
    VBIAS 2
    2 1U_0201_6.3V6M 4 5
    ON GND

    TPS22961DNYR_WSON8

    VCCSTG_EN RZ2 1 @ 2
    0_0402_1%
    S0 S0Ix S3

    SIO_SLP_S0# high low low

    RUN_ON_EC high high low


    +1.8VU Load Switch
    3 3

    +1.0V_MPHYGT source
    +1.0V_MPHYGT

    +1.0VA +1.0V_MPHYGT
    R104

    0.1U_0402_10V7K
    1
    0_0603_5%
    1 2

    @ CZ8
    @
    2
    1
    CZ9
    1U_0201_6.3V6M
    2
    2 1 <11>
    MPHYP_PWR_EN
    @ RH77 100K_0402_5%~D

    4 4

    DELL CONFIDENTIAL/PROPRIETARY
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P78-DC/DC Interface 2
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    LA-E671P
    WWW.AliSaler.Com A B
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    C D
    Date: Monday, October 22, 2018
    E
    Sheet 78 of 100
    5 4 3 2 1

    D D

    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2018/01/23 Deciphered Date 2022/12/31 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    P79-Reserved
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 79 of 100
    5 4 3 2 1
    A B C D E

    4+2 CPU Option AR Option TPM Option


    UCPU1 ES1_4+2@ UCPU1 QS@ UCPU1 QS@ UCPU1 VPRO@ UCPU1 VPRO@ UT2 AR_SLL42@ U7 TPM750@

    SA0000BX10L SA0000C6R1L SA0000C6Q1L SA0000CF00L SA0000C161L SA00009ZV3L SA0000AQ220


    SA0000BX10L_ES1 I3-8145U_2.1G I5-8265U_1.6G I7-8565U_1.8G I5-8265U_1.6G
    DSL6340 SLL42 B2 TPM750 - QS F/W is 7.2.0.1
    UCPU1 ES2_4+2@ UCPU1 QS@ UCPU1 QS@ UCPU1 QS@
    1 1

    BBBBBB SA0000C6P2L SA0000C6Q3L SA0000C6Q3L


    ZZZZZZZZ I7-8565U_1.8G I5-8265U_1.6G I3-8145U_2.1G

    DRAM Option DRAM Config Option


    MEM_CONFIG0 MEM_CONFIG1 MEM_CONFIG2 MEM_CONFIG3 MEM_CONFIG4
    UD41 M4G_2133@ UD42 M4G_2133@ UD43 M4G_2133@ UD44 M4G_2133@ RH51 M4G_2133@ RH54 M4G_2133@ RH56 M4G_2133@ RH57 M4G_2133@ RH60 M4G_2133@

    Micron 4G/2133
    SA00009XU0L SA0000AZU0L SA0000AZU0L SA0000AZU0L SA0000AZU0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    MT52L256M32D1PF-093 WT:B MT52L256M32D1PF-093 WT:B MT52L256M32D1PF-093 WT:B MT52L256M32D1PF-093 WT:B 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

    UD41 M8G_2133@ UD42 M8G_2133@ UD43 M8G_2133@ UD44 M8G_2133@ RH52 M8G_2133@ RH53 M8G_2133@ RH56 M8G_2133@ RH57 M8G_2133@ RH60 M8G_2133@

    Micron 8G/2133
    SA00009U70L SA0000AM40L SA0000AM40L SA0000AM40L SA0000AM40L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    MT52L512M32D2PF-093 WT:B MT52L512M32D2PF-093 WT:B MT52L512M32D2PF-093 WT:B MT52L512M32D2PF-093 WT:B 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
    2 2

    UD41 M16G_2133@ UD42 M16G_2133@ UD43 M16G_2133@ UD44 M16G_2133@ RH52 M16G_2133@ RH54 M16G_2133@ RH55 M16G_2133@ RH58 M16G_2133@ RH59 M16G_2133@

    Mircon 16G/2133
    SA00009ZN0L
    SA00009ZN0L SA00009ZN0L SA00009ZN0L SA00009ZN0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    MT52L1G32D4PG-093WT:B MT52L1G32D4PG-093WT:B MT52L1G32D4PG-093WT:B MT52L1G32D4PG-093WT:B 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D

    UD41 S4G_2133@ UD42 S4G_2133@ UD43 S4G_2133@ UD44 S4G_2133@ RH51 S4G_2133@ RH53 S4G_2133@ RH55 S4G_2133@ RH57 S4G_2133@ RH60 S4G_2133@

    Samsung 4G/2133
    SA0000BTE0L
    SA0000BTE0L SA0000BTE0L SA0000BTE0L SA0000BTE0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    K4E8E324EB-EGCG K4E8E324EB-EGCG K4E8E324EB-EGCG K4E8E324EB-EGCG 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D

    UD41 S8G_2133@ UD42 S8G_2133@ UD43 S8G_2133@ UD44 S8G_2133@ RH52 S8G_2133@ RH54 S8G_2133@ RH56 S8G_2133@ RH58 S8G_2133@ RH59 S8G_2133@

    Samsung 8G/1866
    SA0000AZT1L
    SA0000AZT1L SA0000AZT1L SA0000AZT1L SA0000AZT1L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    K4E6E304EC-EGCG K4E6E304EC-EGCG K4E6E304EC-EGCG K4E6E304EC-EGCG 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D

    UD41 S16G_2133@ UD42 S16G_2133@ UD43 S16G_2133@ UD44 S16G_2133@ RH52 S16G_2133@ RH53 S16G_2133@ RH56 S16G_2133@ RH57 S16G_2133@ RH59 S16G_2133@

    3 Samsung 16G/2133 3

    SA00008VV2L
    SA00008VV2L SA00008VV2L SA00008VV2L SA00008VV2L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    K4EBE304EC-EGCG K4EBE304EC-EGCG K4EBE304EC-EGCG K4EBE304EC-EGCG 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D

    UD41 H4G_2133@ UD42 H4G_2133@ UD43 H4G_2133@ UD44 H4G_2133@ RH52 H4G_2133@ RH54 H4G_2133@ RH55 H4G_2133@ RH57 H4G_2133@ RH60 H4G_2133@

    Hynix 4G/2133
    SA0000AZR0L
    SA0000AZR0L SA0000AZR0L SA0000AZR0L SA0000AZR0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    H9CCNNN8GTALAR-NVD H9CCNNN8GTALAR-NVD H9CCNNN8GTALAR-NVD H9CCNNN8GTALAR-NVD 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D

    UD41 H8G_2133@ UD42 H8G_2133@ UD43 H8G_2133@ UD44 H8G_2133@ RH51 H8G_2133@ RH54 H8G_2133@ RH55 H8G_2133@ RH57 H8G_2133@ RH60 H8G_2133@

    Hynix 8G/2133
    SA0000ALP0L
    SA0000ALP0L SA0000ALP0L SA0000ALP0L SA0000ALP0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    H9CCNNNBJTALAR-NUD H9CCNNNBJTALAR-NUD H9CCNNNBJTALAR-NUD H9CCNNNBJTALAR-NUD 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D

    UD41 H16G_2133@ UD42 H16G_2133@ UD43 H16G_2133@ UD44 H16G_2133@ RH51 H16G_2133@ RH53 H16G_2133@ RH55 H16G_2133@ RH58 H16G_2133@ RH59 H16G_2133@

    Hynix 16G/2133
    SA00009ZL0L
    SA00009ZL0L SA00009ZL0L SA00009ZL0L SA00009ZL0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
    H9CCNNNCLGALAR-NVD H9CCNNNCLGALAR-NVD H9CCNNNCLGALAR-NVD H9CCNNNCLGALAR-NVD 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D 10K_0402_5%~D
    4 4

    LA-E671P
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/16 Deciphered Date 2016/12/13 Title
    P080-BoM Option

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E671P
    Date: Monday, October 22, 2018 Sheet 80 of 100
    A B C D E
    5 4 3 2 1

    +3VALW: TDC 5.5A


    B+ (PU500: SY8286BRAC)

    USB Type C x3
    D +5VALW: TDC 7.9A D

    (PU501: SY8288CRAC)

    +1.2V_DDR: TDC 4.1A


    (PU600: SY8210A)
    Power path

    +1.0V_A: TDC 2.6A


    (PU700: SY8286)
    CHARGER
    (PU300:ISL88738)
    2S Battery (buck- boost) +1.8VA:TDC 0.4A
    (PU800: TLV62150A)
    C C

    +1.8VU:TDC 0.46A
    (PU900: TLV62150A)
    Battery Low Detect

    +VCC_CORE:
    U42: TDC 48A/ U22: TDC 24A
    (PU1501: MP2949AGQKT-0025)

    +VCCGT:
    U42: TDC 18A
    (PU1501: MP2949AGQKT-0025)
    B B

    +VCCSA: TDC 4A
    (PU1501: MP2949AGQKT-0025)

    +1.0VS_VCCIO: TDC 2.6A


    (PU1400: NB692GD-Z)

    BOM Structure list +1.0V_PRIM_CORE: TDC 2.98A


    (PU1401: NB692GD-Z)
    EMC@ For EMC component need POP

    A
    @EMC@ For EMC component need NC A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/10 Deciphered Date 2015/12/10 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    POWER BLOCK DIAGRAM
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
    0.4
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 81 of 100
    5 4 3 2 1
    5 4 3 2 1

    Function feild
    Power Path(37.1), EMC Part(47.1)
    ：

    S1b S3b
    PD108 PD110

    Type C adapter input_1


    +VBUS1_PD_20V
    S1a
    2

    SE30AFB-M3-6A_SMA2
    1
    Type C adapter input_3
    +VBUS3_PD_20V
    S3a 2

    SE30AFB-M3-6A_SMA2
    1

    +VBUS1_20V
    PQ100 PQ101 +CHG_VIN_20V +VBUS3_20V
    PQ153 PQ155

    @ PT101 @ PT106 @ PT107 EMC@ PL100 1


    AON7405_DFN8-5 AON7405_DFN8-5
    1 @ PT103 @ PT108 @ PT109 EMC@ PL104 1
    AON7405_DFN8-5 AON7405_DFN8-5
    1
    +CHG_VIN_20V
    HCB2012KF-800T50_2P 2 2 HCB2012KF-800T50_2P 2 2
    1 2 3 5 PD1_LPS2 5 3 1 2 3 5 PD3_LPS2 5 3

    1
    300K_0402_1%

    1
    S TR AO7401 1P SC70-3

    S TR AO7401 1P SC70-3
    300K_0402_1%

    300K_0402_1%
    2200P_0402_50V7K

    2200P_0402_50V7K

    1000P_0402_50V7K

    2200P_0402_50V7K
    0.1U_0402_25V6

    100P_0402_50V8J

    100P_0402_50V8J

    0.1U_0402_25V6

    0.1U_0402_25V6

    100P_0402_50V8J

    100P_0402_50V8J

    0.1U_0402_25V6
    0.01U_0402_25V7K

    0.01U_0402_25V7K

    300K_0402_1%
    S TR AO7401 1P SC70-3
    PR213

    4
    1

    S TR AO7401 1P SC70-3
    EMC@ PC100

    EMC@ PC103

    PC101

    EMC@ PC102

    EMC@ PC108

    EMC@ PC104

    PC105

    PC106

    PC107

    PR101

    EMC@ PC294

    EMC@ PC289

    PC284

    EMC@ PC292

    EMC@ PC290

    EMC@ PC288

    PC283

    PC293

    PC285

    PR269

    PR268
    1M_0402_1%

    1M_0402_1%
    1U_0603_25V6K

    10U_0603_25V6M

    2200P_0402_50V7K

    1000P_0402_50V7K

    1U_0603_25V6K

    10U_0603_25V6M

    PR264
    D D
    1

    1
    PC133

    @ PR218

    PC295
    499K_0402_1%

    499K_0402_1%
    0.47U_0402_25V6K

    0.47U_0402_25V6K
    499K_0402_1%

    499K_0402_1%
    3

    1
    S

    680P_0402_50V7K

    680P_0402_50V7K
    2

    3
    G S S S
    2

    PQ133

    PC109

    @ PC111

    PR103

    PC286

    @PC291

    PR261
    2

    PD3_LPS1 2

    2
    PR100

    PR263
    EMC@

    EMC@

    EMC@

    EMC@

    EMC@

    EMC@

    EMC@

    EMC@

    @
    PQ104
    G G G
    2 2 2

    PQ158

    PQ150
    PD1_LPS1
    2

    2
    D

    2
    D D D

    1
    1

    1
    330K_0402_1%

    330K_0402_1%
    49.9K_0402_1%

    49.9K_0402_1%
    SB000006O00

    1
    PR214

    PR262
    Use SB000004A0L footpin

    330K_0402_1%

    330K_0402_1%
    PR109

    PR107

    PR274

    PR273
    49.9K_0402_1%

    49.9K_0402_1%
    2

    2
    1

    1
    +3V_LDO +3V_LDO

    2
    PR106

    PR260
    PR215 PR276

    SB00000PV00

    SB00000PV00
    Pilot-001 Pilot-001

    6
    200K_0402_1% D 200K_0402_1% D

    L2N7002WT1G_SC70-3
    1 2 2 1 2 2

    PQ134A

    PQ151A
    @ PR114

    L2N7002WT1G_SC70-3
    +3V_LDO +3V_LDO

    1
    G D 0_0402_5% G @ PR267

    200K_0402_1%
    2

    2
    1

    1
    2 1 2 VBUS1_ECOK D

    PQ108

    PR270
    @ PR259 0_0402_5%

    200K_0402_1%

    3
    2 1 2 VBUS3_ECOK

    PQ157
    D

    PR115
    G 0_0402_5%

    SB00000PV00
    S S

    1
    1 2 5

    PQ151B
    @ PR217 G
    SB00000PV00

    S <45>

    3
    EN_PD_HV3
    3

    DMN66D0LDW-7_SOT363-6

    DMN66D0LDW-7_SOT363-6
    0_0402_5% D G S

    6
    1 2 5
    PQ134B

    SB00000PV00

    SB00000PV00
    <43>

    2
    EN_PD_HV1

    6
    1 2 2

    PQ149A
    G D
    Pilot-001 S

    4
    2 1 2

    PQ109A
    G
    PR178 G 1 2
    Pilot-001 S 1M_0402_1%
    4

    PR277
    1M_0402_1% Pilot-001 S

    1
    1 2 PR266
    Pilot-001 S

    1
    1M_0402_1%

    DMN66D0LDW-7_SOT363-6
    PR228

    DMN66D0LDW-7_SOT363-6
    1M_0402_1% @ PR123 @ PR278

    3
    0_0402_5% D 0_0402_5% D

    SB00000PV00

    SB00000PV00
    AC1_DISC# 1 2 5 AC3_DISC# 1 2 5

    PQ109B

    PQ149B
    G G

    S S

    4
    PR176 PR272
    1M_0402_1% 1M_0402_1%
    Pilot-001 Pilot-001 1 2 1 2
    PQ199
    Pilot-001 Pilot-001
    @ PR108 L2N7002WT1G_SC70-3 @ PR122 PQ201

    1
    0_0402_5% 0_0402_5% D @ PR126 L2N7002WT1G_SC70-3 @ PR271

    1
    D
    S

    <58>
    1 2 3 1 1 2 2 PQ106 0_0402_5% 0_0402_5%
    DCIN1_EN

    D
    G L2N7002WT1G_SC70-3 <58>
    1 2 3 1 1 2 2 PQ156
    DCIN3_EN
    G L2N7002WT1G_SC70-3
    From EC S

    3
    1
    G

    From EC S
    1000P_0402_50V7K
    2

    3
    1

    1
    PR166

    @ PC136
    1M_0402_1%

    1000P_0402_50V7K
    1M_0402_1%
    2

    1
    @ PC287
    100K_0201_1%

    PR275
    1
    100K_0201_1%

    0.1U_0402_25V7K

    2
    1

    PR112

    100K_0201_1%

    100K_0201_1%
    0.1U_0402_25V7K
    2

    2
    1

    1
    PR110

    @ PC1557
    0_0402_5%

    2
    1

    1
    @ PR111

    PR140

    @ PC1559

    PR141
    0_0402_5%
    @ PR137
    2

    2
    2

    2
    2

    2
    2
    C +3VALW C
    +3V_LDO +3VALW
    Pilot-001
    Pilot-001 +3V_LDO

    Pilot-001
    S2b Pilot-001 1
    @ PR192
    0_0402_5%
    2 AC_DIS#
    +3VALW

    1
    @ PR138 +3VALW

    200K_0402_1%
    6
    PD109 0_0402_5% D

    SB00000PV00

    PR175
    S2a 2 1 1 2 2

    PQ122A
    Type C adapter input_2 <58> VBUS1_ECOK G Pilot-001

    1
    SE30AFB-M3-6A_SMA2 @ PR208

    200K_0402_1%

    2
    +VBUS2_PD_20V S 0_0402_5%

    PR174
    1
    PQ113 PQ114 +3VALW 1 2
    +VBUS2_20V Pilot-001 Pilot-001 AC_DISC_OUT# <83>
    @ PT102
    EMC@ PL101 1
    AON7405_DFN8-5 AON7405_DFN8-5
    1
    +CHG_VIN_20V +3VALW @ PR230 @ PR202

    SB00000PV00
    2
    1

    6
    HCB2012KF-800T50_2P 2 2 0_0402_5% 0_0402_5% D

    200K_0402_1%
    PD2_LPS2 5

    Pilot-001
    1 2 3 5 3 <58> AC_DISC# 1 2 AC_DIS# 1 2 2

    PQ129A
    PR142
    1

    1
    G

    0_0402_5%
    Pilot-001

    200K_0402_1%

    @ PR207
    PR124
    1

    1
    S TR AO7401 1P SC70-3
    @ PR209

    300K_0402_1%
    S
    0.1U_0402_25V6

    100P_0402_50V8J

    100P_0402_50V8J

    0.1U_0402_25V6

    300K_0402_1%

    1
    1

    S TR AO7401 1P SC70-3
    EMC@ PC120

    EMC@ PC122

    EMC@ PC116

    EMC@ PC114

    EMC@ PC117

    EMC@ PC119

    EMC@ PC118

    EMC@ PC121

    EMC@ PC115

    PR129

    @ PC140
    0_0402_5%
    2200P_0402_50V7K

    2200P_0402_50V7K

    1000P_0402_50V7K

    1U_0603_25V6K

    10U_0603_25V6M

    1000P_0402_50V7K
    0.01U_0402_25V7K

    PR220
    1M_0402_1%
    1

    1
    1 2
    PC134

    499K_0402_1%

    Pilot-001
    @PR219

    0.47U_0402_25V6K

    CHG_PROCHOT# <83>
    499K_0402_1%

    2
    1

    3
    D

    SB00000PV00
    680P_0402_50V7K
    3

    3
    S S
    5

    PQ127B
    PC123

    @PC124

    PR130

    @ PR206
    2

    PD2_LPS1 2

    2
    PR128

    3
    G G
    2 2
    PQ135

    PQ115

    @ PR201 G D 0_0402_5% D

    SB00000PV00
    2

    6
    5 1 2 5

    PQ129B
    0_0402_5% D

    SB00000PV00
    2

    1 2 2

    PQ127A
    D D S G G
    <43,83>
    1

    4
    AC1_DISC# G
    PQ122B
    S Pilot-001 S

    4
    S SB00000PV00

    1
    1
    330K_0402_1%

    49.9K_0402_1%
    1

    1
    PR221

    330K_0402_1%
    @ PR203
    PR134

    PR118
    0_0402_5%
    1 2
    Pilot-001
    49.9K_0402_1%
    2

    +3V_LDO
    2

    2
    PR133

    PR222
    Pilot-001
    6

    200K_0402_1% D @ PR170
    SB00000PV00

    Pilot-001
    L2N7002WT1G_SC70-3

    1 2 2
    PQ136A

    @ PR135 0_0402_5%
    +3V_LDO
    1

    G D 0_0402_5% 1 2 AC_DIS#
    200K_0402_1%

    Pilot-001
    2

    2 1 2 VBUS2_ECOK
    PQ119

    PR139

    @ PR224 @ PR195
    3

    3
    0_0402_5% D G 0_0402_5% D
    SB00000PV00

    SB00000PV00
    S
    1

    1 2 5 1 2 5
    PQ136B

    PQ128B
    @ PR200
    <44> S Pilot-001 <58>
    3

    EN_PD_HV2 VBUS3_ECOK
    DMN66D0LDW-7_SOT363-6
    G 0_0402_5% G
    2

    D 1 2 AC_DIS#
    SB00000PV00

    1 2 2
    PQ121A

    @ PR145
    Pilot-001 S S
    4

    4
    6
    G 0_0402_5% D

    SB00000PV00
    1 2 PR179 1 2 2
    +3VALW

    PQ128A
    1M_0402_1% <58> VBUS2_ECOK
    S G
    1

    PR229
    B 1M_0402_1% Pilot-001 +3VALW B

    1
    S

    200K_0402_1%
    1
    +3VALW
    DMN66D0LDW-7_SOT363-6

    @ PR136

    PR173
    3

    0_0402_5% D +3VALW
    SB00000PV00

    1
    AC2_DISC# 1 2 5
    PQ121B

    200K_0402_1%
    1
    G

    200K_0402_1%

    PR171

    2
    PR143
    1
    S Pilot-001

    200K_0402_1%
    4

    3
    PR177 D

    SB00000PV00
    PR127

    2
    5

    PQ117B
    1M_0402_1%

    2
    1 2 @ PR196 G

    6
    0_0402_5% D

    SB00000PV00
    Pilot-001 Pilot-001 Pilot-001

    3
    1 2 2

    PQ117A
    D

    SB00000PV00
    <45,83> S

    4
    5 AC3_DISC#

    PQ120B
    PQ200 G
    @ PR117 L2N7002WT1G_SC70-3 @ PR132 @ PR144 G
    1

    6
    0_0402_5% 0_0402_5% D 0_0402_5% D

    SB00000PV00
    S

    1
    S

    1 2 3 1 1 2 2 1 2 2

    PQ120A
    <58> PQ118 S

    4
    DCIN2_EN <44,83> AC2_DISC# G
    G L2N7002WT1G_SC70-3
    @ PR205
    From EC S
    3
    1

    0_0402_5%
    G

    S
    1000P_0402_50V7K
    1M_0402_1%
    2

    1
    1

    1 2
    @ PC137
    PR172

    @ PR204
    100K_0201_1%

    100K_0201_1%
    0.1U_0402_25V7K

    2
    1

    0_0402_5%
    2
    1

    1 2
    PR119

    @ PC1558

    PR121
    0_0402_5%
    @ PR120

    2
    2

    2
    2

    +3VALW
    PQ123
    Pilot-001 +3V_LDO S TR AO7401 1P SC70-3

    1 3

    S
    +3V_LDOP
    PR148
    1M_0402_1%

    G
    2
    1 2
    PD103

    10K_0402_1%
    1
    EMC@ PL105 RB751V-40_SOD323-2 PU101 PC125
    +BATT HCB2012KF-800T50_2P +BAT_TABLET 2 1 LDO_IN 1 5 0.01U_0402_16V7K

    PR150
    1 2 +VBUS1_20V VCC OUT +3V_LDOP 1 2
    2
    1U_0402_10V6K

    EMC@ PL102 GND

    2
    PQ124
    1

    3 4
    PC129

    HCB2012KF-800T50_2P PD106 PC128 S TR AO7401 1P SC70-3


    1 2 RB751V-40_SOD323-2 1U_0603_25V6K NC EN
    2 1 1 2 1 3 +3V_LDO

    S
    +VBUS2_20V +3VALW
    2

    DMN66D0LDW-7_SOT363-6
    EMC@ PL103 RT9069-33GB_SOT23-5
    HCB2012KF-800T50_2P
    1 2 PR155

    G
    2
    3
    PD107 PR149 D

    SB00000PV00
    100K_0402_1%
    5 1 2

    PQ125B
    RB751V-40_SOD323-2 300K_0402_5%
    1000P_0402_50V7K

    0.01U_0402_25V7K

    2 1 1 2 G
    @EMC@ PC126

    @EMC@ PC127

    1M_0603_1%

    +VBUS3_20V
    1

    PR102
    1

    1
    S Pilot-001
    TVNST52302AB0_SOT523-3

    TVNST52302AB0_SOT523-3

    4
    1

    @EMC@ PC132 @ PR156


    2

    1U_0603_25V6K
    EMC@ PD104

    EMC@ PD105

    A 2200P_0402_50V7K 0_0402_5% A
    2

    300K_0402_5%

    1 2 PD111 D
    PR153

    ALW_PWRGD_3V_5V
    PC131

    RB751V-40_SOD323-2 2
    SMART <84>

    6 2
    ALW_PWRGD_3V_5V
    2 1 G @ PR151
    +CHG_VIN_20V
    2

    Battery: 14 S 0_0402_5% D
    2

    GND
    12:BATT4+ 13
    GND
    @ PQ126 ALW_PWRGD_3V_5V 1 2 2 PQ125A
    11:BATT3+ 12 DMN65D8LW-7_SOT323-3 G DMN66D0LDW-7_SOT363-6
    12 11 PR152 100_0402_1% PBAT_SMBCLK SB00000PV00

    0.1U_0402_25V6
    10:BATT2+ 11 10 1 2 <58,83> Pilot-001 S

    1
    10 PBAT_CHARGER_SMBCLK

    1
    09:BATT1+ 9

    PC130
    9 CLK_SMB
    08:CLK_SMB 8
    8
    DAT_SMB
    PR154 100_0402_1%
    7 1 2
    07:DAT_SMB <58,83>

    2
    7 6 BATT_PRS# PBAT_CHARGER_SMBDAT
    06:BATT_PRS# 6 5 PR157 100_0402_1% PBAT_SMBDAT
    5
    05:SYS_PRES# 4
    4 1 2
    <58,83>
    3 PBAT_PRES#
    04:GND4 3 2
    03:GND3 2 1 PR158
    02:GND2 1 100K_0402_1%
    01:GND1 ACES_50278-01201-001 1 2
    +3VALW
    CONN@ JT101
    Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DCIN/Power Path
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    Use LTCX007MM00 0.4

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 82 of 100
    5 4 3 2 1
    A B C D

    Charger controller(40.1), Support component(40.2)

    @ PT100
    +CHG_VIN_20V
    +CHG_SRC_20V
    PR300 EMC@ PL302 low noise
    1

    0.02_1206_1% 1UH_MMD-04BZ-1R0M-V1_3.75A_20%
    Pilot-002 1

    1 4 1 2

    15U_B2_25VM_R100M
    2200P_0402_50V7K
    4.3V 2 3

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M
    @EMC@ PC303
    0.1U_0402_25V6

    0.1U_0402_25V6

    PC306
    1

    1
    442K_0402_1%

    @PC301

    1
    PR305

    PC304

    PC305

    PC307

    @ PC310

    C_0603-S3 PC302

    C_0603-S3 PC308

    C_0603-S3 PC309

    PC1540
    +

    @EMC@
    2

    2
    1

    1
    C@ PD906 2

    2
    PR302 PR301 SMF4L22A_SOD123FL2
    1_0402_1% 1_0402_1%

    CHG_ACIN

    2
    2

    2
    PC312
    4.7U_0603_25V6K

    1U_0402_25V6K

    1U_0402_25V6K
    1 2

    1
    100K_0402_1%
    0.1U_0402_25V6
    1

    1
    PC331
    B+

    PR307
    Pilot-002

    PC313

    PC314
    low noise
    2

    2
    2
    top

    33U_B3_16VM_R45M
    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    2200P_0402_50V7K
    @EMC@ PC321

    @EMC@ PC329
    0.1U_0402_25V6
    1

    1
    PC317

    PC319

    @ PC324

    @ PC325

    @ PC326

    C_0603-S3 PC315

    C_0603-S3 PC316

    C_0603-S3 PC318

    C_0603-S3 PC320

    PC1541
    +

    0.22U_0603_25V7K
    1
    2.2_0603_5%

    2
    1
    2

    PC330
    PR306
    PR303

    2
    2_1206_5%

    2
    2 2
    1 2
    +CHG_VIN_20V

    1U_0603_25V6K
    1
    PC332

    CHG_ADP

    CHG_CSIP

    CHG_CSIN

    CHG_BST1

    CHG_UG1

    CHG_LX1

    CHG_LG1

    CHG_UG2
    PD300 PC333

    CHG_UG1
    2
    RB751V-40_SOD323-2 1U_0603_25V6K
    2 1 1 2 PR308
    +CHG_VIN_20V 4.7_0402_5%

    16

    15

    14

    13

    12

    11

    10

    33
    9
    PD301 PR309 1 2 VDD

    AON6962_DFN5X6D-8-7

    AON6962_DFN5X6D-8-7
    RB751V-40_SOD323-2 2_1206_5% 5V

    ADP

    CSIP

    ASGATE

    BOOT1

    UGATE1

    PHASE1

    LGATE1
    CSIN

    PAD
    B+
    2 1 1 2 PC334
    6.6 * 7.3 *3 +BAT_TABLET

    2
    2.2U_0402_6.3V6M
    CHG_DCIN 17 CHG_VDDP

    PQ302

    PQ307
    PC335 8 1 2 PL301

    D1

    G1

    G1

    D1
    VDD DCIN VDDP
    2.2U_0402_6.3V6M 2.2UH_MHCB06030-2R2M-C1L_10A_20%
    1 2 18 PU300 7 CHG_LG2 PR304 PQ304
    5V VDD LGATE2 7 CHG_LX1 1 2 CHG_LX2 7
    ISL88738HRTZ-T_TQFN32_4X4 PR311 .01_2512_1% AON7405_DFN8-5
    CHG_ACIN 19 6 CHG_LX2 1 2 D2/S1 D2/S1 1 2 +8.4V_BATT+ 1
    Pilot-001 ACIN PHASE2 2
    CHG_CMIN 20 CHG_UG2 2.2_0603_5%
    @ PR334 1 2 0_0402_5% 5 SD036100D80 3 5

    G2

    G2
    S2

    S2

    S2

    S2

    S2

    S2
    OTGEN/CMIN UGATE2

    10U_0603_25V6M
    CHG_MCP23017_SMBDAT PC336

    10U_0603_25V6M
    CHG_DAT 21 CHG_BST2

    @EMC@ PR316
    4.7_1206_5%

    @EMC@ PR317
    4.7_1206_5%
    @ PR313 1 2 0_0402_5% 4 1 2
    <58,82>

    3
    PBAT_CHARGER_SMBDAT SDA BOOT2

    1
    PC323
    Change part number to

    4
    CHG_CLK 22

    PC322
    @ PR314 1 2 0_0402_5% SA00009VW0L 3 0.22U_0603_25V7K
    <58,82> PBAT_CHARGER_SMBCLK SCL VSYS

    2200P_0402_50V7K
    CHG_LG2

    4700P_0402_25V7K
    OTGPG/CMOUT

    1
    CHG_MCP23017_SMBCLK PR315 1 2 75_0402_5% 23 2 CHG_CSOP @ PR318

    PC340
    CHG_LG1

    1 SNUB_CHG1 2

    1 SNUB_CHG2 2
    <14,58,89>
    AMON/BMON

    PROCHOT# CSOP

    1
    H_PROCHOT#

    CHG_BGATE
    0_0402_5%

    PC339
    BATGONE

    24 1 1 2 B+

    2
    <82> CHG_PROCHOT# ACOK CSON

    CHG_CSON
    BGATE

    2
    CMOP
    PROG

    PSYS

    VBAT

    VDD Pilot-001

    680P_0402_50V7K

    680P_0402_50V7K
    0.1U_0402_25V6
    1

    @EMC@ PC343
    @ PC341

    @EMC@ PC342
    25

    26

    27

    28

    29

    30

    CHG_VBAT1 31

    32
    1

    1
    PR319 PR325 PR323 PR324

    2
    CHG_BGATE
    CHG_PSYS
    CHG_AMON

    100K_0402_1% 100K_0402_1% 1_0402_1% 1_0402_1%

    2
    3
    1 2 3

    <58,82> PBAT_PRES#
    PQ300
    2

    2
    ACAV_IN1 L2N7002WT1G_SC70-3 2-CELL
    1

    PC352
    10P_0402_50V8J

    @ PR326
    1M_0402_1% @ PC345 PC346 @ PC347
    1

    D 1U_0402_25V6K 1U_0603_25V6 1U_0402_25V6K


    2

    93.1K_0402_1%

    2 PR320 1 2 1 2 1 2
    2

    <58> AC_DIS G 154K_0402_1%


    1

    PR322

    S
    3

    PR340
    2

    1M_0402_1%
    Pilot-001
    Pilot-001
    1

    0_0402_5%

    @ PR332
    2

    @ PR329

    0_0402_5%
    2

    1 2
    <82> AC_DISC_OUT#
    2

    @ PT104 CHG_COMP
    P_SYS
    0.01U_0402_16V7K 499_0402_1%

    560P_0402_50V7K
    1

    @ PC348
    1

    1
    100K_0402_1%

    10K_0402_5%
    PR327

    @ PR333

    +3V_LDO
    Pilot-001
    1

    PR328 PR330
    PR336

    @ PR321 PD305 @ PT105 1K_0402_1% 100_0402_1%


    2

    0_0402_5% BAT54CW_SOT323-3 1 2 +BAT_TABLET


    2

    1 2 2
    2

    <43,82> AC1_DISC#
    Pilot-001
    2

    @ PR343 1
    0_0402_5% @ PC351
    0.1U_0402_25V6

    1 2 3 0.1U_0402_25V6
    2
    1

    <44,82> AC2_DISC#
    0_0402_5%

    0_0402_5%
    PC337

    0.1U_0402_25V6
    PC349

    @ PR342

    @ PR341
    PC350

    @ PR344 PD306
    2

    0_0402_5% BAT54CW_SOT323-3
    2

    1 2 2
    2

    <45,82> AC3_DISC#
    1
    4
    Pilot-001 4
    5

    3
    1
    1M_0402_1%

    @ PR345
    VCC

    <58> I_BATT
    @ PR335

    1 0_0402_5%
    IN1 4 1 2
    OUT ACAV_IN <58>
    2 <58>
    GND

    IN2 I_ADP
    100K_0402_1%
    2

    PR331

    PU301
    3

    MC74VHC1G08DFT2G_SC70-5 <58,89> I_SYS

    @ PR346 Security Classification Compal Secret Data Compal Electronics, Inc.


    2

    0_0402_5% 2011/06/02 2013/10/28 Title


    ACAV_IN1 1 2 Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR_Charger (ISL88738)
    Pilot-001 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
    R&D Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 83 of 100
    A B C D
    5 4 3 2 1

    @ PJP500
    JUMP_43X118
    Pilot-002 1 2
    EMC@ PL500 low noise PU500 PR500 PC504 +3VALWP 1 2 +3VALW
    HCB2012KF-800T50_2P SY8286BRAC_QFN20_3X3 0_0402_5% 0.1U_0603_25V7K
    1 2 B+_3V BST_3V 1 2 1 2
    B+

    2200P_0402_50V7K

    10U_0603_25V6M

    10U_0603_25V6M
    0.1U_0402_25V6
    3VALWP

    1
    EMC@ PC500

    EMC@ PC501

    PC502

    PC503

    C_0603-S3
    TDC 5.2A

    IN

    IN

    IN

    IN

    BS
    D D
    Peak Current 7.5A

    2
    LX_3V 6 20 PL501 low noise
    LX LX
    7 19 LX_3V
    1.5UH_MMD-05CZN1R5M-V1L_7.2A_20%
    1 2 C_0603-S1 C_0603-S1 C_0603-S1 C_0603-S1
    OCP Current 8.0A (fix)
    GND LX
    5.5 * 5.2 * 3 +3VALWP
    8 18 3.3V LDO
    GND GND

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    150mA~300mA

    1
    9 17

    @EMC@ PR501
    4.7_1206_5%
    +3VLP

    1
    PG LDO

    PC505

    PC506

    PC507

    PC508

    PC526
    1
    10 16
    Non AR

    2
    NC NC PC509

    OUT
    EN2

    EN1
    21 4.7U_0402_6.3V6M 3VALWP

    NC
    FF

    2
    GND
    TDC 5.5A

    1 3V_SN 2
    PR502

    11

    12

    13

    14

    15
    100K_0402_5%
    1 2
    Peak Current 7.5A
    +3VALWP OCP Current 8.0A (fix)

    680P_0603_50V7K
    Vout is 3.37V Pilot-003

    @EMC@ PC510
    ENLDO_3V5V
    Fsw=600KHz
    <82> ALW _PW RGD_3V_5V

    2
    Check pull up resistor of
    @ PR503 PC511 PR504
    C SPOK at HW side 0_0402_5% 1000P_0402_25V8J 1K_0402_5%
    C

    1 2 3V_FB 1 2 1 2
    <58,84> ALW ON

    Pilot-001 @ PJP501
    JUMP_43X118
    1 2
    +5VALWP 1 2 +5VALW
    Pilot-002
    EMC@ PL502 low noise PR505 PC512
    HCB2012KF-800T50_2P PU501 0_0402_5% 0.1U_0603_25V7K
    1 2 B+_5V SY8288CRAC_QFN20_3X3 BST_5V 1 2 1 2 5VALWP
    B+ TDC 7.9A
    EMC@ PL503
    HCB2012KF-800T50_2P Peak Current 11.0A
    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M
    2200P_0402_50V7K
    0.1U_0402_25V6

    1 2 OCP Current 13.0A


    1

    1
    EMC@ PC513

    EMC@ PC514

    PC528

    PC516

    C_0603-S3 PC515

    C_0603-S3 PC529

    IN

    IN

    IN

    IN

    BS
    2

    LX_5V 6 20 PL504
    LX LX 1.5UH_PCMC063T-1R5MN_9A_20%
    7 19 LX_5V 1 2
    B
    GND LX +5VALWP B
    8 18 7 X 7 X 3
    GND GND PC517

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    1

    1
    ALW _PW RGD_3V_5V 1 2 9 17 1 2

    @EMC@ PR507
    4.7_1206_5%
    1
    PG VCC

    PC518

    PC519

    PC520

    PC521

    PC522

    PC527
    @ PR506 10 16

    2
    0_0402_5% NC NC 4.7U_0402_6.3V6M
    OUT

    LDO
    EN2

    EN1

    PR508 21
    FF

    499K_0402_1% GND

    5V_SN 2
    1 2 ENLDO_3V5V
    B+
    11

    12

    13

    14

    15

    VL
    5V LDO 150mA~300mA

    680P_0603_50V7K
    Vout 5.1V
    1

    @EMC@ PC524
    ENLDO_3V5V

    PC523
    Fsw=600KHz

    1
    PR509 4.7U_0402_6.3V6M
    499K_0402_1%
    2

    @ PR512
    2

    2
    0_0603_5%
    1 2

    @ PR510 PC525 PR511


    0_0402_5% 1000P_0402_25V8J 1K_0402_5%
    1 2 5V_FB 1 2 1 2
    <58,84> ALW ON

    A Pilot-001 A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2014/10/17 Deciphered Date 2014/12/05 Title

    3V/5V controller(35.1), Support component(35.2) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    +3VALW_+5VALW
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 84 of 100
    5 4 3 2 1

    WWW.AliSaler.Com
    5 4 3 2 1

    @ PR600
    100K_0402_5%
    EMC@ PL600 1 2
    HCB2012KF-800T50_2P +3VS
    1 2 PR601
    B+ 100K_0402_5%

    2200P_0402_25V7K
    10U_0603_25V6M

    10U_0603_25V6M

    EMC@ PC602

    EMC@ PC603
    0.1U_0402_25V6
    1 2
    +3VS

    1
    PC600

    PC601
    PU600
    D D
    +3VALW
    10 19 1.2V_DDR_OT @EMC@ PR602 @EMC@ PC604

    2
    IN OT 4.7_0603_5% 680P_0402_50V7K
    1.2V_DDR_PG
    13
    BYP PG
    18
    PC605 .1U_0402_16V7K PR612
    1 2 1 2
    +1.2V_DDRP

    2.2U_0402_6.3V6M
    14 12 1 2 1 2 PL601
    VCC BS 0_0603_5% 1UH_MMD-05CZ-1R0M-M7L_7A_20%

    1
    PC606

    4.7U_0402_6.3V6M
    PC607
    4 11 LX_DDR 1 2
    VTTGND LX
    +3VALW 5 X 5 X 3

    330P_0402_50V7K
    9 16
    R1

    2
    PGND FB

    1
    100K_0402_1%
    1

    PC609

    PR603
    15 8 +1.2V_DDRP PC608
    SGND VDDQSNS

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    1 22U_0603_6.3V6M
    7 1 2

    2
    VLDOIN

    1
    PC610

    PC611

    PC612

    PC613
    @ PR604

    2
    0_0402_5% ILMT_DDR 17 6
    ILMT VTT +0.6VSP

    2
    1 5
    2

    S5 VTTSNS

    1
    100K_0402_1%
    ILMT_DDR
    R2

    PR605
    2 3
    S3 VTTREF

    2.2U_0402_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    1

    1
    PC614

    PC615

    PC616
    @ PR606 SY8210AQVC_QFN19_4X3

    EN_1.2V

    2
    0_0402_5%

    2
    C C

    EN_0.6V
    2

    The current limit is set to 8A, 12A or 16A when VFB=0.6V


    this pin is pull low, floating or pull high
    +1.2V_DDR OCP set 12A @ PR607
    Vout=0.6V* (1+R1/R2)
    0_0402_5%
    1 2
    Vout=1.2V
    <65,87,88> SUS_ON_P
    0.1U_0402_10V7K

    Fsw=600KHz
    Pilot-001
    1

    1
    1M_0402_1%

    @ PC617
    PR608

    2
    2

    Pilot-001
    @ PR609
    0_0402_5%
    1 2
    <7> SM_PG_CTRL +1.2V_DDRP +1.2V_DDR +0.6VSP +0.6VS
    0.1U_0402_10V7K

    B B
    1
    1M_0402_1%

    @ PJP600 @ PJP601
    1
    PR610

    @ PC618

    @ PR611 JUMP_43X118 JUMP_43X39


    0_0402_5% 1 2 1 2
    1 2 1 2 1 2
    <65,77,78,88> RUN_ON_P
    2
    2

    +1.2V_DDR 0.6Volt +/- 5%


    TDC 4.1A TDC 0.4A
    Mode S3 S5 VOUT VTT Peak Current 5.8A Peak Current 0.6A
    Normal H H on on
    Stadby L H on off OCP Current 12A OCP Current 2A (fix)
    Shutdown L L off off

    Note: S3 - sleep ; S5 - power off


    DDR controller(35.3), Support component(35.4)

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2014/10/17 Deciphered Date 2014/12/05 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    +1.2V_DDR/0.6VS
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 85 of 100
    5 4 3 2 1
    A B C D

    1 1

    @ PR800

    <65,85,88> SUS_ON_P
    0_0402_5%
    1 2 +1.8VAP
    @ PR801
    0_0402_5%
    1 2
    <11,58,65,77,86,93> SIO_SLP_SUS#

    0.1U_0402_25V6
    Pilot-001

    EN_1.8VA
    1
    @ PC800

    2
    @ PJP800
    B+=NVDC 2S +1.8VAP 1 2
    +1.8VA

    13

    14

    15

    16

    17
    1 2
    3.2 * 2.5 *1.2 JUMP_43X39

    EN

    PGND

    PGND
    VOS

    TP
    EMC@ PL800 PL801
    HCB1608KF-121T30_0603 2.2UH_HEI322512A-2R2M-Q8_2.7A_20%
    SW_1.8VA
    +1.8VAP
    2 2
    1 2 12 1 1 2
    B+ PVIN SW

    412K_0402_1%

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    1

    22P_0402_50V8J
    1

    1
    PR802

    PC801

    PC802

    PC809
    11 2
    2200P_0402_50V7K

    PVIN SW
    10U_0603_25V6M

    10U_0603_25V6M
    0.1U_0402_25V6

    Rup
    1

    1
    EMC@ PC803

    PC805

    PC808

    PU800
    EMC@PC804

    2
    TLV62150ARGTR_QFN16_3X3

    2
    10 footprint 3
    2

    AVIN SW
    TLV62150RGTR_QFN16_3X3-S

    1
    +1.8VA

    1
    SS_1.8VA 9 4 1.8VA_PWROK
    SS/TR PG Rdown TDC 0.4A
    3300P_0402_50V7-K

    @EMC@ PR803
    4.7_0603_5% PR804
    1

    Peak Current 0.6A

    AGND

    100K_0402_5%
    324K_0402_1%

    FSW
    PC806

    DEF

    2
    1
    OCP setting 1.4A(Fix)

    FB

    2
    @ PR805
    2

    1
    @EMC@ PC807
    680P_0402_50V7K

    Pilot-001

    2
    VFB=0.8V

    2
    1
    0_0402_5%

    FB_1.8VA
    @ PR806

    3 Fsw=1.25MHz @ Fsw net to 3V Vout=0.8V* (1+Rup/Rdown) 3

    Css=Tss*(2.5uA/1.25V) (F) +3VS Vout=1.817V


    Tss=1.65mS
    2

    Fsw=1.25MHz
    +1.8VAP

    1.8VA_PWROK
    1.8VS controller(35.13), Support component(35.14) 1.8VA_PWROK <58>

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2014/10/17 Deciphered Date 2014/12/05 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    +1.8VA
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 86 of 100
    A B C D

    WWW.AliSaler.Com
    A B C D

    1 1

    Pilot-001
    @ PR900

    <65,85,87> SUS_ON_P
    0_0402_5%
    1 2 +1.8VUP
    @ PR901
    0_0402_5%
    1 2
    <65,77,78,85> RUN_ON_P

    0.1U_0402_25V6

    EN_1.8VU
    1
    @ PC900

    2
    @ PJP900
    B+=NVDC 2S +1.8VUP 1 2
    +1.8VU

    13

    14

    15

    16

    17
    1 2
    2
    3.2 * 2.5 *1.2 JUMP_43X39 2

    EN

    VOS

    PGND

    PGND

    TP
    EMC@ PL900 PL901
    HCB1608KF-121T30_0603 2.2UH_HEI322512A-2R2M-Q8_2.7A_20%

    B+ 1 2 12
    PVIN SW
    1 SW _1.8VU 1 2
    +1.8VUP

    412K_0402_1%

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    1

    22P_0402_50V8J
    1

    1
    2200P_0402_50V7K

    PR902

    PC902

    PC908
    11 2
    PVIN SW
    0.1U_0402_25V6

    PC901
    10U_0603_25V6M

    Rup
    1

    1
    EMC@ PC903

    PC905

    PU900
    PC904

    2
    TLV62150ARGTR_QFN16_3X3

    2
    10 footprint 3
    2

    AVIN SW
    EMC@

    TLV62150RGTR_QFN16_3X3-S
    +1.8VU

    1
    SS_1.8VU 9
    SS/TR PG
    4 1.8VU_PW ROK @EMC@ PR903
    Rdown TDC 0.46A
    4.7_0805_5%
    3300P_0402_50V7-K

    Peak Current 0.66A

    1
    PR904

    100K_0402_5%
    1

    AGND
    324K_0402_1% OCP setting 1.4A(Fix)

    FSW
    DEF

    2
    PC906

    PR905
    FB

    2
    2

    1
    @EMC@ PC907
    680P_0402_50V7K

    Pilot-001
    VFB=0.8V

    2
    1
    0_0402_5%

    FB_1.8VU
    @ PR906
    Fsw=1.25MHz @ Fsw net to 3V Vout=0.8V* (1+Rup/Rdown)
    Css=Tss*(2.5uA/1.25V) (F) 2
    +3VS Vout=1.817V
    Tss=1.65mS Fsw=1.25MHz
    3 3

    +1.8VUP

    1.8VU controller(35.13), Support component(35.14)

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2014/10/17 Deciphered Date 2014/12/05 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    +1.8VU
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 87 of 100
    A B C D
    5 4 3 2 1

    +1.0VA
    TDC 3.5A
    D Peak Current 5A D

    OCP current 9A

    @ PJP700
    JUMP_43X79
    7.2*1/.9/9=0.89A +1.0VAP 1
    1 2
    2 +1.0VA
    @EMC@ PR700 @EMC@ PC700
    4.7_1206_5% 680P_0603_50V7K
    1 2 SNUB_1.0V 1 2
    EMC@ PL700 PU700 PR708 +3VALW
    HCB2012KF-800T50_2P SY8286RAC_QFN20_3X3 100K_0402_5%
    B+_1.0V
    B+ 1 2 2
    IN PG
    9 1 2 PR701
    0_0402_5%
    PC703
    0.1U_0201_10V6K
    3 1 BST_1.0V 1 2 BST_1.0V_R 1 2 PL701

    2200P_0402_50V7K

    0.1U_0402_25V6
    IN BS 1UH_MMD-05CZ-1R0M-M7L_7A_20%

    EMC@ PC701

    @EMC@ PC702

    10U_0603_25V6M

    10U_0603_25V6M
    1

    1
    4 6 LX_1.0V 1 2
    +1.0VAP

    PC704

    @ PC705
    C IN LX C

    5 19 5 X 5 X 3

    330P_0402_50V7K

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    2

    2
    IN LX

    15K_0402_1%

    1
    7 20

    PR702

    PC706

    PC707

    PC708

    PC709

    PC710
    GND LX
    8 14 FB_1.0V R1
    Pilot-001

    2
    GND FB

    2
    @ PR703 18 17 LDO_1.0V 3V
    0_0402_5% GND VCC
    1 2 EN_1.0V 11 10
    <11,58,65,77,87,93> EN NC

    1
    SIO_SLP_SUS# PC711 FB=0.6V

    1
    ILMT_1.0V 13 12 4.7U_0402_6.3V6M
    ILMT NC
    1

    @ PC712

    2
    PR704 15 16 PR705
    1M_0402_1%
    0.1U_0402_25V6 +3VALW BYP NC Vout=0.6V* (1+R1/R2) R2 20K_0402_1%
    +3VALW
    2

    footprint 21 =0.6*(1+(15/20))

    2
    PAD
    2

    SY8286RAC_QFN20_3X3
    Vout=1.05V

    1
    1

    PC713
    @ PR706 2.2U_0402_6.3V6M

    2
    0_0402_5%
    EN :H>0.8V ; L<0.4V
    B B
    2

    EN pin don't floating


    If have pull down resistor at HW side,
    please delete PR704.
    1

    @ PR707
    0_0402_5%
    2

    The current limit is set to 6A, 9A or 12A when this pin


    is pull low, floating or pull high.

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    1.05V controller(35.5), Support component(35.6) Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    +1VALW (SY8288)
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    0.4
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 88 of 100
    5 4 3 2 1

    WWW.AliSaler.Com
    5 4 3 2 1

    LPM VID1 VID0 Vout

    0 X X 0(LPM)

    +3VALW 1 0 0 0.85

    NB692

    1
    VCCIO 1 0 1 0.875
    @ PR1423
    D D
    10K_0402_1%
    @ PR14000_0402_5%
    Pilot-001 1 1 0

    2
    <11,65,66,78,89> SIO_SLP_S0# 1 2 0.95
    @ PR1590
    @ PR1574 0_0402_5%
    0_0402_5% 1 2
    1 2
    1 1 1 0.975
    <6,78> CPU_C10_GATE#

    MODE_VCCIO
    LP#_VCCIO
    Pilot-001 PR1579 PC1555 @EMC@ PR1403 @EMC@ PC1410
    2.2_0402_1% 0.22U_0402_25V6K 4.7_0603_5% 680P_0402_50V7K
    1 2 1 2 1 2 1 2

    +3VALW
    PU1400
    Vin=6~9V Vout=0.95V

    9
    EMC@ PL1400 NB692GD-Z_QFN13_2X3 PL1401
    HCB1608KF-121T30_0603 0.68UH_HEI322512B-R68M-Q8_4.4A_20% VCCIO

    LP#

    BST
    MODE
    B+ 1 2 VIN_VCCIO 1
    VIN SW
    8 LX_VCCIO 1 2
    +1.0VS_VCCIOP TDC 2.6A
    VCCIO_EN 5 12 1 2 Peak Current 3.7 A

    2200P_0402_50V7K

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    EN VOUT
    OCP Current 7.6 A Fix by IC

    0.1U_0402_25V6

    10U_0603_25V6M

    10U_0603_25V6M
    1

    1
    VID1_VCCIO

    EMC@ PC1408
    3 2 @ PR1577

    PC1401

    PC1402

    PC1403

    PC1404

    PC1405
    EMC@ PC1409
    MIN:7A
    1

    C1 PGND 0_0402_5%
    VID0_VCCIO 4 11
    MAX:8.5A

    2
    C0 AGND

    3V3
    PG
    PR1404 @ PR1405
    10K_0402_1% 10K_0402_1% VCCIO_SENSE <17> Frequency:750KHz
    2

    13

    VCC_VCCIO 10
    VID0_VCCIO PC1554 1 2
    1U_0402_16V6K VSSIO_SENSE <17>
    VID1_VCCIO 1 2 @ PR1409 @ PJP1400
    0_0402_5% JUMP_43X79
    PR1584
    Pilot-001 1 2
    +1.0VS_VCCIOP +1.0VS_VCCIO
    1

    5.1_0402_1% 1 2
    1 2
    @ PR1406 PR1407 +3VALW
    10K_0402_1% 10K_0402_1% PR1575
    C 100K_0402_5% C
    2

    PG_VCCIO 1 2
    @ PR1401
    0_0402_5%
    <65> 1 2
    EN_VCCIO

    Pilot-001

    @ PJP1401
    JUMP_43X79
    1 2
    +3VALW +1.0V_PRIM_COREP 1 2 +1.0V_PRIM_CORE
    1

    @ PR1425
    @ PR1424 150K_0402_1%
    Pilot-001 10K_0402_1% 1 2 PRIM_CORE
    @ PR1411 PR1427 PC1546 @EMC@ PR1570 @EMC@ PC1547
    TDC 2.98A
    Peak Current 4.26 A
    2

    B B
    0_0402_5% 2.2_0402_1% 0.22U_0603_25V7K 4.7_0603_5% 680P_0402_50V7K
    <65> VR_LPM_R_N
    1 2 1 2 1 2 1 2 1 2
    OCP Current 7.6 A Fix by IC
    MIN:7A
    PU1401
    MAX:8.5A
    Vin=6~9V Vout=1.05V
    6

    EMC@ PL1402 NB692GD-Z_QFN13_2X3 PL1403 Choke DCR 34.0mohm


    HCB1608KF-121T30_0603 0.68UH_HEI322512B-R68M-Q8_4.4A_20%
    LP#

    BST
    MODE

    B+ 1 2 1
    VIN SW
    8 1 2
    +1.0V_PRIM_COREP
    +3VALW 5 12 1 2
    2200P_0402_50V7K

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    EN VOUT
    0.1U_0402_25V6

    10U_0603_25V6M

    10U_0603_25V6M
    1

    1
    EMC@ PC1417

    3 2 @ PR1571
    PC1413

    PC1414

    PC1406

    PC1415

    PC1416
    EMC@ PC1418

    C1 PGND 1 0_0402_5%
    Pilot-001
    4 11
    EN_PRIM_CORE
    2

    2
    C0 AGND
    3V3
    PG

    @ PR1572
    0_0402_5%
    13

    10

    PC1545
    2

    1U_0402_16V6K
    1

    1 2
    VID1_PRIM_CORE

    VID0_PRIM_CORE

    PR1412 LPM VID1 VID0 Vout


    @ PR1414 @ PR1415 100K_0402_1% PR1426
    10K_0402_1% 10K_0402_1% <11,58,65,77,86,87> 1 2 5.1_0402_1%
    SIO_SLP_SUS#
    1 2
    +3VALW 0 X X 0.75
    2

    VID0_PRIM_CORE
    0.1U_0402_25V6
    100K_0402_1%

    (LPM)
    1

    PR1576
    PR1413

    VID1_PRIM_CORE
    PC1412

    100K_0402_5%
    1 2 0.9
    @ PR1419
    1 0 0
    NB692
    2
    1

    @ 0_0402_5%
    2

    1 2 CORE_VID0 PRIM_CORE
    @ PR1417 @ PR1418
    10K_0402_1% 10K_0402_1% @ PR1420
    <18> 1 0 1 0.95
    0_0402_5%
    2

    1 2 CORE_VID1
    <18> 1 1 0
    A 1 A

    Pilot-001
    1 1 1 1.05

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2014/10/17 Deciphered Date 2014/12/05 Title
    VCCIO/PRIM_CORE
    +1.0VS_VCCIO controller(35.37), Support component(35.38) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    0.4
    +1.0V_PRIM_CORE controller(35.39), Support component(35.40) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 89 of 100
    5 4 3 2 1
    5 4 3 2 1

    VCC_CORE controller(36.1), Drivers (36.2), Support component(36.3)

    CPU_B+
    VDD18_CORE +3VALW
    U22@ PU1501

    Pilot-001
    1.8V_LDO

    1
    2M_0402_5%

    1
    0_0402_5%
    PR1500
    D D

    4.7_0402_5%
    @ PR1501

    PR1502
    SA0000AG670
    MP2949AGQKT-0029-Z
    Pilot-001

    2
    @ PR1562

    2
    0_0402_5%
    1 2
    PWM_CORE1 <90>
    U42@ PR1563

    133K_0402_1%

    4.7U_0402_6.3V6M
    1
    +3VALW 1 2

    1U_0603_10V6K
    0.01U_0402_50V7K
    PWM_CORE2 <90>

    1
    @ PR1564

    PC1500

    PC1502
    PR1503

    PC1501
    +1.0V_VCCST 0_0402_5% 0_0402_5%
    1 2
    <91>

    2
    PWM_GT

    VRACPU_VINSEN
    2

    VRA_VDD18
    1 2
    PWM_SA <91>

    1
    @ PR1565

    1.91K_0402_1%

    0.1U_0402_25V6
    10K_0402_1%

    10K_0402_1%

    10K_0402_1%

    10K_0402_1%
    1
    0_0402_5%

    PC1503
    Pilot-001

    PR1504

    @ PR1505

    @ PR1506

    @ PR1507

    @ PR1508
    CS_CORE1 <90>

    49

    47

    26

    44

    43

    42

    41

    40

    39

    38
    <90>

    2
    @ CS_CORE2

    +1.0V_VCCST Pilot-001

    AGND

    VIN_SEN

    VDD18

    VDD33

    PRM1

    PWM2

    PWM3

    PWM4

    PWM5

    PWM6
    CS_GT <91>
    @ PR1509
    0_0402_5%
    1 2 37 34
    <59> IMVP_VR_ON EN STB SYNC <90,91> CS_SA <91>
    @ PR1511
    0_0402_5%
    45.3_0402_1%

    1 2 35 PR1515
    100_0402_1%
    75_0402_1%

    <11,65,66,78,93> SIO_SLP_S0# SLP_S0#


    1

    1
    @ PR1510

    1.5K_0402_1%
    0.1U_0402_25V6
    10K_0402_1%

    @ PR1516 5 1 2
    PR1513
    PR1512

    PR1514

    CS1 CSSUMA <89>


    PC1504

    0_0402_5%
    1 2 IMVP_VR_SMBCLK 33 U42@ PR1517
    <58>
    2

    IMVP_SMBCLK SCL_P 1.5K_0402_1%


    2

    @
    @ PR1518 4 1 2
    0_0402_5% CS2
    1 2 IMVP_VR_SMBDAT 32
    <58> IMVP_SMBDAT SDA_P
    PR1519 3
    75_0402_5% CS3
    <14,58,83> H_PROCHOT# 1 2 31
    VRHOT#
    C
    @ PR1520 2 C
    Pull high on EE side 0_0402_5% CS4
    1 2 30 PR1521
    <11> IMVP_VR_PG VRRDY 1.5K_0402_1%
    @ PR1522 1 1 2
    0_0402_5%
    PR1523
    49.9_0402_1%
    Pilot-001 CS5 CSSUMB <89>
    1 2 IMVP_VR_SVID_CLK_R 1 2 IMVP_VR_SVID_CLK 27 PR1524
    <15> VR_SVID_CLK SCLK 1.5K_0402_1%
    @ PR1525 @ PR1526 48 1 2
    CS6 CSSUMC <89>
    0_0402_5% 0_0402_5%
    1 2 IMVP_VR_SVID_ALERT#_R 1 2 Pilot-001 IMVP_VR_SVID_ALERT# 29 @ PC1103 150P_0402_50V8J
    <15> VR_SVID_ALERT# ALT# 1 2
    @ PR1527 PR1528 U22@ PR1529
    0_0402_5% 10_0402_1% U42@ PU1501
    1 2 IMVP_VR_SVID_DATA_R 1 2 IMVP_VR_SVID_DATA 28 U42@ PR1529
    <15> VR_SVID_DATA SDIO MP2949AGQKT-0025-Z 1.47K_0402_1%
    @ PR1530 6 1 2
    0_0402_5%
    Pilot-001 VDIFFA
    Pilot-001 1 2

    @ PC1505 1
    25
    ADDR_P SA0000AG640 SD000009O80
    1.91K_0402_1%
    @ PR1531 2 1U_0402_10V6K @ PR1533 @ PC1506
    10K_0402_1% PR1532 100K_0402_1% 0.01U_0402_16V7K
    1 2 1 2 46 7 1 2 1 2
    VDD18_CORE 5.49K_0402_1% PSYS VFBA
    1 2
    <58,83> I_SYS @ PR1534 0_0402_5%
    Pull high on EE side
    @ PR1536 36 8
    Pilot-001 0_0402_5% PE VOSENA VCC_SENSE <15>
    1 2 PR1537
    61.9K_0402_1%
    @ PR1539 1 2 24 9
    IREF VORTNA VSS_SENSE <15>
    10K_0402_1% Pull low on EE side
    1 2
    +3VALW
    18 @ PC1543 150P_0402_50V8J
    <89> CSSUMA CS_SUMA 1 2

    U22@ PR1542 19 PR1541


    <89> CSSUMB CS_SUMB 2.49K_0402_1%
    10 1 2
    VDIFFB
    20
    <89> CSSUMC CS_SUMC
    SD034107380 U42@ PR1542 @ PR1543 @ PC1507
    B 107K_0402_1% 53.6K_0402_1% 100K_0402_1% 0.01U_0402_16V7K B
    1 2 21 11 1 2 1 2
    IMONA VFBB
    PC1508
    390P_0402_50V7K
    Pull high on EE side
    1 2 22 12
    IMONB VOSENB VCCGT_SENSE <16>
    PR1545
    121K_0402_1%
    1 2 23 13
    IMONC VORTNB VSSGT_SENSE <16>
    Pull low on EE side
    PC1509

    VOSENC
    VORTNC
    150P_0402_50V8J

    VDIFFC
    TEMP

    VFBC
    1 2

    PR1547
    620K_0402_1%
    45

    14

    15

    17

    16
    1 2

    PC1510
    33P_0402_50V8J
    8.2K_0402_1%
    150P_0402_50V8J

    <90,91> VRACPU_VTEMP
    1

    1 2
    1
    PC1544

    PR1549

    Pull high on EE side


    49.9K_0402_1%

    VCCSA_SENSE <17>
    1
    1U_0603_10V6K

    2
    1

    PR1551
    PC1511

    <17>
    2

    VSSSA_SENSE
    Pull low on EE side
    2

    1
    100K_0402_1%
    PR1553
    @

    2
    0.01U_0402_16V7K
    1
    PC1512
    @

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2014/10/17 Deciphered Date 2014/12/05 Title
    PWR_MP2949A

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 90 of 100
    5 4 3 2 1
    5 4 3 2 1

    VCC_CORE Dr. MOS (36.2), Support component(36.3)

    CPU_B+
    Pilot-002
    C_0603-S3

    D
    Pilot-001 D

    0.1U_0402_25V6

    2200P_0402_50V7K
    EMC@ PC1106

    EMC@ PC1007
    @ PR1101 PU1503

    10U_0603_25V6M

    10U_0603_25V6M

    1U_0402_16V6K
    1

    1
    PC1105

    PC1104

    PC1009
    0_0402_5%
    1 2 14 1
    +3VALW VCC VIN 8

    1U_0402_25V6K
    2

    2
    VIN

    1
    PC327
    PC1110
    0.22U_0603_25V7K

    2
    13
    AGND BST
    15 1 2 +VCC_CORE
    low noise PL1404
    0.15UH_HPPC06030-R15M-Q8_35A_20%
    Pilot-001 2 1 2
    9 SW 3
    <89> PWM_CORE1 PWM SW
    @ PR1558 0_0402_5% 4
    SW

    1
    1 2 11

    @EMC@PR1106

    4.7_0805_5%
    <89,90,91> VRACPU_VTEMP VTEMP/FLT
    @ PR1566 0_0402_5%
    1 2 10 5
    <89,90,91> SYNC SYNC PGND 6
    12 PGND 7
    <89>

    2
    CS_CORE1 CS PGND

    MP86902-BGLT-Z_TQFN21-15_3X4

    680P_0603_50V7K
    1
    @EMC@PC1108
    2
    B+ CPU_B+
    C C
    EMC@ PL1000
    HCB2012KF-800T50_2P
    1 2

    100U_D_20VM_R55M

    100U_D_20VM_R55M
    EMC@ PL1002
    HCB2012KF-800T50_2P
    33U_B3_16VM_R45M

    33U_B3_16VM_R45M

    33U_B3_16VM_R45M

    33U_B3_16VM_R45M

    33U_B3_16VM_R45M

    1 1 1 1 1 1 1
    1 2
    + + + + + + +
    PC1536

    PC1537
    PC1533

    PC1534

    PC1535

    PC1538

    PC1539

    EMC@ PL1406
    HCB2012KF-800T50_2P
    1 2 2 2 2 2 2 2 2

    CPU_B+
    Pilot-002
    C_0603-S3
    0.1U_0402_25V6

    2200P_0402_50V7K
    EMC@ PC1112

    U42@ PR1103 U42@ PU1502


    10U_0603_25V6M

    10U_0603_25V6M

    1U_0402_16V6K
    1

    1
    EMC@ PC1011

    0_0402_5%
    PC1010

    PC1109

    PC1113

    1 2 14 1
    B +3VALW VCC VIN 8 B
    2

    VIN
    1U_0402_25V6K
    1
    U42@PC328

    U42@ PC1114
    0.22U_0603_25V7K
    2

    13
    AGND BST
    15 1 2 +VCC_CORE
    U42@ PL1405
    low noise 0.15UH_HPPC06030-R15M-Q8_35A_20%
    2 1 2
    9 SW 3
    <89> PWM_CORE2 PWM SW
    U42@ PR1559 0_0402_5% 4
    SW

    1
    1 2 11

    @EMC@PR1108

    4.7_0805_5%
    <89,90,91> VRACPU_VTEMP VTEMP/FLT
    U42@ PR1567 0_0402_5%
    1 2 10 5
    <89,90,91> SYNC SYNC PGND 6
    12 PGND 7
    <89> CS_CORE2
    2
    CS PGND

    MP86902-BGLT-Z_TQFN21-15_3X4
    680P_0603_50V7K
    1
    @EMC@PC1111
    2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR_+VCORE
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 91 of 100
    5 4 3 2 1
    5 4 3 2 1

    VCC_GT/SA Dr. MOS (36.2), Support component(36.3)

    D D

    CPU_B+
    Pilot-002
    C_0603-S3

    Pilot-001
    0.1U_0402_25V6

    2200P_0402_50V7K
    EMC@ PC1118

    EMC@ PC1008

    @ PR1118 PU1505

    10U_0603_25V6M

    10U_0603_25V6M

    1U_0402_16V6K
    1

    1
    PC1119

    PC1116

    PC1013
    0_0402_5%
    1 2 14 1
    +3VALW VCC VIN 8

    1U_0402_25V6K
    2

    2
    VIN

    1
    PC1532
    PC1120
    0.22U_0603_25V7K

    2
    13
    AGND BST
    15 1 2 +VCCGT
    low noise PL1100
    0.15UH_HPPC06030-R15M-Q8_35A_20%
    Pilot-001 2 1 2
    9 SW 3
    <89> PWM_GT PWM SW
    @ PR1560 0_0402_5% 4
    SW

    1
    1 2 11

    @EMC@PR1117

    4.7_0805_5%
    <89,90,91> VRACPU_VTEMP VTEMP/FLT
    @ PR1568 0_0402_5%
    <89,90,91> 1 2 10 5
    SYNC SYNC PGND 6
    12 PGND 7
    <89> CS_GT

    2
    CS PGND

    MP86902-BGLT-Z_TQFN21-15_3X4

    680P_0603_50V7K
    1
    C C

    @EMC@PC1117
    2
    B+ SA_B+
    EMC@ PL1108
    Pilot-002
    HCB2012KF-800T50_2P C_0603-S3
    1 2

    Pilot-001
    0.1U_0402_25V6

    2200P_0402_50V7K
    EMC@ PC1123

    EMC@ PC1012

    @ PR1126 PU1504
    10U_0603_25V6M

    10U_0603_25V6M

    10U_0603_25V6M

    1U_0402_16V6K
    1

    0_0402_5%
    PC1121

    PC1542

    PC1014

    PC1122

    1 2 12 1
    +3VALW VCC VIN 6
    1U_0402_25V6K

    B B
    2

    VIN
    1
    PC338

    PC1126
    0.22U_0603_25V7K
    2

    11
    AGND BST
    13 1 2 +VCCSA
    low noise PL1151
    0.47UH_MMD05CZR47M_12A_20%
    Pilot-001 2 1 2
    7 SW 3
    <89> PWM_SA PWM SW
    @ PR1561 0_0402_5%

    1
    1 2 9

    @EMC@PR1125

    4.7_0805_5%
    <89,90,91> VRACPU_VTEMP VTEMP/FLT
    @ PR1569 0_0402_5%
    1 2 8 4
    <89,90,91> SYNC SYNC PGND
    10 5
    VCC_SA
    <89> CS_SA
    2
    CS PGND
    TDC 4A
    MP86901-AGQT-Z_TQFN13_3X3 Peak Current 6A
    680P_0603_50V7K
    1

    OCP current 10A


    @EMC@PC1124
    2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR_VCORE, +VCCSA
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-E672P
    Date: Monday, October 22, 2018 Sheet 92 of 100
    5 4 3 2 1
    A
    B
    C
    D
    2 1 2 1
    +VCC_CORE

    2 1

    +VCC_CORE
    2
    1
    +
    2 1 2 1 PC1289 PC1259 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M PC1309 U42@ PC1204
    @

    PC1287 U42@ PC1222 2 1 2 1 330_B2_2.5VM_R9M 22U_0603_6.3V6M PC1206


    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M

    2
    1
    +
    2 1 2 1 PC1290 PC1260 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M PC1529 U42@ PC1214
    @

    PC1341 U42@ PC1251 2 1 2 1 330_B2_2.5VM_R9M 22U_0603_6.3V6M PC1237


    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M

    2
    1
    +
    2 1 2 1 PC1291 PC1261 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1306 U42@ PC1202
    @

    PC1342 U42@ PC1335 2 1 2 1 330_B2_2.5VM_R9M 22U_0603_6.3V6M PC1236

    5
    5

    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M

    2
    1
    +
    2 1 2 1 PC1292 PC1262 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M C@ PC1530 U42@ PC1201
    @

    PC1343 U42@ PC1350 2 1 2 1 330_B2_2.5VM_R9M 22U_0603_6.3V6M PC1382


    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M

    2
    1
    +
    2 1 2 1 PC1293 PC1263 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1531 U42@ PC1212
    @

    PC1277 U42@ PC1352 2 1 2 1 330_B2_2.5VM_R9M 22U_0603_6.3V6M PC1238


    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 2 1 PC1294 PC1264 2 1

    U42 low noise cap_H=0.8


    U42 low noise cap_H=0.8

    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1233


    @

    PC1278 U42@ PC1252 2 1 2 1 22U_0603_6.3V6M PC1200


    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 2 1 PC1295 PC1265 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1232
    @

    PC1338 U42@ PC1347 2 1 2 1 22U_0603_6.3V6M PC1203


    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 2 1 PC1296 PC1266 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1234
    @

    PC1276 U42@ PC1348 2 1 2 1 22U_0603_6.3V6M PC1208


    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M

    PC1207 U22@
    PC1212 U22@
    2 1 2 1 2 1

    SE00000M000
    SE00000M000
    PC1297 PC1267
    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1235
    @

    PC1279 U42@ PC1354 2 1 2 1 22U_0603_6.3V6M PC1216


    1U_0201_6.3V6M 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 PC1298 PC1268 2 1
    U22_Normal cap

    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1239


    @

    PC1363 2 1 2 1 22U_0603_6.3V6M PC1380


    1U_0201_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 PC1299 PC1269 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M @U42@ PC1207

    PC1231 U22@
    PC1233 U22@
    @

    2 1 2 1

    SE00000M000
    SE00000M000
    PC1364 22U_0603_6.3V6M PC1384
    1U_0201_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 PC1300 PC1270 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1381
    @

    PC1365 2 1 2 1 22U_0603_6.3V6M PC1385


    1U_0201_6.3V6M 2 1 22U_0603_6.3V6M

    PC1252 U22@
    PC1222 U22@
    2 1 2 1

    SE00000M000
    SE00000M000
    PC1301 PC1271
    1U_0201_6.3V6M 1U_0201_6.3V6M @U42@ PC1231
    @

    PC1366 2 1 2 1 22U_0603_6.3V6M PC1209

    22U_0603_6.3V6M
    22U_0603_6.3V6M
    1U_0201_6.3V6M 2 1 22U_0603_6.3V6M
    PC1242 U22@
    PC1383 U22@

    2 1 2 1
    SE00000M000
    SE00000M000

    PC1302 PC1272

    U22_Normal cap
    1U_0201_6.3V6M 1U_0201_6.3V6M @U42@ PC1383
    @

    PC1367 2 1 2 1 22U_0603_6.3V6M PC1386


    1U_0201_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 PC1303 PC1273 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1242
    @

    PC1368 2 1 2 1 22U_0603_6.3V6M PC1215

    PC1347 U22@
    PC1251 U22@
    2 1

    SE00000M000
    SE00000M000
    1U_0201_6.3V6M 22U_0603_6.3V6M
    2 1 PC1304 PC1274 2 1
    1U_0201_6.3V6M 1U_0201_6.3V6M @U42@ PC1387

    22U_0603_6.3V6M
    22U_0603_6.3V6M
    PC1241 U22@
    PC1387 U22@
    @

    2 1 2 1
    SE00000M000
    SE00000M000

    PC1369 22U_0603_6.3V6M PC1240


    1U_0201_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 PC1305 PC1275 2 1
    22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

    1U_0201_6.3V6M 1U_0201_6.3V6M U42@ PC1241


    PC1370 2 1 22U_0603_6.3V6M U22@ PC1213

    4
    4

    1U_0201_6.3V6M 2 1 22U_0603_6.3V6M
    2 1 PC1288 2 1
    1U_0201_6.3V6M U42@ PC1244

    PC1348 U22@
    PC1335 U22@

    SE00000M000
    SE00000M000
    PC1371 22U_0603_6.3V6M U22@ PC1230
    1U_0201_6.3V6M 22U_0603_6.3V6M
    2 1 2 1

    22U_0603_6.3V6M
    22U_0603_6.3V6M
    PC1372 @U22@ PC1210
    1U_0201_6.3V6M 22U_0603_6.3V6M
    U22_Normal cap

    PC1354 U22@
    PC1350 U22@

    SE00000M000
    SE00000M000

    22U_0603_6.3V6M
    22U_0603_6.3V6M
    PC1201 U22@
    PC1214 U22@

    SE00000M0M0
    SE00000M0M0

    22U_0603_6.3V6M
    22U_0603_6.3V6M

    PC1352 U22@

    SE00000M000
    22U_0603_6.3V6M
    VCC_CORE

    PC1239 U22@
    PC1204 U22@

    SE00000M0M0
    SE00000M0M0
    U22 low noise cap_H=0.8

    22U_0603_6.3V6M
    22U_0603_6.3V6M
    U22:330u_B2*2 pcs
    U42:330u_B2*4 pcs

    U22:1U_0201*54 pcs
    U42:1U_0201*54 pcs
    U22:22U_0603*27 pcs
    U42:22U_0603*23 pcs

    PC1234 U22@
    PC1202 U22@

    SE00000M0M0
    SE00000M0M0

    22U_0603_6.3V6M
    22U_0603_6.3V6M
    PC1235 U22@
    PC1232 U22@

    SE00000M0M0
    SE00000M0M0

    3
    3

    22U_0603_6.3V6M
    22U_0603_6.3V6M
    +VCCGT

    +VCCSA

    2 1 2 1 2 1 2 1 2 1
    2
    1
    +
    @

    PC1322 PC1310 PC1280 PC1307 PC1225 PC1334


    1U_0201_6.3V6M 22U_0603_6.3V6M 1U_0201_6.3V6M 330_B2_2.5VM_R9M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1 2 1 2 1 2 1
    2
    1
    +
    @

    PC1323 PC1312 PC1281 PC1360 PC1246


    1U_0201_6.3V6M 22U_0603_6.3V6M 1U_0201_6.3V6M PC1329 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1 2 1 330_B2_2.5VM_R9M 2 1 2 1
    @

    PC1324 PC1314 PC1282 PC1248 PC1220


    2
    1
    +

    1U_0201_6.3V6M 22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


    2 1 2 1 2 1 @ PC1556 2 1 2 1
    330_B2_2.5VM_R9M
    @

    PC1325 PC1315 PC1283 PC1331 PC1336


    1U_0201_6.3V6M 22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1 2 1 2 1 2 1
    @

    PC1326 PC1316 PC1284 PC1247 PC1217


    1U_0201_6.3V6M 22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1 2 1 2 1 2 1
    @

    PC1327 PC1318 PC1285 PC1356 PC1253


    1U_0201_6.3V6M 22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1 2 1 2 1 2 1
    @

    PC1328 PC1319 PC1286 PC1344 PC1351


    1U_0201_6.3V6M 22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1 2 1 2 1

    Issued Date
    @

    PC1320 PC1339 PC1346 PC1227


    22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1 2 1 2 1
    Security Classification

    2
    2

    PC1317 PC1340 PC1308 PC1223


    22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
    2 1 2 1 2 1

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