Ug893 Vivado Ide
Ug893 Vivado Ide
Ug893 Vivado Ide
of this document
Chapter 1: Introduction
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Project Mode and Non-Project Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Launching the Vivado Design Suite. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Using the Getting Started Page. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Adding Design Tools or Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Introduction
Overview
The Vivado® Integrated Design Environment (IDE) provides an intuitive graphical user
interface (GUI) with powerful features. All of the tools and tool options are written in native
tool command language (Tcl) format, which enables use both in the Vivado IDE or Vivado
Design Suite Tcl shell. Analysis and constraint assignment is enabled throughout the entire
design process. For example, you can run timing or power estimations after synthesis,
placement, or routing. Because the database is accessible through Tcl, changes to
constraints, design configuration or tool settings happen in real time, often without forcing
re-implementation.
You can improve design performance using the new algorithms delivered by the Vivado IDE,
including:
The Vivado IDE uses a concept of opening designs in memory. Opening a design loads the
design netlist at that particular stage of the design flow, assigns the constraints to the
design, and then applies the design to the target device. This provides the ability to
visualize and interact with the design at each design stage.
You can experiment with different implementation options, refine timing constraints,
explore the Vivado IP catalog, perform simulation, and apply physical constraints with
floorplanning techniques to help improve design results. Early estimates of resource
utilization, interconnect delay, power consumption, and routing connectivity can assist with
appropriate logic design, device selection, and floorplanning. As the design moves through
the implementation flow, you can further refine the design.
IMPORTANT: The Vivado IDE supports designs that target 7 series and newer devices only.
TRAINING: To help you learn more about the concepts presented in this document, you can attend the
Designing FPGAs Using the Vivado Design Suite 1, Designing FPGAs Using the Vivado Design Suite 2,
Designing FPGAs Using the Vivado Design Suite 3, and Designing FPGAs Using the Vivado Design Suite
4 Training Courses.
In Project Mode, the Vivado IDE supports several features that are not available in
Non-Project Mode:
These features provide several advantages from an ease-of-use perspective. For example,
when opening a previously created project in the Vivado IDE, you see the current state of
the design, run results, and previously generated reports and messages. Using the Flow
Navigator, a single click on Generate Bitstream synthesizes and implements the design,
and generates a bitstream file. In addition, you can cross probe from an error message
directly to the source file.
Note: Installation, licensing, and release information is available in the Vivado Design Suite User
Guide: Release Notes, Installation, and Licensing (UG973) [Ref 2].
RECOMMENDED: You can open the Vivado IDE from any directory. However, Xilinx recommends
running it from a project directory, because the Vivado IDE log and journal files are written to the
launch directory. When running from a command prompt, launch the Vivado IDE from the project
directory, or use the vivado -log and -journal options to specify a location. When using a
Windows shortcut, you must modify the Start in folder, which is a Property of the shortcut.
Alternatively, you can launch the Vivado IDE by double-clicking the project file (.xpr extension) to
ensure that the log and journal files are written to the project directory.
Note: You can also double-click the Vivado IDE shortcut icon on your desktop.
X-Ref Target - Figure 1-1
TIP: On Windows 7 systems, you can right-click the Vivado IDE shortcut icon, and select Pin to Start
Menu or Pin to Taskbar to provide quick access to the Vivado IDE.
Launching the Vivado IDE from the Command Line on Windows or Linux
Enter the following command at the command prompt:
<install_path>/Vivado/<version>/bin/vivado
Note: When you enter this command, it automatically runs vivado -mode gui to launch the
Vivado IDE. If you need help, type vivado -help.
TIP: To add the Vivado tools path to your current shell/command prompt, run settings64.bat or
settings64.sh from the <install_path>/Vivado/<version> directory.
Launching the Vivado IDE from the Vivado Design Suite Tcl Shell
Enter the following command at the Tcl command prompt:
start_gui
• Enter individual Tcl commands in the Vivado Design Suite Tcl shell outside of the
Vivado IDE.
• Run Tcl scripts from the Vivado Design Suite Tcl shell.
• Enter individual Tcl commands in the Tcl Console at the bottom of the Vivado IDE.
• Run Tcl scripts from the Vivado IDE.
For more information about using Tcl and Tcl scripting, see the Vivado Design Suite User
Guide: Using Tcl Scripting (UG894) [Ref 3] and Vivado Design Suite Tcl Command Reference
Guide (UG835) [Ref 4]. For a step-by-step tutorial that shows how to use Tcl in the Vivado
tools, see the Vivado Design Suite Tutorial: Design Flows Overview (UG888) [Ref 5].
Note: Alternatively, you can type <command_name> -help in the Tcl Console or at the Vivado
Design Suite Tcl shell for information about the specified command.
Note: On Windows, you can also select Start > All Programs > Xilinx Design Tools > Vivado
<version> > Vivado <version> Tcl Shell.
Note: When working in batch mode, the Vivado tools exit after running the specified script.
TIP: To create scripts, you can copy the Vivado IDE Tcl commands from the vivado.jou file or from
the Tcl Console.
Note: To open the Getting Started Page, all open projects must be closed.
X-Ref Target - Figure 1-2
The Vivado IDE Getting Started Page assists you with creating and opening projects,
running Vivado IDE commands, and viewing documentation as follows:
• Quick Start
° Create Project: Opens the New Project wizard to guide you through creating
various supported project types. You can also use the wizard to import previously
created projects from the PlanAhead™ tool (.ppr extension) or from the ISE®
Design Suite (.xise extension).
° Open Project: Opens a browser that enables you to open any Vivado IDE project
file (.xpr extension).
° Open Example Project: Opens the Open Example Project wizard to guide you
through creating one of the following example projects, which includes specifying a
project name and location and choosing from a list of valid parts:
- Base MicroBlaze: Small Vivado IP integrator MicroBlaze™ processor design
targeting a user-specified board. The design walks you through bitstream
generation in the Vivado Design Suite, application code development in the
Vitis™ software development platform, and simulation of the design in the
Vivado Design Suite using an ELF file generated by the Vitis software platform.
- Base Zynq: Small Vivado IP integrator Zynq®-7000 SoC design targeting a
Zynq-7000 SoC evaluation board. The design walks you through bitstream
generation in the Vivado Design Suite and application code development in the
Vitis software platform for the Zynq-7000 SoC.
- BFT: Small RTL project.
- Configurable MicroBlaze: Vivado IP integrator MicroBlaze processor design
targeting various Xilinx evaluation boards. The design allows you to specify the
local memory size and whether to instantiate DDR4, UART, or GPIO IP. You can
customize the UART IP to a specified baud rate or customize the GPIO IP to
interface to DIP switches, LED, push buttons, or rotary switches. You can
implement the design in the Vivado Design Suite, export the hardware to the
Vitis software platform for application code development, and simulate the
design in the Vivado Design Suite using a test bench that you supply and an ELF
file generated by the Vitis software platform.
- Configurable Zynq UltraScale+ MPSoC Design: Zynq UltraScale+™ MPSoC
design targeting various Xilinx evaluation boards. The design allows you to
specify the local memory size and whether to instantiate DDR4, UART, or GPIO
IP. You can customize the UART IP to a specified baud rate or customize the
GPIO IP to interface to DIP switches, LED, push buttons, or rotary switches. You
can implement the design in the Vivado Design Suite, export the hardware to
the Vitis software platform for application code development, and simulate the
design in the Vivado Design Suite using a test bench that you supply and an ELF
file generated by the Vitis software platform.
- CPU (HDL): Large mixed-language RTL project.
TIP: To download additional example designs, click the Update Example Project Repositories button
in the Open Example Project wizard.
• Tasks
° Manage IP: Opens or creates an IP project for customizing and managing IP. The
Vivado IP catalog displays Xilinx, third-party, or user-created IP, which can be
customized to create IP cores for a specified device. You can also view or
re-customize existing IP cores and generate output products, including a netlist of
the IP standalone.
° Open Hardware Manager: Opens the Vivado Design Suite hardware manager to
connect to a target JTAG cable or board, which enables you to program your design
into a device. The Vivado logic analyzer and Vivado serial I/O analyzer features of
the tool enable you to debug your design.
° Xilinx Tcl Store: Opens the Xilinx Tcl Store, an open source repository of Tcl code
designed primarily for use with the Vivado Design Suite. The Tcl Store provides
access to multiple scripts and utilities contributed from different sources, which
solve various issues and improve productivity. You can install Tcl scripts and also
contribute Tcl scripts to share your expertise with others. For more information, see
this link in the Vivado Design Suite User Guide: Using Tcl Scripting (UG894) [Ref 3].
TIP: Use the keyword search in the Xilinx Tcl Store to find the applications you want to install.
VIDEO: For an overview of the Xilinx Tcl store, including how to install, use, and contribute to Tcl scripts,
see the Vivado Design Suite QuickTake Video: Introduction to the Xilinx Tcl Store.
• Learning Center
° Release Notes Guide: Opens the Vivado Design Suite User Guide: Release Notes,
Installation, and Licensing (UG973) [Ref 2].
Note: For more information about the Xilinx Documentation Navigator, see the Vivado Design
Suite User Guide: Getting Started (UG910) [Ref 6].
• Recent Project, Recent Checkpoints, and Recent IP Locations: Provides one-click
access to recently opened projects, checkpoints, or IP locations. These lists only appear
after you open projects, checkpoints, or IP locations.
Note: By default, the last ten previously opened projects, checkpoints, or IP locations are listed.
To change this number, select Tools > Settings, and update the Recent settings in the Project
options under Tool Settings. The Vivado IDE checks that the project data is available before
displaying the projects.
Overview
This chapter contains general information on the terminology, layout, and project features
of the Vivado® IDE. It does not contain information on the Vivado IDE design flow. For
information on the design flow, see the following documents:
• Vivado Design Suite User Guide: Design Flows Overview (UG892) [Ref 1]
• Vivado Design Suite User Guide: Designing with IP (UG896) [Ref 7]
• Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)
[Ref 8]
• Vivado Design Suite User Guide: Logic Simulation (UG900) [Ref 9]
• Vivado Design Suite User Guide: Synthesis (UG901) [Ref 10]
• Vivado Design Suite User Guide: Using Constraints (UG903) [Ref 11]
• Vivado Design Suite User Guide: Implementation (UG904) [Ref 12]
• Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
[Ref 13]
• Vivado Design Suite User Guide: Programming and Debugging (UG908) [Ref 14]
VIDEO: For more information on tool usage and features, see the Vivado Design Suite QuickTake
Video Tutorials. These video tutorials target specific topics in brief video presentations.
TIP: For quick access to information on different parts of the Vivado IDE, click the Quick Help button
in the window or dialog box, or press the F1 key.
1. Menu Bar
2. Main Toolbar
3. Flow Navigator
4. Data Windows Area
5. Menu Command Quick Access Search Field
6. Workspace
7. Project Status Bar
8. Layout Selector
9. Status Bar
10. Results Windows Area
X-Ref Target - Figure 2-1
1 2 3 4 5 6 7 8
9 10
X10967
Menu Bar
The main menu bar provides access to Vivado IDE commands. Commonly-used commands
always display (for example, File > Project > Open) while others display only when a
design is active (for example, Reports > Report DRC). Some menu commands have a
related keyboard shortcut that is listed next to the menu command. For information on
defining your own keyboard shortcuts, see Configuring Shortcut Keys in Chapter 4.
Note: In addition to menu commands, the command search field reports project names and files
that display under the Open Recent Project and Open Example Project commands in the File
menu.
Main Toolbar
The main toolbar provides one-click access to the most commonly used commands in the
Vivado IDE. When you hover the mouse cursor over a button, a tooltip appears that
provides more information about the command.
TIP: You can set the amount of time before a tooltip appears and disappears. You can also set whether
to show tooltips for menu commands. Select Tools > Settings. In the Tool Settings section of the
Settings dialog box, click the Help category, and set the Tooltips and Quick Help settings.
Flow Navigator
The Flow Navigator provides access to commands and tools to take your design from
design entry to bitstream creation. As you run these commands and tools, the design data,
graphical windows, and results windows update. The different sections in the Flow
Navigator enable you to do the following:
• Project Manager: Change settings, add or create sources, view language templates,
and open the Vivado IP catalog. For information on adding sources, see this link in the
Vivado Design Suite User Guide: System-Level Design Entry (UG895) [Ref 15]. For
information on language templates, see Using Language Templates. For information on
the IP catalog, see this link in the Vivado Design Suite User Guide: Designing with IP
(UG896) [Ref 7].
• IP Integrator: Create, open, or generate a block design. For information on the Vivado
IP integrator, see the Vivado Design Suite User Guide: Designing IP Subsystems Using IP
Integrator (UG994) [Ref 8].
• Simulation: Change simulation settings or simulate the active design. For information
on simulation, see the Vivado Design Suite User Guide: Logic Simulation (UG900) [Ref 9].
• RTL Analysis: Open an elaborated design, run design rule checks (DRCs), and generate
an RTL schematic. For information on the Schematic window, see Using the Schematic
Window in Chapter 3. For information on elaborating the RTL design, see this link in
the Vivado Design Suite User Guide: System-Level Design Entry (UG895) [Ref 15].
• Synthesis: Change synthesis settings, synthesize the active design, or open the
synthesized design. You can right-click Open Synthesized Design, and select New
Synthesized Design to load a second design. You can also right-click and select Open
Netlist in New Window to compare the designs side by side. For information on
synthesis, see the Vivado Design Suite User Guide: Synthesis (UG901) [Ref 10].
• Implementation: Change implementation settings, implement the active design, or
open the implemented design. For information on implementation, see Vivado Design
Suite User Guide: Implementation (UG904) [Ref 12].
• Program and Debug: Change bitstream settings, generate a bitstream file, open a
hardware session in the Vivado IDE, and launch the Vivado logic analyzer. For
information on programming and debugging, see Vivado Design Suite User Guide:
Programming and Debugging (UG908) [Ref 14].
TIP: Right-click a Run command to see available commands. For information on run management, see
Design Runs Window Commands in Chapter 3.
After opening a design, the section displays in bold to show that a design is loaded into
memory. In addition, the Open command changes. For example, Open Synthesized Design
changes to Synthesized Design. If you have multiple stages of the design loaded, you can
click the sections in the Flow Navigator to switch between design stages (for example, RTL
Analysis or Synthesis).
To make more screen space available for other windows during design analysis, you can
hide the Flow Navigator as follows:
Layout Selector
The Vivado IDE provides predefined window layouts to facilitate various tasks in the design
process. The layout selector (Figure 2-3) enables you to easily change window layouts.
Alternatively, you can change layouts using the Layout menu in the menu bar.
X-Ref Target - Figure 2-3
TIP: You can also create custom view layouts that meet your specific requirements as described in
Configuring Custom View Layouts in Chapter 4.
TIP: When one or more designs become out-of-date, a More Info link appears in the project status bar.
Click the link to view information about the changes that caused the design to become out-of-date.
TIP: To display the total memory heap size and amount used by the Vivado IDE, double-click the drag
handle in the status bar. By default, memory cleanup occurs automatically, but you can click the trash
can button to force a memory cleanup.
• Sources window: Displays the Hierarchy, IP Sources, Libraries, and Compile Order
views.
• Netlist window: Provides a hierarchical view of the elaborated or synthesized logic
design.
• Properties window: Displays information about selected logic objects or device
resources.
Workspace
The workspace displays windows with a graphical interface and those that require more
screen space, including:
• Text Editor for displaying and editing text-based files and reports
• Schematic window
• Device window
• Package window
• Tcl Console: Allows you to enter Tcl commands, and view the history of previous
commands and output.
• Messages: Shows all messages for the current design, categorized by process and
severity.
• Log: Shows the log files created by the synthesis, implementation, and simulation runs.
• Reports: Provides quick access to the reports generated throughout the design flow for
the active run.
• Designs Runs: Manages runs for the current project.
The Find Results, Package Pins, and I/O Ports windows as well as various reports appear in
this area as needed. For more information, see Chapter 3, Using Windows.
Status Bar
The status bar displays the following information:
• Detailed descriptions for menu and toolbar commands appear on the lower left side of
the status bar when you access the command.
• During placement and constraint creation in the Device and Package windows,
constraint type and validity appear on the left side of the status bar, and site
coordinates and type display on the right side.
• Object details appear in the status bar when you hover over an object in the Schematic
window.
• The task progress bar appears on the right side of the status bar when you select the
Background button on a running task.
IMPORTANT: Any operation that uses Tcl is blocked while a task is running in the background. You can
still view reports or view an open design, but you cannot make modifications.
Creating Projects
You can use the New Project wizard to easily create different types of projects in the Vivado
IDE. To open the New Project wizard, select File > Project > New. This wizard enables you
to specify a project location and name and create the types of projects shown in Figure 2-4.
As you proceed through the wizard, you optionally specify sources, IP, and constraint files,
followed by a Xilinx® board or part to complete project creation. For more information, see
this link in the Vivado Design Suite User Guide: System-Level Design Entry (UG895) [Ref 15].
The default project type is RTL. If you want to create a netlist project specify:
Note: This command corresponds to the Copy Sources into Project option in the Add Sources
wizard.
TIP: You can use the PATH_MODE property with the add_files Tcl command to specify whether to
use absolute or relative paths. By default, relative paths are used. For more information, see this link in
the Vivado Design Suite Properties Reference Guide (UG912) [Ref 16].
For more information on creating a project using Tcl, see the following documents:
• Vivado Design Suite User Guide: Design Flows Overview (UG892) [Ref 1]
• Vivado Design Suite User Guide: Using Tcl Scripting (UG894) [Ref 3]
Note: You can also access the Tool Settings from the Settings dialog box. For more information, see
Specifying Tool Settings in Chapter 4.
TIP: When entering or modifying data in a text box, if a value is used and editable, the text is black and
the background is white. If a value is used but not editable, the text is black and the background is gray.
If a value is unused or not applicable, the text is gray, including the label that precedes or follows it.
The Settings dialog box opens with the following categories on the left side under Project
Settings:
• General: Shows the project name and enables you to change the part, specify the top
module name, and set language options. For more information, see this link in the
Vivado Design Suite User Guide: System-Level Design Entry (UG895) [Ref 15].
• Simulation: Enables you to specify the target simulator, including the Vivado simulator
and supported third-party simulators. Displays the simulation set, the simulation top
module name, top module (design under test), and a tabbed listing of compilation,
elaboration, simulation, netlist, and advanced options. For more information, see this
link in the Vivado Design Suite User Guide: Logic Simulation (UG900) [Ref 9].
• Elaboration: Enables you to specify whether to load the Netlist model or the Black
box model (stub file) for IP in the elaborated design. Selecting the netlist model
provides more details about the IP and allows you to perform I/O planning of IP.
Selecting the black box model enables faster loading. With either option, you must
generate the IP first. However, the black box model does not load the IP checkpoint,
which saves time. Selecting the Load constraints option includes constraints in the
design. The Vivado IDE only displays these constraints if you select the Netlist model
for the IP. For more information, see this link in the Vivado Design Suite User Guide:
System-Level Design Entry (UG895) [Ref 15].
• Synthesis: Shows the default constraints set. It also provides an options area for
selecting a synthesis strategy and for setting synthesis command line options. The
command line options are defined by the selected synthesis strategy, but you can
override these with your own selections. A description of the selected command line
option displays at the bottom of the dialog box. For more information, see this link in
the Vivado Design Suite User Guide: Synthesis (UG901) [Ref 10].
• Implementation: Shows the default constraints set. It also enables you to specify a
placed and routed checkpoint to use as a reference for the next implementation run. It
provides an options area for selecting an implementation strategy and for setting
command line options for the opt_design, power_opt_design, place_design,
phys_opt_design, and route_design tool steps that occur during implementation.
The command line options are defined by the selected implementation strategy, but
you can override the setting with your own selections. A description of the selected
command line option displays at the bottom of the dialog box. For more information,
see this link in the Vivado Design Suite User Guide: Implementation (UG904) [Ref 12].
• Bitstream: Specifies the bitstream options to use. A description of the selected
command line option displays at the bottom of the dialog box. For more information,
see this link in the Vivado Design Suite User Guide: Programming and Debugging
(UG908) [Ref 14].
Note: After a design is loaded, additional bitstream settings are available by selecting Tools >
Edit Device Properties. For more information, see Editing Device Properties.
• IP: Shows all user-specified repositories and allows you to specify additional locations.
You can also specify settings for the Vivado IP packager, IP caching, core containers,
and simulation scripts. For more information, see this link in the Vivado Design Suite
User Guide: Designing with IP (UG896) [Ref 7].
• Search: Opens the search bar to allow you to quickly locate objects in the Language
Templates.
Note: You can also access this command through the Alt+/ keyboard shortcut.
• Collapse All: Collapses all hierarchical tree objects to display only the top-level objects.
• Expand All: Expands all hierarchical tree objects to display all elements.
• Sort Alphabetically: Sorts the file tree alphabetically.
• Flow Navigator
• Flow menu
• Main toolbar
• Design Runs window
The Vivado IDE provides “one click” execution for any stage of the design. For example, to
view the RTL analysis elaborated design, click Open Elaborated Design in the Flow
Navigator or the Flow menu. The design displays with the default layout.
To run the design through the entire flow and generate a bitstream file, click Generate
Bitstream in the Flow Navigator or the Flow menu. Synthesis and implementation are run
(if required), and the bitstream file is created. The state of the design is tracked in the
Vivado IDE, so only the required implementation steps are run. For example, modifying
implementation-specific constraints does not result in synthesis becoming out-of-date.
• Vivado Design Suite User Guide: Design Flows Overview (UG892) [Ref 1]
• Vivado Design Suite User Guide: System-Level Design Entry (UG895) [Ref 15]
• Vivado Design Suite User Guide: Synthesis (UG901) [Ref 10]
• Vivado Design Suite User Guide: Implementation (UG904) [Ref 12]
Opening Designs
Use the Flow Navigator or Flow menu to select the following commands:
TIP: In the Design Runs window, you can right-click a design run, and select Open Run to open the
design.
The Flow > Open Implemented Design command populates the Vivado IDE as shown in
Figure 2-7.
Note: When you open an implemented design, the Vivado IDE opens the timing summary and
power report created with the implementation run. You cannot modify these reports. If you make
design changes, update constraints, or want to modify the report settings, select Reports > Timing
> Report Timing Summary or Reports > Report Power to create a new, configurable report. To
open an existing report, select Reports > Open Interactive Report or use the open_report Tcl
command.
Critical warnings and errors are displayed in a popup dialog box (Figure 2-8) when opening
a project, loading a design, or creating or launching runs. This ensures that you are aware of
any issues that might require your attention. These messages also display in the Messages
window.
X-Ref Target - Figure 2-8
• Vivado Design Suite User Guide: Design Flows Overview (UG892) [Ref 1]
• Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
[Ref 13]
• Results name: Labels the Find Results window that shows the found objects.
• Find: Filters the type of object to search.
• Properties: Specifies the Tcl properties used to find the design or device objects. Click
the add button to add properties. Click the remove button to remove
properties.
• Regular expression: Searches for the specified string by matching text patterns based
on regular expression syntax.
• Ignore case: Searches for the specified regular expression string, regardless of whether
the string uses upper or lowercase.
• Search hierarchically: Searches through the entire design hierarchy.
• Of Objects: Specifies a particular object to search. Click the Of Objects (...) button to
open a new dialog box and specify the objects to search.
• Command: Shows the Tcl command that is run to execute the search.
• Open in a new tab: Opens a new Find Results tab instead of replacing the previous
results.
X-Ref Target - Figure 2-9
Note: By default, the get_* Tcl command truncates the returned results in the Tcl Console and log
file after the first 500 results. For more information, including how to change the default setting, see
the Vivado Design Suite Tcl Command Reference Guide (UG835) [Ref 4].
Finding Objects
In the Find dialog box, you can click the Of Objects button (...) to open the Of Objects dialog
box, which enables you to specify a particular object to search. Figure 2-13 shows the Of
Objects dialog box settings for a search for a specific slice.
X-Ref Target - Figure 2-13
After specifying the slice, you can search for the occupied BELs, as shown in Figure 2-14.
X-Ref Target - Figure 2-14
Editing Properties
You can edit object properties, such as files, cells, designs and I/Os. To edit device
properties, including programming and configuration properties, use the Edit Device
Properties dialog box. To update properties for multiple objects, use the Property Editor.
TIP: To edit properties for a single object, use the Properties window as described in Using the
Properties Window in Chapter 3.
IMPORTANT: When you edit the properties, the constraints are in memory. Select File > Constraints >
Save to write the properties to the target constraint file.
• To adjust the Property Editor display, click the Settings toolbar button . Edit the
options that control the display of the header, types of objects, and properties
(Figure 2-18).
• To filter the displayed data, right-click in the Property Options, and select a filter
command. For example, select Show Columns with Differences to filter out columns
in which all of the data is the same.
• To change the value of a property for multiple objects, change a value in a cell at the
top or bottom of the list. Press Ctrl or Shift and select the modified cell as well as the
cells you want to change. Click the Fill Up or Fill Down toolbar button.
• To add more objects to the Property Editor, drag the objects from the workspace
window, and drop them onto the Property Editor. Alternatively, select the objects and
click the Add Selected Objects toolbar button .
• Fill Up: Applies the changed value to all selected cells above the changed cell.
• Fill Down: Applies the changed value to all selected cells below the changed cell.
• Add Selected Objects: Adds selected objects to the list.
• Remove Selected Objects: Removes the selected object from the list.
• Settings: Controls the following settings that affect the display of information.
° Options:
- Group Header: Groups headers for related properties, such as MEM properties
(Figure 2-19).
- Autoscroll to Selected: Scrolls the list of objects in the Property Editor to show
the objects selected in other windows, such as the Sources or Netlist windows.
Using Windows
Overview
This chapter contains general information that applies to all windows in the Vivado® IDE.
For example, it covers controlling the size and location of a window. In addition, it covers
features that apply only to specific windows, such as:
1. Title bar
2. Window tabs
3. Local toolbar
4. Window views
X-Ref Target - Figure 3-1
2
3
4
X13266-
041017
Window Tabs
Each window has a tab that you can select to make that window active. The tab is at the top
of most windows, such as the Log, Tcl Console, and Messages windows.
TIP: To make the next tab active in the workspace, press Ctrl+Tab. To make the previous tab active in
the workspace, press Ctrl+Shift+Tab. To maximize or minimize the window, double-click the window
tab, or press Alt -.
Window Views
Some windows include different views of the same data. For example, the Log window
includes views for Synthesis, Implementation, and Simulation (Figure 3-2).
TIP: When the number of views is greater than the space available, you can use the left and right
arrows that appear on the right side of the window to scroll the tabs. Alternatively, you can hover over
the tabs and use the scroll wheel on your mouse to scroll the tabs.
Window Controls
Each window has the following window controls, which enable you to manipulate the
window (Figure 3-3):
1. Quick Help
2. Minimize
3. Maximize
4. Float/Dock
5. Close
X-Ref Target - Figure 3-3
1 3 5
2 4
X13265
You can move, resize, float, or close windows as described in the following sections.
TIP: After arranging windows in a configuration that works for you, you can save the layout for future
use, as described in Configuring Custom View Layouts in Chapter 4.
Moving Windows
1. Select the window tab or title bar, and drag the window.
A gray outline indicates where the window will be located after the move.
IMPORTANT: You cannot move windows into or out of the workspace. However, you can resize and
move the windows within the workspace as described in Using the Workspace.
Resizing Windows
To resize windows:
TIP: To maximize or restore the window, double-click the window tab or title bar, or press Alt -.
Floating Windows
You can undock a window, including windows in the workspace, from the display docking
area. The window appears in a separate floating window, which allows it to be moved and
sized independently.
To float a window:
• In the upper right corner of the window, click the Float button.
• Right-click the window tab or title bar, and select Float from the popup menu.
Note: If windows overlap, you can move a floating window by dragging the window title bar. You
can also move a floating window to another monitor display.
Closing Windows
To close windows:
• In the upper right corner of the window, click the Close button.
Note: In some cases, this button is also available in the window tab.
• Right-click the window tab or title bar, and select Close from the popup menu.
TIP: You can also press the Esc key to close the window.
• Use the expand and collapse buttons to expand or collapse portions of the
tree.
• In the local toolbar, use the Expand All and Collapse All buttons to expand or
collapse the entire tree.
TIP: To clear a filter, right-click the Filtered Column icon, and select (All). To clear all filters but leave
the filter feature enabled, select Clear All Column Filters.
1. In the local toolbar, click the Search button to display a search field in the banner of
the window.
Note: You can also access this command through the Alt+/ keyboard shortcut.
2. Optionally, select the drop-down menu on the left of the search field, and select search
criteria, including which columns to search (Figure 3-8).
X-Ref Target - Figure 3-8
When you enter a text string, the list adjusts dynamically to list only those entries that
contain the string. Click the Search button again to hide the Search field and filtering.
Sorting Columns
You can sort table columns in increasing or decreasing order according to the sort criteria
of the selected column. A visual indication of the sort order displays in the column header,
as shown in Figure 3-9.
X-Ref Target - Figure 3-9
;
Organizing Columns
To organize columns:
;
TIP: When you request data from a report that was reset or is not part of the run, the gadget displays
a message stating the information is unavailable. To resolve this issue, verify that the report type is part
of the Report Strategy. Then, add the report type, change the report type in the gadget, or launch the
run to generate the report as needed.
Using Gadgets
You can click the Add Gadget button to open the Configure Gadget dialog box
(Figure 3-13), which allows you to create a gadget that shows customized data for your
runs. In the Configure Gadget dialog box, set the following options, and click OK to add the
gadget to your Dashboard.
Note: You can also open the Configure Gadget dialog box using the Edit button in the gadget
header.
• Name: Specify a name to identify the gadget for use in running Tcl commands.
• Type: Select the report type to use to generate the gadget data (e.g., Timing).
• Run Type: Select either the Synthesis or Implementation run.
• Stages: If you are analyzing an Implementation run, select an implementation stage
(e.g., Place), or select All Stages. If you are analyzing a Synthesis run, only one stage is
available.
• View Type: Set the gadget to display as a graph or as a table. You can change the
display after adding the gadget using the Graph/Table toolbar button / in the
gadget header.
• Orientation: Select a Vertical or Horizontal orientation for the graph.
Note: This option is not available for tables.
• Reports: Select reports from one or more runs to display related data for your gadget.
• Statistics: Select the statistics to display in the gadget. The available statistics are
based on the selected reports.
• Hide Unused Data: Select this option to hide statistics entries that contain no data. To
display all statistics, deselect this option.
• To move a gadget, click and drag the gadget to any location in the Dashboard.
• To widen or narrow the gadget along with all gadgets in the selected column, click and
drag the edge of the gadget.
• To view or hide data in the Dashboard, use the Maximize or Collapse toolbar
button in the gadget header.
• Design sources
• Constraint files
• Simulation sources
• IP cores
Generally, the Sources window is available in the Vivado IDE whenever a project is open. To
open the Sources window, select Window > Sources. The Sources window includes the
following folders:
• Design Sources: Displays source file types, including Verilog, VHDL, NGC/NGO, EDIF, IP
cores, digital signal processing (DSP) modules, and XDC and SDC constraint files.
° Syntax Error Files: Displays files with syntax errors that affect the design hierarchy.
IMPORTANT: Messages, such as Critical Warnings, encountered during the building of the hierarchy
display at the top of the hierarchy tree in the Sources window.
• Hierarchy View
• IP Sources View
• Libraries View
• Compile Order View
Hierarchy View
The Hierarchy view displays the hierarchy of the design modules and instances, along with
the source files that contain them. The top module defines the hierarchy of the design for
compilation, synthesis, and implementation. The Vivado IDE automatically detects the top
module, but you can also manually define the top module using the Set as Top command.
For information, see Sources Window Popup Menu Commands.
• Top module
• Missing File/Module/Instance
• Out-of-Context Module
• Global Include File
• Verilog Header File
• Verilog File
• SystemVerilog File
• VHDL File
• Constraint File
• Tcl File
• IP
• Locked IP
• Block Design
• Design Checkpoint
• Netlist
• Hidden Instantiation
• Report
TIP: When a file, module definition, or instantiation of a module is missing in the design hierarchy, the
Show Only Missing Sources button is enabled in the Sources window local toolbar.
IP Sources View
The IP Sources view displays all of the files defined by an IP core. For more information, see
this link in the Vivado Design Suite User Guide: Designing with IP (UG896) [Ref 7].
Libraries View
The Libraries view displays the sources sorted into the various libraries. You can use this
view to create new libraries and manage files.
Alternatively, you can examine the compile order using Tcl commands. For example:
report_compile_order
report_compile_order -fileset sources_1
report_compile_order_-constraints
report_compile_order -constraints -fileset constrs_1
• Search: Opens the search bar to allow you to quickly locate objects in the Sources
window.
Note: You can also access this command through the Alt+/ keyboard shortcut.
• Collapse All: Collapses all hierarchical tree objects to display only the top-level objects.
• Expand All: Expands all hierarchical tree objects to display all elements of the Sources
window.
• Add Sources: Adds or creates constraint files, simulation source files, and design
sources. Design sources include HDL and netlist files as well as existing IP and block
designs.
• Show Only Missing Sources: Filters sources to display missing files or missing
instances. This command is enabled when a file, module definition, or instantiation is
missing in the design hierarchy. When you select the command, the Sources window is
filtered to display the missing files or modules.
TIP: When the toolbar button icon is gray, or disabled, there are no problems with the design hierarchy.
• Messages: Shows a summary of any messages generated during the design run. For
more information, see Using the Messages Window. If there are no messages
associated with your source files, the icon is disabled.
• Settings: Controls the display of information in the window.
° Scroll to Selected Objects: Updates the Sources window to focus on the currently
selected object. This can be useful on large designs with many source files. This
feature is on by default.
• Source File Properties: Opens the Source File Properties window. For more
information, see Viewing Source File Properties.
Note: In the Hierarchy window, this command is called Source Node Properties.
• Open File: Opens source files as follows:
• Remove File From Project: Deletes the selected source files from the project.
Optionally, removes the files from the local project disk location.
• Enable File: Sets the source file status to active for the project. You can toggle source
files between enabled and disabled to define different design configurations.
Note: You can also set the Enabled property in the Source File Properties window. For
information, see Viewing Source File Properties.
• Disable File: Sets the source file status to inactive for the project. You can toggle
source files between enabled and disabled to define different design configurations.
Disabled source files display as shaded gray in the Sources window.
Note: Disabling the file removes the file from the compile list and hierarchy but does not
remove the file from the project.
• Move to Simulation Sources: Relocates currently selected design source files into the
simulation set. If there is more than one simulation set, the application prompts you to
select the simulation set to use.
• Move to Design Sources: Relocates currently selected simulation source files into the
design sources.
• Move to Top: Relocates the currently selected source file to the top of the source file
list in the Compile Order view. The compilation and synthesis of source files is handled
in the order listed in Compile Order view, from top to bottom. The order of files affects
the elaboration, synthesis, and simulation results. The file order displayed in the
Compile Order view is automatically updated or can be manually defined depending on
the setting of the Hierarchy Update command.
IMPORTANT: The Move to Top, Move Up, Move Down, and Move to Bottom commands are only
available from the Compile Order view. Alternatively, you can drag and drop files in the Compile Order
view to change the compile order.
• Move Up: Moves the currently selected source file up in the source file list.
• Move Down: Moves the currently selected source file down in the source file list.
• Move to Bottom: Moves the currently selected source file to the bottom of the source
file list.
• Hierarchy Update: Determines how the Vivado IDE responds to changes of the source
files such as redefined top module, added or removed files, or changed file order.
Select one of the following:
° Automatic Update and Compile Order: Specifies that the Hierarchy view
containing the design and the compilation order is automatically updated as source
files are changed. The Vivado IDE automatically identifies and sets the best top
module candidate. The compile order is also automatically managed, as the top
module file and all sources that are under the active hierarchy are passed to
synthesis and simulation in the correct order. The files that are outside of the
hierarchy defined by the top module are not used.
Note: This setting is selected by default.
° Automatic Update, Manual Compile Order: Specifies that the Hierarchy view
containing the design is automatically updated as source files are changed, but that
the compilation order is determined manually. All files in the project are passed to
synthesis and simulation. The compilation order is manually defined by ordering
the files using the Move to Top, Move Up, Move Down, and Move to Bottom
commands from the Compile Order view.
Note: For imported ISE ® Design Suite projects, this setting is selected by default to preserve
the compile order. If you do not need to preserve the compile order, you can change this
setting to Automatic Update and Compile Order.
° No Update, Manual Compile Order: Specifies that the Hierarchy view is not
automatically updated, and that the compilation order is determined manually. To
update the design hierarchy in this mode, use the Refresh Hierarchy command.
• Refresh Hierarchy: Updates the design hierarchy to reflect the latest source file
changes and top module definition. Use this command to manually refresh the
hierarchy as needed.
• IP Hierarchy: Controls the expansion of the IP displayed in the Hierarchy view. By
default, all IP hierarchy is collapsed.
° Show All IP Hierarchy: Expands the hierarchy for all IP in the Hierarchy view.
Note: Depending on the number of IP in your design, this command might slow down the
refresh for the automatic update of the Hierarchy view.
° Hide All IP Hierarchy: Collapses the hierarchy for all IP in the Hierarchy view.
IMPORTANT: The top module is automatically reset to the best candidate if the specified top module
cannot be found in the design source files, and the hierarchy update mode is set to automatic. In the
Sources window, the top module is indicated by the top module icon .
• Set Global Include: Defines the specified file as a global include file. This command is
available for Verilog source files only.
Note: You can also set the Global Include property in the Source File Properties window. For
information, see Viewing Source File Properties.
• Clear Global Include: Clears the Global Include property from the selected Verilog
source file.
• Make Active: Makes the selected Constraint Set the active constraint set for synthesis
or implementation.
• Set as Target Constraint File: Specifies the file to which Vivado IDE writes new
constraints. For more information on design constraints, see this link in the Vivado
Design Suite User Guide: System-Level Design Entry (UG895) [Ref 15] and see the Vivado
Design Suite User Guide: Using Constraints (UG903) [Ref 11].
• Set as Out-of-Context for Synthesis: Creates a new file set and synthesis run, which
enables you to synthesize the selected level of hierarchy out of context from the rest of
the design. For more information, see this link in the Vivado Design Suite User Guide:
Synthesis (UG901) [Ref 10].
Note: This option only works on levels of RTL hierarchy shown in the Sources window.
• Set Library: Sets a library for the selected RTL source files. You can choose from a list
of libraries that are currently defined in the project, or type a new library in the text
entry field. Entering a new library adds it to the list of currently defined libraries.
Note: You can also set the Library property in the Source File Properties window. For
information, see Viewing Source File Properties.
• Set File Type: Sets the type of the currently selected file or files. The Vivado IDE
automatically recognizes the type of a file as it is added to the project based on
appropriate file extensions. However, you can use the Set File Type command to
redefine the file type in cases of non-standard file extensions.
Note: You can also set the Type property in the Source File Properties window. For information,
see Viewing Source File Properties.
• Set Used In: Specifies the tools the file is used for. You can specify a source file to be
used or not used during synthesis, simulation, or implementation. Disabling a source
file for a particular tool prevents that file from being used by that tool.
For example, if you set a source file as not used in synthesis, and then open the
elaborated design, a black box displays for that source file. Disabling an EDIF or NGC
source file from implementation prevents it from being used during implementation.
Note: You can also set the Used In property in the Source File Properties window. For
information, see Viewing Source File Properties.
• Edit Constraint Sets: Creates and modifies constraint sets.
• Edit Simulation Sets: Creates and modifies simulation sets.
• Add Sources: Adds or creates constraint files, simulation source files, and design
sources. Design sources include HDL and netlist files as well as existing IP and block
designs.
• Go to Source: Opens the source file in which the module or instance is defined.
Note: For more information, see the Vivado Design Suite User Guide: Designing with IP (UG896)
[Ref 7].
• Enable/Disable Core Container: Toggles storing IP as a single file on disk.
• Customize IP: Opens the IP core to allow modification of properties.
• Generate Output Products: Generates target data for the IP core as needed.
• Reset Output Products: Removes the current target data to allow the IP core to be
regenerated as needed.
• Upgrade IP: Upgrades the IP core from an older version to the latest available version.
• Copy IP: Makes a copy of the selected IP and specifies a new name and location.
• Open IP Example Design: Opens an example project for the IP core. This feature is not
available for all IP.
• IP Documentation
° View Product Guide: Opens the IP product guide for the selected IP core.
° View Change Log: Opens the change log for the selected IP core.
° View Product Web Page: Opens the IP web page for the selected IP core if one is
available.
° View Answer Records: Searches the Xilinx® Support database for Answer Records
associated with the IP.
• Copy Shared Logic into Project: Specifies a destination directory for shared logic
files.
• Report IP Status: Opens an IP status report that displays the status, version, change
log, part, and other information for each IP in the design.
Note: For more information, see the Vivado Design Suite User Guide: Designing IP Subsystems Using
IP Integrator (UG994) [Ref 8].
• Create HDL Wrapper: Creates a top-level Verilog or VHDL module that contains the
selected block design.
• View Instantiation Template: Opens the instantiation template for the block design to
instantiate it into another RTL file.
• Generate Output Products: Generates target data for the block design as needed.
• Reset Output Products: Removes the currently generated target data.
The Source File Properties window, located below the Sources window by default,
populates with information such as file location, type, library, size, modified timestamp
date, location copied from, copy date, and parent module.
Note: If the Source File Properties window is hidden, right-click a source file in the Sources
window, and select Source File Properties from the popup menu.
2. In the Source File Properties window, you can change the following settings:
° Type: Changes the file type. This is useful in cases where files have non-standard
extensions, and the file type is not properly detected.
° Library: Specifies a new target library for a source file. Select from the list of
defined libraries, or type a library name.
° Global Include: Sets Verilog source files as global include files. This option forces
the selected file to list at the start of the compile order for elaboration and
synthesis.
° Enabled: Enables the source file in the design. Disabled files display in the source
files in gray text and are not considered part of the design for elaboration or
compilation.
° Used In: Specifies that the source file is used during Synthesis, Simulation, or
Implementation. Disabling a source file for a particular tool prevents that file from
being used by that tool. For example, if you set a source file to not be used in
synthesis, and then open the elaborated design, a black box displays for that source
file. Disabling an EDIF or NGC source file from implementation prevents it from
being used during implementation.
• Leaf Cells: Displays primitive logic for each level of the hierarchy. This folder condenses
the display of logic content and hierarchical modules in the Netlist window
(Figure 3-18).
X-Ref Target - Figure 3-18
• Click the expand and collapse buttons to expand or collapse portions of the
tree.
• Click the Collapse All toolbar button to collapse the entire tree.
When collapsed, the Netlist window displays only the top-level logic modules.
Note: The Netlist tree dynamically expands to display objects selected in other windows. To disable
this feature, click the Settings toolbar button and deselect Scroll to selected objects.
Selecting Elements
In the Netlist window, selection rules work as follows:
• To select multiple elements in the Netlist window, use the Shift key or the Ctrl key
combined with a mouse click. Selected logic is highlighted in the Netlist window.
• When you select logic in a different window, such as the Schematic or Device windows,
the logic is cross-selected in the Netlist window. The Netlist tree expands automatically
to display all selected logic. You might need to scroll the tree to view all selected logic.
• When you select nets, they highlight in the Device window. Selecting a bus highlights
all nets contained within that bus. You can also view nets in the Schematic window.
• To mark nets for debug testing, right-click the net, and select the Mark Debug popup
command. For more information, see this link in the Vivado Design Suite User Guide:
Programming and Debugging (UG908) [Ref 14].
Note: Collapsing the Netlist tree does not deselect logic.
• Bus
• I/O bus
• Net
• I/O net
• Hierarchical cell (logic)
• Hierarchical cell (black box)
Note: Hierarchical cells that do not contain netlists or logic content are interpreted by the
Vivado IDE as black boxes. A hierarchical cell might be a black box by design or might be the
result of a coding error or missing file.
• Search: Opens the search bar to allow you to quickly locate objects in the Device
Constraints window.
• Expand All: Expands all hierarchical tree objects to display all elements of the Device
Constraints window.
• Collapse All: Collapses all hierarchical tree objects to display only the top-level objects.
• Add Constraint: Adds a new DCI Cascade constraint when two or more banks are
selected. Use the Add DCI Cascade dialog box to specify the master bank.
• Remove Constraint: Removes the selected constraint or constraints.
• Settings: Controls the display of information in the window.
° Scroll to selected object: Scrolls the Device Constraints window to display objects
selected in other windows such as the Package Pins or Device windows.
The name of the Properties window changes to reflect the selected object. For example, the
window is called the BEL Properties window when a BEL is selected or the Clock Region
Properties window when a clock region is selected.
The Properties window includes several views to organize information under different
categories. The available views and the information they display depend on the type of
object selected. For example, Figure 3-21 shows the Cell Properties window with the
Properties view displayed for the selected cell.
IMPORTANT: If multiple objects are selected, the Properties window displays the properties for the
most recently selected object. To view and edit properties for multiple objects, use the Property Editor
as described in Editing Properties for Multiple Objects in Chapter 2.
• Search: Opens the search bar to allow you to quickly locate objects in the Properties
window.
• Collapse All: Collapses the hierarchical tree objects to display only the top-level
objects.
• Expand All: Expands all hierarchical tree objects in the Properties window.
• Show or Flatten All Property Hierarchies: Groups the selected items by type.
• Add Properties: Adds a new property to the selected object. This command is available
for certain object types only in the Properties view.
• Remove Properties: Removes a property from the selected object.
• Show Description: Toggles the display of detailed information in the description area
at the bottom of the Properties window.
• Sort Properties: Sorts the property list alphabetically.
• Previous Object: Displays the properties of the previously selected object rather than
the currently selected object. You can use this command iteratively to scroll backward
through the selected objects.
• Next Object: Scrolls forward through the selected objects to display the object
properties. This command is available only after using the Previous Object command.
• Add Properties: Adds a new property to the selected object. This command is available
for certain object types only.
• Remove Properties: Removes a property from the selected object.
• Reset Properties: Resets a property or object from within one of the views of the
Properties window. This command is available for certain object types in certain
windows only.
• Copy Properties: Copies the property to the clipboard.
• Export to Spreadsheet: Exports the information in the Properties window to a
spreadsheet file.
• General View
• Properties View
• Options View
• Log View
• Reports View
• Messages View
General View
The General view reports the configuration of the run and includes the following fields:
Properties View
The Properties view displays a table of properties for the selected run.
Note: To obtain this information in Tcl, use the report_property -all [get_runs
impl_1]command.
Options View
The Options view displays the incremental design checkpoint, the strategy to use for the
run, and the detailed command line options and values for the strategy. It includes the
following fields:
• Write Incremental Synthesis: Includes information in the synthesis checkpoint for the
tools to compare during the next incremental synthesis run.
• Incremental Synthesis/Implementation: Specifies a design checkpoint to use as a
reference for the next synthesis or implementation run. For more information, see this
link in the Vivado Design Suite User Guide: Synthesis (UG901) [Ref 10] and this link in
the Vivado Design Suite User Guide: Implementation (UG904) [Ref 12].
• Strategy: Specifies the predefined strategy to use. You can modify the values of the
command options related to the selected strategy. An asterisk appears next to options
with modified values to indicate that the value was changed from the default.
• Description: Provides details about the selected strategy.
• Save Strategy As: Saves the new option settings as a strategy for later use in other
runs.
• Refresh: Restores the command options window layout to the default.
RECOMMENDED: If you modify the run strategy after you launch the run, the run becomes out-of-date.
Xilinx recommends that you cancel the run and reset it. For more information, see this link in the
Vivado Design Suite User Guide: Implementation (UG904) [Ref 12].
Log View
The Log view displays the same STDOUT command status logs that display in the Log
window. The Log view continues to update as commands run. You can use the scroll bar to
browse through the command log reports. Click Pause output to stop the active reporting.
This allows you to scroll more easily and read results while the command is running.
TIP: Click the Find button or Ctrl+F to use the Find bar to locate specific text.
Reports View
The Reports view displays report files generated by the Vivado design tools. In the
Implementation Run Properties window, select the run, and then select the Reports view to
display the list of available report files. Double-click a report to open it.
In the Reports view, you can also specify an existing report strategy. If a user-defined
strategy is selected, you can add or remove reports, edit the options for existing reports,
and enable or disable reports. For more information, see Creating Report Strategies in
Chapter 4.
For more information on implementation reports, see this link in the Vivado Design Suite
User Guide: Design Analysis and Closure Techniques (UG906) [Ref 13].
Messages View
The Messages view displays only the messages generated by the active run.
• Secondary object: By default, when you click a primary object, secondary objects are
also selected. For more information, see Setting Selection Rules in Chapter 4.
• Multiple objects: Click to select the first object, then press and hold the Ctrl key and
click to select additional objects.
• Range of objects: Click a primary object, then press and hold the Shift key and select
the last object in a range of elements from a tree or table view.
• Timing path: Click a timing path to select the objects within it.
• All objects: Use the Select Area cursor to select all the objects in an area of a graphical
view. Alternatively, most windows support the Ctrl+A keyboard shortcut.
The Selection window (Figure 3-23) displays the list of currently selected objects. You can
sort, deselect, or mark objects from this window. The list updates dynamically as you
manipulate objects. To open the Selection window, select Window > Selection.
X-Ref Target - Figure 3-23
• To sort objects by Name, ID, or Type, click the banner of the sort column.
• To remove selected items from the list, use the Unselect, Unselect All, and Unselect
All Except commands from the popup menu.
• Select multiple objects using the Ctrl and Shift keys, or using the Select Area
command.
Note: The total number of objects selected displays in the window banner.
• To mark selected objects, select the object and then select View > Mark.
Note: Alternatively, you can use the Mark command from the popup menu, the Ctrl+M
keyboard shortcut, or the mark_objects Tcl command to mark objects using the default color.
• To highlight selected objects, select the object and then select View > Highlight to
specify a color for the highlight. The objects are updated with the highlight color across
all open windows.
Note: Alternatively, you can use the Highlight command from the popup menu, the Ctrl+H
keyboard shortcut, or the highlight_objects Tcl command to highlight objects using the default
color.
TIP: To adjust colors, select Tools > Settings. In the Settings dialog box, click the Colors category and
adjust the colors in the Highlight and Mark subcategories. For more information, see Specifying
Colors in Chapter 4.
TIP: To show the mark and highlight commands in the Tcl console, enable the Record Tcl commands
for highlight and mark actions option in the Settings dialog box. For more information, see
Specifying Project Default Settings in Chapter 4.
IMPORTANT: Highlighting is design-specific, and Vivado IDE removes any highlighting when you
reload or modify the design.
The Mark command is also available in other windows, including the Netlist window,
Hierarchy window, and Timing Report window. Figure 3-24 shows a timing path marked
from the Timing Report window. The start point of the timing path is marked in green, the
end point in red, and the through points are marked in yellow.
• Project Summary
• Text Editor
• Device window
• Package window
• Clock Resources
• Schematic window
• Hierarchy window
• Timing Constraints window
• Waveform window
• Diagram window (for block designs)
• Property Editor
• IP Catalog
You can open multiple windows of the same type within the workspace. For example, if you
have one Device window open, you can open a new Device window by selecting Window >
Device. You can use the two Device windows to display different areas of the device.
Note: Although most windows can be opened from the Window menu, the Schematic and
Hierarchy windows must be opened after selecting a logic element from another window. For more
information, see Using the Schematic Window and Using the Hierarchy Window.
• Horizontal, vertical, or diagonal stretch bar symbol: You can stretch Pblock edges
and window view borders.
• Hand symbol: You can move Pblocks, move cells, or drag to pan the view.
• Cross symbol: You can draw rectangles for zooming in, defining pin assignment areas,
or drawing Pblock rectangles.
• Slashed circle symbol: You are dragging objects are over illegal placement sites.
• Zoom Area: Press and hold the left mouse button while drawing a rectangle from top
left to bottom right to define the area to zoom into.
• Zoom In: Press and hold the left mouse button while drawing a diagonal line from
upper right to lower left. This zooms out the window by a variable amount. The length
of the line drawn determines the zoom factor applied. Alternatively, press Ctrl and
scroll the wheel mouse button up to zoom in.
• Zoom Out: Press and hold the left mouse button while drawing a diagonal line from
lower left to upper right. This zooms out the window by a variable amount. The length
of the line drawn determines the zoom factor applied. Alternatively, press Ctrl and
scroll the wheel mouse button down to zoom out.
• Zoom Fit: Press and hold the left mouse button while drawing a diagonal line from
lower right to upper left. The window zooms out to display the entire device.
• Pan: Press Ctrl, and press and hold the left mouse button while dragging to pan.
Alternatively, press and hold the wheel mouse button while dragging to pan.
This feature is available in the Device window, Schematic window, Package window, and
Hierarchy window when you are zoomed into a small region of the device or design. To
display the World view, click the Show World View button in the lower right corner of a
graphical window, as shown in Figure 3-25.
TIP: If the Show World View button is hidden, zoom in on the window. You can also right-click in the
window, and select Show World View.
To reposition the World view, click anywhere on the perimeter of the view, except on the
drag handles, and drag the view to a new position. Use this feature to reposition the World
view anywhere within the limits of the graphical workspace window.
To close the World view, click the downward pointing arrow icon in the view .
Note: When you resize or reposition the World view, it remains at the size and position you chose
even when you close and reopen the view.
You can open two windows of the same type, such as two Device windows for viewing
different areas of the device or different zoom levels. You can also open two different
windows to permit better interaction between the two windows, such as the Device and
Package windows (Figure 3-27).
X-Ref Target - Figure 3-27
• Right-click a window tab, and select New Horizontal Group or New Vertical Group
from the popup menu.
Note: These commands are available in the workspace windows only.
• Select a window tab, and drag it to the edge of the workspace. A gray rectangle shows
a preview of the window location. Position the cursor to arrange the windows as
desired, and release the mouse to move the window and split the workspace.
• Right-click a window tab, and select Move to Previous Tab Group or Move to Next
Tab Group from the popup menu.
• Select a window tab, and drag it onto another window. A gray rectangle appears
around the entire window, showing how the windows will merge.
The Text Editor supports the following features, as shown in Figure 3-28:
A wavy red underline indicates a syntax error, such as shown on Line 41.
Note: Syntax errors can affect syntax that occurs later in the file. Therefore, fixing errors at the
start of the file can fix errors that occur later in the file.
IMPORTANT: If you are using a third-party text editor, you must run syntax checking manually using
the check_syntax Tcl command.
To the right of the scroll bar, a red marker indicates the location of a syntax error or
warning. You can click the marker to scroll to the line with the issue. You can also hover
over the marker to read information about the issue. For Line 41, the syntax error is
<std_logi> is not declared.
• Code completion
You can insert your cursor in a line with an error, and press Ctrl+Space for code
completion suggestions to resolve the error. On Line 41, the drop-down shows multiple
suggestions.
TIP: For information on adjusting the display of syntax highlighting, warnings, errors, and code
completion, see Specifying Text Editor Settings in Chapter 4.
You can also use the following features in the Text Editor:
Select the signal, type, or constant, right-click, and select Find Usages.
• Find: Opens the Find field to enter a text string to search for, or search and replace the
specified text strings.
TIP: Use the Ctrl+F keyboard shortcut to search for text strings, and use the Ctrl+R keyboard shortcut
to replace.
• Go to Definition: Shows the definition for the selected module, architecture, entity, or
signal.
• Undo: Undoes changes in sequential order.
• Redo: Redoes changes in sequential order.
• Cut: Cuts selected text to the clipboard.
• Copy: Copies selected text to the clipboard.
• Paste: Pastes the contents of the clipboard to the cursor location.
• Duplicate Selection: Copies the selected text and pastes it to the cursor location,
immediately in front of the current selection.
• Select All: Selects all text in the Text Editor.
• Toggle Column Selection Mode: Specifies whether to select a block of text characters
as a grid of rows and columns or as lines of text. This command can be toggled on or
off.
• Find/Replace: Finds and replaces text in the current file.
• Find in Files/Replace in Files: Opens the Find in Files dialog box for you to enter text
strings for searching the selected files. The Find in Files window displays at the bottom
of the Vivado IDE environment with the results of the search. You can replace the search
string with a new string using the Replace in Files command.
• Indent Selection/Unindent Selection: Inserts or removes a tab space on the selected
line or lines.
• Toggle Line Comments: Selects a line of text or group of lines, and inserts a line
comment symbol at the start of the line. This command removes the line comment
symbol if the selected lines currently contain the comment symbol.
• Toggle Block Comments: Adds or removes a block comment (/*...*/) at the start and
end of a selected block of text. This command is useful for commenting out a section of
text in a single command.
Note: The comment symbol inserted is contextually dependent on the type of file displayed.
This command is only available for Verilog, SystemVerilog, and VHDL.
• Blank Operations: Configures the display of tabs, spaces, and special characters for
the selected text. If no text is selected, configures the display for the entire document.
° Trim Leading Whitespace: Removes the leading whitespace for the selected text.
This operation works on the entire document if no text is selected.
° Trim Trailing Whitespace: Removes the trailing whitespace for the selected text.
This operation works on the entire document if no text is selected.
° Trim Leading and Trailing Whitespace: Combines the actions of the previous two
commands, trimming both the leading and trailing whitespace. This operation
works on the entire document if no text is selected.
° Show Special Characters: Displays special characters that are typically hidden,
such as tabs, spaces, and end-of-line characters.
• Diff with <File_Name>: Opens the File Compare dialog box (Figure 3-29) and
performs a comparison of the current file and the file you select.
Note: You must have both files you want to compare loaded in the Text Editor.
• Folding: Collapses and expands text based on hierarchy, making it easier to navigate
and edit large files.
After you finish specifying settings, click the Close button in the upper right corner. The
Vivado IDE stores your settings and reloads them each time the tool is launched.
TIP: To restore the options to the default settings, click the Reset button in the upper right corner .
Code Completion
The Code Completion settings control the following:
• Code Completion: Sets the preference for activating the code completion drop-down,
whether using a shortcut key, displaying as you type, or disabling code completion.
• Keyboard Choice Selection: Sets whether to use the Tab key or Space bar to select
the displayed value.
Syntax Checking
The Syntax Checking settings control the following:
General
The General settings control the following:
• Perform code folding: Enables code folding to manage the display of large files.
• Show file path: Shows the complete path for the text file.
• Display line numbers: Shows line numbers to improve navigation in the file.
• Display matches for the selected word: Highlights words that match the currently
selected word.
• Select File > Text Editor > Open File. This command opens a file browser that allows
you to navigate to the file and open it for editing.
• Select the file in the Sources window, and select Open File from the popup menu.
Note: Alternatively, you can double-click the file in the Sources window.
• Click the file name from a warning or error message in the Messages window to open
the selected file in the Text Editor.
• To open the Vivado IDE journal and log files, select File > Project > Open Log File or
File > Project > Open Journal File.
TIP: You can create text files that capture portions of the Tcl Console, compilation logs, or errors or
warnings from the Messages window.
• Vivado Design Suite User Guide: I/O and Clock Planning (UG899) [Ref 17]
• Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
[Ref 13]
X-Ref Target - Figure 3-30
The amount of logic object detail displayed is determined by the selected zoom level. The
more you increase the zoom level, the more logic object detail displays. This is especially
true when viewing the Routing Resources for the entire device, where the logic displays in
an abstract form to show approximate placement and congestion. As you zoom in, you can
see exact placement and routing.
• Previous: Resets the Device window to display the prior zoom and coordinates.
• Next: Returns the Device window to display the original zoom and coordinates after
the Previous toolbar button is used.
• Zoom In: Zooms in the Device window.
• Zoom Out: Zooms out the Device window.
• Zoom Fit: Zooms out to fit the whole device into the display area of the Device
window.
• Select Area: Selects the objects in the specified rectangular area.
• Autofit Selection: Automatically redraws the Device window around newly selected
objects. This mode can be enabled or disabled.
• Routing Resources: Displays routing resources in the Device window.
• Draw Pblock: Places the cursor in Draw Pblock mode (crosshair) allowing you to create
a new Pblock rectangle to place cells.
• Cell Drag & Drop Modes: Specifies how cells placed onto the device are assigned
placement constraints. The button displayed reflects the currently selected mode:
° Create BEL Constraint Mode: Assigns a LOC and BEL constraint to the cell being
placed. This fixes the cell to the specified BEL within the slice.
° Create Site Constraint Mode: Assigns a LOC placement constraint to the cell being
placed. This fixes the cell to the specified slice but allows the cell to use any
available BELs within the slice.
° Assign Cell to Pblock Mode: Assigns logic cells to Pblocks. This allows the
implementation tools the most flexibility and is the default mode.
• Show Cell Connections: Shows the connectivity for selected objects based on the
following settings.
° Show Input Connections: Shows the input connections for selected cells.
° Show Output Connections: Shows the output connections for selected cells.
° Max Cell Count: Limits the number of connections that are shown to improve
drawing performance. You can increase this value to visualize cells with a large
number of connections, but Xilinx recommends a setting of 1000 or less for optimal
graphics display.
• Settings: Controls the display of information in the window. For details, see Specifying
Device Window Settings.
• Use the zoom commands in the popup menu and local toolbar.
• Hold down the left mouse button, and drag the cursor in the Device window to zoom
into an area or to zoom out. For more information, see Using Mouse Strokes to Zoom
and Pan.
• Use scroll bars and dynamic pan capabilities to pan the viewable area of the device.
The Device window also provides dynamic feedback during device exploration and design
modification. For example, if you attempt a logic resource assignment that is illegal, the
dynamic cursor changes to allow you to make adjustments. For more information, see
Understanding the Context-Sensitive Cursor.
The level of detail for displaying the device resources depends on the zoom level within the
Device window. Some resources, such as specific slice resources, are not visible until you
zoom into the device logic. Other resources, such as clock regions and I/O banks, appear
even when viewing the whole device. In addition, you can control the display of specific
objects or resources in the Device window, as described in Specifying Device Window
Settings.
• I/O pads and clock objects: Rectangles around the periphery and down the center of
the device.
• I/O banks: Thin, color-shaded rectangles just outside the row of I/O pads.
• Available I/O bank sites: Color-filled I/O bank rectangles.
• Unbonded I/O banks: Rectangles with a white X.
TIP: Hover your cursor over a logic site to see a tooltip that identifies each site in the Device window.
After you finish specifying settings, click the Close button in the upper right corner. The
Vivado IDE stores your settings and reloads them each time the tool is launched.
TIP: To restore the options to the default settings, click the Reset button in the upper right corner .
• Design: Elements from the design sources, such as cells, nets, and ports that are placed
on the device.
• Device: Resources on the device such as I/O banks, clock regions, and tiles on which
design objects can be placed.
• Use the expand and collapse buttons to expand or collapse the levels of the tree
view.
• Click the check box to enable or disable the layer or object for display in the Device
window. A check mark indicates the currently displayed layer. You can display or hide
groups of objects or layers by clicking the category of the layers. Select individual
layers or objects directory to display or hide them.
Note: If you cannot see a specific object or layer in the Device window, check the Layers settings
to see if the design object or device resource is currently hidden.
TIP: You can use the Shift key to select multiple layers, and use the Space bar to toggle the selected
layers on or off.
• Nets
° High fanout net limit: Limits the number of connections a pin can have in order to
be displayed. The nets on a pin with a fanout greater than the specified number of
connections are not displayed.
° Show I/O Nets: Toggles the display of I/O connectivity to placed logic or Pblocks.
• Connections
° Show connections while dragging cells: Displays nets connected to the selected
cell when dragging and placing the cell in the Device window.
• Routing
° Leave existing routing: Leaves all routes intact. In most cases, this results in
antennas and unrouted branches.
° Unroute branches: Unroutes branches to the original placement. In most cases, this
results in unrouted branches.
° Unroute and reroute branches: Unroutes branches to the original placement and
reroutes the branches to the new placement. In most cases, this results in
completely routed nets.
• Miscellaneous
Note: The Package window opens automatically when using the I/O Planning layout.
• Drag ports into the Package window for assignment, and reassign placed cells to other
I/O pins within the Package window.
Note: Autocheck I/O Placement is on by default, allowing only legal pin placement during drag
and drop.
• Visualize pins and I/O banks as follows:
° V CC and GND pins show as red V CC symbols and green GND symbols.
• Hold the cursor over a pin to show a tooltip that displays the pin information.
Additional I/O pin and bank information displays in the Information bar located at the
bottom of the environment in the status bar.
• Select I/O pins or banks to cross probe between the Device and Package windows, and
see pin information in the Package Pins Properties window.
• Previous: Resets the Package window to display the prior zoom and coordinates.
• Next: Return the Package window to display the original zoom and coordinates after
the Previous toolbar button is used.
• Zoom In: Zooms in the Package window.
• Zoom Out: Zooms out the Package window.
• Zoom Fit: Zooms out to fit the whole package into the display area.
• Select Area: Selects the objects in the specified rectangular area.
• Autofit Selection: Automatically redraws the Package window around newly selected
objects. This mode can be enabled or disabled.
• Settings: Controls the display of information in the window. For details, see Specifying
Package Window Settings.
After you finish specifying settings, click the Close button in the upper right corner. The
Vivado IDE stores your settings and reloads them each time the tool is launched.
TIP: To restore the options to the default settings, click the Reset button in the upper right corner .
• Use the expand and collapse buttons to expand or collapse the levels of the
tree view to see the different layers.
• Click a check box to enable or disable the layer for display in the Package window. A
check mark indicates the currently displayed layer. You can display or hide:
TIP: You can use the Shift key to select multiple layers, and use the Space bar to toggle the selected
layers on or off.
The display of a specific pin in the Package window depends on the combination of layers
that represent the pin in the Package window settings. For example, if you deselect I/O
Banks in the Package window settings, ground pins are displayed, but the user I/O and
multi-function pins are not displayed even if you select I/O and Multi-Function Pins under
the Pins heading.
IMPORTANT: If a specific pin is not visible in the Package window, you cannot assign a port to it. Check
that both the pin and the I/O block it is contained in are selected for display in the Package window
settings.
Following are the different categories of layers in the Package window settings:
• I/O Ports: Ports in the design that are currently placed in either a fixed or unfixed state.
The design might have currently unplaced ports that are not displayed in the Package
window.
• Pins: Available package pins grouped into specific categories, such as multifunction
pins, power pins, and unconnected pins. Pins display as follows:
° Multifunction pins display as part of the I/O bank they are contained in, and display
with symbols representing their available functions. For example:
- Basic I/O pins display as gray circles by default.
- Clock capable pins display as blue hexagons by default.
- V REF, V RP, and VRN pins display with a small power icon by default.
- The remaining pins display with an asterisk (*) and are not displayed by default.
• I/O Bank Types: Different types of I/O banks, which vary based on the targeted device.
For example, Figure 3-36 shows the high performance banks that are displayed when
you select the High Performance layer.
X-Ref Target - Figure 3-36
TIP: Turning off an I/O bank layer is an easy way to prevent pin assignment. Using this method enables
you to reserve a bank for later use or show that a bank is full.
• Other: Grid lines for x-axis and y-axis drawn behind the sites.
For more information on analyzing RTL netlists, see this link in the Vivado Design Suite User
Guide: System-Level Design Entry (UG895) [Ref 15]. For more information on synthesized
netlist analysis, see the Vivado Design Suite User Guide: Design Analysis and Closure
Techniques (UG906) [Ref 13].
Note: Dotted lines indicate that the net is connected to additional logic that is not displayed in the
schematic.
1. Select one or more logic elements in an open window, such as the Netlist window.
2. Right-click and select Schematic from the popup menu, select the Schematic toolbar
button , or press F4.
The Schematic window displays the selected logic cells or nets. If only one cell is
selected, a schematic symbol for that module is displayed, as shown in Figure 3-38.
• The links at the top of the schematic sheet, labeled Cells, I/O Ports, and Nets, open a
searchable list in the Find Results window, making it easier to find specific items in the
schematic.
• When you select objects in the Schematic window, those objects are also selected in all
other windows. If you opened an implemented design, the cells and nets display in the
Device window.
• Previous: Resets the Schematic window to display the prior zoom, coordinates and
logic content.
Note: This command is only available for schematics with less than 12,000 objects.
• Next: Returns the Schematic window to display the original zoom, coordinates and
logic content after Previous is used.
Note: This command is only available for schematics with less than 12,000 objects.
• Zoom In: Zooms in the Schematic window.
• Zoom Out: Zooms out the Schematic window.
• Zoom Fit: Zooms out to fit the whole schematic into the display area.
• Select Area: Selects the objects in the specified rectangular area.
• Auto-fit Selection: Automatically redraws the Schematic window around newly
selected objects. This mode can be enabled or disabled.
• Autohide Pins: Toggles the pin display on selected hierarchical modules. When a
schematic is generated, higher levels of the hierarchy display as concentric rectangles
without pins, and cells hide the unconnected pins, as shown in Figure 3-38. In most
cases, the lack of pins makes the Schematic window more readable. However, you can
display the pins for selected cells as needed.
• Add: Recreates the Schematic window with the newly selected elements added to the
existing schematic.
• Remove: Recreates the Schematic window with the currently selected elements
removed from the existing schematic.
• Regenerate Schematic: Redraws the active Schematic window.
• Settings: Controls the display of information in the window. For details, see Specifying
Schematic Window Settings.
You can expand or collapse logic contained either inside a selected module or outside in the
next level of hierarchy. You can expand a single module or multiple selected modules. From
the popup menu, the commands to expand schematic logic are:
• Expand/Collapse > Expand Inside: Displays the schematic hierarchy inside a selected
cell. The Vivado IDE regenerates the Schematic window to expand the contents of the
selected cell. You can also use the expand button available within the schematic.
Note: This command is not available if the selected cell is a primitive within the design hierarchy.
• Double-click a pin of a cell to trace the net down into, or up out of the hierarchy. A pin
is displayed on the schematic symbol with a stub inside and outside of the symbol, as
shown for O1 and fifo_out[31:0] in Figure 3-39. This reflects the ability to expand
inside or outside the symbol.
Note: Pins labeled with n/c indicate that there is no connection to the pin.
• Double-click a pin inside a schematic symbol to trace the net downward into the
hierarchy.
• Double-click the pin outside a schematic symbol to trace the net up the hierarchy.
Note: Net expansion has a different result than expanding the hierarchical module using the Expand
Inside/Expand Outside commands. Double-clicking a pin expands the hierarchy to follow the net,
and does not display the full contents of the hierarchy.
X-Ref Target - Figure 3-39
boundaries. The window zooms to fit the expansion. The available Expand Cone commands
are:
• To Flops or I/Os: Displays the entire cone of logic to the first flops or I/Os, or to any
sequential element, such as block RAMs and FIFOs.
• To Leaf Cells: Displays the entire cone of output logic to the first primitives.
Note: Alternatively, you can double-click a pin or cell to use this command.
• To Selected Cells: Displays the entire cone of logic between two selected cells.
• Objects are also selected in all other windows. Similarly, when you select objects in
other windows, they are also selected in the Schematic window.
• The Properties window for the selected object opens or updates to display the object
properties.
For example, when a net is selected, the Connectivity view traverses the hierarchy to
report all primitive cells connected to the net. This is different from the Cell Pins view,
which reports the pins of all cells connected to the net, reporting both primitive and
hierarchical cells. Select a net that is connected to a hierarchical cell to see the
difference between these views.
After you finish setting options, click the Close button in the upper right corner. The Vivado
IDE stores your settings and reloads them each time the tool is launched.
TIP: To restore the options to the default settings, click the Reset button in the upper right corner .
• Click a color box to expose a drop-down menu, and select from a list of available
colors.
• Select More Colors to display more colors to choose from.
• Enter a specific RGB value directly in the text field for the color.
TIP: To set this property, click the Settings toolbar button , and select Bundle Nets.
In the Block view of the Hierarchy window (Figure 3-44), each instance displays within the
hierarchical block that contains it. Primitive logic is grouped into folders that are
represented as submodules. For more information about primitive logic folders, see Using
the Netlist Window.
X-Ref Target - Figure 3-44
To view the design from top to bottom, click the Show Tree View button . In the Tree
view of the Hierarchy window (Figure 3-45), you can identify the relationship between
hierarchical modules, approximate module sizes, and module location within the design.
The widths of the blocks in the Hierarchy window are based on the relative device resources
consumed by that instance of hierarchy.
X-Ref Target - Figure 3-45
TIP: To select logic parent modules for Pblock assignment in the Hierarchy window, right-click a
module and select Select Leaf Cell Parents. From the parent module, select Floorplanning > Draw
Pblock or Assign to Pblock.
Timing Constraints window, select Window > Timing Constraints, or select Edit Timing
Constraints in the Flow Navigator under Synthesized Design or Implemented Design.
IMPORTANT: To ensure that the report tools recognize the constraint changes, you must press the
Apply button in the Timing Constraints window to apply the changes.
VIDEO: Select Tools > Timing > Constraints Wizard on a synthesized design to create a top-level
XDC file based on design methodologies recommended by Xilinx. This wizard guides you through
specifying clocks, setting up input and output constraints, and properly constraining cross-clock
domain clock groups. For an overview, see the Vivado Design Suite QuickTake Video: Using the Timing
Constraints Wizard.
The local toolbar in the Create Clock pane contains the following commands:
• Create Constraint: Opens the Create Clock dialog box in which you can create a
constraint.
• Remove Constraint: Deletes the selected constraint.
• Edit Constraint: Opens the Edit Create Clock dialog box for the selected constraint.
The local toolbar in the All Constraints pane contains the following commands:
• Search: Opens the search bar to allow you to quickly locate constraints.
Note: You can also access this command through the Alt+/ keyboard shortcut.
• Collapse All: Collapses all constraints.
• Expand All: Expands all constraints.
• Group by Source: Groups constraints based on the source file from which they
originate.
• Filter Constraints: Filters constraints to show all constraints, valid constraints only, or
invalid constraints only.
• Edit Constraint: Opens the Edit Create Clock dialog box for the selected constraint.
• Expand All: Expands the messages reported by each Tcl command in the Tcl Console.
• Pause: Allows you to scroll in the window or read reports as commands are running.
• Toggle Column Selection Mode: Toggles between selecting a block of text characters
as a column or as lines of text.
• Clear: Clears all output in the Tcl Console.
IMPORTANT: To get input from Tcl using the gets stdin command, you must launch the Vivado IDE
from a command prompt, xterm, or Tcl shell. This ensures that the Vivado IDE does not hang while
waiting for input. Alternatively, you can use the Vivado <version> Tcl Shell shortcut, and enter the
start_gui command to open the Vivado IDE. When you use the gets stdin command from the
Vivado IDE, the Vivado IDE reads the data entered in the command prompt, xterm, or Tcl shell.
Using Auto-Complete
As you type commands, the Tcl Console auto-complete feature attempts to complete the
name of the command or command parameters. For example, Figure 3-49 shows a list of
commands that match the entry: create_. From the auto-complete list, you can:
After you select a command, the Tcl Console attempts to auto-complete any arguments of
the command. You can select from the auto-complete list as described above.
X-Ref Target - Figure 3-49
Improving Readability
The output of Tcl commands is optimized for processing, not viewing. To improve the
readability of the single line of output returned by a Tcl command, use the join command
and a newline (\n) as shown:
join <command> \n
For example:
• To show just the Tcl commands and hide the transcript, select the Collapse all
toolbar button. Then, copy and paste the Tcl commands from the Tcl Console to create
Tcl scripts.
• To show the command history in the Tcl Console, type the following in the command
line entry box at the bottom of the Tcl Console:
history
TIP: In the command line entry box, you can press the arrow keys to scroll through the command
history one command at a time.
In addition, the Vivado IDE writes the Tcl commands to a journal file (vivado.jou) and a
log file (vivado.log). The vivado.jou file contains just the commands, and the
vivado.log file contains both commands and any returned messages. When the Vivado
IDE is launched, backup versions of the journal file (vivado_<id>.backup.jou) and log
file (vivado_<id>.backup.log) are written to save the details of the previous run. The
<id> is a unique identifier that enables the tools to create and store multiple backup
versions of the log and journal files.
You can create Tcl scripts by copying commands from the journal file for later replay. To
view the journal file, select File > Project > Open Journal File. You might need to edit this
file to remove any erroneous commands or commands from multiple sessions prior to
replay. Not every action logs a Tcl command into the journal file. For more information on
journal files, see Output Files in Appendix B.
TIP: If you want comments to appear in the journal file, enter the pound sign (#) followed by the
comment in the Tcl Console. The Vivado IDE writes the comment to the journal file but does not execute
it as a command. This is helpful when you want to take notes on the Tcl commands you entered.
help
help <command_name>
or
<command_name> -help
For example:
help add_files
or
add_files -help
The Tcl Console displays the list of available commands or command options based on the
command you enter.
TIP: To make it easier to read the command help, double-click the Tcl Console tab or press Alt - to
maximize it.
For explicit command syntax, perform the command once, then view the vivado.jou file
in the invocation directory. For more information on creating Tcl scripts, see the Vivado
Design Suite User Guide: Using Tcl Scripting (UG894) [Ref 3]. For a complete list of Tcl
commands, refer to the Vivado Design Suite Tcl Command Reference Guide (UG835) [Ref 4].
IMPORTANT: The vivado.jou file is a good starting point for creating a Tcl script. However, it is not
intended to be used as a script itself.
Note: If the location of a source file changes, Vivado IDE removes the link from related messages to
prevent confusion.
TIP: To see only one message type, double-click the message type in the banner of the Messages
window. For example, double-click errors to display only error messages. To get the message count for
critical warnings, use the get_msg_config -count -severity {CRITICAL WARNING} Tcl
command.
VIDEO: For an overview of the Messages window, including information on reviewing critical messages,
cross probing design objects, adjusting message severity, and suppressing messages, see the Vivado
Design Suite QuickTake Video: Understanding Messaging.
° Suppression
- Show suppressed: Displays only suppressed messages. To suppress messages,
use the Manage Suppression popup menu command or set_msg_config Tcl
command.
Note: This setting results in an empty Messages window if no messages are suppressed.
- Show unsuppressed: Displays only unsuppressed messages.
Note: This is the default setting.
- Show both: Displays both suppressed and unsuppressed messages. Suppressed
messages have a backslash (\) through the severity icon.
° Severity
- Show modified: Displays only messages with a modified severity. To modify
message severity, use the Message Severity popup menu command or
set_msg_config -new_severity Tcl command.
Note: This setting results in an empty Messages window if no messages are modified.
- Show unmodified: Displays only messages that have their original severity.
Note: This is the default setting.
- Show both: Displays messages with both modified and original severity.
Messages with a modified severity have an asterisk (*) on the severity icon.
• Manage Message Suppression: Opens the Manage Suppression dialog box in which
you can add or remove suppression rules. For more information, see Suppressing
Messages and Unsuppressing Messages.
• Discard User Created Messages: Removes messages related to project load and
analysis as well as messages output from scripts and Tcl commands entered in the Tcl
Console.
Note: You cannot use this command to clear messages output from design runs. Instead, use the
Reset Runs popup menu command to reset the run and clear the messages for the run.
• Settings: Controls the display of information in the window.
° Wrap Lines: Wraps messages to the next line to fit the message to the width of the
Messages window.
TIP: If the message limit is exceeded, a Message limit exceeded prompt appears. You can disable
line wrapping to improve message display performance.
TIP: To search for Answer Records related to the message, right-click the message and select Search for
Answer Record.
TIP: In a graphical window, you can use the Auto Fit Selection toolbar button to automatically
zoom to the selected object. Alternatively, you can click F9 to manually fit the selection.
Suppressing Messages
You can suppress messages from appearing in the Vivado IDE Messages window as follows:
• To suppress a specific message, right-click the message, and select Suppress this
Message.
• To suppress all messages with a specific message ID, right-click the message, and select
Suppress Messages with this ID.
• To suppress all messages of a specific severity (for example, Info), right-click a
message, and select Suppress Messages with this Severity.
• To suppress a message that contains a specific text string or collection of strings,
right-click in the Messages window, and select Manage Suppression. In the Manage
Suppression dialog box (Figure 3-53), click the add button . In the New Suppression
Rule dialog box, enter the message ID or text string to add the suppression rule, and
click OK.
Note: Messages that are filtered from the Messages window still exist in the log files until you
rerun the design flow.
TIP: To limit the number of messages without suppressing them, you can use the set_msg_config
Tcl command, for example, set_msg_config -id {[Common 17-349]} -limit 10. The default
message limit is 100. For more information, see set_msg_config in the Vivado Design Suite Tcl
Command Reference Guide (UG835) [Ref 4].
Unsuppressing Messages
To unsuppress messages, right-click in the Messages window, and select Manage
Suppression. In the Manage Suppression dialog box (Figure 3-53), select the rule to
remove, and click the remove button .
Note: Alternatively, you can click the Manage Message Suppression toolbar button to open
the Manage Suppression dialog box.
TIP: To temporarily display suppressed messages, click the Filter Messages toolbar button , and
select Show suppressed or Show both. The message icon has a backslash (\) to indicate that the
message is suppressed but displayed.
CAUTION! You cannot demote error messages. Use caution when demoting critical warnings, because
these messages flag problems that might result in errors later in the design flow.
1. Right-click the message, and select Message Severity > Set Message Severity from
the popup menu.
2. In the Set Message Severity dialog box (Figure 3-54), set the severity.
Note: To reset the message to the default severity, right-click the message, and select Message
Severity > Unset Message Severity from the popup menu.
• Modified Information
• Modified Advisory
• Modified Warning
• Modified Critical Warning
• Modified Error
You can also modify message severity using the set_msg_config Tcl command. For example,
the following Tcl command upgrades message ID Place 30-12 to a Critical Warning:
TIP: You can click the Pause output toolbar button , and scroll back or read reports while
commands are running.
When out-of-context synthesis runs are present, the Log window shows a tree view on the
left and the log for the selected run on the right (Figure 3-56).
X-Ref Target - Figure 3-56
• Find: Opens the search bar to allow you to locate text in the Log window.
Note: You can also access this command through the Alt+/ keyboard shortcut.
• Pause Output: Allows you to scroll in the window or read reports as commands are
running.
• Copy: Copies selected text to the clipboard.
• Toggle Column Selection Mode: Specifies whether to select a block of text characters
as a grid of rows and columns or as lines of text.
Note: If you close a custom report, you must recreate it. Custom reports are not stored in memory.
If you close a report that was automatically generated as part of the design run, you can reopen the
report by selecting Reports > Open Interactive Report.
• Search: Opens the search bar to allow you to locate text in the Reports window.
Note: You can also access this command through the Alt+/ keyboard shortcut.
• Collapse All: Collapses all reports.
Note: You can also access this command through the Ctrl+- keyboard shortcut.
• Expand All: Expands all reports.
Note: You can also access this command through the Ctrl+= keyboard shortcut.
RECOMMENDED: To identify common design issues, run Report Methodology the first time you
synthesize the design. Run this report again when there is a change in constraints, clocking topologies,
or large logic changes. For more information, see this link in the Vivado Design Suite User Guide:
System-Level Design Entry (UG895) [Ref 15].
• Report IP Status
• I/O
° Report Noise
° Report I/O
• Timing
° Report Timing
° Check Timing
° Config Timing
° Report CDC
° Report Exceptions
° Report Datasheet
• Report Methodology
• Report DRC
• Report Utilization
• Report Clock Utilization
• Report Power
• Report Power Optimization
• Report High Fanout Nets
• Report Design Analysis
TIP: If multiple timing reports are open, you can tile the reports horizontally or vertically. Right-click a
report tab, and select New Horizontal Group or New Vertical Group.
• Vivado Design Suite User Guide: Power Analysis and Optimization (UG907) [Ref 20]
• Vivado Design Suite User Guide: I/O and Clock Planning (UG899) [Ref 17]
• Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
[Ref 13]
• Vivado Design Suite User Guide: Designing with IP (UG896) [Ref 7]
• Run Properties: Displays the Run Properties window. For more information, see Using
the Run Properties Window.
• Delete: Deletes the selected, non-active, runs and removes the associated run data
from disk. You are prompted to confirm before the runs are deleted.
Note: You cannot delete the active runs.
• Make Active: Sets the selected run as the active run. The active run launches
automatically when the Run Synthesis or Run Implementation command is used. The
results for the active run display in the Messages, Compilation, Reports, and Project
Summary windows.
• Change Run Settings: Changes the strategy and command line options for the
selected synthesis or implementation run. For more information, see this link in the
Vivado Design Suite User Guide: Synthesis (UG901) [Ref 10] or this link in the Vivado
Design Suite User Guide: Implementation (UG904) [Ref 12].
• Set Incremental Synthesis/Implementation: Specifies a design checkpoint to use as a
reference for the next synthesis or implementation run. For more information, see this
link in the Vivado Design Suite User Guide: Synthesis (UG901) [Ref 10] and this link in
the Vivado Design Suite User Guide: Implementation (UG904) [Ref 12].
• Include Incremental Synthesis Information in DCP: Includes information in the
synthesis checkpoint for the tools to compare during the next incremental synthesis
run.
• Set QoR Suggestions: Specifies a QoR suggestions file to use for the next synthesis or
implementation run. For more information, see this link in the Vivado Design Suite User
Guide: Design Analysis and Closure Techniques (UG906) [Ref 13].
• Save as Report Strategy: Saves the current strategy and command options to a new
strategy for future use and modification.
• Open Run: Opens the design for the selected run.
• Launch Runs: Invokes the Launch Runs dialog box to launch the selected runs.
• Reset Runs: Invokes the Reset Runs dialog box to remove previous run results and to
set the run status back to Not Started for the selected runs.
• Launch Next Step: Launches the next step of the selected run. For implementation
runs, the available steps are opt_design, place_design, route_design,
write_bitstream. Synthesis only has one step, synth_design.
• Launch Step To: Launches the selected step for the selected run.
• Reset to Previous Step: Resets the selected run to the preceding step. This allows you
to step backward through a run, make any needed changes, and then step forward to
complete the run.
• Generate Bitstream: Invokes the write_bitstream step. This command is available
for completed implementation runs only. For more information, see this link in the
Vivado Design Suite User Guide: Programming and Debugging (UG908) [Ref 14].
• Display Log: Displays the Log tab of the Run Properties window.
• Display Reports: Displays the Reports tab of the Run Properties window.
• Display Messages: Displays the Messages tab of the Run Properties window.
TIP: The Display commands are useful for displaying data for out-of-context runs, which are not
displayed in the Messages, Reports, or Log windows.
• Create Runs: Invokes the Create New Runs wizard to create and configure new
synthesis or implementation runs. For more information, see this link in the Vivado
Design Suite User Guide: Synthesis (UG901) [Ref 10] or this link in the Vivado Design
Suite User Guide: Implementation (UG904) [Ref 12].
• Open Run Directory: Opens a file browser in the selected run directory on disk.
• Export to Spreadsheet: Exports the information in the Design Runs window to a
spreadsheet file.
The Design Runs window icons indicates the run state as follows:
Run information updates as the runs proceed. You can close the Vivado IDE without
affecting in-progress runs. When you re-open a project, the Vivado IDE updates the run
status to reflect the latest status, which displays in the Design Runs table. The columns used
for tracking information are:
• Failed Routes: Displays the number of nets that failed to route, are partially routed, or
have conflicts.
• LUT: Displays the LUT utilization number or percentage.
• FF: Displays the flip-flop utilization number or percentage.
• BRAMs: Displays the BRAM utilization number or percentage.
• URAM: Displays the URAM utilization number or percentage.
• DSP: Displays the DSP utilization number or percentage.
TIP: By default, the Design Runs window shows utilization as a number. To show utilization as a
percentage, click the Show Percentage toolbar button .
Device pin information such as the following is listed for each package pin:
• To sort, click a column header. Click again to reverse the sort order.
• To sort by a second column, press Ctrl and click another column. You can add as many
sort criteria as necessary to refine the list order.
Note: For more information on sorting the information in the Package Pins window, see Using Data
Table Windows.
TIP: In the Package Pins window, you can directly edit cells with editable values. Either enter text, or
select it from a drop-down menu.
• Search: Searches the Package Pins window for ports by name, or by keywords or values
within the various pin properties.
• Collapse All: Displays I/O Banks by name, and does not display individual pins of the
bank.
• Expand All: Shows all pins of an I/O Bank expanded.
• Group by I/O Bank: Groups the pins by I/O Bank, or lists them alphabetically by
name.
• Settings: Controls the display of information in the window.
° Scroll to Selected Objects: Scrolls the Package Pins window to display objects
selected in other windows like the Netlist or Device windows.
Creating RTL source or netlist projects populates the I/O Ports window with the I/O ports
defined in the design source files. In an I/O Planning project, you can import a port list from
a CSV or XDC file and create ports manually for the project. For more information, see this
link in the Vivado Design Suite User Guide: I/O and Clock Planning (UG899) [Ref 17].
X-Ref Target - Figure 3-60
The I/O Ports window lists the following for each I/O port and sorts the I/O ports based on
column values:
The table in the I/O Ports window includes the following information:
• Buses are in expandable folders that you can select as one object for analysis,
configuration, and assignment.
• Port Interfaces are in expandable folders that can contain buses and individual ports
that you defined.
• Cells with editable values allow you to enter text or select text from drop-down menus.
• Search: Searches the I/O Ports window for ports by name, or by keywords or values
within the various port properties.
• Collapse All: Displays buses by name, and does not display individual bits of the
bus.
• Expand All: Shows all pins of a bus expanded.
• Group by Interface and Bus: Displays the ports by interface, or alphabetically by
name.
• Create I/O Port Interface: Defines a new port interface to group ports. You can select
and place port interfaces as one object within the I/O Planning environment.
• Schematic: Opens a Schematic window for selected I/O ports.
• Settings: Scrolls the I/O Ports window to display objects selected in other windows like
the Netlist or Device windows.
• I/O Port Bus Properties: Allows you to view or edit properties for the selected object.
• Delete: Deletes the current selection.
• Expand Selection: Expands the selected rows.
• Create I/O Port Interface: Defines a new port interface to group ports. You can select
and place port interfaces as one object within the I/O planning environment.
• Assign to Interface: Assigns a group of ports, port buses, or interfaces to a parent
interface.
• Unassign from Interface: Unassigns a group of ports, port buses, or interfaces from
their parent interface.
• Configure I/O Ports: Assigns various properties of the selected I/O ports.
• Reset Invalid Port Properties: Resets any invalid properties on the specified port to
the default value.
• Reset Port Properties: Resets all properties on the specified port to the default values.
• Set Direction: Specifies the direction of a port only in an I/O planning project.
• Make Diff Pair: Defines two ports as a differential pair in an I/O planning project.
• Split Diff Pair: Removes the differential pair association from the selected port in an
I/O planning project.
• Auto-place I/O Ports: Places I/O ports using the Autoplace I/O Ports wizard.
• Place I/O Ports in an I/O Bank: Assigns the currently selected ports onto pins on the
specified I/O bank.
• Place I/O Ports in Area: Assigns the currently selected ports onto pins in the specified
area.
• Place I/O Ports Sequentially: Assigns the currently selected ports individually onto
pins.
• Unplace: Unplaces the selected I/O ports.
• Fix Ports: Constrains the selected, placed ports to their current locations, or if no ports
are selected, constrains all placed ports. Upon completion, a dialog box appears with
summary information.
Note: This operation is only enabled for placed I/O ports. The resulting Tcl command is
set_property IS_LOC_FIXED true [get_ports [list <list of ports>]].
• Unfix Ports: Unfixes the selected placed I/O ports.
• Swap Locations: Swaps the sites for two selected ports.
• Schematic: Creates a schematic from the selected objects.
• Highlight: Highlights the selected objects.
• Unhighlight: Unhighlights the selected objects.
• Mark: Draws a marker for the selected object.
• Unmark: Removes the marker for the selected object.
• Export I/O Ports: Writes the contents of the I/O Ports window to a CSV, XDC, Verilog,
or VHDL file.
• Export to Spreadsheet: Exports the information in the I/O Ports window to a
spreadsheet file.
Note: By default, the Vivado IDE exports seven levels of hierarchy to the Excel spreadsheet.
Overview
You can configure the look and feel of the Vivado® IDE along with many of the default
actions. For example, you can change the default display colors to emphasize sites and
properties of interest to you, adjust default settings for file paths and properties, assign
custom keyboard shortcuts for frequently used commands, and create custom flow
strategies. You can control these settings using the Tools and Layout menus as described
in this chapter.
To open the dialog box, select Tools > Settings. The dialog box changes based on the
category you select in the left pane. For example, Figure 4-1 shows the Settings dialog box
with the Project category selected under the Tools Settings.
TIP: When entering or modifying data in a text box, if a value is used and editable, the text is black and
the background is white. If a value is used but not editable, the text is black and the background is gray.
If a value is unused or not applicable, the text is gray, including the label that precedes or follows it.
• Default Project Directory: Specifies the location where the Vivado IDE writes newly
created projects.
• Target Language: Sets the default target language used when a new project is created.
• Recent: Specifies the number of recent projects, directories, and files to list. You can
also specify whether to automatically open the most recently used project when
starting the Vivado IDE.
• Record Tcl commands for highlight and mark actions: Shows the corresponding
commands in the Tcl Console when you mark or highlight objects, as described in
Marking and Highlighting Objects in Chapter 3.
Specifying IP Defaults
You can use the IP Defaults settings to specify the default IP directories and repositories. To
open the Settings dialog box (Figure 4-1), select Tools > Settings, and then click the IP
Defaults category.
• Default IP Example Project Directory: Specifies where the Vivado IDE writes newly
created IP examples. By default, the Default Project Directory is used, or you can
specify a different directory.
• IP Catalog: Specifies the default repository search paths and the order in which to
search the repositories.
• Source Files: Specifies the default settings to use when adding sources to the project.
You can create a local copy of the source files in the Default Project Directory. You can
also add source files from the subdirectories in the Default Project Directory.
• File Saving: Specifies whether the Vivado IDE saves project files automatically when
closing or prompts you to save changes.
• Scaling: Sets the font scaling for the display, making the Vivado IDE easier to use on
high resolution monitors. By default, this option is set to Use OS font scaling, which
uses the value set for your primary monitor. Alternatively, you can select User defined
setting to specify a value between 90% to 300% that is used by the Vivado tools only.
• Spacing: Sets the amount of space between elements, such as icons and text, in the
Vivado IDE. Comfortable is the default setting, and Compact reduces the amount of
space between elements to fit more elements into a smaller space.
• Messages: Specifies the maximum number of messages to display.
• Hyperlinks: Specifies the action to take when you click a path delay link in a timing
report, including whether to provide a description, display a menu, or select a cell pin,
cell, or site.
• Enable WebTalk to send software, IP and device usage statistics to Xilinx: Sends
usage information to Xilinx to help improve the software and hardware.
Note: For more information on WebTalk, see the Vivado Design Suite User Guide: Release Notes,
Installation, and Licensing (UG973) [Ref 2].
• Tooltips and Quick Help: Specifies the language for tooltips and Quick Help. You can
also set the amount of time before a tooltip appears and disappears.
• Documentation: Specifies whether to open documents in Xilinx® Documentation
Navigator or in your default web browser.
Note: For more information on Documentation Navigator, see Documentation Navigator and
Design Hubs in Appendix C.
• Current Editor: Sets the text editor used by the Vivado IDE. If you select the Vivado
Text Editor, the following General and Display options are also available.
• Vivado Editor General Options: Sets options that control code folding, line comments,
column selection shortcuts, split views, the number of undo operations, and the
number of recent files.
• Vivado Editor Display Options: Sets options that control the display of the file path at
the top of the Vivado Text Editor, line numbers, and matches for the selected word.
In addition, if you select the Vivado Text Editor, the following subcategories are available
in the left pane of the Settings dialog box:
• Code Completion: Sets the preference for activating the code completion drop-down,
whether using a shortcut key, displaying as you type, or disabling code completion. You
can also set whether to use the Tab key or Space bar to select the displayed value.
• Syntax Checking: Enables syntax checking and specifies whether to display warnings
and notes. You can also specify the formatting for errors, warnings, and notes and view
the formatting in the Preview window.
• Tabs: Specifies whether to indent the line, whether to use the tab character instead of
spaces, and how many spaces to use per tab.
• Fonts and Colors: Specifies a display theme, which is a group of color settings. You can
choose from a default theme or create your own, as described in Setting Display
Themes. You can also set the font style, size, and color for standard text (foreground) as
well as the color for the background, line highlighting, and matching words. You can
view this formatting in the Preview window.
Note: You can also set the text styles and colors for different languages using the Verilog,
VHDL, Tcl, Xdc, and Trigger State Machine subcategories.
Specifying Colors
You can use the Colors settings to control the appearance of the viewing environment. To
open the Settings dialog box (Figure 4-1), select Tools > Settings, and then click the
Colors category. Click the subcategories to set colors for effects like highlighting and for
objects in different windows, such as the Device and Package windows.
TIP: The Vivado Default Theme is designed for optimal display on computer monitors. However, the
Vivado Light Theme displays well when using a projector.
Note: These default options are defined in the vivado.xml file. For more information, see Outputs
for Environment Configuration in Appendix B.
Changing Colors
To change the color of an element, do one of the following:
• Click a color cell, and enter an RGB value, as shown in Figure 4-2.
X-Ref Target - Figure 4-2
TIP: You can also modify color settings in the Device window. For more information, see Specifying
Device Window Settings in Chapter 3.
port. To open the Settings dialog box (Figure 4-1), select Tools > Settings, and then click
the Selection Rules category.
The default selection rules enable Vivado IDE to operate in the most efficient manner. You
can change these selection rules if you have trouble selecting a specific object. To change
a selection rule, enable or disable the Set check box next to the rule:
• When you enable a selection rule, both the primary From object type and secondary To
object types are selected.
• When you disable a selection rule, only the primary From object type is selected.
1. In the Settings dialog box, click Copy to create a new schema from the Vivado Default
schema.
IMPORTANT: You cannot modify the default shortcuts provided by the Vivado IDE. To customize
shortcuts, you must create a new shortcut schema.
2. In the popup window, specify a name for the new shortcut schema, and press Enter.
3. Search through the list of menus and windows, and select a command.
TIP: Use the Filter field to filter the commands listed for shortcut assignment. Enter a text string to filter
the list of available commands. You can use different shortcuts for the same command in different
windows.
4. Click Add.
5. In the Add Shortcut dialog box (Figure 4-4), select the new shortcut from the
drop-down menu, and click OK.
TIP: To show the currently defined shortcuts, deselect the Group by Usage toolbar button , and
double-click the Shortcut column heading.
You cannot change the command line settings for predefined Vivado IDE synthesis and
implementation strategies. However, you can copy and modify supplied strategies to create
your own custom strategies. You can use the Run Strategies settings to create custom
strategies. To open the Settings dialog box (Figure 4-1), select Tools > Settings, and then
click the Strategies > Run Strategies category.
TIP: You can also use the Strategies settings to view the command line options associated with the
predefined Vivado IDE synthesis and implementation strategies.
• Windows: %APPDATA%\Xilinx\Vivado\<version>\strategies
• Linux: ~/.Xilinx/Vivado/<version>/strategies
1. From the Flow drop-down menu, select a Vivado Synthesis or Vivado Implementation
version.
A list of strategies and related command line options appear. For more information on
command line options, see the Vivado Design Suite User Guide: Synthesis (UG901)
[Ref 10] and Vivado Design Suite User Guide: Implementation (UG904) [Ref 12].
IMPORTANT: You cannot modify the default options for predefined Vivado IDE strategies. To customize
strategies, you must copy or add a strategy.
2. To create a new strategy, select Create Strategy from the popup menu or toolbar .
Note: Alternatively, you can create a copy of an existing strategy using Copy Strategy from the
popup menu. The Vivado IDE creates a copy of the strategy in the User Defined Strategies list,
and displays the command line options on the right side of the dialog box for you to modify.
3. In the New Strategy dialog box (Figure 4-5), set the following options, and click OK:
° Description: Provides the strategy description for display in the Design Runs
window.
X-Ref Target - Figure 4-5
° Enter the appropriate text (for example, in the More Options field).
TIP: Click a command option to view a description of the option at the bottom of the dialog box.
The new strategy is listed under User Defined Strategies and can be used for synthesis
or implementation.
You cannot change the command line settings for predefined report strategies. However,
you can copy and modify supplied strategies to create your own custom strategies. This
includes disabling the default reports as well as running the same report during various
points in the design flow.
You can use the Report Strategies settings to create custom report strategies. To open the
Settings dialog box (Figure 4-1), select Tools > Settings, and then click the Strategies >
Report Strategies category.
• Windows: %APPDATA%\Xilinx\Vivado\<version>\reportstrategies
• Linux: ~/.Xilinx/Vivado/<version>/reportstrategies
1. From the Flow drop-down menu, select a Vivado Synthesis or Vivado Implementation
version.
A list of strategies and related reports appear. For more information on reports, see this
link in the Vivado Design Suite User Guide: Design Analysis and Closure Techniques
(UG906) [Ref 13].
IMPORTANT: You cannot modify the default options for predefined Vivado IDE strategies. To customize
strategies, you must copy or add a strategy.
2. To create a new strategy, select Create Strategy from the popup menu or toolbar .
Note: Alternatively, you can create a copy of an existing strategy using Copy Strategy from the
popup menu. The Vivado IDE creates a copy of the strategy in the User Defined Strategies list,
and displays the list of reports on the right side of the dialog box for you to modify.
3. In the New Report Strategy dialog box (Figure 4-6), set the following options, and click
OK:
° Description: Provides the strategy description for display in the Design Runs
window.
° To add a report, select Add Report from the popup menu or toolbar . In the
Add Report for Report Strategy dialog box, specify the Run Step and Report Type,
and click OK.
Note: The Run Step is only available for implementation runs.
° To remove a report, click the report under the desired design step, and select
Remove Report from the popup menu or toolbar .
° To modify report options, click the report, and modify the options in the Options
field.
TIP: To get syntax examples to use for the MORE_OPTIONS values, see the Summary section of an
existing report. You can also type the Tcl command for the report (shown in parenthesis after the report
name) followed by -help in the Tcl Console to get a complete list of command line options.
The new strategy is listed under User Defined Strategies and can be used for synthesis
or implementation.
• Warnings: Defines how the Vivado IDE shows warning dialog boxes, such as warnings
when closing a design or project.
• Confirmations: Defines how the Vivado IDE shows confirmation dialog boxes, such as
confirmations when switching to a different design.
• Notifications: Defines how the Vivado IDE shows notifications, such as notifications
when synthesis or implementation completes successfully.
• Alerts: Defines how the Vivado IDE shows alerts, such as alerts for the success of
non-active runs.
• Save Layout As: Creates a user-defined layout based on the current layout
configuration.
• Remove Layout: Removes the user-defined layout of your choice.
• Undo: Undoes the most recent view manipulation.
• Redo: Redoes the most recent view manipulation.
• Reset Layout: Restores resized or moved windows to the original configuration for the
active layout.
Note: User-defined layouts are saved to a layout file in your installation directory for use in all your
design projects. For more information, see Outputs for Environment Configuration in Appendix B.
TIP: You can also use predefined layouts as described in Layout Selector in Chapter 2.
Note: The Customize Command menu is persistent with the Vivado IDE and is restored each time
the tool is launched. Custom commands are specific to each user and are saved to the
commands.paini file output by the Vivado IDE. For more information, see Outputs for Environment
Configuration in Appendix B.
TIP: You can also use the create_gui_custom_command Tcl command to add custom menu
commands. For details, see Adding Custom Menu Commands Using a Tcl Command.
° Add: Adds new commands to the custom menu. In the popup window, type the
command name, and press Enter to add the command to the list of custom
commands.
° Description: Specifies the text to display in the status bar when hovering over the
menu command.
° Shortcut: Defines a keyboard shortcut for the custom command. Click Add to open
the Add Shortcut dialog box (Figure 4-4), and select the new shortcut from the
drop-down menu. To delete a shortcut, click Remove.
° Run Command: Runs the specified Tcl command or procedure for the custom
command.
° Source Tcl File: Sources the specified Tcl script file for the custom command rather
than running a single Tcl command or procedure.
° Toolbar Options: Specifies whether to add a toolbar button icon for the custom
command to the main toolbar.
- Add to the Toolbar: Enables the toolbar icon. When this check box is disabled,
the custom command does not appear on the main toolbar.
- Icon File Path: Specifies the file path to the toolbar button icon. Use a PNG, JPG,
or GIF file of approximately 20x20 pixels. The Vivado IDE resizes larger images to
fit onto the toolbar.
Using Windows
To Do This
Show or hide the Flow Navigator Press Ctrl+Q.
Make the next tab active in the Press Ctrl+Tab.
workspace
Make the previous tab active in the Press Ctrl+Shift+Tab.
workspace
Maximize or minimize the window Double-click the window tab or press Alt -.
Reset the window layout Press F5.
Locate specific text Press Ctrl+F.
Replace specific text Press Ctrl+R.
Show only messages with modified In the Messages window, click the Filter Messages toolbar
severity button , and select Show Modified.
Note: This setting results in an empty Messages window if no
messages are modified.
Read reports while commands are In the Messages window, click the Pause Output toolbar button
running in the Log window .
Tile reports horizontally or vertically Right-click a report tab, and select New Horizontal Group or
New Vertical Group.
Reopen a graphical report window Select Reports > Open Interactive Report.
automatically created as part of a
design run
Input Files
In the Vivado® IDE, you can specify the location of the files used as input.
Table B-1 lists the Vivado IDE input files, including files types and descriptions.
• Verilog Header • The original source files can be referenced and left in place,
or they can be copied into the project for portability.
• SystemVerilog
• You can specify directories when importing RTL source files.
All recognized files and file types contained in the directories
are imported into the project.
I/O Port Lists CSV • You can import a Comma Separated Values (CSV) format file
to populate the I/O Ports window within the I/O Planning
layout. This functionality is intended for use in an I/O
Planning project only.
• You can assign the I/O ports to physical package pins to
define the device pin configuration.
• CSV is a standard file format used to exchange information
with board designers about device pins and pinout.
• NGO • When you select the top-level logic, lower-level modules are
imported automatically. This process has more flexibility
when updating the design.
• The Vivado IDE incremental netlist import capability allows
netlist updates at any level of the design hierarchy.
Note: NGC format files are not supported in the Vivado Design Suite
for UltraScale™ devices. Xilinx recommends that you regenerate the IP
using the Vivado Design Suite IP customization tools with native
output products. Alternatively, you can use the NGC2EDIF command to
migrate the NGC file to EDIF format for importing, as described in the
ISE to Vivado Design Suite Migration Guide (UG911) [Ref 18]. However,
Xilinx recommends using native Vivado IP rather than XST-generated
NGC format files going forward.
Top-Level Netlists • EDIF • The Vivado IDE supports importing EDIF or NGC netlists.
• NGC • The Vivado IDE can construct the design hierarchy using
multiple netlists.
• When you select the top-level logic, lower-level modules are
imported automatically. Incremental netlist import
capabilities allow netlist updates at any level of design
hierarchy.
• In-process floorplanning constraints are maintained through
iterations.
Xilinx IP and IP • XCI • The Vivado IDE supports importing configured Xilinx IP by
Integrator Block • XCIX using the IP XCI file or the core container XCIX file.
Designs • The Vivado IDE supports importing a BD file containing a
• BD
block design created with Vivado IP integrator.
Constraint Files • XDC • The Vivado IDE supports Synopsys Design Constraints (SDC)
• SDC and Xilinx® Design Constraints (XDC) file formats.
• The Vivado IDE can import multiple constraints files, which
allows for separation of physical constraints, I/Os, and timing
constraints.
Other Files • BMM • BMM: Block RAM Memory Map (BMM) file is a text file that
• ELF syntactically describes how individual block RAMs make up a
contiguous logical data space.
• MIF
• ELF: An Executable and Linkable Format (ELF) file is a binary
• COE data file that contains an executable CPU code image ready
for running on a CPU.
• MIF: This file describes the memory contents that are used by
a core, a cell, or simulation models.
• COE: This file describes the initial memory and coefficients
contents as input for core generation.
Output Files
By default, the Vivado IDE stores report output files as follows:
• Outputs from Tcl commands are written to the start-in directory, from which the Vivado
IDE was launched.
• Outputs from the GUI are written to the project directory by default.
• When running synthesis or implementation, the output files are written to the run
directories for the project.
• The default location of the journal and log files depend on the operating system:
° Windows:
- Start menu: %APPDATA%\Xilinx\Vivado
- Command prompt: Directory from which Vivado IDE is opened.
RECOMMENDED: You can open the Vivado IDE from any directory. However, Xilinx recommends running
the Vivado IDE from a project directory, because the log and journal files are written to the launch
directory. When running from a command prompt, launch the Vivado IDE from the project directory, or
use the vivado -log and -journal options to specify a location. When using a Windows shortcut,
you must modify the Start in folder, which is a Property of the shortcut. Alternatively, you can launch
the Vivado IDE by double-clicking the project file (.xpr extension) to ensure that the log and journal
files are written to the project directory.
Table B-2 lists the Vivado IDE output files, including files types and descriptions.
The files defining these themes and layouts are written to the Vivado IDE environment
folders in the following locations:
• Windows: %APPDATA%\Xilinx\vivado\<version>
• Linux: ~/.Xilinx/vivado/<version>
Table B-3 lists the environment configuration files. input files, including files names and
descriptions.
project_name/project_name.sim/sim_run_name/sim_#
CAUTION! By default, the contents of this directory are deleted when the run is reset and are
regenerated when the run is launched again.
Table B-5 lists the file/directory name, simulation type, and description for the simulation
runs.
IMPORTANT: Do not modify the implementation files manually. These files are maintained by the
Vivado IDE.
Xilinx Resources
For support resources such as Answers, Documentation, Downloads, and Forums, see Xilinx
Support.
Solution Centers
See the Xilinx Solution Centers for support on devices, software tools, and intellectual
property at all stages of the design cycle. Topics include design assistance, advisories, and
troubleshooting tips.
• From the Vivado IDE, select Help > Documentation and Tutorials.
• On Windows, select Start > All Programs > Xilinx Design Tools > DocNav.
• At the Linux command prompt, enter docnav.
Xilinx Design Hubs provide links to documentation organized by design tasks and other
topics, which you can use to learn key concepts and address frequently asked questions. To
access the Design Hubs:
• In the Xilinx Documentation Navigator, click the Design Hubs View tab.
• On the Xilinx website, see the Design Hubs page.
Note: For more information on Documentation Navigator, see the Documentation Navigator page
on the Xilinx website.
References
1. Vivado® Design Suite User Guide: Design Flows Overview (UG892)
2. Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)
3. Vivado Design Suite User Guide: Using Tcl Scripting (UG894)
4. Vivado Design Suite Tcl Command Reference Guide (UG835)
5. Vivado Design Suite Tutorial: Design Flows Overview (UG888)
6. Vivado Design Suite User Guide: Getting Started (UG910)
7. Vivado Design Suite User Guide: Designing with IP (UG896)
8. Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)
9. Vivado Design Suite User Guide: Logic Simulation (UG900)
10. Vivado Design Suite User Guide: Synthesis (UG901)
11. Vivado Design Suite User Guide: Using Constraints (UG903)
12. Vivado Design Suite User Guide: Implementation (UG904)
13. Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
14. Vivado Design Suite User Guide: Programming and Debugging (UG908)
15. Vivado Design Suite User Guide: System-Level Design Entry (UG895)
16. Vivado Design Suite Properties Reference Guide (UG912)
17. Vivado Design Suite User Guide: I/O and Clock Planning (UG899)
18. ISE to Vivado Design Suite Migration Guide (UG911)
19. Vivado Design Suite User Guide: Model-Based DSP Design Using System Generator
(UG897)
20. Vivado Design Suite User Guide: Power Analysis and Optimization (UG907)
21. Vivado Design Suite Documentation
Training Resources
Xilinx provides a variety of training courses and QuickTake videos to help you learn more
about the concepts presented in this document. Use these links to explore related training
resources: