DLDM Assignment - Tutorial - QB - MCQ - (DIV B)
DLDM Assignment - Tutorial - QB - MCQ - (DIV B)
DLDM Assignment - Tutorial - QB - MCQ - (DIV B)
Assignment – I
Assignment – II
Q1. Minimize the following expression and realize using universal gates.
Q.5 Implement the following expression using K-Map and design using basic gates.
Tutorial – 1
Q2. Explain basic gates and Draw pin diagram of AND gate.
Tutorial – 2
4. F(A, B, C, D) = ∑m(0,1,2,4,5,6,8,9,10,12,13)
Tutorial – 3
Q.1 Design combinational logic circuit that will generate the square of all the combinations
of the three bit binary number represented by A2, A1, A0.
Q.4 Design the combinational circuit whose inputs are four bit binary number and output are
2’s complement of input number.
Q.5 Design full adder and full subtractor using 3:8 decoder.
Tutorial – 4
Q.1 Difference between combinational and sequential circuit
Q.2 Explain One bit memory cell (or Basic Bistable element)
Q.5 What are the advantages of Master Slave (MS) flip flop? Also explain the working of
MS JK flip flop.
.
KCES’s College of Engineering and Management Jalgaon
DEPARTMENT OF COMPUTER ENGINEERING
Tutorial –5
Q.1 Explain the difference between Synchronous and Asynchronous counter in details.
Q.3 Draw and explain the Ring Counter using JK flip flop
Q.4 Design a sequence generator for the sequence 1010 using shift register.
Tutorial – 6
Q.1.Draw and explain the circuit diagram of 4 bit shift register with serial left shift.
Q.3 Explain with neat diagram working of 3 bit up down synchronous counter.
KCES’s College of Engineering and Management Jalgaon
DEPARTMENT OF COMPUTER ENGINEERING
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Tutorial – 7
Q1.What is microprocessor? State the features of microprocessor.
Q3. With the neat diagram explain the architecture of 8086 microprocessor.
Tutorial – 8
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Tutorial – 9
Tutorial – 10
Question Bank
UNIT- I INTRODUCTION
Note: Figures to the right indicates full marks of respective question
no.
2
Design using basic gates only.
8 Implement full subtractor with two half subtractor and one OR gate.
Question Bank
UNIT- II COMBINATIONAL DIGITAL CIRCUITS
no.
F(A,B,C) = ∑ ( 0,1,3,4,8,9,15)
3 Explain decimal to BCD encoder with logic symbol and truth table.
5 Implement full adder with two half adder and one OR gate.
Question Bank
UNIT- III SEQUENTIAL CIRCUITS AND SYSTEMS
7 Explain 06
8 Convert 06
Question Bank
UNIT- IV FUNDAMENTALS OF MICROPROCESSORS
no.
3 What are the four categories of segments explain with neat diagram? 06
Question Bank
UNIT- V 8086 INSTRUCTION SET AND PROGRAMMING
no.
steps.
8086?
Unit – I INTRODUCTION
a) It is a table representing what output will one get for a given input.
c) Both of these
d) None of these
5 NAND & NOR are considered to be Universal gates because they are capable
of performing the logical functionalities concerned to _______.
6 Which among the below stated boolean expressions do not obey De-Morgan's
theorem ?
a) X+Y = X . Y b) X.Y = X + Y c) X.Y = X+Y d) None of the above
Answer: b) (0.26050)8
Answer: d) 0100101
Answer: b) 9.125
Answer: c) LIFO
7 The output of a sequential circuit depends on
a) Present inputs only
8 The only difference between a combinational circuit and a flip-flop is that ______
a) The flip-flop requires previous state
b) The flip-flop requires next state
c) The flip-flop requires a clock pulse
d) The flip-flop depends on the past as well as present states
Answer: c) The flip-flop requires a clock pulse
9 Both the J-K & the T flip-flop are derived from the basic _____________
a) S-R flip-flop b) S-R latch c) D latch d) D flip-flop
Answer: b) S-R latch
10 Sequential circuit contains
a) No memory element b) At least one memory element
c) All inputs applied simultaneously d) None of the above
Answer: b) At least one memory element
11 D flip flop is used as
a) Differentiator b) Divider circuit c) Delay switch d) All of these
Answer: c) Delay switch
12 T Flip flop is used as
a) Transfer data circuit b) Toggle switch c) Time delay switch d)None of the above
Answer: b) Toggle switch
13 Following flip flop is used to eliminate race around problem
a) R-S flip flop b) Master slave J-K flip flop c)J-K flip flop d) None of the above
14 The minimum number of flip flops required to construct a mod 64( divide by 64) ripple
counter are
a) 4 flip flops b) 6 flip flops c)16 flip flops d)64 flip flops
Answer: b) 6 flip flops
15 The type of register in which data is entered into it only one bit at a time, but has all data bits
available as output, is
a) serial in serial out register
Reference Book:
1. M. M. Mano, Digital logic and Computer design, Pearson Education India, 2016.