Computer Hardware Lecturer - 3

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Associative memory organization

The associative memory hardware structure consists of:


 memory array,
 logic for m words with n bits per word, and
 several registers like input resgister, mask register, select register and output register.
The block diagram showing organization of associative memory is shown below:

Functions of the registers used in associative memory is given below:


 Input Register (I) hold the data that is to be written into the associative memory. It is also
used to hold the data that is to be searched for. At a particular time it can hold a data
containing one word of length (say n).
 Mask Register (M) is used to provide a mask for choosing a key or particular field in the
input register's word. Since input register can hold a data of one word of length n so the
maximum length of mask register can be n.
 Select Register (S) contains m bits, one for each memory words. When input data in I
register is compared to key in m register and match is found then that particular bit is set in
select register.
 Output Register (Y) contains the matched data word that is retrieved from associative
memory.

Advantages of associative memory

Advantages of associative memory is given below:


 Associative memory searching process is fast.
 Associative memory is suitable for parallel searches.

Disadvantages of associative memory


A computer can address more memory than the amount physically installed on the system.
This extra memory is actually called virtual memory and it is a section of a hard disk that's
set up to emulate the computer's RAM.
The main visible advantage of this scheme is that programs can be larger than physical
memory. Virtual memory serves two purposes. First, it allows us to extend the use of physical
memory by using disk. Second, it allows us to have memory protection, because each virtual
address is translated to a physical address.
Following are the situations, when entire program is not required to be loaded fully in main
memory.
 User written error handling routines are used only when an error occurred in
the data or computation.
 Certain options and features of a program may be used rarely.
 Many tables are assigned a fixed amount of address space even though only a
small amount of the table is actually used.
 The ability to execute a program that is only partially in memory would
counter many benefits.
 Less number of I/O would be needed to load or swap each user program into
memory.
 A program would no longer be constrained by the amount of physical memory
that is available.
 Each user program could take less physical memory, more programs could be
run the same time, with a corresponding increase in CPU utilization and
throughput.
Modern microprocessors intended for general-purpose use, a memory management unit, or
MMU, is built into the hardware. The MMU's job is to translate virtual addresses into
physical addresses. A basic example is given below −
Virtual memory is commonly implemented by demand paging. It can also be implemented in
a segmentation system. Demand segmentation can also be used to provide virtual memory.

Demand Paging
A demand paging system is quite similar to a paging system with swapping where processes
reside in secondary memory and pages are loaded only on demand, not in advance. When a
context switch occurs, the operating system does not copy any of the old program’s pages out
to the disk or any of the new program’s pages into the main memory Instead, it just begins
executing the new program after loading the first page and fetches that program’s pages as
they are referenced.
While executing a program, if the program references a page which is not available in the
main memory because it was swapped out a little ago, the processor treats this invalid
memory reference as a page fault and transfers control from the program to the operating
system to demand the page back into the memory.
Advantages
Following are the advantages of Demand Paging −

 Large virtual memory.


 More efficient use of memory.
 There is no limit on degree of multiprogramming.
Disadvantages
 Number of tables and the amount of processor overhead for handling page
interrupts are greater than in the case of the simple paged management
techniques.

Cache Memory
Cache memory is a high-speed memory, which is small in size but faster than the
main memory (RAM). The CPU can access it more quickly than the primary memory.
So, it is used to synchronize with high-speed CPU and to improve its performance.
Cache memory can only be accessed by CPU. It can be a reserved part of the main
memory or a storage device outside the CPU. It holds the data and programs which
are frequently used by the CPU. So, it makes sure that the data is instantly available
for CPU whenever the CPU needs this data. In other words, if the CPU finds the
required data or instructions in the cache memory, it doesn't need to access the
primary memory (RAM). Thus, by acting as a buffer between RAM and CPU, it speeds
up the system performance.

Types of Addressing Modes


There are various types of Addressing Modes which are as follows −
Implied Mode − In this mode, the operands are specified implicitly in the definition of the
instruction. For example, the instruction "complement accumulator" is an implied-mode
instruction because the operand in the accumulator register is implied in the definition of the
instruction. All register reference instructions that use an accumulator are implied-mode
instructions.
Instruction format with mode field

Opcode Mode Address

Immediate Mode − In this mode, the operand is specified in the instruction itself. In other
words, an immediate-mode instruction has an operand field instead of an address field. The
operand field includes the actual operand to be used in conjunction with the operation
determined in the instruction. Immediate-mode instructions are beneficial for initializing
registers to a constant value.
Register Mode − In this mode, the operands are in registers that reside within the CPU. The
specific register is selected from a register field in the instruction. A k-bit field can determine
any one of the 2k registers.
Register Indirect Mode − In this mode, the instruction defines a register in the CPU whose
contents provide the address of the operand in memory. In other words, the selected register
includes the address of the operand rather than the operand itself.
A reference to the register is then equivalent to specifying a memory address. The advantage
of a register indirect mode instruction is that the address field of the instruction uses fewer
bits to select a register than would have been required to specify a memory address directly.
Autoincrement or Autodecrement Mode &minuend; This is similar to the register indirect
mode except that the register is incremented or decremented after (or before) its value is used
to access memory. When the address stored in the register defines a table of data in memory,
it is necessary to increment or decrement the register after every access to the table. This can
be obtained by using the increment or decrement instruction.
Direct Address Mode − In this mode, the effective address is equal to the address part of the
instruction. The operand resides in memory and its address is given directly by the address
field of the instruction. In a branch-type instruction, the address field specifies the actual
branch address.
Indirect Address Mode − In this mode, the address field of the instruction gives the address
where the effective address is stored in memory. Control fetches the instruction from
memory and uses its address part to access memory again to read the effective address.
Indexed Addressing Mode − In this mode, the content of an index register is added to the
address part of the instruction to obtain the effective address. The index register is a special
CPU register that contains an index value. The address field of the instruction defines the
beginning address of a data array in memory.

Hardwired v/s Micro-programmed Control Unit


Introduction :
In computer architecture, the control unit is responsible for directing the flow of data
and instructions within the CPU. There are two main approaches to implementing a
control unit: hardwired and micro-programmed.
A hardwired control unit is a control unit that uses a fixed set of logic gates and
circuits to execute instructions. The control signals for each instruction are hardwired
into the control unit, so the control unit has a dedicated circuit for each possible
instruction. Hardwired control units are simple and fast, but they can be inflexible and
difficult to modify.
On the other hand, a micro-programmed control unit is a control unit that uses a
microcode to execute instructions. The microcode is a set of instructions that can be
modified or updated, allowing for greater flexibility and ease of modification. The
control signals for each instruction are generated by a microprogram that is stored in
memory, rather than being hardwired into the control unit.
Micro-programmed control units are slower than hardwired control units because they
require an extra step of decoding the microcode to generate control signals, but they
are more flexible and easier to modify. They are commonly used in modern CPUs
because they allow for easier implementation of complex instruction sets and better
support for instruction set extensions.
To execute an instruction, the control unit of the CPU must generate the required
control signal in the proper sequence. There are two approaches used for generating
the control signals in proper sequence as Hardwired Control unit and the Micro-
programmed control unit.
Hardwired Control Unit: The control hardware can be viewed as a state machine
that changes from one state to another in every clock cycle, depending on the contents
of the instruction register, the condition codes, and the external inputs. The outputs of
the state machine are the control signals. The sequence of the operation carried out by
this machine is determined by the wiring of the logic elements and hence named
“hardwired”.
 Fixed logic circuits that correspond directly to the Boolean expressions are
used to generate the control signals.
 Hardwired control is faster than micro-programmed control.
 A controller that uses this approach can operate at high speed.
 RISC architecture is based on the hardwired control unit

Micro-programmed Control Unit –


 The control signals associated with operations are stored in special memory
units inaccessible by the programmer as Control Words.
 Control signals are generated by a program that is similar to machine
language programs.
 The micro-programmed control unit is slower in speed because of the time
it takes to fetch microinstructions from the control memory.
Some Important Terms
1. Control Word: A control word is a word whose individual bits represent
various control signals.
2. Micro-routine: A sequence of control words corresponding to the control
sequence of a machine instruction constitutes the micro-routine for that
instruction.
3. Micro-instruction: Individual control words in this micro-routine are
referred to as microinstructions.
4. Micro-program: A sequence of micro-instructions is called a micro-
program, which is stored in a ROM or RAM called a Control Memory
(CM).
5. Control Store: the micro-routines for all instructions in the instruction set
of a computer are stored in a special memory called the Control Store.

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