Isscc - 2021 - Fin FCH
Isscc - 2021 - Fin FCH
Isscc - 2021 - Fin FCH
I. I NTRODUCTION
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3584 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 12, DECEMBER 2021
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ROOIJERS et al.: FILL-IN TECHNIQUE FOR ROBUST IMD SUPPRESSION IN CHOPPER AMPLIFIERS 3585
Fig. 5. Chopper-induced IMD tones versus the OTA delay for a fixed FCH
Fig. 3. Simplified model for a chopped OTA with a pure delay and the of 20 kHz.
resulting waveform.
Fig. 6. Simplified model for a chopped OTA with limited BW and the
resulting waveform.
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ROOIJERS et al.: FILL-IN TECHNIQUE FOR ROBUST IMD SUPPRESSION IN CHOPPER AMPLIFIERS 3587
Fig. 11. Fill-in technique combined with auto-zeroing (left), timing diagram (middle), and the corresponding signals (right).
Fig. 12. Simulated amplitude spectrum without G m -mismatch, 1% of mismatch, and 5%.
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3588 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 12, DECEMBER 2021
Fig. 15. Measured amplitude spectrum (ten averages) for a one-tone test of 79 kHz 1 Vrms for fill-in disabled and enabled.
transients, which would cause additional IMD, the OTA inputs 1% mismatch, which is readily achievable. Even with 5%
are shorted to one of the input pins during the AZ phase mismatch, −120 dB IMD can still be achieved, showing that
(via S1 ). Dummy always-closed and always-open switches in practice, G m mismatch is not an important limiting factor.
(in gray) ensure that the input network formed by the switch
resistances and the parasitic capacitance is symmetric. During
IV. M EASUREMENT R ESULTS
the AZ phase, CAZ (25 pF) acts as a passive integrator whose
output drives G mAZ1 (Telescopic) to cancel the OTA’s offset. The prototype chopper-stabilized amplifier with fill-in tech-
The resulting voltage is held by C1,2 (1.8 pF each) during the nique was realized in a 0.18 μm CMOS BCD process. The
amplification phase. To minimize noise folding, the noise BW die micrograph is shown in Fig. 13, with the most important
during the AZ phase should be limited by minimizing G mAZ1 , blocks highlighted. It occupies an active area of 0.54 mm2 and
but this increases the OTA’s worst case output swing. As a draws 550 μA from a 5 V supply. The opamp has a 0–4.5 V
compromise, G mAZ1 is chosen to be ∼50× smaller than G m1 . input CM range, a 15.4 noise efficiency factor (NEF), and a
At the start of the AZ phase, the output current of the OTA 4.2 MHz gain bandwidth product (GBW). A power breakdown
needs to transition from a level that depends on the input is shown in Fig. 14. It is equally split between the main
signal to a level that is nearly zero. To prevent these transients amplifier, Channel 1, Channel 2, and the rest of the stabi-
from reaching the AZ loop and thus causing additional IMD, lization loop. The first three all have low noise input stages
shorting switch S4 allows the OTA current to settle before and so dissipate significant power. Furthermore, at high input
it is connected via switches S6&7 to the integration capaci- frequencies, the signal entering the stabilization loop increases
tor CAZ [22]. S6&7 are controlled by the AZ1S signal, which due to the roll-off of amplifier gain. To handle the resulting
includes a dead-band that disconnects CAZ during this settling high current levels output by the input OTAs, the stabilization
time. The width of the dead-band is set to 100 ns, which loop also dissipates significant power.
guarantees OTA settling in the worst case corner. Similarly, With the prototype amplifier configured as a buffer,
the AZ phase is ended roughly 100 ns before the next chopping a one-tone test was performed using an Audio Precision
phase, allowing G m1,2 to settle before it is connected to G mINT . APx555 analyzer, which provides a 1 Vrms 79 kHz input
To further minimize the voltage transient that occurs when the tone at an input CM level of 2.2 V. To ensure that the
OTA is connected to G mINT , the shorting switch (S4 ) resistance IMD tones are well above the ∼134 dB noise floor, an input
is set to ∼1/G mINT (6.8 k). The remaining voltage transients tone near 4FCH (79 kHz) was used rather than one near
are then mainly due to the charge-injection of the multiplexing 2FCH (39 kHz). The resulting output amplitude spectrum is
switches (S3 and S5 ). shown in Fig. 15. The 79 kHz input tone, together with the
The effectiveness of the fill-in technique is limited by the chopping frequency of 20 kHz, leads to an IMD tone at 1 kHz
G m matching of the two input OTAs, as any mismatch will (4FCH –Fin ). Without the fill-in technique, a large (−97.7 dB)
cause additional transients in their composite output current. IMD tone is present. With the fill-in technique enabled, this
With a 1 Vrms 81 kHz input signal, the results of simulations drops by 28 to −125.9 dB. Some power-line interference is
with various degrees of intentional G m mismatch are shown also visible below 1 kHz. This is present even in the absence
in Fig. 12. Without mismatch, the simulated chopper-induced of the prototype chip and is thus caused by the measurement
IMD is −133 dB, increasing only slightly to −131 dB for setup. Higher-order IMD tones (>1 kHz) are also partly
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ROOIJERS et al.: FILL-IN TECHNIQUE FOR ROBUST IMD SUPPRESSION IN CHOPPER AMPLIFIERS 3589
Fig. 16. Measured amplitude spectrum (ten averages) for a two-tone test of 79 and 80 kHz tone 0.5 Vrms each, for the case of the un-chopped amplifier,
chopped without fill-in, and with fill-in.
Fig. 17. Histogram of the offset voltage and input current for 15 samples.
The opamp’s voltage noise density is shown in Fig.
√ 19. With
chopping disabled, its white-noise level is 16 nV Hz and its
suppressed by the fill-in technique. Some residual ripple is 1/ f corner frequency is ∼6 kHz. With chopping, auto-zeroing
also present at multiples of FCH . and fill-in enabled, the 1/ f corner frequency is less than a
A two-tone test was also performed using tones at 79 and few Hertz. The noise folding associated with auto-zeroing
80 kHz, both with an amplitude of 0.5 Vrms . The resulting each OTA at 20 kHz causes a slight noise bump around this
amplitude spectrum is shown in Fig. 16. As a baseline, the two- frequency. Some tones can also be seen at the chopping/auto-
tone IMD was first measured with chopping disabled. Due to zeroing frequencies, which is due to PCB-mediated crosstalk
the amplifier’s own non-linearity, an IMD tone of −107 dB between the 5 V reference clock (80 kHz) and the prototype
can be seen at 1 kHz. When chopping is enabled, but without chip.
the fill-in technique, this tone increases to −97 dB, which is To verify the amplifier’s ability to handle rapidly changing
mainly due to chopper-induced IMD. With the fill-in technique signals, its slew rate was measured by applying a 4 V input
enabled, the IMD drops back to −107 dB, demonstrating the step (Fig. 20). For both rising and falling steps, the speed at
effective suppression of chopper-induced IMD. which the amplifier’s output transitions from 10% to 90% of
With a 2.5 V input CM voltage and FCH = 20 kHz, its final value corresponds to a slew rate of 1.7 V/μs.
measurements on 15 samples show that the offset is less Fig. 21 shows the measured power supply rejection ratio
than 0.8 μV, while the input current is less than 600 pA (PSRR) of the amplifier using a 1 Vrms disturbance added to
(Fig. 17). The input current was measured by a Keithley the 5 V supply at different frequencies. At low frequencies,
6514 electrometer, and guarding was used to minimize printed the PSRR is 124 dB, rolling off at higher frequencies.
circuit board (PCB) leakage. The input current is a linear Table I summarizes the performance of the amplifier and
function of FCH (Fig. 18), indicating that it is mainly due to the compares it to other DOC amplifiers using chopping, auto-
charge-injection (mismatch) of the chopper and AZ switches. zeroing, or a combination of the two. Table I reports the
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3590 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 12, DECEMBER 2021
TABLE I
P ERFORMANCE S UMMARY AND C OMPARISON W ITH THE S TATE - OF - THE -A RT
Fig. 19. Voltage noise density versus frequency for the case without any
dynamic techniques and with CH, AZ, and fill-in.
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ROOIJERS et al.: FILL-IN TECHNIQUE FOR ROBUST IMD SUPPRESSION IN CHOPPER AMPLIFIERS 3591
n = 1, 3, 5, . . . or f in = n fCH with n = 2, 4, 6, . . .), which will negligible for a small Tdelay . The multiplication pVin leads to
cause near-dc IMD tones, an 81.9 dB improvement is obtained. the convolution
For low input frequencies (<1 kHz), the IMD tones are below
the −134 dB noise floor. Even though an additional low- p ∗ Vin ( f )
∞
noise input stage is required to implement the fill-in technique,
= 4Tdelay FCH sinc(Tdelay f ) δ( f − n2F CH ) ∗ Vin (f)
the amplifier’s total supply current (0.55 mA) is comparable
n=−∞
with that of other designs. Each fill-in channel uses 24% of ∞
the power and 10% of the total active area. = 4Tdelay FCH sinc(Tdelay f ) Vin ( f − n2F CH ). (7)
n=−∞
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3592 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 12, DECEMBER 2021
[15] A. T. K. Tang, “Bandpass spread spectrum clocking for reduced clock Yoshinori Kusuda (Member, IEEE) received the
spurs in autozeroed amplifiers,” in Proc. IEEE Int. Symp. Circuits Syst. M.S. degree in physical electronics from Tokyo
(ISCAS), vol. 1, May 2001, pp. 663–666. Institute of Technology, Tokyo, Japan, in 2004, and
[16] Maxim Integrated. (Feb. 2018). MAX4238/MAX4239 Data Sheet. the Ph.D. degree with a focus on the subject of
[Online]. Available: https://datasheets.maximintegrated.com/en/ds/MAX reducing switching artifacts in chopper amplifiers
4238-MAX4239.pdf from TU Delft, Delft, The Netherlands, in 2018.
[17] Analog Devices. (Jun. 2015). AD8551 Data Sheet. [Online]. Available: In 2004, he joined Analog Devices Japan Design
http://www.analog.com/media/en/technical-documentation/datasheets/ Center, Tokyo. From 2015 to 2018, he was a
AD8551_8552_8554.pdf Guest with the Electronic Instrumentation Labora-
[18] Analog Devices Inc. (1999). AD8571 Data Sheet. [Online]. Available: tory, TU Delft. Since then, he has been with Analog
http://www.analog.com/media/en/technical-documentation/data- Devices and is currently in San Jose, CA, USA,
sheets/AD8571_8572_8574.pdf working with the Linear and Precision Technology Group. He has been
[19] V. Ivanov and √M. Shaik, “A 10 MHz-bandwidth 4 μs-large-signal- working on precision CMOS analog designs, including stand-alone amplifiers
settling 6.5nV/ Hz-noise 2 μV-offset chopper operational amplifier,” and application specific mixed-signal products. This work has resulted in
in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, presentations and papers at IEEE conferences and journals, as well as
Feb. 2016, pp. 88–89. 14 issued U.S. patents.
[20] T. Rooijers, S. Karmakar, Y. Kusuda, J. H. Huijsing, and
K. A. A. Makinwa, “A Chopper-stabilized amplifier with -107 dB IMD Johan H. Huijsing (Life Fellow, IEEE) received the
and 28 dB suppression of Chopper-induced IMD,” in IEEE Int. Solid- M.Sc. degree in electrical engineering and the Ph.D.
State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. √
2021, pp. 438–440. degree from Delft University of Technology, Delft,
[21] Q. Huang and C. Menolfi, “A 200 nV offset 6.5 nV/ Hz noise PSD 5.6 The Netherlands, in 1969 and 1981, respectively.
kHz Chopper instrumentation amplifier in 1 μm digital CMOS,” in IEEE He has been an Assistant Professor and an Asso-
Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2001 ciate Professor of electronic instrumentation with the
pp. 362–363. Faculty of Electrical Engineering, Delft University
[22] M. A. P. Pertijs and W. J. Kindt, “A 140 dB-CMRR current-feedback of Technology, since 1969. In 1990, he joined the
instrumentation amplifier employing ping-pong auto-zeroing and chop- Chair of Electronic Instrumentation, as a Full Pro-
ping,” IEEE J. Solid-State Circuits, vol. 45, no. 10, pp. 2044–2056, fessor. He has been a Professor Emeritus since 2003.
Oct. 2010. From 1982 to 1983, he was a Senior Scientist with
Philips Research Laboratories, Sunnyvale, CA, USA. From 1983 to 2005, he
was a Consultant with Philips Semiconductors, Sunnyvale. Since 1998, he
has been a Consultant with Maxim, Sunnyvale. His research work is focused
on operational amplifiers, analog-to-digital converters, and integrated smart
sensors. He has supervised 30 Ph.D. students. He has authored or coauthored
over 300 scientific articles, 40 U.S. patents, and 15 books. In 1992, he initiated
the International Workshop on Advances in Analog Circuit Design. He co-
organized it yearly until 2003.
Thije Rooijers (Member, IEEE) was born in Leiden, Dr. Huijsing was a Program Committee Member of the European Solid-State
The Netherlands, in 1991. He received the B.Sc. and Circuits Conference from 1992 to 2002. He was awarded the title of Simon
M.Sc. degrees in electrical engineering from Delft Stevin Meester by the Dutch Technology Foundation. He was the Chairman
University of Technology, Delft, The Netherlands, of the Dutch STW Platform on Sensor Technology and the Biannual National
in 2013 and 2016, respectively, where he is currently Workshop on Sensor Technology from 1991 to 2002.
pursuing the Ph.D. degree with a focus on reducing
the imperfections of dynamic offset compensated Kofi A. A. Makinwa (Fellow, IEEE) received the
amplifiers. B.Sc. and M.Sc. degrees from Obafemi Awolowo
Mr. Rooijers was a recipient of the ADI Outstand-
University, Ife, Nigeria, in 1985 and 1988, respec-
ing Student Designer Award in 2018, the ProRISC tively, the M.E.E. degree from Philips International
Best Oral Presentation Award in 2019, and the Institute, Eindhoven, The Netherlands, in 1989, and
ProRISC Best Poster Award in 2021. the Ph.D. degree from Delft University of Technol-
ogy, Delft, The Netherlands, in 2004.
From 1989 to 1999, he was a Research Scien-
tist with Philips Research Laboratories, Eindhoven,
where he worked on interactive displays and digital
recording systems. In 1999, he joined Delft Uni-
versity of Technology, where he is currently an Antoni van Leeuwenhoek
Professor and the Head of the Microelectronics Department. His research
Shoubhik Karmakar (Student Member, IEEE) interests include the design of mixed-signal circuits, sensor interfaces, and
received the B.E. degree in electrical and electron- smart sensors. This has led to 16 books, over 300 technical articles, and over
ics engineering from Birla Institute of Technology 30 patents.
and Science, Pilani, India, in 2012, and the M.Sc. Dr. Makinwa has been on the program committees of several IEEE con-
degree from Delft University of Technology, Delft, ferences, and was the Analog Subcom Chair of ISSCC. He has also served
The Netherlands, in 2017, where he is currently the Solid-State Circuits Society as a Distinguished Lecturer and as an Elected
pursuing the Ph.D. degree. Member of its Adcom. He is currently one of the organizers of the Advances
His current research interests include energy- in Analog Circuit Design Workshop and the Sensor Interfaces Meeting. He
efficient data converters and high-performance is an ISSCC top-10 contributor, and a co-recipient of 16 best paper awards,
class-D amplifiers for audio applications. from the JSSC, ISSCC, VLSI, ESSCIRC, and Transducers, among others. He
is a member of the Royal Netherlands Academy of Arts and Sciences.
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