Power Supply Design Seminar

Switch-mode power converter

compensation made easy

Reproduced from
2016 Texas Instruments Power Supply Design Seminar SEM2200

TI Literature Number: SLUP341

© 2016, 2017 Texas Instruments Incorporated

Power Seminar topics and online power training modules are available at:ti.com/psds
 Switch-mode power converter
compensation made easy

Louis Diana
Robert Sheehan

Texas Instruments – 2016/17 Power Supply Design Seminar

Agenda
• Compensation design and objectives
• Explanation of poles and zeros
• Power stage characteristics
• Error amplifier and transconductance amplifier
• Isolated feedback with optocoupler
• Compensation examples
• Circuit limitations and other issues

Texas Instruments – 2016/17 Power Supply Design Seminar 3-2

Compensation design and objectives
Why do we need feedback and why do we need compensation?
• Feedback is needed to
regulate the output voltage
• The bandwidth of the control
loop determines the response
time

Texas Instruments – 2016/17 Power Supply Design Seminar 3-3

Control loop response
Poor transient response Objective Good transient response

IOUT • Maximize crossover IOUT

frequency for fastest
transient response
VOUT VOUT
• Adjust compensation for
best settling behavior

• Response is under- • Response is well

damped causing damped with good
oscillatory behavior settling behavior

Texas Instruments – 2016/17 Power Supply Design Seminar 3-4

Phase margin and gain margin
Control loop – frequency response Phase margin and stability
60 135
• Sufficient phase margin is needed to
40 90 prevent oscillation (45º min.)
• Gain margin goal 10 dB min.
MAGNITUDE (dB)

PHASE (°)
20 45
Phase margin • Slope of –20 dB/decade when passing
through 0 dB
0 0
• Bandwidth rule of thumb is 1/5 to 1/10
Gain margin
-20 -45 of switching frequency

-40 -90
100 1,000 10,000 100,000 1,000,000

FREQUENCY (Hz)

Texas Instruments – 2016/17 Power Supply Design Seminar 3-5

Poles and zeros
Pole Zero
1 s
H (s)  1
1
s Z
H (s) 
P 1

20 45 60 135
MAGNITUDE (dB)

MAGNITUDE (dB)
0 0 40 90

PHASE (°)

PHASE (°)
-20 -45 20 45

-40 -90 0 0

-60 -135 -20 -45

10 100 1,000 10,000 100,000 1,000,000 10 100 1,000 10,000 100,000 1,000,000
FREQUENCY (Hz) FREQUENCY (Hz)

Texas Instruments – 2016/17 Power Supply Design Seminar 3-6

Inverted and right-half-plane zeros
Inverted zero Right-half-plane zero
Z 1
s
1
H (s)  s Z
H (s) 
1 1

60 45 60 45
MAGNITUDE (dB)

MAGNITUDE (dB)
40 0 40 0

PHASE (°)

PHASE (°)
20 -45 20 -45

0 -90 0 -90

-20 -135 -20 -135

10 100 1,000 10,000 100,000 1,000,000 10 100 1,000 10,000 100,000 1,000,000
FREQUENCY (Hz) FREQUENCY (Hz)

Texas Instruments – 2016/17 Power Supply Design Seminar 3-7

Complex conjugate pole and ESR zero
Complex conjugate pole With ESR zero
s
1 1
H (s)  Z
s s2 H (s) 
1  2 s s2
QO  O O 1  2
QO  O O

20 45 20 45
Gain
0 0 0 0
MAGNITUDE (dB)

MAGNITUDE (dB)
Q=2

PHASE (°)

PHASE (°)
-20 Q=1 -45 -20 -45
Q = 0.5
-40 Q = 0.25 -90 -40 -90
Phase
-60 -135 -60 -135

-80 -180 -80 -180

10 100 1,000 10,000 100,000 1,000,000 10 100 1,000 10,000 100,000 1,000,000
FREQUENCY (Hz) FREQUENCY (Hz)

Texas Instruments – 2016/17 Power Supply Design Seminar 3-8

Control methods and operating modes
• Voltage-mode control
Control methods
• Current-mode control

• Fixed frequency
Operating modes
• Continuous conduction-mode (CCM)

• Switching frequency – fSW 1

Switching frequency T
and period • Switching period – T f SW

Texas Instruments – 2016/17 Power Supply Design Seminar 3-9

Buck, boost and buck-boost derived topologies
• Forward • Push-pull
Buck, • Two switch forward • Full bridge
forward, VOUT  VIN  D • Active clamp forward • Phase-shifted full
push-pull, • Half bridge bridge
NS NS
bridge VOUT  VIN  D 
NP
VOUT  VIN  2  D 
NP

• Boost topology On-time duty cycle:

 VIN 
1 D
Boost VOUT
D Off-time duty cycle:
D′ = 1 - D

• Buck-boost derived • Flyback

Buck-boost, D topologies
VOUT  VIN  D NS
SEPIC, D • SEPIC VOUT  VIN  
D N P
flyback • Cuk

Texas Instruments – 2016/17 Power Supply Design Seminar 3-10

Voltage-mode buck power stage
40 45
AVC O
20 2  0

MAGNITUDE (dB)

PHASE (°)
0 Z -45
2 
-20 -90

-40 -135

-60 -180
10 100 1,000 10,000 100,000 1,000,000
VIN 1
AVC  O  FREQUENCY (Hz)
VRAMP L  COUT

ROUT s
QO  1 1
L Z  vˆOUT Z
RESR  COUT  AVC 
C OUT vˆC s s2
1  2
QO  O O

Texas Instruments – 2016/17 Power Supply Design Seminar 3-11

Current-mode buck power stage
VIN
40 45
AVC P
L RS 20 2  0

MAGNITUDE (dB)
Logic VOUT
COUT

PHASE (°)
ROUT 0 -45
A RESR
+ -20 -90
PWM -  + VSLOPE Z L
+ VC -40 2  2  -135

1 -60 -180
Ri  A  RS Z  10 100 1,000 10,000 100,000 1,000,000
RESR  COUT
FREQUENCY (Hz)
ROUT VIN
AVC  Km  at D = 0.5
Ri VSLOPE s
1
vˆOUT Z
1 K R  AVC 
P  L  m i vˆC  s   s 
COUT  ROUT L 1    1  
 P   L 

Texas Instruments – 2016/17 Power Supply Design Seminar 3-12

Current-mode boost power stage
40 45
AVC P
20 2  L 0

MAGNITUDE (dB)
R 2 

PHASE (°)
0 2  -45

-20 Z -90
2 
-40 -135

-60 -180
R  D 2 K R 10 100 1,000 10,000 100,000 1,000,000
Ri  A  RS  R  OUT L  m i
L L FREQUENCY (Hz)
ROUT  D 1
AVC  Z 
2  Ri RESR  COUT  s   s 
1    1  
vˆOUT   R    Z 
2  AVC 
P  V
K m  OUT
vˆC  s   s 
COUT  ROUT at D = 0.5 1    1  
VSLOPE  P   L 

Texas Instruments – 2016/17 Power Supply Design Seminar 3-13

Current-mode buck-boost power stage
40 45
AVC P
20 2  L 0

MAGNITUDE (dB)
R 2 

PHASE (°)
0 2  -45

-20 Z -90
 2 
-40 -135

-60 -180
ROUT  D2 K m R i
Ri  A  RS R  L  10 100 1,000 10,000 100,000 1,000,000
LD L
FREQUENCY (Hz)
ROUT  D 1
AVC  Z 
1  D   Ri RESR  COUT 
1 
s  
  1 
s 

vˆOUT   R    Z 
1 D V  VOUT  AVC 
P  K m  IN at D = 0.5 vˆC 
1 
s  
  1 
s 

COUT  ROUT VSLOPE
 P   L 

Texas Instruments – 2016/17 Power Supply Design Seminar 3-14

Current-mode forward power stage
T1
NP : NS D1 L 40 45
VIN VOUT P
CIN COUT AVC
D2 ROUT 20 2  0

MAGNITUDE (dB)
RESR

PHASE (°)
PWM
Logic Q1 0 -45
VSLOPE
A -20 -90
+
- 
RS Z L
+ VC -40 2  2  -135

1 -60 -180
Ri  A  RS Z  10 100 1,000 10,000 100,000 1,000,000
RESR  COUT
FREQUENCY (Hz)
R N V
AVC  OUT  P K m  IN at D = 0.5
Ri N S VSLOPE s
1
2 vˆOUT Z
1 K m R i N   AVC 
P  L    S  ˆvC  s   s 
COUT  ROUT L  NP  1    1  
 P   L 

Texas Instruments – 2016/17 Power Supply Design Seminar 3-15

Current-mode flyback power stage
40 45
AVC P
20 2  L 0

MAGNITUDE (dB)
R 2 

PHASE (°)
0 2  -45

-20 Z -90
2 
+


-40 -135

Ri  A  RS 2 -60 -180
R  D 2 N  10 100 1,000 10,000 100,000 1,000,000
ROUT  D N P  R  OUT   P 
AVC   LP  D  NS 
1  D   Ri N S N
FREQUENCY (Hz)
VIN  VOUT  P
1 D NS  s   s 
P  Km  at D = 0.5 1    1  
COUT  ROUT VSLOPE vˆOUT  R    Z 
 AVC  
1 K R vˆC  s   s 
Z  L  m i 1    1  
RESR  COUT LP  P   L 

Texas Instruments – 2016/17 Power Supply Design Seminar 3-16

Type I error amplifier
60 135

40 90

MAGNITUDE (dB)

PHASE (°)
20 45

0 0
 EA
-20 -45
2 
-40 -90
10 100 1,000 10,000 100,000 1,000,000
FREQUENCY (Hz)
1
 EA 
RFBT  CCOMP
vˆC 
  EA

vˆOUT s

Texas Instruments – 2016/17 Power Supply Design Seminar 3-17

Type II error amplifier
80 180

60 135

MAGNITUDE (dB)

PHASE (°)
40 90

20 AVM 45
 ZEA  HF
0 2  2  0

RCOMP -20 -45

AVM  10 100 1,000 10,000 100,000 1,000,000
RFBT
FREQUENCY (Hz)
1
ZEA 
RCOMP  CCOMP
 ZEA s
1 1 1
 HF  vˆC s AVM   ZEA ZEA
RCOMP  C HF   AVM   

vˆOUT s s s
1 1
Assumption: CCOMP  C HF  HF  HF

Texas Instruments – 2016/17 Power Supply Design Seminar 3-18

Type II transconductance amplifier
80 180

60 135

MAGNITUDE (dB)

PHASE (°)
40 90

20 AVM 45
 ZEA  HF
0 2  2  0

-20 -45
AVM  K FB  g m  RCOMP 10 100 1,000 10,000 100,000 1,000,000

 ZEA 
1 RFBB FREQUENCY (Hz)
K FB 
RCOMP  CCOMP RFBB  RFBT
1  1
s
 HF  AOL  g m  REA 1  ZEA
RCOMP  C HF vˆC s AVM   ZEA ZEA
  AVM   

ˆvOUT s s s
1 1
Assumptions: CCOMP  C HF & REA  RCOMP  HF  HF

Texas Instruments – 2016/17 Power Supply Design Seminar 3-19

Type III error amplifier
80 270
60 225

MAGNITUDE (dB)

PHASE (°)
40 180
20 135
 FP  HF
0 AVM 90
 ZEA  FZ 2  2 
-20 45
2  2 
RCOMP -40 0
AVM  10 100 1,000 10,000 100,000 1,000,000
RFBT
1 FREQUENCY (Hz)
1
ZEA   FZ 
RCOMP  CCOMP RFBT  C FF
  ZEA   s   s   s 
1 1    1   1    1  
AVM   ZEA   ZEA    FZ 
1
 FP   HF  vˆC  s    FZ 
RFF  C FF RCOMP  C HF   AVM   

ˆvOUT  s   s  s  s   s 
1    1   1    1  
Assumptions: CCOMP  C HF & RFBT  RFF   FP    HF    FP    HF 

Texas Instruments – 2016/17 Power Supply Design Seminar 3-20

Isolated feedback with optocoupler
80 180

60 135

MAGNITUDE (dB)

PHASE (°)
40 90

20 AVM 45
 ZEA  HF
0 2  2  0

RP IC -20 -45
AVM  CTR  CTR  10 100 1,000 10,000 100,000 1,000,000
RD IF
FREQUENCY (Hz)
1
ZEA 
RFBT  CCOMP  s
1  ZEA 1
vˆC
  AVM  s AVM   ZEA ZEA
 
1 
vˆOUT s s s
 HF  1 1
RP  C P  HF  HF

Texas Instruments – 2016/17 Power Supply Design Seminar 3-21

Voltage-mode buck

Output filter

Modulator
VOUT
D
VIN
VIN  VOUT
D 
VIN
Error
amplifier

Texas Instruments – 2016/17 Power Supply Design Seminar 3-22

Voltage-mode buck compensation strategy
• Choose a value for RFBT based on bias current and power ωC
AVM 
dissipation AVC  ωO
• Pick target bandwidth, typically fSW/10: RCOMP  AVM  RFBT
ωC = 2·π·fC
1
• Find the mid-band gain AVM to achieve target bandwidth CCOMP 
 ZEA  RCOMP
• Set ωZEA and ωFZ equal to the output filter complex conjugate
pole ωO: 1
C FF 
ωZEA = ωFZ = ωO  FZ  RFBT

• Set ωFP equal to the output filter zero ωZ: 1

RFF 
ωFP = ωZ  FP  C FF
• Set ωHF equal to half the switching frequency: C HF 
1
ωHF = 2·π·fSW/2  HF  RCOMP

Texas Instruments – 2016/17 Power Supply Design Seminar 3-23

Voltage-mode buck compensation results
Power stage 40
AVC
45

MAGNITUDE

PHASE (°)
20 0
O Z
s 0 -45
1 2 

(dB)
vˆOUT Z -20 2  -90
 AVC  -40 -135
vˆC s s2
1  2 -60 -180
QO  O O 10 100 1,000 10,000 100,000 1,000,000

Error amplifier 60
 ZEA  FZ
270

MAGNITUDE

PHASE (°)
40 & 225
  ZEA   s  20 2  2  180
1    1  

(dB)
vˆC  s    FZ  0
AVM  FP  HF 135
  AVM  -20 90

vˆOUT  s   s  2  2 
1    1   -40 45
  FP    HF  10 100 1,000 10,000 100,000 1,000,000

Control loop 60 135

MAGNITUDE

PHASE (°)
40 90
20 45
(dB)

vˆOUT vˆOUT vˆC 0 0

  -20
C -45

vˆOUT 
vˆC vˆOUT
-40 2  -90
10 100 1,000 10,000 100,000 1,000,000

Texas Instruments – 2016/17 Power Supply Design Seminar 3-24

Isolated current-mode flyback

Output filter
Modulator
VOUT
D
N
VIN  S  VOUT
NP
+


D 
VIN
N
Error
VIN  VOUT  P
NS amplifier

Texas Instruments – 2016/17 Power Supply Design Seminar 3-25

Current-mode flyback compensation strategy
• Choose a value for RFBT based on bias current and power D N P
Gm (mod)  
dissipation Ri N S
• Find the modulator transconductance in A/V N 
2
ROUT  D2
• Find the RHPZ frequency at minimum input voltage and R    P 
LP  D  NS 
maximum load current
C  COUT
• Set the target bandwidth to 1/4 of the RHPZ frequency: AVM 
ωC = 2·π·fC = ωR/4 Gm (mod)
• Find the mid-band gain AVM to achieve target bandwidth RP
RD  CTR 
Adjust RD, RP and COUT as required A VM
• Set ωZEA equal to 1/10 the target crossover frequency: 1
CCOMP 
ωZEA = ωC/10 RFBT   ZEA
• Set ωHF equal to the lower of the RHP or ESR zero 1
frequency: CP 
RP   HF
ωHF = ωR or ωZ

Texas Instruments – 2016/17 Power Supply Design Seminar 3-26

Current-mode flyback compensation results
Power stage 40 R Z 45
AVC

MAGNITUDE

PHASE (°)
20 0
 s   s  0 P 2  2  -45
1    1   L

(dB)
vˆOUT   R    Z  -20
2  -90
 AVC  -40 2  -135
vˆC  s   s 
1    1   -60 -180
 P   L  10 100 1,000 10,000 100,000 1,000,000

Error amplifier 40
AVM
270

MAGNITUDE

PHASE (°)
20 225
 0 180
1  ZEA ZEA

(dB)
vˆC s -20 HF 135
  AVM 

ˆvOUT s -40 2  2  90
1 -60 45
 HF 10 100 1,000 10,000 100,000 1,000,000

Control loop 60 135

MAGNITUDE

PHASE (°)
40 90
20 45
(dB)

vˆOUT vˆOUT vˆC 0 0

  -20 C -45

vˆOUT 
vˆC vˆOUT
-40 2  -90
10 100 1,000 10,000 100,000 1,000,000

Texas Instruments – 2016/17 Power Supply Design Seminar 3-27

Bandwidth vs. transient response
Current-mode bandwidth Current-mode transient response
60 135
40 90 ∆I
MAGNITUDE

PHASE (°)
20 45
(dB)

0 0
-20 fC -45
-40 -90 vP
100 1,000 10,000 100,000 1,000,000 tP
FREQUENCY (Hz)

1 1
With no ESR, slew rate or duty cycle limiting: tP  tP   25s
4  fC 4 10kHz
I 5A
VP  VP   180mV
Current-mode single pole approximation: 2    f C C OUT 2   10kHz  440 F
I 5A
Current-mode critically damped: VP  VP   130mV shown above
e    f C C OUT e   10kHz  440F
I 5A
Voltage-mode: VP  VP   140mV
8  f C C OUT 8 10kHz  440 F

Texas Instruments – 2016/17 Power Supply Design Seminar 3-28

Switching regulator with poor compensation
0.1 μF
• Power stage: phase at –180° Transient response
TPS54620
3.3 μH
VIN
VIN
BOOT
PH
VOUT indicates high internal slope IOUT
15 μF
31.6 kΩ
compensation
GND U1 47 μF
VSENSE
• Error amplifier: zero appears
EN
COMP 10 kΩ VOUT
SS/TR
RT/CLK 5 kΩ
high and mid-band gain is 3 dB
22 μF
10 nF 100 kΩ 1 nF effective
capacitance
• Control loop: fC is 95 kHz with
only 20° phase margin
Power stage Error amplifier Control loop
40 45 60 270 60 135
20 0 40 225 40 90
MAGNITUDE (dB)

MAGNITUDE (dB)

MAGNITUDE (dB)
PHASE (°)
PHASE (°)

PHASE (°)
0 -45 20 180 20 45
-20 -90 0 135 0 0
-40 -135 -20 90 -20 -45
-60 -180 -40 45 -40 -90
0.1 1 10 100 1000 0.1 1 10 100 1000 0.1 1 10 100 1000
FREQUENCY (kHz) FREQUENCY (kHz) FREQUENCY (kHz)

Texas Instruments – 2016/17 Power Supply Design Seminar 3-29

Switching regulator with revised compensation
0.1 μF
• Power stage: cannot change Transient response
TPS54620
3.3 μH
VIN
VIN
BOOT
PH
VOUT slope compensation IOUT
15 μF
GND U1
31.6 kΩ
47 μF
• Error amplifier: decrease
EN
VSENSE
COMP 10 kΩ
RCOMP and rescale CCOMP VOUT
SS/TR 1 kΩ
RT/CLK
22 μF • Control loop: now fC is 30 kHz
10 nF 100 kΩ 10 nF effective
capacitance with 67° phase margin

Power stage Error amplifier Control loop

40 45 60 270 60 135
20 0 40 225 40 90
MAGNITUDE (dB)

MAGNITUDE (dB)

MAGNITUDE (dB)
PHASE (°)
PHASE (°)

PHASE (°)
0 -45 20 180 20 45
-20 -90 0 135 0 0
-40 -135 -20 90 -20 -45
-60 -180 -40 45 -40 -90
0.1 1 10 100 1000 0.1 1 10 100 1000 0.1 1 10 100 1000
FREQUENCY (kHz) FREQUENCY (kHz) FREQUENCY (kHz)

Texas Instruments – 2016/17 Power Supply Design Seminar 3-30

Practical limitations

• Error amp BW can limit • Resistance seen by output • Maximum fC is a fraction

maximum fC transistor forms a pole in of fSW
• Wider BW op amp needed kHz range • Rule of thumb is 1/5 to
for voltage-mode due to • More of an issue for forward 1/10 of fSW
Type III compensation topologies at higher fC

Texas Instruments – 2016/17 Power Supply Design Seminar 3-31

DCM vs. CCM characteristics
DCM duty cycle
• Buck
2  L  f SW  I OUT  VOUT
D
VIN  VIN  VOUT 

• Boost
2  L  f SW  I OUT  VOUT  VIN 
D
VIN

• Discontinuous conduction-mode (DCM) occurs when the inductor • Buck-boost

current dwells at zero before the end of the switching cycle 2  L  f SW  I OUT  VOUT
• This causes a reduction in the bandwidth D
VIN
• Generally, if the loop is stable in CCM, it will be stable in DCM

Texas Instruments – 2016/17 Power Supply Design Seminar 3-32

Filter considerations
Input filter stability Second stage filters

For stability: Filter ZOUT << Converter ZIN • Capacitors: make COUT1 smaller than COUT2
• Inductors: make L2 smaller than L1
L
• Characteristic impedance Z S  C • Resonance: make second stage filter
IN

IN

• Damping factor resonance 3 times fC

1  R  RC Z S  • Damping: make second stage filter damped
    L  
2  ZS Z IN  to a Q of 1

Texas Instruments – 2016/17 Power Supply Design Seminar 3-33

Summary
• Identify poles and zeros of the power stage
• Cancel with zeros and poles in the error amp
• Adjust the gain for best performance

Texas Instruments – 2016/17 Power Supply Design Seminar 3-34

Resources and references
• “Closing the Feedback Loop” by Lloyd Dixon, SEM300
• “Current-Mode Control of Switching Power Supplies” by Lloyd Dixon, SEM400
• “The Right-Half-Plane Zero -- A Simplified Explanation” by Lloyd Dixon, SEM500
• “Isolating the Control Loop” by Robert Mammano, SEM700
• “Control Loop Design” by Lloyd Dixon, SEM800
• “Control Loop Cookbook” by Lloyd Dixon, SEM1100
• “A More Accurate Current-Mode Control Model” by Ray Ridley, SEM1300
• “Designing Stable Control Loops” by Dan Mitchell and Bob Mammano, SEM1400
• “Current-Mode Modeling – Reference Guide” by Robert Sheehan, SNVA542
• “Understanding and Applying Current-Mode Control Theory” by Robert Sheehan, SNVA555
• “Frequency Compensation and Power Stage Design for Buck Converters to Meet Load
Transient Specifications” by S. Bag, R. Sheehan, et al., APEC 2014

Texas Instruments – 2016/17 Power Supply Design Seminar 3-35

Appendix
• Current-mode buck compensation
• Current-mode boost compensation
• Current-mode buck-boost compensation
• Isolated compensation techniques
• Isolated forward converter compensation

Texas Instruments – 2016/17 Power Supply Design Seminar 3-36

Current-mode buck

Output filter

Modulator
VOUT
D Error
VIN 

VIN  VOUT
amplifier
D 
VIN

Texas Instruments – 2016/17 Power Supply Design Seminar 3-37

Current-mode buck compensation strategy
• Choose a value for RFBT based on bias current and power Gm (mod) 
1
dissipation Ri
• Find the modulator transconductance in A/V C  COUT
AVM 
• Pick target bandwidth, typically fSW/10: Gm (mod)
ωC = 2·π·fC RCOMP  AVM  RFBT (op amp)
• Find the mid-band gain AVM to achieve target bandwidth
AVM
• Set ωZEA equal to 1/10 the target crossover frequency: RCOMP  (gm amp)
g m  K FB
ωZEA = ωC/10
1
• Set ωHF equal to the ESR zero frequency: CCOMP 
ωZEA  RCOMP
ωHF = ωZ
1
C HF 
ωHF  RCOMP

Texas Instruments – 2016/17 Power Supply Design Seminar 3-38

Current-mode buck compensation results
Power stage 40
AVC
90

MAGNITUDE

PHASE (°)
20 Z L 45
1
s P
2  2 

(dB)
0 0
vˆOUT Z 2 
 AVC  -20 -45
vˆC  s   s 
1    1   -40 -90
 P   L  10 100 1,000 10,000 100,000 1,000,000

Error amplifier 40  HF 225

MAGNITUDE

PHASE (°)
 ZEA
20 AVM 2  180
1

(dB)
0 135
vˆC s  ZEA
  AVM  -20 90

vˆOUT s
1 -40 2  45
 HF 10 100 1,000 10,000 100,000 1,000,000

Control loop 60 135

MAGNITUDE

PHASE (°)
40 90
20 45
(dB)

vˆOUT vˆOUT vˆC 0 0

  -20 C -45

vˆOUT 
vˆC vˆOUT
-40 2  -90
10 100 1,000 10,000 100,000 1,000,000

Texas Instruments – 2016/17 Power Supply Design Seminar 3-39

Current-mode boost

L
VIN VOUT

CIN COUT
ROUT
Output filter
Ri RESR
Modulator
V  VIN +  + VSLOPE
Error
D  OUT Logic
VOUT
PWM -
RFBT amplifier
VFB
VC
V + gm-
D  IN + VREF RFBB
VOUT CHF RCOMP
Peak current-mode boost
Optimal VSLOPE = (VOUT - VIN)·Ri·T/L CCOMP

Texas Instruments – 2016/17 Power Supply Design Seminar 3-40

Current-mode boost compensation strategy
• Choose a value for RFBT based on bias current and power D
Gm (mod) 
dissipation Ri
• Find the modulator transconductance in A/V ROUT  D2
R 
• Find the RHPZ frequency at minimum input voltage and L
maximum load current  C
AVM  C OUT
• Set the target bandwidth to 1/4 of the RHPZ frequency: Gm (mod)
ωC = 2·π·fC = ωR/4 RCOMP  AVM  RFBT (op amp)
AVM
• Find the mid-band gain AVM to achieve target bandwidth RCOMP  (gm amp)
g m  K FB
• Set ωZEA equal to 1/10 the target crossover frequency:
1
ωZEA = ωC/10 CCOMP 
ωZEA  RCOMP
• Set ωHF equal to the lower of the RHP or ESR zero frequency: 1
ωHF = ωR or ωZ C HF 
ωHF  RCOMP

Texas Instruments – 2016/17 Power Supply Design Seminar 3-41

Current-mode boost compensation results
Power stage 40 R Z 45
AVC

MAGNITUDE

PHASE (°)
20 0
 s   s  0 P 2  2  -45
1    1   L

(dB)
vˆOUT   R    Z  -20
2  -90
 AVC  -40 2  -135
vˆC  s   s 
1    1   -60 -180
 P   L  10 100 1,000 10,000 100,000 1,000,000

Error amplifier 40
AVM
270

MAGNITUDE

PHASE (°)
20 225
 0 180
1  ZEA ZEA

(dB)
vˆC s -20 HF 135
  AVM 

vˆOUT 1
s -40 2  2  90
-60 45
 HF 10 100 1,000 10,000 100,000 1,000,000

Control loop 60 135

MAGNITUDE

PHASE (°)
40 90
20 45
(dB)

vˆOUT vˆOUT vˆC 0 0

  -20 C -45

vˆOUT 
vˆC vˆOUT
-40 2  -90
10 100 1,000 10,000 100,000 1,000,000

Texas Instruments – 2016/17 Power Supply Design Seminar 3-42

Current-mode buck-boost

Output filter

Modulator
VOUT
D
VIN  VOUT 
Error
VIN
D 
VIN  VOUT
amplifier

Texas Instruments – 2016/17 Power Supply Design Seminar 3-43

Current-mode buck-boost compensation strategy
• Choose a value for RFBT based on bias current and power D
Gm (mod) 
dissipation Ri
• Find the modulator transconductance in A/V ROUT  D2
R 
• Find the RHPZ frequency at minimum input voltage and LD
maximum load current  C
AVM  C OUT
• Set the target bandwidth to 1/4 of the RHPZ frequency: Gm (mod)
ωC = 2·π·fC = ωR/4 RCOMP  AVM  RFBT (op amp)
AVM
• Find the mid-band gain AVM to achieve target bandwidth RCOMP  (gm amp)
g m  K FB
• Set ωZEA equal to 1/10 the target crossover frequency:
1
ωZEA = ωC/10 CCOMP 
ωZEA  RCOMP
• Set ωHF equal to the lower of the RHP or ESR zero frequency:
1
ωHF = ωR or ωZ C HF 
ωHF  RCOMP

Texas Instruments – 2016/17 Power Supply Design Seminar 3-44

Current-mode buck-boost compensation results
Power stage 40 R Z 45
AVC

MAGNITUDE

PHASE (°)
20 0
 s   s  0 P 2  2  -45
1    1   L

(dB)
vˆOUT   R    Z  -20
2  -90
 AVC  -40 2  -135
vˆC  s   s 
1    1   -60 -180
 P   L  10 100 1,000 10,000 100,000 1,000,000

Error amplifier 40
AVM
270

MAGNITUDE

PHASE (°)
20 225
 0 180
1  ZEA ZEA HF

(dB)
vˆC s -20 135
  AVM 

vˆOUT 1
s -40
2  2  90
-60 45
 HF 10 100 1,000 10,000 100,000 1,000,000

Control loop 60 135

MAGNITUDE

PHASE (°)
40 90
20 45
(dB)

vˆOUT vˆOUT vˆC 0 0

  -20 C -45

vˆOUT 
vˆC vˆOUT
-40 2  -90
10 100 1,000 10,000 100,000 1,000,000

Texas Instruments – 2016/17 Power Supply Design Seminar 3-45

Isolated compensation techniques
Simplest method: Optocoupler with shunt regulator

• CTR – Current transfer • RD – Connected to VOUT

ratio creates a feedback path
‫ܫ‬஼ even when CCOMP rolls off
‫ ܴܶܥ‬ൌ
‫ܫ‬ி the gain
• CP – Includes opto
parasitic capacitance. • TL431 – Cathode cannot
This creates a pole with pull lower than the
gain setting resistor RP reference voltage

1
1
vˆC R s  CCOMP  RFBT
 CTR  P 

vˆOUT RD 1  s  C P  RP

Texas Instruments – 2016/17 Power Supply Design Seminar 3-46

Primary side compensation
Primary side compensation High bandwidth configuration
VC VCC

RF
RI
-
+ VREF RE

• Uses primary side inverting amplifier to • Opto emitter is at virtual ground of VREF
implement frequency compensation • This minimizes pole due to opto
parasitic capacitance

Texas Instruments – 2016/17 Power Supply Design Seminar 3-47

Secondary side compensation
ESR zero compensation Phase boost Zener bias
V′OUT V′OUT V′OUT
CS RS RS
RD RD CFF RD ZS
RFBT
RFF CHF

CCOMP RFBT CCOMP RFBT CCOMP RCOMP

TL431 RFBB TL431 RFBB TL431 RFBB

• Zener bias for RD eliminates

• An RC pole to the opto can • Feed-forward across RD adds
the high frequency feedback
be used to cancel the output phase boost for increased
path for secondary-side
capacitor ESR zero bandwidth
compensation

Texas Instruments – 2016/17 Power Supply Design Seminar 3-48

Isolated current-mode forward

Output filter
Modulator
D
VOUT N P

Error
VIN N S 
+
amplifier
NP
VIN  VOUT 
NS
D 
VIN

Texas Instruments – 2016/17 Power Supply Design Seminar 3-49

Current-mode forward compensation strategy
• Choose a value for RFBT based on bias current and power 1 NP
dissipation Gm (mod)  
Ri N S
• Find the modulator transconductance in A/V
C  COUT
• Pick target bandwidth, typically fSW/10: AVM 
Gm (mod)
ωC = 2·π·fC
• Find the mid-band gain AVM to achieve target bandwidth RP
RD  CTR 
A VM
Adjust RD, RP and COUT as required
• Set ωZEA equal to 1/10 the target crossover frequency: CCOMP 
1
ωZEA = ωC/10 RFBT   ZEA
• Set ωHF equal to the ESR zero frequency: 1
CS 
ωHF = ωZ RS   HF

Texas Instruments – 2016/17 Power Supply Design Seminar 3-50

Current-mode forward compensation results
Power stage 40 90

MAGNITUDE
AVC

PHASE (°)
20 Z L 45
1
s P
2  2 

(dB)
0 0
vˆOUT Z 2 
 AVC  -20 -45
vˆC  s   s 
1    1   -40 -90
 P   L  10 100 1,000 10,000 100,000 1,000,000

Error amplifier 40  HF 225

MAGNITUDE

PHASE (°)
 ZEA
20 AVM 2  180
1

(dB)
0 135
vˆC s  ZEA
  AVM  -20 90

vˆOUT s
2 
1 -40 45
 HF 10 100 1,000 10,000 100,000 1,000,000

Control loop 60 135

MAGNITUDE

PHASE (°)
40 90
20 45
(dB)

vˆOUT vˆOUT vˆC 0 0

  -20 C -45

vˆOUT 
vˆC vˆOUT
-40 2  -90
10 100 1,000 10,000 100,000 1,000,000

Texas Instruments – 2016/17 Power Supply Design Seminar 3-51

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