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Lecture 7 - 2024

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21 views11 pages

Lecture 7 - 2024

Uploaded by

ahmed.waasel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Manal Abdulelah Areqi

manalalareqi@su.edu.ye

DL, Lecture7 Eng. manal A.al-Areqi


Encoders

•Encoders have input


2n

lines and n output line.


•Output lines generate the
binary code corresponding
to the input value.
DL, Lecture6 Eng. manal A.al-Areqi
Encoders implementation

DL, Lecture6 Eng. manal A.al-Areqi


Decoders

•Decoder perform the inverse operation of a


Encoders.
•A decoder converts binary information from n
input lines to a maximum of 2n output lines
•Only one of the outputs can have a
value of 1 at any time.

DL, Lecture6 Eng. manal A.al-Areqi


Combinational Logic implementation
using decoder
• A decoder provides the 2n minterms(outputs) of n input
variables.
• Any function is can be expressed in sum of minterms.
• Use a decoder to make the minterms and an external OR gate
to make the sum.
Example: consider a full adder.
S(x,y,z) = Σ(1,2,4,7)
C(x,y,z) = Σ (3,5,6,7)

DL, Lecture7 Eng. manal A.al-Areqi


Multiplexers

▪Multiplexer: selects one binary input from many


selections and directs it to a single output line.
▪There are 2 input lines and n selection Lines.

DL, Lecture7 Eng. manal A.al-Areqi


Implementing Boolean functions with
MUX (n variables)
1. Use a multiplexer with n-1 selection inputs
and 2 n-1 data inputs
2. List the truth tabel
3. Apply the first n-1 variables to the selection
inputs of multiplexer
4. For each combination evaluate the output as
a function of the last variable.
5. The function can be 0, 1 the variable or the
complement of the variable.

DL, Lecture7 Eng. manal A.al-Areqi


Implementing Boolean functions with
MUX (n variables)………… cont’
Example1

DL, Lecture7 Eng. manal A.al-Areqi


Implementing Boolean functions with
MUX (n variables)………… cont’
Example 2
a) F(A,B,C,D) = m0, m2, m5,m8,m10,m14
b) F(A,B,C,D) = M3, M8, M12

DL, Lecture7 Eng. manal A.al-Areqi


Design a 2 bits comparator circuit.
H.W

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