TL081 Wide Bandwidth JFET Input Operational Amplifier

December 1995

TL081 Wide Bandwidth JFET

Input Operational Amplifier
are critical, the LF356 is recommended. If maximum supply
General Description current is important, however, the TL081C is the better
The TL081 is a low cost high speed JFET input operational choice.
amplifier with an internally trimmed input offset voltage
(BI-FET IITM technology). The device requires a low supply
current and yet maintains a large gain bandwidth product
Features
and a fast slew rate. In addition, well matched high voltage
Y Internally trimmed offset voltage 15 mV
JFET input devices provide very low input bias and offset
Y Low input bias current 50 pA
currents. The TL081 is pin compatible with the standard Y Low input noise voltage 25 nV/0Hz
LM741 and uses the same offset voltage adjustment circuit- Y Low input noise current 0.01 pA/0Hz
ry. This feature allows designers to immediately upgrade the Y Wide gain bandwidth 4 MHz
overall performance of existing LM741 designs. Y High slew rate 13 V/ms
The TL081 may be used in applications such as high speed Y Low supply current 1.8 mA
integrators, fast D/A converters, sample-and-hold circuits Y High input impedance 1012X
and many other circuits requiring low input offset voltage, Y Low total harmonic distortion AV e 10, k 0.02%
low input bias current, high input impedance, high slew rate RL e 10k, VO e 20 Vp-p,
and wide bandwidth. The devices has low noise and offset BW e 20 Hzb20 kHz
voltage drift, but for applications where these requirements Y Low 1/f noise corner 50 Hz
Y Fast settling time to 0.01% 2 ms

Typical Connection Simplified Schematic

TL/H/8358 – 1

Connection Diagram
TL/H/8358 – 2

Dual-In-Line Package

TL/H/8358 – 4
Order Number TL081CP
See NS Package Number N08E

BI-FET IITM is a trademark of National Semiconductor Corp.

C1995 National Semiconductor Corporation TL/H/8358 RRD-B30M125/Printed in U. S. A.

Absolute Maximum Ratings
If Military/Aerospace specified devices are required, Input Voltage Range (Note 2) g 15V
please contact the National Semiconductor Sales Output Short Circuit Duration Continuous
Office/Distributors for availability and specifications. b 65§ C to a 150§ C
Storage Temperature Range
Supply Voltage g 18V
Lead Temp. (Soldering, 10 seconds) 260§ C
Power Dissipation (Notes 1 and 6) 670 mW ijA 120§ C/W
Operating Temperature Range 0§ C to a 70§ C ESD rating to be determined.
Tj(MAX) 115§ C
Differential Input Voltage g 30V

DC Electrical Characteristics (Note 3)

TL081C
Symbol Parameter Conditions Units
Min Typ Max
VOS Input Offset Voltage RS e 10 kX, TA e 25§ C 5 15 mV
Over Temperature 20 mV
DVOS/DT Average TC of Input Offset RS e 10 kX
10 mV/§ C
Voltage
IOS Input Offset Current Tj e 25§ C, (Notes 3, 4) 25 100 pA
Tj s 70§ C 4 nA
IB Input Bias Current Tj e 25§ C, (Notes 3, 4) 50 200 pA
Tj s 70§ C 8 nA
RIN Input Resistance Tj e 25§ C 1012 X
AVOL Large Signal Voltage Gain VS e g 15V, TA e 25§ C 25 100 V/mV
VO e g 10V, RL e 2 kX
Over Temperature 15 V/mV
VO Output Voltage Swing VS e g 15V, RL e 10 kX g 12 g 13.5 V
VCM Input Common-Mode Voltage a 15 V
VS e g 15V g 11
Range b 12 V
CMRR Common-Mode Rejection Ratio RS s 10 kX 70 100 dB
PSRR Supply Voltage Rejection Ratio (Note 5) 70 100 dB
IS Supply Current 1.8 2.8 mA

AC Electrical Characteristics (Note 3)

TL081C
Symbol Parameter Conditions Units
Min Typ Max
SR Slew Rate VS e g 15V, TA e 25§ C 13 V/ms
GBW Gain Bandwidth Product VS e g 15V, TA e 25§ C 4 MHz
en Equivalent Input Noise Voltage TA e 25§ C, RS e 100X,
25 nV/0Hz
f e 1000 Hz
in Equivalent Input Noise Current Tj e 25§ C, f e 1000 Hz 0.01 pA/0Hz
Note 1: For operating at elevated temperature, the device must be derated based on a thermal resistance of 120§ C/W junction to ambient for N package.
Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 3: These specifications apply for VS e g 15V and 0§ C s TA s a 70§ C. VOS, IB and IOS are measured at VCM e 0.
Note 4: The input bias currents are junction leakage currents which approximately double for every 10§ C increase in the junction temperature, Tj. Due to the limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, PD. Tj e TA a ijA PD where ijA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 5: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from
VS e g 5V to g 15V.
Note 6: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.

2
Typical Performance Characteristics
Input Bias Current Input Bias Current Supply Current

Positive Common-Mode Input Negative Common-Mode Input

Voltage Limit Voltage Limit Positive Current Limit

Negative Current Limit Voltage Swing Output Voltage Swing

Gain Bandwidth Bode Plot Slew Rate

TL/H/8358 – 5

3
Typical Performance Characteristics (Continued)

Undistorted Output Voltage Open Loop Frequency

Distortion vs Frequency Swing Response

Common-Mode Rejection Power Supply Rejection Equivalent Input Noise

Ratio Ratio Voltage

Open Loop Voltage Gain (V/V) Output Impedance Inverter Settling Time

TL/H/8358 – 6

4
Pulse Response
Small Signal Inverting Small Signal Non-Inverting

TL/H/8358 – 7 TL/H/8358 – 13
Large Signal Inverting Large Signal Non-Inverting

TL/H/8358 – 14 TL/H/8358 – 15

Current Limit (RL e 100X)

TL/H/8358 – 16

Application Hints
The TL081 is an op amp with an internally trimmed input will cause large currents to flow which can result in a de-
offset voltage and JFET input devices (BI-FET II). These stroyed unit.
JFETs have large reverse breakdown voltages from gate to Exceeding the negative common-mode limit on either input
source and drain eliminating the need for clamps across the will force the output to a high state, potentially causing a
inputs. Therefore, large differential input voltages can easily reversal of phase to the output.
be accommodated without a large increase in input current.
Exceeding the negative common-mode limit on both inputs
The maximum differential input voltage is independent of
will force the amplifier output to a high state. In neither case
the supply voltages. However, neither of the input voltages
does a latch occur since raising the input back within the
should be allowed to exceed the negative supply as this

5
Application Hints (Continued)
common-mode range again puts the input stage and thus resulting forward diode within the IC could cause fusing of
the amplifier in a normal operating mode. the internal conductors and result in a destroyed unit.
Exceeding the positive common-mode limit on a single input Because these amplifiers are JFET rather than MOSFET
will not change the phase of the output; however, if both input op amps they do not require special handling.
inputs exceed the limit, the output of the amplifier will be As with most amplifiers, care should be taken with lead
forced to a high state. dress, component placement and supply decoupling in or-
The amplifier will operate with a common-mode input volt- der to ensure stability. For example, resistors from the out-
age equal to the positive supply; however, the gain band- put to an input should be placed with the body close to the
width and slew rate may be decreased in this condition. input to minimize ‘‘pick-up’’ and maximize the frequency of
When the negative common-mode voltage swings to within the feedback pole by minimizing the capacitance from the
3V of the negative supply, an increase in input offset voltage input to ground.
may occur. A feedback pole is created when the feedback around any
The TL081 is biased by a zener reference which allows nor- amplifier is resistive. The parallel resistance and capaci-
mal circuit operation on g 4V power supplies. Supply volt- tance from the input of the device (usually the inverting in-
ages less than these may result in lower gain bandwidth and put) to AC ground set the frequency of the pole. In many
slew rate. instances the frequency of this pole is much greater than
The TL081 will drive a 2 kX load resistance to g 10V over the expected 3 dB frequency of the closed loop gain and
the full temperature range of 0§ C to a 70§ C. If the amplifier consequently there is negligible effect on stability margin.
is forced to drive heavier load currents, however, an in- However, if the feedback pole is less than approximately 6
crease in input offset voltage may occur on the negative times the expected 3 dB frequency a lead capacitor should
voltage swing and finally reach an active current limit on be placed from the output to the input of the op amp. The
both positive and negative swings. value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
Precautions should be taken to ensure that the power sup-
is greater than or equal to the original feedback pole time
ply for the integrated circuit never becomes reversed in po-
constant.
larity or that the unit is not inadvertently installed backwards
in a socket as an unlimited current surge through the

Detailed Schematic

TL/H/8358 – 8

6
Typical Applications
Supply Current Indicator/Limiter Hi-ZIN Inverting Amplifier

TL/H/8358 – 9
# VOUT switches high when RSIS l VD TL/H/8358 – 10
Parasitic input capacitance C1 j (3 pF for TL081 plus any additional
layout capacitance) interacts with feedback elements and creates un-
desirable high frequency pole. To compensate, add C2 such that:
R2C2 j R1C1.

Ultra-Low (or High) Duty Cycle Pulse Long Time Integrator

Generator

TL/H/8358 – 11
4.8 b 2VS
# tOUTPUT HIGH & R1C fin
4.8 b VS TL/H/8358 – 12
2V b 7.8 * Low leakage capacitor
# tOUTPUT LOW & R2C fin S
VS b 7.8 # 50k pot used for less sensitive VOS adjust
where VS e V a a l Vb l
*low leakage capacitor

7
TL081 Wide Bandwidth JFET Input Operational Amplifier
Physical Dimensions inches (millimeters)

Molded Dual-In-Line Package (N)

Order Number TL081CP
NS Package Number N08E

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failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.

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