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Mpa1 3 9220660 4 9211110

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22 views15 pages

Mpa1 3 9220660 4 9211110

Uploaded by

deyastyahmed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CAIRO UNIVERSITY

FACULTY OF ENGINEERING
ELECTRONICS AND ELECTRICAL COMM.
SECOND YEAR

Microprocessors Architecture
Experiment 3
Serial Communication Circuit & ALU

Student Name Section B.N.


‫أشف عبدالحارس عبدالحميد‬‫محمد ر‬ 3 9220660
‫ى‬
‫مصطف‬ ‫فتح‬ ‫ى‬
‫مصطف‬ ‫محمود‬ 4 9211110
‫ي‬
Experiment 4
Answer Sheet
Name: Mahmoud Mostafa Sec. B.N.

Q1: Count Sequence is → { 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001,
1010, 1011, 1100, 1101, 1110, 1111}
• The LEDs are counting ascending from 0 to 15 in binary, and when it exceeds 15.. X5
(Carry) will turn off and turn on again, and the counting will start again from 0000.

The Counter is modulo 24 = 16


Q2 (Draw the timing for N +1 pulses where N is the sequence length obtained in step Q1 :

CP …………………………………………………………………………

CO’ …………………………………………………………………………
Q3: The circuit shown in fig. 2 is modulo-8 , Why? → because the counter has 8 states only
[000 : 111] if we take the first 3 bits from the LSB, if we consider the forth bit it will count from
8 to 15.

Q4 (Draw the timing for N +1 pulses where N is the sequence length obtained in step 6 :

• Qs Timing Diagram
• CLK – CO’

Comment on your observations


• The counter is 8-module now, as it counts from 0 to 7 if we take the first 3 bits.

Steps 12 :
Q5 : Comment on your observation by stating the function of S1 and S2
• When S1 is LOW it resets the Qh to the initial state , so it loads back the input, While
S2 was only active when S1 was set to HIGH and as we switch S2 from LOW to HIGH
the value of Qh changes to the next from back to H as follows H -> G -> F and so on
until it reaches A after that all is zero until I switch S1 back to LOW.

Q6: Draw the timing for clock , QH of IC 74165 and SH/LD' for 7 clock pulses

Comments:
• As the counter is module-8 the parallel-serial converter loads the input once every 8
clocks as shown in the figure when the counter completes a loop the carry becomes
LOW, so it activates the load at the parallel-serial converter and so on.
Q7 : Draw the displayed waveforms ?. What is the relation between the displayed waveforms?

Q8 : What is the relation between A,B,C,D,E,F,G,H inputs of IC 74165 and


QA,QB,QC,QD,QE,QF,QG,QH outputs of IC 74164, show using the simulation?

• Output of 74164 is the parallel form of inputs of 74165 but it’s not correct because
one output is missed because of the cycle from the counter Qa to Qh should be
11100011 and cycling, but the output is 10001111 and cycling.
Part 2: ALU
Adding 7 and 4
Output of the ALU…1011…=11… ………………………….. Output
carry……………………………Carry=1 ……… ……………..…..
Your Simulation Graph
Adding 8 and 11 = 19
Output of the ALU………0011 = e ………………………………..
Output carry…………Carry=0…………………………………..…..
Your Simulation Graph
Subtracting 4 from 7
Output of the ALU………0011………=3 ………………………………..
Output carry………………carry=0……………………………..…..
Your Simulation Graph
Subtracting 11 from 8
Output of the ALU………1101………taking 2’s >> 0011 = 3………………………………..
Output carry………carry =1 ………so -ve number…………………………..…..
Your Simulation Graph
Verify the AND operation

Your Simulation Graph


Verify the OR operation
Your Simulation Graph
Verify the XOR operation
Your Simulation Graph
Show how you can use replicates of your components to perform 8-bit addition/subtraction.
I may use another ALU to perform the other 4 bits with same selection line

another solution with 1 ALU is to use a control variable to determine which bits enter so I
can calculate the first 4 then 4 after that

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