HP DM1 Quanta FP8

5 4 3 2 1
01
PCB STACK UP
LAYER 1 : TOP
8L
FP8_GARNETT Block Diagram BATTERY CHARGER(OZ8681)
PAGE 34
LAYER 2 : SGND Max 4GB
LAYER 3 : IN1 DDR3 800MHz AMDGENEVA CPU SYSTEM POWER
D
LAYER 4 : In2
DDR3 SO-DIMM
Page:16 ASB2 PACKAGE
+5VPCU/+3VPCU (RT8206B)
PAGE 30 D
LAYER 5 : SVCC DDR3 800MHz 27 x 27mm 812 Balls DDR3 SMDDR

LAYER 7 : IN3
DDR3 8x1Rx8 1G
Page:17~19
1.5V/1.5VSUS(RT8207)
PAGE 32
TDP~15W Page:3~6
LAYER 7 : GND
VCCP +1.05V/1.05V_S5 (RT8204)
LAYER 8 : BOT
PAGE 31
HyperTransport Link 16x16( HT_LINK)
VCORE 1.1V~1.2V(OZ8380)
Remove PAGE 33
LVDS
11.6" LED Panel G sensor
C
Page:21
AMD RS880M C
RGB
CRT 21 x 21 mm
PCIE
Page:25
FCBGA 528 Balls
TDP~7.5W
HDMI HDMI
Page:24
Page: 7~10
10/100M LAN
32.768KHz 25MHz
PCIEx4(A_LINK) RTL8103EL 23
USB CONN X 327 Port0,1,2 USB

USB Port5 WLAN 26
AMD SB820
B
CCD CONN21 Port3
PCIE 23 x 23 mm
SATA0
2.5"HDD&SSD
B
24
FCBGA 605 Balls
BT CONN28 Port6
TDP~4W
HDA AUDIO CODEC IDT 92HD80
20
Card Reader Port7 Page: 11~15
RTS5159 25 LPC
32.768KHz
SIM Card26 WWAN26 Port4

EC KB3926 D2
A
29
HP/MIC MIC Int SPK A
COMBO JACK20 Digital20 20
Quanta Computer Inc.

K/B Con. Touch Pad Con. SPI Flash Size Docum ent Num ber
PROJECT : FP8
Rev
28 28 29 BLOCK DIAGRAM 1A
Date: Thurs day, February 11, 2010 Sheet 1 of 41

5 4 3 2 1
www.vinafix.com
5 4 3 2 1
D D
C C
B B
A A

PROJECT : FP8
Size Docum ent Num ber Rev
Index 1A

5 4 3 2 1
5 4 3 2 1
03
U17A
7 HT_NB_CPU_CAD_H15 W7 AB6 HT_CPU_NB_CAD_H15 7
W6 L0_CADIN_H15 L0_CADOUT_H15 AB5
7 HT_NB_CPU_CAD_L15 L0_CADIN_L15 L0_CADOUT_L15 HT_CPU_NB_CAD_L15 7
7 HT_NB_CPU_CAD_H14 U6 AB9 HT_CPU_NB_CAD_H14 7
L0_CADIN_H14 L0_CADOUT_H14
7 HT_NB_CPU_CAD_L14 U5 AB8 HT_CPU_NB_CAD_L14 7
L0_CADIN_L14 L0_CADOUT_L14
R7 AC7
D 7 HT_NB_CPU_CAD_H13 L0_CADIN_H13 L0_CADOUT_H13 HT_CPU_NB_CAD_H13 7 D
7 HT_NB_CPU_CAD_L13 R6 AC6 HT_CPU_NB_CAD_L13 7
P6 AE6
7 HT_NB_CPU_CAD_H12 L0_CADIN_H12 L0_CADOUT_H12 HT_CPU_NB_CAD_H12 7
P5 AE5
7 HT_NB_CPU_CAD_H11 L6 AE9 HT_CPU_NB_CAD_H11 7
L5 L0_CADIN_H11 L0_CADOUT_H11 AE8
7 HT_NB_CPU_CAD_H10 J6 AH3 HT_CPU_NB_CAD_H10 7
J5 L0_CADIN_H10 L0_CADOUT_H10 AH4
7 HT_NB_CPU_CAD_H9 H4 AK3 HT_CPU_NB_CAD_H9 7
L0_CADIN_H9 L0_CADOUT_H9
7 HT_NB_CPU_CAD_L9 H3 AK4 HT_CPU_NB_CAD_L9 7
G6 AH1
7 HT_NB_CPU_CAD_L8 G5 AH2 HT_CPU_NB_CAD_L8 7
T3 Y1
HT LINK
T4 Y2
7 HT_NB_CPU_CAD_H6 T2 Y4 HT_CPU_NB_CAD_H6 7
T1 L0_CADIN_H6 L0_CADOUT_H6 Y3
P3 AB1
7 HT_NB_CPU_CAD_L5 P4 AB2 HT_CPU_NB_CAD_L5 7
P2 AB4
7 HT_NB_CPU_CAD_L4 P1 AB3 HT_CPU_NB_CAD_L4 7
M2 AD4
7 HT_NB_CPU_CAD_L3 M1 AD3 HT_CPU_NB_CAD_L3 7
K3 AF1
K4 AF2
7 HT_NB_CPU_CAD_H1 K2 AF4 HT_CPU_NB_CAD_H1 7
K1 L0_CADIN_H1 L0_CADOUT_H1 AF3
7 HT_NB_CPU_CAD_H0 H2 AK1 HT_CPU_NB_CAD_H0 7
H1 L0_CADIN_H0 L0_CADOUT_H0 AK2
M8 AF6
7 HT_NB_CPU_CLK_H1 L0_CLKIN_H1 L0_CLKOUT_H1 HT_CPU_NB_CLK_H1 7
M7 AF5
C 7 HT_NB_CPU_CLK_L1 L0_CLKIN_L1 L0_CLKOUT_L1 HT_CPU_NB_CLK_L1 7 C
M3 AD1
7 HT_NB_CPU_CLK_H0 L0_CLKIN_H0 L0_CLKOUT_H0 HT_CPU_NB_CLK_H0 7
M4 AD2
7 HT_NB_CPU_CLK_L0 L0_CLKIN_L0 L0_CLKOUT_L0 HT_CPU_NB_CLK_L0 7
Y6 Y8
7 HT_NB_CPU_CTL_H1 L0_CTLIN_H1 L0_CTLOUT_H1 HT_CPU_NB_CTL_H1 7
7 HT_NB_CPU_CTL_L1 Y5 Y9 HT_CPU_NB_CTL_L1 7
L0_CTLIN_L1 L0_CTLOUT_L1
7 HT_NB_CPU_CTL_H0 V2 V4 HT_CPU_NB_CTL_H0 7
L0_CTLIN_H0 L0_CTLOUT_H0
7 HT_NB_CPU_CTL_L0 V1 V3 HT_CPU_NB_CTL_L0 7
L0_CTLIN_L0 L0_CTLOUT_L0
B B
+1.5VSUS
+1.5VSUS
+3V
R104 R106 R102
2K/F_4 2K/F_4 2K/F_4
R105 R107 R103
25mils 390_4 390_4 1K/F_4
2
Q9
R301 R302 R111 C57 MMBT3904
10K/F_4 10K/F_4 10K/F_4 .1U/10V_4 29,34 MBCLK MBCLK 3 1 CPU_SIC
CPU_SIC 5
U6 1 2
2
RB501V-40 D7 Q10
8 1 MMBT3904
19,29 MBCLK2 SCLK VCC MBDATA CPU_SID
29,34 MBDATA 3 1
CPU_THERMDA 5 CPU_SID 5
19,29 MBDATA2 7 2
SDA DXP
C50 1 2
2
6 3 *100P/50V_4 RB501V-40 D8
ALERT# DXN Q8 *MMBT3904
FAN_ON# 4 5 SMBALERT# 3 1 CPU_ALERT
28 FAN_ON# OVERT# GND CPU_THERMDC 5 CPU_ALERT 5
R110 *0_4
A SYS_SHDN# 30 A
G780P81U
ADDRESS: 98H 3920_RST# 29
Q12
D10
3
MMBT3904-7-F
2 2 1 ECPWROK 12,29 Quanta Computer Inc.
1
RB501V-40
SMBALERT# PROJECT : FP8
R123 10K/F_4 +3V Size Docum ent Num ber Rev
AMD ASB2 HT LINK/THERMAL 1A

5 4 3 2 1
5 4 3 2 1
Channel-A to Solderdown MEM

AMD Processor DDR3 Memory Interface
Channel-B to SODIMM Connector
04
DDR_A_D[0..63] 17,18
U17B U17C
DDR_B_D[0..63] 16
17,18,19 DDR_A_MA[0..13] DDR_A_D63 16 DDR_B_MA[0..15] DDR_B_MA15 DDR_B_D63
P30 AG11 P33 AN13
MA_ADD15 MA_DATA63 DDR_A_D62 DDR_B_MA14 MB_ADD15 MB_DATA63 DDR_B_D62
M29 AH11 P31 AL14
DDR_A_MA13 MA_ADD14 MA_DATA62 DDR_A_D61 DDR_B_MA13 MB_ADD14 MB_DATA62 DDR_B_D61
AG28 AJ12 AJ33 AL16
P28 AJ14 T32 AN17
D DDR_A_MA11 MA_ADD12 MA_DATA60 DDR_A_D59 DDR_B_MA11 MB_ADD12 MB_DATA60 DDR_B_D59 D
T30 AF11 T31 AN12
AC28 AF12 AD32 AM12
DDR_A_MA9 P27 MA_ADD10 MA_DATA58 AG12 DDR_A_D57 DDR_B_MA9 T33 MB_ADD10 MB_DATA58 AM16 DDR_B_D57
R26 AH12 V32 AN16
DDR_A_MA7 R27 MA_ADD8 MA_DATA56 AK14 DDR_A_D55 DDR_B_MA7 U33 MB_ADD8 MB_DATA56 AL18 DDR_B_D55
U28 AF15 V33 AN19
DDR_A_MA5 V30 MA_ADD6 MA_DATA54 AH19 DDR_A_D53 DDR_B_MA5 V31 MB_ADD6 MB_DATA54 AM24 DDR_B_D53
U27 AK20 W33 AN24
Y30 AF14 Y31 AM18
AB29 AG14 Y33 AN18
W29 AF17 Y32 AL22
AC26 AG19 AC33 AN23
17,18,19 DDR_A_BS[0..2] MA_ADD0 MA_DATA48 DDR_A_D47 16 DDR_B_BS[0..2] MB_ADD0 MB_DATA48 DDR_B_D47
AG20 AM25
DDR_A_BS2 MA_DATA47 DDR_A_D46 DDR_B_BS2 MB_DATA47 DDR_B_D46
R29 AJ20 R33 AL26
DDR_A_BS1 AC29 MA_BANK2 MA_DATA46 AF22 DDR_A_D45 DDR_B_BS1 AD33 MB_BANK2 MB_DATA46 AN28 DDR_B_D45
DDR_A_BS0 MA_BANK1 MA_DATA45 DDR_A_D44 DDR_B_BS0 MB_BANK1 MB_DATA45 DDR_B_D44
AE28 AK24 AE33 AL28
MA_BANK0 MA_DATA44 AF19 DDR_A_D43 MB_BANK0 MB_DATA44 AL24 DDR_B_D43
MA_DATA43 DDR_A_D42 MB_DATA43 DDR_B_D42
K30 AF20 K33 AN25
MA_CHECK7 MA_DATA42 DDR_A_D41 MB_CHECK7 MB_DATA42 DDR_B_D41
J29 AJ23 K31 AN27
G29 AG23 G32 AM28
F29 AF23 F32 AM29
L28 AF25 L33 AL30
L29 MA_CHECK3 MA_DATA38 AH27 DDR_A_D37 K32 MB_CHECK3 MB_DATA38 AL32 DDR_B_D37
H29 AK30 H31 AL33
H27 MA_CHECK1 MA_DATA36 AJ25 DDR_A_D35 G33 MB_CHECK1 MB_DATA36 AK28 DDR_B_D35
17,18 DDR_A_DQS[0..7] AG25 16 DDR_B_DQS[0..7] AN29
J27 MA_DATA34 AJ26 DDR_A_D33 J33 MB_DATA34 AM31 DDR_B_D33
17,18 DDR_A_DQS#[0..7] MA_DQS_H8 MA_DATA33 16 DDR_B_DQS#[0..7] MB_DQS_H8 MB_DATA33
J26 AJ28 DDR_A_D32 H32 AM32 DDR_B_D32
DDR III: CHANNEL A

DDR_A_DQS7 MA_DQS_L8 MA_DATA32 DDR_A_D31 DDR_B_DQS7 MB_DQS_L8 MB_DATA32 DDR_B_D31
AJ11 D28 AM14 E33
DDR III: CHANNEL B

DDR_A_DQS#7 MA_DQS_H7 MA_DATA31 DDR_A_D30 DDR_B_DQS#7 MB_DQS_H7 MB_DATA31 DDR_B_D30
AK12 G28 AN14 D31
C DDR_A_DQS6 MA_DQS_L7 MA_DATA30 DDR_A_D29 DDR_B_DQS6 MB_DQS_L7 MB_DATA30 DDR_B_D29 C
AG15 D26 AL20 B31
AH15 E26 AM20 A31
DDR_A_DQS5 AH22 MA_DQS_L6 MA_DATA28 F30 DDR_A_D27 DDR_B_DQS5 AN26 MB_DQS_L6 MB_DATA28 F33 DDR_B_D27
AG22 E29 AM26 F31
AG26 F27 AN30 C32
AH26 H26 AM30 B32
E28 H25 D33 C30
F28 D24 D32 A29
E25 H22 B28 B26
F25 E22 A28 A26
G17 F26 A21 B30
H17 G26 B20 A30
DDR_A_DQS0 E12 MA_DQS_L1 MA_DATA18 D22 DDR_A_D17 DDR_B_DQS0 B16 MB_DQS_L1 MB_DATA18 A27 DDR_B_D17
F12 G23 A15 C26
MA_DQS_L0 MA_DATA16 G22 DDR_A_D15 MB_DQS_L0 MB_DATA16 A24 DDR_B_D15
MA_DATA15 DDR_A_D14 MB_DATA15 DDR_B_D14
T9 AK18 G20 T63 AN22 B24
AJ17 MA_CLK_H7 MA_DATA14 G15 DDR_A_D13 AM22 MB_CLK_H7 MB_DATA14 C18 DDR_B_D13
T8 MA_CLK_L7 MA_DATA13 T64 MB_CLK_L7 MB_DATA13
AH17 F15 DDR_A_D12 AN21 A18 DDR_B_D12
T6 MA_CLK_H6 MA_DATA12 DDR_A_D11 T60 MB_CLK_H6 MB_DATA12 DDR_B_D11
T7 AG17 D20 T59 AM21 A25
MA_CLK_L6 MA_DATA11 DDR_A_D10 MB_CLK_L6 MB_DATA11 DDR_B_D10
Y28 F22 AA32 C24
17,18,19 DDR_A_CLK_0 MA_CLK_H5 MA_DATA10 DDR_A_D9 16 DDR_B_CLK_0 MB_CLK_H5 MB_DATA10 DDR_B_D9
17,18,19 DDR_A_CLK_0# Y27 D16 16 DDR_B_CLK_0# AA33 C20
AB27 E17 AB33 A19
19 DDR_A_CLK_1 MA_CLK_H4 MA_DATA8 DDR_A_D7 16 DDR_B_CLK_1 MB_CLK_H4 MB_DATA8 DDR_B_D7
AB26 H15 AB32 C16
19 DDR_A_CLK_1# MA_CLK_L4 MA_DATA7 DDR_A_D6 16 DDR_B_CLK_1# MB_CLK_L4 MB_DATA7 DDR_B_D6
T17 W27 H14 T81 AB31 A16
W26 MA_CLK_H3 MA_DATA6 G12 DDR_A_D5 AB30 MB_CLK_H3 MB_DATA6 B14 DDR_B_D5
T16 MA_CLK_L3 MA_DATA5 DDR_A_D4 T73 MB_CLK_L3 MB_DATA5 DDR_B_D4
T19 P26 H12 T80 AD31 A13
M26 MA_CLK_H2 MA_DATA4 E15 DDR_A_D3 AD30 MB_CLK_H2 MB_DATA4 B18 DDR_B_D3
T25 MA_CLK_L2 MA_DATA3 T77 MB_CLK_L2 MB_DATA3
D18 E14 DDR_A_D2 C22 A17 DDR_B_D2
T53 MA_CLK_H1 MA_DATA2 DDR_A_D1 T62 MB_CLK_H1 MB_DATA2 DDR_B_D1
T23 F19 E11 T58 B22 C14
E20 F11 A22 A14
B T24 MA_CLK_H0 MA_DATA0 T54 MB_CLK_H0 MB_DATA0 B
T30 E19 DDR_A_DM[0..7] 17,18 T65 A23 DDR_B_DM[0..7] 16
MA_CLK_L0 MB_CLK_L0
H30 H33
M30 MA_DM8 AL12 DDR_A_DM7 N33 MB_DM8 AN15 DDR_B_DM7
19 DDR_CKE1_DIMMA MA_CKE1 MA_DM7 DDR_A_DM6 16 DDR_CKE1_DIMMB MB_CKE1 MB_DM7 DDR_B_DM6
17,18,19 DDR_CKE0_DIMMA M28 AK16 16 DDR_CKE0_DIMMB P32 AN20
MA_CKE0 MA_DM6 AK22 DDR_A_DM5 MB_CKE0 MB_DM6 AK26 DDR_B_DM5
MEM_MA1_ODT1 MA_DM5 DDR_A_DM4 MEM_MB1_ODT1 MB_DM5 DDR_B_DM4
AJ29 AJ27 AK31 AN31
T10 MEM_MA1_ODT0 MA1_ODT1 MA_DM4 DDR_A_DM3 T14 MEM_MB1_ODT0 MB1_ODT1 MB_DM4 DDR_B_DM3
T15 AF27 E27 T75 AH31 C33
MA1_ODT0 MA_DM3 DDR_A_DM2 MB1_ODT0 MB_DM3 DDR_B_DM2
AJ30 E23 AK32 C28
19 DDR_ODT1_DIMMA MA0_ODT1 MA_DM2 DDR_A_DM1 16 DDR_ODT1_DIMMB MB0_ODT1 MB_DM2 DDR_B_DM1
17,18,19 DDR_ODT0_DIMMA AG29 H19 16 DDR_ODT0_DIMMB AH33 A20
MA0_ODT0 MA_DM1 DDR_A_DM0 MB0_ODT0 MB_DM1 DDR_B_DM0
G14 D14
MA_DM0 MB_DM0
T12 AH29 T74 AK33
MA1_CS_L1 MB1_CS_L1
AE29 AF33
T18 MA1_CS_L0 T76 MB1_CS_L0
AH30 AJ32
19 DDR_CS1_DIMMA# MA0_CS_L1 16 DDR_CS1_DIMMB# MB0_CS_L1
17,18,19 DDR_CS0_DIMMA# AF29 16 DDR_CS0_DIMMB# AF31
MA0_CS_L0 MB0_CS_L0
17,18,19 DDR_A_RAS# AC27 16 DDR_B_RAS# AF32

AF30 MA_RAS_L AH32 MB_RAS_L
17,18,19 DDR_A_CAS# MA_CAS_L 16 DDR_B_CAS# MB_CAS_L
17,18,19 DDR_A_WE# AE27 16 DDR_B_WE# AG33
MA_WE_L MB_WE_L
L27 L32
17 MEM_MA_RESET# MA_RESET_L 16 MEM_MB_RESET# MB_RESET_L
M32 M33
19 MEM_MA_HOT# FREE|MA_EVENT_L 16 MEM_MB_HOT# FREE|MB_EVENT_L
Layout: Route as 60 ohms Layout: Route as 60 ohms

with 5/10 W/S from CPU pins. with 5/10 W/S from CPU pins.
A +1.5VSUS A
+1.5VSUS R251 2.2K_4
R249 2.2K_4 R250

2
Q22 2.2K_4
MMBT3904
3 1 MEM_MA_HOT# 19
R260
2.2K_4 PROJECT : FP8
2
Q21
MMBT3904 Size Docum ent Num ber Rev
12 MEM_GEVEN# 3 1 MEM_MB_HOT# 16 AMD ASB2 CPU(DDR3 MEM I/F) 1A

5 4 3 2 1
5 4 3 2 1
CPU CLK
W/S= 15 mil/20mil
05
BLM21PG221SN1D(220,100M,2A)_8
+2.5V +CPUVDDA Keep trace from resisor to CPU within 0.6"
L42 keep trace from caps to CPU within 1.2"
C462 LS0805-100M-N C456 C455 C451 U17D Thermdc and Thermda should be routed away to VRM,
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 3300P/50V_4 C442 A8 crystal, etc. Customer should follow the MBDG.
3900P/25V_4 B8 VDDA_1 MISC
11 CPUCLKP VDDA_2 However, Bimini is using TSI so this does not applies to Bimini.
R231 CPUCLKIN A6
C447 CPUCLKIN# CLKIN_H CPU_CORE_TYPE
169/F_4 A7 M31 T72
3900P/25V_4 CLKIN_L RSVD|CORE_TYPE
11 CPUCLKN
CPU_PWR_GD D10
11 CPU_PWR_GD CPU_LDT_STOP# PWROK
9,11 CPU_LDT_STOP# E9
CPU_LDT_RST# LDTSTOP_L CPU_SVC_R
F9 C1
D 11 CPU_LDT_RST# RESET_L SVC CPU_SVD_R D
B2 +1.5VSUS R7 10K/F_4
SVD
+1.5V R209 300_4
R229 300_4 R9 solder mask opening under the processor
2
CPU_SIC AN4 AL6 CPU_THERMDC 1K/F_4 Q1
3 CPU_SIC CPU_SID SIC THERMDC CPU_THERMDA CPU_THERMDC 3
AN5 AM5 MMBT3904
3 CPU_SID SID THERMDA CPU_THERMTRIP#_R CPU_THERMDA 3
AM2 AK6 1 3 CPU_THERMTRIP# 12
CPU_ALERT RSVD_SA0 THERMTRIP_L CPU_PROCHOT#_R
3 CPU_ALERT AN3 AN6 1 3 CPU_PROCHOT# 11
ALERT_L PROCHOT_L
CPU_TDI AM8 AN7 CPU_TDO R204 MMBT3904
+1.5VSUS CPU_TRST# TDI TDO Q20
AL8 300_4
TRST_L
2
CPU_TCK AK8
CPU_TMS AN8 TCK R101
TMS
*0_4 +1.5VSUS R205
R242 CPU_DBREQ# G9 H9 CPU_DBRDY 10K/F_4
DBREQ_L DBRDY
1K/F_4
CPU_VDD0_RUN_FB_L D2
33 CPU_VDD0_RUN_FB_L VSS_SENSE
M_VREF CPU_VLDT_SENSE E2 AM6 RSVD3
T27 CPU_VDD0_RUN_FB_H VLDT_SENSE RSVD3 T1
33 CPU_VDD0_RUN_FB_H E1 1 3 EC_PROCHOT# 29
VDD_SENSE CPU_PRESENT_L
D1 AJ9
33 CPU_VDDNB_RUN_FB_H VDDNB_SENSE CPU_PRESENT_L T5 *MMBT3904
R241 C600 32 CPU_VDDIO_SUS_FB_H D3
VDDIO_SENSE Q7
1K/F_4 C599 C2 R100
+1.5VSUS 32 CPU_VDDR_SENSE
2
VDDR_SENSE
0.1U/10V_4 1000P/50V_4 place within 1.5" *300_4
M_VREF A11 V10 CPU_HTREF1 R32 44.2/F_4
M_VREF HTREF1 CPU_VLDT
R239 C433 M_ZP AM9 V9 CPU_HTREF0 R31 44.2/F_4
R222 M_ZN M_ZN_H HTREF0
AN9
M_ZN_L
510/F_4 0.01U/50V_4 39.2/F_4 10/29
+1.5VSUS
CPU_TEST25_H_BYPASSCLK_H A9 B10 CPU_TEST29_H_FBCLKOUT_P R237 80.6/F_4
CPU_TEST25_L_BYPASSCLK_L B9 BYPASSCLK_H FBCLKOUT_H CPU_TEST29_L_FBCLKOUT_N
12/23 New add for SI BYPASSCLK_L FBCLKOUT_L
A10 Route as 80ohm, diff
C CPU_TEST19_PLLTEST0 C
R238 A5
CPU_TEST18_PLLTEST1 PLLTEST0
By AMD confirm PLACE THEM CLOSE TO B6
PLLTEST1
510/F_4 CPU WITHIN 1" AK7 CPU_TEST24_SCANCLK1
CPU_TEST9_ANALOGIN SCANCLK1 CPU_TEST23_TSTUPD
R33 *0_4/S G8 AG8
ANALOGIN TSTUPD CPU_TEST22_SCANSHIFTEN
AK9
CPU_TEST17_BP3 SCANSHIFTEN CPU_TEST21_SCANEN
T28 F8 AH9
CPU_TEST16_BP2 BP3 SCANEN CPU_TEST20_SCANCLK2
T51 C8 AM7
CPU_TEST15_BP1 BP2 SCANCLK2
D9
CPU_TEST14_BP0 BP1 CPU_TEST28_H_PLLCHRZ_P
E8
BP0 PLLCHRZ_H
G11 T29 route as differential
H11 CPU_TEST28_L_PLLCHRZ_N as short as possible
CPU_TEST7_ANALOG_T PLLCHRZ_L CPU_TEST27_SINGLECHAIN T22
T52 C6
ANALOG_T SINGLECHAIN
AJ8 testpoint under package
CPU_TEST6_DIECRACKMON AH7 AM4 CPU_TEST26_BURNIN_L
T4 CPU_TEST3 DIECRACKMON BURNIN_L CPU_TEST10_ANALOGOUT
AK5 D7 R214 *300_4 CPU_VLDT
T2 CPU_TEST2 GATE0 ANALOGOUT CPU_TEST8_DIG_T
T3 AJ7 B5 T48 R147 is installed ONLY when SCAN is enabled
DRAIN0 DIG_T
R215, R185 internal ONLY
AG9
M_TEST
+1.5VSUS
R213 1K/F_4 CPU_TEST26_BURNIN_L

R240 300_4 CPU_DBREQ#
R21 1K/F_4 CPU_TEST27_SINGLECHAIN
CPU_TEST21_SCANEN R18 300_4

CPU_TEST20_SCANCLK2 R215 300_4
CPU_TEST24_SCANCLK1 R220 1K/F_4
CPU_TEST22_SCANSHIFTEN R20 1K/F_4
B B
CPU_TEST15_BP1 R236 *300_4
CPU_TEST14_BP0 R224 *300_4
CPU_DBRDY R34 *300_4
+3V
+1.5VSUS R208 *10K/F_4 CNTR_VREF CPU_TEST18_PLLTEST1 R226 1K/F_4
CPU_TEST19_PLLTEST0 R227 1K/F_4
CPU_TEST23_TSTUPD R19 *1K/F_4
R203
2
Q19 *1K/F_4
*MMBT3904
CPU_LDT_RST# 1 3 CPU_LDT_RST_HTPA#
Can remove on MP------>LX
VID Override Circuit New add for Vcore

+1.5V +3V 2010/2/8
HDT Connector +1.5VSUS

+1.5V
R228
+1.5VSUS Note: FOR PV NO stuff 300_4 R206
2
To override VID, 1K/F_4
1 2
3 4 Remove R192, R194, R196, install R165 R328 CPU_PWR_GD 1 3
5 6 R201 R202
CPU_DBREQ# set VID via SW100 1K/F_4 Q28 CPU_PWRGD_SVID_REG 33
7 8
A CPU_DBRDY A
9 10 1K/F_4 *1K/F_4 2/8 AO3416
CPU_TCK 11 12
CPU_TMS 13 14 By AMD confirm
CPU_TDI 15 16 BOOT VOLTAGE(VDD)
CPU_TRST# 17 18 SVC SVD 12/23 R228 change to 300 for SI
CPU_TDO 19 20 (CPUVRM_PRO# (CPUVRM_PRO#
= VCC/GND) = OPEN)
C454 1U/10V_4
21
23
22
24 CPU_LDT_RST_HTPA# 0 0 1.1 1.1 Quanta Computer Inc.
25 0 1 1.0 1.2 CPU_SVC_R R210 *0_4/S
KEY CPU_SVC 33
1
1
0
1
0.9
0.8
1.0
0.8
CPU_SVD_R R211 *0_4/S
CPU_SVD 33 To CPU VRM PROJECT : FP8
CN16 Size Docum ent Num ber Rev
*HDT CONN
AMD ASB2 CPU(CTRL&DEBUG) 1A
VID OVERIDE TABLE (VDD) Date: Thurs day, February 11, 2010 Sheet 5 of 41
5 4 3 2 1
5 4 3 2 1
+VCORE
D4
U17E
AE12
+VCORE
+1.5VSUS U17F
+1.1V
R212 0_8
CPU_VLDT
B1
U17G
W19
AM19
AF7
U17H
VSS_207 VSS_191
AK15
AK17
06
D5 VDD_1 VDD_85 AD9 N2 VSS_1 VSS_45 W1 AF26 VSS_167 VSS_192 AK19
VDD_2 VDD_84 VSS_28 VSS_44 VSS_166 VSS_193
D6 AE21 M27 F1 N22 V20 AE7 AK21
E5 VDD_3 VDD_83 AD21 Y26 VDDIO_1 VLDT_A_1 F2 N23 VSS_29 VSS_43 V18 AF8 VSS_165 VSS_194 AA2
VDD_4 VDD_82 VDDIO_2 VLDT_A_2 VSS_30 VSS_42 VSS_168 VSS_126
E6 AD18 U26 F3 B13 M11 AF9 AA22
E7 VDD_5 VDD_81 AD14 N32 VDDIO_3 VLDT_A_3 F4 B15 VSS_2 VSS_26 L8 AG1 VSS_169 VSS_127 AA23
VDD_6 VDD_80 VDDIO_4 VLDT_A_4 VSS_3 VSS_25 VSS_170 VSS_128
F5 AD12 U32 B17 V15 AG2 AK23
VDD_7 VDD_79 VDDIO_5 VSS_4 VSS_41 VSS_171 VSS_195
F6 AD11 N30 AL1 M21 L4 AG27 AA4
VDD_8 VDD_78 VDDIO_6 VLDT_B_1 VSS_27 VSS_24 VSS_172 VSS_129
F7 AC5 P29 AL2 B19 L30 AG4 AA9
D VDD_9 VDD_77 VDDIO_7 VLDT_B_2 VSS_5 VSS_23 VSS_173 VSS_130 D
H7 AE18 R28 AL3 B21 L26 AG5 AB10
VDD_10 VDD_76 VDDIO_8 VLDT_B_3 +0.9V VSS_6 VSS_22 VSS_174 VSS_131
H8 AC24 R30 AL4 B23 L24 AG6 AB12
J8 VDD_11 VDD_75 AC12 R32 VDDIO_9 VLDT_B_4 B27 VSS_7 VSS_68 L23 AG7 VSS_175 VSS_132 AB21
E4 AC10 U29 A12 B29 L22 AE4 AB22
J10 VDD_13 VDD_73 AB13 U30 VDDIO_11 VDDR_1 B12 B33 VSS_9 VSS_70 L21 AE25 VSS_164 VSS_134 AB23
VDD_14 VDD_72 VDDIO_12 VDDR_2 VSS_10 VSS_71 VSS_163 VSS_135
J12 AB11 W28 C12 C10 L2 AE24 AB24
POWER2
J14 VDD_15 VDD_71 AE14 W30 VDDIO_13 VDDR_3 D12 P10 VSS_11 VSS_72 L12 AE22 VSS_162 VSS_136 AK25
J18 AA24 W32 P14 L10 AE20 AK27
J20 AA12 Y29 AK10 P16 L1 AE2 AK29
J21 AA10 AA30 AL10 P19 K9 AE16 AJ5
POWER1

J23 Y19 AB28 AM10 P7 M6 AE13 AH6
J9 Y16 AE32 AN10 C31 K24 AH14 AL31
K10 VDD_21 VDD_65 Y14 AC30 VDDIO_19 VDDR_8 D11 VSS_12 VSS_78 K22 AE11 VSS_177 VSS_201 AM1
VDD_22 VDD_64 VDDIO_20 +VDDNB_CPU VSS_13 VSS_79 VSS_156 VSS_202
K12 W5 AC32 D13 K16 AE10 AM13
K14 VDD_23 VDD_63 W20 AE26 VDDIO_21 D15 VSS_14 VSS_80 M22 AE1 VSS_155 VSS_203 AB7
K18 W18 AE30 A3 R1 K13 AD24 AC1
K20 VDD_25 VDD_61 W15 AF28 VDDIO_23 VDDNB_1 A4 D17 VSS_36 VSS_82 M24 AD23 VSS_153 VSS_138 AM15
VDD_26 VDD_60 VDDIO_24 VDDNB_2 VSS_16 VSS_83 VSS_152 VSS_205
K21 AE23 AG30 B3 D19 K11 AD22 AM17
GND1
K23 V24 AG32 B4 D21 M23 AH20 AC11
GND2
N4 V19 AD25 C3 D23 J7 AH23 AC13
L11 V16 AA25 C4 D25 W16 AH25 AC2
L13 V14 AC25 D27 J4 AH28 AC21
L7 VDD_31 VDD_55 T20 V25 VDDIO_29 R15 VSS_21 VSS_88 W14 AD20 VSS_181 VSS_142 AC22
L9 T18 P25 B11 R18 J32 AD16 AM23
M10 VDD_33 VDD_53 T15 N25 VDDIO_31 PROGEN_L R2 VSS_38 VSS_90 J30 AD13 VSS_149 VSS_208 AM27
M12 T10 M25 R20 M13 AD10 AM33
R4 VDD_35 VDD_51 R5 K25 VDDIO_33 G7 D29 VSS_40 VSS_92 J28 AC9 VSS_147 VSS_210 AN2
VDD_36 VDD_50 VDDIO_34 FREE_1 VSS_46 VSS_93 VSS_146 VSS_211
M5 R19 L25 B7 D30 U8 AC8 AN32
N11 R16 T25 AH8 D8 J25 A2 AM11
N24 R14 Y25 AJ6 E30 U4 AC23
C VDD_39 VDD_47 VDDIO_37 FREE_4 VSS_49 VSS_96 VSS_144 C
W4 AC4 AB25 B25 E32 J24 AH5
VDD_40 VDD_46 VDDIO_38 FREE_5 VSS_50 VSS_97 VSS_182
N9 P24 AM3 F14 U7 AJ1
P15 VDD_41 VDD_45 P20 FREE_6 AN11 F17 VSS_51 VSS_98 U2 AJ15 VSS_183
VDD_42 VDD_44 FREE_7 VSS_52 VSS_99 VSS_184
P18 P9 R8 J2 W2
VDD_43 FREE_8 VSS_53 VSS_100 VSS_116
P8 T14 J16 A32
FREE_9 VSS_54 VSS_101 VSS_213
T16 J13 W8
VSS_55 VSS_102 VSS_117
F20 J11 Y10
T19 J1 Y15
T24 H6 Y18
T9 H5 AJ19
U1 H28 AJ2
+1.1V or +1.2V => CPU_VLDT F23
N1 VSS_61 VSS_108
H23
H20
AJ22
AJ4 VSS_187
+0.9V => CPU_VDDR G1
G19 VSS_63 VSS_110
J22
M9
Y20
Y24 VSS_121
+1.5V_SUS => CPU_VDDIO_SUS G2
G25 VSS_65 VSS_112
G4
G30
AK11
AK13 VSS_189
CPU_VCORE => CPU_VDD_RUN G27
N10
VSS_67 VSS_114
N12 Y7
AA1
VSS_123
VSS_115 VSS_124
AA11
VSS_125
ASB2-1021
+0.9V ASB2-1021
Place close to socket

C437 C165 C163 C443 C439 C446 C438 C444 C151 C150 C149 C440 C445 C164 C152 C148
B B
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V 0.22U/6.3V 1000P/50V_4 1000P/50V_4 180P/25V_4 180P/25V_4
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V 0.22U/6.3V 1000P/50V_4 1000P/50V_4 180P/25V_4 180P/25V_4
+VCORE
BOTTOM SIDE DECOUPLING
DECOUPLING BETWEEN PROCESSOR AND DIMMs C98 C97 C74 C124 C122 C77 C125
PLACE CLOSE TO PROCESSOR AS POSSIBLE 22U/6.3V_8

22U/6.3V_8
22U/6.3V_8
22U/6.3V_8 0.22U/6.3V
0.01U/50V_4
180P/25V_4
+1.5VSUS
+VCORE
C107 C60 C58 C84 C83 C106 C82 C104 C128 C59 C105
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V 0.22U/6.3V 0.01U/50V_4 180P/25V_4 C79 C99 C78 C75 C123 C76 C73
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V 0.22U/6.3V 0.01U/50V_4
22U/6.3V_8 22U/6.3V_8 0.01U/50V_4
PROCESSOR POWER AND GROUND

22U/6.3V_8 22U/6.3V_8 0.22U/6.3V 180P/25V_4
It's required to add two 10uF/0603 size

+VDDNB_CPU +1.5VSUS for CPU_VDDIO_SUS,move 2x180pf from
A under CPU ballout by Beker, Ben. A
CPU_VLDT
C435 C434 C436 C100 C126 C102 C103 C127 C81

C80 C101
C422 C420 C421 C419 C418 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V 180P/25V_4 10uF_6.3V 10uF_6.3V
4.7U/6.3V_6 0.01U/50V_4
22U/6.3V_8 22U/6.3V_8 0.22U/6.3V 180P/25V_4
0.22U/6.3V .1U/10V_4 .1U/10V_4
PROJECT : FP8
AMD ASB2 CPU(PWR&GND) 1A

5 4 3 2 1
5 4 3 2 1
+1.8V
+1.1V
9,10,12,22,35
6,8,9,10,14,22,31
HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
Y25
Y24
V22
V23
U16A
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
D24
D25
E24
E25
HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
07
HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_H2 V25 HT_RXCAD1N HT_TXCAD1N F24 HT_NB_CPU_CAD_H2
HT_CPU_NB_CAD_H[15..0] 3 HT_CPU_NB_CAD_L2 HT_RXCAD2P HT_TXCAD2P HT_NB_CPU_CAD_L2
V24 F25
HT_CPU_NB_CAD_L[15..0] HT_CPU_NB_CAD_H3 U24 HT_RXCAD2N HT_TXCAD2N F23 HT_NB_CPU_CAD_H3
HT_CPU_NB_CAD_L[15..0] 3 HT_CPU_NB_CAD_L3 HT_RXCAD3P HT_TXCAD3P HT_NB_CPU_CAD_L3
U25 F22
HT_CPU_NB_CLK_H[1..0] HT_CPU_NB_CAD_H4 T25 HT_RXCAD3N HT_TXCAD3N H23 HT_NB_CPU_CAD_H4
HT_CPU_NB_CLK_H[1..0] 3 HT_CPU_NB_CAD_L4 HT_RXCAD4P HT_TXCAD4P HT_NB_CPU_CAD_L4
T24 H22
HT_CPU_NB_CLK_L[1..0] HT_CPU_NB_CAD_H5 HT_RXCAD4N HT_TXCAD4N HT_NB_CPU_CAD_H5
P22 J25
HT_CPU_NB_CLK_L[1..0] 3 HT_CPU_NB_CAD_L5 HT_RXCAD5P HT_TXCAD5P HT_NB_CPU_CAD_L5
P23 J24
D HT_CPU_NB_CTL_H[1..0] HT_CPU_NB_CAD_H6 HT_RXCAD5N HT_TXCAD5N HT_NB_CPU_CAD_H6 D
P25 K24
HT_CPU_NB_CTL_H[1..0] 3 HT_CPU_NB_CAD_L6 HT_RXCAD6P HT_TXCAD6P HT_NB_CPU_CAD_L6
P24 K25
HT_CPU_NB_CTL_L[1..0] HT_CPU_NB_CAD_H7 N24 HT_RXCAD6N HT_TXCAD6N K23 HT_NB_CPU_CAD_H7
HT_CPU_NB_CTL_L[1..0] 3 HT_CPU_NB_CAD_L7 HT_RXCAD7P HT_TXCAD7P HT_NB_CPU_CAD_L7
N25 K22
HT_NB_CPU_CAD_H[15..0] HT_RXCAD7N HT_TXCAD7N
HT_NB_CPU_CAD_H[15..0] 3
HYPER TRANSPORT CPU I/F

HT_CPU_NB_CAD_H8 AC24 F21 HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L[15..0] HT_CPU_NB_CAD_L8 AC25 HT_RXCAD8P HT_TXCAD8P G21 HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_L[15..0] 3 HT_CPU_NB_CAD_H9 HT_RXCAD8N HT_TXCAD8N HT_NB_CPU_CAD_H9
AB25 G20
HT_NB_CPU_CLK_H[1..0] HT_CPU_NB_CAD_L9 HT_RXCAD9P HT_TXCAD9P HT_NB_CPU_CAD_L9
AB24 H21
HT_NB_CPU_CLK_H[1..0] 3 HT_CPU_NB_CAD_H10 HT_RXCAD9N HT_TXCAD9N HT_NB_CPU_CAD_H10
AA24 J20
HT_NB_CPU_CLK_L[1..0] HT_CPU_NB_CAD_L10 HT_RXCAD10P HT_TXCAD10P HT_NB_CPU_CAD_L10
AA25 J21
HT_NB_CPU_CLK_L[1..0] 3 HT_CPU_NB_CAD_H11 HT_RXCAD10N HT_TXCAD10N HT_NB_CPU_CAD_H11
Y22 J18
HT_NB_CPU_CTL_H[1..0] HT_CPU_NB_CAD_L11 Y23 HT_RXCAD11P HT_TXCAD11P K17 HT_NB_CPU_CAD_L11
HT_NB_CPU_CTL_H[1..0] 3 HT_CPU_NB_CAD_H12 HT_RXCAD11N HT_TXCAD11N HT_NB_CPU_CAD_H12
W21 L19
HT_NB_CPU_CTL_L[1..0] HT_CPU_NB_CAD_L12 W20 HT_RXCAD12P HT_TXCAD12P J19 HT_NB_CPU_CAD_L12
HT_NB_CPU_CTL_L[1..0] 3 HT_CPU_NB_CAD_H13 HT_RXCAD12N HT_TXCAD12N HT_NB_CPU_CAD_H13
V21 M19
HT_CPU_NB_CAD_L13 V20 HT_RXCAD13P HT_TXCAD13P L18 HT_NB_CPU_CAD_L13
HT_CPU_NB_CAD_H14 HT_RXCAD13N HT_TXCAD13N HT_NB_CPU_CAD_H14
U20 M21
HT_CPU_NB_CAD_L14 HT_RXCAD14P HT_TXCAD14P HT_NB_CPU_CAD_L14
U21 P21
HT_CPU_NB_CAD_H15 HT_RXCAD14N HT_TXCAD14N HT_NB_CPU_CAD_H15
U19 P18
HT_CPU_NB_CAD_L15 HT_RXCAD15P HT_TXCAD15P HT_NB_CPU_CAD_L15
U18 M18
HT_RXCAD15N HT_TXCAD15N
HT_CPU_NB_CLK_H0 T22 H24 HT_NB_CPU_CLK_H0
HT_CPU_NB_CLK_L0 HT_RXCLK0P HT_TXCLK0P HT_NB_CPU_CLK_L0
T23 H25
HT_CPU_NB_CLK_H1 HT_RXCLK0N HT_TXCLK0N HT_NB_CPU_CLK_H1
10/22 AB23
HT_RXCLK1P HT_TXCLK1P
L21
HT_CPU_NB_CLK_L1 AA22 L20 HT_NB_CPU_CLK_L1
HT_RXCLK1N HT_TXCLK1N
If the side-port memory interface is not used, make sure that:
‧ The memory interface I/O power (VDD_MEM) is connected to GND. HT_CPU_NB_CTL_H0 M22 M24 HT_NB_CPU_CTL_H0
HT_CPU_NB_CTL_L0 HT_RXCTL0P HT_TXCTL0P HT_NB_CPU_CTL_L0
M23 M25
‧ The memory interface I/O transform power (VDD18_MEM) is connected to GND plane (preferred) or connected HT_CPU_NB_CTL_H1 HT_RXCTL0N HT_TXCTL0N HT_NB_CPU_CTL_H1
R21 P19
C to 1.8 V. HT_CPU_NB_CTL_L1 HT_RXCTL1P HT_TXCTL1P HT_NB_CPU_CTL_L1 C
R20 R18
HT_RXCTL1N HT_TXCTL1N
‧ The memory interface compensation pins (MEM_COMPP, MEM_COMPN) for N and P channel
R196 301/F_4 HT_RXCALP C23 B24 HT_TXCALP R200 301/F_4
devices are left not connected. HT_RXCALP HT_TXCALP
HT_RXCALN A24 B25 HT_TXCALN
‧ The memory interface reference voltage MEM_VREF is connected to GND or left not connected. HT_RXCALN HT_TXCALN
‧ The memory interface PLL power IOPLLVDD18 is connected to 1.8 V and IOPLLVDD is Rb RS880M Ra
connected to 1.1 V.
‧ The memory interface enable strap HSYNC is not connected to GND.
This block is for UMA only , DIS can remove all component
U16D
Modify as below:
PAR 4 OF 6
page 10: AB12
MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC)
AA18
AE16 AA20
MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC)
1.VDD_MEM connected to gnd V11
MEM_A2(NC) MEM_DQ2/DVO_DE(NC)
AA19
AE15 Y19
MEM_A3(NC) MEM_DQ3/DVO_D0(NC)
2.VDD18_MEM connected to gnd AA12
MEM_A4(NC) MEM_DQ4(NC)
V17
AB16 AA17
Page 7 AB14
AA15
AD14 Y15
1.MEM_COMPP, MEM_COMPN are left not connected AD13
AC20
AD15 AD19
SBD_MEM/DVO_I/F
2.MEM_VREF is connected to GND or left not connected. AC16
AE22
AE13 AC18
3.IOPLLVDD18 is connected to 1.8 V and IOPLLVDD is AC14
MEM_A12(NC) MEM_DQ12(NC)
AB20
Y14 AD22
B connected to 1.1 V. MEM_A13(NC) MEM_DQ13/DVO_D9(NC)
AC22 B
MEM_DQ14/DVO_D10(NC)
AD16 AD21
MEM_BA0(NC) MEM_DQ15/DVO_D11(NC)
Page 9 AE17
MEM_BA1(NC)
AD17 Y17
MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC)
1.HSYNC_COM connected to pull high +3V MEM_DQS0N/DVO_IDCKN(NC)
W18
W12 AD20
Y12 MEM_RASb(NC) MEM_DQS1P(NC) AE21
MEM_CASb(NC) MEM_DQS1N(NC)
AD18
MEM_WEb(NC)
AB13 W17
MEM_CSb(NC) MEM_DM0(NC) BLM18PG181SN1D(180,1.5A)_6
AB18 AE19
MEM_CKE(NC) MEM_DM1/DVO_D8(NC)
V14 BLM18PG181SN1D(180,1.5A)_6
MEM_ODT(NC)
AE23 +1.8V_IOPLLVDD18 L39 +1.8V
V15 IOPLLVDD18(NC) AE24 +1.1V_IOPLLVDD L40
MEM_CKP(NC) IOPLLVDD(NC) +1.1V
W14
MEM_CKN(NC) AD23 C412 C413
MEM_COMPP IOPLLVSS(NC)
T46 AE12
AD12 MEM_COMPP(NC) AE18 2.2U/6.3V_6 2.2U/6.3V_6
MEM_COMPN(NC) MEM_VREF(NC)
RS880M
A A

PROJECT : FP8
RS880M HT IF/SIDE PORT 1A

5 4 3 2 1
5 4 3 2 1
08
D D
U16B
D4 A5 HDMI_TXC_P2
GFX_RX0P GFX_TX0P HDMI_TXC_N2 HDMI_TXC_P2 24
C4 PART 2 OF 6 B5
A3
GFX_RX0N
GFX_RX1P
GFX_TX0N
GFX_TX1P
A4 HDMI_TXC_P1 HDMI_TXC_N2 24
HDMI_TXC_P1 24
To HDMI CONN
B3 B4 HDMI_TXC_N1 Needs check RS880 HDMI pin define on FP9
GFX_RX1N GFX_TX1N HDMI_TXC_P0 HDMI_TXC_N1 24
C2 C3 HDMI_TXC_P0 24
C1 GFX_RX2P GFX_TX2P B2 HDMI_TXC_N0
GFX_RX2N GFX_TX2N HDMI_TXC_N0 24
E5 D1 HDMI_TXC_P
GFX_RX3P GFX_TX3P HDMI_TXC_N HDMI_TXC_P 24
F5 D2 HDMI_TXC_N 24
GFX_RX3N GFX_TX3N
G5 E2
GFX_RX4P GFX_TX4P
G6 E1
GFX_RX4N GFX_TX4N
H5 F4
H6 GFX_RX5P GFX_TX5P F3
GFX_RX5N GFX_TX5N
J6 F1
J5 GFX_RX6P GFX_TX6P F2
GFX_RX6N GFX_TX6N
J7 H4
J8 GFX_RX7P GFX_TX7P H3
GFX_RX7N GFX_TX7N
PCIE I/F GFX

L5 H1
GFX_RX8P GFX_TX8P
L6 H2
GFX_RX8N GFX_TX8N
M8 J2
GFX_RX9P GFX_TX9P
L8 J1
GFX_RX9N GFX_TX9N
P7 K4
M7 GFX_RX10P GFX_TX10P K3
GFX_RX10N GFX_TX10N
P5 K1
M5 GFX_RX11P GFX_TX11P K2
GFX_RX11N GFX_TX11N
R8 M4
P8 GFX_RX12P GFX_TX12P M3
GFX_RX12N GFX_TX12N
R6 M1
GFX_RX13P GFX_TX13P
R5 M2
GFX_RX13N GFX_TX13N
P4 N2
C GFX_RX14P GFX_TX14P C
P3 N1
GFX_RX14N GFX_TX14N
T4 P1
GFX_RX15P GFX_TX15P
12/7 Lan PCIE BUS from SB change to NB FOR SI T3
GFX_RX15N GFX_TX15N
P2
12/7 Lan PCIE BUS from SB change to NB FOR SI
AE3 AC1 T93
T91 GPP_RX0P GPP_TX0P
AD4 AC2 T94
T92
PCIE_RXP0_WWAN GPP_RX0N GPP_TX0N PCIE_TXP0_WWAN_C PCIE_TXP0_WWAN 26
26 PCIE_RXP0_WWAN AE2 AB4 C181 0.1U/10V_4
PCIE_RXN0_WWAN GPP_RX1P GPP_TX1P PCIE_TXN0_WWAN_C
WWAN 26 PCIE_RXN0_WWAN AD3
GPP_RX1N GPP_TX1N
AB3 C182 0.1U/10V_4
PCIE_TXN0_WWAN 26
WWAN
T56 AD1 AA2
GPP_RX2P GPP_TX2P
T57
AD2
GPP_RX2N PCIE I/F GPP GPP_TX2N
AA1 T87
V5 Y1 T88
GPP_RX3P GPP_TX3P
W6 Y2
U5 GPP_RX3N GPP_TX3N Y4
GPP_RX4P GPP_TX4P
U6 Y3
U8 GPP_RX4N GPP_TX4N V1
GPP_RX5P GPP_TX5P
U7 V2
GPP_RX5N GPP_TX5N
AA8 AD7 A_TX0P_C C408 0.1U/10V_4 PCIE_NB_SB_TX0P 11
11 PCIE_SB_NB_RX0P SB_RX0P SB_TX0P A_TX0N_C
11 PCIE_SB_NB_RX0N Y8 AE7 C407 0.1U/10V_4 PCIE_NB_SB_TX0N 11
SB_RX0N SB_TX0N A_TX1P_C
AA7 AE6 C403 0.1U/10V_4 PCIE_NB_SB_TX1P 11
11 PCIE_SB_NB_RX1P SB_RX1P SB_TX1P A_TX1N_C
11 PCIE_SB_NB_RX1N Y7 AD6 C405 0.1U/10V_4 PCIE_NB_SB_TX1N 11
SB_RX1N SB_TX1N
11 PCIE_SB_NB_RX2P
AA5
SB_RX2P PCIE I/F SB SB_TX2P
AB6 A_TX2P_C C400 0.1U/10V_4 PCIE_NB_SB_TX2P 11
AA6 AC6 A_TX2N_C C401 0.1U/10V_4
11 PCIE_SB_NB_RX2N SB_RX2N SB_TX2N PCIE_NB_SB_TX2N 11
W5 AD5 A_TX3P_C C396 0.1U/10V_4
11 PCIE_SB_NB_RX3P SB_RX3P SB_TX3P PCIE_NB_SB_TX3P 11
Y5 AE5 A_TX3N_C C398 0.1U/10V_4
11 PCIE_SB_NB_RX3N SB_RX3N SB_TX3N PCIE_NB_SB_TX3N 11
AC8 NB_PCIECALRP R194 1.27K/F_4
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R195 2K/F_4
AB8 +1.1V
PCE_CALRN(PCE_BCALRN)
RS880M
B B
+1.1V 6,7,9,10,14,22,31
RS880 Display Port Support (muxed on GFX)
GFX_TX0,TX1,TX2 and TX3

DP0
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7

DP1
AUX1 and HPD1
A A

PROJECT : FP8
RS880M PCIE 1A

5 4 3 2 1
5 4 3 2 1
09
U16C
12/6 New ADD 0 OHM for SI +3V_AVDD_NB F12 A22 TXLOUT0+
AVDD1(NC) TXOUT_L0P(NC) TXLOUT0- TXLOUT0+ 21
E12
AVDD2(NC)
PART 3 OF 6 TXOUT_L0N(NC)
B22 TXLOUT0- 21
+1.8V_AVDDDI_NB F14 A21 TXLOUT1+
CRT_R R325 CRT_R_L AVDDDI(NC) TXOUT_L1P(NC) TXLOUT1- TXLOUT1+ 21
25 CRT_R *0_4/S G15 B21 TXLOUT1- 21
+1.8V_AVDDQ_NB AVSSDI(NC) TXOUT_L1N(NC) TXLOUT2+
H15 B20
CRT_G R326 CRT_G_L AVDDQ(NC) TXOUT_L2P(NC) TXLOUT2- TXLOUT2+ 21
25 CRT_G *0_4/S H14 A20
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) TXLOUT2- 21
A19
CRT_B R327 *0_4/S CRT_B_L E17 TXOUT_L3P(NC) B19
25 CRT_B C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
F17
CRT/TVOUT
F15 Y(DFT_GPIO2) B18
2010/2/8 footprint to shortpad for PV COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
A18
CRT_R_L TXOUT_U0N(NC)
R199 140/F_4 G18 A17
RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3)
G17 B17
D CRT_G_L REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) D
R198 150/F_4 E18 D20
GREEN(DFT_GPIO1) TXOUT_U2P(NC)
F18 D21
+3V 3,5,10,11,12,13,14,15,16,19,20,21,22,23,24,25,26,27,28,33,35 CRT_B_L GREENb(NC) TXOUT_U2N(NC)
R197 150/F_4 E19 D18
+1.8V 7,10,12,22,35 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5)
+1.1V 6,7,8,10,14,22,31 F19 D19
BLUEb(NC) TXOUT_U3N(NC)
25 HSYNC_COM HSYNC_COM A11 B16 TXCLKOUT+
VSYNC_COM DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) TXCLKOUT- TXCLKOUT+ 21
25 VSYNC_COM B11 A16 TXCLKOUT- 21
DDCDATA DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3)
25 DDCDATA E8 D16
DDCCLK DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
25 DDCCLK F8 D17
DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
R41 715/F_4 DAC_RSET_NB G14
DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB
A13
+1.1V_PLLVDD A12 VDDLTP18(NC) B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
D14
B12 PLLVDD18(NC) A15 +1.8V_VDDLT_18_NB
LVTM
PLLVSS(NC) VDDLT18_1(NC)
PLL PWR
B15
+1.8V_VDDA18HTPLL H17 VDDLT18_2(NC) A14
VDDA18HTPLL VDDLT33_1(NC)
B14
+1.8V_VDDA18PCIEPLL VDDLT33_2(NC)
D7
VDDA18PCIEPLL1
E7 C14
VDDA18PCIEPLL2 VSSLT1(VSS)
D15
NB_PLTRST# VSSLT2(VSS)
D8 C16
11 NB_PLTRST# NB_PWRGD_IN SYSRESETb VSSLT3(VSS)
A10 C18
12 NB_PWRGD_IN POWERGOOD VSSLT4(VSS)
NB_LDT_STOP# C10 C20
NB_ALLOW_LDTSTOP C12 LDTSTOPb VSSLT5(VSS) E20
PM
ALLOW_LDTSTOP VSSLT6(VSS)
C22
NBHT_REFCLKP C25 VSSLT7(VSS)
11 NBHT_REFCLKP HT_REFCLKP
NBHT_REFCLKN C24
11 NBHT_REFCLKN HT_REFCLKN
NB_REFCLK_P E11
C 11 NB_REFCLK_P NB_REFCLK_N REFCLK_P/OSCIN(OSCIN) LCD_ENVDD C
F11 E9
CLOCKs
11 NB_REFCLK_N REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) LCD_BKL_CTL LCD_ENVDD 21
F7
NBGFX_CLKP LVDS_BLON(PCE_RCALRP) LCD_BKL_ON LCD_BKL_CTL 21
R39 4.7K_4 T2 G12
NBGFX_CLKN GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) LCD_BKL_ON 21
R38 4.7K_4 T1
GFX_REFCLKN
GPP_REFCLKP U1
T21 GPP_REFCLKN GPP_REFCLKP
T20 U2
R186 4.7K_4 GPP_REFCLKN
+3V
R185 4.7K_4 SBLINK_CLKP V4
11 SBLINK_CLKP GPPSB_REFCLKP(SB_REFCLKP)
SBLINK_CLKN V3
11 SBLINK_CLKN GPPSB_REFCLKN(SB_REFCLKN)
LCD_EDIDDAT A9 HDMI PLUG DET
21 LCD_EDIDDAT LCD_EDIDCLK I2C_DATA
21 LCD_EDIDCLK LX_PE_GPIO2
B9
B8
I2C_CLK MIS. TMDS_HPD(NC)
D9
D10
INT_TMDS_HPD 24
T43 DDC_DATA/AUX0N(NC) HPD(NC)
A8
HDMI_DDC_CLK DDC_CLK/AUX0P(NC) SUS_STAT#_NB R50 *0_4/S
24 HDMI_DDC_CLK B7 D12 SUS_STAT# 12
HDMI_DDC_DATA A7 DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5)
24 HDMI_DDC_DATA DDC_DATA1A/AUX1N(NC)
AE8 RS880_THRMDA
DYN_PWR_EN THERMALDIODE_P RS880_THRMDC T44
31 DYN_PWR_EN B10 AD8 T45
STRP_DATA THERMALDIODE_N
G11 D13 TEST_EN
RSVD TESTMODE
R184 *150/F_4 RS880_AUX_CAL C8 R193
AUX_CAL(NC)
1.8K_4
RS880M
STRAP_DEBUG_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO. +1.8V

RS880M --- ADD AVDDI-DAC Digital
+1.8V
not applicable to RS880 VDDLTP18 - LVDS or DVI/HDMI PLL
B +3V_AVDD_NB +1.8V B
VDDA18PCIEPLL -PCIE PLL +3V L10 not applicable to RS880
RS880M BLM18PG181SN1D(180,1.5A)_6
VSYNC_COM R190 3K_4 20m ils width R66 +1.8V_AVDDDI_NB L37 +1.8V_VDDLTP18_NB
1 Disable +3V
L12 +1.8V_VDDA18PCIEPLL AVDD-DAC Analog 0*_6/S
0 Enable not applicable to RS880 C173 BLM18PG181SN1D(180,1.5A)_6 C406
BLM18PG181SN1D(180,1.5A)_6 2.2U/6.3V_6 C174 2.2U/6.3V_6
C171 0.1U/10V_4
2.2U/6.3V_6 +1.8V PLLVDD18 - Graphics PLL
not applicable to RS880 BLM18PG181SN1D(180,1.5A)_6
+1.8V_AVDDQ_NB L38 +1.8V_VDDLT_18_NB
RS880M: Enables Side port memory VDDA18HTPLL -HT LINK PLL L13 +1.8V_PLLVDD18
L14
AVDDQ-DAC Bandgap
BLM21PG221SN1D(220,100M,2A)_8
BLM18PG181SN1D(180,1.5A)_6 Reference C196 C410 C409

RS880M:INT_HSYNC_COM 20m ils width not applicable to RS880 2.2U/6.3V_6 VDDLT18 - LVDS or
L15 +1.8V_VDDA18HTPLL DVI/HDMI digital
C247 C195 not applicable to 4.7U/6.3V_6 0.1U/10V_4
Selects if Memory SIDE PORT is available or not BLM18PG181SN1D(180,1.5A)_6 10U/6.3V_8 2.2U/6.3V_6 RS880
1 = Memory Side port Not available C197
0 = Memory Side port available 2.2U/6.3V_6
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]
BLM18PG181SN1D(180,1.5A)_6
+1.1V_PLLVDD
+1.1V
L36
+1.8V PLLVDD - Graphics PLL
HSYNC_COM R188 3K_4 +3V not applicable to C404
+1.8V 2.2U/6.3V_6
RS880
R191 *3K_4
A A
R189
1K/F_4
C193
U10 R47
For extrnal EEPROM Debug only
RS880 1
NC VCC
5 2K/F_4 11 ALLOW_LDTSTOP
5,11 CPU_LDT_STOP# 2
IN
0.1U/10V_4
DYN_PWR_EN R187 2K/F_4 R192 *0_4/S NB_ALLOW_LDTSTOP
3
GND OUT
4 NB_LDT_STOP#
PROJECT : FP8
74LVC1G07GW Size Docum ent Num ber Rev
RS880M SYS/CRT IF 1A

5 4 3 2 1
5 4 3 2 1
10
RS880M POWER TABLE
AE14
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
M11
D11
E14
E15
K14
J15
J12
L15
W1
W2
W4
W7
W8
G1
G2
G4
M6
G8
A2
B1
D3
D5
E4
H7
R7
N4
P6
R1
R2
R4
V7
U4
V8
V6
Y6
J4
L1
L2
L4
L7
PIN NAME RS880M PIN NAME RS880M
U16F
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
RS880M VDDHT +1.1V IOPLLVDD +1.1V
+1.1V_DYN 31
+3V 3,5,9,11,12,13,14,15,16,19,20,21,22,23,24,25,26,27,28,33,35
VDDHTRX +1.1V AVDD +3.3V
D +1.1V 6,7,8,9,14,22,31 D
VDDHTTX +1.2V AVDDDI +1.8V
+1.8V 7,9,12,22,35
PART 6/6
GROUND VDDA18PCIE +1.8V AVDDQ +1.8V
VDDG18 +1.8V PLLVDD +1.1V
VDD18_MEM +1.8V PLLVDD18 +1.8V
VDDPCIE +1.1V VDDA18PCIEPLL +1.8V

VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDDC +1.1V VDDA18HTPLL +1.8V
VDD_MEM +1.8V/1.5V VDDLTP18 +1.8V

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDDG33 +3.3V VDDLT18 +1.8V
IOPLLVDD18 +1.8V VDDLT33 NC
C C
VDDHT - HT +1.1V
LINK digital
I/O for
+1.1V 2A for RS880M VDDPCIE - PCIE-E Main power
U16E
RS880 0.6A 0.7A
R29 *0_8/S +1.1V_VDDHT J17 A6 +1.1V_VDD_PCIE R48 *0_8/S +1.1V
VDDHT_1 VDDPCIE_1
K16
VDDHT_2 PART 5/6 VDDPCIE_2
B6
L16 C6
VDDHT_3 VDDPCIE_3
C118 C147 C146 C145 M16 D6 C139 C138 C137 C113 C156
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHT_4 VDDPCIE_4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 4.7U/6.3V_6
P16 E6
VDDHT_5 VDDPCIE_5
VDDHTRX - HT R16
VDDHT_6 VDDPCIE_6
F6
LINK RX I/O for T16 G7
VDDHT_7 VDDPCIE_7
RS880 0.45A VDDPCIE_8
H8
R51 *0_8/S +1.1V_VDDHTRX H18 J9
G19 VDDHTRX_1 VDDPCIE_9 K9
VDDHTRX_2 VDDPCIE_10
F20 M9
VDDHTTX - HT C175 C160 C162 C161 E21 VDDHTRX_3 VDDPCIE_11 L9
LINK TX I/O for 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 D22 P9
RS880 B23 R9
A23 T9
0.5A +1.1V 2A for RS880M VDDPCIE_16
V9
R30 *0_8/S +1.1V_VDDHTTX AE25 U9
+1.1V VDDHTTX_1 VDDPCIE_17
AD24
VDDHTTX_2 7A VDDC - Core Logic power
AC23 K12 +1.1V_DYN
C120 C121 C96 C119 C95 AB22 VDDHTTX_3 VDDC_1 J14
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTTX_4 VDDC_2
AA21 U16
Y20 VDDHTTX_5 VDDC_3 J11 C115 C159 C117 C143 C94
VDDHTTX_6 VDDC_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
W19 K15
VDDHTTX_7 VDDC_5
POWER
V18 M12
VDDHTTX_8 VDDC_6
U17 L14
B VDDHTTX_9 VDDC_7 B
T17 L11
VDDHTTX_10 VDDC_8
R17 M13
VDDHTTX_11 VDDC_9
+1.8V 1A for RS880M+SB820 P17
M17
VDDHTTX_12 VDDC_10
M15
N12
VDDHTTX_13 VDDC_11
600mA VDDC_12
N14 C114
+1.8V L7 +1.8V_VDDA18PCIE J10 P11 C144 C116 C93
P10 VDDA18PCIE_1 VDDC_13 P13 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
BLM21PG221SN1D(220,100M,2A)_8 VDDA18PCIE_2 VDDC_14
K10 P14
VDDA18PCIE_3 VDDC_15
VDDA18PCIE - C92 C91 C142 C157 C141 C140 M10 R12
4.7U/6.3V_6 4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDA18PCIE_4 VDDC_16
PCIE TX stage L10 R15
I/O for RS880 W9 T11
H9 T15
T10
U12 10/22
R10
T14 If the side-port memory interface
Y9 J16
AA9
VDDA18PCIE_10 VDDC_22 is not used:
VDDA18PCIE_11
AB9
VDDA18PCIE_12 VDD_MEM1(NC)
AE10 ‧ The memory interface I/O power (VDD_MEM) is connected to GND.
25mA AD9
AA11 ‧ The memory interface I/O transform power (VDD18_MEM) is connected to GND plane
VDD18 - RS880 I/O +1.8V R65 *0_6/S AE9 Y11
VDDA18PCIE_14 VDD_MEM3(NC) (preferred) or connected to 1.8 V.
transform U10 AD10
C194 AB10
+1.8V_VDDG18_NB VDD_MEM5(NC)
1U/10V_4 F9 AC10
VDDG18_1(VDD18_1) VDD_MEM6(NC)
G9
VDDG18_2(VDD18_2)
RS880 3.3V(0.03A)
AE11 H11 +3V_VDDG33 R49 *0_6/S
VDD18_MEM1(NC) VDDG33_1(NC) +3V
AD11 H12
VDD18_MEM2(NC) VDDG33_2(NC) C158 C172 VDD33 - 3.3V I/O
RS880M 0.1U/10V_4 0.1U/10V_4
Not applicable to RX780
A
2/8 for PV Ra A
R29,R51,R30,R65,R49,R48 Footprint to short pad

PROJECT : FP8
RS880M PWR 1A

5 4 3 2 1
5 4 3 2 1
+1.1V_PCIE_VDDR
+3VS5
+3VPCU
14
12,13,14,15,29,35
21,22,25,26,27,28,29,30,31,34,35
11
U18A
PCIEC_RST#
PLACE THESE
T50
P1
SB800 Part 1 of 5
W2 PCI_CLK0
A_RST# PCIE_RST# PCICLK0 PCI_CLK_TPM T49
R234 33_4 L1 W1
PCIE AC 9 NB_PLTRST# A_RST# PCICLK1/GPO36 PCI_CLK_TPM 15
PCI CLKS
W3 PCI_CLK2 PCI_CLK2 15
PCICLK2/GPO37
COUPLING CAPS 8 PCIE_SB_NB_RX0P C417 0.1U/10V_4 A_RX0P_C AD26
A_TX0P PCICLK3/GPO38
W4 PCI_CLK3
PCI_CLK3 15 STRAP Function
C416 0.1U/10V_4 A_RX0N_C AD27 Y1 PCI_CLK4
D CLOSE TO U7007 8 PCIE_SB_NB_RX0N
C426 0.1U/10V_4 A_RX1P_C AC28
A_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 15 D
8 PCIE_SB_NB_RX1P A_TX1P
C425 0.1U/10V_4 A_RX1N_C AC29 V2 PCIRST#_L R233 33_4 PCIRST# To EC
8 PCIE_SB_NB_RX1N A_TX1N PCIRST# PCIRST# 26,29
C414 0.1U/10V_4 A_RX2P_C AB29
8 PCIE_SB_NB_RX2P A_TX2P
To RS880
C415 0.1U/10V_4 A_RX2N_C AB28
8 PCIE_SB_NB_RX2N A_TX2N
C423 0.1U/10V_4 A_RX3P_C AB26 AA1 C441
8 PCIE_SB_NB_RX3P A_TX3P AD0/GPIO0
8 PCIE_SB_NB_RX3N C424 0.1U/10V_4 A_RX3N_C AB27 AA4 150P/50V_4 D5
A_TX3N AD1/GPIO1 AA3 RB500V-40
PCIE_NB_SB_TX0P AD2/GPIO2 +AVBAT
8 PCIE_NB_SB_TX0P AE24 AB1 1 2 +3VPCU
PCIE_NB_SB_TX0N A_RX0P AD3/GPIO3
8 PCIE_NB_SB_TX0N AE23 AA5
A_RX0N AD4/GPIO4
8 PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
AD25
AD24
A_RX1P AD5/GPIO5
AB2
AB6
20MIL R98 499/F_4 +3VRTC_1 R99 10_4 +3VRTC 1 2
PCI EXPRESS INTERFACES

8 PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P A_RX1N AD6/GPIO6
AC24 AB5
8 PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N A_RX2P AD7/GPIO7
8 PCIE_NB_SB_TX2N
AC25
A_RX2N AD8/GPIO8
AA6
20MIL 20MIL D6
+VCCRTC_2
PCIE_NB_SB_TX3P AB25 AC2 RB500V-40
8 PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N A_RX3P AD9/GPIO9
AB24 AC3 C282
8 PCIE_NB_SB_TX3N A_RX3N AD10/GPIO10
AC4
PCIE_CALRP_SB AD29 AD11/GPIO11
+1.1V_PCIE_VDDR
R67
R68
590/F_4
2.0K/F_4 PCIE_CALRN_SBAD28 PCIE_CALRP AD12/GPIO12
AC1
AD1
1U/10V_4
20MIL
PCIE_CALRN AD13/GPIO13
AD2
C310 0.1U/10V_4 PCIE_TXP2_LAN_C AD14/GPIO14 R86
AA28 AC6
23 PCIE_TXP2_LAN PCIE_TXN2_LAN_C GPP_TX0P AD15/GPIO15 +AVBAT
LAN 23 PCIE_TXN2_LAN
C309 0.1U/10V_4 AA29
GPP_TX0N AD16/GPIO16
AE2
C187 0.1U/10V_4 PCIE_TXP1_WLAN_C Y29 AE1 1K/F_4
26 PCIE_TXP1_WLAN PCIE_TXN1_WLAN_C GPP_TX1P AD17/GPIO17
WLAN 26 PCIE_TXN1_WLAN
C188 0.1U/10V_4 Y28
AF8
20MIL
1
Y26 AE3 G2
+BAT
GPP_TX2P AD19/GPIO19
Y27
W28
AF1
AG1
C467
0.1U/10V_4
20MIL
W29 GPP_TX3P AD21/GPIO21 AF2 *SHORT_ PAD1
2
AE9 AD23
PCIE_RXP2_LAN AD23/GPIO23 AD24 AD23 15
AA22 AD9 CN17
23 PCIE_RXP2_LAN GPP_RX0P AD24/GPIO24 AD24 15 2
LAN PCIE_RXN2_LAN Y21 AC11 AD25 Debug STRAPs
C 23 PCIE_RXN2_LAN PCIE_RXP1_WLAN GPP_RX0N AD25/GPIO25 AD26 AD25 15 1 C
AA25 AF6 RTC CONN
26 PCIE_RXP1_WLAN PCIE_RXN1_WLAN GPP_RX1P AD26/GPIO26 AD27 AD26 15
WLAN 26 PCIE_RXN1_WLAN
AA24
GPP_RX1N AD27/GPIO27
AF4
AD27 15
W23 AF3
GPP_RX2P AD28/GPIO28
V24 AH2
W24
GPP_RX3P AD30/GPIO30
AG2 SMT request CN17 footprint change to
W25 AH3 88266-020L-2P-R-SMT
CBE0#
AA8 All the PCI bus has
PCI INTERFACE
AD5 12/17
CBE1#
AD8 build-in Pull-UP/Down
CBE2#
CBE3#
AA10 resistors
AE8
FRAME#
AB9
SBLINK_CLKP M23 DEVSEL# AJ3
9 SBLINK_CLKP PCIE_RCLKP/NB_LNK_CLKP IRDY#
SBLINK_CLKN P23 AE7
9 SBLINK_CLKN PCIE_RCLKN/NB_LNK_CLKN TRDY# +3V
AC5
NB_REFCLK_P PAR
9 NB_REFCLK_P U29 AF5
NB_REFCLK_N NB_DISP_CLKP STOP#
To RS880M 9 NB_REFCLK_N U28
NB_DISP_CLKN PERR#
AE6 0.1U/10V_4
AE4 SERR# C304
NBHT_REFCLKP SERR# SERR# 29
9 NBHT_REFCLKP T26 AE11 U11
NB_HT_CLKP REQ0#
5
To RS880M 9 NBHT_REFCLKN NBHT_REFCLKN T27 AH5 TC7SH08FU
NB_HT_CLKN REQ1#/GPIO40 A_RST#
AH4 23 LAN_PLTRST# R117 33_4 2
CPUCLKP REQ2#/CLK_REQ8#/GPIO41 SB_GPIO42 A_RST#_R
5 CPUCLKP V21 AC12 26 MINI_PLTRST# R116 33_4 4
CPUCLKN CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42 T33
CPU_CLK 5 CPUCLKN T21
CPU_HT_CLKN GNT0#
AD12 1
SB_GPIO_RST# 12
AJ5
V23 GNT1#/GPO44 AH6
SLT_GFX_CLKP GNT2#/GPO45
Add AND gate to reset all
3
T23 AB12 PCIE devices by AMD recommand
SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AB11 CLKRUN#
CLKRUN# CLKRUN# 29
26 CLK_PCIE_WLAN_0P CLK_PCIE_WLAN_0P L29 AD7 LOCK#
CLK_PCIE_WLAN#_0N GPP_CLK0P LOCK# T47
To WLAN Connector 26 CLK_PCIE_WLAN#_0N L28
GPP_CLK0N
AJ6
B INTE#/GPIO32 B
N29 AG6
GPP_CLK1P INTF#/GPIO33
N28 AG4
GPP_CLK1N INTG#/GPIO34 AJ4 INTG# 24
INTH#/GPIO35
M29
M28 GPP_CLK2P
GPP_CLK2N
CLK_PCIE_LAN LPC_CLK0 15
T25 To STRAPs Page
CLOCK GENERATOR
23 CLK_PCIE_LAN GPP_CLK3P LPC_CLK1 15

To LAN Controller CLK_PCIE_LAN# V25 H24 LPC_CLK0 R274 22_4
23 CLK_PCIE_LAN# GPP_CLK3N LPCCLK0 PCLK_LPC_KB3920 29
H25 LPC_CLK1 R269 22_4
LPCCLK1 PCLK_LPC_DEBUG 26
CLK_PCIE_WWAN_4P L24 J27 LPC_LAD0
26 CLK_PCIE_WWAN_4P GPP_CLK4P LAD0 LPC_LAD0 26,29
To WWAN Connector CLK_PCIE_WWAN#_4N L23 J26 LPC_LAD1 C485 C487
26 CLK_PCIE_WWAN#_4N GPP_CLK4N LAD1 LPC_LAD1 26,29
H29 LPC_LAD2
LPC_LAD2 26,29
LPC
P25 LAD2 H28 LPC_LAD3 5.6P/50V_6 22P/50V_4

GPP_CLK5P LAD3 LPC_LAD3 26,29
M25 G28 LPC_LFRAME#
GPP_CLK5N LFRAME# LDRQ0#_SB LPC_LFRAME# 26,29
J25
LDRQ0# T32
P29 AA18
P28 GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 AB19 LPC_SERIRQ 2/6/2010
GPP_CLK6N SERIRQ/GPIO48 LPC_SERIRQ 29
Change to 10ppm for PV
N26 R96 10K/F_4 +3VS5
GPP_CLK7P
N27
GPP_CLK7N ALLOW_LDTSTOP
G21 C460
ALLOW_LDTSTP/DMA_ACTIVE# CPU_PROCHOT# ALLOW_LDTSTOP 9
T29 H21 18P/50V
GPP_CLK8P PROCHOT# CPU_PWR_GD CPU_PROCHOT# 5
T28 K19 CPU_PWR_GD 5 1 2
GPP_CLK8N LDT_PG
CPU
G22 CPU_LDT_STOP#
LDT_STP# CPU_LDT_STOP# 5,9
J24 CPU_LDT_RST#
LDT_RST# CPU_LDT_RST# 5
3
OSCCLK L25
T31 14M_25M_48M_OSC Y4
C1 RTC_X1 RTC_X1 R245 32.768KHZ
32K_X1 20M_6
25M_X1_1 R243 *0_4/S 25M_X1 L26 C2 RTC_X2 RTC_X2
2
A
R244 1M/F_4 25M_X1 32K_X2 A
Y5
RTC
1 3 D2 RTC_CLK R136 *10K/F_4 +3VS5 1 2

2 4 RTCCLK B2 INTRUDER_ALERT#
INTRUDER_ALERT# T71
C457 25M_X2 L27
25M_X2 VDDBT_RTC_G
B1 +AVBAT RTC_CLK must ready C459 18P/50V
25MHz C458
10P/50V_4 10P/50V_4
refore RSMRST#
SB800 A11
INTRUDER_ALERT# Left not connected (Southbridge
has 50-kohm internal pull-up to VBAT). PROJECT : FP8
SB820 PCIE/LPC/CPU 1A

5 4 3 2 1
5 4 3 2 1
+3V SCL0/SDATA0 is 3V tolerance

AMD datasheet define it
R81 2.2K_4 PCLK_SMB
Clock gen/Robson/TV
tuner
/DDR3/DDR3
thermal/Accelerometer
12
R80 2.2K_4 PDAT_SMB U18D
MEM_GEVEN# J2 A10 CLK_48M_USB
4 MEM_GEVEN# RI# PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC T68
K1
T55 SPI_CS3# RI#/GEVENT22# USB_RCOMP_SB
12/16 BIOS Request for SI T67 D3
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
G19 R85 11.8K/F_4
SUSB# F1
+3VS5 29 SUSB# SLP_S3#
SUSC# H1
29 SUSC# DNBSWON# SLP_S5#
29 DNBSWON# F2
PWR_BTN#
ACPI / WAKE UP EVENTS

SB_PWRGD_IN H5
SB800
USB 1.1 USB MISC

D SUS_STAT# PWR_GOOD D
9 SUS_STAT# G6 J10 T95
SB_TEST0 SUS_STAT# USB_FSD1P/GPIO186
R329 SB800 SB_TEST0,SB_TEST1,SB_TEST2 has internal T66
B3 Part 4 of 5 H11 T96
SB_TEST1 C4 TEST0 USB_FSD1N
*10K/F_4 10K PD. T38 TEST1/TMS
SB_TEST2 F6 H9
T34 MCP_A20GATE TEST2 USB_FSD0P/GPIO185
AD21 J8
29 MCP_A20GATE RCIN# GA20IN/GEVENT0# USB_FSD0N
29 RCIN# AE21
LAN_Cable_detect K2 KBRST#/GEVENT1# B12
LAN_Cable_detect SIO_EXT_SMI# LPC_PME#/GEVENT3# USB_HSD13P
23 LAN_Cable_detect 29 SIO_EXT_SMI# J29 A12
SIO_EXT_SCI# LPC_SMI#/GEVENT23# USB_HSD13N
29 SIO_EXT_SCI# H2
SYS_RST# GEVENT5#
J1 F11
PCIE_WAKE# SYS_RESET#/GEVENT19# USB_HSD12P
23,26 PCIE_WAKE# H6 E11
WAKE#/GEVENT8# USB_HSD12N
12/16 New add for SI F3
IR_RX1/GEVENT20#
C316 CPU_THERMTRIP# J6 E14
5 CPU_THERMTRIP# WD_PWRGD THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P
100P/50V_4 AC19 E12
NB_PWRGD USB_HSD11N
Add SB_GPIO_RST# form RSMRST# G1 J12
29 RSMRST# RSMRST# USB_HSD10P
+3VS5 R311 10K/F_4 SYS_RST# AMD recommand J14
WWAN_CLKREQ#4 USB_HSD10N
AD19
26 WWAN_CLKREQ#4 CLK_REQ4#/SATA_IS0#/GPIO64
23 LAN_CLKREQ# AA16 A13
R79 *0_4 LAN_DISABLE#_SB AB21 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P
B13
23,29 LAN_DISABLE# SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N
+3V R313 *10K/F_4 MCP_A20GATE 11 SB_GPIO_RST# AC18
CLK_REQ0#/SATA_IS3#/GPIO60
26 PCIE_WWAN_DET# AF20 D13
ACCLED_EN SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P T89
By AMD confirm +3VS5 25 ACCLED_EN AE19
SATA_IS5#/FANIN3/GPIO59 USB_HSD8N
C13
T90
SCL1/SDATA1 is 3V/S5 tolerance ACZ_SPKR AF19
20 ACZ_SPKR PCLK_SMB SPKR/GPIO66
AMD datasheet define it AD22 G12
+1.8V 16,19,24 PCLK_SMB SCL0/GPIO43 USB_HSD7P USBP7+ 25
USB 2.0
PDAT_SMB AE22 G14 Card reader
16,19,24 PDAT_SMB SDA0/GPIO47 USB_HSD7N USBP7- 25
R139 10K/F_4SB_SMBCLK1 SB_SMBCLK1 F5
R137 10K/F_4SB_SMBDATA1 SB_SMBDATA1 SCL1/GPIO227
F4 G16 USBP6+ 28
WLAN_CLKREQ#2 SDA1/GPIO228 USB_HSD6P
26 WLAN_CLKREQ#2
AH21
CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N
G18
USBP6- 28 BLUETOOTH
+3V R91 *10K/F_4 LX_VGA_REQ_R AB18
C CLK_REQ1#/FANOUT4/GPIO61 C
E1 D16
GPIO
IR_LED#/LLB#/GPIO184 USB_HSD5P USBP5+ 26
R92 26 WWAN_OFF# AJ21
SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD5N
C16
USBP5- 26 WLAN Min-Card
300_4 H4
DDR3_RST#/GEVENT7#
D5 B14 USBP4+ 26
9 NB_PWRGD_IN WD_PWRGD GBE_LED0/GPIO183 USB_HSD4P
R93 *0_4/S D7
GBE_LED1/GEVENT9# USB_HSD4N
A14
USBP4- 26 WWAN CARD
G5
GBE_LED2/GEVENT10#
K3 E18 USBP3+ 21
GBE_STAT0/GEVENT11# USB_HSD3P
AA20
CLK_REQG#/GPIO65/OSCIN USB_HSD3N
E16 USBP3- 21 WEBCAM
J16
USB_HSD2P USBP2+ 25
H3 J18 USBP2- 25
BLINK/USB_OC7#/GEVENT18# USB_HSD2N
D1
USB_OC6#/IR_TX1/GEVENT6# Right Side Conn.
+3VS5 R140 *10K/F_4 E4 B17
+3VS5 USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P USBP1+ 25
USB OC
D4 A17 USBP1- 25
SB_JTAG_TDO E8 USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N
R135 2.2K_4 DNBSWON# SB_JTAG_TCK USB_OC3#/AC_PRES/TDO/GEVENT15#
F7 A16 USBP0+ 27
SB_JTAG_TDI USB_OC2#/TCK/GEVENT14# USB_HSD0P
+3V
E7
USB_OC1#/TDI/GEVENT13# USB_HSD0N
B16 USBP0- 27 Left Side Conn.
SB_JTAG_RST# F8
USB_OC0#/TRST#/GEVENT12#
SCL2/SDATA2 is 3V/S5 tolerance
R138 4.7K_4 SUS_STAT# AMD datasheet define it
C314 10P/50V_4
R131 33_4 ACZ_BCLK M3 D25 SB_SCLK2 R270 10K/F_4
20 HDA_BITCLK AZ_BITCLK SCL2/GPIO193 +3VS5
ACZ_SDOUT N1 F23 SB_SDATA2 R83 10K/F_4
15 ACZ_SDOUT ACZ_SDATA_IN AZ_SDOUT SDA2/GPIO194 SB_SCLK3
R130 33_4 L2 B26 R248 10K/F_4 +3VS5
20 HDA_SDATA_OUT AZ_SDIN0/GPIO167 SCL3_LV/GPIO195 SB_SDATA3
To Azalia
M2 E26 R246 10K/F_4
HD AUDIO
C315 *10P/50V_4 AZ_SDIN1/GPIO168 SDA3_LV/GPIO196
M1 F25
HD audio M4 AZ_SDIN2/GPIO169 EC_PWM0/EC_TIMER0/GPIO197 E22
20 ACZ_SDATA_IN AZ_SDIN3/GPIO170 EC_PWM1/EC_TIMER1/GPIO198
interface R127 33_4 ACZ_SYNC N2 F22 SB_GPIO199 R84 10K/F_4 +3VS5
20 HDA_SYNC ACZ_RST# AZ_SYNC EC_PWM2/EC_TIMER2/GPIO199 SB_GPIO200 R271
is 3.3S5 20 HDA_RESET# R128 33_4 P2 E21 2.2K_4
AZ_RST# EC_PWM3/EC_TIMER3/GPIO200
B voltage B
KSI_0/GPIO201
G24 GPIO200 GPIO199
R315 10K/F_4 GBE_COL T1 G25
R316 10K/F_4 GBE_CRS T4 GBE_COL KSI_1/GPIO202 E28
GBE_CRS KSI_2/GPIO203
L6 E29
GBE_MDIO GBE_MDCK KSI_3/GPIO204
+3VS5 R314 10K/F_4 L5
GBE_MDIO KSI_4/GPIO205
D29 H,H = Reserved
T9 D28
U1 GBE_RXCLK KSI_5/GPIO206 C29
SB_PWRGD_IN GBE_RXD3 KSI_6/GPIO207 H,L = SPI ROM
+3VS5 R141 10K/F_4 U3 C28
GBE_RXD2 KSI_7/GPIO208
T2
GBE_RXD1
GBE LAN
U2 B28
GBE_RXD0 KSO_0/GPIO209
C317 T5
GBE_RXCTL/RXDV KSO_1/GPIO210
A27 L,H = LPC ROM (Default)
GBE_RXERR
EMBEDDED CTRL
*2.2U/6.3V_6 R317 10K/F_4 V5 B27 L,L = FWH ROM
P5 GBE_RXERR KSO_2/GPIO211 D26
GBE_TXCLK KSO_3/GPIO212
M5 A26
P9 GBE_TXD3 KSO_4/GPIO213 C26
GBE_TXD2 KSO_5/GPIO214
33 CPU_VRM8380_PG 2 T7 A24
P7 GBE_TXD1 KSO_6/GPIO215 B25
GBE_TXD0 KSO_7/GPIO216
3 12/16 AMD Datasheet definr it for SI M7
GBE_TXCTL/TXEN KSO_8/GPIO217
A25
P4 D24
GBE_PHY_PD KSO_9/GPIO218 SB_SCLK2 R320 *2.2K_4
1 M9 B24
3,29 ECPWROK GBE_PHY_INTR GBE_PHY_RST# KSO_10/GPIO219 SB_SDATA2
+3VS5 R318 10K/F_4 V7 C24 R319 *2.2K_4
GBE_PHY_INTR KSO_11/GPIO220
D12 NB/SB POWER GOOD CIRCUIT KSO_12/GPIO221
B23 SB_SCLK3 R322 *2.2K_4
BAT54A SB_GPIO187 E23 A23 SB_SDATA3 R321 *2.2K_4
T70 SB_GPIO188 PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222 SB_SMBCLK1
E24 D22 R324 *2.2K_4
T69 SB_GPIO166 PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223 SB_SMBDATA1
EMBEDDED CTRL
F21 C22 R323 *2.2K_4
T79 SB_GPIO160 SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224
+3V 3,5,9,10,11,13,14,15,16,19,20,21,22,23,24,25,26,27,28,33,35 T78 G29 A22
FC_RST#/GPO160 KSO_16/GPIO225 B22
+3VS5 11,13,14,15,29,35 KSO_17/GPIO226
D27
PS2KB_DAT/GPIO189 12/16 reserve Pull down R for SI
F28
PS2KB_CLK/GPIO190
F29
A +3VS5 E27 PS2M_DAT/GPIO191 A
2010/2/11 RF For PV PS2M_CLK/GPIO192
CN18
C474 68p/50V_4
SB800 A11
1 SB_JTAG_TCK
2 SB_JTAG_TDO
3 SB_JTAG_TDI
SB JTAG 4
5
SB_TEST1 Quanta Computer Inc.
6
7
SB_JTAG_RST#
PROJECT : FP8
8 Size Docum ent Num ber Rev
*S/W JTAG DEBUG SB820 ACPI/GPIO/USB 1A

5 4 3 2 1
5 4 3 2 1
SATA PORT 0,1,2,3

can support AHCI
mode
PLACE SATA AC COUPLING
CAPS CLOSE TO SB820 U18B
13
+1.1V_AVDD_SATA 14
+3V 3,5,9,10,11,12,14,15,16,19,20,21,22,23,24,25,26,27,28,33,35
C428 0.01U/16V_4 SATA_TXP0_C AH9
SB800 AH28
+3VS5 11,12,14,15,29,35
24 SATA_TXP0 SATA_TXN0_C SATA_TX0P FC_CLK
24 SATA_TXN0
C427 0.01U/16V_4 AJ9 Part 2 of 5 AG28
SATA_TX0N FC_FBCLKOUT
SATA HDD C429 0.01U/16V_4 SATA_RXN0_C AJ8
FC_FBCLKIN
AF26
24 SATA_RXN0 SATA_RXP0_C SATA_RX0N
24 SATA_RXP0 C430 0.01U/16V_4 AH8 AF28
SATA_RX0P FC_OE#/GPIOD145
AG29
D FC_AVD#/GPIOD146 D
AH10 AG26
SATA_TX1P FC_WE#/GPIOD148
AJ10 AF27
SATA_TX1N FC_CE1#/GPIOD149 AE29
FC_CE2#/GPIOD150
AG10 AF29
AF10 SATA_RX1N FC_INT1/GPIOD144 AH27
SATA_RX1P FC_INT2/GPIOD147
AG12 AJ27
SATA_TX2P FC_ADQ0/GPIOD128
AF12 AJ26
SATA_TX2N FC_ADQ1/GPIOD129
AH25
FC_ADQ2/GPIOD130
AJ12 AH24
SATA_RX2N FC_ADQ3/GPIOD131
AH12 AG23
SATA_RX2P FC_ADQ4/GPIOD132
AH23
AH14 FC_ADQ5/GPIOD133 AJ22
AJ14 AG21
SATA_TX3N FC_ADQ7/GPIOD135 AF21
FC_ADQ8/GPIOD136
AG14 AH22
AF14 SATA_RX3N FC_ADQ9/GPIOD137 AJ23
FLASH
SATA_RX3P FC_ADQ10/GPIOD138
AF23
FC_ADQ11/GPIOD139
AG17 AJ24
AF17 AJ25
SATA_TX4N FC_ADQ13/GPIOD141
AG25
FC_ADQ14/GPIOD142
XTLVDD_SATA-- SATA AJ17 AH26
AH17 SATA_RX4N FC_ADQ15/GPIOD143
crystal power SATA_RX4P
SERIAL ATA
AJ18
PLVDD_SATA-- SATA_TX5P RF_OFF#
AH18 W5 RF_OFF# 26
SATA_TX5N FANOUT0/GPIO52 W6 BT_OFF#
SATA PLL FANOUT1/GPIO53 BT_OFF# 28
PLACE SATA_CAL POWER AH19
SATA_RX5N FANOUT2/GPIO54
Y9
AJ19
RES VERY CLOSE SATA_RX5P
W7
C FANIN0/GPIO56 C
TO BALL OF SB820 FANIN1/GPIO57
V9
R115 1K/F_4 SATA_CALRP AB14 W8
R94 931/F_4 SATA_CALRN AA14 SATA_CALRP FANIN2/GPIO58
+1.1V_AVDD_SATA SATA_CALRN
B6
TEMPIN0/GPIO171 CPU_BOARD_ID0 R259
A6 +3VS5 R272 *10K/F_4 10K/F_4
SATA_LED# TEMPIN1/GPIO172
25 SATA_LED# AD11 A5
SATA_ACT#/GPIO67 TEMPIN2/GPIO173 TALERT#
B5 R266 10K/F_4 +3VS5
R113 10K/F_4 TEMPIN3/TALERT#/GPIO174 R268 *10K/F_4 CPU_BOARD_ID1 R258 10K/F_4
+3V C7 +3VS5
TEMP_COMM
A3 CPU_BOARD_ID0
C431 SATA_X1 VIN0/GPIO175 CPU_BOARD_ID1 CPU_BOARD_ID2 R257
*22P/50V_4 AD16 B4 R267 *10K/F_4 10K/F_4
HW MONITOR
SATA_X1 VIN1/GPIO176 +3VS5
A4 CPU_BOARD_ID2
VIN2/GPIO177 C5 BOARD_ID0
VIN3/GPIO178 BOARD_ID1
Y1 R221 A7
VIN4/GPIO179 B7 BOARD_ID2
*25MHZ VIN5/GPIO180
*1M/F_4 B8 BOARD_ID3 +3VS5 R265 *10K/F_4 BOARD_ID0 R256 10K/F_4
C432 *22P/50V_4 SATA_X2 AC16 VIN6/GBE_STAT3/GPIO181 A8 BOARD_ID4
SATA_X2 VIN7/GBE_LED3/GPIO182
SI R264 10K/F_4 BOARD_ID1 R255 *10K/F_4
Remove Y6 for AMD recommand
J5 G27 R263 *10K/F_4 BOARD_ID2 R254 10K/F_4
E2 SPI_DI/GPIO164 NC1 Y2
SPI_DO/GPIO163 NC2
SPI ROM
K4
K9 SPI_CLK/GPIO162 R261 *10K/F_4 BOARD_ID3 R252 10K/F_4
ROM_RST# SPI_CS1#/GPIO165
T61 G2
ROM_RST#/GPIO161
R262 *10K/F_4 BOARD_ID4 R253 10K/F_4
SB800 A11
B B
CPU_BOARD_ID_[2:0]
BOARD ID Configuration
reserve
BOARD ID_[2:0] 0 0 0
0 0 0
reserve 0 0 1
No on board MEM
0 0 1
reserve 0 1 0
Hynix 1333
reserve 0 1 1
Samsung 1333 0 1 0
0 1 1
reserve 1 0 0
Micron 1333
reserve 1 0 0
reserve 1 0 1 Samsung 1333 128Mx8 Micron 1333 128Mx8 Hynix 1333 128Mx8
reserve 1 1 0 BOARD ID_[4:3] K4B1G0846E-HCH9 MT41J128M8JP-15E H5TQ1G83BFR-H9C
A 1 1 1 573005-941 573005-641 573005-341 A
reserve FP8 1.0 00 QCI:AKD5LZET501 QCI: AKD5LZSTL06 QCI: AKD5LZQTW00
FP8 1.1 01 TOP:AKD5LZET502 TOP:AKD5LZSTL05 TOP: AKD5LZQTW01
PROJECT : FP8
SB820 SATA/IDE/SPI/HWM 1A

5 4 3 2 1
5 4 3 2 1
PLACE ALL THE DECOUPLING CAPS ON

14
THIS SHEET CLOSE TO SB AS POSSIBLE. VDD-- S/B CORE power
+3.3V_SB_R
U18C +1.1V_VCC_SB_R
VDDQ--3.3V I/O power 131mA SB800 Part 3 of 5 510mA
+3V R125 *0_8/S AH1 N13 R95 *0_8/S +1.1V U18E
VDDIO_33_PCIGP_1 VDDCR_11_1
V6 R15
D
Y19
N17
SB800 D
CORE S0
C311 C313 C312 C273 AE5 U13 C276 C295 C298 C274 C297 Y14 AJ2
VDDIO_33_PCIGP_4 VDDCR_11_4 VSSIO_SATA_1 VSS_1
22U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 AC21 U17 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 Y16 A28
AA2 VDDIO_33_PCIGP_5 VDDCR_11_5 V12 AB16 VSSIO_SATA_2 VSS_2 A2
PCI/GPIO I/O
AB4 V18 AC14 E5
AC8 VDDIO_33_PCIGP_7 VDDCR_11_7 W12 CKVDD_1.1V-- AE12 VSSIO_SATA_4 VSS_4 D23
AA7 W18 Internal clock AE14 E25
AA9 VDDIO_33_PCIGP_9 VDDCR_11_9 +1.1V_CKVDD AF9 VSSIO_SATA_6 VSS_6 E6
VDDIO_33_PCIGP_10 Generator I/O VSSIO_SATA_7 VSS_7
AF7
VDDIO_33_PCIGP_11 TBDmA power AF11
VSSIO_SATA_8 VSS_8
F24
1.8V : FLASH MEMORY MODE(DEFAULT) AA19
VDDIO_33_PCIGP_12 VDDAN_11_CLK_1
K28 BLM18PG181SN1D(180,1.5A)_6 AF13
VSSIO_SATA_9 VSS_9
N15
VDD33_18--3.3V IDE I/O power K29 L43 +1.1V AF16 R13
3.3V: IDE MODE 1.8V flash memory I/O power 71mA
VDDAN_11_CLK_2
J28 AG8
VSSIO_SATA_10 VSS_10
R17
VDDIO_18_FC VDDAN_11_CLK_3 VSSIO_SATA_11 VSS_11
R82 *0_6/S K26 AH7 T10
VDDAN_11_CLK_4 J21 C463 C252 C253 C461 C199 AH11 VSSIO_SATA_12 VSS_12 P10
CLKGEN I/O
VDDAN_11_CLK_5 VSSIO_SATA_13 VSS_13
AMD recommand remove +1.8v AF22
VDDIO_18_FC_1 VDDAN_11_CLK_6
J20 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 22U/6.3V_8 AH13
V11
FLASH I/O
AE25 K21 AH16 U15
VDDIO_18_FC_2 VDDAN_11_CLK_7 VSSIO_SATA_15 VSS_15
AF24 J22 AJ7 M18
AC22 VDDIO_18_FC_3 VDDAN_11_CLK_8 AJ11 VSSIO_SATA_16 VSS_16 V19
VDDIO_18_FC_4 VSSIO_SATA_17 VSS_17
AJ13 M11
V1 AJ16 L12
L17 VDDRF_GBE_S VSSIO_SATA_19 VSS_19
+3V
POWER VDDIO_33_GBE_S
M10 A9
VSSIO_USB_1
VSS_20
VSS_21
L18
J7
BLM18PG181SN1D(180,1.5A)_6 43mA B10
VSSIO_USB_2 VSS_22
P3
C248 C249 VDDPL_3.3V_PCIE AE28 K11 V4
VDDPL_33_PCIE VSSIO_USB_3 VSS_23
GBE LAN
2.2U/6.3V_4 1U/10V_4 B9 AD6
D10 VSSIO_USB_4 VSS_24 AD4
+1.1V_PCIE_VDDR VSSIO_USB_5 VSS_25
U26 L7 D12 AB7
PCI EXPRESS
V22 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 L9 D14 VSSIO_USB_6 VSS_26 AC9
VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2 VSSIO_USB_7 VSS_27
PCIE_VDDR--PCIE I/O power 600mA V26
VDDAN_11_PCIE_3
D17
VSSIO_USB_8 VSS_28
V8
+1.1V L41 V27 E9 W9
VDDAN_11_PCIE_4 VSSIO_USB_9 VSS_29
V28 M6 F9 W10
C VDDAN_11_PCIE_5 VDDIO_GBE_S_1 VSSIO_USB_10 VSS_30 C
BLM18PG181SN1D(180,1.5A)_6 V29 P8 F12 AJ28
VDDAN_11_PCIE_6 VDDIO_GBE_S_2 VSSIO_USB_11 VSS_31
C198 C450 C275 C250 C251 W22 F14 B29
10U/6.3V_8 10U/6.3V_8 1U/10V_4 0.1U/10V_4 0.1U/10V_4 W26 VDDAN_11_PCIE_7 F16 VSSIO_USB_12 VSS_32 U4
VDDAN_11_PCIE_8 VSSIO_USB_13 VSS_33
C9 Y18
VSSIO_USB_14 VSS_34
G11 Y10
+3VALW_R VSSIO_USB_15 VSS_35
93mA S5_3.3--3.3v standby power F18 Y12
GROUND
VDDPL_3.3V_SATA VSSIO_USB_16 VSS_36
+3V L22 AD14
VDDPL_33_SATA 32mA D9
VSSIO_USB_17 VSS_37
Y11
A21 R129 *0_6/S +3VS5 H12 AA11
VDDIO_33_S_1 VSSIO_USB_18 VSS_38
BLM18PG181SN1D(180,1.5A)_6 AJ20 D21 H14 AA12
C270 C294 VDDAN_11_SATA_1 VDDIO_33_S_2 VSSIO_USB_19 VSS_39
AF18 B21 H16 G4
VDDAN_11_SATA_4 VDDIO_33_S_3 VSSIO_USB_20 VSS_40
SERIAL ATA
2.2U/6.3V_4 *0.1U/10V_4 AH20 K10 C256 C299 C296 H18 J4
3.3V_S5 I/O
+1.1V_AVDD_SATA AG19 L10 *0.1U/10V_4 2.2U/6.3V_6 2.2U/6.3V_6 J11 G8
AE18 VDDAN_11_SATA_3 VDDIO_33_S_5 J9 J19 VSSIO_USB_22 VSS_42 G9
AVDD_SATA--SATA phy power 567mA AD18
VDDAN_11_SATA_6 VDDIO_33_S_7
T6 K12
VSSIO_USB_24 VSS_44
M12
+1.1V L21 AE16 T8 K14 AF25
K16 H7
BLM18PG181SN1D(180,1.5A)_6 S5_1.1V--1.1V standby power K18 VSSIO_USB_26 VSS_46 AH29
VSSIO_USB_27 VSS_47
C293 C269 C268 C272 C271 113mA H19
VSSIO_USB_28 VSS_48
V10
VDDCR_1.1V
CORE S5
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 F26 R69 *0_6/S +1.1VS5 P6
VDDCR_11_S_1 VSS_49
A18 G26 N4
VDDAN_33_USB_S_1 VDDCR_11_S_2 VSS_50
A19
VDDAN_33_USB_S_2 TBD=>X mA Y4
EFUSE VSS_51
L4
For support USB A20 M8 +VDDIO_AZ C254 C200 L8
AVDDTX--USB Phy +3V_AVDD_USB B18 VDDAN_33_USB_S_3 VDDIO_AZ_S 1U/10V_4 1U/10V_4 D8 VSS_52
wakeup-->3V_S5 VDDAN_33_USB_S_4 VSSAN_HWM
Analog I/O power B19 A11 VDDCR_1.1V_USB
VDDAN_33_USB_S_5 VDDCR_11_USB_S_1
658mA B20
VDDAN_33_USB_S_6 VDDCR_11_USB_S_2
B11 M19
VSSXL VSSPL_SYS
M20
+3VS5 L45 C18
VDDAN_33_USB_S_7 USB I/O
C20
VDDAN_33_USB_S_8 197mA BLM18PG181SN1D(180,1.5A)_6
BLM18PG181SN1D(180,1.5A)_6 D18
VDDAN_33_USB_S_9 VDDPL_33_SYS
M21 +VDDPL_3.3V 47mA L44 +1.1VS5 P21
VSSIO_PCIECLK_1 VSSIO_PCIECLK_14
H23
C470 C473 C466 C465 D19 P20 H26
VDDAN_33_USB_S_10 VSSIO_PCIECLK_2 VSSIO_PCIECLK_15
B
10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 D20
VDDAN_33_USB_S_11 VDDPL_11_SYS_S
L22 +VDDPL_1.1V 62mA M22
AA21
B
E19 C471 C469 C468 M24 AA23
PLL
VDDAN_33_USB_S_12 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17

VDDPL_33_USB_S
F19 +VDDPL_3.3V_USB 17mA 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 M26
AB23
P22 AD23
TBDmA C11
VDDAN_11_USB_S_1 VDDAN_33_HWM_S
D6 +VDDAN_3.3VHWM 5mA P24
AA26
L24 VDDAN_1.1V_USB D11 P26 AC26
+1.1VS5 VDDAN_11_USB_S_2 VSSIO_PCIECLK_8 VSSIO_PCIECLK_21
L20 VDDXL_3.3V T20 Y20
VDDXL_33_S VSSIO_PCIECLK_9 VSSIO_PCIECLK_22
BLM18PG181SN1D(180,1.5A)_6 32mA BLM18PG181SN1D(180,1.5A)_6 T22
W21
C302 C300 L25 +3V T24 W20
2.2U/6.3V_4 0.1U/10V_4 SB800 A11 V20 AE26
C278 VSSIO_PCIECLK_12 VSSIO_PCIECLK_25
J23 L21
C279 K20
VSSIO_PCIECLK_27
68p/50V_4 2.2U/6.3V_6
Part 5 of 5
SB800 A11
+3V +VDDPL_3.3V +1.1V +VDDPL_1.1V
L23 L18
+3VS5 +VDDIO_AZ BLM18PG181SN1D(180,1.5A)_6 BLM18PG181SN1D(180,1.5A)_6
+3V 3,5,9,10,11,12,13,15,16,19,20,21,22,23,24,25,26,27,28,33,35
+1.1V 6,7,8,9,10,22,31
C301 C277 C257 C255
+3VS5 11,12,13,15,29,35
R133 *0_4/S 2.2U/6.3V_6 *0.1U/10V_4 2.2U/6.3V_6 *0.1U/10V_4
+1.1VS5 31
A
C318 2/8 for PV A
2.2U/6.3V_6
+3VS5 +VDDAN_3.3VHWM +3VS5 +VDDPL_3.3V_USB
R125,R82,R133,L27,R97,R69,R129,R95
L27 *0_6/S R97 *0_6/S Footprint change to short pad
C281 C280 Quanta Computer Inc.

C303 2.2U/6.3V_6 0.1U/10V_4
0.1U/10V_4 PROJECT : FP8
SB820 PWR 1A

5 4 3 2 1
5 4 3 2 1
OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.
intermal have pull
Hi 10K , confirm AMD
ward this pull Hi
+VDDIO_AZ 14
15
+3V 3,5,9,10,11,12,13,14,16,19,20,21,22,23,24,25,26,27,28,33,35
not need +3VS5 11,12,13,14,29,35
REQUIRED STRAPS
D D
+3VS5
+VDDIO_AZ +3V
R247
R225
10K/F_4 DEBUG STRAPS
R134 10K/F_4
*10K/F_4
SB820 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
11 LPC_CLK1
12 ACZ_SDOUT 11 PCI_CLK_TPM 11 PCI_CLK2 11 PCI_CLK3 11 PCI_CLK4 11 AD27
11 LPC_CLK0 11 AD26
11 AD25
11 AD24
R232 R223 R126 11 AD23
R132 R273
10K/F_4 10K/F_4 10K/F_4 10K/F_4
10K/F_4 Use 2.2K PD.
R219 R217 R114 R218 R216
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4
REQUIRED
STRAPS
AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO200 GPIO199 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
C C
PULL LOW POWER ALLOW Watchdog USE non_Fusion EC CLKGEN PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
MODE PCIE Gen2 Timer DEBUG CLOCK MODE ENABLED ENABLED H,H = Reserved PLL AUTORUN PLL PCIE STRAPS MEM BOOT
HIGH HIGH
Enabled STRAP
DEFAULT DEFAULT DEFAULT
H,L = SPI ROM DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
PULL PERFORMANCE FORCE Watchdog IGNORE FUSION EC CLKGEN L,H = LPC ROM (Default) PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI
MODE PCIE Gen1 Timer DEBUG CLOCK MODE DISABLED DISABLED L,L = FWH ROM PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
LOW LOW
Disabled STRAP
DEFAULT DEFAULT DEFAULT DEFAULT
B B
A A

PROJECT : FP8
SB820 PWRGD/STRAPS 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
16
JDIM1A DDR_B_D[0..63] 4
+1.5VSUS
4 DDR_B_MA[0..15] DDR_B_MA0 DDR_B_D0
98 5
DDR_B_MA1 97 A0 DQ0 7 DDR_B_D1 JDIM1B
DDR_B_MA2 A1 DQ1 DDR_B_D7
96 15 75 44
DDR_B_MA3 A2 DQ2 DDR_B_D3 VDD1 VSS16
95 17 76 48
92 4 81 49
A DDR_B_MA5 A4 DQ4 DDR_B_D5 VDD3 VSS18 A
91 6 82 54
90 16 87 55
DDR_B_MA7 86 A6 DQ6 18 DDR_B_D2 88 VDD5 VSS20 60
89 21 93 61
DDR_B_MA9 85 A8 DQ8 23 DDR_B_D9 94 VDD7 VSS22 65
107 33 99 66
DDR_B_MA11 84 A10/AP DQ10 35 DDR_B_D11 100 VDD9 VSS24 71
83 22 105 72
DDR_B_MA13 A12/BC# DQ12 DDR_B_D12 VDD11 VSS26
119 24 106 127
A13 DQ13 VDD12 VSS27
PC2100 DDR3 SDRAM SO-DIMM

DDR_B_MA14 80 34 DDR_B_D10 111 128
78 36 112 133
A15 DQ15 DDR_B_D20 VDD14 VSS29
39 117 134
4 DDR_B_BS[0..2] DDR_B_BS0 DQ16 DDR_B_D21 VDD15 VSS30
PC2100 DDR3 SDRAM SO-DIMM

109 41 118 138
DDR_B_BS1 BA0 DQ17 DDR_B_D22 VDD16 VSS31
108 51 123 139
DDR_B_BS2 79 BA1 DQ18 53 DDR_B_D23 124 VDD17 VSS32 144
DDR_CS0_DIMMB# BA2 DQ19 DDR_B_D17 VDD18 VSS33
114 40 145
4 DDR_CS0_DIMMB# DDR_CS1_DIMMB# 121 S0# DQ20 42 DDR_B_D16 199 VSS34 150
4 DDR_CS1_DIMMB# S1# DQ21 +3V VDDSPD VSS35
DDR_B_CLK_0 101 50 DDR_B_D18 151
4 DDR_B_CLK_0 DDR_B_CLK_0# CK0 DQ22 DDR_B_D19 VSS36
103 52 77 155
4 DDR_B_CLK_0# DDR_B_CLK_1 CK0# DQ23 DDR_B_D24 NC1 VSS37
102 57 122 156
4 DDR_B_CLK_1 DDR_B_CLK_1# CK1 DQ24 DDR_B_D29 NC2 VSS38
104 59 125 161
4 DDR_B_CLK_1# DDR_CKE0_DIMMB CK1# DQ25 DDR_B_D27 NCTEST VSS39
73 67 162
4 DDR_CKE0_DIMMB DDR_CKE1_DIMMB 74 CKE0 DQ26 69 DDR_B_D26 R1 *0_4/S MEM_1_HOT#198 VSS40 167
4 DDR_CKE1_DIMMB CKE1 DQ27 4 MEM_MB_HOT# EVENT# VSS41
DDR_B_CAS# 115 56 DDR_B_D28 30 168
4 DDR_B_CAS# DDR_B_RAS# CAS# DQ28 DDR_B_D25 4 MEM_MB_RESET# RESET# VSS42
110 58 172
4 DDR_B_RAS# DDR_B_WE# RAS# DQ29 DDR_B_D31 VSS43
113 68 173
4R6
DDR_B_WE#10K/F_4 DIMM0_SA0 197 WE# DQ30 70 DDR_B_D30 +DDR_VREF_DIMM 1 VSS44 178
+3V SA0 DQ31 VREF_DQ VSS45
R5 10K/F_4 DIMM0_SA1 201 129 DDR_B_D36 17 +DDR_VREF_DIMM 126 179
PCLK_SMB SA1 DQ32 DDR_B_D37 VREF_CA VSS46
202 131 184
12,19,24 PCLK_SMB SCL DQ33 VSS47
PDAT_SMB 200 141 DDR_B_D39 185
B 12,19,24 PDAT_SMB SDA DQ34 DDR_B_D34 VSS48 B
143 C201 2 189
DDR_ODT0_DIMMB DQ35 DDR_B_D32 VSS1 VSS49
116 130 3 190
4 DDR_ODT0_DIMMB DDR_ODT1_DIMMB 120 ODT0 DQ36 132 DDR_B_D33 .1U/10V_4 8 VSS2 VSS50 195
4 DDR_ODT1_DIMMB ODT1 DQ37 DDR_B_D38 VSS3 VSS51
140 9 196
(204P)
4 DDR_B_DM[0..7] DDR_B_DM0 DQ38 DDR_B_D35 VSS4 VSS52
11 142 13
DDR_B_DM1 DM0 DQ39 DDR_B_D41 VSS5
28 147 14
46 149 19
63 157 20
(204P)
136 159 25
153 146 26 203 +0.75V_DDR_VTT
DDR_B_DM6 DM5 DQ44 DDR_B_D40 VSS10 VTT1
170 148 31 204
DDR_B_DM7 DM6 DQ45 DDR_B_D46 VSS11 VTT2
187 158 32
DM7 DQ46 160 DDR_B_D47 37 VSS12 C22 C486 C489
4 DDR_B_DQS[7:0] DDR_B_DQS0 DQ47 DDR_B_D48 VSS13
12 163 38
DDR_B_DQS1 29 DQS0 DQ48 165 DDR_B_D49 43 VSS14 10U/6.3V_6/S 10U/6.3V_6/S
GND
GND
DDR_B_DQS2 DQS1 DQ49 DDR_B_D54 VSS15 .1U/10V_4
47 175
DDR_B_DQS3 64 DQS2 DQ50 177 DDR_B_D50
DDR_B_DQS4 DQS3 DQ51 DDR_B_D53
137 164 DDR3-DIMM0
205
206
154 166
171 174
4 DDR_B_DQS#[7:0] 188 176
DDR_B_DQS#0 DQS7 DQ55 DDR_B_D60
10 181
DDR_B_DQS#1 27 DQS#0 DQ56 183 DDR_B_D61
DDR_B_DQS#2 DQS#1 DQ57 DDR_B_D63
45 191
135 180
169 192
186 194
DQS#7 DQ63
C C
BUS1_A2 DDR3-DIMM0
SM_MEM BUS ADDRESS

SO-DIMM0 1010 000
SO-DIMM1 1010 001
+1.5VSUS
+1.5VSUS
C480 C85 C63 C484 C481
.1U/10V_4 .1U/10V_4 .1U/10V_4 C475 C87 C476 C51 C483 C86 C482
.1U/10V_4 .1U/10V_4
10U/6.3V_6/S 10U/6.3V_6/S 2.2U/6.3V_6 1U/6.3V_4 1U/6.3V_4
2.2U/6.3V_6 1U/6.3V_4
+1.5VSUS +1.5VSUS
D D
C478 C61 C62 C477 C479 C108 C47 C53 C52
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4

.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4

PROJECT : FP8
1A
DDR2 SO-DIMM(200P)
1 2 3 4 5 6 7 8
5 4 3 2 1
+1.5VSUS +1.5VSUS
17
DDR_A_WE#
M1
G2
G8
M9
M1
G2
G8
M9
C1
E2
B9
E9
K1
A2
D7
A9
K9
H1
A3
N7
H9
C1
E2
B9
E9
K1
A2
D7
A9
K9
H1
A3
N7
H9
F1
F9
F1
F9
J7
J7
4,18,19 DDR_A_WE# DDR_A_RAS#
4,18,19 DDR_A_RAS# DDR_A_CAS#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
4,18,19 DDR_A_CAS#
DDR_A_MA0 K3 DDR_A_MA0 K3
D DDR_CS0_DIMMA# DDR_A_MA1 A0 DDR_A_D6 DDR_A_MA1 A0 DDR_A_D19 D
L7 B3 L7 B3
4,18,19 DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_A_MA2 A1 DQ0 DDR_A_D1 DDR_A_MA2 A1 DQ0 DDR_A_D20
L3 C7 L3 C7
4,19 DDR_CS1_DIMMA# DDR_A_MA3 K2 A2 DQ1 C2 DDR_A_D7 DDR_A_MA3 K2 A2 DQ1 C2 DDR_A_D17
DDR_A_MA4 A3 DQ2 DDR_A_D5 DDR_A_MA4 A3 DQ2 DDR_A_D18
L8 C8 L8 C8
DDR_ODT0_DIMMA DDR_A_MA5 L2 A4 DQ3 E3 DDR_A_D3 DDR_A_MA5 L2 A4 DQ3 E3 DDR_A_D23
4,18,19 DDR_ODT0_DIMMA DDR_ODT1_DIMMA DDR_A_MA6 A5 NF,DQ4 DDR_A_D4 DDR_A_MA6 A5 NF,DQ4 DDR_A_D16
M8 E8 M8 E8
4,19 DDR_ODT1_DIMMA DDR_A_MA7 M2 A6 NF,DQ5 D2 DDR_A_D2 DDR_A_MA7 M2 A6 NF,DQ5 D2 DDR_A_D22
DDR_A_CLK_0 DDR_A_MA8 A7 NF,DQ6 DDR_A_D0 DDR_A_MA8 A7 NF,DQ6 DDR_A_D21
N8 E7 N8 E7
4,18,19 DDR_A_CLK_0 DDR_A_CLK_0# DDR_A_MA9 A8 NF,DQ7 DDR_A_MA9 A8 NF,DQ7
M3 M3
4,18,19 DDR_A_CLK_0# DDR_A_MA10 A9 DDR_A_MA10 A9
H7 H7
DDR_A_MA11 A10/AP DDR_A_DQS0 DDR_A_MA11 A10/AP DDR_A_DQS2
M7 C3 M7 C3
DDR_CKE0_DIMMA DDR_A_MA12 A11 DQS DDR_A_DQS#0 DDR_A_MA12 A11 DQS DDR_A_DQS#2
K7 D3 K7 D3
4,18,19 DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_A_MA13 A12/BC# DQS# DDR_A_MA13 A12/BC# DQS#
BOT_D1_MEM0
N3 N3
4,19 DDR_CKE1_DIMMA A13 A13
BOT_D2_MEM2
B7 DDR_A_DM0 B7 DDR_A_DM2
DM,DM/TDQS A7 DM,DM/TDQS A7
DDR_A_BS0 NF,NF/TDQS# DDR_A_BS0 NF,NF/TDQS#
J2 J2
4,18,19 DDR_A_MA[0..13] DDR_A_BS1 BA0 DDR_A_BS1 BA0
K8 K8
DDR_A_BS2 BA1 DDR_A_CLK_0# DDR_A_BS2 BA1 DDR_A_CLK_0#
J3 G7 J3 G7
DDR_A_D[0..63] 4,18 BA2 CLK- DDR_A_CLK_0 BA2 CLK- DDR_A_CLK_0
F7 F7
DDR_CKE0_DIMMA CLK+ DDR_CKE0_DIMMA CLK+
G9 G9
4,18,19 DDR_A_BS[0..2] DDR_ODT0_DIMMA CKE DDR_ODT0_DIMMA CKE
G1 G1
ODT VREFDQ ODT VREFDQ
E1 E1
4,18 DDR_A_DM[0..7] DDR_A_WE# H3 VREFDQ J8 VREFCA DDR_A_WE# H3 VREFDQ J8 VREFCA
DDR_A_RAS# WE VREFCA DDR_A_RAS# WE VREFCA
F3 F3
4,18 DDR_A_DQS[0..7] DDR_A_CAS# G3 RAS N2 DDR3_SD_RST# C504 C495 DDR_A_CAS# G3 RAS N2 DDR3_SD_RST# C508 C498
4,18 DDR_A_DQS#[0..7] CAS RESET# CAS RESET#
DDR_CS0_DIMMA# H2 H8 ZQ0 1 2 DDR_CS0_DIMMA# H2 H8 ZQ2 1 2
CS ZQ 0.1U/10V_4 CS ZQ 0.1U/10V_4
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
R276 240/F_4 0.1U/10V_4 R278 240/F_4 0.1U/10V_4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C C
A1
B1
J1
L1
N1
F2
A8
D8
F8
J9
L9
N9
D1
B2
B8
C9
D9
A1
B1
J1
L1
N1
F2
A8
D8
F8
J9
L9
N9
D1
B2
B8
C9
D9
+1.5VSUS
32 +DDR_VREF
U22 U21
DDR3 1Gb DDR3 1Gb
R71
+DDR_VREF *1K/F_4 +DDR_VREF_DIMM
MEM_MA_RESET# R35 *0_4/S DDR3_SD_RST# R53 *0_6/S VREFDQ
4 MEM_MA_RESET# DDR3_SD_RST# 18 VREFDQ 18
+DDR_VREF R72 *0_6/S
32 +DDR_VREF
+1.5VSUS R52 *0_6/S VREFCA +1.5VSUS
VREFCA 18
R70
*1K/F_4 2/8 for PV
+1.5VSUS R72,R53,R52 Footprint
change to short pad
For TOP_D1 Decoupling CAPs M1
G2
G8
M9
M1
G2
G8
M9
C1
E2
B9
E9
K1
A2
D7
A9
K9
H1
A3
N7
H9
C1
E2
B9
E9
K1
A2
D7
A9
K9
H1
A3
N7
H9
F1
F9
F1
F9
J7
J7
C180 C177 C176 C130 C129 C153
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DDR_A_MA0 K3 DDR_A_MA0 K3
0.1U/10V_4 0.1U/10V_4 DDR_A_MA1 A0 DDR_A_D9 DDR_A_MA1 A0 DDR_A_D31
L7 B3 L7 B3
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 DDR_A_MA2 L3 A1 DQ0 C7 DDR_A_D14 DDR_A_MA2 L3 A1 DQ0 C7 DDR_A_D30
K2 C2 K2 C2
L8 C8 L8 C8
L2 E3 L2 E3
B DDR_A_MA6 A5 NF,DQ4 DDR_A_D10 DDR_A_MA6 A5 NF,DQ4 DDR_A_D27 B
M8 E8 M8 E8
+1.5VSUS DDR_A_MA7 A6 NF,DQ5 DDR_A_D12 DDR_A_MA7 A6 NF,DQ5 DDR_A_D29
M2 D2 M2 D2
DDR_A_MA8 N8 A7 NF,DQ6 E7 DDR_A_D11 DDR_A_MA8 N8 A7 NF,DQ6 E7 DDR_A_D26
DDR_A_MA9 A8 NF,DQ7 DDR_A_MA9 A8 NF,DQ7
A9
M3
A9
DDR_A_MA10 H7 DDR_A_MA10 H7
M7 C3 M7 C3
DDR_A_MA12 K7 A11 DQS D3 DDR_A_DQS#1 DDR_A_MA12 K7 A11 DQS D3 DDR_A_DQS#3
C88 C133 C134 C64 C66 DDR_A_MA13 A12/BC# DQS# DDR_A_MA13 A12/BC# DQS#
N3 N3
A13 DDR_A_DM1 A13 DDR_A_DM3
Top_D1_MEM1 Top_D2_MEM3
B7 B7
10U/6.3V_6/S DM,DM/TDQS DM,DM/TDQS
A7 A7
0.1U/10V_4 0.1U/10V_4 J2 J2
DDR_A_BS1 BA0 DDR_A_BS1 BA0
0.1U/10V_4 0.1U/10V_4 K8 K8
DDR_A_BS2 J3 BA1 G7 DDR_A_CLK_0# DDR_A_BS2 J3 BA1 G7 DDR_A_CLK_0#
BA2 CLK- DDR_A_CLK_0 BA2 CLK- DDR_A_CLK_0
F7 F7
DDR_CKE0_DIMMA G9 CLK+ DDR_CKE0_DIMMA G9 CLK+
+1.5VSUS DDR_ODT0_DIMMA CKE DDR_ODT0_DIMMA CKE
G1 G1
ODT E1 VREFDQ ODT E1 VREFDQ
DDR_A_WE# VREFDQ VREFCA DDR_A_WE# VREFDQ VREFCA
For BOT_D1 Decoupling CAPs H3
WE VREFCA
J8 H3
WE VREFCA
J8
DDR_A_RAS# F3 DDR_A_RAS# F3
DDR_A_CAS# RAS DDR3_SD_RST# C132 C178 DDR_A_CAS# RAS DDR3_SD_RST# C69 C131
G3 N2 G3 N2
CAS RESET# CAS RESET#
C520 C521 C493 C488 C491 DDR_CS0_DIMMA# H2 H8 ZQ11 2 DDR_CS0_DIMMA# H2 H8 ZQ3 1 2
CS ZQ 0.1U/10V_4 CS ZQ 0.1U/10V_4
10U/6.3V_6/S R36 240/F_4 0.1U/10V_4 R26 240/F_4 0.1U/10V_4
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
0.1U/10V_4 0.1U/10V_4
0.1U/10V_4 0.1U/10V_4
A1
B1
J1
L1
N1
F2
A8
D8
F8
J9
L9
N9
D1
B2
B8
C9
D9
A1
B1
J1
L1
N1
F2
A8
D8
F8
J9
L9
N9
D1
B2
B8
C9
D9
U9 U8
A +1.5VSUS +1.5VSUS A
DDR3 1Gb DDR3 1Gb
For BOT_D2 Decoupling CAPs
C519 C501 C513 C499 C512 C523 C509 C166 C70

10U/6.3V_6/S
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4 0.1U/10V_4
0.1U/10V_4
0.1U/10V_4 0.1U/10V_4 PROJECT : FP8
DDR2 Rank0 1A

5 4 3 2 1
5 4 3 2 1
4,17,19 DDR_A_WE#
4,17,19 DDR_A_RAS#
DDR_A_WE#
DDR_A_RAS#
DDR_A_CAS#
+1.5VSUS +1.5VSUS
18
4,17,19 DDR_A_CAS#
DDR_CS0_DIMMA#
4,17,19 DDR_CS0_DIMMA# DDR_CS1_DIMMA#
M1
G2
G8
M9
M1
G2
G8
M9
C1
E2
B9
E9
K1
A2
D7
A9
K9
H1
A3
N7
H9
C1
E2
B9
E9
K1
A2
D7
A9
K9
H1
A3
N7
H9
F1
F9
F1
F9
J7
J7
4,19 DDR_CS1_DIMMA#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DDR_ODT0_DIMMA
D 4,17,19 DDR_ODT0_DIMMA DDR_ODT1_DIMMA DDR_A_MA0 DDR_A_MA0 D
K3 K3
4,19 DDR_ODT1_DIMMA DDR_A_MA1 A0 DDR_A_D34 DDR_A_MA1 A0 DDR_A_D54
L7 B3 L7 B3
DDR_A_CLK_0 DDR_A_MA2 L3 A1 DQ0 C7 DDR_A_D33 DDR_A_MA2 L3 A1 DQ0 C7 DDR_A_D49
4,17,19 DDR_A_CLK_0 DDR_A_CLK_0# DDR_A_MA3 A2 DQ1 DDR_A_D35 DDR_A_MA3 A2 DQ1 DDR_A_D55
K2 C2 K2 C2
4,17,19 DDR_A_CLK_0# DDR_A_MA4 L8 A3 DQ2 C8 DDR_A_D37 DDR_A_MA4 L8 A3 DQ2 C8 DDR_A_D53
L2 E3 L2 E3
DDR_CKE0_DIMMA DDR_A_MA6 M8 A5 NF,DQ4 E8 DDR_A_D36 DDR_A_MA6 M8 A5 NF,DQ4 E8 DDR_A_D52
4,17,19 DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_A_MA7 A6 NF,DQ5 DDR_A_D38 DDR_A_MA7 A6 NF,DQ5 DDR_A_D50
M2 D2 M2 D2
4,19 DDR_CKE1_DIMMA DDR_A_MA8 A7 NF,DQ6 DDR_A_D32 DDR_A_MA8 A7 NF,DQ6 DDR_A_D48
N8 E7 N8 E7
DDR_A_MA9 A8 NF,DQ7 DDR_A_MA9 A8 NF,DQ7
M3 M3
DDR_A_MA10 A9 DDR_A_MA10 A9
4,17,19 DDR_A_MA[0..13] H7 H7
M7 C3 M7 C3
DDR_A_MA12 K7 A11 DQS D3 DDR_A_DQS#4 DDR_A_MA12 K7 A11 DQS D3 DDR_A_DQS#6
DDR_A_D[0..63] 4,17 DDR_A_MA13 A12/BC# DQS# DDR_A_MA13 A12/BC# DQS#
N3 N3
A13 DDR_A_DM4 A13 DDR_A_DM6
4,17,19 DDR_A_BS[0..2]
4,17 DDR_A_DM[0..7]
DDR_A_BS0 J2
BA0
BOT_D3_MEM4 DM,DM/TDQS
NF,NF/TDQS#
B7
A7
DDR_A_BS0 J2
BA0
BOT_D4_MEM6 DM,DM/TDQS
NF,NF/TDQS#
B7
A7
DDR_A_BS1 K8 DDR_A_BS1 K8
J3 G7 J3 G7
4,17 DDR_A_DQS[0..7] BA2 CLK- DDR_A_CLK_0 BA2 CLK- DDR_A_CLK_0
F7 F7
4,17 DDR_A_DQS#[0..7] DDR_CKE0_DIMMA CLK+ DDR_CKE0_DIMMA CLK+
G9 G9
DDR_ODT0_DIMMA CKE DDR_ODT0_DIMMA CKE
G1 G1
DDR3_SD_RST# ODT E1 VREFDQ ODT E1 VREFDQ
17 DDR3_SD_RST# DDR_A_WE# VREFDQ VREFCA DDR_A_WE# VREFDQ VREFCA
H3 J8 H3 J8
VREFDQ DDR_A_RAS# F3 WE VREFCA DDR_A_RAS# F3 WE VREFCA
17 VREFDQ DDR_A_CAS# RAS DDR3_SD_RST# C503 C500 DDR_A_CAS# RAS DDR3_SD_RST# C505 C502
G3 N2 G3 N2
VREFCA CAS RESET# CAS RESET#
17 VREFCA DDR_CS0_DIMMA# ZQ4 DDR_CS0_DIMMA# ZQ6
H2 H8 1 2 H2 H8 1 2
CS ZQ CS ZQ
0.1U/10V_4 0.1U/10V_4
R275 240/F_4 0.1U/10V_4 R277 240/F_4 0.1U/10V_4
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C +1.5VSUS C
A1
B1
J1
L1
N1
F2
A8
D8
F8
J9
L9
N9
D1
B2
B8
C9
D9
A1
B1
J1
L1
N1
F2
A8
D8
F8
J9
L9
N9
D1
B2
B8
C9
D9
U20 U19
C518 C490 C494 C492 C507 DDR3 1Gb DDR3 1Gb
10U/6.3V_6/S 0.1U/10V_4 0.1U/10V_4

0.1U/10V_4 0.1U/10V_4
+1.5VSUS +1.5VSUS
+1.5VSUS
C511 C510 C506 C496 C497

M1
G2
G8
M9
M1
G2
G8
M9
C1
E2
B9
E9
K1
A2
D7
A9
K9
H1
A3
N7
H9
C1
E2
B9
E9
K1
A2
D7
A9
K9
H1
A3
N7
H9
F1
F9
F1
F9
J7
J7
10U/6.3V_6/S
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
0.1U/10V_4 0.1U/10V_4
0.1U/10V_4 0.1U/10V_4 DDR_A_MA0 K3 DDR_A_MA0 K3
DDR_A_MA1 L7 A0 B3 DDR_A_D45 DDR_A_MA1 L7 A0 B3 DDR_A_D57
L3 C7 L3 C7
K2 C2 K2 C2
+1.5VSUS DDR_A_MA4 A3 DQ2 DDR_A_D43 DDR_A_MA4 A3 DQ2 DDR_A_D59
L8 C8 L8 C8
B DDR_A_MA5 A4 DQ3 DDR_A_D44 DDR_A_MA5 A4 DQ3 DDR_A_D61 B
L2 E3 L2 E3
DDR_A_MA6 A5 NF,DQ4 DDR_A_D46 DDR_A_MA6 A5 NF,DQ4 DDR_A_D58
A6 NF,DQ5
E8 M8
A6 NF,DQ5
E8
DDR_A_MA7 M2 D2 DDR_A_D41 DDR_A_MA7 M2 D2 DDR_A_D56
DDR_A_MA8 A7 NF,DQ6 DDR_A_D42 DDR_A_MA8 A7 NF,DQ6 DDR_A_D63
N8 E7 N8 E7
DDR_A_MA9 M3 A8 NF,DQ7 DDR_A_MA9 M3 A8 NF,DQ7
C48 C68 C44 C40 C65 DDR_A_MA10 A9 DDR_A_MA10 A9
H7 H7
DDR_A_MA11 M7 A10/AP C3 DDR_A_DQS5 DDR_A_MA11 M7 A10/AP C3 DDR_A_DQS7
10U/6.3V_6/S DDR_A_MA12 A11 DQS DDR_A_DQS#5 DDR_A_MA12 A11 DQS DDR_A_DQS#7
K7 D3 K7 D3
DDR_A_MA13 A12/BC# DQS# DDR_A_MA13 A12/BC# DQS#
0.1U/10V_4 0.1U/10V_4 N3 N3
A13 A13
TOP_D3_MEM5 TOP_D4_MEM7
0.1U/10V_4 0.1U/10V_4 B7 DDR_A_DM5 B7 DDR_A_DM7
DM,DM/TDQS DM,DM/TDQS
A7 A7
J2 J2
DDR_A_BS1 K8 BA0 DDR_A_BS1 K8 BA0
J3 G7 J3 G7
+1.5VSUS BA2 CLK- F7 DDR_A_CLK_0 BA2 CLK- F7 DDR_A_CLK_0
DDR_CKE0_DIMMA CLK+ DDR_CKE0_DIMMA CLK+
G9 G9
DDR_ODT0_DIMMA CKE DDR_ODT0_DIMMA CKE
For TOP_D4 Decoupling CAPs G1
ODT
G1
ODT
E1 VREFDQ E1 VREFDQ
DDR_A_WE# VREFDQ VREFCA DDR_A_WE# VREFDQ VREFCA
H3 J8 H3 J8
DDR_A_RAS# WE VREFCA DDR_A_RAS# WE VREFCA
F3 F3
DDR_A_CAS# RAS DDR3_SD_RST# DDR_A_CAS# RAS DDR3_SD_RST#
C24 C43 C26 C45 C23 G3 N2 C42 C67 G3 N2 C25 C41
CAS RESET# CAS RESET#
DDR_CS0_DIMMA# H2 H8 ZQ5 1 2 DDR_CS0_DIMMA# H2 H8 ZQ7 1 2
CS ZQ CS ZQ
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 R10 240/F_4 0.1U/10V_4 R2 240/F_4 0.1U/10V_4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A1
B1
J1
L1
N1
F2
A8
D8
F8
J9
L9
N9
D1
B2
B8
C9
D9
A1
B1
J1
L1
N1
F2
A8
D8
F8
J9
L9
N9
D1
B2
B8
C9
D9
A A
U5 U2
DDR3 1Gb DDR3 1Gb

PROJECT : FP8
DDR2 Rank1 1A

5 4 3 2 1
5 4 3 2 1
19
4,17,18 DDR_A_MA[0..13]
+0.75V_DDR_VTT +0.75V_DDR_VTT
D 4,17,18 DDR_A_BS[0..2] D
Close to R-Pack termination as possible
C514 C205 C202 C208 C209 C203 C206 C204

DDR_A_MA4 36X4 2 1 RN4 C526 C207
DDR_A_MA1 4 3
DDR_A_MA2 6 5 10U/6.3V_6/S 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
DDR_A_MA5 8 7
10U/6.3V_6/S
36X4 2 1 RN1
DDR_A_RAS# 4 3
4,17,18 DDR_A_RAS# DDR_A_CAS# 6 5
4,17,18 DDR_A_CAS# DDR_CKE0_DIMMA 8 7
4,17,18 DDR_CKE0_DIMMA
DDR_ODT0_DIMMA 36X4 2 1 RN2

4,17,18 DDR_ODT0_DIMMA DDR_A_WE# 4 3
4,17,18 DDR_A_WE# DDR_A_MA10 6 5
DDR_CS0_DIMMA# 8 7
4,17,18 DDR_CS0_DIMMA#
DDR_A_BS2 36X4 2 1 RN3

DDR_A_BS0 4 3
DDR_A_MA12 6 5
DDR_A_MA0 8 7
DDR_A_MA7 36X4 2 1 RN6

DDR_A_MA8 4 3
C DDR_A_BS1 C
6 5
DDR_A_MA3 8 7
DDR_A_MA11 36X4 2 1 RN5

DDR_A_MA9 4 3
DDR_A_MA13 6 5
DDR_A_MA6 8 7
change RN1~RN6 footprint from 8p4r-0402 to 8p4r-0402-smt for pv
Solder Down SPD ROM

+3V
U23
Place at end 1
E0 VCC
8
2 7
E1 WC#
3 6
DDR_A_CLK_0 E2 SCL PCLK_SMB 12,16,24
4 5
4,17,18 DDR_A_CLK_0 VSS SDA PDAT_SMB 12,16,24
*AT24C02BN-SH-T
R54 R284 C531
Close to MEM Controller 30.1/F_4
*0_4 *0.1u/10V_4
BUS1_A0
B
C472 For On Board SPD EEPROM B
3.3P/16V_4
C179
R55 0.1U/10V_4
+3V
30.1/F_4 +3V
DDR_A_CLK_0#
4,17,18 DDR_A_CLK_0#
R288
*10K/F_4 R287 C532
*200/F_4 1U/10V_4
U26
8 1 +3V+_DDR_LM86
3,29 MBCLK2 SCLK VCC
3
Unused CLK 7 2 DDR_THERMDA 2
3,29 MBDATA2 SDA DXP
DDR_A_CLK_1 R28 75/F_4 6 3 C537 Q23
1
4 DDR_A_CLK_1 ALERT# DXN
*100P/50V_4 *MMBT3904-7-F
DDR_A_CLK_1# 4 MEM_MA_HOT# 4 5
4 DDR_A_CLK_1# OVERT# GND DDR_THERMDC
DDR_ODT1_DIMMA
4 DDR_ODT1_DIMMA DDR_CKE1_DIMMA *PAD T11
*G781-1P8
4 DDR_CKE1_DIMMA DDR_CS1_DIMMA# *PAD T26
4 DDR_CS1_DIMMA# *PAD T13
A Place without concern A

PROJECT : FP8
DDR2 Ter RES 1A

5 4 3 2 1
A B C D E
3,5,9,10,11,12,13,14,15,16,19,21,22,23,24,25,26,27,28,33,35 +3V
20
+5V_AVDD +5V
Close to CODEC
L46
BLM18PG121SN1/2A/120ohm _6
Close to CODEC
C347
+3V_DVDD_CORE C529 C329
+3V 1U/6.3V_4 .1U/10V_4 >40mils trace
C371 10U/6.3V_6/S
C379 C381
C370 C372 10U/6.3V_6/S C380
1U/6.3V_4 .1U/10V_4 U25 1U/6.3V_4 .1U/10V_4 10U/6.3V_6/S
AGND
1 27 +5V_AVDD
DVDD_CORE AVDD
38
+3V AVDD
9
DVDD
39 AGND
PVDD
3 45
DVDD_IO PVDD
C524 FCM1005MF-260T03 13 SENSE_A SENSE_A R155 2.49K/F_4
SENSE_A +5V_AVDD
L30 HDA_BITCLK2 6 14 SENSE_B
12 HDA_BITCLK HDA_BITCLK SENSE_B
.1U/10V_4 AGND
HD_SDIN0
12 ACZ_SDATA_IN R280 22_4 8
HDA_SDI MIC1_L1
TO Audio Jack MIC C530 1000P/50V_4
28
HP0_PORT_A_L MIC1_R1 SENSE_B
HDA Bus 12 HDA_SDATA_OUT R165
C369
*0_4/S
*10P/50V_4
5
HDA_SDO HP0_PORT_A_R
29
23 VREFOUT_B_L R156 100K/F_4
+5V_AVDD
VREFOUT_A_or_F
12 HDA_SYNC R164 *0_4/S 10
HDA_SYNC HPOUT_L
TO Headphone jack AGND
C342 *10P/50V_4 31 C533 *1000P/50V_4
HP1_PORT_B_L HPOUT_R HPOUT_L 25
12 HDA_RESET# 11 32
HDA_RST# HP1_PORT_B_R HPOUT_R 25
19
PORT_C_L
C516 10P/50V_4
PORT_C_R
20 TO Internal MIC
24
VREFOUT_C
TO Digital 21 DIGITAL_CLK R282 22_4 DMIC_CLK_R
DMIC0
2
DMIC_CLK/GPIO1 L_SPK+
21 DIGITAL_D1 R281 *0_4/S 4 40
MIC DMIC0/GPIO2 SPKR_PORT_D_L+
41 L_SPK-
SPKR_PORT_D_L- +5V
C517 10P/50V_4 46
DMIC1/GPIO0/SPDIF_OUT_1 R_SPK-
TO Internal Speakers
43
R174 10K/F_4 48 SPKR_PORT_D_R- 44 R_SPK+
+3V SPDIF_OUT_0 SPKR_PORT_D_R+
EAPD 47 15
29 VOLMUTE# EAPD PORT_E_L
16 R154
PORT_E_R
D18 RB500V-40 Change to 100K for SI 10K/F_4
CAP- 17
PORT_F_L
35
CAP- PORT_F_R
18 C527 12/16 C525
1
C541 .1U/10V_4 .1U/10V_4

4.7U/6.3V_6 12 AMP_BEEP AMP_BEEP-1 R279 100K/F_4 ACZ_SPKR_2 ACZ_SPKR_1
PC_BEEP
36
2
CAP+
3
HDA_BITCLK2 ACZ_SDATA_IN CAP+ 25
MONO_OUT
7 R283
1 DVSS C522 1
2 ACZ_SPKR 12
L31 33 22 10K/F_4
AVSS CAP2 2N7002E
C368 C515 30 .1U/10V_4
AVSS Q13
*2.7nH *22P/50V_4 *27P/50V_4 26 21
AVSS VREFFILT
1
42 34
PVSS V-
C367 FOR EMI
*10P/50V_4 49 37
DAP VREG
AGND
AGND
92HD80Bx
1
AGND C346 C373 C538 12/16 Change to AGND on SI by IDT
C344
4.7U/6.3V_6 10U/6.3V_6/S 10U/6.3V_6/S 1U/6.3V_4
2
D14
MIC1_L1 C331 2.2U/6.3V_6 1 2.2K/F_4 R289 VREFOUT_B_L
AGND AGND AGND AGND
MIC1_R1 C332 2.2U/6.3V_6 EXT_MIC_R 3 BAT54C T/R
R281 change to 0 ohm by IDT confirm for SI MV: modify to short pad R259/262/225
VREFOUT_B_L R158 1 2 *2.2K_4 2 47K/F_4 R157 +5V_AVDD
C345 *1U/6.3V_4 AGND

2/8 for PV Footprint change to short pad
Reserved for RF
INT. SPEAKER
R153 *0_4/S R285 *0_4/S C528 1000P/50V_4
R176 *0_4/S R175 *0_4/S C377 .1U/10V_4
R292 20K/F_4 SENSE_A R124 *0_4/S R293 *0_4/S C542 100P/50V_4 INT SPEAKER CONN
R_SPK+ L35 BK1608LL121_6 R_SPK+_R
SENSE_A R_SPK- R_SPK-_R 1
R291 39.2K/F_4 By EMI request, C540 1000P/50V_4 L34 BK1608LL121_6
2
L_SPK+ L33 BK1608LL121_6 L_SPK+_R
3
3
R166 *0_4/S Q25 AGND C378 .1U/10V_4 L_SPK- L32 BK1608LL121_6 L_SPK-_R
4
C343 100P/50V_4 C382 C383 CN9
2 EX_MIC_DET C374 C375
+5V_AVDD 1000P/50V_4 R297 R296 R295 R294
ME2N7002E 1000P/50V_4 1000P/50V_4
R290 AGND 1000P/50V_4 *10_4 *10_4 *10_4 *10_4
1
+5V_AVDD
3
C546 C545 C544 C543

*100K/F_4 *10P/50V_4 *10P/50V_4 *10P/50V_4 *10P/50V_4
5
Q24
25 JACK_SEN# JACK_SEN# 2 25 EXT_MIC_R EXT_MIC_R 1 + EX_MIC_DET
4 +5V_AVDD AGND AGND AGND AGND AGND
+5V_AVDD R299 3 R298 10K/F_4
-
*ME2N7002E 560K/F_4 R300
U27
LMV331IDBVR Quanta Computer Inc.
1
C539 PROJECT : FP8

*220P/50V_4 51K/F_4 comparator Size Docum ent Num ber Rev
AGND AGND
Azalia 92HD81 1A

A B C D E
5 4 3 2 1
21
+3V_LCDVCC
C4
LED Panel(LDS)
C7
D D
10P/50V_4 47P/50V_4
+3V_LCDVCC
Backlight Control(LDS)
C6 LVD-A30SFYG+
R13 100K/F_4 .01u/16V_4 CN2
1
+3V +3V_LCON 1
C46 22P/50V_4 2
L1 RC0603 3 2
DISPON +3V_LCON 3
D2 RB500V-40 1 2 4
BLM18PG181SN1D 5 4
R14 47K_4 5
+3VPCU 6
9 LCD_EDIDCLK 6
C2 C3 9 LCD_EDIDDAT 7
R15 1K/F_4 PN_BLON D3 RB500V-40 47P/50V_4 7
9 LCD_BKL_ON .1U/10V_4 9 TXLOUT0- 8
LID_EC# 27,29 8
9 TXLOUT0+ 9
9
10
10
R16 100K/F_4 2 1 HWPG 29,30,31,32,35 9 TXLOUT1- 11
11
*RB501V-40 9 TXLOUT1+ 12
12
D4 12/21 13
13
9 TXLOUT2- 14
14
RF request for SI 9 TXLOUT2+ 15
15
16
16
Close CN2 9 TXCLKOUT- 17
17
9 TXCLKOUT+ 18
DISPON DISPON_R 18
19
R310 CX260T03000 DIGITAL_DAT_L 19
20
C DIGITAL_CLK_L 20 C
21
+3.9V_CAM 21
22
C597 USBP3- 3 4 USBP3- 23 22
12 USBP3- USBP3+ 23
12 USBP3+ 2 1 USBP3+ 24
24
68p/50V_4 *WCM2012-90 L5 25
VADJ1 25
26
DISPON_R 26
+VIN_BLIGHT 27 34
+3V_LCON 27 34
28 33
28 33
29 31
L6 PBY201209T-330Y-N +VIN_BLIGHT 29 31
30 32
+VIN 30 32
C28 C34 LCD CONN
C35
LCD POWER SWITCH

0.1U/50V_6 0.01U/50V_4 0.1U/50V_6
USBP3- USBP3+
Close to LCD Connector
+VIN C605 C606 L3 0_4 DIGITAL_DAT_L

20 DIGITAL_D1 DIGITAL_CLK_L
6.8P/50V_4 6.8P/50V_4 L2 0_4
20 DIGITAL_CLK
+3V
R25 65mil 12/21 C13

3
330K_6 RF request L1,L2 change to 0 ohm for SI C12

(CX121T04002) 10P/50V_4 10P/50V_4
Q4
+3VPCU LCDONG 2 AO3404 +3V_LCDVCC
B B
Close to CN2
C56 L4 0_8 65mil
.01u/16V_4
R23 LCDVCC1 2/8 PV NEW ADD for AMD

1
3
65mil +3V +3.9V_CAM +3.9V_CAM
CAMERA POWER
100K/F_4 C15
R24 C8
2 .1u/10V_4 C9 10U/6.3V_6/S
Q5 22_8 .01u/16V_4
Q3 2N7002 R22
3
PDTC143TT LCDDISCHG 2/8 for PV *0_6

+3V New add circuit for Var bright function +5V
1
2 LCDVCC :
9 LCD_ENVDD U4
1.5A (Rush current), C604
0.45A (max), 3 4
R17 LCDON# 2 VIN VOUT
0.4A(Typ)
1
0.047U/10V U29
5
100K/F_4 C54
Q2
2N7002
9 LCD_BKL_CTL LCD_BKL_CTL 2
4 R4 1K_4 VADJ1 1U/6.3V_4
1
SHDN R1 R12
1
PWM_VADJ 1 *215K/F_4
29 PWM_VADJ
C49
3 C603 2 5
TC7SH08FU C27 GND SET 4.7U/6.3V_6
*4.7U/6.3V_6 22P/50V_4 AT5231H-3.9KER
Vari bright function C11 C10
R2 R11
*100K/F_4 4.7U/6.3V_6 0.01U/50V_4
R235 *0_4
Do not use it
A A
Vout=1.25(1+R1/R2)

PROJECT : FP8
LED PANEL/CCD MODULE 1A
Date: Friday, February 12, 2010 Sheet 21 of 41

5 4 3 2 1
5 4 3 2 1
EMI Request Stitchinf CAPs calose to CN8 for +5VPCU and

Close to PQ26
22
11/13 RF Request
GND Plane
by EMI request +VIN +VIN +VA_AC +VA_AC +5V
+VIN
+5VPCU +5VPCU +5VPCU
Close to PQ34 11/13 RF Request
C387
2
+VIN
+3V +3VPCU +3VPCU +3VPCU +3VLANVCC C388 PC115
C14 C36 C402 C1 C330 470P/50V_4 33P/50V_4
0.1U/25V_4
2
1
.1U/25V_4 .1U/25V_4 .1U/25V_4 .1U/25V_4 .1U/10V_4 C571 C573 C325 C464
C210 .1U/10V_4 .1U/10V_4 .1U/10V_4
C155 C5 C237 C567 470P/50V_4

.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4
D +1.5VSUS +3VPCU +3VPCU +3VPCU +3VPCU D
.1U/10V_4
PC203 PC202 PC201 PC200 +VIN
C550
1000P/25V_4 1000P/25V_4 1000P/25V_4 1000P/25V_4 .1U/10V_4 C390
+1.5VSUS
2
12/21 RF Request change to 1u
PC205 C389 PC119
470P/50V_4 33P/50V_4 0.1U/25V_4
1
+1.5VSUS_1 +0.9V +VCORE +1.5VSUS_1 +1.8V_L
12/17 EMI Request for SI
1000P/25V_4
+0.75V_DDR_VTT +1.1V C341 C292 C37 C596 C397

+5VPCU +5VPCU
12/17 EMI Request for SI 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
PC204
PC199
+VIN
1000P/25V_4 C384 C376 close PR142
1000P/25V_4 68p/50V_4 68p/50V_4
C392
2
2010/2/11 RF For PV +1.5V +1.5VSUS +1.5VSUS +1.8V +1.8V
12/17 EMI Request for SI C393 PC125
470P/50V_4 33P/50V_4 0.1U/25V_4
1
H2 H1
MBIM3001 *O-FP8-3
PC193 PC194 PC206 C136 C246
PCB Screws
1
1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4

C C
+VIN
+3V
PC206 close PC100 Close to PQ61 11/13 RF Request
+VIN
H3 H4 PC207
*H-C275D90 *H-C315D90 1U/35V_6 PC128
1U/10V_4 C328
2
12/21 RF Request change to 1u C411 PC79
470P/50V_4 33P/50V_4 0.1U/25V_4
1
+3V
H24
FAN Hole 1
C598
*.1U/10V_4 Close to PQ49 11/13 RF Request
H7 +VIN
H5 *O-FP8-2
*O-FP8-1 *s pad-re124x78np
1
C453
1
2
C452 PC163
470P/50V_4 33P/50V_4 0.1U/25V_4
H25
1
H8 MBIM3001 H6 1
*H-TC275BC220D181
B B
1
1
*s pad-re124x78np
H9
MBIM3001 H10
1 *H-C315D90 H11 +VIN
*H-C394D275
1
H12
CPU BRAKET C448
2
*H-C315D90
C449 PC162
1
470P/50V_4 33P/50V_4 0.1U/25V_4
1
H13 H14 H15
*H-TC275BC220D181 *H-TC275BC220D181 *H-C394D275
H16 Close to PQ41 11/13 RF Request
1
1
*H-C197D90
+VIN
1
H23
C19
H17
2
1 MBFP8001
1 *H-C79D79N H18 C18 PC25
1 470P/50V_4 33P/50V_4 0.1U/25V_4
1
*O-FP8-4
*H-C315D110
H19
*H-C79D79N H21 H22
A A
1 *H-C79D79N
1
H20
*H-C394D110
1

PROJECT : FP8
PCB SCREWs 1A

5 4 3 2 1
5 4 3 2 1
23
+3VLANVCC
Close to PIN 1
D D
C568
.1U/10V_4
+CTRL12DVDD R150 BLM18PG471SN1D +DVDD12_LAN
XTAL1
Y2
C323 C563 C337 C552 C558
XTAL2 0.1U/10V_4 100P/50V_4 0.1U/10V_4 100P/50V_4 0.1U/10V_4
Close to PIN 29,37,40
25MHZ C554 C559 C555
.1U/10V_4 .1U/10V_4 .1U/10V_4
C336 C360
30P/50V_4 30P/50V_4 Close to RTL8103E pins-- 10, 13, 30, 36, 39.
+DVDD12_LAN
+3VLANVCC
+CTRL12DVDD
R170 2.49K/F_4 LANRSET Power trace Layout 寬度 > 200mil

+CTRL12A
C560 C562 C561 LED1_AD1
470P/50V_4 0.1U/10V_4 10U/6.3V_8
+3VLANVCC
+CTRL12A C565 C569 C570
C C
10U/6.3V_8 10U/6.3V_8
.1U/10V_4
close Pin 45 U14
48
47
46
45
44
43
42
41
40
39
38
37
VCTRL12A/SROUT12
GND4
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
VCTR12DVDDSR
NC/VDDSR
RSET
NC/ENSWREG
VDD33B
+3VLANVCC 1 36 +DVDD12_LAN
LAN_MX0+ AVDD33 DVDD12B LAN_GLINK100#
25 LAN_MX0+ 2 35
LAN_MX0- MDIP0 LED1/EESK LAN_GLINK10#
25 LAN_MX0- 3 34 R146 2 1 3.6K_6 +3VLANVCC
MDIN0 LED2/EEDI
+DVDD12_LAN 4 33
LAN_MX1+ 5 NC/FB12 LED3/EEDO 32 EECS R307 1K/F_4
25 LAN_MX1+ LAN_MX1- MDIP1 EECS
6 31
25 LAN_MX1- MDIN1 GND3
7
GND1 RTL8103EL-VB-GR DVDD12A
30 +DVDD12_LAN for RTL8103E use
8 29 +3VLANVCC
9 NC/MDIP2 VDD33A 28 ISOLATEB
NC/MDIN2 ISOLATEB LAN_REST_R#
+DVDD12_LAN 10 27 R162 *0_4/S
DVDD12/AVDD12 PERSTB LAN_PLTRST# 11
11 26 PCIE_WAKE# 12,26
NC/MDIP3 LANWAKEB
12 25
NC/MDIN3 CLKREQB LAN_CLKREQ# 12
C322
REFCLK_N
REFCLK_P
*100P/50V_4
NC/GPO
DVDD12
EVDD12
NC/NC
HSON
EGND
HSOP
GND2
HSIN
HSIP
12/16 BIOS Request for SI

13
14
15
16
17
18
19
20
21
22
23
24
+3V
2010/2/8 if ISOLATEB pin
+DVDD12_LAN footprint change short pad pull-low,the LAN
B B
R309 *0_4/S LAN_Cable_detect 12 chip will not drive
PCIE_RXN2_LAN_C C305 .1U/10V_4 it's PCI-E outputs
11 PCIE_TXP2_LAN PCIE_RXN2_LAN 11
11 PCIE_TXN2_LAN R147 ( excluding
PCIE_RXP2_LAN_C C306 .1U/10V_4 *1K/F_4
11 CLK_PCIE_LAN PCIE_RXP2_LAN 11 PCIE_WAKE# pin )
11 CLK_PCIE_LAN#
EVDD12
ISOLATEB R149 100/F_4
LAN_DISABLE# 12,29
AL08103EB01 RTL8103EL-VB-GR EVDD12

2 1
2
*RB501V-40
Close to 8103EL R148
D11
DVDD12 pins-- 19 15K/F_4
1
C307 C308
1U/6.3V_4 *1U/6.3V_4
LAN_GLINK10# 2
LAN_GLINK100# 1
D16 BAT54A
A A
LED0_AD0 25
LED1_AD1
LED1_AD1 25
C321 C556
*0.01U/16V_4 *0.01U/16V_4
PROJECT : FP8
LAN RTL8103EL 1A

5 4 3 2 1
5 4 3 2 1
Accelerometer Sensor SGT-LIS302DLTR interrupt pin default
2.5" SATA HDD OR SSD

DFHD20MR023
+3V_HDD1 +3V 1116 New add for HD protect
is low / active Hi , BIOS need to
programming 22h to change status
from active Hi to low 24
R37 *0_6/S +3V U24
DC Current rating: 0.5 A HP302DLTR8
1
6 Vdd_IO
VDD
C536
21
22
23
24
CN20 SATA HDD(1ST) C535 C534 3
Res erved
10U/6.3V_6/S .1U/10V_4 .1U/10V_4 11
D Res erved D
+5V: 2 A(4 Pin) +5V +3V_HDD1

+3V: 2 A(4 Pin) 8
INTG# INT1
Main HDD
20
Gnd : (5 Pin) 9
1
INT2
C110 C89 C111 12 2
SDO GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
C109 13 4
PDAT_SMB SDA/SDI/SDO GND
C135 PCLK_SMB 14 5
4.7U/6.3V_6 C112 R286 *10K/F_4 SCL/SPC GND
7 10
+3V CS GND
10U/6.3V_6/S 10U/6.3V_6/S
10U/6.3V_6S .1U/10V_4 .1U/10V_4
SATA_TXP0
SATA_TXN0 Change R181 to no stuff as internal pull high
+3V_HDD1
SATA_RXN0 Change footprint from sensor-3-8-14p to SENSOR-3-8-14P-smt for PV
+5V SATA_RXP0 2/8
Pin 12: Low 38hex

Pin 12: unconnected/floating 3Ahex
CN12
HDMI Connector
CON_HDMI_A
SMT_R
TYPE A
C267 .1U/10V_4 HDMI_TXC_P2_C HDMI_TXC_P2_C 1
HDMI_TXC_P2 D2+
C245 .1U/10V_4 HDMI_TXC_N2_C 2
C HDMI_TXC_N2 HDMI_TXC_N2_C
GND
C
3 D2-
C244 .1U/10V_4 HDMI_TXC_P1_C HDMI_TXC_P1_C 4 D1+
HDMI_TXC_P1 HDMI_TXC_N1_C
C243 .1U/10V_4 5
HDMI_TXC_N1 HDMI_TXC_N1_C
GND
6 D1-
C189 .1U/10V_4 HDMI_TXC_P0_C HDMI_TXC_P0_C 7

HDMI_TXC_P0 HDMI_TXC_N0_C
D0+
C190 .1U/10V_4 8 GND
HDMI_TXC_N0 HDMI_TXC_N0_C 9 D0-
C192 .1U/10V_4 HDMI_TXC_P_C 3 4 HDMI_TXC_P_C 10
HDMI_TXC_P HDMI_TXC_N_C
CK+
HDMI_TXC_N C191 .1U/10V_4 2 1 11 GND

HDMI_TXC_N_C 12 CK-
L11 13 CEC
*WCM2012-90 14 RSVD
R43 33_4 HDMI_DDCCLK_R 15

HDMI_DDC_CLK HDMI_DDCDATA_R
SCL
R44 33_4 16 SDA
HDMI_DDC_DATA
17 GND
D19 RB501V-40 +5V F1 2 1 FUSE1A6V_POLY +5V_HDMIC 18 +5V
+5V_HDMIC 2 1 R46 2K_4 HDMI_DET_IN 19 HPD
R45 2K_4
SMT request F1 Footprint change to F3_2X1_65-2_8 for SI GND I71
12/17 20
21
For RS880M used 715ohm C391
.1U/10V_4
HDMI_TXC_P2_C R90 715/F_4
HDMI_TXC_N2_C R78 715/F_4

HDMI_TERM
B HDMI_TXC_N1_C B
R76 715/F_4

HDMI_TXC_N0_C R62 715/F_4
HDMI_TXC_P_C R64 715/F_4

HDMI_TXC_N_C R63 715/F_4
3
Q16
2N7002E
2 +3V
+5V
+3V
R181
1
10K/F_4 R180
10K/F_4
R182 *0_4/S
INT_TMDS_HPD
3
Q18
3
2N7002E
RS880M HDMI 2 Q17
R179
2N7002E
HPD SENSE 2 HDMI_DET_R HDMI_DET_IN
1
A 200K/F_4 A
R178
1
200K/F_4

PROJECT : FP8
HDD/HDMI 1A

5 4 3 2 1
8 7 6 5 4 3 2 1
25
CardReader CONN.
D
C553 .1U/10V_4
+3V
I/O Board CONN. D
CN8
C551 .1U/10V_4
G_0
AGND
1 1 AGND
HPOUT_L HPOUT_L 20
SATA_LED# 2 2 HPOUT_R
13 SATA_LED# 3 OTHERS: 17Pins 3 HPOUT_R 20
GND EXT_MIC_R
USBP7- 4 34AWG WIRE 4 JACK_SEN# EXT_MIC_R 20
12 USBP7- 5 5 JACK_SEN# 20
USBP7+ AGND
12 USBP7+ GND 6 6 GND
7 7 LED0_AD0
LED0_AD0 23 L28 RC0603 BLM18PG181SN1D
MBATLED0# 8 8 +3VLANVCC_IO 1 2
29 MBATLED0# 9 9 +3VLANVCC
LED1_AD1 L49 RC0603 BLM18PG181SN1D
+3VPCU 10 G_1 10 LED1_AD1 23
+3V_IO 1 2
11 HSYNC_COM_CON +3V
CN10
R308 CR B-B CONN 12 GND
C566 13 GND
200/F_6 14
.1U/10V_4 VSYNC_COM_CON L48 RC0603 BLM18PG181SN1D
15 +5V_IO 1 2 +5V
16
17 DDCCLK
Q26 DDCCLK 9 C577
G_2 18
3
SATA_LED# DDCDATA .1U/10V_4

19 DDCDATA 9
VGA Others: 4Pins 34AWG wire GND
2 MBATLED0# 20 GND L47
12 ACCLED_EN 21 +5VSUS_USBP0_IO 1 2 +5VSUS_USBP0
22 PBY201209T-330Y-N
23
C564 USB PWR: 4Pins 34AWG Wire C578
1
G_3 24 GND
DTC144EUA C557 .1U/10V_4
10P/50V_4 25 CRT_R_1
10P/50V_4 26
C CRT_G_1 C
1116 New add for HD protect VAG RGB: 3Pins 27 CRT_B_1
Hi active 38AWG COAX SE 50-ohm 28 USBP2-
29 USBP2+ USBP2- 12
USB data: 4Pins 30 USBP2+ 12
USBP1-
40AWG COAX Diff 90-ohm G_4 31 USBP1+ USBP1- 12
32 USBP1+ 12
33
USBP7- USBP7+ 34
35
LAN: 8Pins 36 LAN_MX1+
40AWG COAX Diff 100-ohm 37 LAN_MX1+ 23
LAN_MX1-
38 LAN_MX1- 23
LAN_MX0+
39 LAN_MX0+ 23
C611 C612 LAN_MX0-
40 LAN_MX0- 23
G_5
6.8P/50V_4 6.8P/50V_4
GS12401-1011-40P-R-NH-SMT
SMT request Footprint change to

gs12401-1011-40p-r-nh-smt for SI C588 C589 C590 C591
2/8 PV NEW ADD for AMD
12/17 *10P/50V_4 *10P/50V_4 *10P/50V_4 *10P/50V_4
Close to CN10

B B
C339 *6.8P/50V_4
C363 *6.8P/50V_4
C364 *6.8P/50V_4
for EMI
CRT_R_1 R163 BK1608LL680 CRT_R 9
HSYNC_COM_CON R152 *0_6/S HSYNC_COM 9
CRT_G_1 R171 BK1608LL680 CRT_G 9
VSYNC_COM_CON R151 *0_6/S VSYNC_COM 9
CRT_B_1 R172 BK1608LL680
WL CTRL CONN.
CRT_B 9
C326 C327
*6.8P/50V_4 *6.8P/50V_4
C340 C361
25 mils
6.8P/50V_4 *6.8P/50V_4
+3V C238 .1U/10V_4 C365 C362
TOUCH PAD CONN C366 C338

6.8P/50V_4 *6.8P/50V_4
A A
6.8P/50V_4
WL_BLUE_LED# 1 *6.8P/50V_4
29 WL_BLUE_LED# 2
WL_AMBER_LED#
29 WL_AMBER_LED# 3
4
5
29 WL_SW# 6
CN6
PROJECT : FP8
DB connectors 1A

8 7 6 5 4 3 2 1
5 4 3 2 1
26
Mini PCI-E Card 1 The value of the capacitor is suggest by Siemens HQ expert.
For against 900MHz RF interference. The value of capacitor is 27pF.
For against 1800MHz RF interference. The value of capacitor is 10pF.
Half Mini PCI-E WLAN 1nF/10nF value capacitor use for against ESD purpose.
+1.5V_WLAN +1.5V
+3V_WLAN R89 RC0603
1 2
+3V_WLAN BLM18PG181SN1D
C242 C291 C241 C266
D D
47P/50V_4 .01U/16V_4 .1U/10V_4
+1.5V_WLAN 10U/6.3V_6S
R60 R74
CN22 10K/F_4 10K/F_4
51 52
Res erved +3.3V
49 50
47 Res erved GND 48 +3V_WLAN +3V
Res erved +1.5V R75 *0_4/S L20
45 46 WLAN_BT# 29
Res erved LED_WPAN# RF_LINK#
43 44 RF_LINK# 29 1 2
Res erved LED_WLAN# C289 PBY201209T-330Y-N
41 42
Res erved LED_WWAN#
39 40
Res erved GND USBP5+
37 38 USBP5+ 12 C170 C290 C240 C239
35 Res erved USB_D+ 36 USBP5- 47P/50V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 10U/6.3V_6S
GND USB_D- USBP5- 12
11 PCIE_TXP1_WLAN 33 34
31 PETp0 GND 32
11 PCIE_TXN1_WLAN PETn0 SMB_DATA
29 30
27 GND SMB_CLK 28
GND +1.5V
11 PCIE_RXP1_WLAN 25 26
PERp0 GND
11 PCIE_RXN1_WLAN 23 24
PERn0 +3.3Vaux MINI_PLTRST#
21 22 MINI_PLTRST# 11
GND PERST# RF_OFF#
11 PCLK_LPC_DEBUG 19 20 RF_OFF# 13
PCIRST# Res erved W_DISABLE#
11,29 PCIRST# 17 18
Res erved GND
15 16 LPC_LAD0 11,29 +3VPCU
13 GND Res erved 14
11 CLK_PCIE_WLAN_0P REFCLK+ Res erved LPC_LAD1 11,29
11 CLK_PCIE_WLAN#_0N 11 12 LPC_LAD2 11,29 R88 *10K/F_4
9 REFCLK- Res erved 10
GND Res erved LPC_LAD3 11,29
12 WLAN_CLKREQ#2 7 8 LPC_LFRAME# 11,29
CLKREQ# Res erved
5 6
BT_CHCLK +1.5V
2
3 4
GND
GND
C PCIE_WAKE# BT_DATA GND C
R112 *0_4/S MINICAR_PME# 1 2
12,23 PCIE_WAKE# WAKE# +3.3V
MINI PCIE H4
53
54
3 1 MINICAR_PME#
12,23 PCIE_WAKE#
Q11
*DTC144EUA
Full mini PCIE for WWAN SIM CARD U1 ESD

+3V
Mini PCI-E Card 2 +3V_WWAN

SIM CARD SIGNALS
1
CH1 CH3
4
D1 *BAV99W
+3V 2 5 UIM_DATA C21 *470P/50V_4
+3V ROUTE PARALLEL VN VP 1
3 6 3 UIM_RST C33 27p/50V_4
+1.5V_WWAN CH2 CH4
2
*CM1213_04ST C20 *0.001u/50V_4
CN21 R57 R58
MINIEC_5V
+5V R40 *0_6 51
49
Res erved +3.3V
52
50
10K/F_4 10K/F_4
Close to CN3
47 Res erved GND 48 CN1
Res erved +1.5V +UIM_PWR
29 EC_DEBUG1 45 46 1 2
43 Res erved LED_WPAN# 44 RF_LINK# UIM_VPP GND VCC
Res erved LED_WLAN# WWLED#_R UIM_RST
FOR KBC DEBUG 41 42 R59 *0_4/S
WWLED# 29 3 4
39 Res erved LED_WWAN# 40 VPP RST
Res erved GND USBP4+ UIM_DATA UIM_CLK
37 38 USBP4+ 12 5 6
Res erved USB_D+ USBP4- I_O CLK
35 36 USBP4- 12
GND USB_D-
8 PCIE_TXP0_WWAN 33 34 7 8
B PETp0 GND N/A N/A B
8 PCIE_TXN0_WWAN 31 32 R73 0_4 PCIE_WWAN_DET# 12 C260 C31
PETn0 SMB_DATA
29 30 R87 9 10 .1U/10V_4 .1U/10V_4
27 GND SMB_CLK 28 R56 *0_4 *10K/F_4 CT DET
GND +1.5V
8 PCIE_RXP0_WWAN 25 26 SIM CARD SOCKET
23 PERp0 GND 24
8 PCIE_RXN0_WWAN PERn0 +3.3Vaux +3V_WWAN
21 22 MINI_PLTRST# D9 RB501V-40
19 GND PERST# 20 WWAN_OFF#_R 2 1
Res erved W_DISABLE# WWAN_OFF# 12
17 18
Res erved GND
15 16 UIM_VPP C262 UIM_VPP
GND Res erved UIM_RST
11 CLK_PCIE_WWAN_4P 13 14 +3V_WWAN_D
REFCLK+ Res erved
11 CLK_PCIE_WWAN#_4N 11
9 REFCLK- Res erved
12
10
UIM_CLK
UIM_DATA
.1U/10V_4
Close to CN3 +3VPCU
GND Res erved +UIM_PWR
12 WWAN_CLKREQ#4 7 8 AO6401
5 CLKREQ# Res erved 6 C263 R330 200K/F_4
BT_CHCLK +1.5V C32
3 4 29 WWAN_PWON#_EC 3 4
GND
GND
PCIE_WAKE# R108 *0_4/S MINICAR2_PME# 1 BT_DATA GND 2 C261 C259 .1U/10V_4 G S

WAKE# +3.3V .1U/10V_4 4.7U/6.3V_6 .1U/10V_4 2 5
D D
MINI PCIE H4 1 6 C592 C593
D D
53
54
.1U/10V_4 10U/6.3V_6S
2/6/2010 Q6
+3V_WWAN
New add for PV
+1.5V_WWAN
Request by HP RF +3V_WWAN
USBP4- USBP4+
+3V_WWAN_D 12/17 New add FOR SI

C167 C284 C285 C212 +1.5V_WWAN +1.5V
C185 C169 C264 .1U/10V_4 .1U/10V_4 .1U/10V_4 10U/6.3V_6S L9
A A
*.01U/16V_4 *.1U/10V_4 *10U/6.3V_6S 1 2 C607 C608
R42 0_6 PBY201209T-330Y-N 6.8P/50V_4 6.8P/50V_4
C286 C154
C265 C595 C183
10P/50V_4 47P/50V_4 10P/50V_4 1U/10V_4 47P/50V_4

12/21
PROJECT : FP8
New add for RF Size Docum ent Num ber Rev
Close to CN21 MINI PCIE(WLAN/WWAN) 1A

5 4 3 2 1
5 4 3 2 1
1x Left side USB PORT For Right 2xUSB Ports PWR 27

+5VPCU
80 mils (Iout=2A) +5VSUS_USBP1
U7 +5VPCU +5VSUS_USBP0
80 mils (Iout=2A)
2 8 +5VSUS_USBP1 U13
VIN1 OUT3 +5VSUS_USBP0
3 7 2 8
VIN2 OUT2 VIN1 OUT3
29 USBPW_ON# 4 6 C72 C71 C55 3 7
EN OUT1 VIN2 OUT2
1 5 29 USBPW_ON# 4 6 C572 C574 C576 C575
D GND OC EN OUT1 D
+ 1 5
GND OC
C90 G547F2P81U 470P/50V_4 C580 C579
1U/6.3V_4 .1U/10V_4 100U/6.3V_3528 *10uF_6.3V C324 G547F2P81U 470P/50V_4 470P/50V_4 *10uF_6.3V
1U/6.3V_4 .1U/10V_4 .1U/10V_4
12/6 New ADD for SI

C584 12/6 New ADD for SI
100P/50V_4
+5VSUS_USBP1
DLW21HN900SQ2L CN13
1 8
USBP0- 4 USBP0-_L 1 GND
12 USBP0- 3 2 7
USBP0+ 1 USBP0+_L 2 GND
2 3 6
12 USBP0+ 3 GND
4 5
4 GND
L8
USB CONN
C581 C602
10P/50V_4 10P/50V_4
C
2/8 EMI Request for pv C
CAPS LEDs
2/8 PV NEW ADD for AMD 朝上 LED1 2P WHITE R27 39_6
29 CAPSLED# 1 2 CAP_LED 1 2
+3V
朝上
VC4 *AVLC5S_4
C583
100P/50V_4

PWR BT CONN.
B
25 mils B
+3VPCU C16 .1U/10V_4
PWB CONN
1
21,29 LID_EC# 2
29 NBSWON1# 3
4
5
29 PWR_LED# 6
CN3
NBSWON1#
1
G1
*SHORT_ PAD1 VC2
AVLC5S_4
C29
2
.1U/10V_4
LID_EC#
A A
PWR_LED#
C30
.1U/10V_4
C17
.1U/10V_4
VC3
AVLC5S_4
VC1
AVLC5S_4 Quanta Computer Inc.
PROJECT : FP8
USB Connectors/LED/PWR BT 1A

5 4 3 2 1
5 4 3 2 1
Keyboard(KBC)
MY5 C228 220P/50V_4 MY1 C225 220P/50V_4 MX7 C236 220P/50V_4
Touch Pad CONNECTOR(TBD) 28
MY6 C220 220P/50V_4 MY2 C224 220P/50V_4 MX0 C226 220P/50V_4 R160 4.7K_4 TPCLK 25 mils 2mA for TP normal operate
+5VSUS
MY3 C219 220P/50V_4 MY4 C223 220P/50V_4 MX5 C232 220P/50V_4
MY7 C221 220P/50V_4 MY0 C230 220P/50V_4 MX1 C235 220P/50V_4 close conn C168 .1U/10V_4
+5VSUS
MY8 C222 220P/50V_4 MX4 C231 220P/50V_4 MY12 C217 220P/50V_4 R161 4.7K_4 TPDATA CN4
MY9 C233 220P/50V_4 MX6 C234 220P/50V_4 MY13 C218 220P/50V_4
MY10 C213 220P/50V_4 MX3 C227 220P/50V_4 MY14 C216 220P/50V_4
MY11 C215 MX2 MY15 TPCLK TPCLK-1 6
220P/50V_4 C229 220P/50V_4 C214 220P/50V_4 29 TPCLK L19 BLM18BA470SN1D
D TPDATA TPDATA-1 5 D
29 TPDATA L16 BLM18BA470SN1D
TP_L 4
C258 TP_R 3
CN5 2
C211
10P/50V_4 10P/50V_4 1
MX1 1
KEYBOARD PULL-UP MX7
MX6
2
3
1
2
TOUCH PAD CONN
MY9 3
4
MX4 4
RP2 5
MY2 MX5 5
10 1 6
MY1 MY4 MY0 6
9 2 7
MY5 8 3 MY7 MX2 8 7
MY0 MY8 MX3 8
MY9
7
6
4
5 MY5
9
10 9
10
SWBT Connector
MY1 11 CN7
MX0 12 11
+3VPCU 10P8R-8.2K
MY2 12
13
MY4 13 1 TP_R
RP1 14
MY14 MY7 14 2 TP_L
10 1 15
MY13 MY11 MY8 15 5 3
9 2 16
MY12 MY10 MY6 16 6 4
8 3 17 C184
MY3 7 4 MY15 MY3 18 17 C186
MY6 MY12 18
6 5 19 TP CONN(BL123-04R-TAND) .1U/10V_4 .1U/10V_4
MY13 20 19
MY14 20
10P8R-8.2K 21
MY11 22 21
MY10 22
23
MY15 23
24
24
C C
MY[0..15]
29 MY[0..15]
MX[0..7] KB CONN
29 MX[0..7]
CPU FAN
FAN1SIG
BLUE_TOOTH +3VPCU_BT
C582
100P/50V_4 +3V
R173
CN11 *4.7K_4
BLUE TOOTH CONN R183
87213-0600-6P-L 12/17 EMI Request for SI 4.7K_4
BTCON_P1 USBP6- USBP6+
6 BLUELED T42
5 BLUELED 29 29 FAN1SIG
4 USBP6- 12 CN14
3 USBP6+ 12
+5V_FAN 1
2 +3VPCU_BT C610 C609 1
+3VPCU_BT 2
1 2
6.8P/50V_4 6.8P/50V_4 3 4
3 4
B B
C395 C394 FAN CONN
2.2U/6.3V_6
.1U/10V_4 DFWF03MS012
+3VPCU +3VPCU FANPWR = 1.6*VSET

Close to CN11
U3
30 MIL
2 3 +5V_FAN
+5V VIN VO
R177 5
GND
4.7K_4 R8 10K/F_4 1 6
+5V /FON GND
1
3 FAN_ON# 7
GND
29 VFAN 4 8
Q15 VSET GND
2 3403 G991PV11
C38
24mil 100P/50V_4
3
3
+3VPCU_BT
13 BT_OFF#
2 Q14 C386 12/17 EMI Request for SI +5V
DTC144EUA C385 C399 8 7 6 5
*.01U/16V_4 10U/6.3V_6/S .1U/10V_4 0.1u Change to 100p
Gnd shape
1
C39
A A
1U/6.3V_4 1 2 3 4
G995 layout notice

PROJECT : FP8
KB/BT/TP/CPU FAN 1A

5 4 3 2 1
5 4 3 2 1
3
U12
9
+3VPCU
C353
C349
.1U/10V_4
.1U/10V_4
+3VPCU_EC
BLM18BA470SN1D
+3VPCU 29
11 LPC_SERIRQ SERIRQ VCC1
4 22 C358 .1U/10V_4 L26
11,26 LPC_LFRAME# LFRAME VCC2 +5VPCU
10 33 C288 .1U/10V_4
11,26 LPC_LAD0 LAD0 VCC3
8 96 C334 .1U/10V_4
11,26 LPC_LAD1 LAD1 VCC4 U15
7 111 C319 10P/50V_4
11,26 LPC_LAD2 LAD2 VCC5
5 125 C348 10U/6.3V_6/S 5 1
11,26 LPC_LAD3 PCLK_LPC_KB3920 12 LAD3 VCC6 VOUT VIN
3 3920_RST# 11 PCLK_LPC_KB3920 67 +3VPCU_EC
PCICLK AVCC
11,26 PCIRST# 13 C351
CLKRUN# PCIRST/GPIO5
11 CLKRUN# 38 C283 .1U/10V_4 C350
CLKRUN
4.7U/6.3V_6 3
D +3VPCU SCI1#_R SHDN D
20 68p/50V_4
GATEA20_R SCI/GPIOE TEMP_MBAT
1 63
RCIN# GA20/GPIO0 AD0/GPI38 TEMP_MBAT 34
12 RCIN# 2 64
3920_RST# KBRST/GPIO1 AD1/GPI39 AD_AIR
R109 47K_4 37 65 4 2
ECRST AD2/GPI3A SYS_I AD_AIR 34 NR/FB GND
66
SYS_I 34
for Battery charge/charge and cap board C352
MX0 AD3/GPI3B *TPS73133
28 MX0 55
C287 MX1 56 KSI0/GPIO30 68 for VGA/CPU thermal *1U/6.3V_4
28 MX1 KSI1/GPIO31 DA0/GPO3C
.1U/10V_4 MX2 57 70
28 MX2 MX3 KSI2/GPIO32 DA1/GPO3D VFAN NBSWON1#
28 MX3 58 71 VFAN 28 +3VPCU R144 10K/F_4
MX4 KSI3/GPIO33 DA2/GPO3E D/C# R168 10K/F_4 WL_SW#
59 72
PCLK_LPC_KB3920 28 MX4 MX5 KSI4/GPIO34 DA3/GPO3F D/C# 34
28 MX5 60
MX6 KSI5/GPIO35 PWM_VADJ CIR_IN
61 21 R119 *10K/F_4
28 MX6 MX7 KSI6/GPIO36 PWM1/GPIOE PWM_VADJ 21
62 23 EC request 1103
28 MX7 KSI7/GPIO37 PWM2/GPIO10 T86 SLPBTN#
R304 *10K/F_4
L29 MY0 39 26
28 MY0 MY1 KSO0/GPIO20 FANPWM1/GPIO12 T36 EC request 1103 MBCLK
C320 40 27 R142 4.7K_4
28 MY1 MY2 KSO1/GPIO21 FANPWM2/GPIO13 T37
FAN1SIG MBDATA
*3.3nH *10P/50V_4 28 MY2 41 28 FAN1SIG 28 R143 4.7K_4
MY3 KSO2/GPIO22 FANFB1/GPIO14
42 29
28 MY3 MY4 KSO3/GPIO23 FANFB2/GPIO15 T35
28 MY4 43
C335 MY5 KSO4/GPIO24 MBCLK R122 10K/F_4 WWAN_PWON#_EC
44 77
28 MY5 MY6 KSO5/GPIO25 SCL1/GPIO44 MBDATA MBCLK 3,34
*2.2P/50V_4 28 MY6 45
KSO6/GPIO26 SDA1/GPIO45
78 MBDATA 3,34 To Battery
MY7 46 79 MBCLK2
28 MY7 MY8 KSO7/GPIO27 SCL2/GPIO46 MBDATA2 MBCLK2 3,19
28 MY8
47
KSO8/GPIO28 SDA2/GPIO47
80
MBDATA2 3,19 To CPU thermal sensor IC
MY9 48
28 MY9 MY10 KSO9/GPIO29
28 MY10 49
MY11 KSO10/GPIO2A
28 MY11 50
KSO11/GPIO2B To avoid glitch during bootup
MY12
28 MY12
MY13
51
52
KSO12/GPIO2C EC new option RSMRST# R159 100K/F_4
28 MY13 KSO13/GPIO2D T40
MY14 53 6 SUSB#
28 MY14 KSO14/GPIO2E GPIO4 SUSB# 12
28 MY15 MY15 54 C333 *.1U/10V_4
C KSO15/GPIO2F HWPG C
81 14 10/29
KSO16/GPIO48 GPIO7 EC_PROCHOT# HWPG 21,30,31,32,35
82 15
KSO17/GPIO49 GPIO8 EC_PROCHOT# 5
SUSC# T39 EC_PROCHOT#
83 16 R145 10K/F_4 +3VS5
SLPBTN# PSCLK1/GPIO4A GPIOA SUSC# 12
84 17
PSDAT1/GPIO4B GPIOB
85 18
ACIN PSCLK2/GPIO4C GPIOC NBSWON1#
34 ACIN 86 19 NBSWON1# 27
TPCLK PSDAT2/GPIO4D GPIOD
28 TPCLK 87
PSCLK3/GPIO4E GPIO11
25 2/9 RF request for
TPDATA 88 30 PV
28 TPDATA PSDAT3/GPIO4F GPIO16 EC_DEBUG1 26
31
BLUELED BIOS_RD# GPIO17 KBSMI#1_R WWAN_PWON#_EC 26
R167 100K/F_4 119 32
BIOS_WR# RD GPIO18
120
BIOS_CS# WR VRON
128
SELMEM/SPICS GPIO19
34
VRON 31,32,33,35 ROM Socket: DG008000031 +3VPCU
SERR# 89 36
11 SERR# SELIO/GPIO50 GPIO1A
76
SELIO2/GPIO43 MXIC AKE38FP0Z00 L50 RC0603 BLM18PG181SN1D
T84 109 1 2
D0/GPXD0 CIR_IN
EC request 1103 T83 110
D1/GPXD1 WINBOND AKE38ZP0N01 AKE38FP0N01
112 C548 2/11 RF For PV
26 WLAN_BT# D2/GPXD2
26 WWLED# 114
D3/GPXD3 CIR_RX/GPIO40
73 R120 100K/F_4 +3VPCU EON AKE38ZA0Q00 C547
115 74 R118 *10K/F_4 +3VPCU 68p/50V_4 68p/50V_4
26 RF_LINK# D4/GPXD4 GPIO41
28 BLUELED 116
D5/GPXD5 GPIO42
75 R121 10K/F_4 2M byte SPI BIOS
117 90 DNBSWON#1_R
T85
WL_SW# D6/GPXD6 GPIO52 CAPSLED#
118 91 U28 R303
25 WL_SW# D7/GPXD7 GPIO53 PWR_LED# CAPSLED# 27 BIOS_CS#_1
92 1 8 10K/F_4
USBPW_ON# GPIO54 ECPWROK PWR_LED# 27 BIOS_SPI_CLK_1 CE# VDD
27 USBPW_ON# 97 93 6
SUSON A0/GPXA0 GPIO55 RSMRST# ECPWROK 3,12 BIOS_WR# BIOS_WR#_l SCK
32,35 SUSON 98 95 R331 0_4 5
MAINON A1/GPXA1 GPIO56 VOLMUTE# RSMRST# 12 BIOS_RD# BIOS_RD#_l SI SPI_7P
31,32,34,35 MAINON 99 121 VOLMUTE# 20 R332 0_4 2 7
LAN_POWER A2/GPXA2 GPIO57 BIOS_SPI_CLK SO HOLD#
35 LAN_POWER 100 126
S5_ON A3/GPXA3 GPIO58 LID_EC#
31,35 S5_ON 101 127 LID_EC# 21,27 +3VPCU R305 10K/F_4 SPI_3P 3 4
VR2.5_ON A4/GPXA4 GPIO59 WP# VSS
31 VR2.5_ON 102
B A5/GPXA5 B
FP9 Add 12,23 LAN_DISABLE# RF_LINK_1#
103
104
A6/GPXA6
123 CRY2 New add R331 and R332 FOR RF
T82 A7/GPXA7 XCLKO
LANDISABLE# 25 MBATLED0#
105
A8/GPXA8
C355 27P/50V_4
3
function T41
AC_LED_ON#
WL_BLUE_LED#
106
107 A9/GPXA9 122 CRY1 Y3
2010/2/8 PV DB stage use ROM SOCKET
25 WL_BLUE_LED# WL_AMBER_LED# A10/GPXA10 XCLKI
108 32.768KHZ
25 WL_AMBER_LED# A11/GPXA11
Change to RB500 as Current loss
11
1
GND1
24 2 SCI1#_R D13 1 2 RB501V-40 SIO_EXT_SCI# 12
For KB3926 B, C vers ion GND2 C354 27P/50V_4
35
GND3 DNBSWON#1_R
124 94 D15 1 2 RB500V-40 DNBSWON# 12
V18R GND4
113
GND5
2
69 KBSMI#1_R D20 1 2 RB500V-40

AGND SIO_EXT_SMI# 12
C356 C357 12/21
.1U/10V_4 4.7U/6.3V_6 22 ohm chane to CX260T03000 FOR RF GATEA20_R D17 1 2 *RB500V-40
MCP_A20GATE 12
1
KB3926QF D2
Close to U12 LAN_DISABLE# BIOS_SPI_CLK BIOS_SPI_CLK_1 R312 *0_4/S

R169 CX260T03000
BIOS_CS# R306 *0_4/S BIOS_CS#_1
C601 12/6 New ADD for SI
1000P/50V_4
C549 C359
47P/50V_4 22P/50V_4
2/8 EMI Request for PV D/C#

2010/2/8 PV for RF
A A
C586
100P/50V_4
12/17 EMI Request for SI Quanta Computer Inc.

PROJECT : FP8
KB3926/ROM/TP 1A
Date: Monday, February 22, 2010 Sheet 29 of 41

5 4 3 2 1
5 4 3 2 1
DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW

30
D D
+VIN
Place these CAPs Place these CAPs
close to FETs close to FETs
PD17
PR138 PR139
1 2
1K/F_4 150K/F_4
8206ON_LDO
2
2
PC98 PC108 PC158 PC157 UDZ5V6B-7-F PC124 PC121 PC123 PC116
+5V_VCC1
10U/25V_8
2200P/50V_4
2200P/50V_4
10U/25V_8
0.1U/25V_4
0.1U/25V_4
*4.7U/25V_8
*4.7U/25V_8
2
PC106
0.1U/25V_4
3.3 Volt +/- 5%
1
Countinue current:4A
1
PC104
Peak current:5.5A
1U/6.3V_4
2
5 Volt +/- 5%
OCP minimum 6A
Countinue current:4A +5VALW
+3VPCU
Peak current:5.5A
5
6
7
8
PC105
OCP minimum 6A
*.1U/10V_4
PC107 PC103
2
4.7U/6.3V_6 4
8
7
6
5
+5VPCU +5V_VCC1 PR83
.1U/10V_4 *0_3720/S
PQ20
8
7
6
5
4
3
2
1
1
4 AO4496
C C
PR110
LDOREFIN
IN
N.C
VCC
TON
REF
LDO
ONLDO
1
del short pad resistor for si stage 0_4/s PL4
3
2
1
PQ22 1 2 +3VPCU-1
AO4496 2.2uH/8A
2
PR109
2
9 32
BYP REFIN2 205K/F_4
PR101 10 31 1 2 DB to SI modfiy
1
2
3
OUT1 ILIM2
5
6
7
8
2
PL6 182K/F_4 5V_FB1 11 30 3V_FB2 PR73
FB1 PU7 OUT2 2.2_8 PR98
1 2 1 2 12 29
ILIM1 SKIP
1
2.2uH/8A PGOOD1 13 RT8206B 28 PGOOD2 0_4/s
PGOOD1 PGOOD2
1
2
DB to SI modfiy 14 27 4 +
ON1 ON2
2
8
7
6
5
5V_DH 15 26 3V_DH PC97 PC89

DH1 DH2
1
1
PR93 5V_LX 16 25 3V_LX PC74
.1U/10V_4
2
LX1 LX2
CAP 220U 6.3V(7343)

+ 2.2_8 37
1500P/50V_4
PAD
PC99 PC93 PR103 4 36
1
PAD
AGND
PGND
*0_4 39
BST1
BST2
.1U/10V_4
PAD
2
PAD
PAD
PAD
PAD
VDD
PAD
PAD
2
DL1
DL2
CAP 220U 6.3V(7343)
N.C
PQ21 40
3
2
1
PAD
2
PC92 AO4712 PQ19 PR100
2
PC91 PC90 AO4712 *0_4

1500P/50V_4
38
35
34
33
17
18
19
20
21
22
23
24
42
41
0.1U/25V_4
0.1U/25V_4
1
1
Rds(on) 20m ohm
1
2
3
1
PR102
0_4/s Rds(on) 20m ohm PR92 PR90
1
1 2 5V_BST1 3V_BST2
1 2
2_6 2_6
5V_DL 3V_DL
1 +5VALW
PC140
PD16 3 2 1
*BAV99
1
B +3VPCU B
+10VALW PR124 *0_4 2 *0.01U/25V_4 PR91
PC153 PGOOD2
1U/6.3V_4
2
1
*0_4/S
2
1 PR99 PR97
PD18 PC142 PC136 *0_4/S 10K/F_4
1SS355 PD15 3 1 2
1
*0.1U/25V_4
1 2 *BAV99
2
2 *0.01U/25V_4 PGOOD1
HWPG 21,29,31,32,35
PR141
+5VALW 1 2
+12VALW
100K/F_4
1
PC156 PC137
2.2U/6.3V_6 *1U/25V_6
2
3 SYS_SHDN#
A A

PROJECT : FP8
SYSTEM 5V/3V (RT8206B) 1A

5 4 3 2 1
PROJECT : ZU1
5 4 3 2 1
+5VPCU
+VIN
31
PR115
8208RTVDD1.1V
10_6
PC63
+1.1V Volt +/- 5%
PC120 1U/6.3V_4
PC126 PC64 PC127
1U/6.3V_4
8208BST1.1V_1 PR64
1 2 Peak current: 7A
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
2_6
5
D D
PC62
OCP minimum: 13A
13
0.1U/25V_4
PU5
9
PR65 8208CS1.1V10 12 8208RTDH1.1V 4
VDD
BST
VDDP
CS DH +1.1V_DYN_S1 +1.1V_DYN
12.1K/F_4
PR76 0_4/s 8208RTPG1.1V
4 11 8208RTLX2.1V PQ24 PL7
21,29,30,32,35 HWPG
3
2
1
PGOOD PHASE
PR114 10K/F_4 8208RTEN1.1V
15 16 PR63
8208TON1.1V
AON7410 1UH/11A-PCMD063T-1R0MN
1 2
600 mils
29,32,33,35 VRON EN/DEM TON
232K/F_4
2
PR113 *0_4 17 8 8208RTDL1.1V
29,32,34,35 MAINON PAD DL
1
VOUT
PC118 PR116
14 5 *2.2_8 +
G0
FB
D0
G1 D1
*0.22U/10V_4
PC122 PC117
RT8208A 4
0.1U/10V_4
7
330u_2V_7343ESR6
PR77 PQ25
8208RTD10.1V AON7702 PC132
3
2
1
PR66
+3VPCU 13.3K/F_4
*1500P/50V_4
10K/F_4 8208RTFB1.1V
PR75
3
PR74 2.67K/F_4
10K/F_4
PC75 100P/50V_4
PR82
9 DYN_PWR_EN 2 RDSon=14m ohm
0_4/s Vo=0.75(R1+R2)/R2
+5VPCU
Reserve for AMD tunning PQ15
1
C +VIN C
PC76 PR84 DMN601K-7
*0.33U/6.3V_4
10_6 PC144
1U/6.3V_4
DYN_PWR_EN High Low
PC87
+1.1V Volt +/- 5%
1U/6.3V_4
+1.1V_DYN 0.95V 1.1V

PC68 PC146 PC147
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
PR132
RTBST_1 RTBST
Peak current: 7A
RTVDD
5
2_6
PC148
OCP minimum: 9A
13
2
PU10
0.1U/25V_4
12 RTDH 4
PR130
VDD
BST
VDDP
RTILIM DH +1.1V
10
CS +1.1V_S2
PR128 12.1K/F_4
HWPG_S2A 4 11 RTLX PQ26 PL9
21,29,30,32,35 HWPG
3
2
1
PGOOD PHASE
0_4/s
5 RT8209A 16 RTTON PR135
AON7410
1
2.2uH/8A
2
600 mils
NC TON
PR136 200K/F_4
1
VRON RTEN 15 8 RTDL
EN/DEM DL
5
PGND
VOUT
10_4 +
GND
17 3 PR137 PC152 PC150

NC
PR134 *0_4 PAD FB *2.2_8

RTFB
0.1U/10V_4
2
29,32,34,35 MAINON
330U_2.5V_7343
PR133 PQ27
14
1
*1M/F_4 AON7702 4
PC151
3
2
1
*1500P/50V_4
B PR131 PR129 B
4.7K/F_4 10K/F_4
PC145
RDSon=14m ohm +2.5 Volt +/- 5%
*100P/50V_4 Vo=0.75(R1+R2)/R2 Countinue current: 200mA
+3VPCU Peak current: 600mA
1.1 Volt +/- 5%
PU6
Countinue current:0.2A PR79
10K/F_4
+2.5V
PC154 PC155
3
VIN NC
5
Peak current:0.5A 29 VR2.5_ON
3
EN VOUT
5
PR80 *0_4
10U/6.3V_8
0.1U/10V_4
+1.1VS5 29,32,34,35 MAINON

PU11 PC85
+3VPCU 1
VIN R1 +
PC84
RT9025A 6 PR72 PC73 1U/6.3V_4
0.1U/10V_4
VOUT
1
2 4 1.2VSET 110K/F_4
100P/50V_4
PR85 GND FB
29,35 S5_ON 2 PC83
EN
10K/F_4
1U/6.3V_4
2
+5VPCU 4 8 PC80 PC81 PC82 RT9043GB
VDD GND
10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
ADJ
PC88 1 9
PGOOD GND1
1
R2 PR78 Vout=1.2(1+R1/R2)
0.33U/6.3V_4
PC149 100K/F_4
7
1U/6.3V_4
2
A 1.1VADJ PR140 A
R1 38.3K/F_4
2
HWPG PR86 0_4/s

R2 PR142 VO=(0.8(R1+R2)/R2)
100K/F_4 R2<120Kohm
1
PROJECT : FP8
VCCP +1.05V/1.05V_S5 (RT8204) 1A

5 4 3 2 1
A B C D E
( VTT/2A )
+0.75V_DDR_VTT
+VIN
1.5 Volt +/- 5%
Peak current:12A
32
1
+5VPCU
+1.5VSUS
PC113 PC112
OCP minimum 15A
10U/6.3V_8
10U/6.3V_8
2
25
2
PU8
1 24 PD12 PC177 PC179 PC180 PC176 +1.5VSUS
GND
4 VTTGND VTT 4
PC100 *RB501V-40
CPU VDDIO/MEM 1.5V Power
10U/25V_8
2200P/50V_4
0.1U/25V_4
*4.7U/25V_8
*10U/6.3V_8
2 23
VTTSNS VLDOIN
5
PC94 D
1116VBST PR104
3 22 1 2 G
+1.5VSUS_1 GND VBST 4 change to pv stage
2_6
0.1U/25V_4 S +1.5VSUS_1
4 21 1116DRVH
MODE DRVH
1
2
3
PR112 PQ33 PL5
( 3mA ) *0_4/S RJK03B9DP PCMC104T-1R0MN
5 20 1116LL DB to SI modfiy
17 +DDR_VREF VTTREF LL
1
PC114 6 19 1116DRVL PQ34 PR168 + +
COMP DRVL
1
RJK03D3DPA 2.2_8 PC208 PC195 PC109 PR105
0.033U/10V_4
D 10K/F_4 PC101
.1U/10V_4
2
2
330U_2.5V_7343
*330u_2.5V_3528
7 18 G
*100P/50V_4
1
2
NC PGND
4
2
S
8 17 PC188
VDDQSNS CS_GND
1
2
3
PR108
1500P/50V_4
1 2
PR106 PR94 CPU_VDDIO_SUS_FB_H 5
V5FILT 1116VDDQSET 9 16 1116CS
VDDQSET CS *10K/F_4
1
*0_4 +5VPCU
7.5K/F_4
PC95 PR107 PC102
PR188 10 15 2 1 10K/F_4 1 2
29,31,34,35 MAINON S3 V5IN
PR187 *0_4
1U/6.3V_4 *100P/50V_4
2
PR186 11 14 V5FILT PR185
0_4 S5 V5FILT
3 29,35 SUSON 3
0_4 10_6
1
PR96 1116TONSET 12 13 PR95 *0_4/S PC96 PR111
+VIN NC PGOOD HWPG 21,29,30,31,35
619K/F_4
1U/6.3V_4
2
RT8207AGQW
*0_4/S
+1.5VSUS
+0.9 Volt +/- 5%

CPU VDDR Countinue current:1.5A
PC71 PC72 3 5
VIN NC +0.9V
Peak current:2A
10U/6.3V_8
0.1U/10V_4
PU4
OCP minimum:3A
RT9025A 6
VOUT
PR71
29,31,33,35 VRON 2
EN
10K/F_4
+5VPCU 4 8 PC59 PC60 PC61
PR69 *0_4 PC69 VDD GND
10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
2 29,31,34,35 MAINON 2
ADJ
1 9
0.1U/10V_4
PGOOD GND1
1
PC70
7
1U/6.3V_4
2
1.2VADJ0.9V PR60
R1 12.7K/F_4
PR70
VO=(0.8(R1+R2)/R2)
21,29,30,31,35 HWPG R2<120Kohm
2
0_4/s R2
PR58
100K/F_4 PR59
CPU_VDDR_SENSE 5
*12.7K/F_4
1
1 1

PROJECT : FP8
DDR3 +1.5VSUS (RT8207) 1A

A B C D E
5 4 3 2 1
33
D D
PR143
+VCORE
49.9/F_6
PR176
0_4/s PR147 SNS_POS_VDD_0 8380RSP1 8380CSN1
665/F_4 8380CSP1
1
5 CPU_VDD0_RUN_FB_H PC186
5 CPU_VDD0_RUN_FB_L 470P/50V_4
PR177
2
0_4 PR148 SNS_NEG_VDD_0 8380RSN1 PC183 PC178
665/F_4
100P/50V_4
6.8nF/25V_4
DB to SI modfiy
PR144
PR167
49.9/F_6 VRON 29,31,32,35
0_4
PR184
2 1 PR164 CPU_PWRGD_SVID_REG
8380VREF CPU_PWRGD_SVID_REG 5
27.4K/F_4 0_4
DB to SI modfiy PC182
DB to SI modfiy PC172
+VIN
1000P/50V_4
0.1U/50V_6
PR171
2.2/F_4
+Vcore Volt +/- 5%
1
PC23 + PC22 + PC21 PC19 PC20
PR156
PR172
5
Peak current: 18A
4.7U/25V_8
0.1U/25V_4
+5VPCU
2200P/50V_4
5.6U_25V_3528
5.6U_25V_3528
D 5.62K/F_4
2
8380HDR1 4
G
PR173 10K _6 NT C OCP minimum: 20A
S Close to Phase
8380RSN1
8380CSN1
3.92K/F_4
8380SC
8380RSP1
8380CSP1
DB to SI modfiy +VCORE
Inductor
1
2
3
PR27 PQ32 PL10
22_6 8380LX1 RJK03B9DP
PC27
1
C +5VPCU PQ31 0.45U25A(PCM B104T -R45M N) C
1
470P/50V_4
RJK03D3DPA PR155 + PC33 + PC32
42
41
22
24
23
20
21
19
18
17
38
39
40
2
PC168 D 2.2_8 PC31
0.22U/25V_6
PD21
330U_2.5V_3528
330U_2.5V_3528
G
RSN1
RSP1
CSN1
CSP1
HDR1
SC
EN
GNDA
GNDA
PWR_OK
GNDA
GNDA
GNDA
2
2
0.1U/10V_4
RB501V-40 4
2
PC28 S
8380VREF 1U/6.3V_4 25 16 PR159
1
2
3
26 COMPV1 LX1 15 8380BST 1 PC161
27 VDDA BST1 14 8380LDR1 +VIN
2_6 1500P/50V_4
28 VREF PU12 LDR1 13
TSET GNDP
29 OZ8380 12
8380TSET
PC187 30 ILIM VDDP 8

8380ILIM
SVD HDR2
1
31
SVC BST2
10 PC164
+VDDNB Volt +/- 5%
5
0.22U/6.3V_4
32 9 1U/6.3V_4 PC18 PC14 + PC170

8380VREF COMPV2 LX2
+5VPCU Countinue current:3A
GNDA
GNDA
GNDA
GNDA
GNDA
0.1U/25V_4
2200P/50V_4
RSN2
RSP2
CSN2
CSP2
100U/25V L-F
LDR2
VFIX
2
VIN Peak current: 4A
PR158
PG
PR175 PR182 2_6 8380HDR2 4
PR26 PD20
OCP minimum: 5A
33
34
1
2
3
5
4
6
7
11
35
36
37
2.55K/F_4
43.2K/F_4
1 2
0_4
+5VPCU
PQ6 Del PC24 for pv stage
3
2
1
DB to SI modfiy +VDDNB_CPU
8380RSN2
8380CSN2
RB501V-40 AON7410
8380RSP2
8380CSP2
8380VFIX
PC165 PL11
0.22U/25V_6 1UH/11A-PCM D063T -1R0M N
PC185 8380LX2 1 2
DB to SI modfiy
1
1
470P/50V_4
PR25 PR183 PC190 PR179 PC189
1
8380LDR2 PR16 PR166 Close to Phase Inductor
6.2K/F_4
*49.9K/F_4
49.9K/F_4
1
0.1U/25V_4
1000P/50V_4
2.2_8 4.99K/F_4 +
2
+3V PR157 PC34 PC26

4
2
PR163
0.1U/10V_4
330U_2.5V_7343
DB to SI modfiy PQ4 4.22K/F_4
5 CPU_SVD CPU_SVD PR180 0_4 8380SVD PR161 AON7702 PC4 10K _6 NT C
3
2
1
1.91K/F_4 PR160
5 CPU_SVC CPU_SVC PR181 0_4 8380SVC
1500P/50V_4
PR178 4.99K/F_4
8380VREF 2 18380RSN2
B B
32.4K/F_4 CPU_VRM 8380_PG PR165
DB to SI modfiy CPU_VRM 8380_PG 12
PR145 2.2/F_4
SNS_NEG_VDD_1 PR162 DB to SI modfiy
2 1 +VIN
49.9/F_6 27.4K/F_4 PC174
PR174
SNS_NEG_VDD_1 8380RSN2 PC171
1.2K/F_4 82nF/25V_6
1000P/50V_4
PC184 PC181
220P/50V_4 100P/50V_4
8380CSP2
PR170
5 CPU_VDDNB_RUN_FB_H 0_4 PR149 SNS_POS_VDD_1 8380RSP2 8380CSN2
1.2K/F_4
1
DB to SI modfiy
PR146
+VDDNB_CPU PC175
49.9/F_6 PR169 PR189
6.8nF/25V_4
*100K/F_4 10K/F_4
PR24
2 1
2
*0_4/S
+3V
Signal Ground Power Ground
A A

PROJECT : FP8
VCORE (OZ8380) 1A
Date: T hursday, February 11, 2010 Sheet 33 of 41

5 4 3 2 1
5 4 3 2 1
Place this ZVS close to
34
PD19
2 1 Diode away +VIN +BATCHG
Do Not add test pad on BATDIS_G signal PQ5
PL2
+VA_AC +VA SMAJ22A-13-F PQ3 +PRWSRC FDMC4435BZ 5A/08
PQ29 +VAD RJK0392DPA 1 PL3 CN19
CN15 FDMC4435BZ 2 5 BATT+ 1
1 3 3 5A/08 1
S
9 1 PL1
5 2 5 2 SMD 2
10 2 5A_8 3 1 PC10 PC9 2
6 3 SMC 3
0.1U/25V_4
0.1U/25V_4
4
7 4 BATDIS_G 3
G
PC1 PC3 PC6 PC5 5
8 5 5
PR18 Place this ZVS close to
0.1U/25V_4
0.1U/25V_4
0.1U/50V_6
4
4
1211
0.1U/25V_4
D +VIN +3VPCU D
PC7 RL3720WT-R010 6
DC-IN CONN 1U/25V_8 Far-Far away +VIN B_TEMP_MBAT 4 6
1 2 4 7
7
PR12 PR13
1
ACOK_IN PR8 *100/F_4 BATDIS_G 330_4 330_4
PR123 PR120
PD13
10K/F_6 0_6 +VH28 PR6 20K/F_4 SMAJ22A-13-F
35 P2805PG PR14
3,29 MBDATA
2 1 +VAD 8681_VDDP 10K/F_4 BP07061-BA015
2
PD14 *UDZ5V6B-7-F Change to 20K for SOA check. PR19 PR15 8681_VDDA
3,29 MBCLK
*0_2/S *0_2/S
PR17
ACOK_IN
PR5 TEMP_MBAT 29
CSIN
CSIP
2
100/F_4 PR4 PC44 PD4 PD5 1K/F_4
1
PR3 2 1
100K/F_4
UDZ5V6B-7-F
UDZ5V6B-7-F
PR9
1
PC13 PC56
*100K/F_4
PQ30 PR1 1U/10V_4
PR150 PR152 PR154 0_4
0.01U/25V_4
0.01U/25V_4
Q1
+VA 2 1 1 2 2 1 2 1 0_4
2
1K_6 220K_4 220K_4 2 ACOK# PD1
2
2
6 5 1SS355
2
2
2 1 PR37 PR38
3 4 +VAD PQ2 PR7 10/F_4 10/F_4 PR45 8681_VDDP PC11 PC12
3
Q2
DMN601K-7 100/F_4 Place this cap
100K/F_4
*100P/50V_4
*100P/50V_4
1
1
UMT1N IDEA_G 2 PR2 ACIN PC169 PC167 PC173 PC166
8681_VDDA
close to EC
1
1M_4 PC39
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
1
1
1
8681_VDDP
2 8681IACP
2 1
8681IACM
1
+VAD PC2 PC42
2
PR153 PR151 1U/10V_4 2 1 1U/10V_4
2
1M_4 1M_4 PQ1 1110 EMI request
15
3
5
MMBT3904-7-F 2.2U/10V_6 PD9 +BATCHG
2
RB501V-40 BATT+
IACM
IACP
VDDA
VDDP
3
1
C C
PR36
PR40
1
1 2 10 2_6 PC40
3,29 MBCLK SCL
PQ9 0_4 128681B_2 8681B_1 4 PC8
BST
0.1U/25V_4
IMD2 0.1U/50V_6
PR39 8681HDR
1 2 11 13 PQ35 PR22
3,29 MBDATA
3
2
1
SDL HDR
0_4 AON7410 RL3720WT-R020
4
PD23 PL12 8681LR

1SS355 14 8681LX 8681LR 1 2
PR41 LX
29,31,32,35 MAINON 2 1 2 1 8681ACAV
9
29 ACIN ACAV PCMC063T-6R8MN
1
+VA
100K/F_4
PD24 16 8681LDR PR20
PR42 LDR
1SS355 2 1 PQ36 2.2_8 PC15 PC16 PC30 PC192 PC191 PC17
+VAD_1 8681ACAV 2 1 AON7702
100K/F_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
*4.7U/25V_8
4 PR21
2
PD8 PD10 DB to SI modfiy PR35 PR23
2 1 +VAD_1 2 1 DCIN 1 *0_2/S *0_2/S
VAC
5 PC29
3
2
1
ICHP
1SS355 1SS355 10_8 1500P/50V_4
PC38 PC43 change to pv stage
2
1U/25V_8
1U/10V_4
1
PD22
PR34 PD11 4 PD25
RB501V-40
PR48 ICHM
1
75K/F_4 8681ACAV 2 1 2 1 8681COMP8 8681ICHP PR44 1 210/F_4 8681ICHP_1
*SSM34PT
8681_VDDA COMP 8681ICHM 1 2 8681ICHM_1
*3.3K/F_4
1
1
*1SS355 PR43 10/F_4
2
GND
29 AD_AIR
2
IAC
PC41
4
PR49 PR47
PC55 *1.3K/F_4 0_4 0.01U/50V_4 DB to SI modfiy
17
1
0.1U/10V_4 *IMD2 PU2
2
2 2
B B
PR33 OZ8681LN
12.4K/F_4 PQ8
8681IAC
PC46
0.47U/10V_4 PR46
3
Place this cap 2 1

SYS_I 29
close to EC 10/F_4
1
1
PC54
+VAD PC45 0.01U/50V_4 ACOK_IN
2
0.01U/50V_4
2
8681_VDDP
PR32
Place this cap 2 1
PQ7
close to EC
3
PDTC144EU 0_4
PR30 PD7
*10K/F_6 2 D/C#_S6A 1 2 D/C# 29
*1SS355
PC37
1
*10U/6.3V_8
PC35
PR28
*0.1U/10V_4
PD6 *20K_6
*1SS355
5
1 2
PR29
ACIN PR31 2 4 2 1 ACOK#
A A
*1M_4
1
1 *0_4
PC36 PU1
*1U/10V_4 *SN74AHC1G14DBVR
2

PROJECT : FP8
Charger (OZ8681) 1A

5 4 3 2 1
5 4 3 2 1
+VAD +VH28
35
PD26
10mil
+VA 2 1
1
*RB501V-40
PR54
PR11 PR10 0_4/s
PD27
*22_6 22_6
2
+BATCHG 2 1
1
*RB501V-40 PC51
DB to SI modfiy 0.1U/25V_4 PC52 +VIN +5VSUS +12VALW +5VPCU
PC50 2 1 DB to SI modfiy
1U/35V_6
P2805PG 34
2
D D
PC53
19G5934CN
G5934CP
0.1U/25V_4
2 1
1
PR52 PR53 PR50
0.47u/25V_6 1M_4 *22_8 1M_4 PC48
20
18
17
16
1
2
5
6
PR55
.1U/10V_4
0_4/s +VAD_1
VIN
CN
VOUT
CP
D_CAP
SUS_ON_G 3
3
29 LAN_POWER 1 15 G5934PG PQ13
ON1 PG
3
ME3424D
4
PR57 PR51 +5VSUS
750K/F_4 2 1M_4 2 2 PC47
29,32 SUSON 0.24A
2200p/50V_4
1
2 14G5934VSENSE DB to SI modfiy PQ12 PQ11 PC49
29,31,32,34 MAINON ON2 VSENSE PQ10 *DMN601K-7 DMN601K-7
.1U/10V_4
1
2
DDTC144EU
1
+12VALW
PR56
29,31 S5_ON 3 13 100K/F_4
ON3 REG
1
PC58
1U/16V_4
4 LAN_ON SUSON SUS_ON_G
29,31,32,34 MAINON ON4
PR67
7 G5934DISC3 +3VS5
DISC3
0_6/s
C594 C587 C585
+3VPCU PR61 G5934DISC1 5 PR62
+3VLANVCC 6 G5934DISC2 +5V 100P/50V_4 100P/50V_4 100P/50V_4
DISC1 DISC2
0_6/s 0_6/s
DRIVER4
DRIVER3
DRIVER1
DRIVER2
C C
+5VPCU
DISC4
GND
+1.5VSUS
8
7
6
5
PC78
12
11
G5934DISC4 8
10
21
PU3
0.1U/10V_4
5
6
7
8
5
4 MAIND3.3V G5934RZ1U PC159 +VIN +1.5V
PC110
0.1U/10V_4
5A
0.1U/10V_4
PC86 +3VPCU MAIND 4
+3V
4
2200P/50V_4
PQ16 3.6A 3.3A PR81

AO4496 PC57 *22_8
1
2
3
2200P/50V_4 PQ28 +5V +1.5V PR89
3
2
1
PC66 PR68 AO4496 PQ23 *1M_4
6
5
2
1
3
0_6/s AON7430L PQ18
0.1U/10V_4
3
2
1
PC77 1A +3VPCU *DMN601K-7
0.1U/10V_4 3 S5_OND
+3VS5 2
PQ14 PC160 PC111
3
ME3424D PC67 0.1U/10V_4 0.1U/10V_4 PQ17
4
+3V PC196 *DMN601K-7

2200P/50V_4
1
2
5
6
0.1U/10V_4
1
2
PC65 LAN_ON 3 1A PR88
*1M_4
0.1U/10V_4
PQ37 +3VLANVCC
PC197 ME3424D
1
2200P/50V_4
B B
+5VPCU
PC198 +1.8V +/- 5%
0.1U/10V_4
Countinue current:0.7A
2
PJP1
Peak current:1A
*POWER_JP/S OCP minimum 4A
1
+1.8V
2
PC139 PC138
PR122
10U/6.3V_8
0.1U/10V_4
PU9 HPA00835RTER *0_3720/S

16 10
VIN PH +1.8V_L
1 11 PL8
VIN PH
1
1UH/11A-PCMD063T-1R0MN
2 12 1 2 +1.8V_L
VIN PH
PC141
PR125
29,31,32,33 VRON PR126 0_4/s 15 13 1 2 1 2
EN BOOT
2_6 PR119
29,31,32,34 MAINON
PR127 *0_4
21,29,30,31,32 HWPG
14
PWRGD VSNS
6 0.1U/25V_4 R1 127K/F_4
1
PC143 7 3 PC131 PC130 PC129

COMP GND HPA00835-1.8_VFB
0.1U/10V_4
10U/6.3V_8
10U/6.3V_8
2
*0.01U/50V_4
8 4
RT/CLK GND
2
PAD
PAD
PAD
PAD
PAD
PAD
A A
9 5
SS AGND
PR121 PR117 R2 PR118
100K/F_4
15K/F_4
182K/F_4
22
21
20
19
18
17
1
1
1
PC135 V0=0.8*(R1+R2)/R2
PC134
*100P/50V_4
2
0.01U/50V_4
1
PROJECT : FP8
PC133
1200p/50V_4
2

Cus tom Dis-charge IC (P2806) 1A
NB5/RD2
5 4 3 2 1
5 4 3 2 1
37
USB GUIDE
D D
SB820
USBP7-/7+ Card reader
USBP6-/6+ BLUETOOTH
USBP5-/5+ WLAN Min-Card
USBP4-/4+ WWAN CARD
USBP3-/3+ WEBCAM
USBP2-/2+
C Right Side Conn. C

USBP1-/1+
USBP0-/0+
Left Side Conn.
B B
A A

PROJECT : FP8
SB CLKs Routing 1A

5 4 3 2 1
5 4 3 2 1
SYSTEM SMBUS GUIDE
D D
CPU
SB820
KBC 3926 On Board MEM Accelerometer
DDR SODIMM
SMBUS0 SPD ROM Sensor
SMBUS0 BATTERY
SMBUS1 Unnused
SMBUS1 CPU THERMAL Pull-High
G780; 98h
C SMBUS2 C
On Board MEM
THERMAL SMBUS3
Reserve Only
B SO-DIMM
Page 16
MEM_MA_CLK5_P/N AMD
MEM_MA_CLK4_P/N ASB2 CPU
800MHz
AMD NORTHBRIDGE
RS880M
INTERNAL CLOCK MODE
Page 3~6 Page 7~10
NB_REFCLK_P/N
MEM_MA_CLK5_P/N
HT_REFCLKP/N
800MHz
CPU_CLKP/N
A ON-BOARD
B Page 17~19 B
200MHz
A-LINK
100MHz
100MHz
100MHz
WLAN_CLKREQ2#
CLK_PCIE_WLAN_0P#/0N
MINICARD-WLAN Page 23
100MHz
RTC_CLK
EC Page 25 33MHz
AMD SB820
LPC_CLK0 WWAN_CLKREQ4#
Debug card INT CLK MODE
33MHz
HD AUDIO Page 19 AZ_BIT_CLK
24MHz CLK_PCIE_WWAN_4P/#4N
WWAN-3G Page 23
100MHz
A A
Page 11 LAN_CLKREQ#(REQ3#)

CLK_PCIE_LANN/P
LAN-8103 Page 21 PROJECT : FP8
100MHz
For MASTER For RTC For SATA Size Document Number Rev
1A
Clock Distribution Diagram
Y?(25MHz) Y?(32.768KHz) Y?(25MHz) Date: Thursday, February 11, 2010 Sheet 37 of 41
5 4 3 2 1
5 4 3 2 1
+VCORE
CPU core
(OZ8380)
PU9
VIN
NorthBridge
+VDDNB_CPU
(OZ8380)
PU9
D D
+5VPCU
ME3424D +5VSUS
+5VPCU
PQ47
AO4496
+5V
PQ21
VIN
SYSTEM POWER Distribution

5V/3V
+3VPCU
(RT8206B) VIN LCD Backlight, CPU_CORE,NB_CORE, +5VPCU, +3VPCU, +1.5VSUS, +1.1V, +1.1V_DYN
PU7 CPU
+VCORE
ME3424D +3VS5
PQ28 +VDDNB_CPU power supply for on-die NorthBridge
C
+1.1V NorthBridge power supply C
ME3424D +3VLANVCC +1.1_DYN power supply for on-die NorthBridge

PQ36
+3VPCU
ADAPTER USB Connecter
+5VPCU
CHARGER VIN
AO4496 +5VSUS Touch Pad
(OZ8681LN) +3V
BATTERY PU5 PQ20 +5V CRT, Audio codec, SATA
RT9025 +3VPCU KeyBoard, EC, BIOS

+1.8V
PU14
+3VS5 SouthBridge
RT9043GB
+2.5V +3VLANVCC
PU11 LAN
+3V thermal Sensor, NB, SB, EEPROM, Audio codec, Card Reader, WLAN, WWAN, FAN, LED, BT
RT9025
+1.1VS5
PU10 +1.8V
NB, SB
VIN
+1.5VSUS
+1.5VSUS CPU, DDR3
B B
+1.5V WLAN
AON7430L
+1.5VSUS
+1.5V
PQ25
+0.9V CPU
DDR PWR +0.75V_DDR_VTT DDR3
1.5V RT9025 +0.9V
(RT8207GQW) PU16 +2.5V
CPU
PU8 +1.1VS5 SB
+0.75V_DDR_VTT
SB Core
+1.1V
(RT8209A)
A PU13 A
NB Core
+1.1V_DYN
(RT8208A)
PU4

PROJECT : FP8
Size Document Number Rev
1A
Pow e r Tre e
Date: Thursday, February 11, 2010 Sheet 38 of 41
5 4 3 2 1
5 4 3 2 1
Nile Power On Sequence Power on sequence required:

SB800:
From VBAT VCCRTC
1.+3VS5 ramp before +1.1S5
From AC,BATT VIN 2.+3V ramp before +1.8V
+5VPCU +3VPCU 3.+1.8V ramp before +1.1V
4.+3.3V ramp before +1.1V
From PWM to EC SYS_HWPG 5.+3VS5 ramping down time>300us
From Button to EC NBSWON# 6.50us<=all power rails rise time except +3VS5<=40ms
7.100us<=+3VS5 rise time<=40ms
From EC to PWM S5_ON
D 9.VBAT (VCCRTC) must ramp at least 5 seconds before the S5 rails D
+3VS5 to allow start time for the internal RTC

+1.1VS5
From PWM to EC HWPG_1.1VS5
RS880:
From EC to SB EC_RSMRST# ??ms (EC define) 1.0<(+3.3V)-(+1.8V)<2.1
From EC to SB DNBSWON# 2.+1.8V ramp before +1.1V
3.+1.1V ramp before +VDDNB_CPU
From SB to EC SUSC#,SUSB#
From EC to PWM SUSON
+5VSUS
CPU_VDDIO_SUS(+1.5VSUS) VTT only will be shut down in S3 mode , and VTT for DDR3 SODIMM only
+0.75V_DDR_VTT, +DDR_VREF
From PWM to EC HWPG_1.5V(SUS)
From EC to PWM MAINON

GROUP A
+5V/3.3V
+1.8V
From PWM to EC HWPG_1.8V
C
+2.5V C
+1.1V_DYN
HWPG_1.1V_DYN
From PWM to EC +1.1V
HWPG_1.1V
+0.9V
HWPG_0.9V
From EC to PWM VRON
GROUP B
RC=~22ms , +VDDNB_CPU should not ramp before 1.1V

CPU_VDDNB_CORE
CPU_CORE
From PWM to EC,SB CPU_COREPG
SB_PWRGD rise time<50ms
From EC to SB SB_PWRGD(ECPWROK) SB_PWRGD to NB_PWRGD:40~42ms
From SB to NB NB_PWRGD,NB_PWRGD_IN
>1ms
HT_REFCLKP/N(NB INPUT CLK)
B >1ms B
CPU_CLKP/N(CPU INPUT CLK)
From SB to CPU CPU_PWRGD A_RST# to PCI_RST#<100ns

From SB to NB NB_RST#_IN SB_PWRGD to A_RST#:101~113ms
From SB to PWM CPU_LDT_RST# >1ms >1ms
Notice:
1.CPU_LDT_RST# msut be asserted a minimum of 1ms prior to the assertion of CPU_PWRGD
2.CPU_CLKP/N must be within specification a minimum of 1ms prior to the assertion of CPU_PWRGD
3.CPU_PWRGD remains deasserted at least 1ms after both CPU_CLKP/N and all voltages to the processor are within specification for operation
4.all NB power rails(1.8V/1.2V/1.1V) valid before NB_PWRGD at least 1ms
5.stable input clocks from CLKGEN(HT_REFCLKP/N) to NB before NB_PWRGD at least 1ms
A A

PROJECT : FP8
1A
Power Sequence
Date: Thursday , February 11, 2010 Sheet 39 of 41
5 4 3 2 1
5 4 3 2 1
SLP_S3#(SUSB#): 3
S3 Sleep Power plane control Assertion of SLP_S3# shuts off power to non-critical components NBSWON#
when system transitions to S3, S4, or S5 states.
5
SLP_S5#(SUSC#): 4 +3VPCU
MOS +3VS5
S5 Sleep Power plane control - Assertion of SLP_S5# shuts power off to non-critical components PQ14
when system transitions to S4 or S5 state. S5_ON
1b +3VPCU +1.1VS5
1 Regulator
AC Adapter +3VPCU PU11
Always System power
BATT Charger VIN
Regulator 7 6
D PU2 +5VPCU D
Battery PU7 EC_RSMRST#

RSMRST#
10 8 29
2
DNBSWON#
SUSON PWRBTN# CPU_LDT_RST#
LDT_RST#
11 SUSC# 9
SLP_S5#
MAINON
EC SUSB#
14 SLP_S3#
RESET_L
VRON
SB820
+3VLANVCC +3VPCU LAN_POWER ASB2
MOS 25 SB_PWRGD
PQ36 27 U17
VIN +VCORE ECPWROK(SB_PWRGD)
22 +3VS5
Regulator +VDDNB_CPU CPU_PWRGD

PU12
CPU_VRM8380_PG
A_RST# LDT_PG PWROK

SB_PWRGD_IN
2
ECPWROK
3
C C
1 D21
23
CPU_VRM8380_PG
+5VPCU +1.1V_DYN
Regulator 21 U18
PU5 6 U12
HWPG (+1.1VS5)
SYS_HWPG
+5VPCU CPU_VRM8380_PG 28 26
+1.1V
Regulator NB_RST#_IN
PU10 HWPG (+1.1V_DYN)
18 24 NB_PWRGD_IN
20
HWPG (+1.1V)
HWPG (ALL) PWRGOOD
MOS +1.5V
+1.5VSUS PQ23
B MOS HWPG (0.9V) B
PU4 +0.9V
Regulator SYSTEMSETb
PU4
HWPG_1.8V
17 19
+3VPCU
LDO +2.5V RS880
HWPG (1.5VSUS)
PU6
+3VPCU U16
Regulator +1.8V 16
PU9
15
+3VPCU/+5VPCU +3V
MOS +5V
PQ16/PQ28
13
+1.5VSUS +1.5VSUS +1.5V
A
VIN MOS A
Regulator +0.75V_DDR_VTT PQ23
PU8
+DDR_VREF
12
+5VPCU
MOS +5VSUS
PQ13 PROJECT : FP8
1A
Process Flow
Date: T hursday, February 11, 2010 Sheet 40 of 41
5 4 3 2 1

HP DM1 Quanta FP8

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5 4 3 2 1

LAYER 5 : SVCC DDR3 800MHz 27 x 27mm 812 Balls DDR3 SMDDR

USB CONN X 327 Port0,1,2 USB

Card Reader Port7 Page: 11~15

SIM Card26 WWAN26 Port4

COMBO JACK20 Digital20 20

Quanta Computer Inc.

Date: Thurs day, February 11, 2010 Sheet 1 of 41

Quanta Computer Inc.

Date: Thurs day, February 11, 2010 Sheet 2 of 41

Date: Thurs day, February 11, 2010 Sheet 3 of 41

Channel-A to Solderdown MEM

DDR III: CHANNEL A

DDR III: CHANNEL B

17,18,19 DDR_A_RAS# AC27 16 DDR_B_RAS# AF32

Layout: Route as 60 ohms Layout: Route as 60 ohms

R249 2.2K_4 R250

Date: Thurs day, February 11, 2010 Sheet 4 of 41

R229 300_4 R9 solder mask opening under the processor

R213 1K/F_4 CPU_TEST26_BURNIN_L

CPU_TEST21_SCANEN R18 300_4

Can remove on MP------>LX

VID Override Circuit New add for Vcore

HDT Connector +1.5VSUS

VDD_19 VDD_67 VDDIO_17 VDDR_6 VSS_34 VSS_76 VSS_158 VSS_199

Place close to socket

PLACE CLOSE TO PROCESSOR AS POSSIBLE 22U/6.3V_8

PROCESSOR POWER AND GROUND

It's required to add two 10uF/0603 size

C435 C434 C436 C100 C126 C102 C103 C127 C81

Date: Thurs day, February 11, 2010 Sheet 6 of 41

HYPER TRANSPORT CPU I/F

Quanta Computer Inc.

Date: Thurs day, February 11, 2010 Sheet 7 of 41

PCIE I/F GFX

GFX_TX0,TX1,TX2 and TX3

GFX_TX4,TX5,TX6 and TX7

Quanta Computer Inc.

Date: Thurs day, February 11, 2010 Sheet 8 of 41

Enables the Test Debug Bus using GPIO. +1.8V

BLM18PG181SN1D(180,1.5A)_6 Reference C196 C410 C409

Date: Thurs day, February 11, 2010 Sheet 9 of 41

GROUND VDDA18PCIE +1.8V AVDDQ +1.8V

VDDG18 +1.8V PLLVDD +1.1V

VDD18_MEM +1.8V PLLVDD18 +1.8V

VDDPCIE +1.1V VDDA18PCIEPLL +1.8V

VDD_MEM +1.8V/1.5V VDDLTP18 +1.8V

IOPLLVDD18 +1.8V VDDLT33 NC

R29,R51,R30,R65,R49,R48 Footprint to short pad

Quanta Computer Inc.

Date: Thurs day, February 11, 2010 Sheet 10 of 41

PCI EXPRESS INTERFACES

23 CLK_PCIE_LAN GPP_CLK3P LPC_CLK1 15

P25 LAD2 H28 LPC_LAD3 5.6P/50V_6 22P/50V_4

1 3 D2 RTC_CLK R136 *10K/F_4 +3VS5 1 2

Date: Thurs day, February 11, 2010 Sheet 11 of 41

+3V SCL0/SDATA0 is 3V tolerance

ACPI / WAKE UP EVENTS

USB 1.1 USB MISC

R176 0_4/S R175 0_4/S C377 .1U/10V_4

R170 2.49K/F_4 LANRSET Power trace Layout 寬度 > 200mil